diff --git a/.cproject b/.cproject
index cf65e095441347a817baed6927d1ccb4e1986b43..8946616860811fcca3903286c5779c766fd32dae 100644
--- a/.cproject
+++ b/.cproject
@@ -388,5 +388,7 @@
+
+
diff --git a/.mxproject b/.mxproject
index b03a02d7d82921aa7f4bab96822e4284f7310080..9121ed759769f576d569457fb310998ddfc70eaa 100644
--- a/.mxproject
+++ b/.mxproject
@@ -1,8 +1,8 @@
[PreviousLibFiles]
-LibFiles=Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_eth.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_def.h;Drivers/STM32F2xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_rcc.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_rcc_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_cortex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_flash.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_flash_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_pwr.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_pwr_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_gpio.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_gpio_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_dma.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_dma_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_exti.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_can.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_i2c.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_tim.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_tim_ex.h;Drivers/STM32F2xx_HAL_Driver/Inc/stm32f2xx_hal_uart.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ccp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/chap_ms.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/chap-md5.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/chap-new.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/eap.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/eui64.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/fsm.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ipcp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ipv6cp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/lcp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/magic.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/mppe.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_impl.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ppp_opts.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppapi.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppcrypt.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppdebug.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppoe.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppol2tp.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/pppos.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/upap.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/vj.h;Middlewares/Third_Party/LwIP/src/include/netif/ppp/ecp.h;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_eth.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rcc.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rcc_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pwr.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pwr_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_gpio.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_exti.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_can.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_i2c.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_uart.c;Middlewares/Third_Party/LwIP/src/netif/ppp/auth.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.c;Middlewares/Third_Party/LwIP/src/netif/ppp/demand.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.c;Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/magic.c;Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.c;Middlewares/Third_Party/LwIP/src/netif/ppp/upap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/utils.c;Middlewares/Third_Party/LwIP/src/netif/ppp/vj.c;Middlewares/Third_Party/LwIP/src/netif/ethernet.c;Middlewares/Third_Party/LwIP/src/netif/slipif.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.c;Drivers/STM32F2xx_HAL_Dr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[PreviousUsedCubeIDEFiles]
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+SourceFiles=Core\Src\main.c;LWIP\App\lwip.c;LWIP\Target\ethernetif.c;Core\Src\stm32f2xx_it.c;Core\Src\stm32f2xx_hal_msp.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_eth.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rcc.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rcc_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pwr.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pwr_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_gpio.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_exti.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_can.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_i2c.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_uart.c;Middlewares/Third_Party/LwIP/src/netif/ppp/auth.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.c;Middlewares/Third_Party/LwIP/src/netif/ppp/demand.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.c;Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/magic.c;Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.c;Middlewares/Third_Party/LwIP/src/netif/ppp/upap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/utils.c;Middlewares/Third_Party/LwIP/src/netif/ppp/vj.c;Middlewares/Third_Party/LwIP/src/netif/ethernet.c;Middlewares/Third_Party/LwIP/src/netif/slipif.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.c;Middlewares/Third_Party/LwIP/src/api/api_lib.c;Middlewares/Third_Party/LwIP/src/api/api_msg.c;Middlewares/Third_Party/LwIP/src/api/err.c;Middlewares/Third_Party/LwIP/src/api/netbuf.c;Middlewares/Third_Party/LwIP/src/api/netdb.c;Middlewares/Third_Party/LwIP/src/api/netifapi.c;Middlewares/Third_Party/LwIP/src/api/sockets.c;Middlewares/Third_Party/LwIP/src/api/tcpip.c;Middlewares/Third_Party/LwIP/src/core/def.c;Middlewares/Third_Party/LwIP/src/core/dns.c;Middlewares/Third_Party/LwIP/src/core/inet_chksum.c;Middlewares/Third_Party/LwIP/src/core/init.c;Middlewares/Third_Party/LwIP/src/core/ip.c;Middlewares/Third_Party/LwIP/src/core/mem.c;Middlewares/Third_Party/LwIP/src/core/memp.c;Middlewares/Third_Party/LwIP/src/core/netif.c;Middlewares/Third_Party/LwIP/src/core/pbuf.c;Middlewares/Third_Party/LwIP/src/core/raw.c;Middlewares/Third_Party/LwIP/src/core/stats.c;Middlewares/Third_Party/LwIP/src/core/sys.c;Middlewares/Third_Party/LwIP/src/core/tcp.c;Middlewares/Third_Party/LwIP/src/core/tcp_in.c;Middlewares/Third_Party/LwIP/src/core/tcp_out.c;Middlewares/Third_Party/LwIP/src/core/timeouts.c;Middlewares/Third_Party/LwIP/src/core/udp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.c;Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.c;Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.c;Core\Src/system_stm32f2xx.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_eth.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rcc.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_rcc_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_flash_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pwr.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_pwr_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_gpio.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_exti.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_can.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_i2c.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_tim_ex.c;Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_uart.c;Middlewares/Third_Party/LwIP/src/netif/ppp/auth.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.c;Middlewares/Third_Party/LwIP/src/netif/ppp/demand.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.c;Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/magic.c;Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.c;Middlewares/Third_Party/LwIP/src/netif/ppp/upap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/utils.c;Middlewares/Third_Party/LwIP/src/netif/ppp/vj.c;Middlewares/Third_Party/LwIP/src/netif/ethernet.c;Middlewares/Third_Party/LwIP/src/netif/slipif.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.c;Middlewares/Third_Party/LwIP/src/api/api_lib.c;Middlewares/Third_Party/LwIP/src/api/api_msg.c;Middlewares/Third_Party/LwIP/src/api/err.c;Middlewares/Third_Party/LwIP/src/api/netbuf.c;Middlewares/Third_Party/LwIP/src/api/netdb.c;Middlewares/Third_Party/LwIP/src/api/netifapi.c;Middlewares/Third_Party/LwIP/src/api/sockets.c;Middlewares/Third_Party/LwIP/src/api/tcpip.c;Middlewares/Third_Party/LwIP/src/core/def.c;Middlewares/Third_Party/LwIP/src/core/dns.c;Middlewares/Third_Party/LwIP/src/core/inet_chksum.c;Middlewares/Third_Party/LwIP/src/core/init.c;Middlewares/Third_Party/LwIP/src/core/ip.c;Middlewares/Third_Party/LwIP/src/core/mem.c;Middlewares/Third_Party/LwIP/src/core/memp.c;Middlewares/Third_Party/LwIP/src/core/netif.c;Middlewares/Third_Party/LwIP/src/core/pbuf.c;Middlewares/Third_Party/LwIP/src/core/raw.c;Middlewares/Third_Party/LwIP/src/core/stats.c;Middlewares/Third_Party/LwIP/src/core/sys.c;Middlewares/Third_Party/LwIP/src/core/tcp.c;Middlewares/Third_Party/LwIP/src/core/tcp_in.c;Middlewares/Third_Party/LwIP/src/core/tcp_out.c;Middlewares/Third_Party/LwIP/src/core/timeouts.c;Middlewares/Third_Party/LwIP/src/core/udp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.c;Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.c;Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.c;Core\Src/system_stm32f2xx.c;Drivers/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c;;Middlewares/Third_Party/LwIP/src/netif/ppp/auth.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ccp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap_ms.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-md5.c;Middlewares/Third_Party/LwIP/src/netif/ppp/chap-new.c;Middlewares/Third_Party/LwIP/src/netif/ppp/demand.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/eui64.c;Middlewares/Third_Party/LwIP/src/netif/ppp/fsm.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ipv6cp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/lcp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/magic.c;Middlewares/Third_Party/LwIP/src/netif/ppp/mppe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/multilink.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ppp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppapi.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppcrypt.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppoe.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppol2tp.c;Middlewares/Third_Party/LwIP/src/netif/ppp/pppos.c;Middlewares/Third_Party/LwIP/src/netif/ppp/upap.c;Middlewares/Third_Party/LwIP/src/netif/ppp/utils.c;Middlewares/Third_Party/LwIP/src/netif/ppp/vj.c;Middlewares/Third_Party/LwIP/src/netif/ethernet.c;Middlewares/Third_Party/LwIP/src/netif/slipif.c;Middlewares/Third_Party/LwIP/src/netif/lowpan6.c;Middlewares/Third_Party/LwIP/src/netif/ppp/ecp.c;Middlewares/Third_Party/LwIP/src/api/api_lib.c;Middlewares/Third_Party/LwIP/src/api/api_msg.c;Middlewares/Third_Party/LwIP/src/api/err.c;Middlewares/Third_Party/LwIP/src/api/netbuf.c;Middlewares/Third_Party/LwIP/src/api/netdb.c;Middlewares/Third_Party/LwIP/src/api/netifapi.c;Middlewares/Third_Party/LwIP/src/api/sockets.c;Middlewares/Third_Party/LwIP/src/api/tcpip.c;Middlewares/Third_Party/LwIP/src/core/def.c;Middlewares/Third_Party/LwIP/src/core/dns.c;Middlewares/Third_Party/LwIP/src/core/inet_chksum.c;Middlewares/Third_Party/LwIP/src/core/init.c;Middlewares/Third_Party/LwIP/src/core/ip.c;Middlewares/Third_Party/LwIP/src/core/mem.c;Middlewares/Third_Party/LwIP/src/core/memp.c;Middlewares/Third_Party/LwIP/src/core/netif.c;Middlewares/Third_Party/LwIP/src/core/pbuf.c;Middlewares/Third_Party/LwIP/src/core/raw.c;Middlewares/Third_Party/LwIP/src/core/stats.c;Middlewares/Third_Party/LwIP/src/core/sys.c;Middlewares/Third_Party/LwIP/src/core/tcp.c;Middlewares/Third_Party/LwIP/src/core/tcp_in.c;Middlewares/Third_Party/LwIP/src/core/tcp_out.c;Middlewares/Third_Party/LwIP/src/core/timeouts.c;Middlewares/Third_Party/LwIP/src/core/udp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/autoip.c;Middlewares/Third_Party/LwIP/src/core/ipv4/dhcp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/igmp.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/dhcp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ethip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/icmp6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/inet6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_addr.c;Middlewares/Third_Party/LwIP/src/core/ipv6/ip6_frag.c;Middlewares/Third_Party/LwIP/src/core/ipv6/mld6.c;Middlewares/Third_Party/LwIP/src/core/ipv6/nd6.c;Middlewares/Third_Party/LwIP/src/apps/mqtt/mqtt.c;
HeaderPath=Middlewares\Third_Party\LwIP\src\include;Middlewares\Third_Party\LwIP\system;Middlewares\Third_Party\LwIP\src\include;Middlewares\Third_Party\LwIP\system;Drivers\STM32F2xx_HAL_Driver\Inc;Drivers\STM32F2xx_HAL_Driver\Inc\Legacy;Middlewares\Third_Party\LwIP\src\include\netif\ppp;Drivers\CMSIS\Device\ST\STM32F2xx\Include;Middlewares\Third_Party\LwIP\src\include\lwip;Middlewares\Third_Party\LwIP\src\include\lwip\apps;Middlewares\Third_Party\LwIP\src\include\lwip\priv;Middlewares\Third_Party\LwIP\src\include\lwip\prot;Middlewares\Third_Party\LwIP\src\include\netif;Middlewares\Third_Party\LwIP\src\include\posix;Middlewares\Third_Party\LwIP\src\include\posix\sys;Middlewares\Third_Party\LwIP\system\arch;Drivers\CMSIS\Include;LWIP\App;LWIP\Target;Core\Inc;
CDefines=USE_HAL_DRIVER;STM32F207xx;USE_HAL_DRIVER;USE_HAL_DRIVER;
diff --git a/Core/Inc/analogh.h b/Core/Inc/analogh.h
new file mode 100644
index 0000000000000000000000000000000000000000..88bf6812de2b20e5ebefa5763ec6077b0048a8ec
--- /dev/null
+++ b/Core/Inc/analogh.h
@@ -0,0 +1,15 @@
+/*
+ * analogh.h
+ *
+ * Created on: Apr 28, 2021
+ * Author: Florian
+ */
+
+#ifndef INC_ANALOGH_H_
+#define INC_ANALOGH_H_
+
+void AnalogH_Init (void);
+void AnalogH_Start(void);
+void AnalogH_Stop(void);
+
+#endif /* INC_ANALOGH_H_ */
diff --git a/Core/Inc/main.h b/Core/Inc/main.h
index 75c6ebb67de1680c4c2bcb32fbc26adc8408cf06..e7a506ad896520d54179fb3860e80c6c6c5ae561 100644
--- a/Core/Inc/main.h
+++ b/Core/Inc/main.h
@@ -34,6 +34,7 @@ extern "C" {
/* USER CODE BEGIN Includes */
#include "common.h"
#include "timemgt.h"
+#include "analogh.h"
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
@@ -111,16 +112,12 @@ void MAINTask1ms (void);
#define LD1_GPIO_Port GPIOB
#define DIG_IN_1_Pin GPIO_PIN_11
#define DIG_IN_1_GPIO_Port GPIOF
-#define DIG_IN_2_Pin GPIO_PIN_12
-#define DIG_IN_2_GPIO_Port GPIOF
#define DIG_IN_3_Pin GPIO_PIN_13
#define DIG_IN_3_GPIO_Port GPIOF
#define DIG_IN_4_Pin GPIO_PIN_14
#define DIG_IN_4_GPIO_Port GPIOF
#define DIG_IN_5_Pin GPIO_PIN_15
#define DIG_IN_5_GPIO_Port GPIOF
-#define LED_CMD_1_Pin GPIO_PIN_0
-#define LED_CMD_1_GPIO_Port GPIOG
#define LED_CMD_2_Pin GPIO_PIN_1
#define LED_CMD_2_GPIO_Port GPIOG
#define RMII_TXD1_Pin GPIO_PIN_13
diff --git a/Core/Inc/stm32f2xx_hal_conf.h b/Core/Inc/stm32f2xx_hal_conf.h
index 74eb8650336af6ea094fd6f31af57121757f5b7d..c11256ac73196fd15f6f706af9c7365c5d6e0ef3 100644
--- a/Core/Inc/stm32f2xx_hal_conf.h
+++ b/Core/Inc/stm32f2xx_hal_conf.h
@@ -33,7 +33,7 @@
*/
#define HAL_MODULE_ENABLED
-/*#define HAL_ADC_MODULE_ENABLED */
+#define HAL_ADC_MODULE_ENABLED
/*#define HAL_CRYP_MODULE_ENABLED */
#define HAL_CAN_MODULE_ENABLED
/*#define HAL_CAN_LEGACY_MODULE_ENABLED */
diff --git a/Core/Src/analogh.c b/Core/Src/analogh.c
new file mode 100644
index 0000000000000000000000000000000000000000..9706db35bb06976cf06935f07201753efbdbbb91
--- /dev/null
+++ b/Core/Src/analogh.c
@@ -0,0 +1,23 @@
+/*
+ * analogh.c
+ *
+ * Created on: Apr 28, 2021
+ * Author: Florian
+ */
+
+#include "analogh.h"
+
+void AnalogH_Init (void)
+{
+
+}
+
+void AnalogH_Start(void)
+{
+
+}
+
+void AnalogH_Stop(void)
+{
+
+}
diff --git a/Core/Src/main.c b/Core/Src/main.c
index 255bb5c991f776bfd7319d56487494376627649f..8d08dc44e8ebe2b65a676165fe94816be0d1f036 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -41,6 +41,10 @@
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
+ADC_HandleTypeDef hadc1;
+ADC_HandleTypeDef hadc2;
+ADC_HandleTypeDef hadc3;
+
CAN_HandleTypeDef hcan1;
I2C_HandleTypeDef hi2c1;
@@ -63,6 +67,9 @@ DMA_HandleTypeDef hdma_usart2_tx;
* TIM8 : analog outputs PWM (APB2 @ 60MHz)
*
* */
+
+uint32_t AnalogValue_ADC1_U32A[4U];
+uint32_t AnalogValue_ADC2_U32A[4U];
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
@@ -77,6 +84,9 @@ static void MX_USART2_UART_Init(void);
static void MX_TIM1_Init(void);
static void MX_TIM6_Init(void);
static void MX_TIM8_Init(void);
+static void MX_ADC1_Init(void);
+static void MX_ADC2_Init(void);
+static void MX_ADC3_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@@ -124,6 +134,9 @@ int main(void)
MX_TIM1_Init();
MX_TIM6_Init();
MX_TIM8_Init();
+ MX_ADC1_Init();
+ MX_ADC2_Init();
+ MX_ADC3_Init();
/* USER CODE BEGIN 2 */
TimeMgt_Init();
/* USER CODE END 2 */
@@ -136,6 +149,10 @@ int main(void)
// Start 1ms interrupt
HAL_TIM_Base_Start_IT(&htim6);
+ // ADC DMA start
+ HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&AnalogValue_ADC1_U32A[0], 4U);
+ HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&AnalogValue_ADC2_U32A[0], 4U);
+
while (1)
{
/* USER CODE END WHILE */
@@ -185,6 +202,156 @@ void SystemClock_Config(void)
}
}
+/**
+ * @brief ADC1 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_ADC1_Init(void)
+{
+
+ /* USER CODE BEGIN ADC1_Init 0 */
+
+ /* USER CODE END ADC1_Init 0 */
+
+ ADC_ChannelConfTypeDef sConfig = {0};
+
+ /* USER CODE BEGIN ADC1_Init 1 */
+
+ /* USER CODE END ADC1_Init 1 */
+ /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
+ */
+ hadc1.Instance = ADC1;
+ hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
+ hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+ hadc1.Init.ScanConvMode = DISABLE;
+ hadc1.Init.ContinuousConvMode = DISABLE;
+ hadc1.Init.DiscontinuousConvMode = DISABLE;
+ hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ hadc1.Init.NbrOfConversion = 1;
+ hadc1.Init.DMAContinuousRequests = DISABLE;
+ hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ if (HAL_ADC_Init(&hadc1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
+ */
+ sConfig.Channel = ADC_CHANNEL_3;
+ sConfig.Rank = 1;
+ sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+ if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN ADC1_Init 2 */
+
+ /* USER CODE END ADC1_Init 2 */
+
+}
+
+/**
+ * @brief ADC2 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_ADC2_Init(void)
+{
+
+ /* USER CODE BEGIN ADC2_Init 0 */
+
+ /* USER CODE END ADC2_Init 0 */
+
+ ADC_ChannelConfTypeDef sConfig = {0};
+
+ /* USER CODE BEGIN ADC2_Init 1 */
+
+ /* USER CODE END ADC2_Init 1 */
+ /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
+ */
+ hadc2.Instance = ADC2;
+ hadc2.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
+ hadc2.Init.Resolution = ADC_RESOLUTION_12B;
+ hadc2.Init.ScanConvMode = DISABLE;
+ hadc2.Init.ContinuousConvMode = DISABLE;
+ hadc2.Init.DiscontinuousConvMode = DISABLE;
+ hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ hadc2.Init.NbrOfConversion = 1;
+ hadc2.Init.DMAContinuousRequests = DISABLE;
+ hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ if (HAL_ADC_Init(&hadc2) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
+ */
+ sConfig.Channel = ADC_CHANNEL_9;
+ sConfig.Rank = 1;
+ sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+ if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN ADC2_Init 2 */
+
+ /* USER CODE END ADC2_Init 2 */
+
+}
+
+/**
+ * @brief ADC3 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_ADC3_Init(void)
+{
+
+ /* USER CODE BEGIN ADC3_Init 0 */
+
+ /* USER CODE END ADC3_Init 0 */
+
+ ADC_ChannelConfTypeDef sConfig = {0};
+
+ /* USER CODE BEGIN ADC3_Init 1 */
+
+ /* USER CODE END ADC3_Init 1 */
+ /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
+ */
+ hadc3.Instance = ADC3;
+ hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
+ hadc3.Init.Resolution = ADC_RESOLUTION_12B;
+ hadc3.Init.ScanConvMode = DISABLE;
+ hadc3.Init.ContinuousConvMode = DISABLE;
+ hadc3.Init.DiscontinuousConvMode = DISABLE;
+ hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ hadc3.Init.NbrOfConversion = 1;
+ hadc3.Init.DMAContinuousRequests = DISABLE;
+ hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ if (HAL_ADC_Init(&hadc3) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
+ */
+ sConfig.Channel = ADC_CHANNEL_0;
+ sConfig.Rank = 1;
+ sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+ if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN ADC3_Init 2 */
+
+ /* USER CODE END ADC3_Init 2 */
+
+}
+
/**
* @brief CAN1 Initialization Function
* @param None
@@ -618,7 +785,7 @@ static void MX_GPIO_Init(void)
HAL_GPIO_WritePin(GPIOB, LD1_Pin|LD3_Pin|LD2_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOG, LED_CMD_1_Pin|LED_CMD_2_Pin|USB_PowerSwitchOn_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(GPIOG, GPIO_PIN_0|LED_CMD_2_Pin|USB_PowerSwitchOn_Pin, GPIO_PIN_RESET);
/*Configure GPIO pins : DIG_IN_6_Pin DIG_IN_7_Pin DIG_IN_8_Pin DIG_IN_9_Pin
DIG_IN_10_Pin */
@@ -652,41 +819,21 @@ static void MX_GPIO_Init(void)
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- /*Configure GPIO pins : DIG_IN_1_Pin DIG_IN_2_Pin DIG_IN_3_Pin DIG_IN_4_Pin
+ /*Configure GPIO pins : DIG_IN_1_Pin PF12 DIG_IN_3_Pin DIG_IN_4_Pin
DIG_IN_5_Pin */
- GPIO_InitStruct.Pin = DIG_IN_1_Pin|DIG_IN_2_Pin|DIG_IN_3_Pin|DIG_IN_4_Pin
+ GPIO_InitStruct.Pin = DIG_IN_1_Pin|GPIO_PIN_12|DIG_IN_3_Pin|DIG_IN_4_Pin
|DIG_IN_5_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- /*Configure GPIO pins : LED_CMD_1_Pin LED_CMD_2_Pin USB_PowerSwitchOn_Pin */
- GPIO_InitStruct.Pin = LED_CMD_1_Pin|LED_CMD_2_Pin|USB_PowerSwitchOn_Pin;
+ /*Configure GPIO pins : PG0 LED_CMD_2_Pin USB_PowerSwitchOn_Pin */
+ GPIO_InitStruct.Pin = GPIO_PIN_0|LED_CMD_2_Pin|USB_PowerSwitchOn_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
- /*Configure GPIO pins : PB12 PB15 */
- GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_15;
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
- /*Configure GPIO pins : PD10 PD11 PD12 PD13
- PD14 PD15 */
- GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13
- |GPIO_PIN_14|GPIO_PIN_15;
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
-
- /*Configure GPIO pins : PG2 PG3 PG4 PG5 */
- GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5;
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
-
/*Configure GPIO pin : USB_OverCurrent_Pin */
GPIO_InitStruct.Pin = USB_OverCurrent_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
@@ -749,3 +896,4 @@ void assert_failed(uint8_t *file, uint32_t line)
#endif /* USE_FULL_ASSERT */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Core/Src/stm32f2xx_hal_msp.c b/Core/Src/stm32f2xx_hal_msp.c
index fe7b3095eba5d7cf3b5e7eca0e541ae0e89cefa9..86d67d229c39146e0eb12f3125aed6ec0f3e3d4c 100644
--- a/Core/Src/stm32f2xx_hal_msp.c
+++ b/Core/Src/stm32f2xx_hal_msp.c
@@ -82,6 +82,163 @@ void HAL_MspInit(void)
/* USER CODE END MspInit 1 */
}
+/**
+* @brief ADC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ if(hadc->Instance==ADC1)
+ {
+ /* USER CODE BEGIN ADC1_MspInit 0 */
+
+ /* USER CODE END ADC1_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_ADC1_CLK_ENABLE();
+
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ /**ADC1 GPIO Configuration
+ PA3 ------> ADC1_IN3
+ PA4 ------> ADC1_IN4
+ PA5 ------> ADC1_IN5
+ PA6 ------> ADC1_IN6
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN ADC1_MspInit 1 */
+
+ /* USER CODE END ADC1_MspInit 1 */
+ }
+ else if(hadc->Instance==ADC2)
+ {
+ /* USER CODE BEGIN ADC2_MspInit 0 */
+
+ /* USER CODE END ADC2_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_ADC2_CLK_ENABLE();
+
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ /**ADC2 GPIO Configuration
+ PC0 ------> ADC2_IN10
+ PC2 ------> ADC2_IN12
+ PC3 ------> ADC2_IN13
+ PB1 ------> ADC2_IN9
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_3;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+ GPIO_InitStruct.Pin = GPIO_PIN_1;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN ADC2_MspInit 1 */
+
+ /* USER CODE END ADC2_MspInit 1 */
+ }
+ else if(hadc->Instance==ADC3)
+ {
+ /* USER CODE BEGIN ADC3_MspInit 0 */
+
+ /* USER CODE END ADC3_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_ADC3_CLK_ENABLE();
+
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ /**ADC3 GPIO Configuration
+ PA0-WKUP ------> ADC3_IN0
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_0;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN ADC3_MspInit 1 */
+
+ /* USER CODE END ADC3_MspInit 1 */
+ }
+
+}
+
+/**
+* @brief ADC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hadc: ADC handle pointer
+* @retval None
+*/
+void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
+{
+ if(hadc->Instance==ADC1)
+ {
+ /* USER CODE BEGIN ADC1_MspDeInit 0 */
+
+ /* USER CODE END ADC1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_ADC1_CLK_DISABLE();
+
+ /**ADC1 GPIO Configuration
+ PA3 ------> ADC1_IN3
+ PA4 ------> ADC1_IN4
+ PA5 ------> ADC1_IN5
+ PA6 ------> ADC1_IN6
+ */
+ HAL_GPIO_DeInit(GPIOA, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6);
+
+ /* USER CODE BEGIN ADC1_MspDeInit 1 */
+
+ /* USER CODE END ADC1_MspDeInit 1 */
+ }
+ else if(hadc->Instance==ADC2)
+ {
+ /* USER CODE BEGIN ADC2_MspDeInit 0 */
+
+ /* USER CODE END ADC2_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_ADC2_CLK_DISABLE();
+
+ /**ADC2 GPIO Configuration
+ PC0 ------> ADC2_IN10
+ PC2 ------> ADC2_IN12
+ PC3 ------> ADC2_IN13
+ PB1 ------> ADC2_IN9
+ */
+ HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_3);
+
+ HAL_GPIO_DeInit(GPIOB, GPIO_PIN_1);
+
+ /* USER CODE BEGIN ADC2_MspDeInit 1 */
+
+ /* USER CODE END ADC2_MspDeInit 1 */
+ }
+ else if(hadc->Instance==ADC3)
+ {
+ /* USER CODE BEGIN ADC3_MspDeInit 0 */
+
+ /* USER CODE END ADC3_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_ADC3_CLK_DISABLE();
+
+ /**ADC3 GPIO Configuration
+ PA0-WKUP ------> ADC3_IN0
+ */
+ HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0);
+
+ /* USER CODE BEGIN ADC3_MspDeInit 1 */
+
+ /* USER CODE END ADC3_MspDeInit 1 */
+ }
+
+}
+
/**
* @brief CAN MSP Initialization
* This function configures the hardware resources used in this example
@@ -402,20 +559,12 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
/* Peripheral clock enable */
__HAL_RCC_USART2_CLK_ENABLE();
- __HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/**USART2 GPIO Configuration
- PA3 ------> USART2_RX
PD5 ------> USART2_TX
+ PD6 ------> USART2_RX
*/
- GPIO_InitStruct.Pin = GPIO_PIN_3;
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- GPIO_InitStruct.Pin = GPIO_PIN_5;
+ GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
@@ -507,12 +656,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
__HAL_RCC_USART2_CLK_DISABLE();
/**USART2 GPIO Configuration
- PA3 ------> USART2_RX
PD5 ------> USART2_TX
+ PD6 ------> USART2_RX
*/
- HAL_GPIO_DeInit(GPIOA, GPIO_PIN_3);
-
- HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5);
+ HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5|GPIO_PIN_6);
/* USART2 DMA DeInit */
HAL_DMA_DeInit(huart->hdmarx);
diff --git a/Debug/Core/Src/analogh.su b/Debug/Core/Src/analogh.su
new file mode 100644
index 0000000000000000000000000000000000000000..c4cb2657fc88aa8f4d65fc1fd25bcb736a39efd2
--- /dev/null
+++ b/Debug/Core/Src/analogh.su
@@ -0,0 +1,3 @@
+analogh.c:10:6:AnalogH_Init 4 static
+analogh.c:15:6:AnalogH_Start 4 static
+analogh.c:20:6:AnalogH_Stop 4 static
diff --git a/Debug/Core/Src/main.su b/Debug/Core/Src/main.su
index d4d45e8446e9f6761c1337944b13335a6ea479b0..cf23307822d88a79771973daf5b9ed2abe862f27 100644
--- a/Debug/Core/Src/main.su
+++ b/Debug/Core/Src/main.su
@@ -1,14 +1,17 @@
-main.c:93:5:main 8 static
-main.c:152:6:SystemClock_Config 80 static
-main.c:193:13:MX_CAN1_Init 8 static
-main.c:230:13:MX_I2C1_Init 8 static
-main.c:264:13:MX_TIM1_Init 96 static
-main.c:351:13:MX_TIM2_Init 32 static
-main.c:396:13:MX_TIM6_Init 16 static
-main.c:434:13:MX_TIM8_Init 96 static
-main.c:513:13:MX_USART2_UART_Init 8 static
-main.c:546:13:MX_USART3_UART_Init 8 static
-main.c:577:13:MX_DMA_Init 16 static
-main.c:598:13:MX_GPIO_Init 64 static
-main.c:713:6:MAINTask1ms 8 static
-main.c:723:6:Error_Handler 4 static,ignoring_inline_asm
+main.c:103:5:main 8 static
+main.c:169:6:SystemClock_Config 80 static
+main.c:210:13:MX_ADC1_Init 24 static
+main.c:260:13:MX_ADC2_Init 24 static
+main.c:310:13:MX_ADC3_Init 24 static
+main.c:360:13:MX_CAN1_Init 8 static
+main.c:397:13:MX_I2C1_Init 8 static
+main.c:431:13:MX_TIM1_Init 96 static
+main.c:518:13:MX_TIM2_Init 32 static
+main.c:563:13:MX_TIM6_Init 16 static
+main.c:601:13:MX_TIM8_Init 96 static
+main.c:680:13:MX_USART2_UART_Init 8 static
+main.c:713:13:MX_USART3_UART_Init 8 static
+main.c:744:13:MX_DMA_Init 16 static
+main.c:765:13:MX_GPIO_Init 64 static
+main.c:860:6:MAINTask1ms 8 static
+main.c:870:6:Error_Handler 4 static,ignoring_inline_asm
diff --git a/Debug/Core/Src/stm32f2xx_hal_msp.su b/Debug/Core/Src/stm32f2xx_hal_msp.su
index 1fe1e9913a89e9bb899e7e606a9d531ad881be4d..e6fa65cb73561cbf66f24a04c093d4681e430dba 100644
--- a/Debug/Core/Src/stm32f2xx_hal_msp.su
+++ b/Debug/Core/Src/stm32f2xx_hal_msp.su
@@ -1,10 +1,12 @@
stm32f2xx_hal_msp.c:69:6:HAL_MspInit 16 static
-stm32f2xx_hal_msp.c:91:6:HAL_CAN_MspInit 48 static
-stm32f2xx_hal_msp.c:130:6:HAL_CAN_MspDeInit 16 static
-stm32f2xx_hal_msp.c:161:6:HAL_I2C_MspInit 48 static
-stm32f2xx_hal_msp.c:197:6:HAL_I2C_MspDeInit 16 static
-stm32f2xx_hal_msp.c:228:6:HAL_TIM_Base_MspInit 32 static
-stm32f2xx_hal_msp.c:280:6:HAL_TIM_MspPostInit 48 static
-stm32f2xx_hal_msp.c:336:6:HAL_TIM_Base_MspDeInit 16 static
-stm32f2xx_hal_msp.c:394:6:HAL_UART_MspInit 56 static
-stm32f2xx_hal_msp.c:499:6:HAL_UART_MspDeInit 16 static
+stm32f2xx_hal_msp.c:91:6:HAL_ADC_MspInit 64 static
+stm32f2xx_hal_msp.c:178:6:HAL_ADC_MspDeInit 16 static
+stm32f2xx_hal_msp.c:248:6:HAL_CAN_MspInit 48 static
+stm32f2xx_hal_msp.c:287:6:HAL_CAN_MspDeInit 16 static
+stm32f2xx_hal_msp.c:318:6:HAL_I2C_MspInit 48 static
+stm32f2xx_hal_msp.c:354:6:HAL_I2C_MspDeInit 16 static
+stm32f2xx_hal_msp.c:385:6:HAL_TIM_Base_MspInit 32 static
+stm32f2xx_hal_msp.c:437:6:HAL_TIM_MspPostInit 48 static
+stm32f2xx_hal_msp.c:493:6:HAL_TIM_Base_MspDeInit 16 static
+stm32f2xx_hal_msp.c:551:6:HAL_UART_MspInit 56 static
+stm32f2xx_hal_msp.c:648:6:HAL_UART_MspDeInit 16 static
diff --git a/Debug/Core/Src/subdir.mk b/Debug/Core/Src/subdir.mk
index 7bad96ac28eef2067cde930fc07ffc293a8c4242..6ab2bd1d0bd57b3964a8eb69ab3ae2c7cd394bdd 100644
--- a/Debug/Core/Src/subdir.mk
+++ b/Debug/Core/Src/subdir.mk
@@ -5,6 +5,7 @@
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
+../Core/Src/analogh.c \
../Core/Src/main.c \
../Core/Src/stm32f2xx_hal_msp.c \
../Core/Src/stm32f2xx_it.c \
@@ -14,6 +15,7 @@ C_SRCS += \
../Core/Src/timemgt.c
OBJS += \
+./Core/Src/analogh.o \
./Core/Src/main.o \
./Core/Src/stm32f2xx_hal_msp.o \
./Core/Src/stm32f2xx_it.o \
@@ -23,6 +25,7 @@ OBJS += \
./Core/Src/timemgt.o
C_DEPS += \
+./Core/Src/analogh.d \
./Core/Src/main.d \
./Core/Src/stm32f2xx_hal_msp.d \
./Core/Src/stm32f2xx_it.d \
@@ -33,6 +36,8 @@ C_DEPS += \
# Each subdirectory must supply rules for building sources it contributes
+Core/Src/analogh.o: ../Core/Src/analogh.c Core/Src/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F207xx -c -I../Core/Inc -I../Drivers/STM32F2xx_HAL_Driver/Inc -I../Drivers/STM32F2xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F2xx/Include -I../Drivers/CMSIS/Include -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/posix -I../Middlewares/Third_Party/LwIP/src/include/posix/sys -I../Middlewares/Third_Party/LwIP/system/arch -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/analogh.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/main.o: ../Core/Src/main.c Core/Src/subdir.mk
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F207xx -c -I../Core/Inc -I../Drivers/STM32F2xx_HAL_Driver/Inc -I../Drivers/STM32F2xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F2xx/Include -I../Drivers/CMSIS/Include -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/posix -I../Middlewares/Third_Party/LwIP/src/include/posix/sys -I../Middlewares/Third_Party/LwIP/system/arch -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/stm32f2xx_hal_msp.o: ../Core/Src/stm32f2xx_hal_msp.c Core/Src/subdir.mk
diff --git a/Debug/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc.su b/Debug/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc.su
new file mode 100644
index 0000000000000000000000000000000000000000..bfc005fa9977a141de5e1aab8975a860d612abc5
--- /dev/null
+++ b/Debug/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc.su
@@ -0,0 +1,26 @@
+stm32f2xx_hal_adc.c:312:19:HAL_ADC_Init 24 static
+stm32f2xx_hal_adc.c:406:19:HAL_ADC_DeInit 24 static
+stm32f2xx_hal_adc.c:665:13:HAL_ADC_MspInit 16 static
+stm32f2xx_hal_adc.c:680:13:HAL_ADC_MspDeInit 16 static
+stm32f2xx_hal_adc.c:719:19:HAL_ADC_Start 24 static
+stm32f2xx_hal_adc.c:828:19:HAL_ADC_Stop 16 static
+stm32f2xx_hal_adc.c:871:19:HAL_ADC_PollForConversion 24 static
+stm32f2xx_hal_adc.c:956:19:HAL_ADC_PollForEvent 32 static
+stm32f2xx_hal_adc.c:1018:19:HAL_ADC_Start_IT 24 static
+stm32f2xx_hal_adc.c:1129:19:HAL_ADC_Stop_IT 16 static
+stm32f2xx_hal_adc.c:1166:6:HAL_ADC_IRQHandler 24 static
+stm32f2xx_hal_adc.c:1327:19:HAL_ADC_Start_DMA 32 static
+stm32f2xx_hal_adc.c:1454:19:HAL_ADC_Stop_DMA 24 static
+stm32f2xx_hal_adc.c:1503:10:HAL_ADC_GetValue 16 static
+stm32f2xx_hal_adc.c:1515:13:HAL_ADC_ConvCpltCallback 16 static
+stm32f2xx_hal_adc.c:1530:13:HAL_ADC_ConvHalfCpltCallback 16 static
+stm32f2xx_hal_adc.c:1545:13:HAL_ADC_LevelOutOfWindowCallback 16 static
+stm32f2xx_hal_adc.c:1566:13:HAL_ADC_ErrorCallback 16 static
+stm32f2xx_hal_adc.c:1604:19:HAL_ADC_ConfigChannel 24 static
+stm32f2xx_hal_adc.c:1710:19:HAL_ADC_AnalogWDGConfig 16 static
+stm32f2xx_hal_adc.c:1792:10:HAL_ADC_GetState 16 static
+stm32f2xx_hal_adc.c:1804:10:HAL_ADC_GetError 16 static
+stm32f2xx_hal_adc.c:1824:13:ADC_Init 24 static,ignoring_inline_asm
+stm32f2xx_hal_adc.c:1905:13:ADC_DMAConvCplt 24 static
+stm32f2xx_hal_adc.c:1974:13:ADC_DMAHalfConvCplt 24 static
+stm32f2xx_hal_adc.c:1992:13:ADC_DMAError 24 static
diff --git a/Debug/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc_ex.su b/Debug/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc_ex.su
new file mode 100644
index 0000000000000000000000000000000000000000..7faba715aa649214b4f7bc68906537eeca2e2d93
--- /dev/null
+++ b/Debug/Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc_ex.su
@@ -0,0 +1,15 @@
+stm32f2xx_hal_adc_ex.c:148:19:HAL_ADCEx_InjectedStart 32 static
+stm32f2xx_hal_adc_ex.c:245:19:HAL_ADCEx_InjectedStart_IT 32 static
+stm32f2xx_hal_adc_ex.c:350:19:HAL_ADCEx_InjectedStop 24 static
+stm32f2xx_hal_adc_ex.c:404:19:HAL_ADCEx_InjectedPollForConversion 24 static
+stm32f2xx_hal_adc_ex.c:471:19:HAL_ADCEx_InjectedStop_IT 24 static
+stm32f2xx_hal_adc_ex.c:533:10:HAL_ADCEx_InjectedGetValue 24 static
+stm32f2xx_hal_adc_ex.c:584:19:HAL_ADCEx_MultiModeStart_DMA 32 static
+stm32f2xx_hal_adc_ex.c:705:19:HAL_ADCEx_MultiModeStop_DMA 24 static
+stm32f2xx_hal_adc_ex.c:752:10:HAL_ADCEx_MultiModeGetValue 16 static
+stm32f2xx_hal_adc_ex.c:766:13:HAL_ADCEx_InjectedConvCpltCallback 16 static
+stm32f2xx_hal_adc_ex.c:783:19:HAL_ADCEx_InjectedConfigChannel 16 static
+stm32f2xx_hal_adc_ex.c:939:19:HAL_ADCEx_MultiModeConfigChannel 16 static
+stm32f2xx_hal_adc_ex.c:978:13:ADC_MultiModeDMAConvCplt 24 static
+stm32f2xx_hal_adc_ex.c:1031:13:ADC_MultiModeDMAHalfConvCplt 24 static
+stm32f2xx_hal_adc_ex.c:1044:13:ADC_MultiModeDMAError 24 static
diff --git a/Debug/Drivers/STM32F2xx_HAL_Driver/Src/subdir.mk b/Debug/Drivers/STM32F2xx_HAL_Driver/Src/subdir.mk
index 4520e644c8190b3d8a8cda621186af36dd2f3c27..28b618b1d6080a674fefd553c2314f36a52d8eb8 100644
--- a/Debug/Drivers/STM32F2xx_HAL_Driver/Src/subdir.mk
+++ b/Debug/Drivers/STM32F2xx_HAL_Driver/Src/subdir.mk
@@ -6,6 +6,8 @@
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.c \
+../Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc.c \
+../Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc_ex.c \
../Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_can.c \
../Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.c \
../Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma.c \
@@ -26,6 +28,8 @@ C_SRCS += \
OBJS += \
./Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.o \
+./Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc.o \
+./Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc_ex.o \
./Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_can.o \
./Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.o \
./Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma.o \
@@ -46,6 +50,8 @@ OBJS += \
C_DEPS += \
./Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.d \
+./Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc.d \
+./Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc_ex.d \
./Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_can.d \
./Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.d \
./Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_dma.d \
@@ -68,6 +74,10 @@ C_DEPS += \
# Each subdirectory must supply rules for building sources it contributes
Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.o: ../Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.c Drivers/STM32F2xx_HAL_Driver/Src/subdir.mk
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F207xx -c -I../Core/Inc -I../Drivers/STM32F2xx_HAL_Driver/Inc -I../Drivers/STM32F2xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F2xx/Include -I../Drivers/CMSIS/Include -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/posix -I../Middlewares/Third_Party/LwIP/src/include/posix/sys -I../Middlewares/Third_Party/LwIP/system/arch -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc.o: ../Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc.c Drivers/STM32F2xx_HAL_Driver/Src/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F207xx -c -I../Core/Inc -I../Drivers/STM32F2xx_HAL_Driver/Inc -I../Drivers/STM32F2xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F2xx/Include -I../Drivers/CMSIS/Include -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/posix -I../Middlewares/Third_Party/LwIP/src/include/posix/sys -I../Middlewares/Third_Party/LwIP/system/arch -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
+Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc_ex.o: ../Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc_ex.c Drivers/STM32F2xx_HAL_Driver/Src/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F207xx -c -I../Core/Inc -I../Drivers/STM32F2xx_HAL_Driver/Inc -I../Drivers/STM32F2xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F2xx/Include -I../Drivers/CMSIS/Include -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/posix -I../Middlewares/Third_Party/LwIP/src/include/posix/sys -I../Middlewares/Third_Party/LwIP/system/arch -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_adc_ex.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_can.o: ../Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_can.c Drivers/STM32F2xx_HAL_Driver/Src/subdir.mk
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F207xx -c -I../Core/Inc -I../Drivers/STM32F2xx_HAL_Driver/Inc -I../Drivers/STM32F2xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F2xx/Include -I../Drivers/CMSIS/Include -I../LWIP/App -I../LWIP/Target -I../Middlewares/Third_Party/LwIP/src/include -I../Middlewares/Third_Party/LwIP/system -I../Middlewares/Third_Party/LwIP/src/include/netif/ppp -I../Middlewares/Third_Party/LwIP/src/include/lwip -I../Middlewares/Third_Party/LwIP/src/include/lwip/apps -I../Middlewares/Third_Party/LwIP/src/include/lwip/priv -I../Middlewares/Third_Party/LwIP/src/include/lwip/prot -I../Middlewares/Third_Party/LwIP/src/include/netif -I../Middlewares/Third_Party/LwIP/src/include/posix -I../Middlewares/Third_Party/LwIP/src/include/posix/sys -I../Middlewares/Third_Party/LwIP/system/arch -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_can.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.o: ../Drivers/STM32F2xx_HAL_Driver/Src/stm32f2xx_hal_cortex.c Drivers/STM32F2xx_HAL_Driver/Src/subdir.mk
diff --git a/Debug/EL_CTA_FW_nucleo144_F207.bin b/Debug/EL_CTA_FW_nucleo144_F207.bin
index eb678acf9f3146188dcc9de95cb628149d4aa771..c72dcfe2ac912c6f9ead3695ed7664a5765641d2 100644
Binary files a/Debug/EL_CTA_FW_nucleo144_F207.bin and b/Debug/EL_CTA_FW_nucleo144_F207.bin differ
diff --git a/Debug/EL_CTA_FW_nucleo144_F207.elf b/Debug/EL_CTA_FW_nucleo144_F207.elf
index 1da6c8dbec1546e679ce12e1ded9f3e92b4b3d1f..eab80b06e8a5dc76cfcac38ca92886269f617db5 100644
Binary files a/Debug/EL_CTA_FW_nucleo144_F207.elf and b/Debug/EL_CTA_FW_nucleo144_F207.elf differ
diff --git a/Debug/EL_CTA_FW_nucleo144_F207.list b/Debug/EL_CTA_FW_nucleo144_F207.list
index e1ba7db45bafa46e13a6283395a3c48a80fb751e..7357d8cfe3f1d3516fb592e82d2a12f5f8ec6658 100644
--- a/Debug/EL_CTA_FW_nucleo144_F207.list
+++ b/Debug/EL_CTA_FW_nucleo144_F207.list
@@ -5,45 +5,45 @@ Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 00000184 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 1 .text 00011514 08000184 08000184 00010184 2**2
+ 1 .text 000120f8 08000184 08000184 00010184 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .rodata 0000241c 08011698 08011698 00021698 2**2
+ 2 .rodata 0000241c 0801227c 0801227c 0002227c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 3 .ARM.extab 00000000 08013ab4 08013ab4 0003007c 2**0
+ 3 .ARM.extab 00000000 08014698 08014698 0003007c 2**0
CONTENTS
- 4 .ARM 00000008 08013ab4 08013ab4 00023ab4 2**2
+ 4 .ARM 00000008 08014698 08014698 00024698 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 5 .preinit_array 00000000 08013abc 08013abc 0003007c 2**0
+ 5 .preinit_array 00000000 080146a0 080146a0 0003007c 2**0
CONTENTS, ALLOC, LOAD, DATA
- 6 .init_array 00000004 08013abc 08013abc 00023abc 2**2
+ 6 .init_array 00000004 080146a0 080146a0 000246a0 2**2
CONTENTS, ALLOC, LOAD, DATA
- 7 .fini_array 00000004 08013ac0 08013ac0 00023ac0 2**2
+ 7 .fini_array 00000004 080146a4 080146a4 000246a4 2**2
CONTENTS, ALLOC, LOAD, DATA
- 8 .data 0000007c 20000000 08013ac4 00030000 2**2
+ 8 .data 0000007c 20000000 080146a8 00030000 2**2
CONTENTS, ALLOC, LOAD, DATA
- 9 .bss 00006bd4 2000007c 08013b40 0003007c 2**2
+ 9 .bss 00006ccc 2000007c 08014724 0003007c 2**2
ALLOC
- 10 ._user_heap_stack 00000600 20006c50 08013b40 00036c50 2**0
+ 10 ._user_heap_stack 00000600 20006d48 08014724 00036d48 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 0003007c 2**0
CONTENTS, READONLY
- 12 .debug_info 00035de6 00000000 00000000 000300a5 2**0
+ 12 .debug_info 00037262 00000000 00000000 000300a5 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 13 .debug_abbrev 00006537 00000000 00000000 00065e8b 2**0
+ 13 .debug_abbrev 000067a0 00000000 00000000 00067307 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_aranges 00001c38 00000000 00000000 0006c3c8 2**3
+ 14 .debug_aranges 00001d48 00000000 00000000 0006daa8 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_ranges 00001ad0 00000000 00000000 0006e000 2**3
+ 15 .debug_ranges 00001bd0 00000000 00000000 0006f7f0 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_macro 0002d0b0 00000000 00000000 0006fad0 2**0
+ 16 .debug_macro 0002d2b8 00000000 00000000 000713c0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_line 0002ce9d 00000000 00000000 0009cb80 2**0
+ 17 .debug_line 0002ea75 00000000 00000000 0009e678 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_str 000dfa8a 00000000 00000000 000c9a1d 2**0
+ 18 .debug_str 000e44ba 00000000 00000000 000cd0ed 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .comment 00000053 00000000 00000000 001a94a7 2**0
+ 19 .comment 00000053 00000000 00000000 001b15a7 2**0
CONTENTS, READONLY
- 20 .debug_frame 00007f0c 00000000 00000000 001a94fc 2**2
+ 20 .debug_frame 000083bc 00000000 00000000 001b15fc 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
@@ -62,7 +62,7 @@ Disassembly of section .text:
800019a: bd10 pop {r4, pc}
800019c: 2000007c .word 0x2000007c
80001a0: 00000000 .word 0x00000000
- 80001a4: 08011680 .word 0x08011680
+ 80001a4: 08012264 .word 0x08012264
080001a8 :
80001a8: b508 push {r3, lr}
@@ -74,7 +74,7 @@ Disassembly of section .text:
80001b6: bd08 pop {r3, pc}
80001b8: 00000000 .word 0x00000000
80001bc: 20000080 .word 0x20000080
- 80001c0: 08011680 .word 0x08011680
+ 80001c0: 08012264 .word 0x08012264
080001c4 <__aeabi_uldivmod>:
80001c4: b953 cbnz r3, 80001dc <__aeabi_uldivmod+0x18>
@@ -363,46288 +363,48414 @@ int main(void)
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
- 80004c0: f001 f8b8 bl 8001634
+ 80004c0: f001 fa3e bl 8001940
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
- 80004c4: f000 f820 bl 8000508
+ 80004c4: f000 f836 bl 8000534
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
- 80004c8: f000 fb38 bl 8000b3c
+ 80004c8: f000 fc44 bl 8000d54
MX_DMA_Init();
- 80004cc: f000 fb0e bl 8000aec
+ 80004cc: f000 fc1a bl 8000d04
MX_USART3_UART_Init();
- 80004d0: f000 fae2 bl 8000a98
+ 80004d0: f000 fbee bl 8000cb0
MX_TIM2_Init();
- 80004d4: f000 f988 bl 80007e8
+ 80004d4: f000 fa94 bl 8000a00
MX_LWIP_Init();
- 80004d8: f005 f90a bl 80056f0
+ 80004d8: f005 fefc bl 80062d4
MX_CAN1_Init();
- 80004dc: f000 f85c bl 8000598
+ 80004dc: f000 f968 bl 80007b0
MX_I2C1_Init();
- 80004e0: f000 f890 bl 8000604
+ 80004e0: f000 f99c bl 800081c
MX_USART2_UART_Init();
- 80004e4: f000 faae bl 8000a44
+ 80004e4: f000 fbba bl 8000c5c
MX_TIM1_Init();
- 80004e8: f000 f8ba bl 8000660
+ 80004e8: f000 f9c6 bl 8000878
MX_TIM6_Init();
- 80004ec: f000 f9c8 bl 8000880
+ 80004ec: f000 fad4 bl 8000a98
MX_TIM8_Init();
- 80004f0: f000 f9fc bl 80008ec
+ 80004f0: f000 fb08 bl 8000b04
+ MX_ADC1_Init();
+ 80004f4: f000 f866 bl 80005c4
+ MX_ADC2_Init();
+ 80004f8: f000 f8b6 bl 8000668
+ MX_ADC3_Init();
+ 80004fc: f000 f906 bl 800070c
/* USER CODE BEGIN 2 */
TimeMgt_Init();
- 80004f4: f001 f81c bl 8001530
+ 8000500: f001 f99c bl 800183c
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
TimeMgt_Start();
- 80004f8: f001 f820 bl 800153c
+ 8000504: f001 f9a0 bl 8001848
// Start 1ms interrupt
HAL_TIM_Base_Start_IT(&htim6);
- 80004fc: 4801 ldr r0, [pc, #4] ; (8000504 )
- 80004fe: f004 f885 bl 800460c
+ 8000508: 4806 ldr r0, [pc, #24] ; (8000524 )
+ 800050a: f004 fe71 bl 80051f0
+
+ // ADC DMA start
+ HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&AnalogValue_ADC1_U32A[0], 4U);
+ 800050e: 2204 movs r2, #4
+ 8000510: 4905 ldr r1, [pc, #20] ; (8000528 )
+ 8000512: 4806 ldr r0, [pc, #24] ; (800052c )
+ 8000514: f001 faea bl 8001aec
+ HAL_ADC_Start_DMA(&hadc1, (uint32_t*)&AnalogValue_ADC2_U32A[0], 4U);
+ 8000518: 2204 movs r2, #4
+ 800051a: 4905 ldr r1, [pc, #20] ; (8000530 )
+ 800051c: 4803 ldr r0, [pc, #12] ; (800052c )
+ 800051e: f001 fae5 bl 8001aec
while (1)
- 8000502: e7fe b.n 8000502
- 8000504: 200003bc .word 0x200003bc
+ 8000522: e7fe b.n 8000522
+ 8000524: 200004b4 .word 0x200004b4
+ 8000528: 20000220 .word 0x20000220
+ 800052c: 200003c4 .word 0x200003c4
+ 8000530: 200002d8 .word 0x200002d8
-08000508 :
+08000534 :
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
- 8000508: b580 push {r7, lr}
- 800050a: b092 sub sp, #72 ; 0x48
- 800050c: af00 add r7, sp, #0
+ 8000534: b580 push {r7, lr}
+ 8000536: b092 sub sp, #72 ; 0x48
+ 8000538: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 800050e: f107 0318 add.w r3, r7, #24
- 8000512: 2230 movs r2, #48 ; 0x30
- 8000514: 2100 movs r1, #0
- 8000516: 4618 mov r0, r3
- 8000518: f010 f886 bl 8010628
+ 800053a: f107 0318 add.w r3, r7, #24
+ 800053e: 2230 movs r2, #48 ; 0x30
+ 8000540: 2100 movs r1, #0
+ 8000542: 4618 mov r0, r3
+ 8000544: f010 fe62 bl 801120c
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 800051c: 1d3b adds r3, r7, #4
- 800051e: 2200 movs r2, #0
- 8000520: 601a str r2, [r3, #0]
- 8000522: 605a str r2, [r3, #4]
- 8000524: 609a str r2, [r3, #8]
- 8000526: 60da str r2, [r3, #12]
- 8000528: 611a str r2, [r3, #16]
+ 8000548: 1d3b adds r3, r7, #4
+ 800054a: 2200 movs r2, #0
+ 800054c: 601a str r2, [r3, #0]
+ 800054e: 605a str r2, [r3, #4]
+ 8000550: 609a str r2, [r3, #8]
+ 8000552: 60da str r2, [r3, #12]
+ 8000554: 611a str r2, [r3, #16]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
- 800052a: 2302 movs r3, #2
- 800052c: 61bb str r3, [r7, #24]
+ 8000556: 2302 movs r3, #2
+ 8000558: 61bb str r3, [r7, #24]
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- 800052e: 2301 movs r3, #1
- 8000530: 627b str r3, [r7, #36] ; 0x24
+ 800055a: 2301 movs r3, #1
+ 800055c: 627b str r3, [r7, #36] ; 0x24
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
- 8000532: 2310 movs r3, #16
- 8000534: 62bb str r3, [r7, #40] ; 0x28
+ 800055e: 2310 movs r3, #16
+ 8000560: 62bb str r3, [r7, #40] ; 0x28
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- 8000536: 2302 movs r3, #2
- 8000538: 633b str r3, [r7, #48] ; 0x30
+ 8000562: 2302 movs r3, #2
+ 8000564: 633b str r3, [r7, #48] ; 0x30
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
- 800053a: 2300 movs r3, #0
- 800053c: 637b str r3, [r7, #52] ; 0x34
+ 8000566: 2300 movs r3, #0
+ 8000568: 637b str r3, [r7, #52] ; 0x34
RCC_OscInitStruct.PLL.PLLM = 13;
- 800053e: 230d movs r3, #13
- 8000540: 63bb str r3, [r7, #56] ; 0x38
+ 800056a: 230d movs r3, #13
+ 800056c: 63bb str r3, [r7, #56] ; 0x38
RCC_OscInitStruct.PLL.PLLN = 195;
- 8000542: 23c3 movs r3, #195 ; 0xc3
- 8000544: 63fb str r3, [r7, #60] ; 0x3c
+ 800056e: 23c3 movs r3, #195 ; 0xc3
+ 8000570: 63fb str r3, [r7, #60] ; 0x3c
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- 8000546: 2302 movs r3, #2
- 8000548: 643b str r3, [r7, #64] ; 0x40
+ 8000572: 2302 movs r3, #2
+ 8000574: 643b str r3, [r7, #64] ; 0x40
RCC_OscInitStruct.PLL.PLLQ = 5;
- 800054a: 2305 movs r3, #5
- 800054c: 647b str r3, [r7, #68] ; 0x44
+ 8000576: 2305 movs r3, #5
+ 8000578: 647b str r3, [r7, #68] ; 0x44
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 800054e: f107 0318 add.w r3, r7, #24
- 8000552: 4618 mov r0, r3
- 8000554: f003 fb9e bl 8003c94
- 8000558: 4603 mov r3, r0
- 800055a: 2b00 cmp r3, #0
- 800055c: d001 beq.n 8000562
+ 800057a: f107 0318 add.w r3, r7, #24
+ 800057e: 4618 mov r0, r3
+ 8000580: f004 f97a bl 8004878
+ 8000584: 4603 mov r3, r0
+ 8000586: 2b00 cmp r3, #0
+ 8000588: d001 beq.n 800058e
{
Error_Handler();
- 800055e: f000 fc37 bl 8000dd0
+ 800058a: f000 fd05 bl 8000f98
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- 8000562: 230f movs r3, #15
- 8000564: 607b str r3, [r7, #4]
+ 800058e: 230f movs r3, #15
+ 8000590: 607b str r3, [r7, #4]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- 8000566: 2302 movs r3, #2
- 8000568: 60bb str r3, [r7, #8]
+ 8000592: 2302 movs r3, #2
+ 8000594: 60bb str r3, [r7, #8]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 800056a: 2300 movs r3, #0
- 800056c: 60fb str r3, [r7, #12]
+ 8000596: 2300 movs r3, #0
+ 8000598: 60fb str r3, [r7, #12]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
- 800056e: f44f 53a0 mov.w r3, #5120 ; 0x1400
- 8000572: 613b str r3, [r7, #16]
+ 800059a: f44f 53a0 mov.w r3, #5120 ; 0x1400
+ 800059e: 613b str r3, [r7, #16]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
- 8000574: f44f 5380 mov.w r3, #4096 ; 0x1000
- 8000578: 617b str r3, [r7, #20]
+ 80005a0: f44f 5380 mov.w r3, #4096 ; 0x1000
+ 80005a4: 617b str r3, [r7, #20]
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
- 800057a: 1d3b adds r3, r7, #4
- 800057c: 2103 movs r1, #3
- 800057e: 4618 mov r0, r3
- 8000580: f003 fdd8 bl 8004134
- 8000584: 4603 mov r3, r0
- 8000586: 2b00 cmp r3, #0
- 8000588: d001 beq.n 800058e
+ 80005a6: 1d3b adds r3, r7, #4
+ 80005a8: 2103 movs r1, #3
+ 80005aa: 4618 mov r0, r3
+ 80005ac: f004 fbb4 bl 8004d18
+ 80005b0: 4603 mov r3, r0
+ 80005b2: 2b00 cmp r3, #0
+ 80005b4: d001 beq.n 80005ba
{
Error_Handler();
- 800058a: f000 fc21 bl 8000dd0
+ 80005b6: f000 fcef bl 8000f98
}
}
- 800058e: bf00 nop
- 8000590: 3748 adds r7, #72 ; 0x48
- 8000592: 46bd mov sp, r7
- 8000594: bd80 pop {r7, pc}
+ 80005ba: bf00 nop
+ 80005bc: 3748 adds r7, #72 ; 0x48
+ 80005be: 46bd mov sp, r7
+ 80005c0: bd80 pop {r7, pc}
...
-08000598 :
+080005c4 :
+ * @brief ADC1 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_ADC1_Init(void)
+{
+ 80005c4: b580 push {r7, lr}
+ 80005c6: b084 sub sp, #16
+ 80005c8: af00 add r7, sp, #0
+
+ /* USER CODE BEGIN ADC1_Init 0 */
+
+ /* USER CODE END ADC1_Init 0 */
+
+ ADC_ChannelConfTypeDef sConfig = {0};
+ 80005ca: 463b mov r3, r7
+ 80005cc: 2200 movs r2, #0
+ 80005ce: 601a str r2, [r3, #0]
+ 80005d0: 605a str r2, [r3, #4]
+ 80005d2: 609a str r2, [r3, #8]
+ 80005d4: 60da str r2, [r3, #12]
+ /* USER CODE BEGIN ADC1_Init 1 */
+
+ /* USER CODE END ADC1_Init 1 */
+ /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
+ */
+ hadc1.Instance = ADC1;
+ 80005d6: 4b21 ldr r3, [pc, #132] ; (800065c )
+ 80005d8: 4a21 ldr r2, [pc, #132] ; (8000660 )
+ 80005da: 601a str r2, [r3, #0]
+ hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
+ 80005dc: 4b1f ldr r3, [pc, #124] ; (800065c )
+ 80005de: 2200 movs r2, #0
+ 80005e0: 605a str r2, [r3, #4]
+ hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+ 80005e2: 4b1e ldr r3, [pc, #120] ; (800065c )
+ 80005e4: 2200 movs r2, #0
+ 80005e6: 609a str r2, [r3, #8]
+ hadc1.Init.ScanConvMode = DISABLE;
+ 80005e8: 4b1c ldr r3, [pc, #112] ; (800065c )
+ 80005ea: 2200 movs r2, #0
+ 80005ec: 611a str r2, [r3, #16]
+ hadc1.Init.ContinuousConvMode = DISABLE;
+ 80005ee: 4b1b ldr r3, [pc, #108] ; (800065c )
+ 80005f0: 2200 movs r2, #0
+ 80005f2: 761a strb r2, [r3, #24]
+ hadc1.Init.DiscontinuousConvMode = DISABLE;
+ 80005f4: 4b19 ldr r3, [pc, #100] ; (800065c )
+ 80005f6: 2200 movs r2, #0
+ 80005f8: f883 2020 strb.w r2, [r3, #32]
+ hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 80005fc: 4b17 ldr r3, [pc, #92] ; (800065c )
+ 80005fe: 2200 movs r2, #0
+ 8000600: 62da str r2, [r3, #44] ; 0x2c
+ hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 8000602: 4b16 ldr r3, [pc, #88] ; (800065c )
+ 8000604: 4a17 ldr r2, [pc, #92] ; (8000664 )
+ 8000606: 629a str r2, [r3, #40] ; 0x28
+ hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 8000608: 4b14 ldr r3, [pc, #80] ; (800065c )
+ 800060a: 2200 movs r2, #0
+ 800060c: 60da str r2, [r3, #12]
+ hadc1.Init.NbrOfConversion = 1;
+ 800060e: 4b13 ldr r3, [pc, #76] ; (800065c )
+ 8000610: 2201 movs r2, #1
+ 8000612: 61da str r2, [r3, #28]
+ hadc1.Init.DMAContinuousRequests = DISABLE;
+ 8000614: 4b11 ldr r3, [pc, #68] ; (800065c )
+ 8000616: 2200 movs r2, #0
+ 8000618: f883 2030 strb.w r2, [r3, #48] ; 0x30
+ hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 800061c: 4b0f ldr r3, [pc, #60] ; (800065c )
+ 800061e: 2201 movs r2, #1
+ 8000620: 615a str r2, [r3, #20]
+ if (HAL_ADC_Init(&hadc1) != HAL_OK)
+ 8000622: 480e ldr r0, [pc, #56] ; (800065c )
+ 8000624: f001 fa1e bl 8001a64
+ 8000628: 4603 mov r3, r0
+ 800062a: 2b00 cmp r3, #0
+ 800062c: d001 beq.n 8000632
+ {
+ Error_Handler();
+ 800062e: f000 fcb3 bl 8000f98
+ }
+ /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
+ */
+ sConfig.Channel = ADC_CHANNEL_3;
+ 8000632: 2303 movs r3, #3
+ 8000634: 603b str r3, [r7, #0]
+ sConfig.Rank = 1;
+ 8000636: 2301 movs r3, #1
+ 8000638: 607b str r3, [r7, #4]
+ sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+ 800063a: 2300 movs r3, #0
+ 800063c: 60bb str r3, [r7, #8]
+ if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 800063e: 463b mov r3, r7
+ 8000640: 4619 mov r1, r3
+ 8000642: 4806 ldr r0, [pc, #24] ; (800065c )
+ 8000644: f001 fb4c bl 8001ce0
+ 8000648: 4603 mov r3, r0
+ 800064a: 2b00 cmp r3, #0
+ 800064c: d001 beq.n 8000652
+ {
+ Error_Handler();
+ 800064e: f000 fca3 bl 8000f98
+ }
+ /* USER CODE BEGIN ADC1_Init 2 */
+
+ /* USER CODE END ADC1_Init 2 */
+
+}
+ 8000652: bf00 nop
+ 8000654: 3710 adds r7, #16
+ 8000656: 46bd mov sp, r7
+ 8000658: bd80 pop {r7, pc}
+ 800065a: bf00 nop
+ 800065c: 200003c4 .word 0x200003c4
+ 8000660: 40012000 .word 0x40012000
+ 8000664: 0f000001 .word 0x0f000001
+
+08000668 :
+ * @brief ADC2 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_ADC2_Init(void)
+{
+ 8000668: b580 push {r7, lr}
+ 800066a: b084 sub sp, #16
+ 800066c: af00 add r7, sp, #0
+
+ /* USER CODE BEGIN ADC2_Init 0 */
+
+ /* USER CODE END ADC2_Init 0 */
+
+ ADC_ChannelConfTypeDef sConfig = {0};
+ 800066e: 463b mov r3, r7
+ 8000670: 2200 movs r2, #0
+ 8000672: 601a str r2, [r3, #0]
+ 8000674: 605a str r2, [r3, #4]
+ 8000676: 609a str r2, [r3, #8]
+ 8000678: 60da str r2, [r3, #12]
+ /* USER CODE BEGIN ADC2_Init 1 */
+
+ /* USER CODE END ADC2_Init 1 */
+ /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
+ */
+ hadc2.Instance = ADC2;
+ 800067a: 4b21 ldr r3, [pc, #132] ; (8000700 )
+ 800067c: 4a21 ldr r2, [pc, #132] ; (8000704 )
+ 800067e: 601a str r2, [r3, #0]
+ hadc2.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
+ 8000680: 4b1f ldr r3, [pc, #124] ; (8000700 )
+ 8000682: 2200 movs r2, #0
+ 8000684: 605a str r2, [r3, #4]
+ hadc2.Init.Resolution = ADC_RESOLUTION_12B;
+ 8000686: 4b1e ldr r3, [pc, #120] ; (8000700 )
+ 8000688: 2200 movs r2, #0
+ 800068a: 609a str r2, [r3, #8]
+ hadc2.Init.ScanConvMode = DISABLE;
+ 800068c: 4b1c ldr r3, [pc, #112] ; (8000700 )
+ 800068e: 2200 movs r2, #0
+ 8000690: 611a str r2, [r3, #16]
+ hadc2.Init.ContinuousConvMode = DISABLE;
+ 8000692: 4b1b ldr r3, [pc, #108] ; (8000700 )
+ 8000694: 2200 movs r2, #0
+ 8000696: 761a strb r2, [r3, #24]
+ hadc2.Init.DiscontinuousConvMode = DISABLE;
+ 8000698: 4b19 ldr r3, [pc, #100] ; (8000700 )
+ 800069a: 2200 movs r2, #0
+ 800069c: f883 2020 strb.w r2, [r3, #32]
+ hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 80006a0: 4b17 ldr r3, [pc, #92] ; (8000700 )
+ 80006a2: 2200 movs r2, #0
+ 80006a4: 62da str r2, [r3, #44] ; 0x2c
+ hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 80006a6: 4b16 ldr r3, [pc, #88] ; (8000700 )
+ 80006a8: 4a17 ldr r2, [pc, #92] ; (8000708 )
+ 80006aa: 629a str r2, [r3, #40] ; 0x28
+ hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 80006ac: 4b14 ldr r3, [pc, #80] ; (8000700 )
+ 80006ae: 2200 movs r2, #0
+ 80006b0: 60da str r2, [r3, #12]
+ hadc2.Init.NbrOfConversion = 1;
+ 80006b2: 4b13 ldr r3, [pc, #76] ; (8000700 )
+ 80006b4: 2201 movs r2, #1
+ 80006b6: 61da str r2, [r3, #28]
+ hadc2.Init.DMAContinuousRequests = DISABLE;
+ 80006b8: 4b11 ldr r3, [pc, #68] ; (8000700 )
+ 80006ba: 2200 movs r2, #0
+ 80006bc: f883 2030 strb.w r2, [r3, #48] ; 0x30
+ hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 80006c0: 4b0f ldr r3, [pc, #60] ; (8000700 )
+ 80006c2: 2201 movs r2, #1
+ 80006c4: 615a str r2, [r3, #20]
+ if (HAL_ADC_Init(&hadc2) != HAL_OK)
+ 80006c6: 480e ldr r0, [pc, #56] ; (8000700 )
+ 80006c8: f001 f9cc bl 8001a64
+ 80006cc: 4603 mov r3, r0
+ 80006ce: 2b00 cmp r3, #0
+ 80006d0: d001 beq.n 80006d6
+ {
+ Error_Handler();
+ 80006d2: f000 fc61 bl 8000f98
+ }
+ /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
+ */
+ sConfig.Channel = ADC_CHANNEL_9;
+ 80006d6: 2309 movs r3, #9
+ 80006d8: 603b str r3, [r7, #0]
+ sConfig.Rank = 1;
+ 80006da: 2301 movs r3, #1
+ 80006dc: 607b str r3, [r7, #4]
+ sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+ 80006de: 2300 movs r3, #0
+ 80006e0: 60bb str r3, [r7, #8]
+ if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
+ 80006e2: 463b mov r3, r7
+ 80006e4: 4619 mov r1, r3
+ 80006e6: 4806 ldr r0, [pc, #24] ; (8000700 )
+ 80006e8: f001 fafa bl 8001ce0
+ 80006ec: 4603 mov r3, r0
+ 80006ee: 2b00 cmp r3, #0
+ 80006f0: d001 beq.n 80006f6
+ {
+ Error_Handler();
+ 80006f2: f000 fc51 bl 8000f98
+ }
+ /* USER CODE BEGIN ADC2_Init 2 */
+
+ /* USER CODE END ADC2_Init 2 */
+
+}
+ 80006f6: bf00 nop
+ 80006f8: 3710 adds r7, #16
+ 80006fa: 46bd mov sp, r7
+ 80006fc: bd80 pop {r7, pc}
+ 80006fe: bf00 nop
+ 8000700: 20000328 .word 0x20000328
+ 8000704: 40012100 .word 0x40012100
+ 8000708: 0f000001 .word 0x0f000001
+
+0800070c :
+ * @brief ADC3 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_ADC3_Init(void)
+{
+ 800070c: b580 push {r7, lr}
+ 800070e: b084 sub sp, #16
+ 8000710: af00 add r7, sp, #0
+
+ /* USER CODE BEGIN ADC3_Init 0 */
+
+ /* USER CODE END ADC3_Init 0 */
+
+ ADC_ChannelConfTypeDef sConfig = {0};
+ 8000712: 463b mov r3, r7
+ 8000714: 2200 movs r2, #0
+ 8000716: 601a str r2, [r3, #0]
+ 8000718: 605a str r2, [r3, #4]
+ 800071a: 609a str r2, [r3, #8]
+ 800071c: 60da str r2, [r3, #12]
+ /* USER CODE BEGIN ADC3_Init 1 */
+
+ /* USER CODE END ADC3_Init 1 */
+ /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
+ */
+ hadc3.Instance = ADC3;
+ 800071e: 4b21 ldr r3, [pc, #132] ; (80007a4 )
+ 8000720: 4a21 ldr r2, [pc, #132] ; (80007a8 )
+ 8000722: 601a str r2, [r3, #0]
+ hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
+ 8000724: 4b1f ldr r3, [pc, #124] ; (80007a4 )
+ 8000726: 2200 movs r2, #0
+ 8000728: 605a str r2, [r3, #4]
+ hadc3.Init.Resolution = ADC_RESOLUTION_12B;
+ 800072a: 4b1e ldr r3, [pc, #120] ; (80007a4 )
+ 800072c: 2200 movs r2, #0
+ 800072e: 609a str r2, [r3, #8]
+ hadc3.Init.ScanConvMode = DISABLE;
+ 8000730: 4b1c ldr r3, [pc, #112] ; (80007a4 )
+ 8000732: 2200 movs r2, #0
+ 8000734: 611a str r2, [r3, #16]
+ hadc3.Init.ContinuousConvMode = DISABLE;
+ 8000736: 4b1b ldr r3, [pc, #108] ; (80007a4 )
+ 8000738: 2200 movs r2, #0
+ 800073a: 761a strb r2, [r3, #24]
+ hadc3.Init.DiscontinuousConvMode = DISABLE;
+ 800073c: 4b19 ldr r3, [pc, #100] ; (80007a4 )
+ 800073e: 2200 movs r2, #0
+ 8000740: f883 2020 strb.w r2, [r3, #32]
+ hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 8000744: 4b17 ldr r3, [pc, #92] ; (80007a4 )
+ 8000746: 2200 movs r2, #0
+ 8000748: 62da str r2, [r3, #44] ; 0x2c
+ hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 800074a: 4b16 ldr r3, [pc, #88] ; (80007a4 )
+ 800074c: 4a17 ldr r2, [pc, #92] ; (80007ac )
+ 800074e: 629a str r2, [r3, #40] ; 0x28
+ hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 8000750: 4b14 ldr r3, [pc, #80] ; (80007a4 )
+ 8000752: 2200 movs r2, #0
+ 8000754: 60da str r2, [r3, #12]
+ hadc3.Init.NbrOfConversion = 1;
+ 8000756: 4b13 ldr r3, [pc, #76] ; (80007a4 )
+ 8000758: 2201 movs r2, #1
+ 800075a: 61da str r2, [r3, #28]
+ hadc3.Init.DMAContinuousRequests = DISABLE;
+ 800075c: 4b11 ldr r3, [pc, #68] ; (80007a4 )
+ 800075e: 2200 movs r2, #0
+ 8000760: f883 2030 strb.w r2, [r3, #48] ; 0x30
+ hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 8000764: 4b0f ldr r3, [pc, #60] ; (80007a4 )
+ 8000766: 2201 movs r2, #1
+ 8000768: 615a str r2, [r3, #20]
+ if (HAL_ADC_Init(&hadc3) != HAL_OK)
+ 800076a: 480e ldr r0, [pc, #56] ; (80007a4 )
+ 800076c: f001 f97a bl 8001a64
+ 8000770: 4603 mov r3, r0
+ 8000772: 2b00 cmp r3, #0
+ 8000774: d001 beq.n 800077a
+ {
+ Error_Handler();
+ 8000776: f000 fc0f bl 8000f98
+ }
+ /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
+ */
+ sConfig.Channel = ADC_CHANNEL_0;
+ 800077a: 2300 movs r3, #0
+ 800077c: 603b str r3, [r7, #0]
+ sConfig.Rank = 1;
+ 800077e: 2301 movs r3, #1
+ 8000780: 607b str r3, [r7, #4]
+ sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+ 8000782: 2300 movs r3, #0
+ 8000784: 60bb str r3, [r7, #8]
+ if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+ 8000786: 463b mov r3, r7
+ 8000788: 4619 mov r1, r3
+ 800078a: 4806 ldr r0, [pc, #24] ; (80007a4 )
+ 800078c: f001 faa8 bl 8001ce0
+ 8000790: 4603 mov r3, r0
+ 8000792: 2b00 cmp r3, #0
+ 8000794: d001 beq.n 800079a
+ {
+ Error_Handler();
+ 8000796: f000 fbff bl 8000f98
+ }
+ /* USER CODE BEGIN ADC3_Init 2 */
+
+ /* USER CODE END ADC3_Init 2 */
+
+}
+ 800079a: bf00 nop
+ 800079c: 3710 adds r7, #16
+ 800079e: 46bd mov sp, r7
+ 80007a0: bd80 pop {r7, pc}
+ 80007a2: bf00 nop
+ 80007a4: 2000040c .word 0x2000040c
+ 80007a8: 40012200 .word 0x40012200
+ 80007ac: 0f000001 .word 0x0f000001
+
+080007b0 :
* @brief CAN1 Initialization Function
* @param None
* @retval None
*/
static void MX_CAN1_Init(void)
{
- 8000598: b580 push {r7, lr}
- 800059a: af00 add r7, sp, #0
+ 80007b0: b580 push {r7, lr}
+ 80007b2: af00 add r7, sp, #0
/* USER CODE END CAN1_Init 0 */
/* USER CODE BEGIN CAN1_Init 1 */
/* USER CODE END CAN1_Init 1 */
hcan1.Instance = CAN1;
- 800059c: 4b17 ldr r3, [pc, #92] ; (80005fc )
- 800059e: 4a18 ldr r2, [pc, #96] ; (8000600 )
- 80005a0: 601a str r2, [r3, #0]
+ 80007b4: 4b17 ldr r3, [pc, #92] ; (8000814 )
+ 80007b6: 4a18 ldr r2, [pc, #96] ; (8000818 )
+ 80007b8: 601a str r2, [r3, #0]
hcan1.Init.Prescaler = 10;
- 80005a2: 4b16 ldr r3, [pc, #88] ; (80005fc )
- 80005a4: 220a movs r2, #10
- 80005a6: 605a str r2, [r3, #4]
+ 80007ba: 4b16 ldr r3, [pc, #88] ; (8000814 )
+ 80007bc: 220a movs r2, #10
+ 80007be: 605a str r2, [r3, #4]
hcan1.Init.Mode = CAN_MODE_NORMAL;
- 80005a8: 4b14 ldr r3, [pc, #80] ; (80005fc )
- 80005aa: 2200 movs r2, #0
- 80005ac: 609a str r2, [r3, #8]
+ 80007c0: 4b14 ldr r3, [pc, #80] ; (8000814 )
+ 80007c2: 2200 movs r2, #0
+ 80007c4: 609a str r2, [r3, #8]
hcan1.Init.SyncJumpWidth = CAN_SJW_1TQ;
- 80005ae: 4b13 ldr r3, [pc, #76] ; (80005fc )
- 80005b0: 2200 movs r2, #0
- 80005b2: 60da str r2, [r3, #12]
+ 80007c6: 4b13 ldr r3, [pc, #76] ; (8000814 )
+ 80007c8: 2200 movs r2, #0
+ 80007ca: 60da str r2, [r3, #12]
hcan1.Init.TimeSeg1 = CAN_BS1_3TQ;
- 80005b4: 4b11 ldr r3, [pc, #68] ; (80005fc )
- 80005b6: f44f 3200 mov.w r2, #131072 ; 0x20000
- 80005ba: 611a str r2, [r3, #16]
+ 80007cc: 4b11 ldr r3, [pc, #68] ; (8000814 )
+ 80007ce: f44f 3200 mov.w r2, #131072 ; 0x20000
+ 80007d2: 611a str r2, [r3, #16]
hcan1.Init.TimeSeg2 = CAN_BS2_2TQ;
- 80005bc: 4b0f ldr r3, [pc, #60] ; (80005fc )
- 80005be: f44f 1280 mov.w r2, #1048576 ; 0x100000
- 80005c2: 615a str r2, [r3, #20]
+ 80007d4: 4b0f ldr r3, [pc, #60] ; (8000814 )
+ 80007d6: f44f 1280 mov.w r2, #1048576 ; 0x100000
+ 80007da: 615a str r2, [r3, #20]
hcan1.Init.TimeTriggeredMode = DISABLE;
- 80005c4: 4b0d ldr r3, [pc, #52] ; (80005fc )
- 80005c6: 2200 movs r2, #0
- 80005c8: 761a strb r2, [r3, #24]
+ 80007dc: 4b0d ldr r3, [pc, #52] ; (8000814 )
+ 80007de: 2200 movs r2, #0
+ 80007e0: 761a strb r2, [r3, #24]
hcan1.Init.AutoBusOff = DISABLE;
- 80005ca: 4b0c ldr r3, [pc, #48] ; (80005fc )
- 80005cc: 2200 movs r2, #0
- 80005ce: 765a strb r2, [r3, #25]
+ 80007e2: 4b0c ldr r3, [pc, #48] ; (8000814 )
+ 80007e4: 2200 movs r2, #0
+ 80007e6: 765a strb r2, [r3, #25]
hcan1.Init.AutoWakeUp = DISABLE;
- 80005d0: 4b0a ldr r3, [pc, #40] ; (80005fc )
- 80005d2: 2200 movs r2, #0
- 80005d4: 769a strb r2, [r3, #26]
+ 80007e8: 4b0a ldr r3, [pc, #40] ; (8000814 )
+ 80007ea: 2200 movs r2, #0
+ 80007ec: 769a strb r2, [r3, #26]
hcan1.Init.AutoRetransmission = DISABLE;
- 80005d6: 4b09 ldr r3, [pc, #36] ; (80005fc )
- 80005d8: 2200 movs r2, #0
- 80005da: 76da strb r2, [r3, #27]
+ 80007ee: 4b09 ldr r3, [pc, #36] ; (8000814 )
+ 80007f0: 2200 movs r2, #0
+ 80007f2: 76da strb r2, [r3, #27]
hcan1.Init.ReceiveFifoLocked = DISABLE;
- 80005dc: 4b07 ldr r3, [pc, #28] ; (80005fc )
- 80005de: 2200 movs r2, #0
- 80005e0: 771a strb r2, [r3, #28]
+ 80007f4: 4b07 ldr r3, [pc, #28] ; (8000814 )
+ 80007f6: 2200 movs r2, #0
+ 80007f8: 771a strb r2, [r3, #28]
hcan1.Init.TransmitFifoPriority = DISABLE;
- 80005e2: 4b06 ldr r3, [pc, #24] ; (80005fc )
- 80005e4: 2200 movs r2, #0
- 80005e6: 775a strb r2, [r3, #29]
+ 80007fa: 4b06 ldr r3, [pc, #24] ; (8000814 )
+ 80007fc: 2200 movs r2, #0
+ 80007fe: 775a strb r2, [r3, #29]
if (HAL_CAN_Init(&hcan1) != HAL_OK)
- 80005e8: 4804 ldr r0, [pc, #16] ; (80005fc )
- 80005ea: f001 f8b5 bl 8001758
- 80005ee: 4603 mov r3, r0
- 80005f0: 2b00 cmp r3, #0
- 80005f2: d001 beq.n 80005f8
+ 8000800: 4804 ldr r0, [pc, #16] ; (8000814 )
+ 8000802: f001 fd15 bl 8002230
+ 8000806: 4603 mov r3, r0
+ 8000808: 2b00 cmp r3, #0
+ 800080a: d001 beq.n 8000810
{
Error_Handler();
- 80005f4: f000 fbec bl 8000dd0
+ 800080c: f000 fbc4 bl 8000f98
}
/* USER CODE BEGIN CAN1_Init 2 */
/* USER CODE END CAN1_Init 2 */
}
- 80005f8: bf00 nop
- 80005fa: bd80 pop {r7, pc}
- 80005fc: 200004d4 .word 0x200004d4
- 8000600: 40006400 .word 0x40006400
+ 8000810: bf00 nop
+ 8000812: bd80 pop {r7, pc}
+ 8000814: 200005cc .word 0x200005cc
+ 8000818: 40006400 .word 0x40006400
-08000604 :
+0800081c :
* @brief I2C1 Initialization Function
* @param None
* @retval None
*/
static void MX_I2C1_Init(void)
{
- 8000604: b580 push {r7, lr}
- 8000606: af00 add r7, sp, #0
+ 800081c: b580 push {r7, lr}
+ 800081e: af00 add r7, sp, #0
/* USER CODE END I2C1_Init 0 */
/* USER CODE BEGIN I2C1_Init 1 */
/* USER CODE END I2C1_Init 1 */
hi2c1.Instance = I2C1;
- 8000608: 4b12 ldr r3, [pc, #72] ; (8000654 )
- 800060a: 4a13 ldr r2, [pc, #76] ; (8000658 )
- 800060c: 601a str r2, [r3, #0]
+ 8000820: 4b12 ldr r3, [pc, #72] ; (800086c )
+ 8000822: 4a13 ldr r2, [pc, #76] ; (8000870 )
+ 8000824: 601a str r2, [r3, #0]
hi2c1.Init.ClockSpeed = 100000;
- 800060e: 4b11 ldr r3, [pc, #68] ; (8000654 )
- 8000610: 4a12 ldr r2, [pc, #72] ; (800065c )
- 8000612: 605a str r2, [r3, #4]
+ 8000826: 4b11 ldr r3, [pc, #68] ; (800086c )
+ 8000828: 4a12 ldr r2, [pc, #72] ; (8000874 )
+ 800082a: 605a str r2, [r3, #4]
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
- 8000614: 4b0f ldr r3, [pc, #60] ; (8000654 )
- 8000616: 2200 movs r2, #0
- 8000618: 609a str r2, [r3, #8]
+ 800082c: 4b0f ldr r3, [pc, #60] ; (800086c )
+ 800082e: 2200 movs r2, #0
+ 8000830: 609a str r2, [r3, #8]
hi2c1.Init.OwnAddress1 = 0;
- 800061a: 4b0e ldr r3, [pc, #56] ; (8000654 )
- 800061c: 2200 movs r2, #0
- 800061e: 60da str r2, [r3, #12]
+ 8000832: 4b0e ldr r3, [pc, #56] ; (800086c )
+ 8000834: 2200 movs r2, #0
+ 8000836: 60da str r2, [r3, #12]
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
- 8000620: 4b0c ldr r3, [pc, #48] ; (8000654 )
- 8000622: f44f 4280 mov.w r2, #16384 ; 0x4000
- 8000626: 611a str r2, [r3, #16]
+ 8000838: 4b0c ldr r3, [pc, #48] ; (800086c )
+ 800083a: f44f 4280 mov.w r2, #16384 ; 0x4000
+ 800083e: 611a str r2, [r3, #16]
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
- 8000628: 4b0a ldr r3, [pc, #40] ; (8000654 )
- 800062a: 2200 movs r2, #0
- 800062c: 615a str r2, [r3, #20]
+ 8000840: 4b0a ldr r3, [pc, #40] ; (800086c )
+ 8000842: 2200 movs r2, #0
+ 8000844: 615a str r2, [r3, #20]
hi2c1.Init.OwnAddress2 = 0;
- 800062e: 4b09 ldr r3, [pc, #36] ; (8000654 )
- 8000630: 2200 movs r2, #0
- 8000632: 619a str r2, [r3, #24]
+ 8000846: 4b09 ldr r3, [pc, #36] ; (800086c )
+ 8000848: 2200 movs r2, #0
+ 800084a: 619a str r2, [r3, #24]
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
- 8000634: 4b07 ldr r3, [pc, #28] ; (8000654 )
- 8000636: 2200 movs r2, #0
- 8000638: 61da str r2, [r3, #28]
+ 800084c: 4b07 ldr r3, [pc, #28] ; (800086c )
+ 800084e: 2200 movs r2, #0
+ 8000850: 61da str r2, [r3, #28]
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
- 800063a: 4b06 ldr r3, [pc, #24] ; (8000654 )
- 800063c: 2200 movs r2, #0
- 800063e: 621a str r2, [r3, #32]
+ 8000852: 4b06 ldr r3, [pc, #24] ; (800086c )
+ 8000854: 2200 movs r2, #0
+ 8000856: 621a str r2, [r3, #32]
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
- 8000640: 4804 ldr r0, [pc, #16] ; (8000654 )
- 8000642: f003 f9e3 bl 8003a0c
- 8000646: 4603 mov r3, r0
- 8000648: 2b00 cmp r3, #0
- 800064a: d001 beq.n 8000650
+ 8000858: 4804 ldr r0, [pc, #16] ; (800086c )
+ 800085a: f003 fec9 bl 80045f0
+ 800085e: 4603 mov r3, r0
+ 8000860: 2b00 cmp r3, #0
+ 8000862: d001 beq.n 8000868
{
Error_Handler();
- 800064c: f000 fbc0 bl 8000dd0
+ 8000864: f000 fb98 bl 8000f98
}
/* USER CODE BEGIN I2C1_Init 2 */
/* USER CODE END I2C1_Init 2 */
}
- 8000650: bf00 nop
- 8000652: bd80 pop {r7, pc}
- 8000654: 20000308 .word 0x20000308
- 8000658: 40005400 .word 0x40005400
- 800065c: 000186a0 .word 0x000186a0
+ 8000868: bf00 nop
+ 800086a: bd80 pop {r7, pc}
+ 800086c: 20000370 .word 0x20000370
+ 8000870: 40005400 .word 0x40005400
+ 8000874: 000186a0 .word 0x000186a0
-08000660 :
+08000878 :
* @brief TIM1 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM1_Init(void)
{
- 8000660: b580 push {r7, lr}
- 8000662: b096 sub sp, #88 ; 0x58
- 8000664: af00 add r7, sp, #0
+ 8000878: b580 push {r7, lr}
+ 800087a: b096 sub sp, #88 ; 0x58
+ 800087c: af00 add r7, sp, #0
/* USER CODE BEGIN TIM1_Init 0 */
/* USER CODE END TIM1_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- 8000666: f107 0348 add.w r3, r7, #72 ; 0x48
- 800066a: 2200 movs r2, #0
- 800066c: 601a str r2, [r3, #0]
- 800066e: 605a str r2, [r3, #4]
- 8000670: 609a str r2, [r3, #8]
- 8000672: 60da str r2, [r3, #12]
+ 800087e: f107 0348 add.w r3, r7, #72 ; 0x48
+ 8000882: 2200 movs r2, #0
+ 8000884: 601a str r2, [r3, #0]
+ 8000886: 605a str r2, [r3, #4]
+ 8000888: 609a str r2, [r3, #8]
+ 800088a: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
- 8000674: f107 0340 add.w r3, r7, #64 ; 0x40
- 8000678: 2200 movs r2, #0
- 800067a: 601a str r2, [r3, #0]
- 800067c: 605a str r2, [r3, #4]
+ 800088c: f107 0340 add.w r3, r7, #64 ; 0x40
+ 8000890: 2200 movs r2, #0
+ 8000892: 601a str r2, [r3, #0]
+ 8000894: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
- 800067e: f107 0324 add.w r3, r7, #36 ; 0x24
- 8000682: 2200 movs r2, #0
- 8000684: 601a str r2, [r3, #0]
- 8000686: 605a str r2, [r3, #4]
- 8000688: 609a str r2, [r3, #8]
- 800068a: 60da str r2, [r3, #12]
- 800068c: 611a str r2, [r3, #16]
- 800068e: 615a str r2, [r3, #20]
- 8000690: 619a str r2, [r3, #24]
+ 8000896: f107 0324 add.w r3, r7, #36 ; 0x24
+ 800089a: 2200 movs r2, #0
+ 800089c: 601a str r2, [r3, #0]
+ 800089e: 605a str r2, [r3, #4]
+ 80008a0: 609a str r2, [r3, #8]
+ 80008a2: 60da str r2, [r3, #12]
+ 80008a4: 611a str r2, [r3, #16]
+ 80008a6: 615a str r2, [r3, #20]
+ 80008a8: 619a str r2, [r3, #24]
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
- 8000692: 1d3b adds r3, r7, #4
- 8000694: 2220 movs r2, #32
- 8000696: 2100 movs r1, #0
- 8000698: 4618 mov r0, r3
- 800069a: f00f ffc5 bl 8010628
+ 80008aa: 1d3b adds r3, r7, #4
+ 80008ac: 2220 movs r2, #32
+ 80008ae: 2100 movs r1, #0
+ 80008b0: 4618 mov r0, r3
+ 80008b2: f010 fcab bl 801120c
/* USER CODE BEGIN TIM1_Init 1 */
/* USER CODE END TIM1_Init 1 */
htim1.Instance = TIM1;
- 800069e: 4b50 ldr r3, [pc, #320] ; (80007e0 )
- 80006a0: 4a50 ldr r2, [pc, #320] ; (80007e4 )
- 80006a2: 601a str r2, [r3, #0]
+ 80008b6: 4b50 ldr r3, [pc, #320] ; (80009f8 )
+ 80008b8: 4a50 ldr r2, [pc, #320] ; (80009fc )
+ 80008ba: 601a str r2, [r3, #0]
htim1.Init.Prescaler = 0;
- 80006a4: 4b4e ldr r3, [pc, #312] ; (80007e0 )
- 80006a6: 2200 movs r2, #0
- 80006a8: 605a str r2, [r3, #4]
+ 80008bc: 4b4e ldr r3, [pc, #312] ; (80009f8 )
+ 80008be: 2200 movs r2, #0
+ 80008c0: 605a str r2, [r3, #4]
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
- 80006aa: 4b4d ldr r3, [pc, #308] ; (80007e0 )
- 80006ac: 2200 movs r2, #0
- 80006ae: 609a str r2, [r3, #8]
+ 80008c2: 4b4d ldr r3, [pc, #308] ; (80009f8 )
+ 80008c4: 2200 movs r2, #0
+ 80008c6: 609a str r2, [r3, #8]
htim1.Init.Period = 1000;
- 80006b0: 4b4b ldr r3, [pc, #300] ; (80007e0 )
- 80006b2: f44f 727a mov.w r2, #1000 ; 0x3e8
- 80006b6: 60da str r2, [r3, #12]
+ 80008c8: 4b4b ldr r3, [pc, #300] ; (80009f8 )
+ 80008ca: f44f 727a mov.w r2, #1000 ; 0x3e8
+ 80008ce: 60da str r2, [r3, #12]
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 80006b8: 4b49 ldr r3, [pc, #292] ; (80007e0 )
- 80006ba: 2200 movs r2, #0
- 80006bc: 611a str r2, [r3, #16]
+ 80008d0: 4b49 ldr r3, [pc, #292] ; (80009f8 )
+ 80008d2: 2200 movs r2, #0
+ 80008d4: 611a str r2, [r3, #16]
htim1.Init.RepetitionCounter = 0;
- 80006be: 4b48 ldr r3, [pc, #288] ; (80007e0 )
- 80006c0: 2200 movs r2, #0
- 80006c2: 615a str r2, [r3, #20]
+ 80008d6: 4b48 ldr r3, [pc, #288] ; (80009f8 )
+ 80008d8: 2200 movs r2, #0
+ 80008da: 615a str r2, [r3, #20]
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
- 80006c4: 4b46 ldr r3, [pc, #280] ; (80007e0 )
- 80006c6: 2280 movs r2, #128 ; 0x80
- 80006c8: 619a str r2, [r3, #24]
+ 80008dc: 4b46 ldr r3, [pc, #280] ; (80009f8 )
+ 80008de: 2280 movs r2, #128 ; 0x80
+ 80008e0: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
- 80006ca: 4845 ldr r0, [pc, #276] ; (80007e0 )
- 80006cc: f003 ff4e bl 800456c
- 80006d0: 4603 mov r3, r0
- 80006d2: 2b00 cmp r3, #0
- 80006d4: d001 beq.n 80006da
+ 80008e2: 4845 ldr r0, [pc, #276] ; (80009f8 )
+ 80008e4: f004 fc34 bl 8005150
+ 80008e8: 4603 mov r3, r0
+ 80008ea: 2b00 cmp r3, #0
+ 80008ec: d001 beq.n 80008f2
{
Error_Handler();
- 80006d6: f000 fb7b bl 8000dd0
+ 80008ee: f000 fb53 bl 8000f98
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- 80006da: f44f 5380 mov.w r3, #4096 ; 0x1000
- 80006de: 64bb str r3, [r7, #72] ; 0x48
+ 80008f2: f44f 5380 mov.w r3, #4096 ; 0x1000
+ 80008f6: 64bb str r3, [r7, #72] ; 0x48
if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
- 80006e0: f107 0348 add.w r3, r7, #72 ; 0x48
- 80006e4: 4619 mov r1, r3
- 80006e6: 483e ldr r0, [pc, #248] ; (80007e0 )
- 80006e8: f004 fa1c bl 8004b24
- 80006ec: 4603 mov r3, r0
- 80006ee: 2b00 cmp r3, #0
- 80006f0: d001 beq.n 80006f6
+ 80008f8: f107 0348 add.w r3, r7, #72 ; 0x48
+ 80008fc: 4619 mov r1, r3
+ 80008fe: 483e ldr r0, [pc, #248] ; (80009f8 )
+ 8000900: f004 ff02 bl 8005708
+ 8000904: 4603 mov r3, r0
+ 8000906: 2b00 cmp r3, #0
+ 8000908: d001 beq.n 800090e
{
Error_Handler();
- 80006f2: f000 fb6d bl 8000dd0
+ 800090a: f000 fb45 bl 8000f98
}
if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
- 80006f6: 483a ldr r0, [pc, #232] ; (80007e0 )
- 80006f8: f003 fff6 bl 80046e8
- 80006fc: 4603 mov r3, r0
- 80006fe: 2b00 cmp r3, #0
- 8000700: d001 beq.n 8000706
+ 800090e: 483a ldr r0, [pc, #232] ; (80009f8 )
+ 8000910: f004 fcdc bl 80052cc
+ 8000914: 4603 mov r3, r0
+ 8000916: 2b00 cmp r3, #0
+ 8000918: d001 beq.n 800091e
{
Error_Handler();
- 8000702: f000 fb65 bl 8000dd0
+ 800091a: f000 fb3d bl 8000f98
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 8000706: 2300 movs r3, #0
- 8000708: 643b str r3, [r7, #64] ; 0x40
+ 800091e: 2300 movs r3, #0
+ 8000920: 643b str r3, [r7, #64] ; 0x40
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 800070a: 2300 movs r3, #0
- 800070c: 647b str r3, [r7, #68] ; 0x44
+ 8000922: 2300 movs r3, #0
+ 8000924: 647b str r3, [r7, #68] ; 0x44
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
- 800070e: f107 0340 add.w r3, r7, #64 ; 0x40
- 8000712: 4619 mov r1, r3
- 8000714: 4832 ldr r0, [pc, #200] ; (80007e0 )
- 8000716: f004 fdd7 bl 80052c8
- 800071a: 4603 mov r3, r0
- 800071c: 2b00 cmp r3, #0
- 800071e: d001 beq.n 8000724
+ 8000926: f107 0340 add.w r3, r7, #64 ; 0x40
+ 800092a: 4619 mov r1, r3
+ 800092c: 4832 ldr r0, [pc, #200] ; (80009f8 )
+ 800092e: f005 fabd bl 8005eac
+ 8000932: 4603 mov r3, r0
+ 8000934: 2b00 cmp r3, #0
+ 8000936: d001 beq.n 800093c
{
Error_Handler();
- 8000720: f000 fb56 bl 8000dd0
+ 8000938: f000 fb2e bl 8000f98
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
- 8000724: 2360 movs r3, #96 ; 0x60
- 8000726: 627b str r3, [r7, #36] ; 0x24
+ 800093c: 2360 movs r3, #96 ; 0x60
+ 800093e: 627b str r3, [r7, #36] ; 0x24
sConfigOC.Pulse = 0;
- 8000728: 2300 movs r3, #0
- 800072a: 62bb str r3, [r7, #40] ; 0x28
+ 8000940: 2300 movs r3, #0
+ 8000942: 62bb str r3, [r7, #40] ; 0x28
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 800072c: 2300 movs r3, #0
- 800072e: 62fb str r3, [r7, #44] ; 0x2c
+ 8000944: 2300 movs r3, #0
+ 8000946: 62fb str r3, [r7, #44] ; 0x2c
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
- 8000730: 2300 movs r3, #0
- 8000732: 633b str r3, [r7, #48] ; 0x30
+ 8000948: 2300 movs r3, #0
+ 800094a: 633b str r3, [r7, #48] ; 0x30
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 8000734: 2300 movs r3, #0
- 8000736: 637b str r3, [r7, #52] ; 0x34
+ 800094c: 2300 movs r3, #0
+ 800094e: 637b str r3, [r7, #52] ; 0x34
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
- 8000738: 2300 movs r3, #0
- 800073a: 63bb str r3, [r7, #56] ; 0x38
+ 8000950: 2300 movs r3, #0
+ 8000952: 63bb str r3, [r7, #56] ; 0x38
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
- 800073c: 2300 movs r3, #0
- 800073e: 63fb str r3, [r7, #60] ; 0x3c
+ 8000954: 2300 movs r3, #0
+ 8000956: 63fb str r3, [r7, #60] ; 0x3c
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
- 8000740: f107 0324 add.w r3, r7, #36 ; 0x24
- 8000744: 2200 movs r2, #0
- 8000746: 4619 mov r1, r3
- 8000748: 4825 ldr r0, [pc, #148] ; (80007e0 )
- 800074a: f004 f92d bl 80049a8
- 800074e: 4603 mov r3, r0
- 8000750: 2b00 cmp r3, #0
- 8000752: d001 beq.n 8000758
+ 8000958: f107 0324 add.w r3, r7, #36 ; 0x24
+ 800095c: 2200 movs r2, #0
+ 800095e: 4619 mov r1, r3
+ 8000960: 4825 ldr r0, [pc, #148] ; (80009f8