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stm32_modbus_workshop-master/ 0000775 0000000 0000000 00000000000 14016416642 0016630 5 ustar 00root root 0000000 0000000 stm32_modbus_workshop-master/.cproject 0000664 0000000 0000000 00000061111 14016416642 0020442 0 ustar 00root root 0000000 0000000
stm32_modbus_workshop-master/.gitignore 0000664 0000000 0000000 00000000031 14016416642 0020612 0 ustar 00root root 0000000 0000000 *.d
*.o
*.tmp
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stm32_modbus_workshop-master/.mxproject 0000664 0000000 0000000 00000015321 14016416642 0020646 0 ustar 00root root 0000000 0000000 [PreviousLibFiles]
LibFiles=Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.c;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
[PreviousUsedCubeIDEFiles]
SourceFiles=Core\Src\main.c;Core\Src\stm32l1xx_it.c;Core\Src\stm32l1xx_hal_msp.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.c;Core\Src/system_stm32l1xx.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.c;Core\Src/system_stm32l1xx.c;Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c;;
HeaderPath=Drivers\STM32L1xx_HAL_Driver\Inc;Drivers\STM32L1xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32L1xx\Include;Drivers\CMSIS\Include;Core\Inc;
CDefines=USE_HAL_DRIVER;STM32L152xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
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AdvancedFolderStructure=true
HeaderFileListSize=3
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stm32_modbus_workshop-master/.project 0000664 0000000 0000000 00000002425 14016416642 0020302 0 ustar 00root root 0000000 0000000
modbus_01
org.eclipse.cdt.managedbuilder.core.genmakebuilder
clean,full,incremental,
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com.st.stm32cube.ide.mcu.MCUCubeProjectNature
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stm32_modbus_workshop-master/.settings/ 0000775 0000000 0000000 00000000000 14016416642 0020546 5 ustar 00root root 0000000 0000000 stm32_modbus_workshop-master/.settings/language.settings.xml 0000664 0000000 0000000 00000004505 14016416642 0024716 0 ustar 00root root 0000000 0000000
stm32_modbus_workshop-master/.settings/stm32cubeide.project.prefs 0000664 0000000 0000000 00000000350 14016416642 0025543 0 ustar 00root root 0000000 0000000 635E684B79701B039C64EA45C3F84D30=D2046F946921BE52819209C297E56C23
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eclipse.preferences.version=1
stm32_modbus_workshop-master/Core/ 0000775 0000000 0000000 00000000000 14016416642 0017520 5 ustar 00root root 0000000 0000000 stm32_modbus_workshop-master/Core/Inc/ 0000775 0000000 0000000 00000000000 14016416642 0020231 5 ustar 00root root 0000000 0000000 stm32_modbus_workshop-master/Core/Inc/main.h 0000664 0000000 0000000 00000012127 14016416642 0021331 0 ustar 00root root 0000000 0000000 /* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
*
© Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32l1xx_hal.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
static const uint16_t wCRCTable[] = {
0X0000, 0XC0C1, 0XC181, 0X0140, 0XC301, 0X03C0, 0X0280, 0XC241,
0XC601, 0X06C0, 0X0780, 0XC741, 0X0500, 0XC5C1, 0XC481, 0X0440,
0XCC01, 0X0CC0, 0X0D80, 0XCD41, 0X0F00, 0XCFC1, 0XCE81, 0X0E40,
0X0A00, 0XCAC1, 0XCB81, 0X0B40, 0XC901, 0X09C0, 0X0880, 0XC841,
0XD801, 0X18C0, 0X1980, 0XD941, 0X1B00, 0XDBC1, 0XDA81, 0X1A40,
0X1E00, 0XDEC1, 0XDF81, 0X1F40, 0XDD01, 0X1DC0, 0X1C80, 0XDC41,
0X1400, 0XD4C1, 0XD581, 0X1540, 0XD701, 0X17C0, 0X1680, 0XD641,
0XD201, 0X12C0, 0X1380, 0XD341, 0X1100, 0XD1C1, 0XD081, 0X1040,
0XF001, 0X30C0, 0X3180, 0XF141, 0X3300, 0XF3C1, 0XF281, 0X3240,
0X3600, 0XF6C1, 0XF781, 0X3740, 0XF501, 0X35C0, 0X3480, 0XF441,
0X3C00, 0XFCC1, 0XFD81, 0X3D40, 0XFF01, 0X3FC0, 0X3E80, 0XFE41,
0XFA01, 0X3AC0, 0X3B80, 0XFB41, 0X3900, 0XF9C1, 0XF881, 0X3840,
0X2800, 0XE8C1, 0XE981, 0X2940, 0XEB01, 0X2BC0, 0X2A80, 0XEA41,
0XEE01, 0X2EC0, 0X2F80, 0XEF41, 0X2D00, 0XEDC1, 0XEC81, 0X2C40,
0XE401, 0X24C0, 0X2580, 0XE541, 0X2700, 0XE7C1, 0XE681, 0X2640,
0X2200, 0XE2C1, 0XE381, 0X2340, 0XE101, 0X21C0, 0X2080, 0XE041,
0XA001, 0X60C0, 0X6180, 0XA141, 0X6300, 0XA3C1, 0XA281, 0X6240,
0X6600, 0XA6C1, 0XA781, 0X6740, 0XA501, 0X65C0, 0X6480, 0XA441,
0X6C00, 0XACC1, 0XAD81, 0X6D40, 0XAF01, 0X6FC0, 0X6E80, 0XAE41,
0XAA01, 0X6AC0, 0X6B80, 0XAB41, 0X6900, 0XA9C1, 0XA881, 0X6840,
0X7800, 0XB8C1, 0XB981, 0X7940, 0XBB01, 0X7BC0, 0X7A80, 0XBA41,
0XBE01, 0X7EC0, 0X7F80, 0XBF41, 0X7D00, 0XBDC1, 0XBC81, 0X7C40,
0XB401, 0X74C0, 0X7580, 0XB541, 0X7700, 0XB7C1, 0XB681, 0X7640,
0X7200, 0XB2C1, 0XB381, 0X7340, 0XB101, 0X71C0, 0X7080, 0XB041,
0X5000, 0X90C1, 0X9181, 0X5140, 0X9301, 0X53C0, 0X5280, 0X9241,
0X9601, 0X56C0, 0X5780, 0X9741, 0X5500, 0X95C1, 0X9481, 0X5440,
0X9C01, 0X5CC0, 0X5D80, 0X9D41, 0X5F00, 0X9FC1, 0X9E81, 0X5E40,
0X5A00, 0X9AC1, 0X9B81, 0X5B40, 0X9901, 0X59C0, 0X5880, 0X9841,
0X8801, 0X48C0, 0X4980, 0X8941, 0X4B00, 0X8BC1, 0X8A81, 0X4A40,
0X4E00, 0X8EC1, 0X8F81, 0X4F40, 0X8D01, 0X4DC0, 0X4C80, 0X8C41,
0X4400, 0X84C1, 0X8581, 0X4540, 0X8701, 0X47C0, 0X4680, 0X8641,
0X8201, 0X42C0, 0X4380, 0X8341, 0X4100, 0X81C1, 0X8081, 0X4040 };
static const uint8_t frame01_U8A[8U] = {0x01, 0x06, 0x00, 0x00, 0x00, 0x00, 0x89, 0xCA};
static const uint8_t frame02_U8A[8U] = {0x01, 0x06, 0x00, 0x01, 0x00, 0x03, 0x98, 0x0B};
static const uint8_t frame03_U8A[8U] = {0x01, 0x06, 0x00, 0x02, 0x23, 0x28, 0x31, 0x24};
static const uint8_t frame04_U8A[8U] = {0x01, 0x05, 0x00, 0x00, 0xFF, 0x00, 0x8C, 0x3A};
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
/* USER CODE BEGIN EFP */
void PeriodicCallback (void);
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
#define B1_Pin GPIO_PIN_13
#define B1_GPIO_Port GPIOC
#define USART_TX_Pin GPIO_PIN_2
#define USART_TX_GPIO_Port GPIOA
#define USART_RX_Pin GPIO_PIN_3
#define USART_RX_GPIO_Port GPIOA
#define LD2_Pin GPIO_PIN_5
#define LD2_GPIO_Port GPIOA
#define TMS_Pin GPIO_PIN_13
#define TMS_GPIO_Port GPIOA
#define TCK_Pin GPIO_PIN_14
#define TCK_GPIO_Port GPIOA
#define SWO_Pin GPIO_PIN_3
#define SWO_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stm32_modbus_workshop-master/Core/Inc/stm32l1xx_hal_conf.h 0000664 0000000 0000000 00000030457 14016416642 0024031 0 ustar 00root root 0000000 0000000 /**
******************************************************************************
* @file stm32l1xx_hal_conf.h
* @brief HAL configuration file.
******************************************************************************
* @attention
*
* © COPYRIGHT(c) 2021 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L1xx_HAL_CONF_H
#define __STM32L1xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
/*#define HAL_ADC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_COMP_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
/*#define HAL_I2C_MODULE_ENABLED */
/*#define HAL_I2S_MODULE_ENABLED */
/*#define HAL_IRDA_MODULE_ENABLED */
/*#define HAL_IWDG_MODULE_ENABLED */
/*#define HAL_LCD_MODULE_ENABLED */
/*#define HAL_NOR_MODULE_ENABLED */
/*#define HAL_OPAMP_MODULE_ENABLED */
/*#define HAL_PCD_MODULE_ENABLED */
/*#define HAL_RTC_MODULE_ENABLED */
/*#define HAL_SD_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
/*#define HAL_SPI_MODULE_ENABLED */
/*#define HAL_SRAM_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
/*#define HAL_USART_MODULE_ENABLED */
/*#define HAL_WWDG_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
/* ########################## Oscillator Values adaptation ####################*/
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal Multiple Speed oscillator (MSI) default value.
* This value is the default MSI range value after Reset.
*/
#if !defined (MSI_VALUE)
#define MSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* MSI_VALUE */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE (37000U) /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature.*/
/**
* @brief External Low Speed oscillator (LSE) value.
* This value is used by the UART, RTC HAL module to compute the system frequency
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority */
#define USE_RTOS 0
#define PREFETCH_ENABLE 0
#define INSTRUCTION_CACHE_ENABLE 1
#define DATA_CACHE_ENABLE 1
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
/* ################## Register callback feature configuration ############### */
/**
* @brief Set below the peripheral configuration to "1U" to add the support
* of HAL callback registration/deregistration feature for the HAL
* driver(s). This allows user application to provide specific callback
* functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
* the default weak callback functions (see each stm32l0xx_hal_ppp.h file
* for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
* for each PPP peripheral).
*/
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
#define USE_HAL_SDMMC_REGISTER_CALLBACKS 0U
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
#define USE_HAL_UART_REGISTER_CALLBACKS 0U
#define USE_HAL_USART_REGISTER_CALLBACKS 0U
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
/* ################## SPI peripheral configuration ########################## */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
* Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver
*/
#define USE_SPI_CRC 0U
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32l1xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32l1xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32l1xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32l1xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32l1xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_COMP_MODULE_ENABLED
#include "stm32l1xx_hal_comp.h"
#endif /* HAL_COMP_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32l1xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32l1xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32l1xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32l1xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32l1xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32l1xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32l1xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32l1xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32l1xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_LCD_MODULE_ENABLED
#include "stm32l1xx_hal_lcd.h"
#endif /* HAL_LCD_MODULE_ENABLED */
#ifdef HAL_OPAMP_MODULE_ENABLED
#include "stm32l1xx_hal_opamp.h"
#endif /* HAL_OPAMP_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32l1xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32l1xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32l1xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32l1xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32l1xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32l1xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32l1xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32l1xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32l1xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32l1xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32l1xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32l1xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32L1xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stm32_modbus_workshop-master/Core/Inc/stm32l1xx_it.h 0000664 0000000 0000000 00000004165 14016416642 0022671 0 ustar 00root root 0000000 0000000 /* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32l1xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* © Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L1xx_IT_H
#define __STM32L1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void TIM2_IRQHandler(void);
void UART4_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
#ifdef __cplusplus
}
#endif
#endif /* __STM32L1xx_IT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stm32_modbus_workshop-master/Core/Src/ 0000775 0000000 0000000 00000000000 14016416642 0020247 5 ustar 00root root 0000000 0000000 stm32_modbus_workshop-master/Core/Src/main.c 0000664 0000000 0000000 00000024555 14016416642 0021352 0 ustar 00root root 0000000 0000000 /* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* © Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
TIM_HandleTypeDef htim2;
UART_HandleTypeDef huart4;
UART_HandleTypeDef huart2;
/* USER CODE BEGIN PV */
uint16_t cnt_ms_u16;
uint8_t cnt_frame_u8;
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_USART2_UART_Init(void);
static void MX_TIM2_Init(void);
static void MX_UART4_Init(void);
/* USER CODE BEGIN PFP */
uint16_t CRC16 (const uint8_t *nData, uint16_t wLength);
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
uint16_t crc_test;
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_USART2_UART_Init();
MX_TIM2_Init();
MX_UART4_Init();
/* USER CODE BEGIN 2 */
cnt_frame_u8 = 0U;
cnt_ms_u16 = 0U;
HAL_TIM_PWM_Start_IT(&htim2, TIM_CHANNEL_1); // Start 1ms interrupt
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
RCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV3;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
{
Error_Handler();
}
}
/**
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
TIM_OC_InitTypeDef sConfigOC = {0};
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
htim2.Init.Prescaler = 32;
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
htim2.Init.Period = 1000;
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 500;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
}
/**
* @brief UART4 Initialization Function
* @param None
* @retval None
*/
static void MX_UART4_Init(void)
{
/* USER CODE BEGIN UART4_Init 0 */
/* USER CODE END UART4_Init 0 */
/* USER CODE BEGIN UART4_Init 1 */
/* USER CODE END UART4_Init 1 */
huart4.Instance = UART4;
huart4.Init.BaudRate = 19200;
huart4.Init.WordLength = UART_WORDLENGTH_8B;
huart4.Init.StopBits = UART_STOPBITS_1;
huart4.Init.Parity = UART_PARITY_NONE;
huart4.Init.Mode = UART_MODE_TX_RX;
huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart4.Init.OverSampling = UART_OVERSAMPLING_16;
if (HAL_UART_Init(&huart4) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN UART4_Init 2 */
/* USER CODE END UART4_Init 2 */
}
/**
* @brief USART2 Initialization Function
* @param None
* @retval None
*/
static void MX_USART2_UART_Init(void)
{
/* USER CODE BEGIN USART2_Init 0 */
/* USER CODE END USART2_Init 0 */
/* USER CODE BEGIN USART2_Init 1 */
/* USER CODE END USART2_Init 1 */
huart2.Instance = USART2;
huart2.Init.BaudRate = 115200;
huart2.Init.WordLength = UART_WORDLENGTH_8B;
huart2.Init.StopBits = UART_STOPBITS_1;
huart2.Init.Parity = UART_PARITY_NONE;
huart2.Init.Mode = UART_MODE_TX_RX;
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
if (HAL_UART_Init(&huart2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART2_Init 2 */
/* USER CODE END USART2_Init 2 */
}
/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin : B1_Pin */
GPIO_InitStruct.Pin = B1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pin : LD2_Pin */
GPIO_InitStruct.Pin = LD2_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct);
}
/* USER CODE BEGIN 4 */
void PeriodicCallback (void)
{
cnt_ms_u16++;
if (cnt_ms_u16 >= 100)
{
if (cnt_frame_u8 <= 5)
{
cnt_frame_u8++;
}
cnt_ms_u16 = 0;
}
if(cnt_ms_u16 == 0U)
{
switch(cnt_frame_u8)
{
case 1:
HAL_UART_Transmit_IT(&huart4, frame01_U8A, 8U);
break;
case 2:
HAL_UART_Transmit_IT(&huart4, frame02_U8A, 8U);
break;
case 3:
HAL_UART_Transmit_IT(&huart4, frame03_U8A, 8U);
break;
case 4:
HAL_UART_Transmit_IT(&huart4, frame04_U8A, 8U);
break;
default:
break;
}
}
}
uint16_t CRC16 (const uint8_t *nData, uint16_t wLength)
{
uint8_t nTemp;
uint16_t wCRCWord = 0xFFFF;
while (wLength--)
{
nTemp = *nData++ ^ wCRCWord;
wCRCWord >>= 8;
wCRCWord ^= wCRCTable[nTemp];
}
return wCRCWord;
}
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stm32_modbus_workshop-master/Core/Src/stm32l1xx_hal_msp.c 0000664 0000000 0000000 00000015127 14016416642 0023711 0 ustar 00root root 0000000 0000000 /* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32l1xx_hal_msp.c
* @brief This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* © Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_COMP_CLK_ENABLE();
__HAL_RCC_SYSCFG_CLK_ENABLE();
__HAL_RCC_PWR_CLK_ENABLE();
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
/**
* @brief TIM_Base MSP Initialization
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM2)
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
/* TIM2 interrupt Init */
HAL_NVIC_SetPriority(TIM2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM2_IRQn);
/* USER CODE BEGIN TIM2_MspInit 1 */
/* USER CODE END TIM2_MspInit 1 */
}
}
/**
* @brief TIM_Base MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM2)
{
/* USER CODE BEGIN TIM2_MspDeInit 0 */
/* USER CODE END TIM2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM2_CLK_DISABLE();
/* TIM2 interrupt DeInit */
HAL_NVIC_DisableIRQ(TIM2_IRQn);
/* USER CODE BEGIN TIM2_MspDeInit 1 */
/* USER CODE END TIM2_MspDeInit 1 */
}
}
/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(huart->Instance==UART4)
{
/* USER CODE BEGIN UART4_MspInit 0 */
/* USER CODE END UART4_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_UART4_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
/**UART4 GPIO Configuration
PC10 ------> UART4_TX
PC11 ------> UART4_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF8_UART4;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/* UART4 interrupt Init */
HAL_NVIC_SetPriority(UART4_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(UART4_IRQn);
/* USER CODE BEGIN UART4_MspInit 1 */
/* USER CODE END UART4_MspInit 1 */
}
else if(huart->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspInit 0 */
/* USER CODE END USART2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART2_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN USART2_MspInit 1 */
/* USER CODE END USART2_MspInit 1 */
}
}
/**
* @brief UART MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
{
if(huart->Instance==UART4)
{
/* USER CODE BEGIN UART4_MspDeInit 0 */
/* USER CODE END UART4_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_UART4_CLK_DISABLE();
/**UART4 GPIO Configuration
PC10 ------> UART4_TX
PC11 ------> UART4_RX
*/
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11);
/* UART4 interrupt DeInit */
HAL_NVIC_DisableIRQ(UART4_IRQn);
/* USER CODE BEGIN UART4_MspDeInit 1 */
/* USER CODE END UART4_MspDeInit 1 */
}
else if(huart->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspDeInit 0 */
/* USER CODE END USART2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART2_CLK_DISABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin);
/* USER CODE BEGIN USART2_MspDeInit 1 */
/* USER CODE END USART2_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stm32_modbus_workshop-master/Core/Src/stm32l1xx_it.c 0000664 0000000 0000000 00000014133 14016416642 0022676 0 ustar 00root root 0000000 0000000 /* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32l1xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* © Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32l1xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern TIM_HandleTypeDef htim2;
extern UART_HandleTypeDef huart4;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M3 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVC_IRQn 0 */
/* USER CODE END SVC_IRQn 0 */
/* USER CODE BEGIN SVC_IRQn 1 */
/* USER CODE END SVC_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32L1xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32l1xx.s). */
/******************************************************************************/
/**
* @brief This function handles TIM2 global interrupt.
*/
void TIM2_IRQHandler(void)
{
/* USER CODE BEGIN TIM2_IRQn 0 */
/* USER CODE END TIM2_IRQn 0 */
HAL_TIM_IRQHandler(&htim2);
/* USER CODE BEGIN TIM2_IRQn 1 */
PeriodicCallback();
/* USER CODE END TIM2_IRQn 1 */
}
/**
* @brief This function handles UART4 global interrupt.
*/
void UART4_IRQHandler(void)
{
/* USER CODE BEGIN UART4_IRQn 0 */
/* USER CODE END UART4_IRQn 0 */
HAL_UART_IRQHandler(&huart4);
/* USER CODE BEGIN UART4_IRQn 1 */
/* USER CODE END UART4_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stm32_modbus_workshop-master/Core/Src/syscalls.c 0000664 0000000 0000000 00000005163 14016416642 0022255 0 ustar 00root root 0000000 0000000 /**
******************************************************************************
* @file syscalls.c
* @author Auto-generated by STM32CubeIDE
* @brief STM32CubeIDE Minimal System calls file
*
* For more information about which c-functions
* need which of these lowlevel functions
* please consult the Newlib libc-manual
******************************************************************************
* @attention
*
* © Copyright (c) 2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes */
#include
#include
#include
#include
#include
#include
#include
#include
/* Variables */
//#undef errno
extern int errno;
extern int __io_putchar(int ch) __attribute__((weak));
extern int __io_getchar(void) __attribute__((weak));
register char * stack_ptr asm("sp");
char *__env[1] = { 0 };
char **environ = __env;
/* Functions */
void initialise_monitor_handles()
{
}
int _getpid(void)
{
return 1;
}
int _kill(int pid, int sig)
{
errno = EINVAL;
return -1;
}
void _exit (int status)
{
_kill(status, -1);
while (1) {} /* Make sure we hang here */
}
__attribute__((weak)) int _read(int file, char *ptr, int len)
{
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
*ptr++ = __io_getchar();
}
return len;
}
__attribute__((weak)) int _write(int file, char *ptr, int len)
{
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
__io_putchar(*ptr++);
}
return len;
}
int _close(int file)
{
return -1;
}
int _fstat(int file, struct stat *st)
{
st->st_mode = S_IFCHR;
return 0;
}
int _isatty(int file)
{
return 1;
}
int _lseek(int file, int ptr, int dir)
{
return 0;
}
int _open(char *path, int flags, ...)
{
/* Pretend like we always fail */
return -1;
}
int _wait(int *status)
{
errno = ECHILD;
return -1;
}
int _unlink(char *name)
{
errno = ENOENT;
return -1;
}
int _times(struct tms *buf)
{
return -1;
}
int _stat(char *file, struct stat *st)
{
st->st_mode = S_IFCHR;
return 0;
}
int _link(char *old, char *new)
{
errno = EMLINK;
return -1;
}
int _fork(void)
{
errno = EAGAIN;
return -1;
}
int _execve(char *name, char **argv, char **env)
{
errno = ENOMEM;
return -1;
}
stm32_modbus_workshop-master/Core/Src/sysmem.c 0000664 0000000 0000000 00000005404 14016416642 0021733 0 ustar 00root root 0000000 0000000 /**
******************************************************************************
* @file sysmem.c
* @author Generated by STM32CubeIDE
* @brief STM32CubeIDE System Memory calls file
*
* For more information about which C functions
* need which of these lowlevel functions
* please consult the newlib libc manual
******************************************************************************
* @attention
*
* © Copyright (c) 2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes */
#include
#include
/**
* Pointer to the current high watermark of the heap usage
*/
static uint8_t *__sbrk_heap_end = NULL;
/**
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
* and others from the C library
*
* @verbatim
* ############################################################################
* # .data # .bss # newlib heap # MSP stack #
* # # # # Reserved by _Min_Stack_Size #
* ############################################################################
* ^-- RAM start ^-- _end _estack, RAM end --^
* @endverbatim
*
* This implementation starts allocating at the '_end' linker symbol
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
* The implementation considers '_estack' linker symbol to be RAM end
* NOTE: If the MSP stack, at any point during execution, grows larger than the
* reserved size, please increase the '_Min_Stack_Size'.
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
const uint8_t *max_heap = (uint8_t *)stack_limit;
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
{
__sbrk_heap_end = &_end;
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
{
errno = ENOMEM;
return (void *)-1;
}
prev_heap_end = __sbrk_heap_end;
__sbrk_heap_end += incr;
return (void *)prev_heap_end;
}
stm32_modbus_workshop-master/Core/Src/system_stm32l1xx.c 0000664 0000000 0000000 00000035520 14016416642 0023611 0 ustar 00root root 0000000 0000000 /**
******************************************************************************
* @file system_stm32l1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32l1xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
******************************************************************************
* @attention
*
* © Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32l1xx_system
* @{
*/
/** @addtogroup STM32L1xx_System_Private_Includes
* @{
*/
#include "stm32l1xx.h"
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000U) /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)8000000U) /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM mounted
on STM32L152D_EVAL board as data memory */
/* #define DATA_IN_ExtSRAM */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 2097000U;
const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U};
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system.
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @param None
* @retval None
*/
void SystemInit (void)
{
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock according to Clock Register Values
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is MSI, SystemCoreClock will contain the MSI
* value as defined by the MSI range.
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32l1xx.h file (default value
* 16 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32l1xx.h file (default value
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may
* have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00: /* MSI used as system clock */
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
SystemCoreClock = (32768 * (1 << (msirange + 1)));
break;
case 0x04: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x08: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x0C: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
pllmul = PLLMulTable[(pllmul >> 18)];
plldiv = (plldiv >> 22) + 1;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
if (pllsource == 0x00)
{
/* HSI oscillator clock selected as PLL clock entry */
SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
}
else
{
/* HSE selected as PLL clock entry */
SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
}
break;
default: /* MSI used as system clock */
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
SystemCoreClock = (32768 * (1 << (msirange + 1)));
break;
}
/* Compute HCLK clock frequency --------------------------------------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in SystemInit() function before jump to main.
* This function configures the external SRAM mounted on STM32L152D_EVAL board
* This SRAM will be used as program data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg = 0;
/* Flash 1 wait state */
FLASH->ACR |= FLASH_ACR_LATENCY;
/* Power enable */
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN);
/* Select the Voltage Range 1 (1.8 V) */
PWR->CR = PWR_CR_VOS_0;
/* Wait Until the Voltage Regulator is ready */
while((PWR->CSR & PWR_CSR_VOSF) != RESET)
{
}
/*-- GPIOs Configuration -----------------------------------------------------*/
/*
+-------------------+--------------------+------------------+------------------+
+ SRAM pins assignment +
+-------------------+--------------------+------------------+------------------+
| PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 |
| PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 |
| PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 |
| PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 |
| PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 |
| PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 |
| PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG10<-> FSMC_NE2 |
| PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+
| PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 |
| PD13 <-> FSMC_A18 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 |
| PD14 <-> FSMC_D0 | PE15 <-> FSMC_D12 |------------------+
| PD15 <-> FSMC_D1 |--------------------+
+-------------------+
*/
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
RCC->AHBENR = 0x000080D8;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIODEN);
/* Connect PDx pins to FSMC Alternate function */
GPIOD->AFR[0] = 0x00CC00CC;
GPIOD->AFR[1] = 0xCCCCCCCC;
/* Configure PDx pins in Alternate function mode */
GPIOD->MODER = 0xAAAA0A0A;
/* Configure PDx pins speed to 40 MHz */
GPIOD->OSPEEDR = 0xFFFF0F0F;
/* Configure PDx pins Output type to push-pull */
GPIOD->OTYPER = 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOD->PUPDR = 0x00000000;
/* Connect PEx pins to FSMC Alternate function */
GPIOE->AFR[0] = 0xC00000CC;
GPIOE->AFR[1] = 0xCCCCCCCC;
/* Configure PEx pins in Alternate function mode */
GPIOE->MODER = 0xAAAA800A;
/* Configure PEx pins speed to 40 MHz */
GPIOE->OSPEEDR = 0xFFFFC00F;
/* Configure PEx pins Output type to push-pull */
GPIOE->OTYPER = 0x00000000;
/* No pull-up, pull-down for PEx pins */
GPIOE->PUPDR = 0x00000000;
/* Connect PFx pins to FSMC Alternate function */
GPIOF->AFR[0] = 0x00CCCCCC;
GPIOF->AFR[1] = 0xCCCC0000;
/* Configure PFx pins in Alternate function mode */
GPIOF->MODER = 0xAA000AAA;
/* Configure PFx pins speed to 40 MHz */
GPIOF->OSPEEDR = 0xFF000FFF;
/* Configure PFx pins Output type to push-pull */
GPIOF->OTYPER = 0x00000000;
/* No pull-up, pull-down for PFx pins */
GPIOF->PUPDR = 0x00000000;
/* Connect PGx pins to FSMC Alternate function */
GPIOG->AFR[0] = 0x00CCCCCC;
GPIOG->AFR[1] = 0x00000C00;
/* Configure PGx pins in Alternate function mode */
GPIOG->MODER = 0x00200AAA;
/* Configure PGx pins speed to 40 MHz */
GPIOG->OSPEEDR = 0x00300FFF;
/* Configure PGx pins Output type to push-pull */
GPIOG->OTYPER = 0x00000000;
/* No pull-up, pull-down for PGx pins */
GPIOG->PUPDR = 0x00000000;
/*-- FSMC Configuration ------------------------------------------------------*/
/* Enable the FSMC interface clock */
RCC->AHBENR = 0x400080D8;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
(void)(tmpreg);
/* Configure and enable Bank1_SRAM3 */
FSMC_Bank1->BTCR[4] = 0x00001011;
FSMC_Bank1->BTCR[5] = 0x00000300;
FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF;
/*
Bank1_SRAM3 is configured as follow:
p.FSMC_AddressSetupTime = 0;
p.FSMC_AddressHoldTime = 0;
p.FSMC_DataSetupTime = 3;
p.FSMC_BusTurnAroundDuration = 0;
p.FSMC_CLKDivision = 0;
p.FSMC_DataLatency = 0;
p.FSMC_AccessMode = FSMC_AccessMode_A;
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
*/
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stm32_modbus_workshop-master/Core/Startup/ 0000775 0000000 0000000 00000000000 14016416642 0021162 5 ustar 00root root 0000000 0000000 stm32_modbus_workshop-master/Core/Startup/startup_stm32l152retx.s 0000664 0000000 0000000 00000026246 14016416642 0025421 0 ustar 00root root 0000000 0000000 /**
******************************************************************************
* @file startup_stm32l152xe.s
* @author MCD Application Team
* @brief STM32L152XE Devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Configure the clock system
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
* @attention
*
* Copyright (c) 2017 STMicroelectronics. All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m3
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.equ BootRAM, 0xF108F85F
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
.word WWDG_IRQHandler
.word PVD_IRQHandler
.word TAMPER_STAMP_IRQHandler
.word RTC_WKUP_IRQHandler
.word FLASH_IRQHandler
.word RCC_IRQHandler
.word EXTI0_IRQHandler
.word EXTI1_IRQHandler
.word EXTI2_IRQHandler
.word EXTI3_IRQHandler
.word EXTI4_IRQHandler
.word DMA1_Channel1_IRQHandler
.word DMA1_Channel2_IRQHandler
.word DMA1_Channel3_IRQHandler
.word DMA1_Channel4_IRQHandler
.word DMA1_Channel5_IRQHandler
.word DMA1_Channel6_IRQHandler
.word DMA1_Channel7_IRQHandler
.word ADC1_IRQHandler
.word USB_HP_IRQHandler
.word USB_LP_IRQHandler
.word DAC_IRQHandler
.word COMP_IRQHandler
.word EXTI9_5_IRQHandler
.word LCD_IRQHandler
.word TIM9_IRQHandler
.word TIM10_IRQHandler
.word TIM11_IRQHandler
.word TIM2_IRQHandler
.word TIM3_IRQHandler
.word TIM4_IRQHandler
.word I2C1_EV_IRQHandler
.word I2C1_ER_IRQHandler
.word I2C2_EV_IRQHandler
.word I2C2_ER_IRQHandler
.word SPI1_IRQHandler
.word SPI2_IRQHandler
.word USART1_IRQHandler
.word USART2_IRQHandler
.word USART3_IRQHandler
.word EXTI15_10_IRQHandler
.word RTC_Alarm_IRQHandler
.word USB_FS_WKUP_IRQHandler
.word TIM6_IRQHandler
.word TIM7_IRQHandler
.word 0
.word TIM5_IRQHandler
.word SPI3_IRQHandler
.word UART4_IRQHandler
.word UART5_IRQHandler
.word DMA2_Channel1_IRQHandler
.word DMA2_Channel2_IRQHandler
.word DMA2_Channel3_IRQHandler
.word DMA2_Channel4_IRQHandler
.word DMA2_Channel5_IRQHandler
.word 0
.word COMP_ACQ_IRQHandler
.word 0
.word 0
.word 0
.word 0
.word 0
.word BootRAM /* @0x108. This is for boot in RAM mode for
STM32L152XE devices. */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak TAMPER_STAMP_IRQHandler
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
.weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
.weak EXTI2_IRQHandler
.thumb_set EXTI2_IRQHandler,Default_Handler
.weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
.weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_IRQHandler
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
.weak DMA1_Channel3_IRQHandler
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
.weak DMA1_Channel4_IRQHandler
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
.weak DMA1_Channel5_IRQHandler
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
.weak DMA1_Channel6_IRQHandler
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
.weak DMA1_Channel7_IRQHandler
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
.weak ADC1_IRQHandler
.thumb_set ADC1_IRQHandler,Default_Handler
.weak USB_HP_IRQHandler
.thumb_set USB_HP_IRQHandler,Default_Handler
.weak USB_LP_IRQHandler
.thumb_set USB_LP_IRQHandler,Default_Handler
.weak DAC_IRQHandler
.thumb_set DAC_IRQHandler,Default_Handler
.weak COMP_IRQHandler
.thumb_set COMP_IRQHandler,Default_Handler
.weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
.weak LCD_IRQHandler
.thumb_set LCD_IRQHandler,Default_Handler
.weak TIM9_IRQHandler
.thumb_set TIM9_IRQHandler,Default_Handler
.weak TIM10_IRQHandler
.thumb_set TIM10_IRQHandler,Default_Handler
.weak TIM11_IRQHandler
.thumb_set TIM11_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak USB_FS_WKUP_IRQHandler
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
.weak TIM6_IRQHandler
.thumb_set TIM6_IRQHandler,Default_Handler
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
.weak TIM5_IRQHandler
.thumb_set TIM5_IRQHandler,Default_Handler
.weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
.weak UART4_IRQHandler
.thumb_set UART4_IRQHandler,Default_Handler
.weak UART5_IRQHandler
.thumb_set UART5_IRQHandler,Default_Handler
.weak DMA2_Channel1_IRQHandler
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
.weak DMA2_Channel2_IRQHandler
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
.weak DMA2_Channel3_IRQHandler
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
.weak DMA2_Channel4_IRQHandler
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
.weak DMA2_Channel5_IRQHandler
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stm32_modbus_workshop-master/Debug/ 0000775 0000000 0000000 00000000000 14016416642 0017656 5 ustar 00root root 0000000 0000000 stm32_modbus_workshop-master/Debug/Core/ 0000775 0000000 0000000 00000000000 14016416642 0020546 5 ustar 00root root 0000000 0000000 stm32_modbus_workshop-master/Debug/Core/Src/ 0000775 0000000 0000000 00000000000 14016416642 0021275 5 ustar 00root root 0000000 0000000 stm32_modbus_workshop-master/Debug/Core/Src/main.su 0000664 0000000 0000000 00000000545 14016416642 0022576 0 ustar 00root root 0000000 0000000 main.c:72:5:main 16 static
main.c:130:6:SystemClock_Config 80 static
main.c:172:13:MX_TIM2_Init 48 static
main.c:230:13:MX_UART4_Init 8 static
main.c:263:13:MX_USART2_UART_Init 8 static
main.c:296:13:MX_GPIO_Init 48 static
main.c:325:6:PeriodicCallback 8 static
main.c:360:10:CRC16 24 static
main.c:380:6:Error_Handler 4 static,ignoring_inline_asm
stm32_modbus_workshop-master/Debug/Core/Src/stm32l1xx_hal_msp.su 0000664 0000000 0000000 00000000423 14016416642 0025135 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_msp.c:64:6:HAL_MspInit 24 static
stm32l1xx_hal_msp.c:89:6:HAL_TIM_Base_MspInit 24 static
stm32l1xx_hal_msp.c:114:6:HAL_TIM_Base_MspDeInit 16 static
stm32l1xx_hal_msp.c:139:6:HAL_UART_MspInit 56 static
stm32l1xx_hal_msp.c:202:6:HAL_UART_MspDeInit 16 static
stm32_modbus_workshop-master/Debug/Core/Src/stm32l1xx_it.su 0000664 0000000 0000000 00000001004 14016416642 0024122 0 ustar 00root root 0000000 0000000 stm32l1xx_it.c:71:6:NMI_Handler 4 static
stm32l1xx_it.c:86:6:HardFault_Handler 4 static
stm32l1xx_it.c:101:6:MemManage_Handler 4 static
stm32l1xx_it.c:116:6:BusFault_Handler 4 static
stm32l1xx_it.c:131:6:UsageFault_Handler 4 static
stm32l1xx_it.c:146:6:SVC_Handler 4 static
stm32l1xx_it.c:159:6:DebugMon_Handler 4 static
stm32l1xx_it.c:172:6:PendSV_Handler 4 static
stm32l1xx_it.c:185:6:SysTick_Handler 8 static
stm32l1xx_it.c:206:6:TIM2_IRQHandler 8 static
stm32l1xx_it.c:220:6:UART4_IRQHandler 8 static
stm32_modbus_workshop-master/Debug/Core/Src/subdir.mk 0000664 0000000 0000000 00000007241 14016416642 0023122 0 ustar 00root root 0000000 0000000 ################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../Core/Src/main.c \
../Core/Src/stm32l1xx_hal_msp.c \
../Core/Src/stm32l1xx_it.c \
../Core/Src/syscalls.c \
../Core/Src/sysmem.c \
../Core/Src/system_stm32l1xx.c
OBJS += \
./Core/Src/main.o \
./Core/Src/stm32l1xx_hal_msp.o \
./Core/Src/stm32l1xx_it.o \
./Core/Src/syscalls.o \
./Core/Src/sysmem.o \
./Core/Src/system_stm32l1xx.o
C_DEPS += \
./Core/Src/main.d \
./Core/Src/stm32l1xx_hal_msp.d \
./Core/Src/stm32l1xx_it.d \
./Core/Src/syscalls.d \
./Core/Src/sysmem.d \
./Core/Src/system_stm32l1xx.d
# Each subdirectory must supply rules for building sources it contributes
Core/Src/main.o: ../Core/Src/main.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/stm32l1xx_hal_msp.o: ../Core/Src/stm32l1xx_hal_msp.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l1xx_hal_msp.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/stm32l1xx_it.o: ../Core/Src/stm32l1xx_it.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l1xx_it.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/syscalls.o: ../Core/Src/syscalls.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/sysmem.o: ../Core/Src/sysmem.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/system_stm32l1xx.o: ../Core/Src/system_stm32l1xx.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32l1xx.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
stm32_modbus_workshop-master/Debug/Core/Src/syscalls.su 0000664 0000000 0000000 00000001175 14016416642 0023507 0 ustar 00root root 0000000 0000000 syscalls.c:48:6:initialise_monitor_handles 4 static
syscalls.c:52:5:_getpid 4 static
syscalls.c:57:5:_kill 16 static
syscalls.c:63:6:_exit 16 static
syscalls.c:69:27:_read 32 static
syscalls.c:81:27:_write 32 static
syscalls.c:92:5:_close 16 static
syscalls.c:98:5:_fstat 16 static
syscalls.c:104:5:_isatty 16 static
syscalls.c:109:5:_lseek 24 static
syscalls.c:114:5:_open 12 static
syscalls.c:120:5:_wait 16 static
syscalls.c:126:5:_unlink 16 static
syscalls.c:132:5:_times 16 static
syscalls.c:137:5:_stat 16 static
syscalls.c:143:5:_link 16 static
syscalls.c:149:5:_fork 8 static
syscalls.c:155:5:_execve 24 static
stm32_modbus_workshop-master/Debug/Core/Src/sysmem.su 0000664 0000000 0000000 00000000037 14016416642 0023163 0 ustar 00root root 0000000 0000000 sysmem.c:54:7:_sbrk 32 static
stm32_modbus_workshop-master/Debug/Core/Src/system_stm32l1xx.su 0000664 0000000 0000000 00000000150 14016416642 0025033 0 ustar 00root root 0000000 0000000 system_stm32l1xx.c:140:6:SystemInit 4 static
system_stm32l1xx.c:191:6:SystemCoreClockUpdate 32 static
stm32_modbus_workshop-master/Debug/Core/Startup/ 0000775 0000000 0000000 00000000000 14016416642 0022210 5 ustar 00root root 0000000 0000000 stm32_modbus_workshop-master/Debug/Core/Startup/subdir.mk 0000664 0000000 0000000 00000001431 14016416642 0024030 0 ustar 00root root 0000000 0000000 ################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
S_SRCS += \
../Core/Startup/startup_stm32l152retx.s
OBJS += \
./Core/Startup/startup_stm32l152retx.o
S_DEPS += \
./Core/Startup/startup_stm32l152retx.d
# Each subdirectory must supply rules for building sources it contributes
Core/Startup/startup_stm32l152retx.o: ../Core/Startup/startup_stm32l152retx.s
arm-none-eabi-gcc -mcpu=cortex-m3 -g3 -c -x assembler-with-cpp -MMD -MP -MF"Core/Startup/startup_stm32l152retx.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@" "$<"
stm32_modbus_workshop-master/Debug/Drivers/ 0000775 0000000 0000000 00000000000 14016416642 0021274 5 ustar 00root root 0000000 0000000 stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/ 0000775 0000000 0000000 00000000000 14016416642 0024660 5 ustar 00root root 0000000 0000000 stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/ 0000775 0000000 0000000 00000000000 14016416642 0025407 5 ustar 00root root 0000000 0000000 stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.su 0000664 0000000 0000000 00000002357 14016416642 0030400 0 ustar 00root root 0000000 0000000 stm32l1xx_hal.c:140:19:HAL_Init 16 static
stm32l1xx_hal.c:173:19:HAL_DeInit 8 static
stm32l1xx_hal.c:196:13:HAL_MspInit 4 static
stm32l1xx_hal.c:207:13:HAL_MspDeInit 4 static
stm32l1xx_hal.c:230:26:HAL_InitTick 24 static
stm32l1xx_hal.c:298:13:HAL_IncTick 4 static
stm32l1xx_hal.c:309:17:HAL_GetTick 4 static
stm32l1xx_hal.c:318:10:HAL_GetTickPrio 4 static
stm32l1xx_hal.c:328:19:HAL_SetTickFreq 24 static
stm32l1xx_hal.c:360:10:HAL_GetTickFreq 4 static
stm32l1xx_hal.c:376:13:HAL_Delay 24 static
stm32l1xx_hal.c:402:13:HAL_SuspendTick 4 static
stm32l1xx_hal.c:418:13:HAL_ResumeTick 4 static
stm32l1xx_hal.c:428:10:HAL_GetHalVersion 4 static
stm32l1xx_hal.c:437:10:HAL_GetREVID 4 static
stm32l1xx_hal.c:446:10:HAL_GetDEVID 4 static
stm32l1xx_hal.c:455:10:HAL_GetUIDw0 4 static
stm32l1xx_hal.c:464:10:HAL_GetUIDw1 4 static
stm32l1xx_hal.c:473:10:HAL_GetUIDw2 4 static
stm32l1xx_hal.c:502:6:HAL_DBGMCU_EnableDBGSleepMode 4 static
stm32l1xx_hal.c:511:6:HAL_DBGMCU_DisableDBGSleepMode 4 static
stm32l1xx_hal.c:520:6:HAL_DBGMCU_EnableDBGStopMode 4 static
stm32l1xx_hal.c:529:6:HAL_DBGMCU_DisableDBGStopMode 4 static
stm32l1xx_hal.c:538:6:HAL_DBGMCU_EnableDBGStandbyMode 4 static
stm32l1xx_hal.c:547:6:HAL_DBGMCU_DisableDBGStandbyMode 4 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.su 0000664 0000000 0000000 00000003546 14016416642 0031765 0 ustar 00root root 0000000 0000000 core_cm3.h:1480:22:__NVIC_SetPriorityGrouping 24 static
core_cm3.h:1499:26:__NVIC_GetPriorityGrouping 4 static
core_cm3.h:1511:22:__NVIC_EnableIRQ 16 static
core_cm3.h:1547:22:__NVIC_DisableIRQ 16 static,ignoring_inline_asm
core_cm3.h:1566:26:__NVIC_GetPendingIRQ 16 static
core_cm3.h:1585:22:__NVIC_SetPendingIRQ 16 static
core_cm3.h:1600:22:__NVIC_ClearPendingIRQ 16 static
core_cm3.h:1617:26:__NVIC_GetActive 16 static
core_cm3.h:1639:22:__NVIC_SetPriority 16 static
core_cm3.h:1661:26:__NVIC_GetPriority 16 static
core_cm3.h:1686:26:NVIC_EncodePriority 40 static
core_cm3.h:1713:22:NVIC_DecodePriority 40 static
core_cm3.h:1762:34:__NVIC_SystemReset 4 static,ignoring_inline_asm
core_cm3.h:1834:26:SysTick_Config 16 static
stm32l1xx_hal_cortex.c:169:6:HAL_NVIC_SetPriorityGrouping 16 static
stm32l1xx_hal_cortex.c:191:6:HAL_NVIC_SetPriority 32 static
stm32l1xx_hal_cortex.c:213:6:HAL_NVIC_EnableIRQ 16 static
stm32l1xx_hal_cortex.c:229:6:HAL_NVIC_DisableIRQ 16 static
stm32l1xx_hal_cortex.c:242:6:HAL_NVIC_SystemReset 8 static
stm32l1xx_hal_cortex.c:255:10:HAL_SYSTICK_Config 16 static
stm32l1xx_hal_cortex.c:291:6:HAL_MPU_Enable 16 static,ignoring_inline_asm
stm32l1xx_hal_cortex.c:305:6:HAL_MPU_Disable 4 static,ignoring_inline_asm
stm32l1xx_hal_cortex.c:320:6:HAL_MPU_ConfigRegion 16 static
stm32l1xx_hal_cortex.c:364:10:HAL_NVIC_GetPriorityGrouping 8 static
stm32l1xx_hal_cortex.c:391:6:HAL_NVIC_GetPriority 24 static
stm32l1xx_hal_cortex.c:406:6:HAL_NVIC_SetPendingIRQ 16 static
stm32l1xx_hal_cortex.c:421:10:HAL_NVIC_GetPendingIRQ 16 static
stm32l1xx_hal_cortex.c:434:6:HAL_NVIC_ClearPendingIRQ 16 static
stm32l1xx_hal_cortex.c:448:10:HAL_NVIC_GetActive 16 static
stm32l1xx_hal_cortex.c:462:6:HAL_SYSTICK_CLKSourceConfig 16 static
stm32l1xx_hal_cortex.c:480:6:HAL_SYSTICK_IRQHandler 8 static
stm32l1xx_hal_cortex.c:489:13:HAL_SYSTICK_Callback 4 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.su 0000664 0000000 0000000 00000001326 14016416642 0031214 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_dma.c:143:19:HAL_DMA_Init 24 static
stm32l1xx_hal_dma.c:222:19:HAL_DMA_DeInit 16 static
stm32l1xx_hal_dma.c:314:19:HAL_DMA_Start 32 static
stm32l1xx_hal_dma.c:357:19:HAL_DMA_Start_IT 32 static
stm32l1xx_hal_dma.c:412:19:HAL_DMA_Abort 24 static
stm32l1xx_hal_dma.c:453:19:HAL_DMA_Abort_IT 24 static
stm32l1xx_hal_dma.c:498:19:HAL_DMA_PollForTransfer 32 static
stm32l1xx_hal_dma.c:599:6:HAL_DMA_IRQHandler 24 static
stm32l1xx_hal_dma.c:696:19:HAL_DMA_RegisterCallback 32 static
stm32l1xx_hal_dma.c:747:19:HAL_DMA_UnRegisterCallback 24 static
stm32l1xx_hal_dma.c:825:22:HAL_DMA_GetState 16 static
stm32l1xx_hal_dma.c:837:10:HAL_DMA_GetError 16 static
stm32l1xx_hal_dma.c:863:13:DMA_SetConfig 24 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.su 0000664 0000000 0000000 00000001043 14016416642 0031420 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_exti.c:143:19:HAL_EXTI_SetConfigLine 32 static
stm32l1xx_hal_exti.c:238:19:HAL_EXTI_GetConfigLine 32 static
stm32l1xx_hal_exti.c:327:19:HAL_EXTI_ClearConfigLine 32 static
stm32l1xx_hal_exti.c:380:19:HAL_EXTI_RegisterCallback 32 static
stm32l1xx_hal_exti.c:405:19:HAL_EXTI_GetHandle 16 static
stm32l1xx_hal_exti.c:445:6:HAL_EXTI_IRQHandler 24 static
stm32l1xx_hal_exti.c:477:10:HAL_EXTI_GetPending 32 static
stm32l1xx_hal_exti.c:506:6:HAL_EXTI_ClearPending 24 static
stm32l1xx_hal_exti.c:527:6:HAL_EXTI_GenerateSWI 24 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.su 0000664 0000000 0000000 00000001432 14016416642 0031546 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_flash.c:231:19:HAL_FLASH_Program 32 static
stm32l1xx_hal_flash.c:273:19:HAL_FLASH_Program_IT 32 static
stm32l1xx_hal_flash.c:304:6:HAL_FLASH_IRQHandler 16 static
stm32l1xx_hal_flash.c:419:13:HAL_FLASH_EndOfOperationCallback 16 static
stm32l1xx_hal_flash.c:436:13:HAL_FLASH_OperationErrorCallback 16 static
stm32l1xx_hal_flash.c:469:19:HAL_FLASH_Unlock 4 static
stm32l1xx_hal_flash.c:504:19:HAL_FLASH_Lock 4 static
stm32l1xx_hal_flash.c:516:19:HAL_FLASH_OB_Unlock 4 static
stm32l1xx_hal_flash.c:552:19:HAL_FLASH_OB_Lock 4 static
stm32l1xx_hal_flash.c:565:19:HAL_FLASH_OB_Launch 8 static
stm32l1xx_hal_flash.c:597:10:HAL_FLASH_GetError 4 static
stm32l1xx_hal_flash.c:619:19:FLASH_WaitForLastOperation 24 static
stm32l1xx_hal_flash.c:669:13:FLASH_SetErrorCode 16 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.su 0000664 0000000 0000000 00000004150 14016416642 0032242 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_flash_ex.c:187:19:HAL_FLASHEx_Erase 24 static
stm32l1xx_hal_flash_ex.c:283:19:HAL_FLASHEx_Erase_IT 24 static
stm32l1xx_hal_flash_ex.c:406:19:HAL_FLASHEx_OBProgram 24 static
stm32l1xx_hal_flash_ex.c:488:6:HAL_FLASHEx_OBGetConfig 16 static
stm32l1xx_hal_flash_ex.c:542:19:HAL_FLASHEx_AdvOBProgram 24 static
stm32l1xx_hal_flash_ex.c:599:6:HAL_FLASHEx_AdvOBGetConfig 16 static
stm32l1xx_hal_flash_ex.c:751:19:HAL_FLASHEx_DATAEEPROM_Unlock 4 static
stm32l1xx_hal_flash_ex.c:770:19:HAL_FLASHEx_DATAEEPROM_Lock 4 static
stm32l1xx_hal_flash_ex.c:790:19:HAL_FLASHEx_DATAEEPROM_Erase 24 static
stm32l1xx_hal_flash_ex.c:848:21:HAL_FLASHEx_DATAEEPROM_Program 32 static
stm32l1xx_hal_flash_ex.c:913:6:HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram 4 static
stm32l1xx_hal_flash_ex.c:922:6:HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram 4 static
stm32l1xx_hal_flash_ex.c:958:26:FLASH_OB_RDPConfig 32 static
stm32l1xx_hal_flash_ex.c:1022:26:FLASH_OB_BORConfig 32 static
stm32l1xx_hal_flash_ex.c:1060:16:FLASH_OB_GetUser 4 static
stm32l1xx_hal_flash_ex.c:1074:16:FLASH_OB_GetRDP 16 static
stm32l1xx_hal_flash_ex.c:1092:16:FLASH_OB_GetBOR 4 static
stm32l1xx_hal_flash_ex.c:1106:26:FLASH_OB_WRPConfig 24 static
stm32l1xx_hal_flash_ex.c:1237:13:FLASH_OB_WRPConfigWRP1OrPCROP1 32 static
stm32l1xx_hal_flash_ex.c:1283:13:FLASH_OB_WRPConfigWRP2OrPCROP2 32 static
stm32l1xx_hal_flash_ex.c:1329:13:FLASH_OB_WRPConfigWRP3 32 static
stm32l1xx_hal_flash_ex.c:1374:13:FLASH_OB_WRPConfigWRP4 32 static
stm32l1xx_hal_flash_ex.c:1424:26:FLASH_OB_UserConfig 32 static
stm32l1xx_hal_flash_ex.c:1477:26:FLASH_OB_BootConfig 32 static
stm32l1xx_hal_flash_ex.c:1526:26:FLASH_DATAEEPROM_FastProgramByte 24 static
stm32l1xx_hal_flash_ex.c:1586:26:FLASH_DATAEEPROM_FastProgramHalfWord 24 static
stm32l1xx_hal_flash_ex.c:1654:26:FLASH_DATAEEPROM_FastProgramWord 24 static
stm32l1xx_hal_flash_ex.c:1685:26:FLASH_DATAEEPROM_ProgramByte 24 static
stm32l1xx_hal_flash_ex.c:1739:26:FLASH_DATAEEPROM_ProgramHalfWord 24 static
stm32l1xx_hal_flash_ex.c:1800:26:FLASH_DATAEEPROM_ProgramWord 24 static
stm32l1xx_hal_flash_ex.c:1845:6:FLASH_PageErase 16 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.su 0000664 0000000 0000000 00000001544 14016416642 0033265 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_flash_ramfunc.c:115:30:HAL_FLASHEx_EnableRunPowerDown 4 static
stm32l1xx_hal_flash_ramfunc.c:128:30:HAL_FLASHEx_DisableRunPowerDown 4 static
stm32l1xx_hal_flash_ramfunc.c:165:30:HAL_FLASHEx_EraseParallelPage 24 static
stm32l1xx_hal_flash_ramfunc.c:226:30:HAL_FLASHEx_ProgramParallelHalfPage 48 static,ignoring_inline_asm
stm32l1xx_hal_flash_ramfunc.c:304:30:HAL_FLASHEx_HalfPageProgram 40 static,ignoring_inline_asm
stm32l1xx_hal_flash_ramfunc.c:396:30:HAL_FLASHEx_GetError 16 static
stm32l1xx_hal_flash_ramfunc.c:428:30:HAL_FLASHEx_DATAEEPROM_EraseDoubleWord 32 static,ignoring_inline_asm
stm32l1xx_hal_flash_ramfunc.c:488:30:HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord 48 static,ignoring_inline_asm
stm32l1xx_hal_flash_ramfunc.c:588:37:FLASHRAM_WaitForLastOperation 16 static
stm32l1xx_hal_flash_ramfunc.c:542:37:FLASHRAM_SetErrorCode 16 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.su 0000664 0000000 0000000 00000000710 14016416642 0031405 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_gpio.c:178:6:HAL_GPIO_Init 32 static
stm32l1xx_hal_gpio.c:304:6:HAL_GPIO_DeInit 32 static
stm32l1xx_hal_gpio.c:384:15:HAL_GPIO_ReadPin 24 static
stm32l1xx_hal_gpio.c:416:6:HAL_GPIO_WritePin 16 static
stm32l1xx_hal_gpio.c:438:6:HAL_GPIO_TogglePin 24 static
stm32l1xx_hal_gpio.c:472:19:HAL_GPIO_LockPin 24 static
stm32l1xx_hal_gpio.c:507:6:HAL_GPIO_EXTI_IRQHandler 16 static
stm32l1xx_hal_gpio.c:522:13:HAL_GPIO_EXTI_Callback 16 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.su 0000664 0000000 0000000 00000002241 14016416642 0031260 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_pwr.c:85:6:HAL_PWR_DeInit 4 static
stm32l1xx_hal_pwr.c:98:6:HAL_PWR_EnableBkUpAccess 16 static,ignoring_inline_asm
stm32l1xx_hal_pwr.c:111:6:HAL_PWR_DisableBkUpAccess 16 static,ignoring_inline_asm
stm32l1xx_hal_pwr.c:339:6:HAL_PWR_ConfigPVD 16 static
stm32l1xx_hal_pwr.c:381:6:HAL_PWR_EnablePVD 16 static,ignoring_inline_asm
stm32l1xx_hal_pwr.c:391:6:HAL_PWR_DisablePVD 16 static,ignoring_inline_asm
stm32l1xx_hal_pwr.c:406:6:HAL_PWR_EnableWakeUpPin 24 static,ignoring_inline_asm
stm32l1xx_hal_pwr.c:423:6:HAL_PWR_DisableWakeUpPin 24 static,ignoring_inline_asm
stm32l1xx_hal_pwr.c:446:6:HAL_PWR_EnterSLEEPMode 16 static,ignoring_inline_asm
stm32l1xx_hal_pwr.c:492:6:HAL_PWR_EnterSTOPMode 16 static,ignoring_inline_asm
stm32l1xx_hal_pwr.c:532:6:HAL_PWR_EnterSTANDBYMode 4 static,ignoring_inline_asm
stm32l1xx_hal_pwr.c:557:6:HAL_PWR_EnableSleepOnExit 4 static
stm32l1xx_hal_pwr.c:570:6:HAL_PWR_DisableSleepOnExit 4 static
stm32l1xx_hal_pwr.c:583:6:HAL_PWR_EnableSEVOnPend 4 static
stm32l1xx_hal_pwr.c:596:6:HAL_PWR_DisableSEVOnPend 4 static
stm32l1xx_hal_pwr.c:609:6:HAL_PWR_PVD_IRQHandler 8 static
stm32l1xx_hal_pwr.c:626:13:HAL_PWR_PVDCallback 4 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.su 0000664 0000000 0000000 00000001134 14016416642 0031754 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_pwr_ex.c:66:10:HAL_PWREx_GetVoltageRange 4 static
stm32l1xx_hal_pwr_ex.c:79:6:HAL_PWREx_EnableFastWakeUp 16 static,ignoring_inline_asm
stm32l1xx_hal_pwr_ex.c:89:6:HAL_PWREx_DisableFastWakeUp 16 static,ignoring_inline_asm
stm32l1xx_hal_pwr_ex.c:99:6:HAL_PWREx_EnableUltraLowPower 16 static,ignoring_inline_asm
stm32l1xx_hal_pwr_ex.c:109:6:HAL_PWREx_DisableUltraLowPower 16 static,ignoring_inline_asm
stm32l1xx_hal_pwr_ex.c:125:6:HAL_PWREx_EnableLowPowerRunMode 24 static,ignoring_inline_asm
stm32l1xx_hal_pwr_ex.c:136:19:HAL_PWREx_DisableLowPowerRunMode 24 static,ignoring_inline_asm
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.su 0000664 0000000 0000000 00000001562 14016416642 0031224 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_rcc.c:228:19:HAL_RCC_DeInit 16 static
stm32l1xx_hal_rcc.c:324:19:HAL_RCC_OscConfig 40 static
stm32l1xx_hal_rcc.c:799:19:HAL_RCC_ClockConfig 24 static
stm32l1xx_hal_rcc.c:1005:6:HAL_RCC_MCOConfig 48 static
stm32l1xx_hal_rcc.c:1039:6:HAL_RCC_EnableCSS 4 static
stm32l1xx_hal_rcc.c:1048:6:HAL_RCC_DisableCSS 4 static
stm32l1xx_hal_rcc.c:1083:10:HAL_RCC_GetSysClockFreq 48 static
stm32l1xx_hal_rcc.c:1139:10:HAL_RCC_GetHCLKFreq 4 static
stm32l1xx_hal_rcc.c:1150:10:HAL_RCC_GetPCLK1Freq 8 static
stm32l1xx_hal_rcc.c:1162:10:HAL_RCC_GetPCLK2Freq 8 static
stm32l1xx_hal_rcc.c:1175:6:HAL_RCC_GetOscConfig 16 static
stm32l1xx_hal_rcc.c:1271:6:HAL_RCC_GetClockConfig 16 static
stm32l1xx_hal_rcc.c:1301:6:HAL_RCC_NMI_IRQHandler 8 static
stm32l1xx_hal_rcc.c:1318:13:HAL_RCC_CSSCallback 4 static
stm32l1xx_hal_rcc.c:1343:26:RCC_SetFlashLatencyFromMSIRange 32 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.su 0000664 0000000 0000000 00000001016 14016416642 0031712 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_rcc_ex.c:92:19:HAL_RCCEx_PeriphCLKConfig 32 static
stm32l1xx_hal_rcc_ex.c:221:6:HAL_RCCEx_GetPeriphCLKConfig 24 static
stm32l1xx_hal_rcc_ex.c:258:10:HAL_RCCEx_GetPeriphCLKFreq 24 static
stm32l1xx_hal_rcc_ex.c:350:6:HAL_RCCEx_EnableLSECSS 4 static
stm32l1xx_hal_rcc_ex.c:363:6:HAL_RCCEx_DisableLSECSS 4 static
stm32l1xx_hal_rcc_ex.c:377:6:HAL_RCCEx_EnableLSECSS_IT 4 static
stm32l1xx_hal_rcc_ex.c:394:6:HAL_RCCEx_LSECSS_IRQHandler 8 static
stm32l1xx_hal_rcc_ex.c:411:13:HAL_RCCEx_LSECSS_Callback 4 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.su 0000664 0000000 0000000 00000016224 14016416642 0031247 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_tim.c:267:19:HAL_TIM_Base_Init 16 static
stm32l1xx_hal_tim.c:325:19:HAL_TIM_Base_DeInit 16 static
stm32l1xx_hal_tim.c:367:13:HAL_TIM_Base_MspInit 16 static
stm32l1xx_hal_tim.c:382:13:HAL_TIM_Base_MspDeInit 16 static
stm32l1xx_hal_tim.c:398:19:HAL_TIM_Base_Start 24 static
stm32l1xx_hal_tim.c:437:19:HAL_TIM_Base_Stop 16 static
stm32l1xx_hal_tim.c:457:19:HAL_TIM_Base_Start_IT 24 static
stm32l1xx_hal_tim.c:499:19:HAL_TIM_Base_Stop_IT 16 static
stm32l1xx_hal_tim.c:524:19:HAL_TIM_Base_Start_DMA 32 static
stm32l1xx_hal_tim.c:591:19:HAL_TIM_Base_Stop_DMA 16 static
stm32l1xx_hal_tim.c:646:19:HAL_TIM_OC_Init 16 static
stm32l1xx_hal_tim.c:704:19:HAL_TIM_OC_DeInit 16 static
stm32l1xx_hal_tim.c:746:13:HAL_TIM_OC_MspInit 16 static
stm32l1xx_hal_tim.c:761:13:HAL_TIM_OC_MspDeInit 16 static
stm32l1xx_hal_tim.c:782:19:HAL_TIM_OC_Start 24 static
stm32l1xx_hal_tim.c:830:19:HAL_TIM_OC_Stop 16 static
stm32l1xx_hal_tim.c:859:19:HAL_TIM_OC_Start_IT 24 static
stm32l1xx_hal_tim.c:941:19:HAL_TIM_OC_Stop_IT 16 static
stm32l1xx_hal_tim.c:1006:19:HAL_TIM_OC_Start_DMA 32 static
stm32l1xx_hal_tim.c:1150:19:HAL_TIM_OC_Stop_DMA 16 static
stm32l1xx_hal_tim.c:1241:19:HAL_TIM_PWM_Init 16 static
stm32l1xx_hal_tim.c:1299:19:HAL_TIM_PWM_DeInit 16 static
stm32l1xx_hal_tim.c:1341:13:HAL_TIM_PWM_MspInit 16 static
stm32l1xx_hal_tim.c:1356:13:HAL_TIM_PWM_MspDeInit 16 static
stm32l1xx_hal_tim.c:1377:19:HAL_TIM_PWM_Start 24 static
stm32l1xx_hal_tim.c:1425:19:HAL_TIM_PWM_Stop 16 static
stm32l1xx_hal_tim.c:1454:19:HAL_TIM_PWM_Start_IT 24 static
stm32l1xx_hal_tim.c:1535:19:HAL_TIM_PWM_Stop_IT 16 static
stm32l1xx_hal_tim.c:1600:19:HAL_TIM_PWM_Start_DMA 32 static
stm32l1xx_hal_tim.c:1743:19:HAL_TIM_PWM_Stop_DMA 16 static
stm32l1xx_hal_tim.c:1834:19:HAL_TIM_IC_Init 16 static
stm32l1xx_hal_tim.c:1892:19:HAL_TIM_IC_DeInit 16 static
stm32l1xx_hal_tim.c:1934:13:HAL_TIM_IC_MspInit 16 static
stm32l1xx_hal_tim.c:1949:13:HAL_TIM_IC_MspDeInit 16 static
stm32l1xx_hal_tim.c:1970:19:HAL_TIM_IC_Start 24 static
stm32l1xx_hal_tim.c:2019:19:HAL_TIM_IC_Stop 16 static
stm32l1xx_hal_tim.c:2048:19:HAL_TIM_IC_Start_IT 24 static
stm32l1xx_hal_tim.c:2130:19:HAL_TIM_IC_Stop_IT 16 static
stm32l1xx_hal_tim.c:2195:19:HAL_TIM_IC_Start_DMA 32 static
stm32l1xx_hal_tim.c:2339:19:HAL_TIM_IC_Stop_DMA 16 static
stm32l1xx_hal_tim.c:2437:19:HAL_TIM_OnePulse_Init 16 static
stm32l1xx_hal_tim.c:2503:19:HAL_TIM_OnePulse_DeInit 16 static
stm32l1xx_hal_tim.c:2546:13:HAL_TIM_OnePulse_MspInit 16 static
stm32l1xx_hal_tim.c:2561:13:HAL_TIM_OnePulse_MspDeInit 16 static
stm32l1xx_hal_tim.c:2580:19:HAL_TIM_OnePulse_Start 24 static
stm32l1xx_hal_tim.c:2624:19:HAL_TIM_OnePulse_Stop 16 static
stm32l1xx_hal_tim.c:2658:19:HAL_TIM_OnePulse_Start_IT 24 static
stm32l1xx_hal_tim.c:2708:19:HAL_TIM_OnePulse_Stop_IT 16 static
stm32l1xx_hal_tim.c:2779:19:HAL_TIM_Encoder_Init 32 static
stm32l1xx_hal_tim.c:2891:19:HAL_TIM_Encoder_DeInit 16 static
stm32l1xx_hal_tim.c:2934:13:HAL_TIM_Encoder_MspInit 16 static
stm32l1xx_hal_tim.c:2949:13:HAL_TIM_Encoder_MspDeInit 16 static
stm32l1xx_hal_tim.c:2969:19:HAL_TIM_Encoder_Start 24 static
stm32l1xx_hal_tim.c:3053:19:HAL_TIM_Encoder_Stop 16 static
stm32l1xx_hal_tim.c:3110:19:HAL_TIM_Encoder_Start_IT 24 static
stm32l1xx_hal_tim.c:3200:19:HAL_TIM_Encoder_Stop_IT 16 static
stm32l1xx_hal_tim.c:3262:19:HAL_TIM_Encoder_Start_DMA 32 static
stm32l1xx_hal_tim.c:3452:19:HAL_TIM_Encoder_Stop_DMA 16 static
stm32l1xx_hal_tim.c:3526:6:HAL_TIM_IRQHandler 16 static
stm32l1xx_hal_tim.c:3714:19:HAL_TIM_OC_ConfigChannel 24 static
stm32l1xx_hal_tim.c:3790:19:HAL_TIM_IC_ConfigChannel 24 static
stm32l1xx_hal_tim.c:3883:19:HAL_TIM_PWM_ConfigChannel 24 static
stm32l1xx_hal_tim.c:3994:19:HAL_TIM_OnePulse_ConfigChannel 40 static
stm32l1xx_hal_tim.c:4128:19:HAL_TIM_DMABurst_WriteStart 32 static
stm32l1xx_hal_tim.c:4172:19:HAL_TIM_DMABurst_MultiWriteStart 24 static
stm32l1xx_hal_tim.c:4325:19:HAL_TIM_DMABurst_WriteStop 24 static
stm32l1xx_hal_tim.c:4417:19:HAL_TIM_DMABurst_ReadStart 32 static
stm32l1xx_hal_tim.c:4461:19:HAL_TIM_DMABurst_MultiReadStart 24 static
stm32l1xx_hal_tim.c:4615:19:HAL_TIM_DMABurst_ReadStop 24 static
stm32l1xx_hal_tim.c:4686:19:HAL_TIM_GenerateEvent 16 static
stm32l1xx_hal_tim.c:4723:19:HAL_TIM_ConfigOCrefClear 24 static
stm32l1xx_hal_tim.c:4856:19:HAL_TIM_ConfigClockSource 24 static
stm32l1xx_hal_tim.c:5008:19:HAL_TIM_ConfigTI1Input 24 static
stm32l1xx_hal_tim.c:5040:19:HAL_TIM_SlaveConfigSynchro 16 static
stm32l1xx_hal_tim.c:5080:19:HAL_TIM_SlaveConfigSynchro_IT 16 static
stm32l1xx_hal_tim.c:5123:10:HAL_TIM_ReadCapturedValue 24 static
stm32l1xx_hal_tim.c:5207:13:HAL_TIM_PeriodElapsedCallback 16 static
stm32l1xx_hal_tim.c:5222:13:HAL_TIM_PeriodElapsedHalfCpltCallback 16 static
stm32l1xx_hal_tim.c:5237:13:HAL_TIM_OC_DelayElapsedCallback 16 static
stm32l1xx_hal_tim.c:5252:13:HAL_TIM_IC_CaptureCallback 16 static
stm32l1xx_hal_tim.c:5267:13:HAL_TIM_IC_CaptureHalfCpltCallback 16 static
stm32l1xx_hal_tim.c:5282:13:HAL_TIM_PWM_PulseFinishedCallback 16 static
stm32l1xx_hal_tim.c:5297:13:HAL_TIM_PWM_PulseFinishedHalfCpltCallback 16 static
stm32l1xx_hal_tim.c:5312:13:HAL_TIM_TriggerCallback 16 static
stm32l1xx_hal_tim.c:5327:13:HAL_TIM_TriggerHalfCpltCallback 16 static
stm32l1xx_hal_tim.c:5342:13:HAL_TIM_ErrorCallback 16 static
stm32l1xx_hal_tim.c:5793:22:HAL_TIM_Base_GetState 16 static
stm32l1xx_hal_tim.c:5803:22:HAL_TIM_OC_GetState 16 static
stm32l1xx_hal_tim.c:5813:22:HAL_TIM_PWM_GetState 16 static
stm32l1xx_hal_tim.c:5823:22:HAL_TIM_IC_GetState 16 static
stm32l1xx_hal_tim.c:5833:22:HAL_TIM_OnePulse_GetState 16 static
stm32l1xx_hal_tim.c:5843:22:HAL_TIM_Encoder_GetState 16 static
stm32l1xx_hal_tim.c:5853:23:HAL_TIM_GetActiveChannel 16 static
stm32l1xx_hal_tim.c:5871:29:HAL_TIM_GetChannelState 24 static
stm32l1xx_hal_tim.c:5888:30:HAL_TIM_DMABurstState 16 static
stm32l1xx_hal_tim.c:5913:6:TIM_DMAError 24 static
stm32l1xx_hal_tim.c:5956:6:TIM_DMADelayPulseCplt 24 static
stm32l1xx_hal_tim.c:6015:6:TIM_DMADelayPulseHalfCplt 24 static
stm32l1xx_hal_tim.c:6054:6:TIM_DMACaptureCplt 24 static
stm32l1xx_hal_tim.c:6113:6:TIM_DMACaptureHalfCplt 24 static
stm32l1xx_hal_tim.c:6152:13:TIM_DMAPeriodElapsedCplt 24 static
stm32l1xx_hal_tim.c:6173:13:TIM_DMAPeriodElapsedHalfCplt 24 static
stm32l1xx_hal_tim.c:6189:13:TIM_DMATriggerCplt 24 static
stm32l1xx_hal_tim.c:6210:13:TIM_DMATriggerHalfCplt 24 static
stm32l1xx_hal_tim.c:6227:6:TIM_Base_SetConfig 24 static
stm32l1xx_hal_tim.c:6269:13:TIM_OC1_SetConfig 32 static
stm32l1xx_hal_tim.c:6316:13:TIM_OC2_SetConfig 32 static
stm32l1xx_hal_tim.c:6364:13:TIM_OC3_SetConfig 32 static
stm32l1xx_hal_tim.c:6411:13:TIM_OC4_SetConfig 32 static
stm32l1xx_hal_tim.c:6459:26:TIM_SlaveTimer_SetConfig 32 static
stm32l1xx_hal_tim.c:6590:13:TIM_TI1_SetConfig 32 static
stm32l1xx_hal_tim.c:6637:13:TIM_TI1_ConfigInputStage 32 static
stm32l1xx_hal_tim.c:6680:13:TIM_TI2_SetConfig 32 static
stm32l1xx_hal_tim.c:6720:13:TIM_TI2_ConfigInputStage 32 static
stm32l1xx_hal_tim.c:6763:13:TIM_TI3_SetConfig 32 static
stm32l1xx_hal_tim.c:6811:13:TIM_TI4_SetConfig 32 static
stm32l1xx_hal_tim.c:6854:13:TIM_ITRx_SetConfig 24 static
stm32l1xx_hal_tim.c:6884:13:TIM_ETR_SetConfig 32 static
stm32l1xx_hal_tim.c:6914:13:TIM_CCxChannelCmd 32 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.su 0000664 0000000 0000000 00000000215 14016416642 0031734 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_tim_ex.c:83:19:HAL_TIMEx_MasterConfigSynchronization 24 static
stm32l1xx_hal_tim_ex.c:194:19:HAL_TIMEx_RemapConfig 16 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.su 0000664 0000000 0000000 00000006502 14016416642 0031427 0 ustar 00root root 0000000 0000000 stm32l1xx_hal_uart.c:313:19:HAL_UART_Init 16 static
stm32l1xx_hal_uart.c:388:19:HAL_HalfDuplex_Init 16 static
stm32l1xx_hal_uart.c:461:19:HAL_LIN_Init 16 static
stm32l1xx_hal_uart.c:542:19:HAL_MultiProcessor_Init 24 static
stm32l1xx_hal_uart.c:619:19:HAL_UART_DeInit 16 static
stm32l1xx_hal_uart.c:663:13:HAL_UART_MspInit 16 static
stm32l1xx_hal_uart.c:678:13:HAL_UART_MspDeInit 16 static
stm32l1xx_hal_uart.c:1018:19:HAL_UART_Transmit 40 static
stm32l1xx_hal_uart.c:1104:19:HAL_UART_Receive 40 static
stm32l1xx_hal_uart.c:1195:19:HAL_UART_Transmit_IT 24 static
stm32l1xx_hal_uart.c:1240:19:HAL_UART_Receive_IT 24 static
stm32l1xx_hal_uart.c:1291:19:HAL_UART_Transmit_DMA 32 static
stm32l1xx_hal_uart.c:1359:19:HAL_UART_Receive_DMA 32 static
stm32l1xx_hal_uart.c:1426:19:HAL_UART_DMAPause 24 static
stm32l1xx_hal_uart.c:1463:19:HAL_UART_DMAResume 24 static
stm32l1xx_hal_uart.c:1499:19:HAL_UART_DMAStop 24 static
stm32l1xx_hal_uart.c:1551:19:HAL_UART_Abort 16 static
stm32l1xx_hal_uart.c:1633:19:HAL_UART_AbortTransmit 16 static
stm32l1xx_hal_uart.c:1684:19:HAL_UART_AbortReceive 16 static
stm32l1xx_hal_uart.c:1738:19:HAL_UART_Abort_IT 24 static
stm32l1xx_hal_uart.c:1866:19:HAL_UART_AbortTransmit_IT 16 static
stm32l1xx_hal_uart.c:1943:19:HAL_UART_AbortReceive_IT 16 static
stm32l1xx_hal_uart.c:2013:6:HAL_UART_IRQHandler 40 static
stm32l1xx_hal_uart.c:2159:13:HAL_UART_TxCpltCallback 16 static
stm32l1xx_hal_uart.c:2174:13:HAL_UART_TxHalfCpltCallback 16 static
stm32l1xx_hal_uart.c:2189:13:HAL_UART_RxCpltCallback 16 static
stm32l1xx_hal_uart.c:2204:13:HAL_UART_RxHalfCpltCallback 16 static
stm32l1xx_hal_uart.c:2219:13:HAL_UART_ErrorCallback 16 static
stm32l1xx_hal_uart.c:2233:13:HAL_UART_AbortCpltCallback 16 static
stm32l1xx_hal_uart.c:2248:13:HAL_UART_AbortTransmitCpltCallback 16 static
stm32l1xx_hal_uart.c:2263:13:HAL_UART_AbortReceiveCpltCallback 16 static
stm32l1xx_hal_uart.c:2302:19:HAL_LIN_SendBreak 16 static
stm32l1xx_hal_uart.c:2329:19:HAL_MultiProcessor_EnterMuteMode 16 static
stm32l1xx_hal_uart.c:2356:19:HAL_MultiProcessor_ExitMuteMode 16 static
stm32l1xx_hal_uart.c:2383:19:HAL_HalfDuplex_EnableTransmitter 24 static
stm32l1xx_hal_uart.c:2418:19:HAL_HalfDuplex_EnableReceiver 24 static
stm32l1xx_hal_uart.c:2475:23:HAL_UART_GetState 24 static
stm32l1xx_hal_uart.c:2490:10:HAL_UART_GetError 16 static
stm32l1xx_hal_uart.c:2534:13:UART_DMATransmitCplt 24 static
stm32l1xx_hal_uart.c:2569:13:UART_DMATxHalfCplt 24 static
stm32l1xx_hal_uart.c:2588:13:UART_DMAReceiveCplt 24 static
stm32l1xx_hal_uart.c:2622:13:UART_DMARxHalfCplt 24 static
stm32l1xx_hal_uart.c:2641:13:UART_DMAError 24 static
stm32l1xx_hal_uart.c:2682:26:UART_WaitOnFlagUntilTimeout 24 static
stm32l1xx_hal_uart.c:2714:13:UART_EndTxTransfer 16 static
stm32l1xx_hal_uart.c:2728:13:UART_EndRxTransfer 16 static
stm32l1xx_hal_uart.c:2745:13:UART_DMAAbortOnError 24 static
stm32l1xx_hal_uart.c:2769:13:UART_DMATxAbortCallback 24 static
stm32l1xx_hal_uart.c:2814:13:UART_DMARxAbortCallback 24 static
stm32l1xx_hal_uart.c:2859:13:UART_DMATxOnlyAbortCallback 24 static
stm32l1xx_hal_uart.c:2887:13:UART_DMARxOnlyAbortCallback 24 static
stm32l1xx_hal_uart.c:2912:26:UART_Transmit_IT 24 static
stm32l1xx_hal_uart.c:2959:26:UART_EndTransmit_IT 16 static
stm32l1xx_hal_uart.c:2984:26:UART_Receive_IT 24 static
stm32l1xx_hal_uart.c:3055:13:UART_SetConfig 24 static
stm32_modbus_workshop-master/Debug/Drivers/STM32L1xx_HAL_Driver/Src/subdir.mk 0000664 0000000 0000000 00000026616 14016416642 0027243 0 ustar 00root root 0000000 0000000 ################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.c \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.c
OBJS += \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.o \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o
C_DEPS += \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.d \
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.d
# Each subdirectory must supply rules for building sources it contributes
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
stm32_modbus_workshop-master/Debug/makefile 0000664 0000000 0000000 00000005263 14016416642 0021364 0 ustar 00root root 0000000 0000000 ################################################################################
# Automatically-generated file. Do not edit!
################################################################################
-include ../makefile.init
RM := rm -rf
# All of the sources participating in the build are defined here
-include sources.mk
-include Drivers/STM32L1xx_HAL_Driver/Src/subdir.mk
-include Core/Startup/subdir.mk
-include Core/Src/subdir.mk
-include subdir.mk
-include objects.mk
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(S_DEPS)),)
-include $(S_DEPS)
endif
ifneq ($(strip $(S_UPPER_DEPS)),)
-include $(S_UPPER_DEPS)
endif
ifneq ($(strip $(C_DEPS)),)
-include $(C_DEPS)
endif
endif
-include ../makefile.defs
BUILD_ARTIFACT_NAME := modbus_01
BUILD_ARTIFACT_EXTENSION := elf
BUILD_ARTIFACT_PREFIX :=
BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME).$(BUILD_ARTIFACT_EXTENSION)
# Add inputs and outputs from these tool invocations to the build variables
EXECUTABLES += \
modbus_01.elf \
SIZE_OUTPUT += \
default.size.stdout \
OBJDUMP_LIST += \
modbus_01.list \
OBJCOPY_BIN += \
modbus_01.bin \
# All Target
all: main-build
# Main-build Target
main-build: modbus_01.elf secondary-outputs
# Tool invocations
modbus_01.elf: $(OBJS) $(USER_OBJS) E:\Documents\dev\cubeIDE\workspace2\modbus_01\STM32L152RETX_FLASH.ld
arm-none-eabi-gcc -o "modbus_01.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m3 -T"E:\Documents\dev\cubeIDE\workspace2\modbus_01\STM32L152RETX_FLASH.ld" --specs=nosys.specs -Wl,-Map="modbus_01.map" -Wl,--gc-sections -static --specs=nano.specs -mfloat-abi=soft -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
@echo 'Finished building target: $@'
@echo ' '
default.size.stdout: $(EXECUTABLES)
arm-none-eabi-size $(EXECUTABLES)
@echo 'Finished building: $@'
@echo ' '
modbus_01.list: $(EXECUTABLES)
arm-none-eabi-objdump -h -S $(EXECUTABLES) > "modbus_01.list"
@echo 'Finished building: $@'
@echo ' '
modbus_01.bin: $(EXECUTABLES)
arm-none-eabi-objcopy -O binary $(EXECUTABLES) "modbus_01.bin"
@echo 'Finished building: $@'
@echo ' '
# Other Targets
clean:
-$(RM) *
-@echo ' '
secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST) $(OBJCOPY_BIN)
fail-specified-linker-script-missing:
@echo 'Error: Cannot find the specified linker script. Check the linker settings in the build configuration.'
@exit 2
warn-no-linker-script-specified:
@echo 'Warning: No linker script specified. Check the linker settings in the build configuration.'
.PHONY: all clean dependents fail-specified-linker-script-missing warn-no-linker-script-specified
.SECONDARY:
-include ../makefile.targets
stm32_modbus_workshop-master/Debug/modbus_01.bin 0000664 0000000 0000000 00000032274 14016416642 0022151 0 ustar 00root root 0000000 0000000 @ = ©
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