/**************************************************************************** * configs/hn70ap/scripts/ld.script * * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * Copyright (C) 2017 Sebastien Lorquet. All rights reserved. * Author: Sebastien Lorquet * * Modified 11/4/2013 for STM32F429 support * * (slorquet) Modified Aug 8, 2017 for bootloader support. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************/ /* The STM32F429ZIT6 has 2048Kb of FLASH beginning at address 0x0800:0000 and * 256Kb of SRAM. SRAM is split up into four blocks: * * 1) 112Kb of SRAM beginning at address 0x2000:0000 * 2) 16Kb of SRAM beginning at address 0x2001:c000 * 3) 64Kb of SRAM beginning at address 0x2002:0000 * 4) 64Kb of CCM SRAM beginning at address 0x1000:0000 * * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 * where the code expects to begin execution by jumping to the entry point in * the 0x0800:0000 address * range. */ MEMORY { boot (rx) : ORIGIN = 0x08000000, LENGTH = 16K flash (rx) : ORIGIN = 0x08004000, LENGTH = 2032K sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K } OUTPUT_ARCH(arm) ENTRY(_stext) EXTERN(__boot_vectors) SECTIONS { .boot : { _sboot = ABSOLUTE(.); *(.boot.vectors) *(.boot.text .boot.text.*) *(.boot.rodata .boot.rodata.*) _eboot = ABSOLUTE(.); } > boot .text : { _stext = ABSOLUTE(.); *(.vectors) *(.text .text.*) *(.fixup) *(.gnu.warning) *(.rodata .rodata.*) *(.gnu.linkonce.t.*) *(.glue_7) *(.glue_7t) *(.got) *(.gcc_except_table) *(.gnu.linkonce.r.*) _etext = ABSOLUTE(.); } > flash .init_section : { _sinit = ABSOLUTE(.); *(.init_array .init_array.*) _einit = ABSOLUTE(.); } > flash .ARM.extab : { *(.ARM.extab*) } > flash __exidx_start = ABSOLUTE(.); .ARM.exidx : { *(.ARM.exidx*) } > flash __exidx_end = ABSOLUTE(.); _eronly = ABSOLUTE(.); .data : { _sdata = ABSOLUTE(.); *(.data .data.*) *(.gnu.linkonce.d.*) CONSTRUCTORS _edata = ABSOLUTE(.); } > sram AT > flash .bss : { _sbss = ABSOLUTE(.); *(.bss .bss.*) *(.gnu.linkonce.b.*) *(COMMON) _ebss = ABSOLUTE(.); } > sram /* This section is OVERLAYED over the normal data/bss so that: * - the bootloader BSS does not consume any useful memory for the app. * - the initial stack pointer of the bootloader does NOT depend on vars * added in the application! */ .bootbss _sdata (OVERLAY) : { _sbootbss = ABSOLUTE(.); *(.boot.bss .boot.bss.*) _ebootbss = ABSOLUTE(.); . = ABSOLUTE(ALIGN(4)); _bootstack = .; } > sram /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } .stab.excl 0 : { *(.stab.excl) } .stab.exclstr 0 : { *(.stab.exclstr) } .stab.index 0 : { *(.stab.index) } .stab.indexstr 0 : { *(.stab.indexstr) } .comment 0 : { *(.comment) } .debug_abbrev 0 : { *(.debug_abbrev) } .debug_info 0 : { *(.debug_info) } .debug_line 0 : { *(.debug_line) } .debug_pubnames 0 : { *(.debug_pubnames) } .debug_aranges 0 : { *(.debug_aranges) } }