diff --git a/arch/arm/src/sam3u/Make.defs b/arch/arm/src/sam3u/Make.defs
index b63b9017a6ce2aaecbe54bd4afde5e04a47f24c0..2e7fd965a4912ce121ac4db2bebf06c588f26c28 100755
--- a/arch/arm/src/sam3u/Make.defs
+++ b/arch/arm/src/sam3u/Make.defs
@@ -1,7 +1,7 @@
############################################################################
# arch/arm/src/sam3u/Make.defs
#
-# Copyright (C) 2009 Gregory Nutt. All rights reserved.
+# Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
#
# Redistribution and use in source and binary forms, with or without
@@ -46,5 +46,5 @@ CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
CHIP_ASRCS =
CHIP_CSRCS = sam3u_clockconfig.c sam3u_irq.c sam3u_lowputc.c sam3u_pio.c \
- sam3u_start.c sam3u_timerisr.c
+ sam3u_serial.c sam3u_start.c sam3u_timerisr.c
diff --git a/arch/arm/src/sam3u/sam3u_lowputc.c b/arch/arm/src/sam3u/sam3u_lowputc.c
index 9f354bc9da00035b66b6bb2b3943ee77d5f43b6b..fe5b38aa5a0bb3e0d8c8621d6b0bfe14e898bde6 100755
--- a/arch/arm/src/sam3u/sam3u_lowputc.c
+++ b/arch/arm/src/sam3u/sam3u_lowputc.c
@@ -304,7 +304,7 @@ void sam3u_lowsetup(void)
#endif
/* Configure the console (only) */
-#ifdef HAVE_CONSOLE
+#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
/* Reset and disable receiver and transmitter */
putreg32((UART_CR_RSTRX|UART_CR_RSTTX|UART_CR_RXDIS|UART_CR_TXDIS),
@@ -316,7 +316,7 @@ void sam3u_lowsetup(void)
/* Set up the mode register */
- putreg32(MR_VALUE, AM3U_CONSOLE_BASE+SAM3U_UART_MR_OFFSET);
+ putreg32(MR_VALUE, SAM3U_CONSOLE_BASE+SAM3U_UART_MR_OFFSET);
/* Configure the console baud */
diff --git a/arch/arm/src/sam3u/sam3u_serial.c b/arch/arm/src/sam3u/sam3u_serial.c
new file mode 100755
index 0000000000000000000000000000000000000000..42430d9e1e2f745140863273d3850440d0a8f385
--- /dev/null
+++ b/arch/arm/src/sam3u/sam3u_serial.c
@@ -0,0 +1,1450 @@
+/****************************************************************************
+ * arch/arm/src/sam3u/sam3u_serial.c
+ *
+ * Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <unistd.h>
+#include <semaphore.h>
+#include <string.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <nuttx/serial.h>
+
+#include <arch/serial.h>
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "sam3u_uart.h"
+#include "up_arch.h"
+#include "up_internal.h"
+#include "os_internal.h"
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* Some sanity checks *******************************************************/
+
+/* If the USART is not being used as a UART, then it really isn't enabled
+ * for our purposes.
+ */
+
+#ifndef CONFIG_USART0_ISUART
+# undef CONFIG_SAM3U_USART0
+#endif
+#ifndef CONFIG_USART1_ISUART
+# undef CONFIG_SAM3U_USART1
+#endif
+#ifndef CONFIG_USART2_ISUART
+# undef CONFIG_SAM3U_USART2
+#endif
+#ifndef CONFIG_USART3_ISUART
+# undef CONFIG_SAM3U_USART3
+#endif
+
+/* Is there a USART/USART enabled? */
+
+#if !defined(CONFIG_SAM3U_UART) && !defined(CONFIG_SAM3U_USART0) && \
+ !defined(CONFIG_SAM3U_USART1) && !defined(CONFIG_SAM3U_USART2) && \
+ !defined(CONFIG_SAM3U_USART3)
+# error "No USARTs enabled"
+#endif
+
+#if defined(CONFIG_SAM3U_USART0) || defined(CONFIG_SAM3U_USART1) ||\
+ defined(CONFIG_SAM3U_USART2) || defined(CONFIG_SAM3U_USART3)
+# define HAVE_USART
+#endif
+
+/* Is there a serial console? */
+
+#if defined(CONFIG_UART_SERIAL_CONSOLE) && defined(CONFIG_SAM3U_UART)
+# undef CONFIG_USART0_SERIAL_CONSOLE
+# undef CONFIG_USART1_SERIAL_CONSOLE
+# undef CONFIG_USART2_SERIAL_CONSOLE
+# undef CONFIG_USART3_SERIAL_CONSOLE
+# define HAVE_CONSOLE 1
+#elif defined(CONFIG_USART0_SERIAL_CONSOLE) && defined(CONFIG_SAM3U_USART0)
+# undef CONFIG_UART_SERIAL_CONSOLE
+# undef CONFIG_USART1_SERIAL_CONSOLE
+# undef CONFIG_USART2_SERIAL_CONSOLE
+# undef CONFIG_USART3_SERIAL_CONSOLE
+# define HAVE_CONSOLE 1
+#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_SAM3U_USART1)
+# undef CONFIG_UART_SERIAL_CONSOLE
+# undef CONFIG_USART0_SERIAL_CONSOLE
+# undef CONFIG_USART2_SERIAL_CONSOLE
+# undef CONFIG_USART3_SERIAL_CONSOLE
+# define HAVE_CONSOLE 1
+#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_SAM3U_USART2)
+# undef CONFIG_UART_SERIAL_CONSOLE
+# undef CONFIG_USART0_SERIAL_CONSOLE
+# undef CONFIG_USART1_SERIAL_CONSOLE
+# undef CONFIG_USART3_SERIAL_CONSOLE
+# define HAVE_CONSOLE 1
+#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_SAM3U_USART3)
+# undef CONFIG_UART_SERIAL_CONSOLE
+# undef CONFIG_USART0_SERIAL_CONSOLE
+# undef CONFIG_USART1_SERIAL_CONSOLE
+# undef CONFIG_USART2_SERIAL_CONSOLE
+# define HAVE_CONSOLE 1
+#else
+# warning "No valid CONFIG_USARTn_SERIAL_CONSOLE Setting"
+# undef CONFIG_UART_SERIAL_CONSOLE
+# undef CONFIG_USART0_SERIAL_CONSOLE
+# undef CONFIG_USART1_SERIAL_CONSOLE
+# undef CONFIG_USART2_SERIAL_CONSOLE
+# undef CONFIG_USART3_SERIAL_CONSOLE
+# undef HAVE_CONSOLE
+#endif
+
+/* If we are not using the serial driver for the console, then we still must
+ * provide some minimal implementation of up_putc.
+ */
+
+#ifdef CONFIG_USE_SERIALDRIVER
+
+/* Which UART/USART with be tty0/console and which tty1? tty2? tty3? tty4? */
+
+#if defined(CONFIG_UART_SERIAL_CONSOLE)
+# define CONSOLE_DEV g_uartport /* UART=console */
+# define TTYS0_DEV g_uartport /* UART=ttyS0 */
+# ifdef CONFIG_SAM3U_USART0
+# define TTYS1_DEV g_usart0port /* UART=ttyS0;USART0=ttyS1 */
+# ifdef CONFIG_SAM3U_USART1
+# define TTYS2_DEV g_usart1port /* UART=ttyS0;USART0=ttyS1;USART1=ttyS2 */
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS3_DEV g_usart2port /* UART=ttyS0;USART0=ttyS1;USART1=ttyS2;USART2=ttyS3 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS4_DEV g_usart3port /* UART=ttyS0;USART0=ttyS1;USART1=ttyS2;USART2=ttyS3;USART3=ttyS4 */
+# else
+# undef TTYS4_DEV /* UART=ttyS0;USART0=ttyS1;USART1=ttyS2;USART2=ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS3_DEV g_usart3port /* UART=ttyS0;USART0=ttyS1;USART1=ttyS;USART3=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* UART=ttyS0;USART0=ttyS1;USART1=ttyS;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS2_DEV g_usart2port /* UART=ttyS0;USART0=ttyS1;USART2=ttys2;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS3_DEV g_usart3port /* UART=ttyS0;USART0=ttyS1;USART2=ttys2;USART3=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* UART=ttyS0;USART0=ttyS1;USART2=ttys2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS2_DEV g_usart3port /* UART=ttyS0;USART0=ttyS1;USART3=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS2_DEV /* UART=ttyS0;USART0=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART1
+# define TTYS1_DEV g_usart1port /* UART=ttyS0;USART1=ttyS1;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS2_DEV g_usart2port /* UART=ttyS0;USART1=ttyS1;USART2=ttyS2;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS3_DEV g_usart3port /* UART=ttyS0;USART1=ttyS1;USART2=ttyS2;USART3=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* UART=ttyS0;USART1=ttyS1;USART2=ttyS2;No ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS2_DEV g_usart3port /* UART=ttyS0;USART1=ttyS1;USART3=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS2_DEV /* UART=ttyS0;USART1=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS1_DEV g_usart2port /* UART=ttyS0;USART2=ttyS1;No ttyS3;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS2_DEV g_usart3port /* UART=ttyS0;USART2=ttyS1;USART3=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* UART=ttyS0;USART2=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS1_DEV g_usart3port /* UART=ttyS0;USART3=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS1_DEV /* UART=ttyS0;No ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS2_DEV /* No ttyS2 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+#elif defined(CONFIG_USART0_SERIAL_CONSOLE)
+# define CONSOLE_DEV g_usart0port /* USART0=console */
+# define TTYS0_DEV g_usart0port /* USART0=ttyS0 */
+# ifdef CONFIG_SAM3U_UART
+# define TTYS1_DEV g_uartport /* USART0=ttyS0;UART=ttyS1 */
+# ifdef CONFIG_SAM3U_USART1
+# define TTYS2_DEV g_usart1port /* USART0=ttyS0;UART=ttyS1;USART1=ttyS2 */
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS3_DEV g_usart2port /* USART0=ttyS0;UART=ttyS1;USART1=ttyS2;USART2=ttyS3 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS4_DEV g_usart3port /* USART0=ttyS0;UART=ttyS1;USART1=ttyS2;USART2=ttyS3;USART3=ttyS4 */
+# else
+# undef TTYS4_DEV /* USART0=ttyS0;UART=ttyS1;USART1=ttyS2;USART2=ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS3_DEV g_usart3port /* USART0=ttyS0;UART=ttyS1;USART1=ttyS;USART3=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART0=ttyS0;UART=ttyS1;USART1=ttyS;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS2_DEV g_usart2port /* USART0=ttyS0;UART=ttyS1;USART2=ttys2;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS3_DEV g_usart3port /* USART0=ttyS0;UART=ttyS1;USART2=ttys2;USART3=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART0=ttyS0;UART=ttyS1;USART2=ttys2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS2_DEV g_usart3port /* USART0=ttyS0;UART=ttyS1;USART3=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS2_DEV /* USART0=ttyS0;UART=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART1
+# define TTYS1_DEV g_usart1port /* USART0=ttyS0;USART1=ttyS1;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS2_DEV g_usart2port /* USART0=ttyS0;USART1=ttyS1;USART2=ttyS2;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS3_DEV g_usart3port /* USART0=ttyS0;USART1=ttyS1;USART2=ttyS2;USART3=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART0=ttyS0;USART1=ttyS1;USART2=ttyS2;No ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS2_DEV g_usart3port /* USART0=ttyS0;USART1=ttyS1;USART3=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS2_DEV /* USART0=ttyS0;USART1=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS1_DEV g_usart2port /* USART0=ttyS0;USART2=ttyS1;No ttyS3;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS2_DEV g_usart3port /* USART0=ttyS0;USART2=ttyS1;USART3=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART0=ttyS0;USART2=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS1_DEV g_usart3port /* USART0=ttyS0;USART3=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS1_DEV /* USART0=ttyS0;No ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS2_DEV /* No ttyS2 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+#elif defined(CONFIG_USART1_SERIAL_CONSOLE)
+# define CONSOLE_DEV g_usart1port /* USART1=console */
+# define TTYS0_DEV g_usart1port /* USART1=ttyS0 */
+# ifdef CONFIG_SAM3U_UART
+# define TTYS1_DEV g_uartport /* USART1=ttyS0;UART=ttyS1 */
+# ifdef CONFIG_SAM3U_USART0
+# define TTYS2_DEV g_usart0port /* USART1=ttyS0;UART=ttyS1;USART0=ttyS2 */
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS3_DEV g_usart2port /* USART1=ttyS0;UART=ttyS1;USART0=ttyS2;USART2=ttyS3 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS4_DEV g_usart3port /* USART1=ttyS0;UART=ttyS1;USART0=ttyS2;USART2=ttyS3;USART3=ttyS4 */
+# else
+# undef TTYS4_DEV /* USART1=ttyS0;UART=ttyS1;USART0=ttyS2;USART2=ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS3_DEV g_usart3port /* USART1=ttyS0;UART=ttyS1;USART0=ttyS;USART3=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART1=ttyS0;UART=ttyS1;USART0=ttyS;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS2_DEV g_usart2port /* USART1=ttyS0;UART=ttyS1;USART2=ttys2;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS3_DEV g_usart3port /* USART1=ttyS0;UART=ttyS1;USART2=ttys2;USART3=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART1=ttyS0;UART=ttyS1;USART2=ttys2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS2_DEV g_usart3port /* USART1=ttyS0;UART=ttyS1;USART3=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS2_DEV /* USART1=ttyS0;UART=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART0
+# define TTYS1_DEV g_usart0port /* USART1=ttyS0;USART0=ttyS1;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS2_DEV g_usart2port /* USART1=ttyS0;USART0=ttyS1;USART2=ttyS2;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS3_DEV g_usart3port /* USART1=ttyS0;USART0=ttyS1;USART2=ttyS2;USART3=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART1=ttyS0;USART0=ttyS1;USART2=ttyS2;No ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS2_DEV g_usart3port /* USART1=ttyS0;USART0=ttyS1;USART3=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS2_DEV /* USART1=ttyS0;USART0=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS1_DEV g_usart2port /* USART1=ttyS0;USART2=ttyS1;No ttyS3;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS2_DEV g_usart3port /* USART1=ttyS0;USART2=ttyS1;USART3=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART1=ttyS0;USART2=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS1_DEV g_usart3port /* USART1=ttyS0;USART3=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS1_DEV /* USART1=ttyS0;No ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS2_DEV /* No ttyS2 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+#elif defined(CONFIG_USART2_SERIAL_CONSOLE)
+# define CONSOLE_DEV g_usart2port /* USART2=console */
+# define TTYS0_DEV g_usart2port /* USART2=ttyS0 */
+# ifdef CONFIG_SAM3U_UART
+# define TTYS1_DEV g_uartport /* USART2=ttyS0;UART=ttyS1 */
+# ifdef CONFIG_SAM3U_USART0
+# define TTYS2_DEV g_usart0port /* USART2=ttyS0;UART=ttyS1;USART0=ttyS2 */
+# ifdef CONFIG_SAM3U_USART1
+# define TTYS3_DEV g_usart1port /* USART2=ttyS0;UART=ttyS1;USART0=ttyS2;USART1=ttyS3 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS4_DEV g_usart3port /* USART2=ttyS0;UART=ttyS1;USART0=ttyS2;USART1=ttyS3;USART3=ttyS4 */
+# else
+# undef TTYS4_DEV /* USART2=ttyS0;UART=ttyS1;USART0=ttyS2;USART1=ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS3_DEV g_usart3port /* USART2=ttyS0;UART=ttyS1;USART0=ttyS;USART3=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART2=ttyS0;UART=ttyS1;USART0=ttyS;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART1
+# define TTYS2_DEV g_usart1port /* USART2=ttyS0;UART=ttyS1;USART1=ttys2;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS3_DEV g_usart3port /* USART2=ttyS0;UART=ttyS1;USART1=ttys2;USART3=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART2=ttyS0;UART=ttyS1;USART1=ttys2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS2_DEV g_usart3port /* USART2=ttyS0;UART=ttyS1;USART3=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS2_DEV /* USART2=ttyS0;UART=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART0
+# define TTYS1_DEV g_usart0port /* USART2=ttyS0;USART0=ttyS1;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART1
+# define TTYS2_DEV g_usart1port /* USART2=ttyS0;USART0=ttyS1;USART1=ttyS2;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS3_DEV g_usart3port /* USART2=ttyS0;USART0=ttyS1;USART1=ttyS2;USART3=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART2=ttyS0;USART0=ttyS1;USART1=ttyS2;No ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS2_DEV g_usart3port /* USART2=ttyS0;USART0=ttyS1;USART3=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS2_DEV /* USART2=ttyS0;USART0=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART1
+# define TTYS1_DEV g_usart1port /* USART2=ttyS0;USART1=ttyS1;No ttyS3;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS2_DEV g_usart3port /* USART2=ttyS0;USART1=ttyS1;USART3=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART2=ttyS0;USART1=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART3
+# define TTYS1_DEV g_usart3port /* USART2=ttyS0;USART3=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS1_DEV /* USART2=ttyS0;No ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS2_DEV /* No ttyS2 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+#elif defined(CONFIG_USART3_SERIAL_CONSOLE)
+# define CONSOLE_DEV g_usart3port /* USART3=console */
+# define TTYS0_DEV g_usart3port /* USART3=ttyS0 */
+# ifdef CONFIG_SAM3U_UART
+# define TTYS1_DEV g_uartport /* USART3=ttyS0;UART=ttyS1 */
+# ifdef CONFIG_SAM3U_USART0
+# define TTYS2_DEV g_usart0port /* USART3=ttyS0;UART=ttyS1;USART0=ttyS2 */
+# ifdef CONFIG_SAM3U_USART1
+# define TTYS3_DEV g_usart1port /* USART3=ttyS0;UART=ttyS1;USART0=ttyS2;USART1=ttyS3 */
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS4_DEV g_usart2port /* USART3=ttyS0;UART=ttyS1;USART0=ttyS2;USART1=ttyS3;USART2=ttyS4 */
+# else
+# undef TTYS4_DEV /* USART3=ttyS0;UART=ttyS1;USART0=ttyS2;USART1=ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS3_DEV g_usart2port /* USART3=ttyS0;UART=ttyS1;USART0=ttyS;USART2=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART3=ttyS0;UART=ttyS1;USART0=ttyS;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART1
+# define TTYS2_DEV g_usart1port /* USART3=ttyS0;UART=ttyS1;USART1=ttys2;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS3_DEV g_usart2port /* USART3=ttyS0;UART=ttyS1;USART1=ttys2;USART2=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART3=ttyS0;UART=ttyS1;USART1=ttys2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# else
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS2_DEV g_usart2port /* USART3=ttyS0;UART=ttyS1;USART2=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS2_DEV /* USART3=ttyS0;UART=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART0
+# define TTYS1_DEV g_usart0port /* USART3=ttyS0;USART0=ttyS1;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART1
+# define TTYS2_DEV g_usart1port /* USART3=ttyS0;USART0=ttyS1;USART1=ttyS2;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS3_DEV g_usart2port /* USART3=ttyS0;USART0=ttyS1;USART1=ttyS2;USART2=ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART3=ttyS0;USART0=ttyS1;USART1=ttyS2;No ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS2_DEV g_usart2port /* USART3=ttyS0;USART0=ttyS1;USART2=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS2_DEV /* USART3=ttyS0;USART0=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART1
+# define TTYS1_DEV g_usart1port /* USART3=ttyS0;USART1=ttyS1;No ttyS3;No ttyS4 */
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS2_DEV g_EEEEport /* USART3=ttyS0;USART1=ttyS1;USART2=ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS3_DEV /* USART3=ttyS0;USART1=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# else
+# ifdef CONFIG_SAM3U_USART2
+# define TTYS1_DEV g_usart2port /* USART3=ttyS0;USART2=ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# else
+# undef TTYS1_DEV /* USART3=ttyS0;No ttyS1;No ttyS2;No ttyS3;No ttyS4 */
+# endif
+# undef TTYS2_DEV /* No ttyS2 */
+# endif
+# undef TTYS3_DEV /* No ttyS3 */
+# endif
+# undef TTYS4_DEV /* No ttyS4 */
+# endif
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct up_dev_s
+{
+ uint32_t usartbase; /* Base address of USART registers */
+ uint32_t baud; /* Configured baud */
+ uint32_t imr; /* Saved interrupt mask bits value */
+ uint32_t sr; /* Saved status bits */
+ uint8_t irq; /* IRQ associated with this USART */
+ uint8_t parity; /* 0=none, 1=odd, 2=even */
+ uint8_t bits; /* Number of bits (7 or 8) */
+ bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int up_setup(struct uart_dev_s *dev);
+static void up_shutdown(struct uart_dev_s *dev);
+static int up_attach(struct uart_dev_s *dev);
+static void up_detach(struct uart_dev_s *dev);
+static int up_interrupt(int irq, void *context);
+static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
+static int up_receive(struct uart_dev_s *dev, uint32_t *status);
+static void up_rxint(struct uart_dev_s *dev, bool enable);
+static bool up_rxavailable(struct uart_dev_s *dev);
+static void up_send(struct uart_dev_s *dev, int ch);
+static void up_txint(struct uart_dev_s *dev, bool enable);
+static bool up_txready(struct uart_dev_s *dev);
+static bool up_txempty(struct uart_dev_s *dev);
+
+/****************************************************************************
+ * Private Variables
+ ****************************************************************************/
+
+struct uart_ops_s g_uart_ops =
+{
+ .setup = up_setup,
+ .shutdown = up_shutdown,
+ .attach = up_attach,
+ .detach = up_detach,
+ .ioctl = up_ioctl,
+ .receive = up_receive,
+ .rxint = up_rxint,
+ .rxavailable = up_rxavailable,
+ .send = up_send,
+ .txint = up_txint,
+ .txready = up_txready,
+ .txempty = up_txempty,
+};
+
+/* I/O buffers */
+
+#ifdef CONFIG_SAM3U_UART
+static char g_uartrxbuffer[CONFIG_UART_RXBUFSIZE];
+static char g_uarttxbuffer[CONFIG_UART_TXBUFSIZE];
+#endif
+#ifdef CONFIG_SAM3U_USART0
+static char g_usart0rxbuffer[CONFIG_USART0_RXBUFSIZE];
+static char g_usart0txbuffer[CONFIG_USART0_TXBUFSIZE];
+#endif
+#ifdef CONFIG_SAM3U_USART1
+static char g_usart1rxbuffer[CONFIG_USART1_RXBUFSIZE];
+static char g_usart1txbuffer[CONFIG_USART1_TXBUFSIZE];
+#endif
+#ifdef CONFIG_SAM3U_USART2
+static char g_usart2rxbuffer[CONFIG_USART2_RXBUFSIZE];
+static char g_usart2txbuffer[CONFIG_USART2_TXBUFSIZE];
+#endif
+#ifdef CONFIG_SAM3U_USART3
+static char g_usart3rxbuffer[CONFIG_USART3_RXBUFSIZE];
+static char g_usart3txbuffer[CONFIG_USART3_TXBUFSIZE];
+#endif
+
+/* This describes the state of the SAM3U UART port. */
+
+#ifdef CONFIG_SAM3U_UART
+static struct up_dev_s g_uartpriv =
+{
+ .usartbase = SAM3U_UART_BASE,
+ .baud = CONFIG_UART_BAUD,
+ .irq = SAM3U_IRQ_UART,
+ .parity = CONFIG_UART_PARITY,
+ .bits = CONFIG_UART_BITS,
+ .stopbits2 = CONFIG_UART_2STOP,
+};
+
+static uart_dev_t g_uartport =
+{
+ .recv =
+ {
+ .size = CONFIG_UART_RXBUFSIZE,
+ .buffer = g_uartrxbuffer,
+ },
+ .xmit =
+ {
+ .size = CONFIG_UART_TXBUFSIZE,
+ .buffer = g_uarttxbuffer,
+ },
+ .ops = &g_uart_ops,
+ .priv = &g_uartpriv,
+};
+#endif
+
+/* This describes the state of the SAM3U USART1 ports. */
+
+#ifdef CONFIG_SAM3U_USART0
+static struct up_dev_s g_usart0priv =
+{
+ .usartbase = SAM3U_USART0_BASE,
+ .baud = CONFIG_USART0_BAUD,
+ .irq = SAM3U_IRQ_USART0,
+ .parity = CONFIG_USART0_PARITY,
+ .bits = CONFIG_USART0_BITS,
+ .stopbits2 = CONFIG_USART0_2STOP,
+};
+
+static uart_dev_t g_usart0port =
+{
+ .recv =
+ {
+ .size = CONFIG_USART0_RXBUFSIZE,
+ .buffer = g_usart0rxbuffer,
+ },
+ .xmit =
+ {
+ .size = CONFIG_USART0_TXBUFSIZE,
+ .buffer = g_usart0txbuffer,
+ },
+ .ops = &g_uart_ops,
+ .priv = &g_usart0priv,
+};
+#endif
+
+/* This describes the state of the SAM3U USART1 ports. */
+
+#ifdef CONFIG_SAM3U_USART1
+static struct up_dev_s g_usart1priv =
+{
+ .usartbase = SAM3U_USART1_BASE,
+ .baud = CONFIG_USART1_BAUD,
+ .irq = SAM3U_IRQ_USART1,
+ .parity = CONFIG_USART1_PARITY,
+ .bits = CONFIG_USART1_BITS,
+ .stopbits2 = CONFIG_USART1_2STOP,
+};
+
+static uart_dev_t g_usart1port =
+{
+ .recv =
+ {
+ .size = CONFIG_USART1_RXBUFSIZE,
+ .buffer = g_usart1rxbuffer,
+ },
+ .xmit =
+ {
+ .size = CONFIG_USART1_TXBUFSIZE,
+ .buffer = g_usart1txbuffer,
+ },
+ .ops = &g_uart_ops,
+ .priv = &g_usart1priv,
+};
+#endif
+
+/* This describes the state of the SAM3U USART2 port. */
+
+#ifdef CONFIG_SAM3U_USART2
+static struct up_dev_s g_usart2priv =
+{
+ .usartbase = SAM3U_USART2_BASE,
+ .baud = CONFIG_USART2_BAUD,
+ .irq = SAM3U_IRQ_USART2,
+ .parity = CONFIG_USART2_PARITY,
+ .bits = CONFIG_USART2_BITS,
+ .stopbits2 = CONFIG_USART2_2STOP,
+};
+
+static uart_dev_t g_usart2port =
+{
+ .recv =
+ {
+ .size = CONFIG_USART2_RXBUFSIZE,
+ .buffer = g_usart2rxbuffer,
+ },
+ .xmit =
+ {
+ .size = CONFIG_USART2_TXBUFSIZE,
+ .buffer = g_usart2txbuffer,
+ },
+ .ops = &g_uart_ops,
+ .priv = &g_usart2priv,
+};
+#endif
+
+/* This describes the state of the SAM3U USART3 port. */
+
+#ifdef CONFIG_SAM3U_USART3
+static struct up_dev_s g_usart3priv =
+{
+ .usartbase = SAM3U_USART3_BASE,
+ .baud = CONFIG_USART3_BAUD,
+ .irq = SAM3U_IRQ_USART3,
+ .parity = CONFIG_USART3_PARITY,
+ .bits = CONFIG_USART3_BITS,
+ .stopbits2 = CONFIG_USART3_2STOP,
+};
+
+static uart_dev_t g_usart3port =
+{
+ .recv =
+ {
+ .size = CONFIG_USART3_RXBUFSIZE,
+ .buffer = g_usart3rxbuffer,
+ },
+ .xmit =
+ {
+ .size = CONFIG_USART3_TXBUFSIZE,
+ .buffer = g_usart3txbuffer,
+ },
+ .ops = &g_uart_ops,
+ .priv = &g_usart3priv,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_serialin
+ ****************************************************************************/
+
+static inline uint32_t up_serialin(struct up_dev_s *priv, int offset)
+{
+ return getreg32(priv->usartbase + offset);
+}
+
+/****************************************************************************
+ * Name: up_serialout
+ ****************************************************************************/
+
+static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t value)
+{
+ putreg32(value, priv->usartbase + offset);
+}
+
+/****************************************************************************
+ * Name: up_enableint
+ ****************************************************************************/
+
+static inline void up_enableint(struct up_dev_s *priv)
+{
+ up_serialout(priv, SAM3U_UART_IER_OFFSET, priv->imr);
+}
+
+/****************************************************************************
+ * Name: up_disableint
+ ****************************************************************************/
+
+static inline void up_disableint(struct up_dev_s *priv)
+{
+ up_serialout(priv, SAM3U_UART_IDR_OFFSET, ~priv->imr);
+}
+
+/****************************************************************************
+ * Name: up_restoreusartint
+ ****************************************************************************/
+
+static void up_restoreusartint(struct up_dev_s *priv, uint32_t imr)
+{
+ /* Save the interrupt mask */
+
+ priv->imr = imr;
+
+ /* And restore the interrupt state */
+
+ up_serialout(priv, SAM3U_UART_IDR_OFFSET, ~imr);
+ up_serialout(priv, SAM3U_UART_IER_OFFSET, imr);
+}
+
+/****************************************************************************
+ * Name: up_disableallints
+ ****************************************************************************/
+
+static void up_disableallints(struct up_dev_s *priv, uint32_t *imr)
+{
+ if (imr)
+ {
+ /* Return the current interrupt mask */
+
+ *imr = priv->imr;
+ }
+
+ /* Disable all interrupts */
+
+ up_restoreusartint(priv, 0);
+}
+
+/****************************************************************************
+ * Name: up_setup
+ *
+ * Description:
+ * Configure the USART baud, bits, parity, etc. This method is called the
+ * first time that the serial port is opened.
+ *
+ ****************************************************************************/
+
+static int up_setup(struct uart_dev_s *dev)
+{
+ struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+#ifndef CONFIG_SUPPRESS_UART_CONFIG
+ uint32_t regval;
+
+ /* Note: The logic here depends on the fact that that the USART module
+ * was enabled and the pins were configured in sam3u_lowsetup().
+ */
+
+ /* The shutdown method will put the UART in a known, disabled state */
+
+ up_shutdown(dev);
+
+ /* Set up the mode register. Start with normal UART mode and the MCK
+ * as the timing source
+ */
+
+ regval = (USART_MR_MODE_NORMAL|USART_MR_USCLKS_MCK);
+
+ /* OR in settings for the selected number of bits */
+
+ if (priv->bits == 5)
+ {
+ regval |= USART_MR_CHRL_5BITS; /* 5 bits */
+ }
+ else if (priv->bits == 6)
+ {
+ regval |= USART_MR_CHRL_6BITS; /* 6 bits */
+ }
+ else if (priv->bits == 7)
+ {
+ regval |= USART_MR_CHRL_7BITS; /* 7 bits */
+ }
+#ifdef HAVE_USART
+#ifdef CONFIG_SAM3U_UART
+ /* UART does not support 9bit mode */
+
+ else if (priv->bits == 9 && priv->usartbase != SAM3U_UART_BASE)
+#else
+ else if (priv->bits == 9) /* Only USARTS */
+#endif
+ {
+ regval |= USART_MR_MODE9; /* 9 bits */
+ }
+#endif
+ else /* if (priv->bits == 8) */
+ {
+ regval |= USART_MR_CHRL_8BITS; /* 8 bits (default) */
+ }
+
+ /* OR in settings for the selected parity */
+
+ if (priv->parity == 1)
+ {
+ regval |= UART_MR_PAR_ODD;
+ }
+ else if (priv->parity == 2)
+ {
+ regval |= UART_MR_PAR_EVEN;
+ }
+ else
+ {
+ regval |= UART_MR_PAR_NONE;
+ }
+
+ /* OR in settings for the number of stop bits */
+
+ if (priv->stopbits2)
+ {
+ regval |= USART_MR_NBSTOP_2;
+ }
+ else
+ {
+ regval |= USART_MR_NBSTOP_1;
+ }
+
+ /* And save the new mode register value */
+
+ up_serialout(priv, SAM3U_UART_MR_OFFSET, regval);
+
+ /* Configure the console baud */
+
+ regval = (SAM3U_MCK_FREQUENCY + (priv->baud << 3))/(priv->baud << 4);
+ up_serialout(priv, SAM3U_UART_BRGR_OFFSET, regval);
+
+ /* Enable receiver & transmitter */
+
+ up_serialout(priv, SAM3U_UART_CR_OFFSET, (UART_CR_RXEN|UART_CR_TXEN));
+#endif
+ return OK;
+}
+
+/****************************************************************************
+ * Name: up_shutdown
+ *
+ * Description:
+ * Disable the USART. This method is called when the serial
+ * port is closed
+ *
+ ****************************************************************************/
+
+static void up_shutdown(struct uart_dev_s *dev)
+{
+ struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+
+ /* Reset and disable receiver and transmitter */
+
+ up_serialout(priv, SAM3U_UART_CR_OFFSET,
+ (UART_CR_RSTRX|UART_CR_RSTTX|UART_CR_RXDIS|UART_CR_TXDIS));
+
+ /* Disable all interrupts */
+
+ up_disableallints(priv, NULL);
+}
+
+/****************************************************************************
+ * Name: up_attach
+ *
+ * Description:
+ * Configure the USART to operation in interrupt driven mode. This method is
+ * called when the serial port is opened. Normally, this is just after the
+ * the setup() method is called, however, the serial console may operate in
+ * a non-interrupt driven mode during the boot phase.
+ *
+ * RX and TX interrupts are not enabled when by the attach method (unless the
+ * hardware supports multiple levels of interrupt enabling). The RX and TX
+ * interrupts are not enabled until the txint() and rxint() methods are called.
+ *
+ ****************************************************************************/
+
+static int up_attach(struct uart_dev_s *dev)
+{
+ struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+ int ret;
+
+ /* Attach and enable the IRQ */
+
+ ret = irq_attach(priv->irq, up_interrupt);
+ if (ret == OK)
+ {
+ /* Enable the interrupt (RX and TX interrupts are still disabled
+ * in the USART
+ */
+
+ up_enable_irq(priv->irq);
+ }
+ return ret;
+}
+
+/****************************************************************************
+ * Name: up_detach
+ *
+ * Description:
+ * Detach USART interrupts. This method is called when the serial port is
+ * closed normally just before the shutdown method is called. The exception
+ * is the serial console which is never shutdown.
+ *
+ ****************************************************************************/
+
+static void up_detach(struct uart_dev_s *dev)
+{
+ struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+ up_disable_irq(priv->irq);
+ irq_detach(priv->irq);
+}
+
+/****************************************************************************
+ * Name: up_interrupt
+ *
+ * Description:
+ * This is the USART interrupt handler. It will be invoked when an
+ * interrupt received on the 'irq' It should call uart_transmitchars or
+ * uart_receivechar to perform the appropriate data transfers. The
+ * interrupt handling logic must be able to map the 'irq' number into the
+ * approprite uart_dev_s structure in order to call these functions.
+ *
+ ****************************************************************************/
+
+static int up_interrupt(int irq, void *context)
+{
+ struct uart_dev_s *dev = NULL;
+ struct up_dev_s *priv;
+ uint32_t pending;
+ int passes;
+ bool handled;
+
+#ifdef CONFIG_SAM3U_UART
+ if (g_uartpriv.irq == irq)
+ {
+ dev = &g_uartport;
+ }
+ else
+#endif
+#ifdef CONFIG_SAM3U_USART0
+ if (g_usart0priv.irq == irq)
+ {
+ dev = &g_usart0port;
+ }
+ else
+#endif
+#ifdef CONFIG_SAM3U_USART1
+ if (g_usart1priv.irq == irq)
+ {
+ dev = &g_usart1port;
+ }
+ else
+#endif
+#ifdef CONFIG_SAM3U_USART2
+ if (g_usart2priv.irq == irq)
+ {
+ dev = &g_usart2port;
+ }
+ else
+#endif
+#ifdef CONFIG_SAM3U_USART3
+ if (g_usart3priv.irq == irq)
+ {
+ dev = &g_usart3port;
+ }
+ else
+#endif
+ {
+ PANIC(OSERR_INTERNAL);
+ }
+ priv = (struct up_dev_s*)dev->priv;
+
+ /* Loop until there are no characters to be transferred or, until we have
+ * been looping for a long time.
+ */
+
+ handled = true;
+ for (passes = 0; passes < 256 && handled; passes++)
+ {
+ handled = false;
+
+ /* Get the UART/USART status (we are only interested in the unmasked interrupts). */
+
+ priv->sr = up_serialin(priv, SAM3U_UART_SR_OFFSET); /* Save for error reporting */
+ pending = priv->sr & priv->imr; /* Mask out disabled interrupt sources */
+
+ /* Handle an incoming, receive byte. RXRDY: At least one complete character
+ * has been received and US_RHR has not yet been read.
+ */
+
+ if ((pending & UART_INT_RXRDY) != 0)
+ {
+ /* Received data ready... process incoming bytes */
+
+ uart_recvchars(dev);
+ handled = true;
+ }
+
+ /* Handle outgoing, transmit bytes. XRDY: There is no character in the
+ * US_THR.
+ */
+
+ if ((pending & UART_INT_TXRDY) != 0)
+ {
+ /* Transmit data regiser empty ... process outgoing bytes */
+
+ uart_xmitchars(dev);
+ handled = true;
+ }
+ }
+ return OK;
+}
+
+/****************************************************************************
+ * Name: up_ioctl
+ *
+ * Description:
+ * All ioctl calls will be routed through this method
+ *
+ ****************************************************************************/
+
+static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
+{
+ struct inode *inode = filep->f_inode;
+ struct uart_dev_s *dev = inode->i_private;
+ int ret = OK;
+
+ switch (cmd)
+ {
+ case TIOCSERGSTRUCT:
+ {
+ struct up_dev_s *user = (struct up_dev_s*)arg;
+ if (!user)
+ {
+ ret = -EINVAL;
+ }
+ else
+ {
+ memcpy(user, dev, sizeof(struct up_dev_s));
+ }
+ }
+ break;
+
+ default:
+ ret = -ENOTTY;
+ break;
+ }
+
+ return ret;
+}
+
+/****************************************************************************
+ * Name: up_receive
+ *
+ * Description:
+ * Called (usually) from the interrupt level to receive one
+ * character from the USART. Error bits associated with the
+ * receipt are provided in the return 'status'.
+ *
+ ****************************************************************************/
+
+static int up_receive(struct uart_dev_s *dev, uint32_t *status)
+{
+ struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+
+ /* Return the error information in the saved status */
+
+ *status = priv->sr;
+ priv->sr = 0;
+
+ /* Then return the actual received byte */
+
+ return (int)(up_serialin(priv, SAM3U_UART_RHR_OFFSET) & 0xff);
+}
+
+/****************************************************************************
+ * Name: up_rxint
+ *
+ * Description:
+ * Call to enable or disable RXRDY interrupts
+ *
+ ****************************************************************************/
+
+static void up_rxint(struct uart_dev_s *dev, bool enable)
+{
+ struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+
+ if (enable)
+ {
+ /* Receive an interrupt when their is anything in the Rx data register (or an Rx
+ * timeout occurs).
+ */
+
+#ifndef CONFIG_SUPPRESS_SERIAL_INTS
+ priv->imr |= UART_INT_RXRDY;
+ up_enableint(priv);
+#endif
+ }
+ else
+ {
+ priv->imr &= ~UART_INT_RXRDY;
+ up_disableint(priv);
+ }
+}
+
+/****************************************************************************
+ * Name: up_rxavailable
+ *
+ * Description:
+ * Return true if the receive holding register is not empty
+ *
+ ****************************************************************************/
+
+static bool up_rxavailable(struct uart_dev_s *dev)
+{
+ struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+ return ((up_serialin(priv, SAM3U_UART_SR_OFFSET) & UART_INT_RXRDY) != 0);
+}
+
+/****************************************************************************
+ * Name: up_send
+ *
+ * Description:
+ * This method will send one byte on the UART/USART
+ *
+ ****************************************************************************/
+
+static void up_send(struct uart_dev_s *dev, int ch)
+{
+ struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+ up_serialout(priv, SAM3U_UART_THR_OFFSET, (uint32_t)ch);
+}
+
+/****************************************************************************
+ * Name: up_txint
+ *
+ * Description:
+ * Call to enable or disable TX interrupts
+ *
+ ****************************************************************************/
+
+static void up_txint(struct uart_dev_s *dev, bool enable)
+{
+ struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+ irqstate_t flags;
+
+ flags = irqsave();
+ if (enable)
+ {
+ /* Set to receive an interrupt when the TX holding register register
+ * is empty
+ */
+
+#ifndef CONFIG_SUPPRESS_SERIAL_INTS
+ priv->imr |= UART_INT_TXRDY;
+ up_enableint(priv);
+
+ /* Fake a TX interrupt here by just calling uart_xmitchars() with
+ * interrupts disabled (note this may recurse).
+ */
+
+ uart_xmitchars(dev);
+#endif
+ }
+ else
+ {
+ /* Disable the TX interrupt */
+
+ priv->imr &= ~UART_INT_TXRDY;
+ up_disableint(priv);
+ }
+ irqrestore(flags);
+}
+
+/****************************************************************************
+ * Name: up_txready
+ *
+ * Description:
+ * Return true if the tranmsit holding register is empty (TXRDY)
+ *
+ ****************************************************************************/
+
+static bool up_txready(struct uart_dev_s *dev)
+{
+ struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+ return ((up_serialin(priv, SAM3U_UART_SR_OFFSET) & UART_INT_TXRDY) != 0);
+ }
+
+/****************************************************************************
+ * Name: up_txempty
+ *
+ * Description:
+ * Return true if the transmit holding and shift registers are empty
+ *
+ ****************************************************************************/
+
+static bool up_txempty(struct uart_dev_s *dev)
+{
+ struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+ return ((up_serialin(priv, SAM3U_UART_SR_OFFSET) & UART_INT_TXEMPTY) != 0);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_earlyserialinit
+ *
+ * Description:
+ * Performs the low level USART initialization early in debug so that the
+ * serial console will be available during bootup. This must be called
+ * before up_serialinit.
+ *
+ ****************************************************************************/
+
+void up_earlyserialinit(void)
+{
+ /* NOTE: All GPIO configuration for the USARTs was performed in
+ * sam3u_lowsetup
+ */
+
+ /* Disable all USARTS */
+
+ up_disableallints(TTYS0_DEV.priv, NULL);
+#ifdef TTYS1_DEV
+ up_disableallints(TTYS1_DEV.priv, NULL);
+#endif
+#ifdef TTYS2_DEV
+ up_disableallints(TTYS2_DEV.priv, NULL);
+#endif
+#ifdef TTYS3_DEV
+ up_disableallints(TTYS3_DEV.priv, NULL);
+#endif
+#ifdef TTYS4_DEV
+ up_disableallints(TTYS4_DEV.priv, NULL);
+#endif
+
+ /* Configuration whichever one is the console */
+
+#ifdef HAVE_CONSOLE
+ CONSOLE_DEV.isconsole = true;
+ up_setup(&CONSOLE_DEV);
+#endif
+}
+
+/****************************************************************************
+ * Name: up_serialinit
+ *
+ * Description:
+ * Register serial console and serial ports. This assumes
+ * that up_earlyserialinit was called previously.
+ *
+ ****************************************************************************/
+
+void up_serialinit(void)
+{
+ /* Register the console */
+
+#ifdef HAVE_CONSOLE
+ (void)uart_register("/dev/console", &CONSOLE_DEV);
+#endif
+
+ /* Register all USARTs */
+
+ (void)uart_register("/dev/ttyS0", &TTYS0_DEV);
+#ifdef TTYS1_DEV
+ (void)uart_register("/dev/ttyS1", &TTYS1_DEV);
+#endif
+#ifdef TTYS2_DEV
+ (void)uart_register("/dev/ttyS2", &TTYS2_DEV);
+#endif
+#ifdef TTYS3_DEV
+ (void)uart_register("/dev/ttyS3", &TTYS3_DEV);
+#endif
+#ifdef TTYS4_DEV
+ (void)uart_register("/dev/ttyS4", &TTYS4_DEV);
+#endif
+}
+
+/****************************************************************************
+ * Name: up_putc
+ *
+ * Description:
+ * Provide priority, low-level access to support OS debug writes
+ *
+ ****************************************************************************/
+
+int up_putc(int ch)
+{
+#ifdef HAVE_CONSOLE
+ struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
+ uint16_t imr;
+
+ up_disableallints(priv, &imr);
+
+ /* Check for LF */
+
+ if (ch == '\n')
+ {
+ /* Add CR */
+
+ up_lowputc('\r');
+ }
+
+ up_lowputc(ch);
+ up_restoreusartint(priv, imr);
+#endif
+ return ch;
+}
+
+#else /* CONFIG_USE_SERIALDRIVER */
+
+/****************************************************************************
+ * Name: up_putc
+ *
+ * Description:
+ * Provide priority, low-level access to support OS debug writes
+ *
+ ****************************************************************************/
+
+int up_putc(int ch)
+{
+#ifdef HAVE_CONSOLE
+ /* Check for LF */
+
+ if (ch == '\n')
+ {
+ /* Add CR */
+
+ up_lowputc('\r');
+ }
+
+ up_lowputc(ch);
+#endif
+ return ch;
+}
+
+#endif /* CONFIG_USE_SERIALDRIVER */
diff --git a/arch/arm/src/stm32/stm32_lowputc.c b/arch/arm/src/stm32/stm32_lowputc.c
index bc5022cf1351a855331b6682fb9b408cee8c9361..8166de513d6e7ddbd7ae8884fa6c9edb911cf187 100644
--- a/arch/arm/src/stm32/stm32_lowputc.c
+++ b/arch/arm/src/stm32/stm32_lowputc.c
@@ -243,7 +243,7 @@ void stm32_lowsetup(void)
{
#if defined(CONFIG_STM32_USART1) || defined(CONFIG_STM32_USART2) || defined(CONFIG_STM32_USART3)
uint32_t mapr;
-#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_USART_CONFIG)
+#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
uint32_t cr;
#endif
@@ -332,7 +332,7 @@ void stm32_lowsetup(void)
/* Enable and configure the selected console device */
-#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_USART_CONFIG)
+#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
/* Configure CR2 */
cr = getreg32(STM32_CONSOLE_BASE + STM32_USART_CR2_OFFSET);
diff --git a/arch/arm/src/stm32/stm32_serial.c b/arch/arm/src/stm32/stm32_serial.c
index d3c1f4130e320d193cae94d37432523f2de4a119..f3bdf5e302bbd65cf1a7d653b319b6c4c2a46d1c 100644
--- a/arch/arm/src/stm32/stm32_serial.c
+++ b/arch/arm/src/stm32/stm32_serial.c
@@ -425,7 +425,7 @@ static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie)
static int up_setup(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
-#ifdef CONFIG_SUPPRESS_USART_CONFIG
+#ifdef CONFIG_SUPPRESS_UART_CONFIG
uint32_t uartdiv32;
uint32_t mantissa;
uint32_t fraction;
diff --git a/configs/sam3u-ek/include/board.h b/configs/sam3u-ek/include/board.h
index 4ba49e22428b7395fb2ee86ed683e000d1d6259c..3376b39938844940d3a46d31fac92c1d2a643678 100755
--- a/configs/sam3u-ek/include/board.h
+++ b/configs/sam3u-ek/include/board.h
@@ -86,23 +86,15 @@
/* LED definitions ******************************************************************/
-#define LED_STARTED 0
-#define LED_HEAPALLOCATE 1
-#define LED_IRQSENABLED 2
-#define LED_STACKCREATED 3
-#define LED_INIRQ 4
-#define LED_SIGNAL 5
-#define LED_ASSERTION 6
-#define LED_PANIC 7
-
-/* GPIO pin definitions *************************************************************/
-
-#define GPIO_LED0 (GPIO_OUTPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_OUTPUT_CLEAR|GPIO_PIN0)
-#define GPIO_LED1 (GPIO_OUTPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_OUTPUT_SET|GPIO_PIN1)
-#define GPIO_LED2 (GPIO_OUTPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_OUTPUT_SET|GPIO_PIN2)
-
-#define GPIO_BUTTON1 (GPIO_INPUT|GPIO_CFG_PULLUP|GPIO_CFG_DEGLITCH|GPIO_PORT_PIOA|GPIO_PIN18)
-#define GPIO_BUTTON2 (GPIO_INPUT|GPIO_CFG_PULLUP|GPIO_CFG_DEGLITCH|GPIO_PORT_PIOA|GPIO_PIN19)
+#define LED_STARTED 0 /* LED0=OFF LED1=OFF LED2=OFF */
+#define LED_HEAPALLOCATE 1 /* LED0=OFF LED1=OFF LED2=ON */
+#define LED_IRQSENABLED 2 /* LED0=OFF LED1=ON LED2=OFF */
+#define LED_STACKCREATED 3 /* LED0=OFF LED1=ON LED2=ON */
+
+#define LED_INIRQ 4 /* LED0=OFF LED1=TOG LED2=XXX */
+#define LED_SIGNAL 5 /* LED0=OFF LED1=XXX LED2=TOG */
+#define LED_ASSERTION 6 /* LED0=TOG LED1=XXX LED2=XXX */
+#define LED_PANIC 7 /* LED0=TOG LED1=XXX LED2=XXX*/
/************************************************************************************
* Public Data
diff --git a/configs/sam3u-ek/ostest/defconfig b/configs/sam3u-ek/ostest/defconfig
index 7c5b33c31bd004bea82da1dc999fb9db0663c833..33f1ee3ec882f6d7cfee2cc1aa24ecd10fd91148 100755
--- a/configs/sam3u-ek/ostest/defconfig
+++ b/configs/sam3u-ek/ostest/defconfig
@@ -100,7 +100,7 @@ CONFIG_SAM3U_BUILDROOT=y
#
# Individual subsystems can be enabled:
#
-CONFIG_SAM3U_USART=y
+CONFIG_SAM3U_UART=y
CONFIG_SAM3U_USART0=n
CONFIG_SAM3U_USART1=n
CONFIG_SAM3U_USART2=n
diff --git a/configs/sam3u-ek/src/sam3uek_internal.h b/configs/sam3u-ek/src/sam3uek_internal.h
index 9c13dc5f52bab00e114a201c8b1d949c5d03a6ec..fde22f7d841162b6be6da30b0eec6c567d301195 100755
--- a/configs/sam3u-ek/src/sam3uek_internal.h
+++ b/configs/sam3u-ek/src/sam3uek_internal.h
@@ -51,10 +51,19 @@
/* SAM3U-EK GPIOs *******************************************************************/
+/* GPIO pin definitions *************************************************************/
+
/* LEDs */
+#define GPIO_LED0 (GPIO_OUTPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_OUTPUT_CLEAR|GPIO_PIN0)
+#define GPIO_LED1 (GPIO_OUTPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_OUTPUT_SET|GPIO_PIN1)
+#define GPIO_LED2 (GPIO_OUTPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_OUTPUT_SET|GPIO_PIN2)
+
/* BUTTONS */
+#define GPIO_BUTTON1 (GPIO_INPUT|GPIO_CFG_PULLUP|GPIO_CFG_DEGLITCH|GPIO_PORT_PIOA|GPIO_PIN18)
+#define GPIO_BUTTON2 (GPIO_INPUT|GPIO_CFG_PULLUP|GPIO_CFG_DEGLITCH|GPIO_PORT_PIOA|GPIO_PIN19)
+
/* SPI Chip Selects */
/************************************************************************************
diff --git a/configs/sam3u-ek/src/up_leds.c b/configs/sam3u-ek/src/up_leds.c
index 8ec9a47075926fdd041bf3c067a27bbcf180796c..09acb23decfb650ef20f4132b5bc226b1e634611 100755
--- a/configs/sam3u-ek/src/up_leds.c
+++ b/configs/sam3u-ek/src/up_leds.c
@@ -2,7 +2,7 @@
* configs/sam3u-ek/src/up_leds.c
* arch/arm/src/board/up_leds.c
*
- * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@@ -52,6 +52,8 @@
#include "sam3u_internal.h"
#include "sam3uek_internal.h"
+#ifdef CONFIG_ARCH_LEDS
+
/****************************************************************************
* Definitions
****************************************************************************/
@@ -70,14 +72,95 @@
# define ledvdbg(x...)
#endif
+#define LED_OFF 0
+#define LED_ON 1
+#define LED_NOCHANGE 2
+#define LED_MASK 3
+
+#define LED0_SHIFT 0
+#define LED0_OFF (LED_OFF << LED0_SHIFT)
+#define LED0_ON (LED_ON << LED0_SHIFT)
+#define LED0_NOCHANGE (LED_NOCHANGE << LED0_SHIFT)
+#define LED1_SHIFT 2
+#define LED1_OFF (LED_OFF << LED1_SHIFT)
+#define LED1_ON (LED_ON << LED1_SHIFT)
+#define LED1_NOCHANGE (LED_NOCHANGE << LED1_SHIFT)
+#define LED2_SHIFT 4
+#define LED2_OFF (LED_OFF << LED2_SHIFT)
+#define LED2_ON (LED_ON << LED2_SHIFT)
+#define LED2_NOCHANGE (LED_NOCHANGE << LED2_SHIFT)
+
/****************************************************************************
* Private Data
****************************************************************************/
+static const uint8_t g_ledon[8] =
+{
+
+ (LED0_OFF |LED1_OFF |LED2_OFF), /* LED_STARTED */
+ (LED0_ON |LED1_OFF |LED2_ON), /* LED_HEAPALLOCATE */
+ (LED0_OFF |LED1_ON |LED2_OFF), /* LED_IRQSENABLED */
+ (LED0_ON |LED1_ON |LED2_ON), /* LED_STACKCREATED */
+
+ (LED0_OFF |LED1_OFF |LED2_NOCHANGE), /* LED_INIRQ */
+ (LED0_OFF |LED1_NOCHANGE|LED2_OFF), /* LED_SIGNAL */
+ (LED0_ON |LED1_NOCHANGE|LED2_NOCHANGE), /* LED_ASSERTION */
+ (LED0_ON |LED1_NOCHANGE|LED2_NOCHANGE) /* LED_PANIC */
+};
+
+static const uint8_t g_ledoff[8] =
+{
+
+ (LED0_OFF |LED1_OFF |LED2_OFF), /* LED_STARTED (does not happen) */
+ (LED0_ON |LED1_OFF |LED2_ON), /* LED_HEAPALLOCATE (does not happen) */
+ (LED0_OFF |LED1_ON |LED2_OFF), /* LED_IRQSENABLED (does not happen) */
+ (LED0_ON |LED1_ON |LED2_ON), /* LED_STACKCREATED (does not happen) */
+
+ (LED0_OFF |LED1_ON |LED2_NOCHANGE), /* LED_INIRQ */
+ (LED0_OFF |LED1_NOCHANGE|LED2_ON), /* LED_SIGNAL */
+ (LED0_OFF |LED1_NOCHANGE|LED2_NOCHANGE), /* LED_ASSERTION */
+ (LED0_OFF |LED1_NOCHANGE|LED2_NOCHANGE) /* LED_PANIC */
+};
+
/****************************************************************************
* Private Functions
****************************************************************************/
+/****************************************************************************
+ * Name: up_setled
+ ****************************************************************************/
+
+static void up_setled(uint16_t pinset, uint8_t state)
+{
+ /* Assume active high. Initial state == 0 means active high */
+
+ bool polarity = ((pinset & GPIO_OUTPUT_SET) == 0);
+ switch (state)
+ {
+ case LED_OFF:
+ polarity = !polarity;
+
+ case LED_ON:
+ break;
+
+ case LED_NOCHANGE:
+ default:
+ return;
+ }
+ sam3u_gpiowrite(pinset, polarity);
+}
+
+/****************************************************************************
+ * Name: up_setleds
+ ****************************************************************************/
+
+static void up_setleds(uint8_t state)
+{
+ up_setled(GPIO_LED0, (state >> LED0_SHIFT) & LED_MASK);
+ up_setled(GPIO_LED1, (state >> LED1_SHIFT) & LED_MASK);
+ up_setled(GPIO_LED2, (state >> LED2_SHIFT) & LED_MASK);
+}
+
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -86,9 +169,11 @@
* Name: up_ledinit
****************************************************************************/
-#ifdef CONFIG_ARCH_LEDS
void up_ledinit(void)
{
+ (void)sam3u_configgpio(GPIO_LED0);
+ (void)sam3u_configgpio(GPIO_LED1);
+ (void)sam3u_configgpio(GPIO_LED2);
}
/****************************************************************************
@@ -97,6 +182,7 @@ void up_ledinit(void)
void up_ledon(int led)
{
+ up_setleds(g_ledon[led & 7]);
}
/****************************************************************************
@@ -105,6 +191,7 @@ void up_ledon(int led)
void up_ledoff(int led)
{
+ up_setleds(g_ledoff[led & 7]);
}
#endif /* CONFIG_ARCH_LEDS */