From 0e2dce184afd6e6c76d3e8956ea9178165cb02aa Mon Sep 17 00:00:00 2001
From: patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>
Date: Sun, 31 Oct 2010 18:03:48 +0000
Subject: [PATCH] comments
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3067 42af7a65-404d-4744-a932-0658087f49c3
---
arch/avr/src/at32uc3/at32uc3_timerisr.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/avr/src/at32uc3/at32uc3_timerisr.c b/arch/avr/src/at32uc3/at32uc3_timerisr.c
index f8738d39e7..9e1b2747b0 100644
--- a/arch/avr/src/at32uc3/at32uc3_timerisr.c
+++ b/arch/avr/src/at32uc3/at32uc3_timerisr.c
@@ -48,6 +48,7 @@
#include "chip.h"
#include "at32uc3_internal.h"
+#include "at32uc3_pm.h"
#include "at32uc3_rtc.h"
/****************************************************************************
@@ -160,6 +161,18 @@ int up_timerisr(int irq, uint32_t *regs)
void up_timerinit(void)
{
uint32_t regval;
+
+ /* Enable clocking: "The clock for the RTC bus interface (CLK_RTC) is generated
+ * by the Power Manager. This clock is enabled at reset, and can be disabled
+ * in the Power Manager. It is recommended to disable the RTC before disabling
+ * the clock, to avoid freezing the RTC in an undefined state.
+ */
+
+#if 0
+ regval = getreg32(AVR32_PM_PBAMASK);
+ regval |= PM_PBAMASK_PMRTCEIC;
+ putreg32(regval, AVR32_PM_PBAMASK);
+#endif
/* Configure the RTC. Source == 32KHz OSC32 */
--
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