diff --git a/arch/arm/src/arm/up_head.S b/arch/arm/src/arm/up_head.S
index 3226a86ecf26341edff73a04e9a0ef1e82fd4f2c..685e61b823cfdd8539a23c5f8ddaadb396b4f7e7 100644
--- a/arch/arm/src/arm/up_head.S
+++ b/arch/arm/src/arm/up_head.S
@@ -166,8 +166,8 @@ __start:
mksection r0, r4 /* r0=phys. base section */
ldr r1, .LCmmuflags /* FLGS=MMU_MEMFLAGS */
- add r3, r1, r0 /* r3=flags + base */
- str r3, [r4, r0, lsr #18] /* identity mapping */
+ add r3, r1, r0 /* r3=flags + base */
+ str r3, [r4, r0, lsr #18] /* identity mapping */
/* Create a "normal" single section mapping for the first
* MB of memory. Now, we have the first 1MB mapping to
@@ -178,13 +178,13 @@ __start:
ldr r2, .LCvpgtable /* r2=virt. page table */
mksection r0, r2 /* r0=virt. base section */
- str r3, [r4, r0, lsr #18] /* identity mapping */
+ str r3, [r4, r0, lsr #18] /* identity mapping */
/* The following logic will set up the ARM920/ARM926 for normal operation */
mov r0, #0
mcr p15, 0, r0, c7, c7 /* Invalidate I,D caches */
- mcr p15, 0, r0, c7, c10, 4 /* Drain write buffer */
+ mcr p15, 0, r0, c7, c10, 4 /* Drain write buffer */
mcr p15, 0, r0, c8, c7 /* Invalidate I,D TLBs */
mcr p15, 0, r4, c2, c0 /* Load page table pointer */
@@ -199,7 +199,7 @@ __start:
ldr lr, .LCvstart /* Abs. virtual address */
- mov r0, #0x1f /* Domains 0, 1 = client */
+ mov r0, #0x1f /* Domains 0, 1 = client */
mcr p15, 0, r0, c3, c0 /* Load domain access register */
mrc p15, 0, r0, c1, c0 /* Get control register */
@@ -281,15 +281,15 @@ __start:
ldr r4, .LCvpgtable /* r4=virtual page table */
ldr r1, .LCppgtable /* r1=phys. page table */
mksection r3, r1 /* r2=phys. base addr */
- mov r0, #0 /* flags + base = 0 */
- str r0, [r4, r3, lsr #18] /* Undo identity mapping */
+ mov r0, #0 /* flags + base = 0 */
+ str r0, [r4, r3, lsr #18] /* Undo identity mapping */
/* Now setup the pagetables for our normal SDRAM mappings mapped region.
* We round NUTTX_START_VADDR down to the nearest megabyte boundary.
*/
ldr r1, .LCmmuflags /* FLGS=MMU_MEMFLAGS */
- add r3, r3, r1 /* r3=flags + base */
+ add r3, r3, r1 /* r3=flags + base */
add r0, r4, #(NUTTX_START_VADDR & 0xff000000) >> 18
bic r2, r3, #0x00f00000
diff --git a/arch/arm/src/lpc313x/Make.defs b/arch/arm/src/lpc313x/Make.defs
index b7f036a0bd9defcf467b2f01c2ac7b8087257d06..402a504f3a5e46a3d2e39c2affc5122a79934b94 100755
--- a/arch/arm/src/lpc313x/Make.defs
+++ b/arch/arm/src/lpc313x/Make.defs
@@ -53,6 +53,6 @@ CGU_CSRCS = lpc313x_bcrndx.c lpc313x_clkdomain.c lpc313x_clkexten.c \
lpc313x_setfreqin.c lpc313x_setfdiv.c lpc313x_softreset.c
CHIP_ASRCS = $(CGU_ASRCS)
-CHIP_CSRCS = lpc313x_allocateheap.c lpc313x_boot.c lpc313x_irq.c \
- lpc313x_lowputc.c lpc313x_serial.c lpc313x_timerisr.c \
- $(CGU_CSRCS)
+CHIP_CSRCS = lpc313x_allocateheap.c lpc313x_boot.c lpc313x_decodeirq.c \
+ lpc313x_irq.c lpc313x_lowputc.c lpc313x_serial.c \
+ lpc313x_timerisr.c $(CGU_CSRCS)
diff --git a/arch/arm/src/lpc313x/lpc313x_decodeirq.c b/arch/arm/src/lpc313x/lpc313x_decodeirq.c
new file mode 100755
index 0000000000000000000000000000000000000000..2fa87211472dc6748898148aaaa614c5da4a72b1
--- /dev/null
+++ b/arch/arm/src/lpc313x/lpc313x_decodeirq.c
@@ -0,0 +1,131 @@
+/********************************************************************************
+ * arch/arm/src/lpc313x/lpc313x_decodeirq.c
+ * arch/arm/src/chip/lpc313x_decodeirq.c
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************************/
+
+/********************************************************************************
+ * Included Files
+ ********************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <assert.h>
+#include <debug.h>
+
+#include "chip.h"
+#include "up_arch.h"
+
+#include "os_internal.h"
+#include "up_internal.h"
+
+#include "lpc313x_intc.h"
+
+/********************************************************************************
+ * Pre-processor Definitions
+ ********************************************************************************/
+
+/********************************************************************************
+ * Public Data
+ ********************************************************************************/
+
+/********************************************************************************
+ * Private Data
+ ********************************************************************************/
+
+/********************************************************************************
+ * Private Functions
+ ********************************************************************************/
+
+/********************************************************************************
+ * Public Functions
+ ********************************************************************************/
+
+void up_decodeirq(uint32_t *regs)
+{
+#ifdef CONFIG_SUPPRESS_INTERRUPTS
+ lib_lowprintf("Unexpected IRQ\n");
+ current_regs = regs;
+ PANIC(OSERR_ERREXCEPTION);
+#else
+ int index;
+ int irq;
+
+ /* Read the IRQ vector status register. Bits 3-10 provide the IRQ number
+ * of the interrupt (the TABLE_ADDR was initialized to zero, so the
+ * following masking should be unnecessary)
+ */
+
+ index = getreg32(LPC313X_INTC_VECTOR0) & INTC_VECTOR_INDEX_MASK;
+ if (index != 0)
+ {
+ /* Shift the index so that the range of IRQ numbers are in bits 0-7 (up
+ * 0-127 and back off the IRQ number by 1 so that the numbering is zero-based
+ */
+
+ irq = (index >> INTC_VECTOR_INDEX_SHIFT) -1;
+
+ /* Verify that the resulting IRQ number is valid */
+
+ if ((unsigned)irq < NR_IRQS)
+ {
+ /* Mask and acknowledge the interrupt */
+
+ up_maskack_irq(irq);
+
+ /* Current regs non-zero indicates that we are processing an interrupt;
+ * current_regs is also used to manage interrupt level context switches.
+ */
+
+ current_regs = regs;
+
+ /* Deliver the IRQ */
+
+ irq_dispatch(irq, regs);
+
+ /* Indicate that we are no longer in an interrupt handler */
+
+ current_regs = NULL;
+
+ /* Unmask the last interrupt (global interrupts are still
+ * disabled).
+ */
+
+ up_enable_irq(irq);
+ }
+ }
+#endif
+}