diff --git a/ChangeLog b/ChangeLog
index eb27790d01d305fe76c810d960fe2b7eb17eaec7..b2575af19da29c9cf528454f17f4cdb7da73f209 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1468,5 +1468,11 @@
* Rename arch/pjrc-8051 to arch/8051
* configs/ne64badge -- Add a configuration for the Future Electronics Group
NE64 Badge development board (Freescale MC9S12NE64)
-
-
+ * Changes contributed by Uros Platise:
+ - Add support for the STM32F103RET6
+ - configs/vsn - Support for the ISOTEL NetClamps VSN V1.2 ready2go sensor
+ network platform
+ * arch/hc, configs/ne64badge -- Development is complete for the Freescale
+ mc9s12ne64 on the Future Electronics Group NE64 /PoE Badge board. Howeve,
+ this port remains untested until I figure out this BDM / Code Warrior
+ and paged build thing
diff --git a/Documentation/NuttX.html b/Documentation/NuttX.html
index b58bc95243697bcb117b9fdb72546fdfc4b7da75..57c2b8723f7fa6589e75244e585687911be6a1b3 100644
--- a/Documentation/NuttX.html
+++ b/Documentation/NuttX.html
@@ -8,7 +8,7 @@
<tr align="center" bgcolor="#e4e4e4">
<td>
<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
- <p>Last Updated: February 25, 2011</p>
+ <p>Last Updated: February 27, 2011</p>
</td>
</tr>
</table>
@@ -1170,21 +1170,41 @@
<td>
<p>
<b>STMicro STM32F103x</b>.
- This port uses the <a href=" http://www.st.com/">STMicro</a> STM3210E-EVAL development board that
- features the STM32F103ZET6 MCU.
- This port uses a GNU arm-elf toolchain* under either Linux or Cygwin (with native Windows GNU
+ Support for three MCUs and two board configurations are available.
+ MCU support includes: STM32F103ZET6, STM32F103RET6, and STM32F107VC.
+ Board support includes:
+ </p>
+ <ol>
+ <li>
+ This port uses the <a href=" http://www.st.com/">STMicro</a> STM3210E-EVAL development board that
+ features the STM32F103ZET6 MCU.
+ </li>
+ <li>
+ ISOTEL NetClamps VSN V1.2 ready2go sensor network platform based on the
+ STMicro STM32F103RET6. Contributed by Uros Platise.
+ </li>
+ </ol>
+ <p>
+ These ports uses a GNU arm-elf toolchain* under either Linux or Cygwin (with native Windows GNU
tools or Cygwin-based GNU tools).
</p>
<ul>
<p>
<b>STATUS:</b>
- The basic STM32 port was released in NuttX version 0.4.12. The basic port includes boot-up
- logic, interrupt driven serial console, and system timer interrupts.
- The 0.4.13 release added support for SPI, serial FLASH, and USB device.;
- The 4.14 release added support for buttons and SDIO-based MMC/SD and verifed DMA support.
- Verified configurations are available for NuttX OS test, the NuttShell (NSH) example,
- the USB serial device class, and the USB mass storage device class example.
</p>
+ <ul>
+ <li>
+ The basic STM32 port was released in NuttX version 0.4.12. The basic port includes boot-up
+ logic, interrupt driven serial console, and system timer interrupts.
+ The 0.4.13 release added support for SPI, serial FLASH, and USB device.;
+ The 4.14 release added support for buttons and SDIO-based MMC/SD and verifed DMA support.
+ Verified configurations are available for NuttX OS test, the NuttShell (NSH) example,
+ the USB serial device class, and the USB mass storage device class example.
+ </li>
+ <li>
+ Support for the NetClamps VSN was included in version 5.18 of NuttX.
+ </li>
+ </ul>
<p>
<b>Development Environments:</b>
1) Linux with native Linux GNU toolchain, 2) Cygwin with Cygwin GNU toolchain, or 3) Cygwin
@@ -1231,7 +1251,7 @@
1) Linux with native Linux GNU toolchain, 2) Cygwin with Cygwin GNU toolchain, or 3) Cygwin
with Windows native toolchain (CodeSourcery or devkitARM). A DIY toolchain for Linux
or Cygwin is provided by the NuttX
- <a href="http://sourceforge.net/project/showfiles.php?group_id=189573&package_id=224585">buildroot</a>
+ <a href="http://sourceforge.net/projects/nuttx/files/buildroot/">buildroot</a>
package.
</p>
</ul>
@@ -1337,7 +1357,7 @@
1) Linux with native Linux GNU toolchain, 2) Cygwin with Cygwin GNU toolchain, or 3) Cygwin
with Windows native toolchain (CodeSourcery or devkitARM). A DIY toolchain for Linux
or Cygwin is provided by the NuttX
- <a href="http://sourceforge.net/project/showfiles.php?group_id=189573&package_id=224585">buildroot</a>
+ <a href="http://sourceforge.net/projects/nuttx/files/buildroot/">buildroot</a>
package.
</p>
</ul>
@@ -1380,14 +1400,27 @@
<td>
<p>
<b>MC9S12NE64</b>.
- This port uses the Freescale DEMO9S12NE64 Evaluation Board with a GNU arm-elf toolchain* under Linux or Cygwin.
+ Support for the MC9S12NE64 MCU and two boards are included:
+ </p>
+ <ul>
+ <li>
+ The Freescale DEMO9S12NE64 Evaluation Board, and
+ </li>
+ <li>
+ The Future Electronics Group NE64 /PoE Badge board.
+ </li>
+ </ul>
+ <p>
+ Both use a GNU arm-elf toolchain* under Linux or Cygwin.
+ The NuttX <a href="http://sourceforge.net/projects/nuttx/files/buildroot/">buildroot</a> provides a properly patched GCC 3.4.4 toolchain that is highly optimized for the m9s12x family.
</p>
<ul>
<p>
<b>STATUS:</b>
- This port only fragmentary as of NuttX-5.0. Some initial pieces appear in that
- release, but much more is needed. Time permitting, the HCS12 port may be available
- int NuttX5.1.
+ Coding is complete for the MC9S12NE64 and for the NE64 Badge board.
+ However, testing has not yet begun due to issues with BDMs, Code Warrior, and
+ the paging in the build process.
+ Progress is slow, but I hope to see a fully verified MC9S12NE64 port in the near future.
</p>
</ul>
</td>
@@ -1720,7 +1753,7 @@ m68k, m68hc11, m68hc12, and SuperH ports.</blockquote>
This combination works well too.
It works just as well as the native Linux environment except
that compilation and build times are a little longer.
- The custom NuttX buildroot referenced above may be build in
+ The custom NuttX <a href="http://sourceforge.net/projects/nuttx/files/buildroot/">buildroot</a> referenced above may be build in
the Cygwin environment as well.
</p>
</td>
@@ -2040,11 +2073,19 @@ nuttx-5.18 2011-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
a USB host HID keyboard configuraion.
* drivers/usbhost/hid_parser.c -- Leverages the LUFA HID parser written by
Dean Camera.
- * examples/nsh -- Correct an usage of getopt(): If you stop calling getopt()
- before all parameters are parsed, you can leave getopt() in a strange state.
+ * examples/nsh -- Correct an usage of getopt(): If you stop calling getopt()
+ before all parameters are parsed, you can leave getopt() in a strange state.
* Rename arch/pjrc-8051 to arch/8051
- * configs/ne64badge -- Add a configuration for the Future Electronics Group
- NE64 Badge development board (Freescale MC9S12NE64)
+ * configs/ne64badge -- Add a configuration for the Future Electronics Group
+ NE64 Badge development board (Freescale MC9S12NE64)
+ * Changes contributed by Uros Platise:
+ - Add support for the STM32F103RET6
+ - configs/vsn - Support for the ISOTEL NetClamps VSN V1.2 ready2go sensor
+ network platform
+ * arch/hc, configs/ne64badge -- Development is complete for the Freescale
+ mc9s12ne64 on the Future Electronics Group NE64 /PoE Badge board. Howeve,
+ this port remains untested until I figure out this BDM / Code Warrior
+ and paged build thing
pascal-2.1 2011-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
diff --git a/Documentation/README.html b/Documentation/README.html
index 47686f86a52763f7c04551dc44af0eddcc6484f6..0338330fae5cd14342ca453deccf07facb2556dc 100755
--- a/Documentation/README.html
+++ b/Documentation/README.html
@@ -9,7 +9,7 @@
<tr align="center" bgcolor="#e4e4e4">
<td>
<h1><big><font color="#3c34ec"><i>NuttX README Files</i></font></big></h1>
- <p>Last Updated: February 24, 2010</p>
+ <p>Last Updated: February 27, 2010</p>
</td>
</tr>
</table>
@@ -89,6 +89,8 @@
| | |- <a href="configs/mx1ads/include/README.txt?view=log">include/README.txt</a>
| | |- <a href="configs/mx1ads/src/README.txt?view=log">src/README.txt</a>
| | `- <a href="configs/mx1ads/README.txt?view=log"><b><i>README.txt</i></b></a>
+ | |- ne64badge/
+ | | `- <a href="configs/ne64badge/README.txt?view=log"><b><i>README.txt</i></b></a>
| |- ntosd-dm320/
| | |- <a href="configs/ntosd-dm320/doc/README.txt?view=log">doc/README.txt</a>
| | |- <a href="configs/ntosd-dm320/include/README.txt?view=log">include/README.txt</a>
@@ -129,6 +131,8 @@
| | |- <a href="configs/us7032evb1/include/README.txt?view=log">include/README.txt</a>
| | |- <a href="configs/us7032evb1/src/README.txt?view=log">src/README.txt</a>
| | `- <a href="configs/us7032evb1/README.txt?view=log"><b><i>README.txt</i></b></a>
+ | |- vsn/
+ | | `- <a href="configs/vsn/README.txt?view=log"><b><i>README.txt</i></b></a>
| |- xtrs/
| | |- <a href="configs/xtrs/include/README.txt?view=log">include/README.txt</a>
| | |- <a href="configs/xtrs/src/README.txt?view=log">src/README.txt</a>
diff --git a/README.txt b/README.txt
index 48b8df77456c196c98cba3ff94b9b096b5daf6b2..4ae870ee6f4c9957acd0b75f032ccef2b858ecca 100755
--- a/README.txt
+++ b/README.txt
@@ -302,6 +302,8 @@ Below is a guide to the available README files in the NuttX source tree:
| | |- include/README.txt
| | |- src/README.txt
| | `- README.txt
+ | |- ne63badge/
+ | | `- README.txt
| |- ntosd-dm320/
| | |- doc/README.txt
| | |- include/README.txt
@@ -342,6 +344,8 @@ Below is a guide to the available README files in the NuttX source tree:
| | |- include/README.txt
| | |- src/README.txt
| | `- README.txt
+ | |- vsn/
+ | | `- README.txt
| |- xtrs/
| | |- include/README.txt
| | |- src/README.txt
diff --git a/arch/arm/src/common/up_idle.c b/arch/arm/src/common/up_idle.c
index 4927ce0e8e31245c37b5b96295f7c11e3ac0c531..ba6affb0e88aff43550573338775f4b82a9cc28f 100644
--- a/arch/arm/src/common/up_idle.c
+++ b/arch/arm/src/common/up_idle.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/common/up_idle.c
*
- * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@@ -83,5 +83,11 @@ void up_idle(void)
sched_process_timer();
#endif
+
+ /* Sleep until an interrupt occurs to save power */
+
+#if 0
+ asm("WFI"); /* For example */
+#endif
}
diff --git a/arch/arm/src/stm32/chip.h b/arch/arm/src/stm32/chip.h
index f6430b2c158be1c3f394a36d039cee6c58e3472a..f916f1682381264d5b2cde3b0930758974ab423b 100755
--- a/arch/arm/src/stm32/chip.h
+++ b/arch/arm/src/stm32/chip.h
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/stm32/chip.h
*
- * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@@ -48,11 +48,11 @@
/* Get customizations for each supported chip (only the STM32F103Z right now) */
-#if defined(CONFIG_ARCH_CHIP_STM32F103ZET6)
-# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
-# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
+#if defined(CONFIG_ARCH_CHIP_STM32F103ZET6)
+# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
+# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
-# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
+# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
# define STM32_NATIM 1 /* One advanced timers TIM1 */
# define STM32_NGTIM 4 /* General timers TIM2,3,4,5 */
# define STM32 NBTIM 0 /* No basic timers */
@@ -67,11 +67,32 @@
# define STM32_NDAC 0 /* No DAC */
# define STM32_NCRC 0 /* No CRC */
# define STM32_NTHERNET 0 /* No ethernet */
+
+#elif defined(CONFIG_ARCH_CHIP_STM32F103RET6)
+# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
+# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
+# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
+# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
+# define STM32_NATIM 1 /* One advanced timers TIM1 */
+# define STM32_NGTIM 4 /* General timers TIM2,3,4,5 */
+# define STM32 NBTIM 0 /* No basic timers */
+# define STM32_NDMA 2 /* DMA1-2 */
+# define STM32_NSPI 2 /* SPI1-2 */
+# define STM32_NUSART 3 /* USART1-3 */
+# define STM32_NI2C 2 /* I2C1-2 */
+# define STM32_NCAN 1 /* bxCAN1 */
+# define STM32_NSDIO 1 /* SDIO */
+# define STM32_NGPIO 112 /* GPIOA-G */
+# define STM32_NADC 1 /* ADC1 */
+# define STM32_NDAC 0 /* No DAC */
+# define STM32_NCRC 0 /* No CRC */
+# define STM32_NTHERNET 0 /* No ethernet */
+
#elif defined(CONFIG_ARCH_CHIP_STM32F107VC)
-# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
-# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
-# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
-# define CONFIG_STM32_CONNECTIVITYLINE 1 /* STM32F105x and STM32F107x */
+# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
+# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
+# undef CONFIG_STM32_HIGHDENSITY /* STM32F101x and STM32F103x w/ 256/512 Kbytes */
+# define CONFIG_STM32_CONNECTIVITYLINE 1 /* STM32F105x and STM32F107x */
# define STM32_NATIM 1 /* One advanced timers TIM1 */
# define STM32_NGTIM 4 /* General timers TIM2,3,4,5 */
# define STM32 NBTIM 2 /* Two basic timers, TIM6-7 */
@@ -86,6 +107,7 @@
# define STM32_NDAC 2 /* DAC1-2 */
# define STM32_NCRC 1 /* CRC */
# define STM32_NTHERNET 1 /* 100/100 Ethernet MAC */
+
#else
# error "Unsupported STM32 chip"
#endif
diff --git a/arch/arm/src/stm32/stm32_flash.h b/arch/arm/src/stm32/stm32_flash.h
index 414641aa1c860fe25276922d12c5bd0c5f6eccea..19ee5e1727f5fc6f19353134c8db6235fd6f24f1 100755
--- a/arch/arm/src/stm32/stm32_flash.h
+++ b/arch/arm/src/stm32/stm32_flash.h
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/stm32/stm32_flash.h
*
- * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@@ -79,7 +79,7 @@
#define ACR_LATENCY_SHIFT (0)
#define ACR_LATENCY_MASK (7 << ACR_LATENCY_SHIFT)
# define ACR_LATENCY_0 (0 << ACR_LATENCY_SHIFT) /* FLASH Zero Latency cycle */
-# define ACR_LATENCY_1 (1 << ACR_LATENCY_SHIFT)) /* FLASH One Latency cycle */
+# define ACR_LATENCY_1 (1 << ACR_LATENCY_SHIFT) /* FLASH One Latency cycle */
# define ACR_LATENCY_2 (2 << ACR_LATENCY_SHIFT) /* FLASH Two Latency cycles */
#define ACR_HLFCYA (1 << 3) /* FLASH half cycle access */
#define ACR_PRTFBE (1 << 4) /* FLASH prefetch enable */
diff --git a/arch/arm/src/stm32/stm32_internal.h b/arch/arm/src/stm32/stm32_internal.h
index a98d579dd07fe732b4e3304217966d78aa265d2b..f5094d50a85c21a92cdc67254d0f76ddec37f81f 100755
--- a/arch/arm/src/stm32/stm32_internal.h
+++ b/arch/arm/src/stm32/stm32_internal.h
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/stm32/stm32_internal.h
*
- * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@@ -167,9 +167,11 @@
* include that header file. NOTE: You can get the chip-specific pin-mapping info
* from the chip datasheet.
*/
-
+
#if defined(CONFIG_ARCH_CHIP_STM32F103ZET6)
# include "stm32f103ze_pinmap.h"
+#elif defined(CONFIG_ARCH_CHIP_STM32F103RET6)
+# include "stm32f103re_pinmap.h"
#elif defined(CONFIG_ARCH_CHIP_STM32F107VC)
# include "stm32f107vc_pinmap.h"
#endif
diff --git a/arch/arm/src/stm32/stm32_rcc.c b/arch/arm/src/stm32/stm32_rcc.c
index 22c67d1204cb34834e54f9fd448d0375c95ed469..c789a5643fd54ae3263242a62eda5369091672a4 100755
--- a/arch/arm/src/stm32/stm32_rcc.c
+++ b/arch/arm/src/stm32/stm32_rcc.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/stm32/stm32_rcc.c
*
- * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@@ -364,28 +364,21 @@ static inline void rcc_enableapb2(void)
}
/****************************************************************************
- * Global Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: stm32_clockconfig
+ * Name: stm32_stdclockconfig
*
* Description:
- * Called to change to new clock based on settings in board.h.
- * NOTE: This logic needs to be extended so that we can selected low-power
- * clocking modes as well!
+ * Called to set clocking based on standard definitions in board.h.
+ * NOTE: This logic would need to be extended if you need to select low-
+ * power clocking modes!
*
****************************************************************************/
-void stm32_clockconfig(void)
+#if !defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
+static inline void stm32_stdclockconfig(void)
{
uint32_t regval;
volatile int32_t timeout;
- /* Make sure that we are starting in the reset state */
-
- rcc_reset();
-
/* Enable External High-Speed Clock (HSE) */
regval = getreg32(STM32_RCC_CR);
@@ -465,9 +458,45 @@ void stm32_clockconfig(void)
while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_MASK) != STM32_SYSCLK_SWS);
}
+}
+#endif
- /* Enable peripheral clocking */
+/****************************************************************************
+ * Global Functions
+ ****************************************************************************/
+/****************************************************************************
+ * Name: stm32_clockconfig
+ *
+ * Description:
+ * Called to change to new clock based on settings in board.h.
+ * NOTE: This logic needs to be extended so that we can selected low-power
+ * clocking modes as well!
+ *
+ ****************************************************************************/
+
+void stm32_clockconfig(void)
+{
+ /* Make sure that we are starting in the reset state */
+
+ rcc_reset();
+
+#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
+
+ /* Invoke Board Custom Clock Configuration */
+
+ stm32_board_clockconfig();
+
+#else
+
+ /* Invoke standard, fixed clock configuration based on definitions in board.h */
+
+ stm32_stdclockconfig();
+
+#endif
+
+ /* Enable peripheral clocking */
+
rcc_enableahb();
rcc_enableapb2();
rcc_enableapb1();
diff --git a/arch/arm/src/stm32/stm32f103re_pinmap.h b/arch/arm/src/stm32/stm32f103re_pinmap.h
new file mode 100644
index 0000000000000000000000000000000000000000..fea301abb486d239f79f58024de5cb013ac4fa0e
--- /dev/null
+++ b/arch/arm/src/stm32/stm32f103re_pinmap.h
@@ -0,0 +1,330 @@
+/************************************************************************************
+ * arch/arm/src/stm32/stm32f103re_pinmap.h
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011 Uros Platise. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ * Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32_STM32F103RE_PINMAP_H
+#define __ARCH_ARM_SRC_STM32_STM32F103RE_PINMAP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Alternate Pin Functions: */
+
+#if defined(CONFIG_STM32_TIM1_FULL_REMAP)
+# define GPIO_TIM1_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTE|GPIO_PIN7)
+# define GPIO_TIM1_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTE|GPIO_PIN9)
+# define GPIO_TIM1_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTE|GPIO_PIN9)
+# define GPIO_TIM1_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTE|GPIO_PIN11)
+# define GPIO_TIM1_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTE|GPIO_PIN11)
+# define GPIO_TIM1_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTE|GPIO_PIN13)
+# define GPIO_TIM1_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTE|GPIO_PIN13)
+# define GPIO_TIM1_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTE|GPIO_PIN14)
+# define GPIO_TIM1_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTE|GPIO_PIN14)
+# define GPIO_TIM1_BKIN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTE|GPIO_PIN15)
+# define GPIO_TIM1_CH1N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTE|GPIO_PIN8)
+# define GPIO_TIM1_CH2N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTE|GPIO_PIN10)
+# define GPIO_TIM1_CH3N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTE|GPIO_PIN12)
+#elif defined(CONFIG_STM32_TIM1_PARTIAL_REMAP)
+# define GPIO_TIM1_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN12)
+# define GPIO_TIM1_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN8)
+# define GPIO_TIM1_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
+# define GPIO_TIM1_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN9)
+# define GPIO_TIM1_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
+# define GPIO_TIM1_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
+# define GPIO_TIM1_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN10)
+# define GPIO_TIM1_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11)
+# define GPIO_TIM1_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
+# define GPIO_TIM1_BKIN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6)
+# define GPIO_TIM1_CH1N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
+# define GPIO_TIM1_CH2N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0)
+# define GPIO_TIM1_CH3N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1)
+#else
+# define GPIO_TIM1_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN12)
+# define GPIO_TIM1_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN8)
+# define GPIO_TIM1_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
+# define GPIO_TIM1_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN9)
+# define GPIO_TIM1_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
+# define GPIO_TIM1_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
+# define GPIO_TIM1_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN10)
+# define GPIO_TIM1_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11)
+# define GPIO_TIM1_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
+# define GPIO_TIM1_BKIN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN12)
+# define GPIO_TIM1_CH1N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
+# define GPIO_TIM1_CH2N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14)
+# define GPIO_TIM1_CH3N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN15)
+#endif
+
+#if defined(CONFIG_STM32_TIM2_FULL_REMAP)
+# define GPIO_TIM2_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
+# define GPIO_TIM2_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
+# define GPIO_TIM2_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15)
+# define GPIO_TIM2_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN3)
+# define GPIO_TIM2_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
+# define GPIO_TIM2_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN10)
+# define GPIO_TIM2_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
+# define GPIO_TIM2_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11)
+# define GPIO_TIM2_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
+#elif defined(CONFIG_STM32_TIM2_PARTIAL_REMAP_1)
+# define GPIO_TIM2_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
+# define GPIO_TIM2_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
+# define GPIO_TIM2_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15)
+# define GPIO_TIM2_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN3)
+# define GPIO_TIM2_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
+# define GPIO_TIM2_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
+# define GPIO_TIM2_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2)
+# define GPIO_TIM2_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
+# define GPIO_TIM2_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
+#elif defined(CONFIG_STM32_TIM2_PARTIAL_REMAP_2)
+# define GPIO_TIM2_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
+# define GPIO_TIM2_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
+# define GPIO_TIM2_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0)
+# define GPIO_TIM2_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
+# define GPIO_TIM2_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
+# define GPIO_TIM2_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN10)
+# define GPIO_TIM2_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
+# define GPIO_TIM2_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11)
+# define GPIO_TIM2_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
+#else
+# define GPIO_TIM2_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
+# define GPIO_TIM2_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
+# define GPIO_TIM2_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0)
+# define GPIO_TIM2_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1)
+# define GPIO_TIM2_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
+# define GPIO_TIM2_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2)
+# define GPIO_TIM2_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2)
+# define GPIO_TIM2_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
+# define GPIO_TIM2_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
+#endif
+
+#if defined(CONFIG_STM32_TIM3_FULL_REMAP)
+# define GPIO_TIM3_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN6)
+# define GPIO_TIM3_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN6)
+# define GPIO_TIM3_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN7)
+# define GPIO_TIM3_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN7)
+# define GPIO_TIM3_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN8)
+# define GPIO_TIM3_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN8)
+# define GPIO_TIM3_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN9)
+# define GPIO_TIM3_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN9)
+#elif defined(CONFIG_STM32_TIM3_PARTIAL_REMAP)
+# define GPIO_TIM3_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN4)
+# define GPIO_TIM3_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN4)
+# define GPIO_TIM3_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN5)
+# define GPIO_TIM3_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
+# define GPIO_TIM3_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
+# define GPIO_TIM3_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0)
+# define GPIO_TIM3_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
+# define GPIO_TIM3_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1)
+#else
+# define GPIO_TIM3_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6)
+# define GPIO_TIM3_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN6)
+# define GPIO_TIM3_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7)
+# define GPIO_TIM3_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
+# define GPIO_TIM3_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
+# define GPIO_TIM3_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0)
+# define GPIO_TIM3_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
+# define GPIO_TIM3_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1)
+#endif
+
+#if defined(CONFIG_STM32_TIM4_REMAP)
+# define GPIO_TIM4_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN12)
+# define GPIO_TIM4_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN12)
+# define GPIO_TIM4_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN13)
+# define GPIO_TIM4_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN13)
+# define GPIO_TIM4_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN14)
+# define GPIO_TIM4_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN14)
+# define GPIO_TIM4_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN15)
+# define GPIO_TIM4_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN15)
+#else
+# define GPIO_TIM4_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN6)
+# define GPIO_TIM4_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
+# define GPIO_TIM4_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN7)
+# define GPIO_TIM4_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN7)
+# define GPIO_TIM4_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN8)
+# define GPIO_TIM4_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
+# define GPIO_TIM4_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN9)
+# define GPIO_TIM4_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
+#endif
+
+#define GPIO_TIM5_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
+#define GPIO_TIM5_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
+
+#if defined(CONFIG_STM32_USART1_REMAP)
+# define GPIO_USART1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
+# define GPIO_USART1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
+#else
+# define GPIO_USART1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
+# define GPIO_USART1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10)
+#endif
+
+#if defined(CONFIG_STM32_USART2_REMAP)
+# define GPIO_USART2_CTS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN3)
+# define GPIO_USART2_RTS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN4)
+# define GPIO_USART2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN5)
+# define GPIO_USART2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN6)
+# define GPIO_USART2_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN7)
+#else
+# define GPIO_USART2_CTS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0)
+# define GPIO_USART2_RTS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
+# define GPIO_USART2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2)
+# define GPIO_USART2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3)
+# define GPIO_USART2_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN4)
+#endif
+
+#if defined(CONFIG_STM32_USART3_FULL_REMAP)
+# define GPIO_USART3_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8)
+# define GPIO_USART3_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN9)
+# define GPIO_USART3_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10)
+# define GPIO_USART3_CTS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN11)
+# define GPIO_USART3_RTS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN12)
+#elif defined(CONFIG_STM32_USART3_PARTIAL_REMAP)
+# define GPIO_USART3_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10)
+# define GPIO_USART3_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN11)
+# define GPIO_USART3_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN12)
+# define GPIO_USART3_CTS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN13)
+# define GPIO_USART3_RTS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14)
+#else
+# define GPIO_USART3_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
+# define GPIO_USART3_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11)
+# define GPIO_USART3_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
+# define GPIO_USART3_CTS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN13)
+# define GPIO_USART3_RTS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14)
+#endif
+
+#if defined(CONFIG_STM32_SPI1_REMAP)
+# define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
+# define GPIO_SPI1_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
+# define GPIO_SPI1_MISO (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN4)
+# define GPIO_SPI1_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
+#else
+# define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN4)
+# define GPIO_SPI1_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN5)
+# define GPIO_SPI1_MISO (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN6)
+# define GPIO_SPI1_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
+#endif
+
+#if defined(CONFIG_STM32_SPI3_REMAP)
+# define GPIO_SPI3_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4)
+# define GPIO_SPI3_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10)
+# define GPIO_SPI3_MISO (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN11)
+# define GPIO_SPI3_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN12)
+#else
+# define GPIO_SPI3_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
+# define GPIO_SPI3_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3)
+# define GPIO_SPI3_MISO (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN4)
+# define GPIO_SPI3_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
+#endif
+
+#if defined(CONFIG_STM32_I2C1_REMAP)
+# define GPIO_I2C1_SCL (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
+# define GPIO_I2C1_SDA (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
+#else
+# define GPIO_I2C1_SCL (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
+# define GPIO_I2C1_SDA (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN7)
+#endif
+
+#if defined(CONFIG_STM32_CAN1_FULL_REMAP)
+# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN0)
+# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN1)
+#elif defined(CONFIG_STM32_CAN1_PARTIAL_REMAP)
+# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
+# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN9)
+#else
+# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
+# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN12)
+#endif
+
+#if defined(CONFIG_STM32_CAN2_REMAP)
+# define GPIO_CAN2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
+# define GPIO_CAN2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN6)
+#else
+# define GPIO_CAN2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
+# define GPIO_CAN2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN13)
+#endif
+
+/* SDIO */
+
+#define GPIO_SDIO_D0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN8)
+#define GPIO_SDIO_D1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN9)
+#define GPIO_SDIO_D2 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10)
+#define GPIO_SDIO_D3 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN11)
+#define GPIO_SDIO_D4 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
+#define GPIO_SDIO_D5 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
+#define GPIO_SDIO_D6 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN6)
+#define GPIO_SDIO_D7 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN7)
+#define GPIO_SDIO_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN12)
+#define GPIO_SDIO_CMD (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN2)
+
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_STM32_STM32F103RE_PINMAP_H */
diff --git a/configs/README.txt b/configs/README.txt
index 734a662ad0116176c6fc808faba0c91f5a920b9d..5dddb0c2fad022fc3bd2bd7429ae094bd2a6a618 100644
--- a/configs/README.txt
+++ b/configs/README.txt
@@ -1004,7 +1004,7 @@ configs/skp16c26
uses the GNU m32c toolchain.
configs/stm3210e-evel
- STMicrco STM3210E-EVAL development board based on the STMicro STM32F103ZET6
+ STMicro STM3210E-EVAL development board based on the STMicro STM32F103ZET6
microcontroller (ARM Cortex-M3). This port uses the GNU Cortex-M3
toolchain.
@@ -1012,6 +1012,10 @@ configs/us7032evb1
This is a port of the Hitachi SH-1 on the Hitachi SH-1/US7032EVB1 board.
STATUS: Work has just began on this port.
+configs/vsn
+ ISOTEL NetClamps VSN V1.2 ready2go sensor network platform based on the
+ STMicro STM32F103RET6. Contributed by Uros Platise.
+
configs/xtrs
TRS80 Model 3. This port uses a vintage computer based on the Z80.
An emulator for this computer is available to run TRS80 programs on a
diff --git a/configs/demo9s12ne64/ostest/defconfig b/configs/demo9s12ne64/ostest/defconfig
index 9c2afdf33ae3f969dc03351562ee7f7e54c456a6..ff5e58e8d0bf30c526bde29133538a570ef2b7be 100755
--- a/configs/demo9s12ne64/ostest/defconfig
+++ b/configs/demo9s12ne64/ostest/defconfig
@@ -179,11 +179,18 @@ CONFIG_SPI_POLLWAIT=y
# CONFIG_HAVE_LIBM - toolchain supports libm.a
#
CONFIG_RRLOAD_BINARY=n
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MOTOROLA_SREC=n
+CONFIG_INTELHEX_BINARY=n
+CONFIG_MOTOROLA_SREC=y
CONFIG_RAW_BINARY=n
CONFIG_HAVE_LIBM=n
+#
+# Setup for a two-pass build
+#
+CONFIG_BUILD_2PASS=n
+CONFIG_PASS1_BUILDIR=configs/demo9s12ne64/initrel
+CONFIG_PASS1_OBJECT=init.r
+
#
# General OS setup
#
diff --git a/configs/ne64badge/ostest/defconfig b/configs/ne64badge/ostest/defconfig
index fa9dbc58ed96096d8bf799289c91350e171022f9..3c39a6e3e56be782af62f4d54825a53e24436f69 100755
--- a/configs/ne64badge/ostest/defconfig
+++ b/configs/ne64badge/ostest/defconfig
@@ -190,11 +190,18 @@ CONFIG_SPI_POLLWAIT=y
# CONFIG_HAVE_LIBM - toolchain supports libm.a
#
CONFIG_RRLOAD_BINARY=n
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MOTOROLA_SREC=n
+CONFIG_INTELHEX_BINARY=n
+CONFIG_MOTOROLA_SREC=y
CONFIG_RAW_BINARY=n
CONFIG_HAVE_LIBM=n
+#
+# Setup for a two-pass build
+#
+CONFIG_BUILD_2PASS=n
+CONFIG_PASS1_BUILDIR=configs/ne64badge/initrel
+CONFIG_PASS1_OBJECT=init.r
+
#
# General OS setup
#
diff --git a/configs/ne64badge/ostest/ld.script.banked b/configs/ne64badge/ostest/ld.script.banked
index a0e07cb6591b419c320764cb53abfba2e9cb1841..ef0673aac0f583b1649c962e6fe4346780eaf6af 100755
--- a/configs/ne64badge/ostest/ld.script.banked
+++ b/configs/ne64badge/ostest/ld.script.banked
@@ -107,7 +107,7 @@ SECTIONS
_etext = ABSOLUTE(.);
} > hitext
- _eronly = ABSOLUTE(.); /* See below */
+ _eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
@@ -121,7 +121,7 @@ SECTIONS
*(vectors)
} > vectors
- .bss : { /* BSS */
+ .bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
diff --git a/configs/ne64badge/ostest/ld.script.nonbanked b/configs/ne64badge/ostest/ld.script.nonbanked
index 81fe56c42c827fd74ecaff87ae82e100a66a2a69..1ec41e919f539d8f9f0e451710c836bc2468d590 100755
--- a/configs/ne64badge/ostest/ld.script.nonbanked
+++ b/configs/ne64badge/ostest/ld.script.nonbanked
@@ -49,7 +49,9 @@ MEMORY
/* Three fixed text flash pages (corresponding to page 3e, 3d, and 3f) at
* 16Kb each (minus 256 bytes at the end of page 3f that is reserved for
- * interrupt vectors).
+ * interrupt vectors). Notice that this is linked as a single contiguous;
+ * Post-processing is planned to make the binary to the appropriate flash
+ * pages.
*/
text (rx) : ORIGIN = 0x4000, LENGTH = 48K-256 /* Page 3e, 3d, and 3f */
@@ -78,7 +80,7 @@ SECTIONS
_etext = ABSOLUTE(.);
} > text
- _eronly = ABSOLUTE(.); /* See below */
+ _eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
@@ -92,7 +94,7 @@ SECTIONS
*(vectors)
} > vectors
- .bss : { /* BSS */
+ .bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
diff --git a/configs/vsn/README.txt b/configs/vsn/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..5ade94d184bc8783433772b145c1fee8752f3e05
--- /dev/null
+++ b/configs/vsn/README.txt
@@ -0,0 +1,418 @@
+README
+^^^^^^
+
+This README discusses issues unique to NuttX configurations for the
+ISOTEL NetClamps VSN V1.2 ready2go sensor network platform.
+
+Contents
+^^^^^^^^
+
+ - Development Environment
+ - GNU Toolchain Options
+ - IDEs
+ - NuttX buildroot Toolchain
+ - DFU
+ - LEDs
+ - VSN-specific Configuration Options
+ - Configurations
+
+Development Environment
+^^^^^^^^^^^^^^^^^^^^^^^
+
+ Either Linux or Cygwin on Windows can be used for the development environment.
+ The source has been built only using the GNU toolchain (see below). Other
+ toolchains will likely cause problems. Testing was performed using the Cygwin
+ environment because the Raisonance R-Link emulatator and some RIDE7 development tools
+ were used and those tools works only under Windows.
+
+GNU Toolchain Options
+^^^^^^^^^^^^^^^^^^^^^
+
+ The NuttX make system has been modified to support the following different
+ toolchain options.
+
+ 1. The CodeSourcery GNU toolchain,
+ 2. The devkitARM GNU toolchain,
+ 3. Raisonance GNU toolchain, or
+ 4. The NuttX buildroot Toolchain (see below).
+
+ All testing has been conducted using the NuttX buildroot toolchain. However,
+ the make system is setup to default to use the devkitARM toolchain. To use
+ the CodeSourcery, devkitARM or Raisonance GNU toolchain, you simply need to
+ add one of the following configuration options to your .config (or defconfig)
+ file:
+
+ CONFIG_STM32_CODESOURCERYW=y : CodeSourcery under Windows
+ CONFIG_STM32_CODESOURCERYL=y : CodeSourcery under Linux
+ CONFIG_STM32_DEVKITARM=y : devkitARM under Windows
+ CONFIG_STM32_RAISONANCE=y : Raisonance RIDE7 under Windows
+ CONFIG_STM32_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default)
+
+ If you are not using CONFIG_STM32_BUILDROOT, then you may also have to modify
+ the PATH in the setenv.h file if your make cannot find the tools.
+
+ NOTE: the CodeSourcery (for Windows), devkitARM, and Raisonance toolchains are
+ Windows native toolchains. The CodeSourcey (for Linux) and NuttX buildroot
+ toolchains are Cygwin and/or Linux native toolchains. There are several limitations
+ to using a Windows based toolchain in a Cygwin environment. The three biggest are:
+
+ 1. The Windows toolchain cannot follow Cygwin paths. Path conversions are
+ performed automatically in the Cygwin makefiles using the 'cygpath' utility
+ but you might easily find some new path problems. If so, check out 'cygpath -w'
+
+ 2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic links
+ are used in Nuttx (e.g., include/arch). The make system works around these
+ problems for the Windows tools by copying directories instead of linking them.
+ But this can also cause some confusion for you: For example, you may edit
+ a file in a "linked" directory and find that your changes had not effect.
+ That is because you are building the copy of the file in the "fake" symbolic
+ directory. If you use a Windows toolchain, you should get in the habit of
+ making like this:
+
+ make clean_context all
+
+ An alias in your .bashrc file might make that less painful.
+
+ 3. Dependencies are not made when using Windows versions of the GCC. This is
+ because the dependencies are generated using Windows pathes which do not
+ work with the Cygwin make.
+
+ Support has been added for making dependencies with the windows-native toolchains.
+ That support can be enabled by modifying your Make.defs file as follows:
+
+ - MKDEP = $(TOPDIR)/tools/mknulldeps.sh
+ + MKDEP = $(TOPDIR)/tools/mkdeps.sh --winpaths "$(TOPDIR)"
+
+ If you have problems with the dependency build (for example, if you are not
+ building on C:), then you may need to modify tools/mkdeps.sh
+
+ NOTE 1: The CodeSourcery toolchain (2009q1) does not work with default optimization
+ level of -Os (See Make.defs). It will work with -O0, -O1, or -O2, but not with
+ -Os.
+
+ NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that
+ the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM
+ path or will get the wrong version of make.
+
+IDEs
+^^^^
+
+ NuttX is built using command-line make. It can be used with an IDE, but some
+ effort will be required to create the project (There is a simple RIDE project
+ in the RIDE subdirectory).
+
+ Makefile Build
+ --------------
+ Under Eclipse, it is pretty easy to set up an "empty makefile project" and
+ simply use the NuttX makefile to build the system. That is almost for free
+ under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty
+ makefile project in order to work with Windows (Google for "Eclipse Cygwin" -
+ there is a lot of help on the internet).
+
+ Native Build
+ ------------
+ Here are a few tips before you start that effort:
+
+ 1) Select the toolchain that you will be using in your .config file
+ 2) Start the NuttX build at least one time from the Cygwin command line
+ before trying to create your project. This is necessary to create
+ certain auto-generated files and directories that will be needed.
+ 3) Set up include pathes: You will need include/, arch/arm/src/stm32,
+ arch/arm/src/common, arch/arm/src/cortexm3, and sched/.
+ 4) All assembly files need to have the definition option -D __ASSEMBLY__
+ on the command line.
+
+ Startup files will probably cause you some headaches. The NuttX startup file
+ is arch/arm/src/stm32/stm32_vectors.S. With RIDE, I have to build NuttX
+ one time from the Cygwin command line in order to obtain the pre-built
+ startup object needed by RIDE.
+
+NuttX buildroot Toolchain
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+ A GNU GCC-based toolchain is assumed. The files */setenv.sh should
+ be modified to point to the correct path to the Cortex-M3 GCC toolchain (if
+ different from the default in your PATH variable).
+
+ If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX
+ SourceForge download site (https://sourceforge.net/project/showfiles.php?group_id=189573).
+ This GNU toolchain builds and executes in the Linux or Cygwin environment.
+
+ 1. You must have already configured Nuttx in <some-dir>/nuttx.
+
+ cd tools
+ ./configure.sh vsn/<sub-dir>
+
+ 2. Download the latest buildroot package into <some-dir>
+
+ 3. unpack the buildroot tarball. The resulting directory may
+ have versioning information on it like buildroot-x.y.z. If so,
+ rename <some-dir>/buildroot-x.y.z to <some-dir>/buildroot.
+
+ 4. cd <some-dir>/buildroot
+
+ 5. cp configs/cortexm3-defconfig-4.3.3 .config
+
+ 6. make oldconfig
+
+ 7. make
+
+ 8. Edit setenv.h, if necessary, so that the PATH variable includes
+ the path to the newly built binaries.
+
+ See the file configs/README.txt in the buildroot source tree. That has more
+ detailed PLUS some special instructions that you will need to follow if you are
+ building a Cortex-M3 toolchain for Cygwin under Windows.
+
+DFU
+^^^
+
+ The linker files in these projects can be configured to indicate that you
+ will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU)
+ loader or via some JTAG emulator. You can specify the DFU bootloader by
+ adding the following line:
+
+ CONFIG_STM32_DFU=y
+
+ to your .config file. Most of the configurations in this directory are set
+ up to use the DFU loader.
+
+ If CONFIG_STM32_DFU is defined, the code will not be positioned at the beginning
+ of FLASH (0x08000000) but will be offset to 0x08003000. This offset is needed
+ to make space for the DFU loader and 0x08003000 is where the DFU loader expects
+ to find new applications at boot time. If you need to change that origin for some
+ other bootloader, you will need to edit the file(s) ld.script.dfu for each
+ configuration.
+
+ The DFU SE PC-based software is available from the STMicro website,
+ http://www.st.com. General usage instructions:
+
+ 1. Convert the NuttX Intel Hex file (nuttx.ihx) into a special DFU
+ file (nuttx.dfu)... see below for details.
+ 2. Connect the VSN board to your computer using a USB
+ cable.
+ 3. Start the DFU loader on the VSN board. You do this by
+ resetting the board while holding the "Key" button. Windows should
+ recognize that the DFU loader has been installed.
+ 3. Run the DFU SE program to load nutt.dfu into FLASH.
+
+ What if the DFU loader is not in FLASH? The loader code is available
+ inside of the Demo dirctory of the USBLib ZIP file that can be downloaded
+ from the STMicro Website. You can build it using RIDE (or other toolchains);
+ you will need a JTAG emulator to burn it into FLASH the first time.
+
+ In order to use STMicro's built-in DFU loader, you will have to get
+ the NuttX binary into a special format with a .dfu extension. The
+ DFU SE PC_based software installation includes a file "DFU File Manager"
+ conversion program that a file in Intel Hex format to the special DFU
+ format. When you successfully build NuttX, you will find a file called
+ nutt.ihx in the top-level directory. That is the file that you should
+ provide to the DFU File Manager. You will need to rename it to nuttx.hex
+ in order to find it with the DFU File Manager. You will end up with
+ a file called nuttx.dfu that you can use with the STMicro DFU SE program.
+
+LEDs
+^^^^
+
+The VSN board has four LEDs labeled LD1, LD2, LD3 and LD4 on the
+the board. Usage of these LEDs is defined in include/board.h and src/up_leds.c.
+They are encoded as follows:
+
+ SYMBOL Meaning LED1* LED2 LED3 LED4
+ ------------------- ----------------------- ------- ------- ------- ------
+ LED_STARTED NuttX has been started ON OFF OFF OFF
+ LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF
+ LED_IRQSENABLED Interrupts enabled ON ON OFF OFF
+ LED_STACKCREATED Idle stack created OFF OFF ON OFF
+ LED_INIRQ In an interrupt** ON N/C N/C OFF
+ LED_SIGNAL In a signal handler*** N/C ON N/C OFF
+ LED_ASSERTION An assertion failed ON ON N/C OFF
+ LED_PANIC The system has crashed N/C N/C N/C ON
+
+ * If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
+ and these LEDs will give you some indication of where the failure was
+ ** The normal state is LED3 ON and LED1 faintly glowing. This faint glow
+ is because of timer interupts that result in the LED being illuminated
+ on a small proportion of the time.
+*** LED2 may also flicker normally if signals are processed.
+
+VSN-specific Configuration Options
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+ CONFIG_ARCH - Identifies the arch/ subdirectory. This should
+ be set to:
+
+ CONFIG_ARCH=arm
+
+ CONFIG_ARCH_family - For use in C code:
+
+ CONFIG_ARCH_ARM=y
+
+ CONFIG_ARCH_architecture - For use in C code:
+
+ CONFIG_ARCH_CORTEXM3=y
+
+ CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
+
+ CONFIG_ARCH_CHIP=stm32
+
+ CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
+ chip:
+
+ CONFIG_ARCH_CHIP_STM32F103ZET6
+
+ CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
+ hence, the board that supports the particular chip or SoC.
+
+ CONFIG_ARCH_BOARD=vsn (for the VSN development board)
+
+ CONFIG_ARCH_BOARD_name - For use in C code
+
+ CONFIG_ARCH_BOARD_VSN=y
+
+ CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
+ of delay loops
+
+ CONFIG_ENDIAN_BIG - define if big endian (default is little
+ endian)
+
+ CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case):
+
+ CONFIG_DRAM_SIZE=0x00010000 (64Kb)
+
+ CONFIG_DRAM_START - The start address of installed DRAM
+
+ CONFIG_DRAM_START=0x20000000
+
+ CONFIG_DRAM_END - Last address+1 of installed RAM
+
+ CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
+
+ CONFIG_ARCH_IRQPRIO - The STM32F103Z supports interrupt prioritization
+
+ CONFIG_ARCH_IRQPRIO=y
+
+ CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
+ have LEDs
+
+ CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
+ stack. If defined, this symbol is the size of the interrupt
+ stack in bytes. If not defined, the user task stacks will be
+ used during interrupt handling.
+
+ CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
+
+ CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
+
+ CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
+ cause a 100 second delay during boot-up. This 100 second delay
+ serves no purpose other than it allows you to calibratre
+ CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure
+ the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
+ the delay actually is 100 seconds.
+
+ Individual subsystems can be enabled:
+ AHB
+ ---
+ CONFIG_STM32_DMA1
+ CONFIG_STM32_DMA2
+ CONFIG_STM32_CRC
+ CONFIG_STM32_FSMC
+ CONFIG_STM32_SDIO
+
+ APB1
+ ----
+ CONFIG_STM32_TIM2
+ CONFIG_STM32_TIM3
+ CONFIG_STM32_TIM4
+ CONFIG_STM32_TIM5
+ CONFIG_STM32_TIM6
+ CONFIG_STM32_TIM7
+ CONFIG_STM32_WWDG
+ CONFIG_STM32_SPI2
+ CONFIG_STM32_SPI4
+ CONFIG_STM32_USART2
+ CONFIG_STM32_USART3
+ CONFIG_STM32_UART4
+ CONFIG_STM32_UART5
+ CONFIG_STM32_I2C1
+ CONFIG_STM32_I2C2
+ CONFIG_STM32_USB
+ CONFIG_STM32_CAN
+ CONFIG_STM32_BKP
+ CONFIG_STM32_PWR
+ CONFIG_STM32_DAC
+ CONFIG_STM32_USB
+
+ APB2
+ ----
+ CONFIG_STM32_ADC1
+ CONFIG_STM32_ADC2
+ CONFIG_STM32_TIM1
+ CONFIG_STM32_SPI1
+ CONFIG_STM32_TIM8
+ CONFIG_STM32_USART1
+ CONFIG_STM32_ADC3
+
+ Alternate pin mappings (should not be used with the VSN board):
+
+ CONFIG_STM32_TIM1_FULL_REMAP
+ CONFIG_STM32_TIM1_PARTIAL_REMAP
+ CONFIG_STM32_TIM2_FULL_REMAP
+ CONFIG_STM32_TIM2_PARTIAL_REMAP_1
+ CONFIG_STM32_TIM2_PARTIAL_REMAP_2
+ CONFIG_STM32_TIM3_FULL_REMAP
+ CONFIG_STM32_TIM3_PARTIAL_REMAP
+ CONFIG_STM32_TIM4_REMAP
+ CONFIG_STM32_USART1_REMAP
+ CONFIG_STM32_USART2_REMAP
+ CONFIG_STM32_USART3_FULL_REMAP
+ CONFIG_STM32_USART3_PARTIAL_REMAP
+ CONFIG_STM32_SPI1_REMAP
+ CONFIG_STM32_SPI3_REMAP
+ CONFIG_STM32_I2C1_REMAP
+ CONFIG_STM32_CAN1_FULL_REMAP
+ CONFIG_STM32_CAN1_PARTIAL_REMAP
+ CONFIG_STM32_CAN2_REMAP
+
+ STM32F103Z specific device driver settings
+
+ CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
+ m (m=4,5) for the console and ttys0 (default is the USART1).
+ CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
+ This specific the size of the receive buffer
+ CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
+ being sent. This specific the size of the transmit buffer
+ CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
+ CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
+ CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
+ CONFIG_U[S]ARTn_2STOP - Two stop bits
+
+ CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
+ support. Non-interrupt-driven, poll-waiting is recommended if the
+ interrupt rate would be to high in the interrupt driven case.
+ CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance.
+ Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
+
+ CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO
+ and CONFIG_STM32_DMA2.
+ CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128
+ CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
+ Default: Medium
+
+Configurations
+^^^^^^^^^^^^^^
+
+Each VSN configuration is maintained in a sudirectory and
+can be selected as follow:
+
+ cd tools
+ ./configure.sh vsn/<subdir>
+ cd -
+ . ./setenv.sh
+
+Where <subdir> is one of the following:
+
+ nsh:
+ Configures the NuttShell (nsh) located at examples/nsh. The
+ Configuration enables both the serial and telnetd NSH interfaces.
diff --git a/configs/vsn/include/board.h b/configs/vsn/include/board.h
new file mode 100644
index 0000000000000000000000000000000000000000..558dccd91d2ac79bcdd8c3e5f8f200c371dbcaab
--- /dev/null
+++ b/configs/vsn/include/board.h
@@ -0,0 +1,206 @@
+/************************************************************************************
+ * configs/vsn-1.2/include/board.h
+ * include/arch/board/board.h
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011 Uros Platise. All rights reserved
+ *
+ * Authors: Gregory Nutt <spudmonkey@racsa.co.cr>
+ * Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_BOARD_BOARD_H
+#define __ARCH_BOARD_BOARD_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#ifndef __ASSEMBLY__
+# include <stdint.h>
+#endif
+#include "stm32_rcc.h"
+#include "stm32_sdio.h"
+#include "stm32_internal.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+
+/* On-board external frequency source is 9MHz (HSE) provided by the CC1101, so it is
+ * not available on power-up. Instead we are about to run on HSI*9 = 36 MHz, see
+ * up_sysclock.c for details. */
+
+#define STM32_BOARD_XTAL 9000000UL
+#define STM32_BOARD_HCLK 36000000UL
+
+/* PLL source is either HSI or HSE
+ * When HSI: PLL multiplier is 9, out frequency 36 MHz
+ * When HSE: PLL multiplier is 8: out frequency is 9 MHz x 8 = 72MHz
+ */
+#define STM32_CFGR_PLLSRC_HSI 0
+#define STM32_CFGR_PLLMUL_HSI RCC_CFGR_PLLMUL_CLKx9
+
+#define STM32_CFGR_PLLXTPRE_HSE 0
+#define STM32_CFGR_PLLSRC_HSE RCC_CFGR_PLLSRC
+#define STM32_CFGR_PLLMUL_HSE RCC_CFGR_PLLMUL_CLKx8
+
+/* Use the PLL and set the SYSCLK source to be the PLL */
+
+#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL
+#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL
+
+/* AHB clock (HCLK, 36 MHz) is SYSCLK on HSI or SYSCLK/2 on HSE */
+
+#define STM32_RCC_CFGR_HPRE_HSI RCC_CFGR_HPRE_SYSCLK
+#define STM32_RCC_CFGR_HPRE_HSE RCC_CFGR_HPRE_SYSCLKd2
+#define STM32_HCLK_FREQUENCY STM32_BOARD_HCLK
+
+/* APB2 clock (PCLK2) is HCLK (36MHz) */
+
+#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
+#define STM32_PCLK2_FREQUENCY STM32_BOARD_HCLK
+
+/* APB1 clock (PCLK1) is HCLK (36MHz) */
+
+#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK
+#define STM32_PCLK1_FREQUENCY STM32_BOARD_HCLK
+
+/* USB divider -- Divide PLL clock by 1.5 */
+
+#define STM32_CFGR_USBPRE 0
+
+/* SDIO dividers. Note that slower clocking is required when DMA is disabled
+ * in order to avoid RX overrun/TX underrun errors due to delayed responses
+ * to service FIFOs in interrupt driven mode. These values have not been
+ * tuned!!!
+ *
+ * \todo Not checked yet! Uros.
+ * HCLK=36MHz, SDIOCLK=? MHz, SDIO_CK=HCLK/(178+2)=400 KHz
+ */
+
+#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT)
+
+/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz
+ * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
+ */
+
+#ifdef CONFIG_SDIO_DMA
+# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
+#else
+# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
+#endif
+
+/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz
+ * DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
+ */
+
+#ifdef CONFIG_SDIO_DMA
+# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
+#else
+# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
+#endif
+
+/* LED definitions ******************************************************************/
+
+/* The VSN has one LED that we will encode as: */
+
+#define LED_STARTED 0 /* ... */
+#define LED_HEAPALLOCATE 1 /* ... */
+#define LED_IRQSENABLED 2 /* ... */
+#define LED_STACKCREATED 3 /* ... */
+#define LED_INIRQ 4 /* ... */
+#define LED_SIGNAL 5 /* ... */
+#define LED_ASSERTION 6 /* ... */
+#define LED_PANIC 7 /* ... */
+#define LED_IDLE 8 /* shows idle state */
+
+/* eXternal connector pins */
+
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+ EXTERN void stm32_board_clockconfig(void);
+
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ * All STM32 architectures must provide the following entry point. This entry point
+ * is called early in the intitialization -- after all memory has been configured
+ * and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+EXTERN void stm32_boardinitialize(void);
+
+/************************************************************************************
+ * Button support.
+ *
+ * Description:
+ * up_buttoninit() must be called to initialize button resources. After that,
+ * up_buttons() may be called to collect the state of all buttons. up_buttons()
+ * returns an 8-bit bit set with each bit associated with a button. See the
+ * BUTTON_* and JOYSTICK_* definitions above for the meaning of each bit.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ARCH_BUTTONS
+EXTERN void up_buttoninit(void);
+EXTERN uint8_t up_buttons(void);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_BOARD_BOARD_H */
diff --git a/configs/vsn/nsh/Make.defs b/configs/vsn/nsh/Make.defs
new file mode 100644
index 0000000000000000000000000000000000000000..d343a07c8c6d3b03d6d766c935a910b3d0b02e69
--- /dev/null
+++ b/configs/vsn/nsh/Make.defs
@@ -0,0 +1,174 @@
+############################################################################
+# configs/stm3210e-eval/nsh/Make.defs
+#
+# Copyright (C) 2009 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+
+# Setup for the selected toolchain
+
+ifeq ($(CONFIG_STM32_DFU),y)
+ LDSCRIPT = ld.script.dfu
+else
+ LDSCRIPT = ld.script
+endif
+
+ifeq ($(CONFIG_STM32_CODESOURCERYW),y)
+ # CodeSourcery under Windows
+ CROSSDEV = arm-none-eabi-
+ WINTOOL = y
+ ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+endif
+ifeq ($(CONFIG_STM32_CODESOURCERYL),y)
+ # CodeSourcery under Linux
+ CROSSDEV = arm-none-eabi-
+ ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+ MAXOPTIMIZATION = -O2
+endif
+ifeq ($(CONFIG_STM32_DEVKITARM),y)
+ # devkitARM under Windows
+ CROSSDEV = arm-eabi-
+ WINTOOL = y
+ ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+endif
+ifeq ($(CONFIG_STM32_RAISONANCE),y)
+ # Raisonance RIDE7 under Windows
+ CROSSDEV = arm-none-eabi-
+ WINTOOL = y
+ ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+endif
+ifeq ($(CONFIG_STM32_BUILDROOT),y)
+ # NuttX buildroot under Linux or Cygwin
+ CROSSDEV = arm-elf-
+ ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft
+ MAXOPTIMIZATION = -Os
+endif
+
+ifeq ($(WINTOOL),y)
+ # Windows-native toolchains
+ DIRLINK = $(TOPDIR)/tools/winlink.sh
+ DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+ MKDEP = $(TOPDIR)/tools/mknulldeps.sh
+ ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+ ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+ ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/$(LDSCRIPT)}"
+ MAXOPTIMIZATION = -O2
+else
+ # Linux/Cygwin-native toolchain
+ MKDEP = $(TOPDIR)/tools/mkdeps.sh
+ ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+ ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+ ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/nsh/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ("${CONFIG_DEBUG_SYMBOLS}","y")
+ ARCHOPTIMIZATION = -g
+else
+ ARCHOPTIMIZATION = $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow
+ARCHWARNINGSXX = -Wall -Wshadow
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-elf-)
+ LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ LDFLAGS += -g
+endif
+
+define PREPROCESS
+ @echo "CPP: $1->$2"
+ @$(CPP) $(CPPFLAGS) $1 -o $2
+endef
+
+define COMPILE
+ @echo "CC: $1"
+ @$(CC) -c $(CFLAGS) $1 -o $2
+endef
+
+define COMPILEXX
+ @echo "CXX: $1"
+ @$(CXX) -c $(CXXFLAGS) $1 -o $2
+endef
+
+define ASSEMBLE
+ @echo "AS: $1"
+ @$(CC) -c $(AFLAGS) $1 -o $2
+endef
+
+define ARCHIVE
+ echo "AR: $2"; \
+ $(AR) $1 $2 || { echo "$(AR) $1 $2 FAILED!" ; exit 1 ; }
+endef
+
+define CLEAN
+ @rm -f *.o *.a
+endef
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/vsn/nsh/defconfig b/configs/vsn/nsh/defconfig
new file mode 100755
index 0000000000000000000000000000000000000000..ed95f617d9d47c8b993eae4cb134d96eb00725f3
--- /dev/null
+++ b/configs/vsn/nsh/defconfig
@@ -0,0 +1,814 @@
+############################################################################
+# configs/vsn/nsh/defconfig
+#
+# Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
+# Copyright (c) 2011 Uros Platise. All rights reserved.
+# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+# Uros Platise <uros.platise@isotel.eu>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+#
+# architecture selection
+#
+# CONFIG_ARCH - identifies the arch subdirectory and, hence, the
+# processor architecture.
+# CONFIG_ARCH_family - for use in C code. This identifies the
+# particular chip family that the architecture is implemented
+# in.
+# CONFIG_ARCH_architecture - for use in C code. This identifies the
+# specific architecture within the chip familyl.
+# CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
+# CONFIG_ARCH_CHIP_name - For use in C code
+# CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence,
+# the board that supports the particular chip or SoC.
+# CONFIG_ARCH_BOARD_name - for use in C code
+# CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
+# CONFIG_BOARD_LOOPSPERMSEC - for delay loops
+# CONFIG_DRAM_SIZE - Describes the installed DRAM.
+# CONFIG_DRAM_START - The start address of DRAM (physical)
+# CONFIG_DRAM_END - Last address+1 of installed RAM
+# CONFIG_ARCH_IRQPRIO - The ST32F103Z supports interrupt prioritization
+# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
+# stack. If defined, this symbol is the size of the interrupt
+# stack in bytes. If not defined, the user task stacks will be
+# used during interrupt handling.
+# CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
+# CONFIG_ARCH_BOOTLOADER - Set if you are using a bootloader.
+# CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
+# CONFIG_ARCH_BUTTONS - Enable support for buttons. Unique to board architecture.
+# CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
+# cause a 100 second delay during boot-up. This 100 second delay
+# serves no purpose other than it allows you to calibrate
+# CONFIG_BOARD_LOOPSPERMSEC. You simply use a stop watch to measure
+# the 100 second delay then adjust CONFIG_BOARD_LOOPSPERMSEC until
+# the delay actually is 100 seconds.
+# CONFIG_ARCH_DMA - Support DMA initialization
+#
+CONFIG_ARCH=arm
+CONFIG_ARCH_ARM=y
+CONFIG_ARCH_CORTEXM3=y
+CONFIG_ARCH_CHIP=stm32
+CONFIG_ARCH_CHIP_STM32F103RET6=y
+CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
+CONFIG_ARCH_BOARD=vsn
+CONFIG_BOARD_LOOPSPERMSEC=5483
+CONFIG_DRAM_SIZE=0x00010000
+CONFIG_DRAM_START=0x20000000
+CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
+CONFIG_ARCH_IRQPRIO=y
+CONFIG_ARCH_INTERRUPTSTACK=n
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_ARCH_BOOTLOADER=n
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_CALIBRATION=n
+CONFIG_ARCH_DMA=y
+
+#
+# Identify toolchain and linker options
+#
+CONFIG_STM32_CODESOURCERYW=n
+CONFIG_STM32_CODESOURCERYL=n
+CONFIG_STM32_DEVKITARM=n
+CONFIG_STM32_RAISONANCE=n
+CONFIG_STM32_BUILDROOT=y
+CONFIG_STM32_DFU=n
+
+#
+# Individual subsystems can be enabled:
+# AHB:
+CONFIG_STM32_DMA1=n
+CONFIG_STM32_DMA2=y
+CONFIG_STM32_CRC=n
+CONFIG_STM32_FSMC=n
+CONFIG_STM32_SDIO=y
+# APB1:
+CONFIG_STM32_TIM2=n
+CONFIG_STM32_TIM3=n
+CONFIG_STM32_TIM4=n
+CONFIG_STM32_TIM5=n
+CONFIG_STM32_TIM6=n
+CONFIG_STM32_TIM7=n
+CONFIG_STM32_WWDG=n
+CONFIG_STM32_SPI2=n
+CONFIG_STM32_SPI4=n
+CONFIG_STM32_USART2=n
+CONFIG_STM32_USART3=n
+CONFIG_STM32_UART4=n
+CONFIG_STM32_UART5=n
+CONFIG_STM32_I2C1=n
+CONFIG_STM32_I2C2=n
+CONFIG_STM32_USB=n
+CONFIG_STM32_CAN=n
+CONFIG_STM32_BKP=n
+CONFIG_STM32_PWR=n
+CONFIG_STM32_DAC=n
+# APB2:
+CONFIG_STM32_ADC1=n
+CONFIG_STM32_ADC2=n
+CONFIG_STM32_TIM1=n
+CONFIG_STM32_SPI1=n
+CONFIG_STM32_TIM8=n
+CONFIG_STM32_USART1=y
+CONFIG_STM32_ADC3=n
+
+#
+# STM32F103Z specific serial device driver settings
+#
+# CONFIG_USARTn_SERIAL_CONSOLE - selects the USARTn for the
+# console and ttys0 (default is the USART1).
+# CONFIG_USARTn_RXBUFSIZE - Characters are buffered as received.
+# This specific the size of the receive buffer
+# CONFIG_USARTn_TXBUFSIZE - Characters are buffered before
+# being sent. This specific the size of the transmit buffer
+# CONFIG_USARTn_BAUD - The configure BAUD of the UART. Must be
+# CONFIG_USARTn_BITS - The number of bits. Must be either 7 or 8.
+# CONFIG_USARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
+# CONFIG_USARTn_2STOP - Two stop bits
+#
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART2_SERIAL_CONSOLE=n
+CONFIG_USART3_SERIAL_CONSOLE=n
+CONFIG_USART4_SERIAL_CONSOLE=n
+CONFIG_USART5_SERIAL_CONSOLE=n
+
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART2_TXBUFSIZE=256
+CONFIG_USART3_TXBUFSIZE=256
+CONFIG_USART4_TXBUFSIZE=256
+CONFIG_USART5_TXBUFSIZE=256
+
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART2_RXBUFSIZE=256
+CONFIG_USART3_RXBUFSIZE=256
+CONFIG_USART4_RXBUFSIZE=256
+CONFIG_USART5_RXBUFSIZE=256
+
+CONFIG_USART1_BAUD=115200
+CONFIG_USART2_BAUD=115200
+CONFIG_USART3_BAUD=115200
+CONFIG_USART4_BAUD=115200
+CONFIG_USART5_BAUD=115200
+
+CONFIG_USART1_BITS=8
+CONFIG_USART2_BITS=8
+CONFIG_USART3_BITS=8
+CONFIG_USART4_BITS=8
+CONFIG_USART5_BITS=8
+
+CONFIG_USART1_PARITY=0
+CONFIG_USART2_PARITY=0
+CONFIG_USART3_PARITY=0
+CONFIG_USART4_PARITY=0
+CONFIG_USART5_PARITY=0
+
+CONFIG_USART1_2STOP=0
+CONFIG_USART2_2STOP=0
+CONFIG_USART3_2STOP=0
+CONFIG_USART4_2STOP=0
+CONFIG_USART5_2STOP=0
+
+#
+# STM32F103Z specific SSI device driver settings
+#
+# CONFIG_SSIn_DISABLE - select to disable all support for
+# the SSI
+# CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support
+# Poll-waiting is recommended if the interrupt rate would be to
+# high in the interrupt driven case.
+# CONFIG_SSI_TXLIMIT - Write this many words to the Tx FIFO before
+# emptying the Rx FIFO. If the SPI frequency is high and this
+# value is large, then larger values of this setting may cause
+# Rx FIFO overrun errors. Default: half of the Tx FIFO size (4).
+#
+CONFIG_SSI0_DISABLE=y
+CONFIG_SSI1_DISABLE=y
+CONFIG_SSI_POLLWAIT=y
+#CONFIG_SSI_TXLIMIT=4
+
+#
+# General build options
+#
+# CONFIG_RRLOAD_BINARY - make the rrload binary format used with
+# BSPs from www.ridgerun.com using the tools/mkimage.sh script
+# CONFIG_INTELHEX_BINARY - make the Intel HEX binary format
+# used with many different loaders using the GNU objcopy program
+# Should not be selected if you are not using the GNU toolchain.
+# CONFIG_MOTOROLA_SREC - make the Motorola S-Record binary format
+# used with many different loaders using the GNU objcopy program
+# Should not be selected if you are not using the GNU toolchain.
+# CONFIG_RAW_BINARY - make a raw binary format file used with many
+# different loaders using the GNU objcopy program. This option
+# should not be selected if you are not using the GNU toolchain.
+# CONFIG_HAVE_LIBM - toolchain supports libm.a
+#
+CONFIG_RRLOAD_BINARY=n
+CONFIG_INTELHEX_BINARY=n
+CONFIG_MOTOROLA_SREC=y
+CONFIG_RAW_BINARY=n
+CONFIG_HAVE_LIBM=n
+
+#
+# General OS setup
+#
+# CONFIG_APP_DIR - Identifies the relative path to the directory
+# that builds the application to link with NuttX.
+# CONFIG_DEBUG - enables built-in debug options
+# CONFIG_DEBUG_VERBOSE - enables verbose debug output
+# CONFIG_DEBUG_SYMBOLS - build without optimization and with
+# debug symbols (needed for use with a debugger).
+# CONFIG_MM_REGIONS - If the architecture includes multiple
+# regions of memory to allocate from, this specifies the
+# number of memory regions that the memory manager must
+# handle and enables the API mm_addregion(start, end);
+# CONFIG_ARCH_LOWPUTC - architecture supports low-level, boot
+# time console output
+# CONFIG_TICKS_PER_MSEC - The default system timer is 100Hz
+# or TICKS_PER_MSEC=10. This setting may be defined to
+# inform NuttX that the processor hardware is providing
+# system timer interrupts at some interrupt interval other
+# than 10 msec.
+# CONFIG_RR_INTERVAL - The round robin timeslice will be set
+# this number of milliseconds; Round robin scheduling can
+# be disabled by setting this value to zero.
+# CONFIG_SCHED_INSTRUMENTATION - enables instrumentation in
+# scheduler to monitor system performance
+# CONFIG_TASK_NAME_SIZE - Spcifies that maximum size of a
+# task name to save in the TCB. Useful if scheduler
+# instrumentation is selected. Set to zero to disable.
+# CONFIG_START_YEAR, CONFIG_START_MONTH, CONFIG_START_DAY -
+# Used to initialize the internal time logic.
+# CONFIG_GREGORIAN_TIME - Enables Gregorian time conversions.
+# You would only need this if you are concerned about accurate
+# time conversions in the past or in the distant future.
+# CONFIG_JULIAN_TIME - Enables Julian time conversions. You
+# would only need this if you are concerned about accurate
+# time conversion in the distand past. You must also define
+# CONFIG_GREGORIAN_TIME in order to use Julian time.
+# CONFIG_DEV_CONSOLE - Set if architecture-specific logic
+# provides /dev/console. Enables stdout, stderr, stdin.
+# CONFIG_DEV_LOWCONSOLE - Use the simple, low-level serial console
+# driver (minimul support)
+# CONFIG_MUTEX_TYPES: Set to enable support for recursive and
+# errorcheck mutexes. Enables pthread_mutexattr_settype().
+# CONFIG_PRIORITY_INHERITANCE : Set to enable support for priority
+# inheritance on mutexes and semaphores.
+# CONFIG_SEM_PREALLOCHOLDERS: This setting is only used if priority
+# inheritance is enabled. It defines the maximum number of
+# different threads (minus one) that can take counts on a
+# semaphore with priority inheritance support. This may be
+# set to zero if priority inheritance is disabled OR if you
+# are only using semaphores as mutexes (only one holder) OR
+# if no more than two threads participate using a counting
+# semaphore.
+# CONFIG_SEM_NNESTPRIO. If priority inheritance is enabled,
+# then this setting is the maximum number of higher priority
+# threads (minus 1) than can be waiting for another thread
+# to release a count on a semaphore. This value may be set
+# to zero if no more than one thread is expected to wait for
+# a semaphore.
+# CONFIG_FDCLONE_DISABLE. Disable cloning of all file descriptors
+# by task_create() when a new task is started. If set, all
+# files/drivers will appear to be closed in the new task.
+# CONFIG_FDCLONE_STDIO. Disable cloning of all but the first
+# three file descriptors (stdin, stdout, stderr) by task_create()
+# when a new task is started. If set, all files/drivers will
+# appear to be closed in the new task except for stdin, stdout,
+# and stderr.
+# CONFIG_SDCLONE_DISABLE. Disable cloning of all socket
+# desciptors by task_create() when a new task is started. If
+# set, all sockets will appear to be closed in the new task.
+# CONFIG_NXFLAT. Enable support for the NXFLAT binary format.
+# This format will support execution of NuttX binaries located
+# in a ROMFS filesystem (see examples/nxflat).
+# CONFIG_SCHED_WORKQUEUE. Create a dedicated "worker" thread to
+# handle delayed processing from interrupt handlers. This feature
+# is required for some drivers but, if there are not complaints,
+# can be safely disabled. The worker thread also performs
+# garbage collection -- completing any delayed memory deallocations
+# from interrupt handlers. If the worker thread is disabled,
+# then that clean will be performed by the IDLE thread instead
+# (which runs at the lowest of priority and may not be appropriate
+# if memory reclamation is of high priority). If CONFIG_SCHED_WORKQUEUE
+# is enabled, then the following options can also be used:
+# CONFIG_SCHED_WORKPRIORITY - The execution priority of the worker
+# thread. Default: 50
+# CONFIG_SCHED_WORKPERIOD - How often the worker thread checks for
+# work in units of microseconds. Default: 50*1000 (50 MS).
+# CONFIG_SCHED_WORKSTACKSIZE - The stack size allocated for the worker
+# thread. Default: CONFIG_IDLETHREAD_STACKSIZE.
+# CONFIG_SIG_SIGWORK - The signal number that will be used to wake-up
+# the worker thread. Default: 4
+#
+CONFIG_APP_DIR=examples/nsh
+CONFIG_DEBUG=n
+CONFIG_DEBUG_VERBOSE=n
+CONFIG_DEBUG_SYMBOLS=n
+CONFIG_MM_REGIONS=1
+CONFIG_ARCH_LOWPUTC=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_INSTRUMENTATION=n
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_START_YEAR=2009
+CONFIG_START_MONTH=9
+CONFIG_START_DAY=21
+CONFIG_GREGORIAN_TIME=n
+CONFIG_JULIAN_TIME=n
+CONFIG_DEV_CONSOLE=y
+CONFIG_DEV_LOWCONSOLE=n
+CONFIG_MUTEX_TYPES=n
+CONFIG_PRIORITY_INHERITANCE=n
+CONFIG_SEM_PREALLOCHOLDERS=0
+CONFIG_SEM_NNESTPRIO=0
+CONFIG_FDCLONE_DISABLE=n
+CONFIG_FDCLONE_STDIO=n
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NXFLAT=n
+CONFIG_SCHED_WORKQUEUE=y
+CONFIG_SCHED_WORKPRIORITY=50
+CONFIG_SCHED_WORKPERIOD=(50*1000)
+CONFIG_SCHED_WORKSTACKSIZE=1024
+CONFIG_SIG_SIGWORK=4
+
+#
+# The following can be used to disable categories of
+# APIs supported by the OS. If the compiler supports
+# weak functions, then it should not be necessary to
+# disable functions unless you want to restrict usage
+# of those APIs.
+#
+# There are certain dependency relationships in these
+# features.
+#
+# o mq_notify logic depends on signals to awaken tasks
+# waiting for queues to become full or empty.
+# o pthread_condtimedwait() depends on signals to wake
+# up waiting tasks.
+#
+CONFIG_DISABLE_CLOCK=n
+CONFIG_DISABLE_POSIX_TIMERS=n
+CONFIG_DISABLE_PTHREAD=n
+CONFIG_DISABLE_SIGNALS=n
+CONFIG_DISABLE_MQUEUE=n
+CONFIG_DISABLE_MOUNTPOINT=n
+CONFIG_DISABLE_ENVIRON=n
+CONFIG_DISABLE_POLL=y
+
+#
+# Misc libc settings
+#
+# CONFIG_NOPRINTF_FIELDWIDTH - sprintf-related logic is a
+# little smaller if we do not support fieldwidthes
+#
+CONFIG_NOPRINTF_FIELDWIDTH=n
+
+#
+# Allow for architecture optimized implementations
+#
+# The architecture can provide optimized versions of the
+# following to improve system performance
+#
+CONFIG_ARCH_MEMCPY=n
+CONFIG_ARCH_MEMCMP=n
+CONFIG_ARCH_MEMMOVE=n
+CONFIG_ARCH_MEMSET=n
+CONFIG_ARCH_STRCMP=n
+CONFIG_ARCH_STRCPY=n
+CONFIG_ARCH_STRNCPY=n
+CONFIG_ARCH_STRLEN=n
+CONFIG_ARCH_STRNLEN=n
+CONFIG_ARCH_BZERO=n
+CONFIG_ARCH_KMALLOC=n
+CONFIG_ARCH_KZMALLOC=n
+CONFIG_ARCH_KFREE=n
+
+#
+# Sizes of configurable things (0 disables)
+#
+# CONFIG_MAX_TASKS - The maximum number of simultaneously
+# active tasks. This value must be a power of two.
+# CONFIG_MAX_TASK_ARGS - This controls the maximum number of
+# of parameters that a task may receive (i.e., maxmum value
+# of 'argc')
+# CONFIG_NPTHREAD_KEYS - The number of items of thread-
+# specific data that can be retained
+# CONFIG_NFILE_DESCRIPTORS - The maximum number of file
+# descriptors (one for each open)
+# CONFIG_NFILE_STREAMS - The maximum number of streams that
+# can be fopen'ed
+# CONFIG_NAME_MAX - The maximum size of a file name.
+# CONFIG_STDIO_BUFFER_SIZE - Size of the buffer to allocate
+# on fopen. (Only if CONFIG_NFILE_STREAMS > 0)
+# CONFIG_NUNGET_CHARS - Number of characters that can be
+# buffered by ungetc() (Only if CONFIG_NFILE_STREAMS > 0)
+# CONFIG_PREALLOC_MQ_MSGS - The number of pre-allocated message
+# structures. The system manages a pool of preallocated
+# message structures to minimize dynamic allocations
+# CONFIG_MQ_MAXMSGSIZE - Message structures are allocated with
+# a fixed payload size given by this settin (does not include
+# other message structure overhead.
+# CONFIG_MAX_WDOGPARMS - Maximum number of parameters that
+# can be passed to a watchdog handler
+# CONFIG_PREALLOC_WDOGS - The number of pre-allocated watchdog
+# structures. The system manages a pool of preallocated
+# watchdog structures to minimize dynamic allocations
+# CONFIG_PREALLOC_TIMERS - The number of pre-allocated POSIX
+# timer structures. The system manages a pool of preallocated
+# timer structures to minimize dynamic allocations. Set to
+# zero for all dynamic allocations.
+#
+CONFIG_MAX_TASKS=16
+CONFIG_MAX_TASK_ARGS=4
+CONFIG_NPTHREAD_KEYS=4
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+CONFIG_STDIO_BUFFER_SIZE=256
+CONFIG_NUNGET_CHARS=2
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Filesystem configuration
+#
+# CONFIG_FS_FAT - Enable FAT filesystem support
+# CONFIG_FAT_SECTORSIZE - Max supported sector size
+# CONFIG_FS_ROMFS - Enable ROMFS filesystem support
+CONFIG_FS_FAT=y
+CONFIG_FS_ROMFS=n
+
+#
+# SPI-based MMC/SD driver
+#
+# CONFIG_MMCSD_NSLOTS
+# Number of MMC/SD slots supported by the driver
+# CONFIG_MMCSD_READONLY
+# Provide read-only access (default is read/write)
+# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
+# Default is 20MHz.
+#
+CONFIG_MMCSD_NSLOTS=1
+CONFIG_MMCSD_READONLY=n
+CONFIG_MMCSD_SPICLOCK=12500000
+
+#
+# Block driver buffering
+#
+# CONFIG_FS_READAHEAD
+# Enable read-ahead buffering
+# CONFIG_FS_WRITEBUFFER
+# Enable write buffering
+#
+CONFIG_FS_READAHEAD=n
+CONFIG_FS_WRITEBUFFER=n
+
+#
+# SDIO-based MMC/SD driver
+#
+# CONFIG_SDIO_DMA
+# SDIO driver supports DMA
+# CONFIG_MMCSD_MMCSUPPORT
+# Enable support for MMC cards
+# CONFIG_MMCSD_HAVECARDDETECT
+# SDIO driver card detection is 100% accurate
+#
+CONFIG_SDIO_DMA=y
+CONFIG_MMCSD_MMCSUPPORT=n
+CONFIG_MMCSD_HAVECARDDETECT=n
+
+#
+# TCP/IP and UDP support via uIP
+# CONFIG_NET - Enable or disable all network features
+# CONFIG_NET_IPv6 - Build in support for IPv6
+# CONFIG_NSOCKET_DESCRIPTORS - Maximum number of socket descriptors per task/thread.
+# CONFIG_NET_SOCKOPTS - Enable or disable support for socket options
+# CONFIG_NET_BUFSIZE - uIP buffer size
+# CONFIG_NET_TCP - TCP support on or off
+# CONFIG_NET_TCP_CONNS - Maximum number of TCP connections (all tasks)
+# CONFIG_NET_TCP_READAHEAD_BUFSIZE - Size of TCP read-ahead buffers
+# CONFIG_NET_NTCP_READAHEAD_BUFFERS - Number of TCP read-ahead buffers (may be zero)
+# CONFIG_NET_TCPBACKLOG - Incoming connections pend in a backlog until
+# accept() is called. The size of the backlog is selected when listen() is called.
+# CONFIG_NET_MAX_LISTENPORTS - Maximum number of listening TCP ports (all tasks)
+# CONFIG_NET_UDP - UDP support on or off
+# CONFIG_NET_UDP_CHECKSUMS - UDP checksums on or off
+# CONFIG_NET_UDP_CONNS - The maximum amount of concurrent UDP connections
+# CONFIG_NET_ICMP - ICMP ping response support on or off
+# CONFIG_NET_ICMP_PING - ICMP ping request support on or off
+# CONFIG_NET_PINGADDRCONF - Use "ping" packet for setting IP address
+# CONFIG_NET_STATISTICS - uIP statistics on or off
+# CONFIG_NET_RECEIVE_WINDOW - The size of the advertised receiver's window
+# CONFIG_NET_ARPTAB_SIZE - The size of the ARP table
+# CONFIG_NET_BROADCAST - Broadcast support
+# CONFIG_NET_LLH_LEN - The link level header length
+# CONFIG_NET_FWCACHE_SIZE - number of packets to remember when looking for duplicates
+#
+CONFIG_NET=n
+CONFIG_NET_IPv6=n
+CONFIG_NSOCKET_DESCRIPTORS=0
+CONFIG_NET_SOCKOPTS=y
+CONFIG_NET_BUFSIZE=420
+CONFIG_NET_TCP=n
+CONFIG_NET_TCP_CONNS=40
+CONFIG_NET_MAX_LISTENPORTS=40
+CONFIG_NET_UDP=n
+CONFIG_NET_UDP_CHECKSUMS=y
+#CONFIG_NET_UDP_CONNS=10
+CONFIG_NET_ICMP=n
+CONFIG_NET_ICMP_PING=n
+#CONFIG_NET_PINGADDRCONF=0
+CONFIG_NET_STATISTICS=y
+#CONFIG_NET_RECEIVE_WINDOW=
+#CONFIG_NET_ARPTAB_SIZE=8
+CONFIG_NET_BROADCAST=n
+#CONFIG_NET_LLH_LEN=14
+#CONFIG_NET_FWCACHE_SIZE=2
+
+#
+# UIP Network Utilities
+# CONFIG_NET_DHCP_LIGHT - Reduces size of DHCP
+# CONFIG_NET_RESOLV_ENTRIES - Number of resolver entries
+#
+CONFIG_NET_DHCP_LIGHT=n
+CONFIG_NET_RESOLV_ENTRIES=4
+
+#
+# USB Device Configuration
+#
+# CONFIG_USBDEV
+# Enables USB device support
+# CONFIG_USBDEV_ISOCHRONOUS
+# Build in extra support for isochronous endpoints
+# CONFIG_USBDEV_DUALSPEED
+# Hardware handles high and full speed operation (USB 2.0)
+# CONFIG_USBDEV_SELFPOWERED
+# Will cause USB features to indicate that the device is
+# self-powered
+# CONFIG_USBDEV_MAXPOWER
+# Maximum power consumption in mA
+# CONFIG_USBDEV_TRACE
+# Enables USB tracing for debug
+# CONFIG_USBDEV_TRACE_NRECORDS
+# Number of trace entries to remember
+#
+CONFIG_USBDEV=n
+CONFIG_USBDEV_ISOCHRONOUS=n
+CONFIG_USBDEV_DUALSPEED=n
+CONFIG_USBDEV_SELFPOWERED=y
+CONFIG_USBDEV_REMOTEWAKEUP=n
+CONFIG_USBDEV_MAXPOWER=100
+CONFIG_USBDEV_TRACE=n
+CONFIG_USBDEV_TRACE_NRECORDS=128
+
+#
+# USB Serial Device Configuration
+#
+# CONFIG_USBSER
+# Enable compilation of the USB serial driver
+# CONFIG_USBSER_EPINTIN
+# The logical 7-bit address of a hardware endpoint that supports
+# interrupt IN operation
+# CONFIG_USBSER_EPBULKOUT
+# The logical 7-bit address of a hardware endpoint that supports
+# bulk OUT operation
+# CONFIG_USBSER_EPBULKIN
+# The logical 7-bit address of a hardware endpoint that supports
+# bulk IN operation
+# # CONFIG_USBSER_NWRREQS and CONFIG_USBSER_NRDREQS
+# The number of write/read requests that can be in flight
+# CONFIG_USBSER_VENDORID and CONFIG_USBSER_VENDORSTR
+# The vendor ID code/string
+# CONFIG_USBSER_PRODUCTID and CONFIG_USBSER_PRODUCTSTR
+# The product ID code/string
+# CONFIG_USBSER_RXBUFSIZE and CONFIG_USBSER_TXBUFSIZE
+# Size of the serial receive/transmit buffers
+#
+CONFIG_USBSER=n
+CONFIG_USBSER_EPINTIN=1
+CONFIG_USBSER_EPBULKOUT=2
+CONFIG_USBSER_EPBULKIN=3
+CONFIG_USBSER_NWRREQS=4
+CONFIG_USBSER_NRDREQS=4
+CONFIG_USBSER_VENDORID=0x067b
+CONFIG_USBSER_PRODUCTID=0x2303
+CONFIG_USBSER_VENDORSTR="Nuttx"
+CONFIG_USBSER_PRODUCTSTR="USBdev Serial"
+CONFIG_USBSER_RXBUFSIZE=512
+CONFIG_USBSER_TXBUFSIZE=512
+
+#
+# USB Storage Device Configuration
+#
+# CONFIG_USBSTRG
+# Enable compilation of the USB storage driver
+# CONFIG_USBSTRG_EP0MAXPACKET
+# Max packet size for endpoint 0
+# CONFIG_USBSTRG_EPBULKOUT and CONFIG_USBSTRG_EPBULKIN
+# The logical 7-bit address of a hardware endpoints that support
+# bulk OUT and IN operations
+# CONFIG_USBSTRG_NWRREQS and CONFIG_USBSTRG_NRDREQS
+# The number of write/read requests that can be in flight
+# CONFIG_USBSTRG_BULKINREQLEN and CONFIG_USBSTRG_BULKOUTREQLEN
+# The size of the buffer in each write/read request. This
+# value needs to be at least as large as the endpoint
+# maxpacket and ideally as large as a block device sector.
+# CONFIG_USBSTRG_VENDORID and CONFIG_USBSTRG_VENDORSTR
+# The vendor ID code/string
+# CONFIG_USBSTRG_PRODUCTID and CONFIG_USBSTRG_PRODUCTSTR
+# The product ID code/string
+# CONFIG_USBSTRG_REMOVABLE
+# Select if the media is removable
+#
+CONFIG_USBSTRG=n
+CONFIG_USBSTRG_EP0MAXPACKET=64
+CONFIG_USBSTRG_EPBULKOUT=2
+CONFIG_USBSTRG_EPBULKIN=5
+CONFIG_USBSTRG_NRDREQS=2
+CONFIG_USBSTRG_NWRREQS=2
+CONFIG_USBSTRG_BULKINREQLEN=256
+CONFIG_USBSTRG_BULKOUTREQLEN=256
+CONFIG_USBSTRG_VENDORID=0x584e
+CONFIG_USBSTRG_VENDORSTR="NuttX"
+CONFIG_USBSTRG_PRODUCTID=0x5342
+CONFIG_USBSTRG_PRODUCTSTR="USBdev Storage"
+CONFIG_USBSTRG_VERSIONNO=0x0399
+CONFIG_USBSTRG_REMOVABLE=y
+
+#
+# Settings for examples/uip
+#
+CONFIG_EXAMPLE_UIP_IPADDR=(10<<24|0<<16|0<<8|2)
+CONFIG_EXAMPLE_UIP_DRIPADDR=(10<<24|0<<16|0<<8|1)
+CONFIG_EXAMPLE_UIP_NETMASK=(255<<24|255<<16|255<<8|0)
+CONFIG_EXAMPLE_UIP_DHCPC=n
+
+#
+# Settings for examples/nettest
+CONFIG_EXAMPLE_NETTEST_SERVER=n
+CONFIG_EXAMPLE_NETTEST_PERFORMANCE=n
+CONFIG_EXAMPLE_NETTEST_NOMAC=n
+CONFIG_EXAMPLE_NETTEST_IPADDR=(10<<24|0<<16|0<<8|2)
+CONFIG_EXAMPLE_NETTEST_DRIPADDR=(10<<24|0<<16|0<<8|1)
+CONFIG_EXAMPLE_NETTEST_NETMASK=(255<<24|255<<16|255<<8|0)
+CONFIG_EXAMPLE_NETTEST_CLIENTIP=(10<<24|0<<16|0<<8|1)
+
+#
+# Settings for examples/ostest
+#
+CONFIG_EXAMPLES_OSTEST_LOOPS=1
+CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048
+CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3
+
+#
+# Settings for examples/nsh
+#
+# CONFIG_EXAMPLES_NSH_FILEIOSIZE - Size of a static I/O buffer
+# CONFIG_EXAMPLES_NSH_STRERROR - Use strerror(errno)
+# CONFIG_EXAMPLES_NSH_LINELEN - Maximum length of one command line
+# CONFIG_EXAMPLES_NSH_STACKSIZE - Stack size to use for new threads.
+# CONFIG_EXAMPLES_NSH_NESTDEPTH - Max number of nested if-then[-else]-fi
+# CONFIG_EXAMPLES_NSH_DISABLESCRIPT - Disable scripting support
+# CONFIG_EXAMPLES_NSH_DISABLEBG - Disable background commands
+# CONFIG_EXAMPLES_NSH_ROMFSETC - Use startup script in /etc
+# CONFIG_EXAMPLES_NSH_CONSOLE - Use serial console front end
+# CONFIG_EXAMPLES_NSH_TELNET - Use telnetd console front end
+# CONFIG_EXAMPLES_NSH_ARCHINIT - Platform provides architecture
+# specific initialization (nsh_archinitialize()).
+#
+# If CONFIG_EXAMPLES_NSH_TELNET is selected:
+# CONFIG_EXAMPLES_NSH_IOBUFFER_SIZE -- Telnetd I/O buffer size
+# CONFIG_EXAMPLES_NSH_DHCPC - Obtain address using DHCP
+# CONFIG_EXAMPLES_NSH_IPADDR - Provides static IP address
+# CONFIG_EXAMPLES_NSH_DRIPADDR - Provides static router IP address
+# CONFIG_EXAMPLES_NSH_NETMASK - Provides static network mask
+# CONFIG_EXAMPLES_NSH_NOMAC - Use a bogus MAC address
+#
+# If CONFIG_EXAMPLES_NSH_ROMFSETC is selected:
+# CONFIG_EXAMPLES_NSH_ROMFSMOUNTPT - ROMFS mountpoint
+# CONFIG_EXAMPLES_NSH_INITSCRIPT - Relative path to init script
+# CONFIG_EXAMPLES_NSH_ROMFSDEVNO - ROMFS RAM device minor
+# CONFIG_EXAMPLES_NSH_ROMFSSECTSIZE - ROMF sector size
+# CONFIG_EXAMPLES_NSH_FATDEVNO - FAT FS RAM device minor
+# CONFIG_EXAMPLES_NSH_FATSECTSIZE - FAT FS sector size
+# CONFIG_EXAMPLES_NSH_FATNSECTORS - FAT FS number of sectors
+# CONFIG_EXAMPLES_NSH_FATMOUNTPT - FAT FS mountpoint
+#
+CONFIG_EXAMPLES_NSH_FILEIOSIZE=512
+CONFIG_EXAMPLES_NSH_STRERROR=n
+CONFIG_EXAMPLES_NSH_LINELEN=64
+CONFIG_EXAMPLES_NSH_STACKSIZE=2048
+CONFIG_EXAMPLES_NSH_NESTDEPTH=3
+CONFIG_EXAMPLES_NSH_DISABLESCRIPT=n
+CONFIG_EXAMPLES_NSH_DISABLEBG=n
+CONFIG_EXAMPLES_NSH_ROMFSETC=n
+CONFIG_EXAMPLES_NSH_CONSOLE=y
+CONFIG_EXAMPLES_NSH_TELNET=n
+CONFIG_EXAMPLES_NSH_ARCHINIT=y
+CONFIG_EXAMPLES_NSH_IOBUFFER_SIZE=512
+CONFIG_EXAMPLES_NSH_DHCPC=n
+CONFIG_EXAMPLES_NSH_NOMAC=n
+CONFIG_EXAMPLES_NSH_IPADDR=(10<<24|0<<16|0<<8|2)
+CONFIG_EXAMPLES_NSH_DRIPADDR=(10<<24|0<<16|0<<8|1)
+CONFIG_EXAMPLES_NSH_NETMASK=(255<<24|255<<16|255<<8|0)
+CONFIG_EXAMPLES_NSH_ROMFSMOUNTPT="/etc"
+CONFIG_EXAMPLES_NSH_INITSCRIPT="init.d/rcS"
+CONFIG_EXAMPLES_NSH_ROMFSDEVNO=0
+CONFIG_EXAMPLES_NSH_ROMFSSECTSIZE=64
+CONFIG_EXAMPLES_NSH_FATDEVNO=1
+CONFIG_EXAMPLES_NSH_FATSECTSIZE=512
+CONFIG_EXAMPLES_NSH_FATNSECTORS=1024
+CONFIG_EXAMPLES_NSH_FATMOUNTPT=/tmp
+
+#
+# Architecture-specific NSH options
+#
+CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO=0
+CONFIG_EXAMPLES_NSH_MMCSDSLOTNO=0
+CONFIG_EXAMPLES_NSH_MMCSDMINOR=0
+
+#
+# Settings for examples/usbserial
+#
+# CONFIG_EXAMPLES_USBSERIAL_INONLY
+# Only verify IN (device-to-host) data transfers. Default: both
+# CONFIG_EXAMPLES_USBSERIAL_OUTONLY
+# Only verify OUT (host-to-device) data transfers. Default: both
+# CONFIG_EXAMPLES_USBSERIAL_ONLYSMALL
+# Send only small, single packet messages. Default: Send large and small.
+# CONFIG_EXAMPLES_USBSERIAL_ONLYBIG
+# Send only large, multi-packet messages. Default: Send large and small.
+#
+CONFIG_EXAMPLES_USBSERIAL_INONLY=n
+CONFIG_EXAMPLES_USBSERIAL_OUTONLY=n
+CONFIG_EXAMPLES_USBSERIAL_ONLYSMALL=n
+CONFIG_EXAMPLES_USBSERIAL_ONLYBIG=n
+
+CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=n
+CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=n
+CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=n
+CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=n
+CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=n
+
+#
+# Stack and heap information
+#
+# CONFIG_BOOT_RUNFROMFLASH - Some configurations support XIP
+# operation from FLASH but must copy initialized .data sections to RAM.
+# (should also be =n for the STM3210E-EVAL which always runs from flash)
+# CONFIG_BOOT_COPYTORAM - Some configurations boot in FLASH
+# but copy themselves entirely into RAM for better performance.
+# CONFIG_CUSTOM_STACK - The up_ implementation will handle
+# all stack operations outside of the nuttx model.
+# CONFIG_STACK_POINTER - The initial stack pointer (arm7tdmi only)
+# CONFIG_IDLETHREAD_STACKSIZE - The size of the initial stack.
+# This is the thread that (1) performs the inital boot of the system up
+# to the point where user_start() is spawned, and (2) there after is the
+# IDLE thread that executes only when there is no other thread ready to
+# run.
+# CONFIG_USERMAIN_STACKSIZE - The size of the stack to allocate
+# for the main user thread that begins at the user_start() entry point.
+# CONFIG_PTHREAD_STACK_MIN - Minimum pthread stack size
+# CONFIG_PTHREAD_STACK_DEFAULT - Default pthread stack size
+# CONFIG_HEAP_BASE - The beginning of the heap
+# CONFIG_HEAP_SIZE - The size of the heap
+#
+CONFIG_BOOT_RUNFROMFLASH=n
+CONFIG_BOOT_COPYTORAM=n
+CONFIG_CUSTOM_STACK=n
+CONFIG_STACK_POINTER=
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+CONFIG_HEAP_BASE=
+CONFIG_HEAP_SIZE=
diff --git a/configs/vsn/nsh/ld.script b/configs/vsn/nsh/ld.script
new file mode 100755
index 0000000000000000000000000000000000000000..f7b4ba78bac7149d41ff6f149af3307e0040e86d
--- /dev/null
+++ b/configs/vsn/nsh/ld.script
@@ -0,0 +1,111 @@
+/****************************************************************************
+ * configs/stm3210e-eval/nsh/ld.script
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32F103ZET6 has 512Kb of FLASH beginning at address 0x0800:0000 and
+ * 64Kb of SRAM beginning at address 0x2000:0000. When booting from FLASH,
+ * FLASH memory is aliased to address 0x0000:0000 where the code expects to
+ * begin execution by jumping to the entry point in the 0x0800:0000 address
+ * range.
+ */
+
+MEMORY
+{
+ flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K
+ sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+ .text : {
+ _stext = ABSOLUTE(.);
+ *(.vectors)
+ *(.text .text.*)
+ *(.fixup)
+ *(.gnu.warning)
+ *(.rodata .rodata.*)
+ *(.gnu.linkonce.t.*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.got)
+ *(.gcc_except_table)
+ *(.gnu.linkonce.r.*)
+ _etext = ABSOLUTE(.);
+ } > flash
+
+ _eronly = ABSOLUTE(.); /* See below */
+
+ /* The STM32F103Z has 64Kb of SRAM beginning at the following address */
+
+ .data : {
+ _sdata = ABSOLUTE(.);
+ *(.data .data.*)
+ *(.gnu.linkonce.d.*)
+ CONSTRUCTORS
+ _edata = ABSOLUTE(.);
+ } > sram AT > flash
+
+ .ARM.extab : {
+ *(.ARM.extab*)
+ } >sram
+
+ .ARM.exidx : {
+ __exidx_start = ABSOLUTE(.);
+ *(.ARM.exidx*)
+ __exidx_end = ABSOLUTE(.);
+ } >sram
+
+ .bss : { /* BSS */
+ _sbss = ABSOLUTE(.);
+ *(.bss .bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ _ebss = ABSOLUTE(.);
+ } > sram
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/vsn/nsh/ld.script.dfu b/configs/vsn/nsh/ld.script.dfu
new file mode 100755
index 0000000000000000000000000000000000000000..2837fd04ceaf896304fd83428be93375ceeeedc9
--- /dev/null
+++ b/configs/vsn/nsh/ld.script.dfu
@@ -0,0 +1,110 @@
+/****************************************************************************
+ * configs/stm3210e-eval/nsh/ld.script.dfu
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32F103ZET6 has 512Kb of FLASH beginning at address 0x0800:0000 and
+ * 64Kb of SRAM beginning at address 0x2000:0000. Here we assume that the
+ * STM3210E-EVAL's DFU bootloader is being used. In that case, the corrct
+ * load .text load address is 0x08003000 (leaving 464Kb).
+ */
+
+MEMORY
+{
+ flash (rx) : ORIGIN = 0x08003000, LENGTH = 464K
+ sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+ .text : {
+ _stext = ABSOLUTE(.);
+ *(.vectors)
+ *(.text .text.*)
+ *(.fixup)
+ *(.gnu.warning)
+ *(.rodata .rodata.*)
+ *(.gnu.linkonce.t.*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.got)
+ *(.gcc_except_table)
+ *(.gnu.linkonce.r.*)
+ _etext = ABSOLUTE(.);
+ } > flash
+
+ _eronly = ABSOLUTE(.); /* See below */
+
+ /* The STM32F103Z has 64Kb of SRAM beginning at the following address */
+
+ .data : {
+ _sdata = ABSOLUTE(.);
+ *(.data .data.*)
+ *(.gnu.linkonce.d.*)
+ CONSTRUCTORS
+ _edata = ABSOLUTE(.);
+ } > sram AT > flash
+
+ .ARM.extab : {
+ *(.ARM.extab*)
+ } >sram
+
+ .ARM.exidx : {
+ __exidx_start = ABSOLUTE(.);
+ *(.ARM.exidx*)
+ __exidx_end = ABSOLUTE(.);
+ } >sram
+
+ .bss : { /* BSS */
+ _sbss = ABSOLUTE(.);
+ *(.bss .bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ _ebss = ABSOLUTE(.);
+ } > sram
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/vsn/nsh/setenv.sh b/configs/vsn/nsh/setenv.sh
new file mode 100755
index 0000000000000000000000000000000000000000..d836851921d762ce03149e42a4c6dc070738efdd
--- /dev/null
+++ b/configs/vsn/nsh/setenv.sh
@@ -0,0 +1,47 @@
+#!/bin/bash
+# configs/stm3210e-eval/dfu/setenv.sh
+#
+# Copyright (C) 2009 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$(basename $0)" = "setenv.sh" ] ; then
+ echo "You must source this script, not run it!" 1>&2
+ exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi
+
+WD=`pwd`
+export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin"
+export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/vsn/src/Makefile b/configs/vsn/src/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..f6d03d41f013d94a7fc6227b721a41561e365527
--- /dev/null
+++ b/configs/vsn/src/Makefile
@@ -0,0 +1,94 @@
+############################################################################
+# configs/vsn/src/Makefile
+#
+# Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
+# Copyright (c) 2011 Uros Platise. All rights reserved.
+#
+# Authors: Gregory Nutt <spudmonkey@racsa.co.cr>
+# Uros Platise <uros.platise@isotel.eu>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+CFLAGS += -I$(TOPDIR)/sched
+
+ASRCS =
+AOBJS = $(ASRCS:.S=$(OBJEXT))
+
+CSRCS = up_sysclock.c up_boot.c up_leds.c up_buttons.c up_spi.c up_usbdev.c
+
+ifeq ($(CONFIG_EXAMPLES_NSH_ARCHINIT),y)
+CSRCS += up_nsh.c
+endif
+ifeq ($(CONFIG_APP_DIR),examples/usbstorage)
+CSRCS += up_usbstrg.c
+endif
+COBJS = $(CSRCS:.c=$(OBJEXT))
+
+SRCS = $(ASRCS) $(CSRCS)
+OBJS = $(AOBJS) $(COBJS)
+
+ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
+ifeq ($(WINTOOL),y)
+ CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
+ -I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
+ -I "${shell cygpath -w $(ARCH_SRCDIR)/cortexm3}"
+else
+ CFLAGS += -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/cortexm3
+endif
+
+all: libboard$(LIBEXT)
+
+$(AOBJS): %$(OBJEXT): %.S
+ $(call ASSEMBLE, $<, $@)
+
+$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c
+ $(call COMPILE, $<, $@)
+
+libboard$(LIBEXT): $(OBJS)
+ @( for obj in $(OBJS) ; do \
+ $(call ARCHIVE, $@, $${obj}); \
+ done ; )
+
+.depend: Makefile $(SRCS)
+ @$(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
+ @touch $@
+
+depend: .depend
+
+clean:
+ @rm -f libboard$(LIBEXT) *~ .*.swp
+ $(call CLEAN)
+
+distclean: clean
+ @rm -f Make.dep .depend
+
+-include Make.dep
diff --git a/configs/vsn/src/up_boot.c b/configs/vsn/src/up_boot.c
new file mode 100644
index 0000000000000000000000000000000000000000..df05a10bfe34afa81b7e824a5c5bb025f40d7b24
--- /dev/null
+++ b/configs/vsn/src/up_boot.c
@@ -0,0 +1,105 @@
+/************************************************************************************
+ * configs/vsn/src/up_boot.c
+ * arch/arm/src/board/up_boot.c
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (c) 2011 Uros Platise. All rights reserved.
+ *
+ * Authors: Gregory Nutt <spudmonkey@racsa.co.cr>
+ * Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "vsn-internal.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ * All STM32 architectures must provide the following entry point. This entry point
+ * is called early in the intitialization -- after all memory has been configured
+ * and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void stm32_boardinitialize(void)
+{
+ /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
+ * stm32_spiinitialize() has been brought into the link.
+ */
+
+#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
+ if (stm32_spiinitialize)
+ {
+ stm32_spiinitialize();
+ }
+#endif
+
+ /* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
+ * disabled, and 3) the weak function stm32_usbinitialize() has been brought
+ * into the build.
+ */
+
+#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
+ if (stm32_usbinitialize)
+ {
+ stm32_usbinitialize();
+ }
+#endif
+
+ /* Configure on-board LEDs if LED support has been selected. */
+
+#ifdef CONFIG_ARCH_LEDS
+ up_ledinit();
+#endif
+}
diff --git a/configs/vsn/src/up_buttons.c b/configs/vsn/src/up_buttons.c
new file mode 100644
index 0000000000000000000000000000000000000000..27284a8d0507c765def4a1a6cee26d8efe6fdf15
--- /dev/null
+++ b/configs/vsn/src/up_buttons.c
@@ -0,0 +1,84 @@
+/****************************************************************************
+ * configs/vsn-1.2/src/up_buttons.c
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011 Uros Platise. All rights reserved.
+ *
+ * Authors: Gregory Nutt <spudmonkey@racsa.co.cr>
+ * Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <stdint.h>
+#include <arch/board/board.h>
+#include "vsn-internal.h"
+
+#ifdef CONFIG_ARCH_BUTTONS
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_buttoninit
+ ****************************************************************************/
+
+void up_buttoninit(void)
+{
+ stm32_configgpio(GPIO_PUSHBUTTON);
+}
+
+/****************************************************************************
+ * Name: up_buttons
+ ****************************************************************************/
+
+uint8_t up_buttons(void)
+{
+ return stm32_gpioread(GPIO_PUSHBUTTON);
+}
+
+#endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/vsn/src/up_leds.c b/configs/vsn/src/up_leds.c
new file mode 100644
index 0000000000000000000000000000000000000000..a936aac2e172bec59218cef3385e2faa69cbe19c
--- /dev/null
+++ b/configs/vsn/src/up_leds.c
@@ -0,0 +1,116 @@
+/****************************************************************************
+ * configs/vsn-1.2/src/up_leds.c
+ * arch/arm/src/board/up_leds.c
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011 Uros Platise. All rights reserved.
+ *
+ * Authors: Gregory Nutt <spudmonkey@racsa.co.cr>
+ * Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <arch/board/board.h>
+#include "vsn-internal.h"
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* Enables debug output from this file (needs CONFIG_DEBUG with
+ * CONFIG_DEBUG_VERBOSE too)
+ */
+
+#undef LED_DEBUG /* Define to enable debug */
+
+#ifdef LED_DEBUG
+# define leddbg lldbg
+# define ledvdbg llvdbg
+#else
+# define leddbg(x...)
+# define ledvdbg(x...)
+#endif
+
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static void led_setonoff(unsigned int bits)
+{
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_ledinit
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_LEDS
+void up_ledinit(void)
+{
+ stm32_configgpio(GPIO_LED);
+}
+
+/****************************************************************************
+ * Name: up_ledon
+ ****************************************************************************/
+
+void up_ledon(int led)
+{
+ if (led==LED_IDLE) stm32_gpiowrite(GPIO_LED, true);
+}
+
+/****************************************************************************
+ * Name: up_ledoff
+ ****************************************************************************/
+
+void up_ledoff(int led)
+{
+ if (led==LED_IDLE) stm32_gpiowrite(GPIO_LED, false);
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/configs/vsn/src/up_nsh.c b/configs/vsn/src/up_nsh.c
new file mode 100644
index 0000000000000000000000000000000000000000..323e91a443fd6d43e8955e1ff1a673c30fb06ce3
--- /dev/null
+++ b/configs/vsn/src/up_nsh.c
@@ -0,0 +1,215 @@
+/****************************************************************************
+ * config/vsn/src/up_nsh.c
+ * arch/arm/src/board/up_nsh.c
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011 Uros Platise. All rights reserved.
+ *
+ * Authors: Gregory Nutt <spudmonkey@racsa.co.cr>
+ * Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+#include <stdio.h>
+#include <debug.h>
+#include <errno.h>
+
+#ifdef CONFIG_STM32_SPI1
+# include <nuttx/spi.h>
+# include <nuttx/mtd.h>
+#endif
+
+#ifdef CONFIG_STM32_SDIO
+# include <nuttx/sdio.h>
+# include <nuttx/mmcsd.h>
+#endif
+
+#include "vsn-internal.h"
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+/* For now, don't build in any SPI1 support -- NSH is not using it */
+
+#undef CONFIG_STM32_SPI1
+
+/* PORT and SLOT number probably depend on the board configuration */
+
+#ifdef CONFIG_ARCH_BOARD_VSN
+# define CONFIG_EXAMPLES_NSH_HAVEUSBDEV 1
+# define CONFIG_EXAMPLES_NSH_HAVEMMCSD 1
+# if defined(CONFIG_EXAMPLES_NSH_MMCSDSLOTNO) && CONFIG_EXAMPLES_NSH_MMCSDSLOTNO != 0
+# error "Only one MMC/SD slot"
+# undef CONFIG_EXAMPLES_NSH_MMCSDSLOTNO
+# endif
+# ifndef CONFIG_EXAMPLES_NSH_MMCSDSLOTNO
+# define CONFIG_EXAMPLES_NSH_MMCSDSLOTNO 0
+# endif
+#else
+ /* Add configuration for new STM32 boards here */
+# undef CONFIG_EXAMPLES_NSH_HAVEUSBDEV
+# undef CONFIG_EXAMPLES_NSH_HAVEMMCSD
+#endif
+
+/* Can't support USB features if USB is not enabled */
+
+#ifndef CONFIG_USBDEV
+# undef CONFIG_EXAMPLES_NSH_HAVEUSBDEV
+#endif
+
+/* Can't support MMC/SD features if mountpoints are disabled or if SDIO support
+ * is not enabled.
+ */
+
+#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO)
+# undef CONFIG_EXAMPLES_NSH_HAVEMMCSD
+#endif
+
+#ifndef CONFIG_EXAMPLES_NSH_MMCSDMINOR
+# define CONFIG_EXAMPLES_NSH_MMCSDMINOR 0
+#endif
+
+/* Debug ********************************************************************/
+
+#ifdef CONFIG_CPP_HAVE_VARARGS
+# ifdef CONFIG_DEBUG
+# define message(...) lib_lowprintf(__VA_ARGS__)
+# else
+# define message(...) printf(__VA_ARGS__)
+# endif
+#else
+# ifdef CONFIG_DEBUG
+# define message lib_lowprintf
+# else
+# define message printf
+# endif
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: nsh_archinitialize
+ *
+ * Description:
+ * Perform architecture specific initialization
+ *
+ ****************************************************************************/
+
+int nsh_archinitialize(void)
+{
+#ifdef CONFIG_STM32_SPI1
+ FAR struct spi_dev_s *spi;
+ FAR struct mtd_dev_s *mtd;
+#endif
+#ifdef CONFIG_EXAMPLES_NSH_HAVEMMCSD
+ FAR struct sdio_dev_s *sdio;
+ int ret;
+#endif
+
+ /* Configure SPI-based devices */
+
+#ifdef CONFIG_STM32_SPI1
+ /* Get the SPI port */
+
+ message("nsh_archinitialize: Initializing SPI port 0\n");
+ spi = up_spiinitialize(0);
+ if (!spi)
+ {
+ message("nsh_archinitialize: Failed to initialize SPI port 0\n");
+ return -ENODEV;
+ }
+ message("nsh_archinitialize: Successfully initialized SPI port 0\n");
+
+ /* Now bind the SPI interface to the M25P64/128 SPI FLASH driver */
+
+ message("nsh_archinitialize: Bind SPI to the SPI flash driver\n");
+ mtd = m25p_initialize(spi);
+ if (!mtd)
+ {
+ message("nsh_archinitialize: Failed to bind SPI port 0 to the SPI FLASH driver\n");
+ return -ENODEV;
+ }
+ message("nsh_archinitialize: Successfully bound SPI port 0 to the SPI FLASH driver\n");
+#warning "Now what are we going to do with this SPI FLASH driver?"
+#endif
+
+ /* Create the SPI FLASH MTD instance */
+ /* The M25Pxx is not a give media to implement a file system..
+ * its block sizes are too large
+ */
+
+ /* Mount the SDIO-based MMC/SD block driver */
+
+#ifdef CONFIG_EXAMPLES_NSH_HAVEMMCSD
+ /* First, get an instance of the SDIO interface */
+
+ message("nsh_archinitialize: Initializing SDIO slot %d\n",
+ CONFIG_EXAMPLES_NSH_MMCSDSLOTNO);
+ sdio = sdio_initialize(CONFIG_EXAMPLES_NSH_MMCSDSLOTNO);
+ if (!sdio)
+ {
+ message("nsh_archinitialize: Failed to initialize SDIO slot %d\n",
+ CONFIG_EXAMPLES_NSH_MMCSDSLOTNO);
+ return -ENODEV;
+ }
+
+ /* Now bind the SPI interface to the MMC/SD driver */
+
+ message("nsh_archinitialize: Bind SDIO to the MMC/SD driver, minor=%d\n",
+ CONFIG_EXAMPLES_NSH_MMCSDMINOR);
+ ret = mmcsd_slotinitialize(CONFIG_EXAMPLES_NSH_MMCSDMINOR, sdio);
+ if (ret != OK)
+ {
+ message("nsh_archinitialize: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+ return ret;
+ }
+ message("nsh_archinitialize: Successfully bound SDIO to the MMC/SD driver\n");
+
+ /* Then let's guess and say that there is a card in the slot. I need to check to
+ * see if the VSN board supports a GPIO to detect if there is a card in
+ * the slot.
+ */
+
+ sdio_mediachange(sdio, true);
+#endif
+ return OK;
+}
diff --git a/configs/vsn/src/up_spi.c b/configs/vsn/src/up_spi.c
new file mode 100644
index 0000000000000000000000000000000000000000..bfc5f868263de4587359e89e3668e0b4da421ef6
--- /dev/null
+++ b/configs/vsn/src/up_spi.c
@@ -0,0 +1,181 @@
+/************************************************************************************
+ * configs/vsn/src/up_spi.c
+ * arch/arm/src/board/up_spi.c
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011 Uros Platise. All rights reserved.
+ *
+ * Authors: Gregory Nutt <spudmonkey@racsa.co.cr>
+ * Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/spi.h>
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "chip.h"
+#include "stm32_internal.h"
+#include "vsn-internal.h"
+
+#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Enables debug output from this file (needs CONFIG_DEBUG too) */
+
+#undef SPI_DEBUG /* Define to enable debug */
+#undef SPI_VERBOSE /* Define to enable verbose debug */
+
+#ifdef SPI_DEBUG
+# define spidbg lldbg
+# ifdef SPI_VERBOSE
+# define spivdbg lldbg
+# else
+# define spivdbg(x...)
+# endif
+#else
+# undef SPI_VERBOSE
+# define spidbg(x...)
+# define spivdbg(x...)
+#endif
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_spiinitialize
+ *
+ * Description:
+ * Called to configure SPI chip select GPIO pins for the VSN board.
+ *
+ ************************************************************************************/
+
+void weak_function stm32_spiinitialize(void)
+{
+ /* NOTE: Clocking for SPI1 and/or SPI2 was already provided in stm32_rcc.c.
+ * Configurations of SPI pins is performed in stm32_spi.c.
+ * Here, we only initialize chip select pins unique to the board
+ * architecture.
+ */
+
+#ifdef CONFIG_STM32_SPI1
+ /* Configure the SPI-based FLASH CS GPIO */
+
+ stm32_configgpio(GPIO_FLASH_CS);
+#endif
+}
+
+/****************************************************************************
+ * Name: stm32_spi1/2/3select and stm32_spi1/2/3status
+ *
+ * Description:
+ * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
+ * provided by board-specific logic. They are implementations of the select
+ * and status methods of the SPI interface defined by struct spi_ops_s (see
+ * include/nuttx/spi.h). All other methods (including up_spiinitialize())
+ * are provided by common STM32 logic. To use this common SPI logic on your
+ * board:
+ *
+ * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
+ * pins.
+ * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
+ * board-specific logic. These functions will perform chip selection and
+ * status operations using GPIOs in the way your board is configured.
+ * 3. Add a calls to up_spiinitialize() in your low level application
+ * initialization logic
+ * 4. The handle returned by up_spiinitialize() may then be used to bind the
+ * SPI driver to higher level logic (e.g., calling
+ * mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ * the SPI MMC/SD driver).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32_SPI1
+void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+ spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+
+ if (devid == SPIDEV_FLASH)
+ {
+ /* Set the GPIO low to select and high to de-select */
+
+ stm32_gpiowrite(GPIO_FLASH_CS, !selected);
+ }
+}
+
+uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+ return SPI_STATUS_PRESENT;
+}
+#endif
+
+#ifdef CONFIG_STM32_SPI2
+void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+ spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+ return SPI_STATUS_PRESENT;
+}
+#endif
+
+#ifdef CONFIG_STM32_SPI3
+void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+ spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+ return SPI_STATUS_PRESENT;
+}
+#endif
+
+#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */
diff --git a/configs/vsn/src/up_sysclock.c b/configs/vsn/src/up_sysclock.c
new file mode 100644
index 0000000000000000000000000000000000000000..c93b251c1c3e318627df9975f1d2deeb5a15d383
--- /dev/null
+++ b/configs/vsn/src/up_sysclock.c
@@ -0,0 +1,172 @@
+/****************************************************************************
+ * configs/vsn-1.2/src/up_sysclock.c
+ *
+ * Copyright (C) 2011 Uros Platise. All rights reserved.
+ *
+ * Author: Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/** \file
+ */
+
+#include <arch/board/board.h>
+#include "stm32_rcc.h"
+#include "stm32_flash.h"
+#include "up_internal.h"
+#include "up_arch.h"
+#include "chip.h"
+
+
+ /*--- Private ---*/
+
+/** Selects internal HSI Clock, SYSCLK = 36 MHz, HCLK = 36 MHz
+ * - HSI at 8 MHz, :2 enters DPLL * 9, to get 36 MHz
+ * - AHB prescaler is set to 1 for maximum performance of all peripherals and FRAM (18 Mbps)
+ * - Suitable for start-up and lower power operation
+ * - Flash Wait State = 1, since it is 64-bit prefetch, it satisfies two 32-bit instructions
+ * (and branch losses a single cycle only, I found this as the best performance vs. frequency)
+ * - Sleep with peripherals disabled is about 2.5 mA @ 36 MHz, HSI
+ *
+ * \todo:
+ * - dynamic clock scalling according to cross-peripheral requirements, AHB prescaler could
+ * change if all other prescalers increase, to maintain the ratio and to have min. HCLK
+ * possible; This is of interest when peripherals consume 50% of all power, as for instance
+ * in sleep mode @ 36 MHz, HSI with all peripherals enabled, i = 7 mA, on 24 Mhz 4.8 mA and
+ * on 16 MHz 3.2 mA only.
+ *
+ * \return Nothing, operation is always successful.
+ */
+void stm32_board_select_hsi(void)
+{
+ uint32_t regval;
+
+ // Are we running on HSE?
+ regval = getreg32(STM32_RCC_CR);
+ if (regval & RCC_CR_HSEON) {
+
+ // \todo: check is if we are running on HSE, we need the step down sequenuce from HSE -> HSI
+
+ return; // do nothing at this time
+ }
+
+ // Set FLASH prefetch buffer and 1 wait state
+ regval = getreg32(STM32_FLASH_ACR);
+ regval &= ~ACR_LATENCY_MASK;
+ regval |= (ACR_LATENCY_1|ACR_PRTFBE);
+ putreg32(regval, STM32_FLASH_ACR);
+
+ // Set the HCLK source/divider
+ regval = getreg32(STM32_RCC_CFGR);
+ regval &= ~RCC_CFGR_HPRE_MASK;
+ regval |= STM32_RCC_CFGR_HPRE_HSI;
+ putreg32(regval, STM32_RCC_CFGR);
+
+ // Set the PCLK2 divider
+ regval = getreg32(STM32_RCC_CFGR);
+ regval &= ~RCC_CFGR_PPRE2_MASK;
+ regval |= STM32_RCC_CFGR_PPRE2;
+ putreg32(regval, STM32_RCC_CFGR);
+
+ // Set the PCLK1 divider
+ regval = getreg32(STM32_RCC_CFGR);
+ regval &= ~RCC_CFGR_PPRE1_MASK;
+ regval |= STM32_RCC_CFGR_PPRE1;
+ putreg32(regval, STM32_RCC_CFGR);
+
+ // Set the PLL source = HSI, divider (/2) and multipler (*9)
+ regval = getreg32(STM32_RCC_CFGR);
+ regval &= ~(RCC_CFGR_PLLSRC|RCC_CFGR_PLLXTPRE|RCC_CFGR_PLLMUL_MASK);
+ regval |= (STM32_CFGR_PLLSRC_HSI|STM32_CFGR_PLLMUL_HSI);
+ putreg32(regval, STM32_RCC_CFGR);
+
+ // Enable the PLL
+ regval = getreg32(STM32_RCC_CR);
+ regval |= RCC_CR_PLLON;
+ putreg32(regval, STM32_RCC_CR);
+
+ // Wait until the PLL is ready
+ while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLRDY) == 0);
+
+ // Select the system clock source (probably the PLL)
+ regval = getreg32(STM32_RCC_CFGR);
+ regval &= ~RCC_CFGR_SW_MASK;
+ regval |= STM32_SYSCLK_SW;
+ putreg32(regval, STM32_RCC_CFGR);
+
+ // Wait until the selected source is used as the system clock source
+ while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_MASK) != STM32_SYSCLK_SWS);
+}
+
+
+/** Selects external HSE Clock, SYSCLK = 72 MHz, HCLK = 36/72 MHz
+ * - HSE at 9 MHz, DPLL * 8, to get 72 MHz
+ * - Suitable for maximum performance and USB
+ * - Sleep power consumption at HSE and at 72 MHz is 5.5 mA (3.1 @ 36 MHz)
+ * - Option AHB prescaler is set to :2 to be compatible with HSI to remain on HCLK = 36 MHz
+ * - Flash memory running on 72 MHz needs two wait states
+ *
+ * \return Clock selection status
+ * \retval 0 Successful
+ * \retval -1 External clock is not provided
+ * \retval -2 Could not lock to external clock
+ */
+int stm32_board_select_hse(void)
+{
+ // if (is cc1101 9 MHz clock output enabled), otherwise return with -1
+ // I think that clock register provides HSE valid signal to detect that as well.
+
+ return 0;
+}
+
+
+ /*--- Interrupts ---*/
+
+
+/** TODO: Interrupt on lost HSE clock, change it to HSI, ... restarting is
+ * more complex as the step requires restart of CC1101 device driver;
+ * so spawn a task for that... once cc1101 is restarted signal an event
+ * to restart clock.
+ */
+void stm32_board_hse_lost(void)
+{
+}
+
+
+ /*--- Public API ---*/
+
+/** Setup system clock, enabled when:
+ * - CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG
+ * option is set in .config
+ */
+void stm32_board_clockconfig(void)
+{
+ stm32_board_select_hsi();
+}
diff --git a/configs/vsn/src/up_usbdev.c b/configs/vsn/src/up_usbdev.c
new file mode 100644
index 0000000000000000000000000000000000000000..a30a8f8a17799bb869b06c4d5fd60c6dc5c4f75a
--- /dev/null
+++ b/configs/vsn/src/up_usbdev.c
@@ -0,0 +1,123 @@
+/************************************************************************************
+ * configs/svsn/src/up_usbdev.c
+ * arch/arm/src/board/up_boot.c
+ *
+ * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
+ * Copyright (c) 2011 Uros Platise. All rights reserved.
+ *
+ * Authors: Gregory Nutt <spudmonkey@racsa.co.cr>
+ * Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/usb/usbdev.h>
+#include <nuttx/usb/usbdev_trace.h>
+
+#include "up_arch.h"
+#include "stm32_internal.h"
+#include "vsn-internal.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ * Called to setup USB-related GPIO pins for the VSN board.
+ *
+ ************************************************************************************/
+
+void stm32_usbinitialize(void)
+{
+ /* USB Soft Connect Pullup: PB.14 */
+
+#if defined(GPIO_USB_PULLUP)
+ stm32_configgpio(GPIO_USB_PULLUP);
+#endif
+}
+
+/************************************************************************************
+ * Name: stm32_usbpullup
+ *
+ * Description:
+ * If USB is supported and the board supports a pullup via GPIO (for USB software
+ * connect and disconnect), then the board software must provide stm32_pullup.
+ * See include/nuttx/usb/usbdev.h for additional description of this method.
+ * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
+ * NULL.
+ *
+ ************************************************************************************/
+
+int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
+{
+ usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
+#if defined(GPIO_USB_PULLUP)
+ stm32_gpiowrite(GPIO_USB_PULLUP, !enable);
+#endif
+ return OK;
+}
+
+/************************************************************************************
+ * Name: stm32_usbsuspend
+ *
+ * Description:
+ * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
+ * used. This function is called whenever the USB enters or leaves suspend mode.
+ * This is an opportunity for the board logic to shutdown clocks, power, etc.
+ * while the USB is suspended.
+ *
+ ************************************************************************************/
+
+void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+ ulldbg("resume: %d\n", resume);
+}
+
diff --git a/configs/vsn/src/up_usbstrg.c b/configs/vsn/src/up_usbstrg.c
new file mode 100644
index 0000000000000000000000000000000000000000..2a34bab406866d6c40361f7b221bdc8ff54a65ae
--- /dev/null
+++ b/configs/vsn/src/up_usbstrg.c
@@ -0,0 +1,156 @@
+/****************************************************************************
+ * configs/vsn/src/up_usbstrg.c
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (c) 2011 Uros Platise. All rights reserved.
+ *
+ * Authors: Gregory Nutt <spudmonkey@racsa.co.cr>
+ * Uros Platise <uros.platise@isotel.eu>
+ *
+ * Configure and register the STM32 MMC/SD SDIO block driver.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdio.h>
+#include <debug.h>
+#include <errno.h>
+
+#include <nuttx/sdio.h>
+#include <nuttx/mmcsd.h>
+
+#include "vsn-internal.h"
+
+#ifdef CONFIG_STM32_SDIO
+
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_EXAMPLES_USBSTRG_DEVMINOR1
+# define CONFIG_EXAMPLES_USBSTRG_DEVMINOR1 0
+#endif
+
+/* SLOT number(s) could depend on the board configuration */
+
+#ifdef CONFIG_ARCH_BOARD_VSN
+# undef STM32_MMCSDSLOTNO
+# define STM32_MMCSDSLOTNO 0
+#else
+ /* Add configuration for new STM32 boards here */
+# error "Unrecognized STM32 board"
+#endif
+
+/* Debug ********************************************************************/
+
+#ifdef CONFIG_CPP_HAVE_VARARGS
+# ifdef CONFIG_DEBUG
+# define message(...) lib_lowprintf(__VA_ARGS__)
+# define msgflush()
+# else
+# define message(...) printf(__VA_ARGS__)
+# define msgflush() fflush(stdout)
+# endif
+#else
+# ifdef CONFIG_DEBUG
+# define message lib_lowprintf
+# define msgflush()
+# else
+# define message printf
+# define msgflush() fflush(stdout)
+# endif
+#endif
+
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: usbstrg_archinitialize
+ *
+ * Description:
+ * Perform architecture specific initialization
+ *
+ ****************************************************************************/
+
+int usbstrg_archinitialize(void)
+{
+ FAR struct sdio_dev_s *sdio;
+ int ret;
+
+ /* First, get an instance of the SDIO interface */
+
+ message("usbstrg_archinitialize: "
+ "Initializing SDIO slot %d\n",
+ STM32_MMCSDSLOTNO);
+
+ sdio = sdio_initialize(STM32_MMCSDSLOTNO);
+ if (!sdio)
+ {
+ message("usbstrg_archinitialize: Failed to initialize SDIO slot %d\n",
+ STM32_MMCSDSLOTNO);
+ return -ENODEV;
+ }
+
+ /* Now bind the SPI interface to the MMC/SD driver */
+
+ message("usbstrg_archinitialize: "
+ "Bind SDIO to the MMC/SD driver, minor=%d\n",
+ CONFIG_EXAMPLES_USBSTRG_DEVMINOR1);
+
+ ret = mmcsd_slotinitialize(CONFIG_EXAMPLES_USBSTRG_DEVMINOR1, sdio);
+ if (ret != OK)
+ {
+ message("usbstrg_archinitialize: "
+ "Failed to bind SDIO to the MMC/SD driver: %d\n",
+ ret);
+ return ret;
+ }
+ message("usbstrg_archinitialize: "
+ "Successfully bound SDIO to the MMC/SD driver\n");
+
+ /* Then let's guess and say that there is a card in the slot. I need to check to
+ * see if the VSN board supports a GPIO to detect if there is a card in
+ * the slot.
+ */
+
+ sdio_mediachange(sdio, true);
+ return OK;
+}
+
+#endif /* CONFIG_STM32_SDIO */
diff --git a/configs/vsn/src/vsn-internal.h b/configs/vsn/src/vsn-internal.h
new file mode 100644
index 0000000000000000000000000000000000000000..832dff146278a6c151f9980803a6e00f4402a6bd
--- /dev/null
+++ b/configs/vsn/src/vsn-internal.h
@@ -0,0 +1,121 @@
+/************************************************************************************
+ * configs/vsn/src/vsn-internal.h
+ * arch/arm/src/board/vsn-internal.n
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (c) 2011 Uros Platise. All rights reserved.
+ *
+ * Authors: Gregory Nutt <spudmonkey@racsa.co.cr>
+ * Uros Platise <uros.platise@isotel.eu>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIGS_VSN_1_2_SRC_VSN_INTERNAL_H
+#define __CONFIGS_VSN_1_2_SRC_VSN_INTERNAL_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+#include <stdint.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* How many SPI modules does this chip support? The LM3S6918 supports 2 SPI
+ * modules (others may support more -- in such case, the following must be
+ * expanded).
+ */
+
+#if STM32_NSPI < 1
+# undef CONFIG_STM32_SPI1
+# undef CONFIG_STM32_SPI2
+#elif STM32_NSPI < 2
+# undef CONFIG_STM32_SPI2
+#endif
+
+/* VSN 1.2 GPIOs **************************************************************/
+
+/* LED */
+
+#define GPIO_LED (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN2)
+
+/* BUTTON - Note that after a good second button causes hardware reset */
+
+#define GPIO_PUSHBUTTON (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN5)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_spiinitialize
+ *
+ * Description:
+ * Called to configure SPI chip select GPIO pins for the VSN board.
+ *
+ ************************************************************************************/
+
+extern void weak_function stm32_spiinitialize(void);
+
+/************************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ * Called to setup USB-related GPIO pins for the VSN board.
+ *
+ ************************************************************************************/
+
+extern void weak_function stm32_usbinitialize(void);
+
+/************************************************************************************
+ * Name: stm32_extcontextsave
+ *
+ * Description:
+ * Save current GPIOs that will used by external memory configurations
+ *
+ ************************************************************************************/
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_VSN_1_2_SRC_VSN_INTERNAL_H */
+