diff --git a/arch/arm/src/sam3u/Make.defs b/arch/arm/src/sam3u/Make.defs
index 4c1bc0575e22f82c6da1d5f20e1cd3f739ca85e3..f35f0cc695e488dbca2d9d48ed30dbbef8998e01 100755
--- a/arch/arm/src/sam3u/Make.defs
+++ b/arch/arm/src/sam3u/Make.defs
@@ -36,15 +36,16 @@
 HEAD_ASRC	= sam3u_vectors.S
 
 CMN_ASRCS	= up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
-CMN_CSRCS	= up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
-		  up_createstack.c up_mdelay.c up_udelay.c up_exit.c \
-		  up_idle.c up_initialize.c up_initialstate.c up_interruptcontext.c \
-		  up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
-		  up_releasepending.c up_releasestack.c up_reprioritizertr.c \
-		  up_schedulesigaction.c up_sigdeliver.c up_unblocktask.c \
-		  up_usestack.c up_doirq.c up_hardfault.c up_svcall.c
+CMN_CSRCS	= up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
+		  up_mdelay.c up_udelay.c up_exit.c up_idle.c up_initialize.c \
+		  up_initialstate.c up_interruptcontext.c up_modifyreg8.c \
+		  up_modifyreg16.c up_modifyreg32.c up_releasepending.c \
+		  up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
+		  up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \
+		  up_hardfault.c up_svcall.c
 
 CHIP_ASRCS	= 
-CHIP_CSRCS	= sam3u_clockconfig.c sam3u_gpioirq.c sam3u_irq.c sam3u_lowputc.c \
-		   sam3u_pio.c sam3u_serial.c sam3u_start.c sam3u_timerisr.c
+CHIP_CSRCS	= sam3u_allocateheap.c sam3u_clockconfig.c sam3u_gpioirq.c \
+		  sam3u_irq.c sam3u_lowputc.c sam3u_pio.c sam3u_serial.c \
+		  sam3u_start.c sam3u_timerisr.c
 
diff --git a/arch/arm/src/sam3u/chip.h b/arch/arm/src/sam3u/chip.h
index 3f675a6f23a5adeb276435e038ebb6bf9135b871..548f6b0fcfd7c3e56d713f170573394cd9eaad97 100755
--- a/arch/arm/src/sam3u/chip.h
+++ b/arch/arm/src/sam3u/chip.h
@@ -48,6 +48,15 @@
 
 /* Get customizations for each supported chip */
 
+#ifdef CONFIG_ARCH_CHIP_AT91SAM3U4E
+#  define CONFIG_SAM3U_SRAM0_SIZE   0x00008000  /* 32Kb */
+#  define CONFIG_SAM3U_SRAM1_SIZE   0x00004000  /* 16Kb */
+#  define CONFIG_SAM3U_NFCSRAM_SIZE 0x00001000  /*  4Kb */
+
+#else
+#  error "Unknown SAM3U chip type"
+#endif
+
 /* Include only the memory map.  Other chip hardware files should then include this
  * file for the proper setup
  */
diff --git a/arch/arm/src/sam3u/sam3u_allocateheap.c b/arch/arm/src/sam3u/sam3u_allocateheap.c
new file mode 100755
index 0000000000000000000000000000000000000000..2bd8cacab8d1c3f1cde3fe96fd18ef62eb1a7685
--- /dev/null
+++ b/arch/arm/src/sam3u/sam3u_allocateheap.c
@@ -0,0 +1,126 @@
+/****************************************************************************
+ * arch/arm/src/common/sam3u_allocateheap.c
+ *
+ *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <debug.h>
+
+#include <nuttx/arch.h>
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "up_arch.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Private Definitions
+ ****************************************************************************/
+
+#if CONFIG_MM_REGIONS < 2
+#  warning "CONFIG_MM_REGIONS < 2: SRAM1 not included in HEAP"
+#endif
+
+#if CONFIG_MM_REGIONS < 3 && !defined(CONFIG_SAM3U_NAND)
+#  warning "CONFIG_MM_REGIONS < 3: NFC SRAM not included in HEAP"
+#endif
+
+#if CONFIG_MM_REGIONS > 2 && defined(CONFIG_SAM3U_NAND)
+#  error "CONFIG_MM_REGIONS > 3 but cannot used NFC SRAM"
+#  undef CONFIG_MM_REGIONS
+#  define CONFIG_MM_REGIONS 2
+#endif
+
+#if CONFIG_DRAM_END > (SAM3U_INTSRAM0_BASE+CONFIG_SAM3U_SRAM0_SIZE)
+#  error "CONFIG_DRAM_END is beyond the end of SRAM0"
+#  undef CONFIG_DRAM_END
+#  define CONFIG_DRAM_END (SAM3U_INTSRAM0_BASE+CONFIG_SAM3U_SRAM0_SIZE)
+#elif CONFIG_DRAM_END < (SAM3U_INTSRAM0_BASE+CONFIG_SAM3U_SRAM0_SIZE)
+#  warning "CONFIG_DRAM_END is before end of SRAM0... not all of SRAM0 used"
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_allocate_heap
+ *
+ * Description:
+ *   The heap may be statically allocated by
+ *   defining CONFIG_HEAP_BASE and CONFIG_HEAP_SIZE.  If these
+ *   are not defined, then this function will be called to
+ *   dynamically set aside the heap region.
+ *
+ ****************************************************************************/
+
+void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
+{
+  up_ledon(LED_HEAPALLOCATE);
+  *heap_start = (FAR void*)g_heapbase;
+  *heap_size = CONFIG_DRAM_END - g_heapbase;
+}
+
+/************************************************************************
+ * Name: up_addregion
+ *
+ * Description:
+ *   Memory may be added in non-contiguous chunks.  Additional chunks are
+ *   added by calling this function.
+ *
+ ************************************************************************/
+
+#if CONFIG_MM_REGIONS > 1
+void up_addregion(void)
+{
+  mm_addregion((FAR void*)SAM3U_INTSRAM1_BASE, CONFIG_SAM3U_SRAM1_SIZE);
+
+#if CONFIG_MM_REGIONS > 2
+  mm_addregion((FAR void*)SAM3U_NFCSRAM_BASE, CONFIG_SAM3U_NFCSRAM_SIZE);
+#endif
+}
+#endif
diff --git a/arch/arm/src/sam3u/sam3u_memorymap.h b/arch/arm/src/sam3u/sam3u_memorymap.h
index da49770153b6a9c6cc4438dc1db9e42802f1fd87..8f48bbb5fc68fe4d4a3c5a905daa8824e0722f88 100755
--- a/arch/arm/src/sam3u/sam3u_memorymap.h
+++ b/arch/arm/src/sam3u/sam3u_memorymap.h
@@ -54,8 +54,8 @@
 #  define SAM3U_INTROM_BASE      0x00180000 /* 0x00180000-0x001fffff:   Internal ROM */
                                             /* 0x00200000-0x1fffffff:   Reserved */
 #define   SAM3U_INTSRAM_BASE     0x20000000 /* 0x20000000-0x3fffffff: Internal SRAM */
-#  define SAM3U_INTSRAM0_BASE    0x20000000 /* 0x20000000-0x2007ffff:   SRAM0 */
-#  define SAM3U_INTSRAM1_BASE    0x20080000 /* 0x20080000-0x200fffff:   SRAM1 */
+#  define SAM3U_INTSRAM0_BASE    0x20000000 /* 0x20000000-0x2007ffff:   SRAM0 (see chip.h) */
+#  define SAM3U_INTSRAM1_BASE    0x20080000 /* 0x20080000-0x200fffff:   SRAM1 (see chip.h) */
 #  define SAM3U_NFCSRAM_BASE     0x20100000 /* 0x20100000-0x207fffff:   NAND FLASH controller (SRAM) */
 #  define SAM3U_UDPHPSDMS_BASE   0x20180000 /* 0x20180000-0x201fffff:   USB Device High Speed (DMA) */
                                             /* 0x20200000-0x2fffffff:   Undefined */
diff --git a/configs/sam3u-ek/ostest/defconfig b/configs/sam3u-ek/ostest/defconfig
index d7d593a8b444baad6fa8f382975e3ffe4174c6d1..354cbea01f7db287eea3ca30f636432b9c83dd63 100755
--- a/configs/sam3u-ek/ostest/defconfig
+++ b/configs/sam3u-ek/ostest/defconfig
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/sam3u-ek/ostest/defconfig
 #
-#   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -73,11 +73,11 @@ CONFIG_ARCH=arm
 CONFIG_ARCH_ARM=y
 CONFIG_ARCH_CORTEXM3=y
 CONFIG_ARCH_CHIP=sam3u
-CONFIG_ARCH_CHIP_AT91SAM3U4=y
+CONFIG_ARCH_CHIP_AT91SAM3U4E=y
 CONFIG_ARCH_BOARD=sam3u-ek
 CONFIG_ARCH_BOARD_SAM3UEK=y
-CONFIG_BOARD_LOOPSPERMSEC=5483
-CONFIG_DRAM_SIZE=0x0000c000
+CONFIG_BOARD_LOOPSPERMSEC=4768
+CONFIG_DRAM_SIZE=0x00008000
 CONFIG_DRAM_START=0x20000000
 CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
 CONFIG_ARCH_IRQPRIO=y
@@ -105,6 +105,7 @@ CONFIG_SAM3U_USART0=n
 CONFIG_SAM3U_USART1=n
 CONFIG_SAM3U_USART2=n
 CONFIG_SAM3U_USART3=n
+CONFIG_SAM3U_NAND=n
 
 #
 # Some subsystems can be configured to operate in different ways..
@@ -293,7 +294,7 @@ CONFIG_EXAMPLE=ostest
 CONFIG_DEBUG=n
 CONFIG_DEBUG_VERBOSE=n
 CONFIG_DEBUG_SYMBOLS=n
-CONFIG_MM_REGIONS=1
+CONFIG_MM_REGIONS=3
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_RR_INTERVAL=200
 CONFIG_SCHED_INSTRUMENTATION=n
diff --git a/configs/sam3u-ek/ostest/ld.script b/configs/sam3u-ek/ostest/ld.script
index b1764bc37225d88921ba2cb725e6b9105dd97141..b447ef89f8511a8c046abc308f8397d5996663d9 100755
--- a/configs/sam3u-ek/ostest/ld.script
+++ b/configs/sam3u-ek/ostest/ld.script
@@ -33,8 +33,9 @@
  *
  ****************************************************************************/
 
-/* The AT91SAM3U-4 has 256Kb of FLASH beginning at address 0x0008:0000 and
- * 48Kb of SRAM beginning at address 0x2000:0000.  When booting from FLASH,
+/* The AT91SAM3U-4 has 256Kb of FLASH beginning at address 0x0008:0000, 
+ * 32Kb of SRAM beginning at address 0x2000:0000, and 16Kb of SRAM beginning
+ * at address 0x2008:000 (used only for heap).  When booting from FLASH,
  * FLASH memory is aliased to address 0x0000:0000 where the code expects to
  * begin execution by jumping to the entry point in the 0x0800:0000 address
  * range.
@@ -42,8 +43,9 @@
 
 MEMORY
 {
-    flash (rx) : ORIGIN = 0x00080000, LENGTH = 256K
-    sram (rwx) : ORIGIN = 0x20000000, LENGTH = 48K
+    flash (rx)  : ORIGIN = 0x00080000, LENGTH = 256K
+    sram1 (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
+    sram2 (rwx) : ORIGIN = 0x20080000, LENGTH = 16K
 }
 
 OUTPUT_ARCH(arm)
@@ -74,17 +76,17 @@ SECTIONS
 		*(.gnu.linkonce.d.*)
 		CONSTRUCTORS
 		_edata = ABSOLUTE(.);
-	} > sram AT > flash
+	} > sram1 AT > flash
 
 	.ARM.extab : {
 		*(.ARM.extab*)
-	} >sram
+	} >sram1
 
 	.ARM.exidx : {
 		__exidx_start = ABSOLUTE(.);
 		*(.ARM.exidx*)
 		__exidx_end = ABSOLUTE(.);
-	} >sram
+	} >sram1
 
 	.bss : {			/* BSS				*/
 		_sbss = ABSOLUTE(.);
@@ -92,7 +94,7 @@ SECTIONS
 		*(.gnu.linkonce.b.*)
 		*(COMMON)
 		_ebss = ABSOLUTE(.);
-	} > sram
+	} > sram1
 					/* Stabs debugging sections.	*/
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }