From 400e54080c91a8892a04b722366f9329d8233d8c Mon Sep 17 00:00:00 2001 From: patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> Date: Fri, 1 Jan 2010 13:56:20 +0000 Subject: [PATCH] Flesh out memory map git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2474 42af7a65-404d-4744-a932-0658087f49c3 --- arch/arm/src/sam3u/sam3u_memorymap.h | 96 +++++++++++++++++++++++----- configs/sam3u-ek/ostest/defconfig | 30 ++++----- 2 files changed, 95 insertions(+), 31 deletions(-) diff --git a/arch/arm/src/sam3u/sam3u_memorymap.h b/arch/arm/src/sam3u/sam3u_memorymap.h index 5092745d87..0bca62cf1d 100755 --- a/arch/arm/src/sam3u/sam3u_memorymap.h +++ b/arch/arm/src/sam3u/sam3u_memorymap.h @@ -1,4 +1,4 @@ -/************************************************************************************ +/************************************************************************************************ * arch/arm/src/sam3u/sam3u_memorymap.h * * Copyright (C) 2009 Gregory Nutt. All rights reserved. @@ -31,37 +31,103 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - ************************************************************************************/ + ************************************************************************************************/ #ifndef __ARCH_ARM_SRC_SAM3U_SAM3U_MEMORYMAP_H #define __ARCH_ARM_SRC_SAM3U_SAM3U_MEMORYMAP_H -/************************************************************************************ +/************************************************************************************************ * Included Files - ************************************************************************************/ + ************************************************************************************************/ #include <nuttx/config.h> - #include "chip.h" -/************************************************************************************ +/************************************************************************************************ * Pre-processor Definitions - ************************************************************************************/ + ************************************************************************************************/ + +#define SAM3U_CODE_BASE 0x00000000 /* 0x00000000-0x1fffffff: Code space */ +# define SAM3U_BOOTMEMORY_BASE 0x00000000 /* 0x00000000-0x0007ffff: Boot Memory */ +# define SAM3U_INTFLASH0_BASE 0x00080000 /* 0x00080000-0x000fffff: Internal FLASH 0 */ +# define SAM3U_INTFLASH1_BASE 0x00100000 /* 0x00100000-0x0017ffff: Internal FLASH 1 */ +# define SAM3U_INTROM_BASE 0x00180000 /* 0x00180000-0x001fffff: Internal ROM */ + /* 0x00200000-0x1fffffff: Reserved */ +#define SAM3U_INTSRAM_BASE 0x20000000 /* 0x20000000-0x3fffffff: Internal SRAM */ +# define SAM3U_INTSRAM0_BASE 0x20000000 /* 0x20000000-0x2007ffff: SRAM0 */ +# define SAM3U_INTSRAM1_BASE 0x20080000 /* 0x20080000-0x200fffff: SRAM1 */ +# define SAM3U_NFCSRAM_BASE 0x20100000 /* 0x20100000-0x207fffff: NFC (SRAM) */ +# define SAM3U_UDPHPSDMS_BASE 0x20180000 /* 0x20180000-0x201fffff: UDPHS (DMA) */ + /* 0x20200000-0x2fffffff: Undefined */ +# define SAM3U_BBSRAM_BASE 0x22000000 /* 0x22000000-0x23ffffff: 32Mb bit-band alias */ + /* 0x24000000-0x3fffffff: Undefined */ +#define SAM3U_PERIPHERALS_BASE 0x40000000 /* 0x40000000-0x5fffffff: Peripherals */ +# define SAM3U_MCI_BASE 0x40000000 /* 0x40000000-0x400003ff: MCI */ +# define SAM3U_SSC_BASE 0x40000400 /* 0x40000400-0x400007ff: SSC */ +# define SAM3U_SPI_BASE 0x40000800 /* 0x40000800-0x40000bff: SPI */ + /* 0x40000c00-0x4007ffff: Reserved */ +# define SAM3U_TC0_BASE 0x40080000 /* 0x40080000-0x4008003f: TC0 */ +# define SAM3U_TC1_BASE 0x40080040 /* 0x40080040-0x4008007f: TC1 */ +# define SAM3U_TC2_BASE 0x40080080 /* 0x40080080-0x400800bf: TC2 */ +# define SAM3U_TWI0_BASE 0x40084000 /* 0x40084000-0x40087fff: TWI0 */ +# define SAM3U_TWI1_BASE 0x40088000 /* 0x40088000-0x4008bfff: TWI1 */ +# define SAM3U_PWM_BASE 0x4008c000 /* 0x4008c000-0x4008ffff: PWM */ +# define SAM3U_USART0_BASE 0x40090000 /* 0x40090000-0x40093fff: USART0 */ +# define SAM3U_USART1_BASE 0x40094000 /* 0x40094000-0x40097fff: USART1 */ +# define SAM3U_USART2_BASE 0x40098000 /* 0x40098000-0x4009bfff: USART2 */ +# define SAM3U_USART3_BASE 0x4009c000 /* 0x4009c000-0x4009ffff: USART3 */ + /* 0x400a0000-0x400a3fff: Reserved */ +# define SAM3U_UDPHPS_BASE 0x400a4000 /* 0x400a4000-0x400a7fff: UDPHS */ +# define SAM3U_ADC12B_BASE 0x400a8000 /* 0x400a8000-0x400abfff: ADC 12-bit */ +# define SAM3U_ADC_BASE 0x400ac000 /* 0x400ac000-0x400affff: ADC */ +# define SAM3U_DMAC_BASE 0x400b0000 /* 0x400b0000-0x400b3fff: DMA controller */ + /* 0x400b4000-0x400dffff: Reserved */ +# define SAM3U_SYSCTRLR_BASE 0x400e0000 /* 0x400e0000-0x400e25ff: System controller */ + /* 0x400e2600-0x400fffff: Reserved */ + /* 0x40100000-0x41ffffff: Reserved */ +# define SAM3U_BBPERIPH__BASE 0x42000000 /* 0x42000000-0x43ffffff: 32Mb bit-band alias */ + /* 0x44000000-0x5fffffff: Reserved */ +#define SAM3U_EXTSRAM_BASE 0x60000000 /* 0x60000000-0x9fffffff: External SRAM */ +# define SAM3U_EXTCS0_BASE 0x60000000 /* 0x60000000-0x60ffffff: Chip select 0 */ +# define SAM3U_EXTCS1_BASE 0x61000000 /* 0x61000000-0x601fffff: Chip select 1 */ +# define SAM3U_EXTCS2_BASE 0x62000000 /* 0x62000000-0x62ffffff: Chip select 2 */ +# define SAM3U_EXTCS3_BASE 0x63000000 /* 0x63000000-0x63ffffff: Chip select 3 */ + /* 0x64000000-0x67ffffff: Reserved */ +# define SAM3U_NFC_BASE 0x68000000 /* 0x68000000-0x68ffffff: NFC */ + /* 0x69000000-0x9fffffff: Reserved */ + /* 0xa0000000-0xdfffffff: Reserved */ +#define SAM3U_SYSTEM_BASE 0xe0000000 /* 0xe0000000-0xffffffff: System */ -/* FLASH and SRAM *******************************************************************/ +/* System Controller Register Blocks: 0x400e0000-0x4007ffff */ -/* Register Base Addresses **********************************************************/ +#define SAM3U_SMC_BASE 0x400e0000 /* 0x400e0000-0x400e01ff: SMC */ +#define SAM3U_MATRIX_BASE 0x400e0000 /* 0x400e0200-0x400e03ff: MATRIX */ +#define SAM3U_PMC_BASE 0x400e0000 /* 0x400e0400-0x400e05ff: PMC */ +#define SAM3U_UART_BASE 0x400e0000 /* 0x400e0600-0x400e073f: UART */ +#define SAM3U_CHIPID_BASE 0x400e0000 /* 0x400e0740-0x400e07ff: CHIP ID */ +#define SAM3U_EFC0_BASE 0x400e0000 /* 0x400e0800-0x400e09ff: EFC0 */ +#define SAM3U_EFC1_BASE 0x400e0000 /* 0x400e0a00-0x400e0bff: EFC1 */ +#define SAM3U_PIOA_BASE 0x400e0000 /* 0x400e0c00-0x400e0dff: PIOA */ +#define SAM3U_PIOB_BASE 0x400e0000 /* 0x400e0e00-0x400e0fff: PIOB */ +#define SAM3U_PIOC_BASE 0x400e0000 /* 0x400e1000-0x400e11ff: PIOC */ +#define SAM3U_RSTC_BASE 0x400e0000 /* 0x400e1200-0x400e120f: RSTC */ +#define SAM3U_SUPC_BASE 0x400e0000 /* 0x400e1210-0x400e122f: SUPC */ +#define SAM3U_RTT_BASE 0x400e0000 /* 0x400e1230-0x400e124f: RTT */ +#define SAM3U_WDT_BASE 0x400e0000 /* 0x400e1250-0x400e125f: WDT */ +#define SAM3U_RTC_BASE 0x400e0000 /* 0x400e1260-0x400e128f: RTD */ +#define SAM3U_GPBR_BASE 0x400e0000 /* 0x400e1290-0x400e13ff: GPBR */ + /* 0x490e1400-0x4007ffff: Reserved */ -/************************************************************************************ +/************************************************************************************************ * Public Types - ************************************************************************************/ + ************************************************************************************************/ -/************************************************************************************ +/************************************************************************************************ * Public Data - ************************************************************************************/ + ************************************************************************************************/ -/************************************************************************************ +/************************************************************************************************ * Public Functions - ************************************************************************************/ + ************************************************************************************************/ #endif /* __ARCH_ARM_SRC_SAM3U_SAM3U_MEMORYMAP_H */ diff --git a/configs/sam3u-ek/ostest/defconfig b/configs/sam3u-ek/ostest/defconfig index fe4a46deb0..ff18be8f10 100755 --- a/configs/sam3u-ek/ostest/defconfig +++ b/configs/sam3u-ek/ostest/defconfig @@ -100,6 +100,11 @@ CONFIG_SAM3U_BUILDROOT=y # # Individual subsystems can be enabled: # +CONFIG_SAM3U_USART0=y +CONFIG_SAM3U_USART1=y +CONFIG_SAM3U_USART2=y +CONFIG_SAM3U_USART3=y + # # SAM3U specific serial device driver settings # @@ -109,52 +114,45 @@ CONFIG_SAM3U_BUILDROOT=y # This specific the size of the receive buffer # CONFIG_USARTn_TXBUFSIZE - Characters are buffered before # being sent. This specific the size of the transmit buffer -# CONFIG_USARTn_BAUD - The configure BAUD of the UART. Must be +# CONFIG_USARTn_BAUD - The configure BAUD of the USART. Must be # CONFIG_USARTn_BITS - The number of bits. Must be either 7 or 8. # CONFIG_USARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity # CONFIG_USARTn_2STOP - Two stop bits # -CONFIG_USART1_SERIAL_CONSOLE=y +CONFIG_USART0_SERIAL_CONSOLE=Y +CONFIG_USART1_SERIAL_CONSOLE=n CONFIG_USART2_SERIAL_CONSOLE=n CONFIG_USART3_SERIAL_CONSOLE=n -CONFIG_USART4_SERIAL_CONSOLE=n -CONFIG_USART5_SERIAL_CONSOLE=n +CONFIG_USART0_TXBUFSIZE=256 CONFIG_USART1_TXBUFSIZE=256 CONFIG_USART2_TXBUFSIZE=256 CONFIG_USART3_TXBUFSIZE=256 -CONFIG_USART4_TXBUFSIZE=256 -CONFIG_USART5_TXBUFSIZE=256 +CONFIG_USART0_RXBUFSIZE=256 CONFIG_USART1_RXBUFSIZE=256 CONFIG_USART2_RXBUFSIZE=256 CONFIG_USART3_RXBUFSIZE=256 -CONFIG_USART4_RXBUFSIZE=256 -CONFIG_USART5_RXBUFSIZE=256 +CONFIG_USART0_BAUD=115200 CONFIG_USART1_BAUD=115200 CONFIG_USART2_BAUD=115200 CONFIG_USART3_BAUD=115200 -CONFIG_USART4_BAUD=115200 -CONFIG_USART5_BAUD=115200 +CONFIG_USART0_BITS=8 CONFIG_USART1_BITS=8 CONFIG_USART2_BITS=8 CONFIG_USART3_BITS=8 -CONFIG_USART4_BITS=8 -CONFIG_USART5_BITS=8 +CONFIG_USART0_PARITY=0 CONFIG_USART1_PARITY=0 CONFIG_USART2_PARITY=0 CONFIG_USART3_PARITY=0 -CONFIG_USART4_PARITY=0 -CONFIG_USART5_PARITY=0 +CONFIG_USART0_2STOP=0 CONFIG_USART1_2STOP=0 CONFIG_USART2_2STOP=0 CONFIG_USART3_2STOP=0 -CONFIG_USART4_2STOP=0 -CONFIG_USART5_2STOP=0 # # General build options -- GitLab