- Each header file must contain the following pre-processor commands near the beginning of the header file: Between the file header and the "Included Files" block comment.
+ Each header file must contain the following pre-processor conditional logic near the beginning of the header file: Between the file header and the "Included Files" block comment.
For example,
@@ -248,7 +248,7 @@
Deoxygen Information.
- NuttX does not use Deoxygen for documentation and no file should contain Doxygen tags.
+ NuttX does not use Deoxygen for documentation and no file should contain Doxygen tags or Doxygen style comments.
diff --git a/Documentation/NuttxPortingGuide.html b/Documentation/NuttxPortingGuide.html
index 9fc2e5e9e29e9ac65548c8c64d5eec5f7e854bd7..b067a8c13983b15f2d557eee1c985a07865cb281 100644
--- a/Documentation/NuttxPortingGuide.html
+++ b/Documentation/NuttxPortingGuide.html
@@ -802,7 +802,7 @@
Definitions in the Make.defs file probably depend on some of the
settings in the .config file. For example, the CFLAGS will most likely be
- different if CONFIG_DEBUG=y.
+ different if CONFIG_DEBUG_FEATURES=y.
The included tools/Config.mk file contains additional definitions that may
diff --git a/Documentation/UsbTrace.html b/Documentation/UsbTrace.html
index 7efb7ebccbae864f39babfe12d882a25209fa3e4..a6800983d5bcb272c099f6bfba24de374b9a707a 100644
--- a/Documentation/UsbTrace.html
+++ b/Documentation/UsbTrace.html
@@ -125,7 +125,7 @@
CONFIG_USBDEV_TRACE, orCONFIG_DEBUG and CONFIG_DEBUG_USBCONFIG_DEBUG_FEATURES and CONFIG_DEBUG_USB
Log Data Sink.
The logged data itself may go to either (1) an internal circular buffer, or (2) may be provided on the console.
@@ -137,7 +137,7 @@
Here is an example of USB trace output using apps/examples/usbserial for an LPC1768 platform with the following NuttX configuration settings:
- CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, CONFIG_USB
+ CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, CONFIG_USB
CONFIG_EXAMPLES_USBSERIAL_TRACEINIT, CONFIG_EXAMPLES_USBSERIAL_TRACECLASS,
CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS, CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER,
CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS
diff --git a/Kconfig b/Kconfig
index 17d6e351f9eb96bb6f72fe51044c4780d9a375a1..4d132bbcd460fedcd6ee53bccc3bfa11e922e774 100644
--- a/Kconfig
+++ b/Kconfig
@@ -395,7 +395,7 @@ endmenu # Customize Header Files
menu "Debug Options"
-config DEBUG
+config DEBUG_FEATURES
bool "Enable Debug Features"
default n
---help---
@@ -409,67 +409,270 @@ config ARCH_HAVE_HEAPCHECK
bool
default n
-if DEBUG
+if DEBUG_FEATURES
-config DEBUG_VERBOSE
- bool "Enable Debug Verbose Output"
+comment "Debug SYSLOG Output Controls"
+
+config DEBUG_ERROR
+ bool "Enable Error Output"
+ default n
+ ---help---
+ Enables output from err() statements. Errors are significant system
+ exceptions that require immediate attention.
+
+config DEBUG_WARN
+ bool "Enable Warnings Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enables output from warn() statements. Warnings are considered to
+ be various unexpected conditions, potential errors or errors that will
+ not have serious consequences.
+
+config DEBUG_INFO
+ bool "Enable Informational Debug Output"
+ default n
+ depends on DEBUG_WARN
+ ---help---
+ Enables verbose "informational" debug output. If you enable
+ CONFIG_DEBUG_INFO, then very chatty (and often annoying) output
+ will be generated.
+
+config DEBUG_ASSERTIONS
+ bool "Enable Debug Assertions"
default n
---help---
- Enables verbose debug output (assuming debug features are enabled).
- As a general rule, when DEBUG is enabled only errors will be
- reported in the debug SYSLOG output. But if you also enable
- DEBUG_VERBOSE, then very chatty (and often annoying) output will be
- generated. This means there are two levels of debug output:
- errors-only and everything.
+ Enables the DEBUGASSERT() macro. When CONFIG_DEBUG_ASSERTIONS is
+ defined, DEBUGASSERT() will cause the system to halt if the
+ assertion fails. If CONFIG_DEBUG_ASSERTIONS is not defined
+ DEBUGASSERT() compiled out of the system. In general, you would
+ set CONFIG_DEBUG_ASSERTIONS=y during debug, but disable the
+ assertions on a final, buckled up system.
comment "Subsystem Debug Options"
config DEBUG_AUDIO
- bool "Audio Device Debug Output"
+ bool "Audio Device Debug Features"
default n
depends on AUDIO
---help---
- Enable low level debug SYSLOG output from the audio subsystem and
+ Enable audio device debug features.
+ Enable low level debug featurs for the audio subsystem and for audio
device drivers. (disabled by default). Support for this debug option
is architecture-specific and may not be available for some MCUs.
+if DEBUG_AUDIO
+
+config DEBUG_AUDIO_ERROR
+ bool "Audio Device Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable audio device error output to SYSLOG.
+
+config DEBUG_AUDIO_WARN
+ bool "Audio Device Warnings Output"
+ default n
+ depends on DEBUG_WARN
+ ---help---
+ Enable audio device warning output to SYSLOG.
+
+config DEBUG_AUDIO_INFO
+ bool "Audio Device Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable audio device informational output to SYSLOG.
+
+endif # DEBUG_AUDIO
+
config DEBUG_BINFMT
- bool "Binary Loader Debug Output"
+ bool "Binary Loader Debug Features"
default n
depends on !BINFMT_DISABLE
---help---
- Enable binary loader debug SYSLOG output (disabled by default)
+ Enable binary loader debug features.
+
+if DEBUG_BINFMT
+
+config DEBUG_BINFMT_ERROR
+ bool "Binary Loader Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable binary loader error output to SYSLOG.
+
+config DEBUG_BINFMT_WARN
+ bool "Binary Loader Warnings Output"
+ default n
+ depends on DEBUG_WARN
+ ---help---
+ Enable binary loader warning output to SYSLOG.
+
+config DEBUG_BINFMT_INFO
+ bool "Binary Loader Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable binary loader informational output to SYSLOG.
+
+endif # DEBUG_BINFMT
config DEBUG_CRYPTO
- bool "Crypto Debug Output"
+ bool "Crypto Debug Features"
default n
depends on CRYPTO
---help---
- Enable Crypto debug SYSLOG output (disabled by default)
+ Enable cryptographic debug features.
+
+if DEBUG_CRYPTO
+
+config DEBUG_CRYPTO_ERROR
+ bool "Crypto Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable cryptographic error output to SYSLOG.
+
+config DEBUG_CRYPTO_WARN
+ bool "Crypto Warnings Output"
+ default n
+ depends on DEBUG_WARN
+ ---help---
+ Enable cryptographic warning output to SYSLOG.
+
+config DEBUG_CRYPTO_INFO
+ bool "Crypto Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable cryptographic informational output to SYSLOG.
+
+endif # DEBUG_CRYPTO
config DEBUG_FS
- bool "File System Debug Output"
+ bool "File System Debug Features"
default n
---help---
- Enable file system debug SYSLOG output (disabled by default)
+ Enable file system debug features.
+
+if DEBUG_FS
+
+config DEBUG_FS_ERROR
+ bool "File System Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable file system error output to SYSLOG.
+
+config DEBUG_FS_WARN
+ bool "File System Warnings Output"
+ default n
+ depends on DEBUG_WARN
+ ---help---
+ Enable file system warning output to SYSLOG.
+
+config DEBUG_FS_INFO
+ bool "File System Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable file system informational output to SYSLOG.
+
+endif # DEBUG_FS
config DEBUG_GRAPHICS
- bool "Graphics Debug Output"
+ bool "Graphics Debug Features"
+ default n
+ ---help---
+ Enable NX graphics subsystem debug features.
+
+if DEBUG_GRAPHICS
+
+config DEBUG_GRAPHICS_ERROR
+ bool "Graphics Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable NX graphics subsystem error output to SYSLOG.
+
+config DEBUG_GRAPHICS_WARN
+ bool "Graphics Warnings Output"
default n
+ depends on DEBUG_WARN
---help---
- Enable NX graphics debug SYSLOG output (disabled by default)
+ Enable NX graphics subsystem warning output to SYSLOG.
+
+config DEBUG_GRAPHICS_INFO
+ bool "Graphics Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable NX graphics subsystem informational output to SYSLOG.
+
+endif # DEBUG_GRAPHICS
config DEBUG_LIB
- bool "C Library Debug Output"
+ bool "C Library Debug Features"
+ default n
+ ---help---
+ Enable C library debug features.
+
+if DEBUG_LIB
+
+config DEBUG_LIB_ERROR
+ bool "C Library Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable C library error output to SYSLOG.
+
+config DEBUG_LIB_WARN
+ bool "C Library Warnings Output"
default n
+ depends on DEBUG_WARN
---help---
- Enable C library debug SYSLOG output (disabled by default)
+ Enable C library warning output to SYSLOG.
+
+config DEBUG_LIB_INFO
+ bool "C Library Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable C library informational output to SYSLOG.
+
+endif # DEBUG_LIB
config DEBUG_MM
- bool "Memory Manager Debug Output"
+ bool "Memory Manager Debug Features"
+ default n
+ ---help---
+ Enable memory management debug features.
+
+if DEBUG_MM
+
+config DEBUG_MM_ERROR
+ bool "Memory Manager Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable memory management error output to SYSLOG.
+
+config DEBUG_MM_WARN
+ bool "Memory Manager Warnings Output"
default n
+ depends on DEBUG_WARN
---help---
- Enable memory management debug SYSLOG output (disabled by default)
+ Enable memory management warning output to SYSLOG.
+
+config DEBUG_MM_INFO
+ bool "Memory Manager Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable memory management informational output to SYSLOG.
+
+endif # DEBUG_MM
config DEBUG_SHM
bool "Shared Memory Debug Output"
@@ -479,17 +682,67 @@ config DEBUG_SHM
Enable shared memory management debug SYSLOG output (disabled by default)
config DEBUG_NET
- bool "Network Debug Output"
+ bool "Network Debug Features"
default n
depends on ARCH_HAVE_NET
---help---
- Enable network debug SYSLOG output (disabled by default)
+ Enable network debug features.
+
+if DEBUG_NET
+
+config DEBUG_NET_ERROR
+ bool "Network Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable network error output to SYSLOG.
+
+config DEBUG_NET_WARN
+ bool "Network Warnings Output"
+ default n
+ depends on DEBUG_WARN
+ ---help---
+ Enable network warning output to SYSLOG.
+
+config DEBUG_NET_INFO
+ bool "Network Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable network informational output to SYSLOG.
+
+endif # DEBUG_NET
config DEBUG_SCHED
- bool "Scheduler Debug Output"
+ bool "Scheduler Debug Features"
+ default n
+ ---help---
+ Enable OS scheduler debug features.
+
+if DEBUG_SCHED
+
+config DEBUG_SCHED_ERROR
+ bool "Scheduler Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable OS scheduler error output to SYSLOG.
+
+config DEBUG_SCHED_WARN
+ bool "Scheduler Warnings Output"
default n
+ depends on DEBUG_WARN
---help---
- Enable OS debug SYSLOG output (disabled by default)
+ Enable OS scheduler warning output to SYSLOG.
+
+config DEBUG_SCHED_INFO
+ bool "Scheduler Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable OS scheduler informational output to SYSLOG.
+
+endif # DEBUG_SCHED
config DEBUG_SYSCALL
bool "SYSCALL Debug Output"
@@ -511,14 +764,40 @@ config DEBUG_WIRELESS
comment "OS Function Debug Options"
config DEBUG_DMA
- bool "DMA Debug Output"
+ bool "DMA Debug Features"
default n
depends on ARCH_DMA
---help---
- Enable DMA-releated debug SYSLOG output (disabled by default).
+ Enable DMA debug features.
+
Support for this debug option is architecture-specific and may not
be available for some MCUs.
+if DEBUG_DMA
+
+config DEBUG_DMA_ERROR
+ bool "DMA Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable DMA error output to SYSLOG.
+
+config DEBUG_DMA_WARN
+ bool "DMA Warnings Output"
+ default n
+ depends on DEBUG_WARN
+ ---help---
+ Enable DMA warning output to SYSLOG.
+
+config DEBUG_DMA_INFO
+ bool "DMA Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable DMA informational output to SYSLOG.
+
+endif # DEBUG_DMA
+
config DEBUG_HEAP
bool "Heap usage debug hooks"
default n
@@ -538,11 +817,36 @@ config DEBUG_IRQ
option may even cause crashes! Use with care!
config DEBUG_PAGING
- bool "Demand Paging Debug Output"
+ bool "Paging Debug Features"
default n
depends on PAGING
---help---
- Enable demand paging debug SYSLOG output (disabled by default)
+ Enable OS demand paging debug features.
+
+if DEBUG_PAGING
+
+config DEBUG_PAGING_ERROR
+ bool "Paging Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable OS demand paging error output to SYSLOG.
+
+config DEBUG_PAGING_WARN
+ bool "Paging Warnings Output"
+ default n
+ depends on DEBUG_WARN
+ ---help---
+ Enable OS demand paging warning output to SYSLOG.
+
+config DEBUG_PAGING_INFO
+ bool "Paging Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable OS demand paging informational output to SYSLOG.
+
+endif # DEBUG_PAGING
comment "Driver Debug Options"
@@ -565,23 +869,76 @@ config DEBUG_LEDS
some boards.
config DEBUG_INPUT
- bool "Input Device Debug Output"
+ bool "Input Device Debug Features"
default n
depends on INPUT
---help---
- Enable low level debug SYSLOG output from the input device drivers
+ Enable input d.
+ Enable low level evice debug features for the input device drivers
such as mice and touchscreens (disabled by default). Support for
this debug option is board-specific and may not be available for
some boards.
+if DEBUG_INPUT
+
+config DEBUG_INPUT_ERROR
+ bool "Input Device Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable input device error output to SYSLOG.
+
+config DEBUG_INPUT_WARN
+ bool "Input Device Warnings Output"
+ default n
+ depends on DEBUG_WARN
+ ---help---
+ Enable input device warning output to SYSLOG.
+
+config DEBUG_INPUT_INFO
+ bool "Input Device Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable input device informational output to SYSLOG.
+
+endif # DEBUG_INPUT
+
config DEBUG_ANALOG
- bool "Analog Device Debug Output"
+ bool "Analog Device Debug Features"
+ default n
+ depends on ANALOG
+ ---help---
+ Enable debug features.
+ Enable low level debug features the analog device drivers such as
+ A/D and D/A converters (disabled by default). Support for this
+ debug option is architecture-specific and may not be available for
+ some MCUs.
+
+if DEBUG_ANALOG
+
+config DEBUG_ANALOG_ERROR
+ bool "Analog Device Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable analog device error output to SYSLOG.
+
+config DEBUG_ANALOG_WARN
+ bool "Analog Device Warnings Output"
default n
+ depends on DEBUG_WARN
---help---
- Enable low level debug SYSLOG output from the analog device drivers
- such as A/D and D/A converters (disabled by default). Support for
- this debug option is architecture-specific and may not be available
- for some MCUs.
+ Enable analog device warning output to SYSLOG.
+
+config DEBUG_ANALOG_INFO
+ bool "Analog Device Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable analog device informational output to SYSLOG.
+
+endif # DEBUG_ANALOG
config DEBUG_CAN
bool "CAN Debug Output"
@@ -646,14 +1003,40 @@ config DEBUG_SDIO
be available for some MCUs.
config DEBUG_SENSORS
- bool "Sensor Debug Output"
+ bool "Sensor Debug Features"
default n
depends on SENSORS
---help---
- Enable sensor driver debug SYSLOG output (disabled by default).
+ Enable sensor driver debug features.
+
Support for this debug option is architecture-specific and may not
be available for some MCUs.
+if DEBUG_SENSORS
+
+config DEBUG_SENSORS_ERROR
+ bool "Sensor Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable sensor driver error output to SYSLOG.
+
+config DEBUG_SENSORS_WARN
+ bool "Sensor Warnings Output"
+ default n
+ depends on DEBUG_WARN
+ ---help---
+ Enable sensor driver warning output to SYSLOG.
+
+config DEBUG_SENSORS_INFO
+ bool "Sensor Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable sensor driver informational output to SYSLOG.
+
+endif # DEBUG_SENSORS
+
config DEBUG_SPI
bool "SPI Debug Output"
default n
@@ -673,11 +1056,36 @@ config DEBUG_TIMER
be available for some MCUs.
config DEBUG_USB
- bool "USB Debug Output"
+ bool "USB Debug Features"
default n
depends on USBDEV || USBHOST
---help---
- Enable usb debug SYSLOG output (disabled by default)
+ Enable USB debug features.
+
+if DEBUG_USB
+
+config DEBUG_USB_ERROR
+ bool "USB Error Output"
+ default n
+ depends on DEBUG_ERROR
+ ---help---
+ Enable USB error output to SYSLOG.
+
+config DEBUG_USB_WARN
+ bool "USB Warnings Output"
+ default n
+ depends on DEBUG_WARN
+ ---help---
+ Enable USB warning output to SYSLOG.
+
+config DEBUG_USB_INFO
+ bool "USB Informational Output"
+ default n
+ depends on DEBUG_INFO
+ ---help---
+ Enable USB informational output to SYSLOG.
+
+endif # DEBUG_USB
config DEBUG_WATCHDOG
bool "Watchdog Timer Debug Output"
@@ -688,7 +1096,7 @@ config DEBUG_WATCHDOG
Support for this debug option is architecture-specific and may not
be available for some MCUs.
-endif # DEBUG
+endif # DEBUG_FEATURES
config ARCH_HAVE_STACKCHECK
bool
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6b6c046060d4e3ba2d7233c2a90d9f18b1c401f0..f31f81277830e7249f328ecf6073c4173cc8e48a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -588,7 +588,7 @@ config ARCH_ROMPGTABLE
config DEBUG_HARDFAULT
bool "Verbose Hard-Fault Debug"
default n
- depends on DEBUG && (ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7)
+ depends on DEBUG_FEATURES && (ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7)
---help---
Enables verbose debug output when a hard fault is occurs. This verbose
output is sometimes helpful when debugging difficult hard fault problems,
diff --git a/arch/arm/include/efm32/irq.h b/arch/arm/include/efm32/irq.h
index 7bd0449d621d225ad6408ea8d6422c28f71e4781..a5f2eff8e47850dc2826a75f7887f0bbe7461022 100644
--- a/arch/arm/include/efm32/irq.h
+++ b/arch/arm/include/efm32/irq.h
@@ -60,7 +60,7 @@
/* Processor Exceptions (vectors 0-15) */
-#define EFM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define EFM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define EFM32_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/kinetis/irq.h b/arch/arm/include/kinetis/irq.h
index 3355f29b02cf2dcaa2570722632ddea9bd1c57a9..16b59ab8ae96fc4054e91e16ac849c0cb2f2293f 100644
--- a/arch/arm/include/kinetis/irq.h
+++ b/arch/arm/include/kinetis/irq.h
@@ -58,7 +58,7 @@
/* Processor Exceptions (vectors 0-15) */
-#define KINETIS_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define KINETIS_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define KINETIS_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/kl/irq.h b/arch/arm/include/kl/irq.h
index 27ba8575f52d023f7c9324244a967c05075b6d1c..93021827300d09f52eb1c91b7518cbe43a6d123c 100644
--- a/arch/arm/include/kl/irq.h
+++ b/arch/arm/include/kl/irq.h
@@ -58,7 +58,7 @@
/* Processor Exceptions (vectors 0-15) */
-#define KL_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define KL_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define KL_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/lpc11xx/irq.h b/arch/arm/include/lpc11xx/irq.h
index caac7c3e170c1d858882bbf13a32ae10bb6741fd..46ff7d27cac9225a98bca731e1a287dff5beb9ab 100644
--- a/arch/arm/include/lpc11xx/irq.h
+++ b/arch/arm/include/lpc11xx/irq.h
@@ -59,7 +59,7 @@
/* Common Processor Exceptions (vectors 0-15) */
-#define LPC11_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define LPC11_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define LPC11_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/lpc17xx/irq.h b/arch/arm/include/lpc17xx/irq.h
index 6af683225ca64dbcad3a639e1f64714018f68976..99bffe17ebbd38510bc10b734fcd1623d480e010 100644
--- a/arch/arm/include/lpc17xx/irq.h
+++ b/arch/arm/include/lpc17xx/irq.h
@@ -59,7 +59,7 @@
/* Common Processor Exceptions (vectors 0-15) */
-#define LPC17_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define LPC17_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define LPC17_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/lpc43xx/irq.h b/arch/arm/include/lpc43xx/irq.h
index 9b103e97185005d00d3e254fee0d6ca03ccf3fce..dd9790ab10774093de24bfce479ecf4ee39f4103 100644
--- a/arch/arm/include/lpc43xx/irq.h
+++ b/arch/arm/include/lpc43xx/irq.h
@@ -59,7 +59,7 @@
/* Processor Exceptions (vectors 0-15) */
-#define LPC43_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define LPC43_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define LPC43_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/nuc1xx/irq.h b/arch/arm/include/nuc1xx/irq.h
index 0db0379d1b4b4360b1ba4fe68491c546afcdf1d5..26b0d8125f510f055abdc400f8e08a8e66e52a44 100644
--- a/arch/arm/include/nuc1xx/irq.h
+++ b/arch/arm/include/nuc1xx/irq.h
@@ -58,7 +58,7 @@
/* Processor Exceptions (vectors 0-15) */
-#define NUC_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define NUC_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define NUC_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/sam34/irq.h b/arch/arm/include/sam34/irq.h
index 521cd5a93cd71b10d8f5076fb8283a0bd4fbc423..a0f5de604f78b1455b2e72f10108a31f4c8efd42 100644
--- a/arch/arm/include/sam34/irq.h
+++ b/arch/arm/include/sam34/irq.h
@@ -58,7 +58,7 @@
/* Common Processor Exceptions (vectors 0-15) */
-#define SAM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define SAM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define SAM_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/samdl/irq.h b/arch/arm/include/samdl/irq.h
index d74584fb298cc557b03dfe5dfb2804d0a811152c..7da8c7b21e6282b70b4645c57fb806645ef07fc2 100644
--- a/arch/arm/include/samdl/irq.h
+++ b/arch/arm/include/samdl/irq.h
@@ -58,7 +58,7 @@
/* Processor Exceptions (vectors 0-15) */
-#define SAM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define SAM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define SAM_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/samv7/irq.h b/arch/arm/include/samv7/irq.h
index 4c33f3dbec0bb4b61b846958c7226f274b549b84..eec3d12e054038332fe20043930130db88ed1820 100644
--- a/arch/arm/include/samv7/irq.h
+++ b/arch/arm/include/samv7/irq.h
@@ -58,7 +58,7 @@
/* Common Processor Exceptions (vectors 0-15) */
-#define SAM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define SAM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define SAM_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/stm32/irq.h b/arch/arm/include/stm32/irq.h
index 1d57bc3e500147c86db55809a6c4cad1aca92c5e..2c9b188f0258348928741b88bba8f1a61546d46a 100644
--- a/arch/arm/include/stm32/irq.h
+++ b/arch/arm/include/stm32/irq.h
@@ -59,7 +59,7 @@
/* Processor Exceptions (vectors 0-15) */
-#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define STM32_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/stm32/stm32f10xxx_irq.h b/arch/arm/include/stm32/stm32f10xxx_irq.h
index 29f07b0fd8837e37be3182765bbe25130ef752e3..beed4952541de0e89a5f46c27ed19cb22ec47ba7 100644
--- a/arch/arm/include/stm32/stm32f10xxx_irq.h
+++ b/arch/arm/include/stm32/stm32f10xxx_irq.h
@@ -199,7 +199,7 @@
# define STM32_IRQ_ETH (77) /* 61: Ethernet global interrupt */
# define STM32_IRQ_ETHWKUP (78) /* 62: Ethernet Wakeup through EXTI line interrupt */
# define STM32_IRQ_CAN2TX (79) /* 63: CAN2 TX interrupts */
-# define STM32_IRQ_CAN2RX0 (70) /* 64: CAN2 RX0 interrupts */
+# define STM32_IRQ_CAN2RX0 (80) /* 64: CAN2 RX0 interrupts */
# define STM32_IRQ_CAN2RX1 (81) /* 65: CAN2 RX1 interrupt */
# define STM32_IRQ_CAN2SCE (82) /* 66: CAN2 SCE interrupt */
# define STM32_IRQ_OTGFS (83) /* 67: USB On The Go FS global interrupt */
diff --git a/arch/arm/include/stm32f7/irq.h b/arch/arm/include/stm32f7/irq.h
index 205d06b6440fdf6cde7632642917e7454adaf93f..f09659190b74a2f4078b0c0df1f5f31cbcfe2389 100644
--- a/arch/arm/include/stm32f7/irq.h
+++ b/arch/arm/include/stm32f7/irq.h
@@ -57,7 +57,7 @@
/* Processor Exceptions (vectors 0-15) */
-#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define STM32_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/stm32l4/irq.h b/arch/arm/include/stm32l4/irq.h
index ebfb22667891d9084a91b3b87ee0afed7db0a55f..89e74c1760bedd01330ff9062de2016f0542782f 100644
--- a/arch/arm/include/stm32l4/irq.h
+++ b/arch/arm/include/stm32l4/irq.h
@@ -57,7 +57,7 @@
/* Processor Exceptions (vectors 0-15) */
-#define STM32L4_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define STM32L4_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define STM32L4_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/include/tiva/irq.h b/arch/arm/include/tiva/irq.h
index 17c73a254de4d8f121593187ba0b4c62fad42a41..d6a3216da96da623e67e666ee3a606e9b7ea630b 100644
--- a/arch/arm/include/tiva/irq.h
+++ b/arch/arm/include/tiva/irq.h
@@ -162,7 +162,7 @@
/* Processor Exceptions (vectors 0-15) */
-#define TIVA_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
+#define TIVA_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
/* Vector 0: Reset stack pointer value */
/* Vector 1: Reset (not handler as an IRQ) */
#define TIVA_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
diff --git a/arch/arm/src/a1x/a1x_irq.c b/arch/arm/src/a1x/a1x_irq.c
index 65e18ffd73bb5b9e53291d548221da072f50368f..2508a23cf14fc89088cd8ec73dd3e3279ea989e2 100644
--- a/arch/arm/src/a1x/a1x_irq.c
+++ b/arch/arm/src/a1x/a1x_irq.c
@@ -85,37 +85,37 @@ static void a1x_dumpintc(const char *msg, int irq)
/* Dump some relevant ARMv7 register contents */
flags = enter_critical_section();
- lldbg("ARMv7 (%s, irq=%d):\n", msg, irq);
- lldbg(" CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr());
+ llerr("ARMv7 (%s, irq=%d):\n", msg, irq);
+ llerr(" CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr());
/* Dump all of the (readable) INTC register contents */
- lldbg("INTC (%s, irq=%d):\n", msg, irq);
- lldbg(" VECTOR: %08x BASE: %08x PROTECT: %08x NMICTRL: %08x\n",
+ llerr("INTC (%s, irq=%d):\n", msg, irq);
+ llerr(" VECTOR: %08x BASE: %08x PROTECT: %08x NMICTRL: %08x\n",
getreg32(A1X_INTC_VECTOR), getreg32(A1X_INTC_BASEADDR),
getreg32(A1X_INTC_PROTECT), getreg32(A1X_INTC_NMICTRL));
- lldbg(" IRQ PEND: %08x %08x %08x\n",
+ llerr(" IRQ PEND: %08x %08x %08x\n",
getreg32(A1X_INTC_IRQ_PEND0), getreg32(A1X_INTC_IRQ_PEND1),
getreg32(A1X_INTC_IRQ_PEND2));
- lldbg(" FIQ PEND: %08x %08x %08x\n",
+ llerr(" FIQ PEND: %08x %08x %08x\n",
getreg32(A1X_INTC_FIQ_PEND0), getreg32(A1X_INTC_FIQ_PEND1),
getreg32(A1X_INTC_FIQ_PEND2));
- lldbg(" SEL: %08x %08x %08x\n",
+ llerr(" SEL: %08x %08x %08x\n",
getreg32(A1X_INTC_IRQ_SEL0), getreg32(A1X_INTC_IRQ_SEL1),
getreg32(A1X_INTC_IRQ_SEL2));
- lldbg(" EN: %08x %08x %08x\n",
+ llerr(" EN: %08x %08x %08x\n",
getreg32(A1X_INTC_EN0), getreg32(A1X_INTC_EN1),
getreg32(A1X_INTC_EN2));
- lldbg(" MASK: %08x %08x %08x\n",
+ llerr(" MASK: %08x %08x %08x\n",
getreg32(A1X_INTC_MASK0), getreg32(A1X_INTC_MASK1),
getreg32(A1X_INTC_MASK2));
- lldbg(" RESP: %08x %08x %08x\n",
+ llerr(" RESP: %08x %08x %08x\n",
getreg32(A1X_INTC_RESP0), getreg32(A1X_INTC_RESP1),
getreg32(A1X_INTC_RESP2));
- lldbg(" FF: %08x %08x %08x\n",
+ llerr(" FF: %08x %08x %08x\n",
getreg32(A1X_INTC_FF0), getreg32(A1X_INTC_FF1),
getreg32(A1X_INTC_FF2));
- lldbg(" PRIO: %08x %08x %08x %08x %08x\n",
+ llerr(" PRIO: %08x %08x %08x %08x %08x\n",
getreg32(A1X_INTC_PRIO0), getreg32(A1X_INTC_PRIO1),
getreg32(A1X_INTC_PRIO2), getreg32(A1X_INTC_PRIO3),
getreg32(A1X_INTC_PRIO4));
diff --git a/arch/arm/src/a1x/a1x_serial.c b/arch/arm/src/a1x/a1x_serial.c
index b6e536fdc601ecc0f79ec321a8eeb0f09258f4d4..3ae955a99d25ba321deb1125ef7c20445e6b7876 100644
--- a/arch/arm/src/a1x/a1x_serial.c
+++ b/arch/arm/src/a1x/a1x_serial.c
@@ -1156,7 +1156,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
/* Read the modem status register (MSR) to clear */
status = up_serialin(priv, A1X_UART_MSR_OFFSET);
- vdbg("MSR: %02x\n", status);
+ info("MSR: %02x\n", status);
break;
}
@@ -1167,7 +1167,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
/* Read the line status register (LSR) to clear */
status = up_serialin(priv, A1X_UART_LSR_OFFSET);
- vdbg("LSR: %02x\n", status);
+ info("LSR: %02x\n", status);
break;
}
@@ -1192,7 +1192,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
default:
{
- lldbg("Unexpected IIR: %02x\n", status);
+ llerr("Unexpected IIR: %02x\n", status);
break;
}
}
diff --git a/arch/arm/src/arm/up_assert.c b/arch/arm/src/arm/up_assert.c
index 336a76c8613862c4bcea2c7b559eb727c947360e..05fbbbb0318591d60f2d63843e6c89bd48616cdd 100644
--- a/arch/arm/src/arm/up_assert.c
+++ b/arch/arm/src/arm/up_assert.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/arm/up_assert.c
*
- * Copyright (C) 2007-2010, 2012-2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2007-2010, 2012-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -77,23 +66,6 @@
# undef CONFIG_ARCH_USBDUMP
#endif
-/* The following is just intended to keep some ugliness out of the mainline
- * code. We are going to print the task name if:
- *
- * CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
- * (defined(CONFIG_DEBUG) || <-- And the debug is enabled (lldbg used)
- * defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-# define CONFIG_PRINT_TASKNAME 1
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -127,7 +99,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
- lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@@ -154,12 +126,12 @@ static inline void up_registerdump(void)
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
- lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
- lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
+ alert("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
}
}
#else
@@ -228,12 +200,12 @@ static void up_dumpstate(void)
/* Show interrupt stack info */
- lldbg("sp: %08x\n", sp);
- lldbg("IRQ stack:\n");
- lldbg(" base: %08x\n", istackbase);
- lldbg(" size: %08x\n", istacksize);
+ alert("sp: %08x\n", sp);
+ alert("IRQ stack:\n");
+ alert(" base: %08x\n", istackbase);
+ alert(" size: %08x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_intstack());
+ alert(" used: %08x\n", up_check_intstack());
#endif
/* Does the current stack pointer lie within the interrupt
@@ -251,24 +223,24 @@ static void up_dumpstate(void)
*/
sp = g_intstackbase;
- lldbg("sp: %08x\n", sp);
+ alert("sp: %08x\n", sp);
}
/* Show user stack info */
- lldbg("User stack:\n");
- lldbg(" base: %08x\n", ustackbase);
- lldbg(" size: %08x\n", ustacksize);
+ alert("User stack:\n");
+ alert(" base: %08x\n", ustackbase);
+ alert(" size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_tcbstack(rtcb));
+ alert(" used: %08x\n", up_check_tcbstack(rtcb));
#endif
#else
- lldbg("sp: %08x\n", sp);
- lldbg("stack base: %08x\n", ustackbase);
- lldbg("stack size: %08x\n", ustacksize);
+ alert("sp: %08x\n", sp);
+ alert("stack base: %08x\n", ustackbase);
+ alert("stack size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
+ alert("stack used: %08x\n", up_check_tcbstack(rtcb));
#endif
#endif
@@ -279,7 +251,7 @@ static void up_dumpstate(void)
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
- lldbg("ERROR: Stack pointer is not within allocated stack\n");
+ alert("ERROR: Stack pointer is not within allocated stack\n");
#endif
}
else
@@ -339,17 +311,17 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0
struct tcb_s *rtcb = this_task();
#endif
board_autoled_on(LED_ASSERTION);
-#ifdef CONFIG_PRINT_TASKNAME
- lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+ alert("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
- lldbg("Assertion failed at file:%s line: %d\n",
+ alert("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
diff --git a/arch/arm/src/arm/up_dataabort.c b/arch/arm/src/arm/up_dataabort.c
index 2ab00b15c9403b3e349288ef734b3c48f68a37f9..621a42d328ad315a80c8561a15985691b08b65fd 100644
--- a/arch/arm/src/arm/up_dataabort.c
+++ b/arch/arm/src/arm/up_dataabort.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/arm/up_dataabort.c
*
- * Copyright (C) 2007-2011, 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2007-2011, 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
@@ -63,18 +52,6 @@
# include "arm.h"
#endif
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -112,7 +89,6 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
* for register dumps and possibly context switching.
*/
-
savestate = (uint32_t *)CURRENT_REGS;
#endif
CURRENT_REGS = regs;
@@ -131,7 +107,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
* fatal error.
*/
- pglldbg("FSR: %08x FAR: %08x\n", fsr, far);
+ pgllerr("FSR: %08x FAR: %08x\n", fsr, far);
if ((fsr & FSR_MASK) != FSR_PAGE)
{
goto segfault;
@@ -142,7 +118,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
* (It has not yet been saved in the register context save area).
*/
- pgllvdbg("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
+ pgllinfo("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
if (far < PG_PAGED_VBASE || far >= PG_PAGED_VEND)
{
goto segfault;
@@ -180,7 +156,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
segfault:
#endif
- lldbg("Data abort. PC: %08x FAR: %08x FSR: %08x\n", regs[REG_PC], far, fsr);
+ alert("Data abort. PC: %08x FAR: %08x FSR: %08x\n", regs[REG_PC], far, fsr);
PANIC();
}
@@ -196,7 +172,7 @@ void up_dataabort(uint32_t *regs)
/* Crash -- possibly showing diagnost debug information. */
- lldbg("Data abort. PC: %08x\n", regs[REG_PC]);
+ alert("Data abort. PC: %08x\n", regs[REG_PC]);
PANIC();
}
diff --git a/arch/arm/src/arm/up_elf.c b/arch/arm/src/arm/up_elf.c
index 07eba7341d9a85a59703fbc936ad87510eb586c4..06c0c5157c1d7496ce21cdc08a781083587d407a 100644
--- a/arch/arm/src/arm/up_elf.c
+++ b/arch/arm/src/arm/up_elf.c
@@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
- bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
+ berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
- bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
+ berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
- bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
+ berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -114,7 +114,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
- bdbg("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
+ berr("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
return -ENOEXEC
}
@@ -172,7 +172,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_CALL:
case R_ARM_JUMP24:
{
- bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
+ binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -185,7 +185,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
- bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
+ berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -201,7 +201,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_ABS32:
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
- bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t *)addr += sym->st_value;
@@ -210,7 +210,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_V4BX:
{
- bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
+ binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t *)addr));
/* Preserve only Rm and the condition code */
@@ -225,7 +225,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_PREL31:
{
- bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
offset = *(uint32_t *)addr + sym->st_value - addr;
@@ -236,7 +236,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
{
- bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -256,7 +256,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
- bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
+ berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -266,6 +266,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
- bdbg("RELA relocation not supported\n");
+ berr("RELA relocation not supported\n");
return -ENOSYS;
}
diff --git a/arch/arm/src/arm/up_head.S b/arch/arm/src/arm/up_head.S
index 53f94a2e0faf31dd1cb2c73141c0c8c89bfa571f..da317c12f978c740dc6472bdbcdbfb19e7411b4f 100644
--- a/arch/arm/src/arm/up_head.S
+++ b/arch/arm/src/arm/up_head.S
@@ -208,7 +208,7 @@
/* This macro will modify r0, r1, r2 and r14 */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.macro showprogress, code
mov r0, #\code
bl up_lowputc
diff --git a/arch/arm/src/arm/up_nommuhead.S b/arch/arm/src/arm/up_nommuhead.S
index 04c5205efe057ee58a52286f961e40e3a65624ad..d8689d85bd6ee0d893a2e8f7040a44422d0787ae 100644
--- a/arch/arm/src/arm/up_nommuhead.S
+++ b/arch/arm/src/arm/up_nommuhead.S
@@ -49,7 +49,7 @@
/* This macro will modify r0, r1, r2 and r14 */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.macro showprogress, code
mov r0, #\code
bl up_lowputc
@@ -115,7 +115,7 @@ __start:
bl up_earlyserialinit
#endif
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
mov r0, #'C'
bl up_putc
mov r0, #'\n'
diff --git a/arch/arm/src/arm/up_prefetchabort.c b/arch/arm/src/arm/up_prefetchabort.c
index ed2bfb1bf9db8035dfb43915edf2ca23ad37051a..5d9d9561dcfabf8211e28a76b387d984847cfcad 100644
--- a/arch/arm/src/arm/up_prefetchabort.c
+++ b/arch/arm/src/arm/up_prefetchabort.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/arm/up_prefetchabort.c
*
- * Copyright (C) 2007-2011, 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2007-2011, 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
@@ -110,7 +99,7 @@ void up_prefetchabort(uint32_t *regs)
* virtual addresses.
*/
- pglldbg("VADDR: %08x VBASE: %08x VEND: %08x\n",
+ pgllerr("VADDR: %08x VBASE: %08x VEND: %08x\n",
regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
if (regs[REG_R15] >= PG_PAGED_VBASE && regs[REG_R15] < PG_PAGED_VEND)
@@ -148,7 +137,7 @@ void up_prefetchabort(uint32_t *regs)
else
#endif
{
- lldbg("Prefetch abort. PC: %08x\n", regs[REG_PC]);
+ alert("Prefetch abort. PC: %08x\n", regs[REG_PC]);
PANIC();
}
}
diff --git a/arch/arm/src/arm/up_releasepending.c b/arch/arm/src/arm/up_releasepending.c
index 4defb895e00e0398df6d95c135f521300e313211..99bf93f6f7f31c97e7f630fc4224cd65285d4965 100644
--- a/arch/arm/src/arm/up_releasepending.c
+++ b/arch/arm/src/arm/up_releasepending.c
@@ -67,7 +67,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
- slldbg("From TCB=%p\n", rtcb);
+ sllerr("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
diff --git a/arch/arm/src/arm/up_reprioritizertr.c b/arch/arm/src/arm/up_reprioritizertr.c
index 8f6b739d08dc5cb7265c9234dcc93cb9b1faebe1..7d6015cccb955f1ccafdb1c4cbb737ffc0363530 100644
--- a/arch/arm/src/arm/up_reprioritizertr.c
+++ b/arch/arm/src/arm/up_reprioritizertr.c
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
- slldbg("TCB=%p PRI=%d\n", tcb, priority);
+ sllerr("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
diff --git a/arch/arm/src/arm/up_schedulesigaction.c b/arch/arm/src/arm/up_schedulesigaction.c
index 3972b7792120a9ebe55b3ae569862e5b259c90cd..5b99b2059a06128418b4d0b68ccef10b6f57b40b 100644
--- a/arch/arm/src/arm/up_schedulesigaction.c
+++ b/arch/arm/src/arm/up_schedulesigaction.c
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+ serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* being delivered to the currently executing task.
*/
- sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+ serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
diff --git a/arch/arm/src/arm/up_sigdeliver.c b/arch/arm/src/arm/up_sigdeliver.c
index c03511d4df485c2648ae567bcbdb43656196e8d7..0b3b6ea266fe6f53c7cfba66b7523f5de31270f4 100644
--- a/arch/arm/src/arm/up_sigdeliver.c
+++ b/arch/arm/src/arm/up_sigdeliver.c
@@ -95,7 +95,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -126,7 +126,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/arm/src/arm/up_syscall.c b/arch/arm/src/arm/up_syscall.c
index 07d8ac26d229a90eff58544e4349008ffde9a7d4..f7ee6f1312c8e7dd2c4994f4ac0e9f59462710a1 100644
--- a/arch/arm/src/arm/up_syscall.c
+++ b/arch/arm/src/arm/up_syscall.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/arm/up_syscall.c
*
- * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2007-2009, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
@@ -58,22 +47,6 @@
#include "up_arch.h"
#include "up_internal.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * vectors
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -82,8 +55,8 @@
* Name: up_syscall
*
* Description:
- * SWI interrupts will vection here with insn=the SWI
- * instruction and xcp=the interrupt context
+ * SWI interrupts will vector here with insn=the SWI instruction and
+ * xcp=the interrupt context
*
* The handler may get the SWI number be de-referencing
* the return address saved in the xcp and decoding
@@ -93,7 +66,7 @@
void up_syscall(uint32_t *regs)
{
- lldbg("Syscall from 0x%x\n", regs[REG_PC]);
+ alert("Syscall from 0x%x\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC();
}
diff --git a/arch/arm/src/arm/up_undefinedinsn.c b/arch/arm/src/arm/up_undefinedinsn.c
index 99b1e3fc66b1bca83ed545f1f9e6442f24d65ad2..22a895b816548d2f6eb9358a8d66f56b9faac973 100644
--- a/arch/arm/src/arm/up_undefinedinsn.c
+++ b/arch/arm/src/arm/up_undefinedinsn.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/arm/up_undefinedinsn.c
*
- * Copyright (C) 2007-2009, 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2007-2009, 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -58,18 +47,6 @@
#include "up_internal.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -80,7 +57,7 @@
void up_undefinedinsn(uint32_t *regs)
{
- lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]);
+ alert("Undefined instruction at 0x%x\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC();
}
diff --git a/arch/arm/src/armv6-m/nvic.h b/arch/arm/src/armv6-m/nvic.h
index 945d5c4338f27eddd05964437a3989e5459fbce5..b6f4391a4a68466c299e149d152d83d0ad48f284 100644
--- a/arch/arm/src/armv6-m/nvic.h
+++ b/arch/arm/src/armv6-m/nvic.h
@@ -41,6 +41,7 @@
****************************************************************************************************/
#include
+#include
/****************************************************************************************************
* Pre-processor Definitions
@@ -386,7 +387,7 @@ extern "C"
*
****************************************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
void up_dumpnvic(FAR const char *msg);
#else
# define up_dumpnvic(m)
diff --git a/arch/arm/src/armv6-m/up_assert.c b/arch/arm/src/armv6-m/up_assert.c
index dcb71392696ac255d524318c661bc8d5c0b136df..ef1757126ad676779727b01cc1d97fc5bfd4c289 100644
--- a/arch/arm/src/armv6-m/up_assert.c
+++ b/arch/arm/src/armv6-m/up_assert.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv6-m/up_assert.c
*
- * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013-2015, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -76,23 +65,6 @@
# undef CONFIG_ARCH_USBDUMP
#endif
-/* The following is just intended to keep some ugliness out of the mainline
- * code. We are going to print the task name if:
- *
- * CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
- * (defined(CONFIG_DEBUG) || <-- And the debug is enabled (lldbg used)
- * defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-# define CONFIG_PRINT_TASKNAME 1
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -126,7 +98,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
- lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@@ -144,12 +116,12 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
{
/* Dump interesting properties of this task */
-#ifdef CONFIG_PRINT_TASKNAME
- lldbg("%s: PID=%d Stack Used=%lu of %lu\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+ alert("%s: PID=%d Stack Used=%lu of %lu\n",
tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#else
- lldbg("PID: %d Stack Used=%lu of %lu\n",
+ alert("PID: %d Stack Used=%lu of %lu\n",
tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#endif
@@ -184,22 +156,22 @@ static inline void up_registerdump(void)
{
/* Yes.. dump the interrupt registers */
- lldbg("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
- lldbg("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
#ifdef CONFIG_BUILD_PROTECTED
- lldbg("xPSR: %08x PRIMASK: %08x EXEC_RETURN: %08x\n",
+ alert("xPSR: %08x PRIMASK: %08x EXEC_RETURN: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
#else
- lldbg("xPSR: %08x PRIMASK: %08x\n",
+ alert("xPSR: %08x PRIMASK: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
}
@@ -270,12 +242,12 @@ static void up_dumpstate(void)
/* Show interrupt stack info */
- lldbg("sp: %08x\n", sp);
- lldbg("IRQ stack:\n");
- lldbg(" base: %08x\n", istackbase);
- lldbg(" size: %08x\n", istacksize);
+ alert("sp: %08x\n", sp);
+ alert("IRQ stack:\n");
+ alert(" base: %08x\n", istackbase);
+ alert(" size: %08x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_intstack());
+ alert(" used: %08x\n", up_check_intstack());
#endif
/* Does the current stack pointer lie within the interrupt
@@ -297,14 +269,14 @@ static void up_dumpstate(void)
if (CURRENT_REGS)
{
sp = CURRENT_REGS[REG_R13];
- lldbg("sp: %08x\n", sp);
+ alert("sp: %08x\n", sp);
}
- lldbg("User stack:\n");
- lldbg(" base: %08x\n", ustackbase);
- lldbg(" size: %08x\n", ustacksize);
+ alert("User stack:\n");
+ alert(" base: %08x\n", ustackbase);
+ alert(" size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_tcbstack(rtcb));
+ alert(" used: %08x\n", up_check_tcbstack(rtcb));
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@@ -317,11 +289,11 @@ static void up_dumpstate(void)
}
#else
- lldbg("sp: %08x\n", sp);
- lldbg("stack base: %08x\n", ustackbase);
- lldbg("stack size: %08x\n", ustacksize);
+ alert("sp: %08x\n", sp);
+ alert("stack base: %08x\n", ustackbase);
+ alert("stack size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
+ alert("stack used: %08x\n", up_check_tcbstack(rtcb));
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@@ -330,7 +302,7 @@ static void up_dumpstate(void)
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
- lldbg("ERROR: Stack pointer is not within allocated stack\n");
+ alert("ERROR: Stack pointer is not within allocated stack\n");
}
else
{
@@ -394,17 +366,17 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0
struct tcb_s *rtcb = this_task();
#endif
board_autoled_on(LED_ASSERTION);
-#ifdef CONFIG_PRINT_TASKNAME
- lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+ alert("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
- lldbg("Assertion failed at file:%s line: %d\n",
+ alert("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
diff --git a/arch/arm/src/armv6-m/up_dumpnvic.c b/arch/arm/src/armv6-m/up_dumpnvic.c
index 36c2fdf21682cf9e24b417aa83da5bcd60ae845c..a50d91aac0aa6d59f90fb7fd012c10888886cebb 100644
--- a/arch/arm/src/armv6-m/up_dumpnvic.c
+++ b/arch/arm/src/armv6-m/up_dumpnvic.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv6-m/up_dumpnvic.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -48,19 +48,7 @@
#include "nvic.h"
-#ifdef CONFIG_DEBUG
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#ifdef CONFIG_DEBUG_FEATURES
/****************************************************************************
* Public Functions
@@ -76,6 +64,7 @@
void up_dumpnvic(FAR const char *msg)
{
+#ifdef CONFIG_DEBUG_INFO
irqstate_t flags;
int i;
@@ -83,29 +72,30 @@ void up_dumpnvic(FAR const char *msg)
flags = enter_critical_section();
- lldbg("NVIC: %s\n", msg);
- lldbg(" ISER: %08x ICER: %08x ISPR: %08x ICPR: %08x\n",
- getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER),
- getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
+ llinfo("NVIC: %s\n", msg);
+ llinfo(" ISER: %08x ICER: %08x ISPR: %08x ICPR: %08x\n",
+ getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER),
+ getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
for (i = 0 ; i < 8; i += 4)
{
- lldbg(" IPR%d: %08x IPR%d: %08x IPR%d: %08x IPR%d: %08x\n",
- i, getreg32(ARMV6M_NVIC_IPR(i)),
- i+1, getreg32(ARMV6M_NVIC_IPR(i+1)),
- i+2, getreg32(ARMV6M_NVIC_IPR(i+2)),
- i+3, getreg32(ARMV6M_NVIC_IPR(i+3)));
+ llinfo(" IPR%d: %08x IPR%d: %08x IPR%d: %08x IPR%d: %08x\n",
+ i, getreg32(ARMV6M_NVIC_IPR(i)),
+ i+1, getreg32(ARMV6M_NVIC_IPR(i+1)),
+ i+2, getreg32(ARMV6M_NVIC_IPR(i+2)),
+ i+3, getreg32(ARMV6M_NVIC_IPR(i+3)));
}
- lldbg("SYSCON:\n");
- lldbg(" CPUID: %08x ICSR: %08x AIRCR: %08x SCR: %08x\n",
- getreg32(ARMV6M_SYSCON_CPUID), getreg32(ARMV6M_SYSCON_ICSR),
- getreg32(ARMV6M_SYSCON_AIRCR), getreg32(ARMV6M_SYSCON_SCR));
- lldbg(" CCR: %08x SHPR2: %08x SHPR3: %08x\n",
- getreg32(ARMV6M_SYSCON_CCR), getreg32(ARMV6M_SYSCON_SHPR2),
- getreg32(ARMV6M_SYSCON_SHPR3));
+ llinfo("SYSCON:\n");
+ llinfo(" CPUID: %08x ICSR: %08x AIRCR: %08x SCR: %08x\n",
+ getreg32(ARMV6M_SYSCON_CPUID), getreg32(ARMV6M_SYSCON_ICSR),
+ getreg32(ARMV6M_SYSCON_AIRCR), getreg32(ARMV6M_SYSCON_SCR));
+ llinfo(" CCR: %08x SHPR2: %08x SHPR3: %08x\n",
+ getreg32(ARMV6M_SYSCON_CCR), getreg32(ARMV6M_SYSCON_SHPR2),
+ getreg32(ARMV6M_SYSCON_SHPR3));
leave_critical_section(flags);
+#endif
}
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/arch/arm/src/armv6-m/up_elf.c b/arch/arm/src/armv6-m/up_elf.c
index dbe002cbb1a97419821aa7b3d2821a12e029ae97..ad0b4d8dad3776b4c743dc4ea1ea96f870cc7c28 100644
--- a/arch/arm/src/armv6-m/up_elf.c
+++ b/arch/arm/src/armv6-m/up_elf.c
@@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
- bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
+ berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
- bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
+ berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
- bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
+ berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -168,7 +168,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_CALL:
case R_ARM_JUMP24:
{
- bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
+ binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -181,7 +181,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
- bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
+ berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -197,7 +197,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_ABS32:
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
- bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t *)addr += sym->st_value;
@@ -245,7 +245,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
upper_insn = (uint32_t)(*(uint16_t *)addr);
lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
- bvdbg("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
+ binfo("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
sym, (long)sym->st_value);
@@ -279,7 +279,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
/* And perform the relocation */
- bvdbg(" S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n",
+ binfo(" S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n",
S, J1, J2, (long)offset, offset + sym->st_value - addr);
offset += sym->st_value - addr;
@@ -290,7 +290,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && (offset & 1) == 0)
{
- bdbg(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
+ berr(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -300,7 +300,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (offset <= (int32_t)0xff000000 || offset >= (int32_t)0x01000000)
{
- bdbg(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
+ berr(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -320,14 +320,14 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
lower_insn = ((lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | ((offset >> 1) & 0x07ff));
*(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
- bvdbg(" S=%d J1=%d J2=%d insn [%04x %04x]\n",
+ binfo(" S=%d J1=%d J2=%d insn [%04x %04x]\n",
S, J1, J2, (int)upper_insn, (int)lower_insn);
}
break;
case R_ARM_V4BX:
{
- bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
+ binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t *)addr));
/* Preserve only Rm and the condition code */
@@ -342,7 +342,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_PREL31:
{
- bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
offset = *(uint32_t *)addr + sym->st_value - addr;
@@ -353,7 +353,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
{
- bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -408,7 +408,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
upper_insn = (uint32_t)(*(uint16_t *)addr);
lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
- bvdbg("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
+ binfo("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
sym, (long)sym->st_value);
@@ -425,7 +425,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
/* And perform the relocation */
- bvdbg(" offset=%08lx branch target=%08lx\n",
+ binfo(" offset=%08lx branch target=%08lx\n",
(long)offset, offset + sym->st_value);
offset += sym->st_value;
@@ -445,13 +445,13 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
lower_insn = ((lower_insn & 0x8f00) | ((offset & 0x0700) << 4) | (offset & 0x00ff));
*(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
- bvdbg(" insn [%04x %04x]\n",
+ binfo(" insn [%04x %04x]\n",
(int)upper_insn, (int)lower_insn);
}
break;
default:
- bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
+ berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -461,6 +461,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
- bdbg("RELA relocation not supported\n");
+ berr("RELA relocation not supported\n");
return -ENOSYS;
}
diff --git a/arch/arm/src/armv6-m/up_hardfault.c b/arch/arm/src/armv6-m/up_hardfault.c
index edd1bab6a23606f93397d4c85bd62494de83cf90..873a76d9728ca7eb397641b2d0fa286a614ffbf0 100644
--- a/arch/arm/src/armv6-m/up_hardfault.c
+++ b/arch/arm/src/armv6-m/up_hardfault.c
@@ -55,9 +55,9 @@
****************************************************************************/
#ifdef CONFIG_DEBUG_HARDFAULT
-# define hfdbg(format, ...) lldbg(format, ##__VA_ARGS__)
+# define hferr(format, ...) llerr(format, ##__VA_ARGS__)
#else
-# define hfdbg(x...)
+# define hferr(x...)
#endif
#define INSN_SVC0 0xdf00 /* insn: svc 0 */
@@ -118,7 +118,7 @@ int up_hardfault(int irq, FAR void *context)
/* Fetch the instruction that caused the Hard fault */
uint16_t insn = *pc;
- hfdbg(" PC: %p INSN: %04x\n", pc, insn);
+ hferr(" PC: %p INSN: %04x\n", pc, insn);
/* If this was the instruction 'svc 0', then forward processing
* to the SVCall handler
@@ -126,7 +126,7 @@ int up_hardfault(int irq, FAR void *context)
if (insn == INSN_SVC0)
{
- hfdbg("Forward SVCall\n");
+ hferr("Forward SVCall\n");
return up_svcall(irq, context);
}
}
@@ -134,22 +134,22 @@ int up_hardfault(int irq, FAR void *context)
#if defined(CONFIG_DEBUG_HARDFAULT)
/* Dump some hard fault info */
- hfdbg("\nHard Fault:\n");
- hfdbg(" IRQ: %d regs: %p\n", irq, regs);
- hfdbg(" PRIMASK: %08x IPSR: %08x\n",
+ hferr("\nHard Fault:\n");
+ hferr(" IRQ: %d regs: %p\n", irq, regs);
+ hferr(" PRIMASK: %08x IPSR: %08x\n",
getprimask(), getipsr());
- hfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ hferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
- hfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ hferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
- hfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
+ hferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
(void)up_irq_save();
- lldbg("PANIC!!! Hard fault\n");
+ llerr("PANIC!!! Hard fault\n");
PANIC();
return OK; /* Won't get here */
}
diff --git a/arch/arm/src/armv6-m/up_releasepending.c b/arch/arm/src/armv6-m/up_releasepending.c
index c3e2d02ea70c64ed4323136e48f3dff423627322..6ac07736b5b5727134152a480d7b561ec9906a48 100644
--- a/arch/arm/src/armv6-m/up_releasepending.c
+++ b/arch/arm/src/armv6-m/up_releasepending.c
@@ -66,7 +66,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
- slldbg("From TCB=%p\n", rtcb);
+ sllerr("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
diff --git a/arch/arm/src/armv6-m/up_reprioritizertr.c b/arch/arm/src/armv6-m/up_reprioritizertr.c
index bd50b88b70c2d8c05e5f29b410eeff6af135ac88..ff30d6b590b2e69923773cbe289cacec357f10de 100644
--- a/arch/arm/src/armv6-m/up_reprioritizertr.c
+++ b/arch/arm/src/armv6-m/up_reprioritizertr.c
@@ -94,7 +94,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
- slldbg("TCB=%p PRI=%d\n", tcb, priority);
+ sllerr("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just removed the head
diff --git a/arch/arm/src/armv6-m/up_schedulesigaction.c b/arch/arm/src/armv6-m/up_schedulesigaction.c
index be9505a9c2c9ae74404f0cf8edd4d215b42cc432..bf9fdf1c4946315c0d63d8aea39cc15946bfe4a8 100644
--- a/arch/arm/src/armv6-m/up_schedulesigaction.c
+++ b/arch/arm/src/armv6-m/up_schedulesigaction.c
@@ -107,7 +107,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+ serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -121,7 +121,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
- sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+ serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
diff --git a/arch/arm/src/armv6-m/up_sigdeliver.c b/arch/arm/src/armv6-m/up_sigdeliver.c
index 84b89542a207aff8cceb519d51bd8e0ac47ce0ff..4f40b976659729c89563e793e0214e6889ff6f9b 100644
--- a/arch/arm/src/armv6-m/up_sigdeliver.c
+++ b/arch/arm/src/armv6-m/up_sigdeliver.c
@@ -100,7 +100,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -135,7 +135,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/arm/src/armv6-m/up_svcall.c b/arch/arm/src/armv6-m/up_svcall.c
index b5cec07937933cdc12a47165f980057554c8b0e2..a24fc12f2ffe6a5eca523002d741d2e6c72e37d1 100644
--- a/arch/arm/src/armv6-m/up_svcall.c
+++ b/arch/arm/src/armv6-m/up_svcall.c
@@ -64,14 +64,14 @@
/* Debug output from this file may interfere with context switching! To get
* debug output you must enabled the following in your NuttX configuration:
*
- * - CONFIG_DEBUG and CONFIG_DEBUG_SYSCALL (shows only syscalls)
- * - CONFIG_DEBUG and CONFIG_DEBUG_SVCALL (shows everything)
+ * - CONFIG_DEBUG_FEATURES and CONFIG_DEBUG_SYSCALL (shows only syscalls)
+ * - CONFIG_DEBUG_FEATURES and CONFIG_DEBUG_SVCALL (shows everything)
*/
#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
-# define svcdbg(format, ...) lldbg(format, ##__VA_ARGS__)
+# define svcerr(format, ...) llerr(format, ##__VA_ARGS__)
#else
-# define svcdbg(x...)
+# define svcerr(x...)
#endif
/****************************************************************************
@@ -174,18 +174,18 @@ int up_svcall(int irq, FAR void *context)
if (cmd > SYS_switch_context)
# endif
{
- svcdbg("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
- svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ svcerr("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
+ svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
- svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
# ifdef CONFIG_BUILD_PROTECTED
- svcdbg(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
+ svcerr(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK], regs[REG_EXC_RETURN]);
# else
- svcdbg(" PSR: %08x PRIMASK: %08x\n",
+ svcerr(" PSR: %08x PRIMASK: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK]);
# endif
}
@@ -471,7 +471,7 @@ int up_svcall(int irq, FAR void *context)
regs[REG_R0] -= CONFIG_SYS_RESERVED;
#else
- slldbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
+ sllerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
#endif
}
break;
@@ -486,30 +486,30 @@ int up_svcall(int irq, FAR void *context)
if (regs != CURRENT_REGS)
# endif
{
- svcdbg("SVCall Return:\n");
- svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ svcerr("SVCall Return:\n");
+ svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
- svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
#ifdef CONFIG_BUILD_PROTECTED
- svcdbg(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
+ svcerr(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
#else
- svcdbg(" PSR: %08x PRIMASK: %08x\n",
+ svcerr(" PSR: %08x PRIMASK: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
}
# ifdef CONFIG_DEBUG_SVCALL
else
{
- svcdbg("SVCall Return: %d\n", regs[REG_R0]);
+ svcerr("SVCall Return: %d\n", regs[REG_R0]);
}
# endif
#endif
diff --git a/arch/arm/src/armv7-a/arm_addrenv.c b/arch/arm/src/armv7-a/arm_addrenv.c
index 2bd1f886cecc08fa8ea163c382416c38cbe64375..7d2818283dca2d1148ea3ecb01c9c4b66fae85a0 100644
--- a/arch/arm/src/armv7-a/arm_addrenv.c
+++ b/arch/arm/src/armv7-a/arm_addrenv.c
@@ -257,7 +257,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
{
int ret;
- bvdbg("addrenv=%p textsize=%lu datasize=%lu\n",
+ binfo("addrenv=%p textsize=%lu datasize=%lu\n",
addrenv, (unsigned long)textsize, (unsigned long)datasize);
DEBUGASSERT(addrenv);
@@ -278,7 +278,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
MMU_L2_UTEXTFLAGS);
if (ret < 0)
{
- bdbg("ERROR: Failed to create .text region: %d\n", ret);
+ berr("ERROR: Failed to create .text region: %d\n", ret);
goto errout;
}
@@ -293,7 +293,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
MMU_L2_UDATAFLAGS);
if (ret < 0)
{
- bdbg("ERROR: Failed to create .bss/.data region: %d\n", ret);
+ berr("ERROR: Failed to create .bss/.data region: %d\n", ret);
goto errout;
}
@@ -305,7 +305,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
ret = up_addrenv_initdata((uintptr_t)addrenv->data[0] & PMD_PTE_PADDR_MASK);
if (ret < 0)
{
- bdbg("ERROR: Failed to initialize .bss/.data region: %d\n", ret);
+ berr("ERROR: Failed to initialize .bss/.data region: %d\n", ret);
goto errout;
}
#endif
@@ -318,7 +318,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
MMU_L2_UDATAFLAGS);
if (ret < 0)
{
- bdbg("ERROR: Failed to create heap region: %d\n", ret);
+ berr("ERROR: Failed to create heap region: %d\n", ret);
goto errout;
}
@@ -353,7 +353,7 @@ errout:
int up_addrenv_destroy(FAR group_addrenv_t *addrenv)
{
- bvdbg("addrenv=%p\n", addrenv);
+ binfo("addrenv=%p\n", addrenv);
DEBUGASSERT(addrenv);
/* Destroy the .text region */
@@ -405,7 +405,7 @@ int up_addrenv_destroy(FAR group_addrenv_t *addrenv)
int up_addrenv_vtext(FAR group_addrenv_t *addrenv, FAR void **vtext)
{
- bvdbg("return=%p\n", (FAR void *)CONFIG_ARCH_TEXT_VBASE);
+ binfo("return=%p\n", (FAR void *)CONFIG_ARCH_TEXT_VBASE);
/* Not much to do in this case */
@@ -439,7 +439,7 @@ int up_addrenv_vtext(FAR group_addrenv_t *addrenv, FAR void **vtext)
int up_addrenv_vdata(FAR group_addrenv_t *addrenv, uintptr_t textsize,
FAR void **vdata)
{
- bvdbg("return=%p\n",
+ binfo("return=%p\n",
(FAR void *)(CONFIG_ARCH_DATA_VBASE + ARCH_DATA_RESERVE_SIZE));
/* Not much to do in this case */
@@ -636,7 +636,7 @@ int up_addrenv_restore(FAR const save_addrenv_t *oldenv)
uintptr_t vaddr;
int i;
- bvdbg("oldenv=%p\n", oldenv);
+ binfo("oldenv=%p\n", oldenv);
DEBUGASSERT(oldenv);
for (vaddr = CONFIG_ARCH_TEXT_VBASE, i = 0;
@@ -752,7 +752,7 @@ int up_addrenv_coherent(FAR const group_addrenv_t *addrenv)
int up_addrenv_clone(FAR const group_addrenv_t *src,
FAR group_addrenv_t *dest)
{
- bvdbg("src=%p dest=%p\n", src, dest);
+ binfo("src=%p dest=%p\n", src, dest);
DEBUGASSERT(src && dest);
/* Just copy the address environment from the source to the destination */
@@ -784,7 +784,7 @@ int up_addrenv_clone(FAR const group_addrenv_t *src,
int up_addrenv_attach(FAR struct task_group_s *group, FAR struct tcb_s *tcb)
{
- bvdbg("group=%p tcb=%p\n", group, tcb);
+ binfo("group=%p tcb=%p\n", group, tcb);
/* Nothing needs to be done in this implementation */
@@ -817,7 +817,7 @@ int up_addrenv_attach(FAR struct task_group_s *group, FAR struct tcb_s *tcb)
int up_addrenv_detach(FAR struct task_group_s *group, FAR struct tcb_s *tcb)
{
- bvdbg("group=%p tcb=%p\n", group, tcb);
+ binfo("group=%p tcb=%p\n", group, tcb);
/* Nothing needs to be done in this implementation */
diff --git a/arch/arm/src/armv7-a/arm_addrenv_kstack.c b/arch/arm/src/armv7-a/arm_addrenv_kstack.c
index da2a474126edce8306937c48ce5202bb016f14b7..5bb2b688b541cc09b477555ac879010dd39f7d06 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_kstack.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_kstack.c
@@ -144,7 +144,7 @@
int up_addrenv_kstackalloc(FAR struct tcb_s *tcb)
{
- bvdbg("tcb=%p stacksize=%u\n", tcb, ARCH_KERNEL_STACKSIZE);
+ binfo("tcb=%p stacksize=%u\n", tcb, ARCH_KERNEL_STACKSIZE);
DEBUGASSERT(tcb && tcb->xcp.kstack == 0);
@@ -153,7 +153,7 @@ int up_addrenv_kstackalloc(FAR struct tcb_s *tcb)
tcb->xcp.kstack = (FAR uint32_t *)kmm_memalign(8, ARCH_KERNEL_STACKSIZE);
if (!tcb->xcp.kstack)
{
- bdbg("ERROR: Failed to allocate the kernel stack\n");
+ berr("ERROR: Failed to allocate the kernel stack\n");
return -ENOMEM;
}
@@ -177,7 +177,7 @@ int up_addrenv_kstackalloc(FAR struct tcb_s *tcb)
int up_addrenv_kstackfree(FAR struct tcb_s *tcb)
{
- bvdbg("tcb=%p\n", tcb);
+ binfo("tcb=%p\n", tcb);
DEBUGASSERT(tcb);
/* Does the exiting thread have a kernel stack? */
diff --git a/arch/arm/src/armv7-a/arm_addrenv_shm.c b/arch/arm/src/armv7-a/arm_addrenv_shm.c
index 9a05b9f7b92997542052a72156a2b7c1dab6cbb2..cc9c9440d802dba65a345c74e6c7ebbb98e108c6 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_shm.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_shm.c
@@ -92,7 +92,7 @@ int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr)
unsigned int nmapped;
unsigned int shmndx;
- shmvdbg("pages=%p npages=%d vaddr=%08lx\n",
+ shminfo("pages=%p npages=%d vaddr=%08lx\n",
pages, npages, (unsigned long)vaddr);
/* Sanity checks */
@@ -241,7 +241,7 @@ int up_shmdt(uintptr_t vaddr, unsigned int npages)
unsigned int nunmapped;
unsigned int shmndx;
- shmvdbg("npages=%d vaddr=%08lx\n", npages, (unsigned long)vaddr);
+ shminfo("npages=%d vaddr=%08lx\n", npages, (unsigned long)vaddr);
/* Sanity checks */
diff --git a/arch/arm/src/armv7-a/arm_addrenv_ustack.c b/arch/arm/src/armv7-a/arm_addrenv_ustack.c
index 206d517ef3810f7190d84bc1d0241328b851ddf9..4b7be01bd6d73e4c8df83412385790799d7ed909 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_ustack.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_ustack.c
@@ -143,7 +143,7 @@ int up_addrenv_ustackalloc(FAR struct tcb_s *tcb, size_t stacksize)
{
int ret;
- bvdbg("tcb=%p stacksize=%lu\n", tcb, (unsigned long)stacksize);
+ binfo("tcb=%p stacksize=%lu\n", tcb, (unsigned long)stacksize);
DEBUGASSERT(tcb);
@@ -163,7 +163,7 @@ int up_addrenv_ustackalloc(FAR struct tcb_s *tcb, size_t stacksize)
MMU_L2_UDATAFLAGS);
if (ret < 0)
{
- bdbg("ERROR: Failed to create stack region: %d\n", ret);
+ berr("ERROR: Failed to create stack region: %d\n", ret);
up_addrenv_ustackfree(tcb);
return ret;
}
@@ -190,7 +190,7 @@ int up_addrenv_ustackalloc(FAR struct tcb_s *tcb, size_t stacksize)
int up_addrenv_ustackfree(FAR struct tcb_s *tcb)
{
- bvdbg("tcb=%p\n", tcb);
+ binfo("tcb=%p\n", tcb);
DEBUGASSERT(tcb);
/* Destroy the stack region */
@@ -221,7 +221,7 @@ int up_addrenv_ustackfree(FAR struct tcb_s *tcb)
int up_addrenv_vustack(FAR const struct tcb_s *tcb, FAR void **vstack)
{
- bvdbg("Return=%p\n", (FAR void *)CONFIG_ARCH_STACK_VBASE);
+ binfo("Return=%p\n", (FAR void *)CONFIG_ARCH_STACK_VBASE);
/* Not much to do in this case */
diff --git a/arch/arm/src/armv7-a/arm_addrenv_utils.c b/arch/arm/src/armv7-a/arm_addrenv_utils.c
index f3147918f26e5f32c8d749b19eb6be06a1b1aee0..2eb58623afaa55e5da925232879a620c256823c5 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_utils.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_utils.c
@@ -84,7 +84,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
unsigned int i;
unsigned int j;
- bvdbg("listlen=%d vaddr=%08lx regionsize=%ld, mmuflags=%08x\n",
+ binfo("listlen=%d vaddr=%08lx regionsize=%ld, mmuflags=%08x\n",
listlen, (unsigned long)vaddr, (unsigned long)regionsize,
(unsigned int)mmuflags);
@@ -98,7 +98,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
npages = MM_NPAGES(regionsize);
if (npages > (listlen << (20 - MM_PGSHIFT)))
{
- bdbg("ERROR: npages=%u listlen=%u\n", npages, listlen);
+ berr("ERROR: npages=%u listlen=%u\n", npages, listlen);
return -E2BIG;
}
@@ -201,7 +201,7 @@ void arm_addrenv_destroy_region(FAR uintptr_t **list, unsigned int listlen,
int i;
int j;
- bvdbg("listlen=%d vaddr=%08lx\n", listlen, (unsigned long)vaddr);
+ binfo("listlen=%d vaddr=%08lx\n", listlen, (unsigned long)vaddr);
for (i = 0; i < listlen; vaddr += SECTION_SIZE, list++, i++)
{
diff --git a/arch/arm/src/armv7-a/arm_assert.c b/arch/arm/src/armv7-a/arm_assert.c
index ab3bd4c90819c9eea4377d7116f9a111cf366c31..d79200e0f5c4261a6e1ccdc70ae2b1bd4913d553 100644
--- a/arch/arm/src/armv7-a/arm_assert.c
+++ b/arch/arm/src/armv7-a/arm_assert.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_assert.c
*
- * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -75,19 +64,6 @@
# undef CONFIG_ARCH_USBDUMP
#endif
-/* The following is just intended to keep some ugliness out of the mainline
- * code. We are going to print the task name if:
- *
- * CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
- * (defined(CONFIG_DEBUG) || <-- And the debug is enabled (lldbg used)
- * defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-# define CONFIG_PRINT_TASKNAME 1
-#endif
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -121,7 +97,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
- lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@@ -139,12 +115,12 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
{
/* Dump interesting properties of this task */
-#ifdef CONFIG_PRINT_TASKNAME
- lldbg("%s: PID=%d Stack Used=%lu of %lu\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+ alert("%s: PID=%d Stack Used=%lu of %lu\n",
tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#else
- lldbg("PID: %d Stack Used=%lu of %lu\n",
+ alert("PID: %d Stack Used=%lu of %lu\n",
tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#endif
@@ -184,12 +160,12 @@ static inline void up_registerdump(void)
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
- lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
- lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
+ alert("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
}
}
#else
@@ -253,7 +229,7 @@ static void up_dumpstate(void)
ustacksize = (uint32_t)rtcb->adj_stack_size;
}
- lldbg("Current sp: %08x\n", sp);
+ alert("Current sp: %08x\n", sp);
#if CONFIG_ARCH_INTERRUPTSTACK > 3
/* Get the limits on the interrupt stack memory */
@@ -263,21 +239,21 @@ static void up_dumpstate(void)
/* Show interrupt stack info */
- lldbg("Interrupt stack:\n");
- lldbg(" base: %08x\n", istackbase);
- lldbg(" size: %08x\n", istacksize);
+ alert("Interrupt stack:\n");
+ alert(" base: %08x\n", istackbase);
+ alert(" size: %08x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_intstack());
+ alert(" used: %08x\n", up_check_intstack());
#endif
#endif
/* Show user stack info */
- lldbg("User stack:\n");
- lldbg(" base: %08x\n", ustackbase);
- lldbg(" size: %08x\n", ustacksize);
+ alert("User stack:\n");
+ alert(" base: %08x\n", ustackbase);
+ alert(" size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_tcbstack(rtcb));
+ alert(" used: %08x\n", up_check_tcbstack(rtcb));
#endif
#ifdef CONFIG_ARCH_KERNEL_STACK
@@ -287,9 +263,9 @@ static void up_dumpstate(void)
{
kstackbase = (uint32_t)rtcb->xcp.kstack + CONFIG_ARCH_KERNEL_STACKSIZE - 4;
- lldbg("Kernel stack:\n");
- lldbg(" base: %08x\n", kstackbase);
- lldbg(" size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
+ alert("Kernel stack:\n");
+ alert(" base: %08x\n", kstackbase);
+ alert(" size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
}
#endif
@@ -300,7 +276,7 @@ static void up_dumpstate(void)
{
/* Yes.. dump the interrupt stack */
- lldbg("Interrupt Stack\n", sp);
+ alert("Interrupt Stack\n", sp);
up_stackdump(sp, istackbase);
/* Extract the user stack pointer which should lie
@@ -308,7 +284,7 @@ static void up_dumpstate(void)
*/
sp = g_intstackbase;
- lldbg("User sp: %08x\n", sp);
+ alert("User sp: %08x\n", sp);
}
#endif
@@ -318,7 +294,7 @@ static void up_dumpstate(void)
if (sp > ustackbase - ustacksize && sp < ustackbase)
{
- lldbg("User Stack\n", sp);
+ alert("User Stack\n", sp);
up_stackdump(sp, ustackbase);
}
@@ -329,7 +305,7 @@ static void up_dumpstate(void)
if (sp >= (uint32_t)rtcb->xcp.kstack && sp < kstackbase)
{
- lldbg("Kernel Stack\n", sp);
+ alert("Kernel Stack\n", sp);
up_stackdump(sp, kstackbase);
}
#endif
@@ -337,7 +313,7 @@ static void up_dumpstate(void)
#ifdef CONFIG_SMP
/* Show the CPU number */
- lldbg("CPU%d:\n", up_cpu_index());
+ alert("CPU%d:\n", up_cpu_index());
#endif
/* Then dump the CPU registers (if available) */
@@ -396,16 +372,16 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0
struct tcb_s *rtcb = this_task();
#endif
board_autoled_on(LED_ASSERTION);
-#ifdef CONFIG_PRINT_TASKNAME
- lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+ alert("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
- lldbg("Assertion failed at file:%s line: %d\n",
+ alert("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
up_dumpstate();
diff --git a/arch/arm/src/armv7-a/arm_cpustart.c b/arch/arm/src/armv7-a/arm_cpustart.c
index 1ec95da855a9122c37c018593feda1c0d9118b2b..30653ed197419b01572cf6350d6ed9c5d8934a23 100644
--- a/arch/arm/src/armv7-a/arm_cpustart.c
+++ b/arch/arm/src/armv7-a/arm_cpustart.c
@@ -64,19 +64,19 @@ static inline void arm_registerdump(FAR struct tcb_s *tcb)
{
int regndx;
- lldbg("CPU%d:\n", up_cpu_index());
+ llerr("CPU%d:\n", up_cpu_index());
/* Dump the startup registers */
for (regndx = REG_R0; regndx <= REG_R15; regndx += 8)
{
uint32_t *ptr = (uint32_t *)&tcb->xcp.regs[regndx];
- lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ llerr("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regndx, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
- lldbg("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]);
+ llerr("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]);
}
#else
# define arm_registerdump(tcb)
@@ -106,7 +106,7 @@ int arm_start_handler(int irq, FAR void *context)
{
FAR struct tcb_s *tcb;
- sllvdbg("CPU%d Started\n", up_cpu_index());
+ sllinfo("CPU%d Started\n", up_cpu_index());
/* Reset scheduler parameters */
@@ -155,7 +155,7 @@ int arm_start_handler(int irq, FAR void *context)
int up_cpu_start(int cpu)
{
- sllvdbg("Starting CPU%d\n", cpu);
+ sllinfo("Starting CPU%d\n", cpu);
DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
diff --git a/arch/arm/src/armv7-a/arm_dataabort.c b/arch/arm/src/armv7-a/arm_dataabort.c
index 818557c552abc99c82e0acde220c62afeb9ff910..00a686f8a75dbc3356607caa70ea40286ce3efda 100644
--- a/arch/arm/src/armv7-a/arm_dataabort.c
+++ b/arch/arm/src/armv7-a/arm_dataabort.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_dataabort.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
@@ -115,7 +104,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
* fatal error.
*/
- pglldbg("DFSR: %08x DFAR: %08x\n", dfsr, dfar);
+ pgllerr("DFSR: %08x DFAR: %08x\n", dfsr, dfar);
if ((dfsr & FSR_MASK) != FSR_PAGE)
{
goto segfault;
@@ -126,7 +115,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
* (It has not yet been saved in the register context save area).
*/
- pgllvdbg("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
+ pgllinfo("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
if (dfar < PG_PAGED_VBASE || dfar >= PG_PAGED_VEND)
{
goto segfault;
@@ -163,7 +152,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
return regs;
segfault:
- lldbg("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
+ alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
regs[REG_PC], dfar, dfsr);
PANIC();
return regs; /* To keep the compiler happy */
@@ -181,7 +170,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
/* Crash -- possibly showing diagnostic debug information. */
- lldbg("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
+ alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
regs[REG_PC], dfar, dfsr);
PANIC();
return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv7-a/arm_elf.c b/arch/arm/src/armv7-a/arm_elf.c
index 57898e136af7a37afb95de9dcfe2af5b29056677..e262095e5c0b86d9ced55ca708d4874ce059617a 100644
--- a/arch/arm/src/armv7-a/arm_elf.c
+++ b/arch/arm/src/armv7-a/arm_elf.c
@@ -74,7 +74,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
- bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
+ berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -82,7 +82,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
- bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
+ berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
- bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
+ berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -102,7 +102,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
- bdbg("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
+ berr("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
return -ENOEXEC;
}
@@ -162,7 +162,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_CALL:
case R_ARM_JUMP24:
{
- bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
+ binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -175,7 +175,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
- bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
+ berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -191,7 +191,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_ABS32:
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
- bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t *)addr += sym->st_value;
@@ -200,7 +200,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_V4BX:
{
- bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
+ binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t *)addr));
/* Preserve only Rm and the condition code */
@@ -215,7 +215,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_PREL31:
{
- bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
offset = *(uint32_t *)addr + sym->st_value - addr;
@@ -226,7 +226,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
{
- bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -246,7 +246,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
- bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
+ berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -256,6 +256,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
- bdbg("RELA relocation not supported\n");
+ berr("RELA relocation not supported\n");
return -ENOSYS;
}
diff --git a/arch/arm/src/armv7-a/arm_gicv2.c b/arch/arm/src/armv7-a/arm_gicv2.c
index 990a2c66dd3dd11ae2e9d58e6ab6dc020ecef858..3d44e61f5f48f3220318f47e4587cfe7775dab90 100644
--- a/arch/arm/src/armv7-a/arm_gicv2.c
+++ b/arch/arm/src/armv7-a/arm_gicv2.c
@@ -387,7 +387,7 @@ uint32_t *arm_decodeirq(uint32_t *regs)
regval = getreg32(GIC_ICCIAR);
irq = (regval & GIC_ICCIAR_INTID_MASK) >> GIC_ICCIAR_INTID_SHIFT;
- gicllvdbg("irq=%d\n", irq);
+ gicllinfo("irq=%d\n", irq);
/* Ignore spurions IRQs. ICCIAR will report 1023 if there is no pending
* interrupt.
diff --git a/arch/arm/src/armv7-a/arm_head.S b/arch/arm/src/armv7-a/arm_head.S
index 220026da340758619e11b7ec48c3b122957a5975..c98ab30719d5774314346cea3c4ab0ece6007022 100644
--- a/arch/arm/src/armv7-a/arm_head.S
+++ b/arch/arm/src/armv7-a/arm_head.S
@@ -169,7 +169,7 @@
/* This macro will modify r0, r1, r2 and r14 */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.macro showprogress, code
mov r0, #\code
bl up_lowputc
diff --git a/arch/arm/src/armv7-a/arm_l2cc_pl310.c b/arch/arm/src/armv7-a/arm_l2cc_pl310.c
index 64aeaf3b8bc61cbec7dc990fee8011650c961de3..1b88cca350e7954adb84f5c1443ed99dbb789482 100644
--- a/arch/arm/src/armv7-a/arm_l2cc_pl310.c
+++ b/arch/arm/src/armv7-a/arm_l2cc_pl310.c
@@ -411,7 +411,7 @@ void up_l2ccinitialize(void)
putreg32(L2CC_CR_L2CEN, L2CC_CR);
}
- lldbg("(%d ways) * (%d bytes/way) = %d bytes\n",
+ llerr("(%d ways) * (%d bytes/way) = %d bytes\n",
PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE);
}
diff --git a/arch/arm/src/armv7-a/arm_pghead.S b/arch/arm/src/armv7-a/arm_pghead.S
index bc4c99ce26da187dc4508f79e9737b4663ca1fbf..1a546c813d4007ea2105fb0ae544df94dc469956 100644
--- a/arch/arm/src/armv7-a/arm_pghead.S
+++ b/arch/arm/src/armv7-a/arm_pghead.S
@@ -194,7 +194,7 @@
/* This macro will modify r0, r1, r2 and r14 */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.macro showprogress, code
mov r0, #\code
bl up_lowputc
diff --git a/arch/arm/src/armv7-a/arm_prefetchabort.c b/arch/arm/src/armv7-a/arm_prefetchabort.c
index bdd28c4a3aa72505bd66d469e5d6bcf24dddeee5..a6b73e3ad2a7dd5a8a30a23f75e8fef90ec1a56d 100644
--- a/arch/arm/src/armv7-a/arm_prefetchabort.c
+++ b/arch/arm/src/armv7-a/arm_prefetchabort.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_prefetchabort.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
@@ -97,7 +86,7 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
* virtual addresses.
*/
- pglldbg("VADDR: %08x VBASE: %08x VEND: %08x\n",
+ pgllerr("VADDR: %08x VBASE: %08x VEND: %08x\n",
regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
if (regs[REG_R15] >= PG_PAGED_VBASE && regs[REG_R15] < PG_PAGED_VEND)
@@ -134,7 +123,7 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
}
else
{
- lldbg("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
+ alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
regs[REG_PC], ifar, ifsr);
PANIC();
}
@@ -154,7 +143,7 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
/* Crash -- possibly showing diagnostic debug information. */
- lldbg("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
+ alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
regs[REG_PC], ifar, ifsr);
PANIC();
return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv7-a/arm_releasepending.c b/arch/arm/src/armv7-a/arm_releasepending.c
index 9696e931c0bdb7643535b0aa3e795eb237cb9c8c..b2e36821b11d52d510a51ea91bde73dbbd2effb5 100644
--- a/arch/arm/src/armv7-a/arm_releasepending.c
+++ b/arch/arm/src/armv7-a/arm_releasepending.c
@@ -67,7 +67,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
- slldbg("From TCB=%p\n", rtcb);
+ sllerr("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
diff --git a/arch/arm/src/armv7-a/arm_reprioritizertr.c b/arch/arm/src/armv7-a/arm_reprioritizertr.c
index d4b2699f6dd01f2a3cc0c3be38038f1961c18c6e..468e382779f8b3a8e5b348d5a219ef4a2703b852 100644
--- a/arch/arm/src/armv7-a/arm_reprioritizertr.c
+++ b/arch/arm/src/armv7-a/arm_reprioritizertr.c
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
- slldbg("TCB=%p PRI=%d\n", tcb, priority);
+ sllerr("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
diff --git a/arch/arm/src/armv7-a/arm_schedulesigaction.c b/arch/arm/src/armv7-a/arm_schedulesigaction.c
index 3dfe5fc285f7c9a5f4de4a519107067c5ca1bb34..74648c8fa5d632671054d25a35c87c1aa4583191 100644
--- a/arch/arm/src/armv7-a/arm_schedulesigaction.c
+++ b/arch/arm/src/armv7-a/arm_schedulesigaction.c
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+ serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
- sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+ serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
diff --git a/arch/arm/src/armv7-a/arm_sigdeliver.c b/arch/arm/src/armv7-a/arm_sigdeliver.c
index 32f1e0b40d1219f98a282c6ca98fa5c7070bcc6a..8009386492dfc6d65faac834f844856eb650d6bf 100644
--- a/arch/arm/src/armv7-a/arm_sigdeliver.c
+++ b/arch/arm/src/armv7-a/arm_sigdeliver.c
@@ -83,7 +83,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -114,7 +114,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/arm/src/armv7-a/arm_syscall.c b/arch/arm/src/armv7-a/arm_syscall.c
index 854ece3de2cdf789db4e59069a03236733dd78da..c9505aaadf43dc6e7f8c4d54773721a00ebe4e83 100644
--- a/arch/arm/src/armv7-a/arm_syscall.c
+++ b/arch/arm/src/armv7-a/arm_syscall.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_syscall.c
*
- * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -71,9 +60,13 @@
/* Debug ********************************************************************/
#if defined(CONFIG_DEBUG_SYSCALL)
-# define svcdbg(format, ...) lldbg(format, ##__VA_ARGS__)
+# define svcerr(format, ...) llerr(format, ##__VA_ARGS__)
+# define svcwarn(format, ...) llwarn(format, ##__VA_ARGS__)
+# define svcinfo(format, ...) llinfo(format, ##__VA_ARGS__)
#else
-# define svcdbg(x...)
+# define svcerr(x...)
+# define svcwarn(x...)
+# define svcinfo(x...)
#endif
/****************************************************************************
@@ -179,14 +172,14 @@ uint32_t *arm_syscall(uint32_t *regs)
*/
#if defined(CONFIG_DEBUG_SYSCALL)
- svcdbg("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
- svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ svcinfo("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
+ svcinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
- svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ svcinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
- svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
+ svcinfo("CPSR: %08x\n", regs[REG_CPSR]);
#endif
/* Handle the SVCall according to the command in R0 */
@@ -480,7 +473,7 @@ uint32_t *arm_syscall(uint32_t *regs)
regs[REG_R0] -= CONFIG_SYS_RESERVED;
#else
- svcdbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
+ svcerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
#endif
#ifdef CONFIG_ARCH_KERNEL_STACK
@@ -504,14 +497,14 @@ uint32_t *arm_syscall(uint32_t *regs)
#if defined(CONFIG_DEBUG_SYSCALL)
/* Report what happened */
- svcdbg("SYSCALL Exit: regs: %p\n", regs);
- svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
- regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
- regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
- svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
- regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
+ svcinfo("SYSCALL Exit: regs: %p\n", regs);
+ svcinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
+ regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
+ svcinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
- svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
+ svcinfo("CPSR: %08x\n", regs[REG_CPSR]);
#endif
/* Return the last value of curent_regs. This supports context switches
@@ -526,7 +519,7 @@ uint32_t *arm_syscall(uint32_t *regs)
uint32_t *arm_syscall(uint32_t *regs)
{
- lldbg("SYSCALL from 0x%x\n", regs[REG_PC]);
+ alert("SYSCALL from 0x%x\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC();
}
diff --git a/arch/arm/src/armv7-a/arm_undefinedinsn.c b/arch/arm/src/armv7-a/arm_undefinedinsn.c
index 0c051d9dd916accbf64c8e0d35fb5a5ad801071d..70442b49ffa8603e2e3db144e1144fe03d3ed44d 100644
--- a/arch/arm/src/armv7-a/arm_undefinedinsn.c
+++ b/arch/arm/src/armv7-a/arm_undefinedinsn.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_undefinedinsn.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -68,7 +57,7 @@
uint32_t *arm_undefinedinsn(uint32_t *regs)
{
- lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]);
+ alert("Undefined instruction at 0x%x\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC();
return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv7-a/gic.h b/arch/arm/src/armv7-a/gic.h
index cc6ee4833004f661ec96a5f9d248d23944a7ff6b..2131c105effb5d0c3c984a6e8e1b2f00e6016e67 100644
--- a/arch/arm/src/armv7-a/gic.h
+++ b/arch/arm/src/armv7-a/gic.h
@@ -594,15 +594,15 @@
/* Debug */
#ifdef CONFIG_DEBUG_IRQ
-# define gicdbg(format, ...) dbg(format, ##__VA_ARGS__)
-# define giclldbg(format, ...) lldbg(format, ##__VA_ARGS__)
-# define gicvdbg(format, ...) vdbg(format, ##__VA_ARGS__)
-# define gicllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+# define gicerr(format, ...) err(format, ##__VA_ARGS__)
+# define gicllerr(format, ...) llerr(format, ##__VA_ARGS__)
+# define gicinfo(format, ...) info(format, ##__VA_ARGS__)
+# define gicllinfo(format, ...) llinfo(format, ##__VA_ARGS__)
#else
-# define gicdbg(x...)
-# define giclldbg(x...)
-# define gicvdbg(x...)
-# define gicllvdbg(x...)
+# define gicerr(x...)
+# define gicllerr(x...)
+# define gicinfo(x...)
+# define gicllinfo(x...)
#endif
/****************************************************************************
diff --git a/arch/arm/src/armv7-m/mpu.h b/arch/arm/src/armv7-m/mpu.h
index 310c21a90912303363435c59a6dbf1f348386ca2..6f4617a6707059012919164163d0d4709869a049 100644
--- a/arch/arm/src/armv7-m/mpu.h
+++ b/arch/arm/src/armv7-m/mpu.h
@@ -219,9 +219,10 @@ uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size);
static inline void mpu_showtype(void)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ERROR
uint32_t regval = getreg32(MPU_TYPE);
- dbg("%s MPU Regions: data=%d instr=%d\n",
+
+ err("%s MPU Regions: data=%d instr=%d\n",
(regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT,
(regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT);
diff --git a/arch/arm/src/armv7-m/up_assert.c b/arch/arm/src/armv7-m/up_assert.c
index 0f6fa00d219488401220dc6d35a5d469786f66d8..fbf29b29e7fd41af0d1ea5893fa2188e78c09083 100644
--- a/arch/arm/src/armv7-m/up_assert.c
+++ b/arch/arm/src/armv7-m/up_assert.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-m/up_assert.c
*
- * Copyright (C) 2009-2010, 2012-2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2009-2010, 2012-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -75,23 +64,6 @@
# undef CONFIG_ARCH_USBDUMP
#endif
-/* The following is just intended to keep some ugliness out of the mainline
- * code. We are going to print the task name if:
- *
- * CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
- * (defined(CONFIG_DEBUG) || <-- And the debug is enabled (lldbg used)
- * defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-# define CONFIG_PRINT_TASKNAME 1
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -125,7 +97,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
- lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@@ -143,12 +115,12 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
{
/* Dump interesting properties of this task */
-#ifdef CONFIG_PRINT_TASKNAME
- lldbg("%s: PID=%d Stack Used=%lu of %lu\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+ alert("%s: PID=%d Stack Used=%lu of %lu\n",
tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#else
- lldbg("PID: %d Stack Used=%lu of %lu\n",
+ alert("PID: %d Stack Used=%lu of %lu\n",
tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#endif
@@ -183,29 +155,29 @@ static inline void up_registerdump(void)
{
/* Yes.. dump the interrupt registers */
- lldbg("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
- lldbg("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
- lldbg("xPSR: %08x BASEPRI: %08x CONTROL: %08x\n",
+ alert("xPSR: %08x BASEPRI: %08x CONTROL: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
getcontrol());
#else
- lldbg("xPSR: %08x PRIMASK: %08x CONTROL: %08x\n",
+ alert("xPSR: %08x PRIMASK: %08x CONTROL: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
getcontrol());
#endif
#ifdef REG_EXC_RETURN
- lldbg("EXC_RETURN: %08x\n", CURRENT_REGS[REG_EXC_RETURN]);
+ alert("EXC_RETURN: %08x\n", CURRENT_REGS[REG_EXC_RETURN]);
#endif
}
}
@@ -275,12 +247,12 @@ static void up_dumpstate(void)
/* Show interrupt stack info */
- lldbg("sp: %08x\n", sp);
- lldbg("IRQ stack:\n");
- lldbg(" base: %08x\n", istackbase);
- lldbg(" size: %08x\n", istacksize);
+ alert("sp: %08x\n", sp);
+ alert("IRQ stack:\n");
+ alert(" base: %08x\n", istackbase);
+ alert(" size: %08x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_intstack());
+ alert(" used: %08x\n", up_check_intstack());
#endif
/* Does the current stack pointer lie within the interrupt
@@ -302,14 +274,14 @@ static void up_dumpstate(void)
if (CURRENT_REGS)
{
sp = CURRENT_REGS[REG_R13];
- lldbg("sp: %08x\n", sp);
+ alert("sp: %08x\n", sp);
}
- lldbg("User stack:\n");
- lldbg(" base: %08x\n", ustackbase);
- lldbg(" size: %08x\n", ustacksize);
+ alert("User stack:\n");
+ alert(" base: %08x\n", ustackbase);
+ alert(" size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_tcbstack(rtcb));
+ alert(" used: %08x\n", up_check_tcbstack(rtcb));
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@@ -325,11 +297,11 @@ static void up_dumpstate(void)
/* Show user stack info */
- lldbg("sp: %08x\n", sp);
- lldbg("stack base: %08x\n", ustackbase);
- lldbg("stack size: %08x\n", ustacksize);
+ alert("sp: %08x\n", sp);
+ alert("stack base: %08x\n", ustackbase);
+ alert("stack size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
+ alert("stack used: %08x\n", up_check_tcbstack(rtcb));
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@@ -338,7 +310,7 @@ static void up_dumpstate(void)
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
- lldbg("ERROR: Stack pointer is not within the allocated stack\n");
+ alert("ERROR: Stack pointer is not within the allocated stack\n");
}
else
{
@@ -403,17 +375,17 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0
struct tcb_s *rtcb = this_task();
#endif
board_autoled_on(LED_ASSERTION);
-#ifdef CONFIG_PRINT_TASKNAME
- lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+ alert("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
- lldbg("Assertion failed at file:%s line: %d\n",
+ alert("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
diff --git a/arch/arm/src/armv7-m/up_elf.c b/arch/arm/src/armv7-m/up_elf.c
index bf492f1acaa5ac25ac8a7c1a0aec6fd73f49866f..e45e2dbe2422317e602e67b2e7419718083d46a9 100644
--- a/arch/arm/src/armv7-m/up_elf.c
+++ b/arch/arm/src/armv7-m/up_elf.c
@@ -82,7 +82,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
- bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
+ berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -90,7 +90,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
- bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
+ berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -102,7 +102,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
- bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
+ berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -164,7 +164,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_CALL:
case R_ARM_JUMP24:
{
- bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
+ binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -177,7 +177,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
- bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
+ berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -193,7 +193,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_ABS32:
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
- bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t *)addr += sym->st_value;
@@ -204,7 +204,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_TARGET2: /* TARGET2 is a platform-specific relocation: gcc-arm-none-eabi
* performs a self relocation */
{
- bvdbg("Performing TARGET2 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing TARGET2 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t *)addr += sym->st_value - addr;
@@ -253,7 +253,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
upper_insn = (uint32_t)(*(uint16_t *)addr);
lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
- bvdbg("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
+ binfo("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
sym, (long)sym->st_value);
@@ -287,7 +287,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
/* And perform the relocation */
- bvdbg(" S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n",
+ binfo(" S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n",
S, J1, J2, (long)offset, offset + sym->st_value - addr);
offset += sym->st_value - addr;
@@ -298,7 +298,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && (offset & 1) == 0)
{
- bdbg(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
+ berr(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -308,7 +308,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (offset <= (int32_t)0xff000000 || offset >= (int32_t)0x01000000)
{
- bdbg(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
+ berr(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -328,14 +328,14 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
lower_insn = ((lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | ((offset >> 1) & 0x07ff));
*(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
- bvdbg(" S=%d J1=%d J2=%d insn [%04x %04x]\n",
+ binfo(" S=%d J1=%d J2=%d insn [%04x %04x]\n",
S, J1, J2, (int)upper_insn, (int)lower_insn);
}
break;
case R_ARM_V4BX:
{
- bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
+ binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t *)addr));
/* Preserve only Rm and the condition code */
@@ -350,7 +350,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_PREL31:
{
- bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
offset = *(uint32_t *)addr + sym->st_value - addr;
@@ -361,7 +361,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
{
- bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -416,7 +416,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
upper_insn = (uint32_t)(*(uint16_t *)addr);
lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
- bvdbg("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
+ binfo("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
sym, (long)sym->st_value);
@@ -433,7 +433,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
/* And perform the relocation */
- bvdbg(" offset=%08lx branch target=%08lx\n",
+ binfo(" offset=%08lx branch target=%08lx\n",
(long)offset, offset + sym->st_value);
offset += sym->st_value;
@@ -455,13 +455,13 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
(offset & 0x00ff));
*(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
- bvdbg(" insn [%04x %04x]\n",
+ binfo(" insn [%04x %04x]\n",
(int)upper_insn, (int)lower_insn);
}
break;
default:
- bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
+ berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -471,7 +471,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
- bdbg("RELA relocation not supported\n");
+ berr("RELA relocation not supported\n");
return -ENOSYS;
}
diff --git a/arch/arm/src/armv7-m/up_hardfault.c b/arch/arm/src/armv7-m/up_hardfault.c
index 807d45cc43922595c1dbb7a3c92a0235acbf76e9..b08466258fb353e7e9dcb21ecece8a69823434fd 100644
--- a/arch/arm/src/armv7-m/up_hardfault.c
+++ b/arch/arm/src/armv7-m/up_hardfault.c
@@ -60,9 +60,9 @@
*/
#ifdef CONFIG_DEBUG_HARDFAULT
-# define hfdbg(format, ...) lldbg(format, ##__VA_ARGS__)
+# define hferr(format, ...) llerr(format, ##__VA_ARGS__)
#else
-# define hfdbg(x...)
+# define hferr(x...)
#endif
#define INSN_SVC0 0xdf00 /* insn: svc 0 */
@@ -127,7 +127,7 @@ int up_hardfault(int irq, FAR void *context)
/* Fetch the instruction that caused the Hard fault */
uint16_t insn = *pc;
- hfdbg(" PC: %p INSN: %04x\n", pc, insn);
+ hferr(" PC: %p INSN: %04x\n", pc, insn);
/* If this was the instruction 'svc 0', then forward processing
* to the SVCall handler
@@ -135,7 +135,7 @@ int up_hardfault(int irq, FAR void *context)
if (insn == INSN_SVC0)
{
- hfdbg("Forward SVCall\n");
+ hferr("Forward SVCall\n");
return up_svcall(irq, context);
}
}
@@ -143,43 +143,43 @@ int up_hardfault(int irq, FAR void *context)
/* Dump some hard fault info */
- hfdbg("Hard Fault:\n");
- hfdbg(" IRQ: %d regs: %p\n", irq, regs);
- hfdbg(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
+ hferr("Hard Fault:\n");
+ hferr(" IRQ: %d regs: %p\n", irq, regs);
+ hferr(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
- hfdbg(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
+ hferr(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_HFAULTS),
getreg32(NVIC_DFAULTS), getreg32(NVIC_BFAULT_ADDR),
getreg32(NVIC_AFAULTS));
- hfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ hferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
- hfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ hferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
- hfdbg(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
+ hferr(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
# else
- hfdbg(" xPSR: %08x BASEPRI: %08x (saved)\n",
+ hferr(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
- hfdbg(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
+ hferr(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
# else
- hfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
+ hferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
# endif
#endif
(void)up_irq_save();
- lldbg("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
+ llerr("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
PANIC();
return OK;
}
diff --git a/arch/arm/src/armv7-m/up_memfault.c b/arch/arm/src/armv7-m/up_memfault.c
index 145dba531d0d788fc61d212c3f9ec860f0e2da35..629304d6d2521aefeba256551c1f02fb3d54f8db 100644
--- a/arch/arm/src/armv7-m/up_memfault.c
+++ b/arch/arm/src/armv7-m/up_memfault.c
@@ -55,9 +55,9 @@
#undef DEBUG_MEMFAULTS /* Define to debug memory management faults */
#ifdef DEBUG_MEMFAULTS
-# define mfdbg(format, ...) lldbg(format, ##__VA_ARGS__)
+# define mferr(format, ...) llerr(format, ##__VA_ARGS__)
#else
-# define mfdbg(x...)
+# define mferr(x...)
#endif
/****************************************************************************
@@ -92,35 +92,35 @@ int up_memfault(int irq, FAR void *context)
/* Dump some memory management fault info */
(void)up_irq_save();
- lldbg("PANIC!!! Memory Management Fault:\n");
- mfdbg(" IRQ: %d context: %p\n", irq, regs);
- lldbg(" CFAULTS: %08x MMFAR: %08x\n",
+ llerr("PANIC!!! Memory Management Fault:\n");
+ mferr(" IRQ: %d context: %p\n", irq, regs);
+ llerr(" CFAULTS: %08x MMFAR: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR));
- mfdbg(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
+ mferr(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
- mfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ mferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
- mfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ mferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
- mfdbg(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
+ mferr(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
# else
- mfdbg(" xPSR: %08x BASEPRI: %08x (saved)\n",
+ mferr(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
- mfdbg(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
+ mferr(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
# else
- mfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
+ mferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
# endif
#endif
diff --git a/arch/arm/src/armv7-m/up_ramvec_attach.c b/arch/arm/src/armv7-m/up_ramvec_attach.c
index 3700cdb00bc1542ff0b44e29585e3363475cded5..fc3439d6a04734ca95357775750a7b1bd68cd510 100644
--- a/arch/arm/src/armv7-m/up_ramvec_attach.c
+++ b/arch/arm/src/armv7-m/up_ramvec_attach.c
@@ -54,16 +54,16 @@
****************************************************************************/
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the interrupt
- * config. NOTE: that only lldbg types are used so that the output is
+ * config. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_IRQ
-# define intdbg lldbg
-# define intvdbg llvdbg
+# define interr llerr
+# define intinfo llinfo
#else
-# define intdbg(x...)
-# define intvdbg(x...)
+# define interr(x...)
+# define intinfo(x...)
#endif
/****************************************************************************
@@ -103,7 +103,7 @@ int up_ramvec_attach(int irq, up_vector_t vector)
{
int ret = -EINVAL;
- intvdbg("%s IRQ%d\n", vector ? "Attaching" : "Detaching", irq);
+ intinfo("%s IRQ%d\n", vector ? "Attaching" : "Detaching", irq);
if ((unsigned)irq < NR_VECTORS)
{
diff --git a/arch/arm/src/armv7-m/up_ramvec_initialize.c b/arch/arm/src/armv7-m/up_ramvec_initialize.c
index 80b176d67403d0eaf8d14cb880ac1b3e99946bc7..354e5eaf4bf29e87732699f8a7e2a1a5d6cdb43d 100644
--- a/arch/arm/src/armv7-m/up_ramvec_initialize.c
+++ b/arch/arm/src/armv7-m/up_ramvec_initialize.c
@@ -73,16 +73,16 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the interrupt
- * config. NOTE: that only lldbg types are used so that the output is
+ * config. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_IRQ
-# define intdbg lldbg
-# define intvdbg llvdbg
+# define interr llerr
+# define intinfo llinfo
#else
-# define intdbg(x...)
-# define intvdbg(x...)
+# define interr(x...)
+# define intinfo(x...)
#endif
/****************************************************************************
@@ -147,7 +147,7 @@ void up_ramvec_initialize(void)
src = (const CODE up_vector_t *)getreg32(NVIC_VECTAB);
dest = g_ram_vectors;
- intvdbg("src=%p dest=%p\n", src, dest);
+ intinfo("src=%p dest=%p\n", src, dest);
for (i = 0; i < ARMV7M_VECTAB_SIZE; i++)
{
@@ -163,7 +163,7 @@ void up_ramvec_initialize(void)
* the table alignment is insufficient.
*/
- intvdbg("NVIC_VECTAB=%08x\n", getreg32(NVIC_VECTAB));
+ intinfo("NVIC_VECTAB=%08x\n", getreg32(NVIC_VECTAB));
DEBUGASSERT(getreg32(NVIC_VECTAB) == (uint32_t)g_ram_vectors);
}
diff --git a/arch/arm/src/armv7-m/up_releasepending.c b/arch/arm/src/armv7-m/up_releasepending.c
index e9f4cceb33cdf2181f3273caa7bc473d0ea4201d..489e3537e112535f993f8ee64eaf1a0072df0326 100644
--- a/arch/arm/src/armv7-m/up_releasepending.c
+++ b/arch/arm/src/armv7-m/up_releasepending.c
@@ -66,7 +66,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
- slldbg("From TCB=%p\n", rtcb);
+ sllerr("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
diff --git a/arch/arm/src/armv7-m/up_reprioritizertr.c b/arch/arm/src/armv7-m/up_reprioritizertr.c
index d3415e77414246695490bb00e54bb912dbb6dac7..61b592be05b92d9ea81a2321d18ed2daece513ff 100644
--- a/arch/arm/src/armv7-m/up_reprioritizertr.c
+++ b/arch/arm/src/armv7-m/up_reprioritizertr.c
@@ -94,7 +94,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
- slldbg("TCB=%p PRI=%d\n", tcb, priority);
+ sllerr("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just removed the head
diff --git a/arch/arm/src/armv7-m/up_schedulesigaction.c b/arch/arm/src/armv7-m/up_schedulesigaction.c
index c44298c14ece181a4a7033324d600a2258b752c8..d24906dd3bea6c197eb3ea98ab78ad976347e2e9 100644
--- a/arch/arm/src/armv7-m/up_schedulesigaction.c
+++ b/arch/arm/src/armv7-m/up_schedulesigaction.c
@@ -95,7 +95,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+ serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
DEBUGASSERT(tcb != NULL && sigdeliver != NULL);
/* Make sure that interrupts are disabled */
@@ -110,7 +110,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
- sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+ serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
diff --git a/arch/arm/src/armv7-m/up_sigdeliver.c b/arch/arm/src/armv7-m/up_sigdeliver.c
index bfa672aa7acf3d154b2169869a9c9166149ea4bc..16f05b5adcbee987168463b5437d28075bbb5010 100644
--- a/arch/arm/src/armv7-m/up_sigdeliver.c
+++ b/arch/arm/src/armv7-m/up_sigdeliver.c
@@ -95,7 +95,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -138,7 +138,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/arm/src/armv7-m/up_svcall.c b/arch/arm/src/armv7-m/up_svcall.c
index 4d28224fd7eba41837ef4b49a91a4381733c4af4..70eef080546e7940509dd2adfc636a00e0c7b86d 100644
--- a/arch/arm/src/armv7-m/up_svcall.c
+++ b/arch/arm/src/armv7-m/up_svcall.c
@@ -65,14 +65,14 @@
/* Debug output from this file may interfere with context switching! To get
* debug output you must enabled the following in your NuttX configuration:
*
- * - CONFIG_DEBUG and CONFIG_DEBUG_SYSCALL (shows only syscalls)
- * - CONFIG_DEBUG and CONFIG_DEBUG_SVCALL (shows everything)
+ * - CONFIG_DEBUG_FEATURES and CONFIG_DEBUG_SYSCALL (shows only syscalls)
+ * - CONFIG_DEBUG_FEATURES and CONFIG_DEBUG_SVCALL (shows everything)
*/
#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
-# define svcdbg(format, ...) lldbg(format, ##__VA_ARGS__)
+# define svcerr(format, ...) llerr(format, ##__VA_ARGS__)
#else
-# define svcdbg(x...)
+# define svcerr(x...)
#endif
/****************************************************************************
@@ -169,18 +169,18 @@ int up_svcall(int irq, FAR void *context)
if (cmd > SYS_switch_context)
# endif
{
- svcdbg("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
- svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ svcerr("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
+ svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
- svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
# ifdef REG_EXC_RETURN
- svcdbg(" PSR: %08x EXC_RETURN: %08x\n",
+ svcerr(" PSR: %08x EXC_RETURN: %08x\n",
regs[REG_XPSR], regs[REG_EXC_RETURN]);
# else
- svcdbg(" PSR: %08x\n", regs[REG_XPSR]);
+ svcerr(" PSR: %08x\n", regs[REG_XPSR]);
# endif
}
#endif
@@ -473,7 +473,7 @@ int up_svcall(int irq, FAR void *context)
regs[REG_R0] -= CONFIG_SYS_RESERVED;
#else
- slldbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
+ sllerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
#endif
}
break;
@@ -488,28 +488,28 @@ int up_svcall(int irq, FAR void *context)
if (regs != CURRENT_REGS)
# endif
{
- svcdbg("SVCall Return:\n");
- svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ svcerr("SVCall Return:\n");
+ svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
- svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
# ifdef REG_EXC_RETURN
- svcdbg(" PSR: %08x EXC_RETURN: %08x\n",
+ svcerr(" PSR: %08x EXC_RETURN: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_EXC_RETURN]);
# else
- svcdbg(" PSR: %08x\n", CURRENT_REGS[REG_XPSR]);
+ svcerr(" PSR: %08x\n", CURRENT_REGS[REG_XPSR]);
# endif
}
# ifdef CONFIG_DEBUG_SVCALL
else
{
- svcdbg("SVCall Return: %d\n", regs[REG_R0]);
+ svcerr("SVCall Return: %d\n", regs[REG_R0]);
}
# endif
#endif
diff --git a/arch/arm/src/armv7-r/arm_assert.c b/arch/arm/src/armv7-r/arm_assert.c
index 11dd9fad09be9e339bb896a1767a819ff7e0583a..9218e4da8a1a8145ede866b6fd5d2fbf306cb693 100644
--- a/arch/arm/src/armv7-r/arm_assert.c
+++ b/arch/arm/src/armv7-r/arm_assert.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_assert.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -69,25 +58,13 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
+
/* USB trace dumping */
#ifndef CONFIG_USBDEV_TRACE
# undef CONFIG_ARCH_USBDUMP
#endif
-/* The following is just intended to keep some ugliness out of the mainline
- * code. We are going to print the task name if:
- *
- * CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
- * (defined(CONFIG_DEBUG) || <-- And the debug is enabled (lldbg used)
- * defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-# define CONFIG_PRINT_TASKNAME 1
-#endif
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -121,7 +98,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
- lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ llerr("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@@ -139,12 +116,12 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
{
/* Dump interesting properties of this task */
-#ifdef CONFIG_PRINT_TASKNAME
- lldbg("%s: PID=%d Stack Used=%lu of %lu\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+ llerr("%s: PID=%d Stack Used=%lu of %lu\n",
tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#else
- lldbg("PID: %d Stack Used=%lu of %lu\n",
+ llerr("PID: %d Stack Used=%lu of %lu\n",
tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#endif
@@ -184,12 +161,12 @@ static inline void up_registerdump(void)
for (regs = REG_R0; regs <= REG_R15; regs += 8)
{
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
- lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ llerr("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
- lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
+ llerr("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
}
}
#else
@@ -253,7 +230,7 @@ static void up_dumpstate(void)
ustacksize = (uint32_t)rtcb->adj_stack_size;
}
- lldbg("Current sp: %08x\n", sp);
+ llerr("Current sp: %08x\n", sp);
#if CONFIG_ARCH_INTERRUPTSTACK > 3
/* Get the limits on the interrupt stack memory */
@@ -263,21 +240,21 @@ static void up_dumpstate(void)
/* Show interrupt stack info */
- lldbg("Interrupt stack:\n");
- lldbg(" base: %08x\n", istackbase);
- lldbg(" size: %08x\n", istacksize);
+ llerr("Interrupt stack:\n");
+ llerr(" base: %08x\n", istackbase);
+ llerr(" size: %08x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_intstack());
+ llerr(" used: %08x\n", up_check_intstack());
#endif
#endif
/* Show user stack info */
- lldbg("User stack:\n");
- lldbg(" base: %08x\n", ustackbase);
- lldbg(" size: %08x\n", ustacksize);
+ llerr("User stack:\n");
+ llerr(" base: %08x\n", ustackbase);
+ llerr(" size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_tcbstack(rtcb));
+ llerr(" used: %08x\n", up_check_tcbstack(rtcb));
#endif
#ifdef CONFIG_ARCH_KERNEL_STACK
@@ -287,9 +264,9 @@ static void up_dumpstate(void)
{
kstackbase = (uint32_t)rtcb->xcp.kstack + CONFIG_ARCH_KERNEL_STACKSIZE - 4;
- lldbg("Kernel stack:\n");
- lldbg(" base: %08x\n", kstackbase);
- lldbg(" size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
+ llerr("Kernel stack:\n");
+ llerr(" base: %08x\n", kstackbase);
+ llerr(" size: %08x\n", CONFIG_ARCH_KERNEL_STACKSIZE);
}
#endif
@@ -300,7 +277,7 @@ static void up_dumpstate(void)
{
/* Yes.. dump the interrupt stack */
- lldbg("Interrupt Stack\n", sp);
+ llerr("Interrupt Stack\n", sp);
up_stackdump(sp, istackbase);
/* Extract the user stack pointer which should lie
@@ -308,7 +285,7 @@ static void up_dumpstate(void)
*/
sp = g_intstackbase;
- lldbg("User sp: %08x\n", sp);
+ llerr("User sp: %08x\n", sp);
}
#endif
@@ -318,7 +295,7 @@ static void up_dumpstate(void)
if (sp > ustackbase - ustacksize && sp < ustackbase)
{
- lldbg("User Stack\n", sp);
+ llerr("User Stack\n", sp);
up_stackdump(sp, ustackbase);
}
@@ -329,7 +306,7 @@ static void up_dumpstate(void)
if (sp >= (uint32_t)rtcb->xcp.kstack && sp < kstackbase)
{
- lldbg("Kernel Stack\n", sp);
+ llerr("Kernel Stack\n", sp);
up_stackdump(sp, kstackbase);
}
#endif
@@ -390,16 +367,16 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0
struct tcb_s *rtcb = this_task();
#endif
board_autoled_on(LED_ASSERTION);
-#ifdef CONFIG_PRINT_TASKNAME
- lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+ llerr("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
- lldbg("Assertion failed at file:%s line: %d\n",
+ llerr("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
up_dumpstate();
diff --git a/arch/arm/src/armv7-r/arm_dataabort.c b/arch/arm/src/armv7-r/arm_dataabort.c
index 789fb0f5adae6e62bc6be4e1b919da3f9b56abcc..56cf88d8bc4e93fc3c87f4e8fe8a66a1aee00f10 100644
--- a/arch/arm/src/armv7-r/arm_dataabort.c
+++ b/arch/arm/src/armv7-r/arm_dataabort.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_dataabort.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
@@ -86,7 +75,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
/* Crash -- possibly showing diagnostic debug information. */
- lldbg("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
+ alert("Data abort. PC: %08x DFAR: %08x DFSR: %08x\n",
regs[REG_PC], dfar, dfsr);
PANIC();
return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv7-r/arm_elf.c b/arch/arm/src/armv7-r/arm_elf.c
index 698ecd0084fc3c80ebf5ab99b927d3a810ee4762..0d7b40cd4911dbb48151a826bb477258580ed442 100644
--- a/arch/arm/src/armv7-r/arm_elf.c
+++ b/arch/arm/src/armv7-r/arm_elf.c
@@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
- bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
+ berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
- bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
+ berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
- bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
+ berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -114,7 +114,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
- bdbg("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
+ berr("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
return -ENOEXEC;
}
@@ -174,7 +174,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_CALL:
case R_ARM_JUMP24:
{
- bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
+ binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -187,7 +187,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
- bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
+ berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -203,7 +203,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_ABS32:
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
- bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t *)addr += sym->st_value;
@@ -212,7 +212,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_V4BX:
{
- bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
+ binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t *)addr));
/* Preserve only Rm and the condition code */
@@ -227,7 +227,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_PREL31:
{
- bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
offset = *(uint32_t *)addr + sym->st_value - addr;
@@ -238,7 +238,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
{
- bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
+ binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -258,7 +258,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
- bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
+ berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -268,6 +268,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
- bdbg("RELA relocation not supported\n");
+ berr("RELA relocation not supported\n");
return -ENOSYS;
}
diff --git a/arch/arm/src/armv7-r/arm_l2cc_pl310.c b/arch/arm/src/armv7-r/arm_l2cc_pl310.c
index e019e70e95f2e95d4a1581da09d3f350585c29d1..e389c87e598339b983fdbbee0e3c9d7b64b3b532 100644
--- a/arch/arm/src/armv7-r/arm_l2cc_pl310.c
+++ b/arch/arm/src/armv7-r/arm_l2cc_pl310.c
@@ -411,7 +411,7 @@ void up_l2ccinitialize(void)
putreg32(L2CC_CR_L2CEN, L2CC_CR);
}
- lldbg("(%d ways) * (%d bytes/way) = %d bytes\n",
+ llerr("(%d ways) * (%d bytes/way) = %d bytes\n",
PL310_NWAYS, PL310_WAYSIZE, PL310_CACHE_SIZE);
}
diff --git a/arch/arm/src/armv7-r/arm_prefetchabort.c b/arch/arm/src/armv7-r/arm_prefetchabort.c
index bf16d194676ce28f4402db9c4330a28c73c90c6a..ee9c38be0af2e540dc31424d77d34d4fb8971a66 100644
--- a/arch/arm/src/armv7-r/arm_prefetchabort.c
+++ b/arch/arm/src/armv7-r/arm_prefetchabort.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_prefetchabort.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
@@ -82,7 +71,7 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
/* Crash -- possibly showing diagnostic debug information. */
- lldbg("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
+ alert("Prefetch abort. PC: %08x IFAR: %08x IFSR: %08x\n",
regs[REG_PC], ifar, ifsr);
PANIC();
return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv7-r/arm_releasepending.c b/arch/arm/src/armv7-r/arm_releasepending.c
index 89827085907498d7edaab83db8dd1fab47e3c817..d65bc75be2109f08a81fa7cdeec53c1391e1f0b4 100644
--- a/arch/arm/src/armv7-r/arm_releasepending.c
+++ b/arch/arm/src/armv7-r/arm_releasepending.c
@@ -67,7 +67,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
- slldbg("From TCB=%p\n", rtcb);
+ sllerr("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
diff --git a/arch/arm/src/armv7-r/arm_reprioritizertr.c b/arch/arm/src/armv7-r/arm_reprioritizertr.c
index 4fed13e8f272ca7b43fd90e1e65109e3bc18ae63..192bff007d92d87559c2204dc867866458bd24d1 100644
--- a/arch/arm/src/armv7-r/arm_reprioritizertr.c
+++ b/arch/arm/src/armv7-r/arm_reprioritizertr.c
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
- slldbg("TCB=%p PRI=%d\n", tcb, priority);
+ sllerr("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
diff --git a/arch/arm/src/armv7-r/arm_schedulesigaction.c b/arch/arm/src/armv7-r/arm_schedulesigaction.c
index 692debff2f0590db39b0d6d12d8c716cdf210c9f..3ece5d8acfa19774f3d8ab2e523cdaefecd52a60 100644
--- a/arch/arm/src/armv7-r/arm_schedulesigaction.c
+++ b/arch/arm/src/armv7-r/arm_schedulesigaction.c
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+ serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
- sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
+ serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
diff --git a/arch/arm/src/armv7-r/arm_sigdeliver.c b/arch/arm/src/armv7-r/arm_sigdeliver.c
index f638b35bfd64aec670f86dca54c1a23ebe4ad4c3..1a4f9b966d7629224d193682357d323798e56fe7 100644
--- a/arch/arm/src/armv7-r/arm_sigdeliver.c
+++ b/arch/arm/src/armv7-r/arm_sigdeliver.c
@@ -83,7 +83,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -114,7 +114,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/arm/src/armv7-r/arm_syscall.c b/arch/arm/src/armv7-r/arm_syscall.c
index 3e41a3484344f1dafbbfa8258f892f3986c125b8..28fad77f4e1616eb47de290be0214c8198b8e0e1 100644
--- a/arch/arm/src/armv7-r/arm_syscall.c
+++ b/arch/arm/src/armv7-r/arm_syscall.c
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -66,16 +55,21 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
+
/* Debug ********************************************************************/
#if defined(CONFIG_DEBUG_SYSCALL)
-# define svcdbg(format, ...) lldbg(format, ##__VA_ARGS__)
+# define svcerr(format, ...) llerr(format, ##__VA_ARGS__)
+# define svcwarn(format, ...) llwarn(format, ##__VA_ARGS__)
+# define svcinfo(format, ...) llinfo(format, ##__VA_ARGS__)
#else
-# define svcdbg(x...)
+# define svcerr(x...)
+# define svcwarn(x...)
+# define svcinfo(x...)
#endif
/****************************************************************************
- * Private Data
+ * Private Functions
****************************************************************************/
/****************************************************************************
@@ -177,14 +171,14 @@ uint32_t *arm_syscall(uint32_t *regs)
*/
#if defined(CONFIG_DEBUG_SYSCALL)
- svcdbg("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
- svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
- regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
- regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
- svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
- regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
- regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
- svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
+ svcinfo("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
+ svcinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
+ regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
+ svcinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
+ regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
+ svcinfo("CPSR: %08x\n", regs[REG_CPSR]);
#endif
/* Handle the SVCall according to the command in R0 */
@@ -478,7 +472,7 @@ uint32_t *arm_syscall(uint32_t *regs)
regs[REG_R0] -= CONFIG_SYS_RESERVED;
#else
- svcdbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
+ svcerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
#endif
#ifdef CONFIG_ARCH_KERNEL_STACK
@@ -502,14 +496,14 @@ uint32_t *arm_syscall(uint32_t *regs)
#if defined(CONFIG_DEBUG_SYSCALL)
/* Report what happened */
- svcdbg("SYSCALL Exit: regs: %p\n", regs);
- svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
- regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
- regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
- svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
- regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
- regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
- svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
+ svcinfo("SYSCALL Exit: regs: %p\n", regs);
+ svcinfo(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
+ regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
+ svcinfo(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
+ regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
+ svcinfo("CPSR: %08x\n", regs[REG_CPSR]);
#endif
/* Return the last value of curent_regs. This supports context switches
@@ -524,7 +518,7 @@ uint32_t *arm_syscall(uint32_t *regs)
uint32_t *arm_syscall(uint32_t *regs)
{
- lldbg("SYSCALL from 0x%x\n", regs[REG_PC]);
+ alert("SYSCALL from 0x%x\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC();
}
diff --git a/arch/arm/src/armv7-r/arm_undefinedinsn.c b/arch/arm/src/armv7-r/arm_undefinedinsn.c
index b1db4f88686c6f35d98ef625c8e3a50a1b4af2dc..d23af753018f81401d629a521541ed60201b3b95 100644
--- a/arch/arm/src/armv7-r/arm_undefinedinsn.c
+++ b/arch/arm/src/armv7-r/arm_undefinedinsn.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_undefinedinsn.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -58,18 +47,6 @@
#include "up_internal.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -80,7 +57,7 @@
uint32_t *arm_undefinedinsn(uint32_t *regs)
{
- lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]);
+ alert("Undefined instruction at 0x%x\n", regs[REG_PC]);
CURRENT_REGS = regs;
PANIC();
return regs; /* To keep the compiler happy */
diff --git a/arch/arm/src/armv7-r/mpu.h b/arch/arm/src/armv7-r/mpu.h
index 67aeb2e94a240db6b6f00282643b4590dca98065..7428e9cac20d1ef51554702d7a28669dbad32f70 100644
--- a/arch/arm/src/armv7-r/mpu.h
+++ b/arch/arm/src/armv7-r/mpu.h
@@ -359,9 +359,9 @@ static inline void mpu_set_rgnr(unsigned int rgnr)
static inline void mpu_showtype(void)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
uint32_t regval = mpu_get_mpuir();
- dbg("%s MPU Regions: data=%d instr=%d\n",
+ err("%s MPU Regions: data=%d instr=%d\n",
(regval & MPUIR_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPUIR_DREGION_MASK) >> MPUIR_DREGION_SHIFT,
(regval & MPUIR_IREGION_MASK) >> MPUIR_IREGION_SHIFT);
diff --git a/arch/arm/src/c5471/c5471_ethernet.c b/arch/arm/src/c5471/c5471_ethernet.c
index 5d1ddb686322c6f2fb36a35b26aa9e3590f9278a..38d894e74e501c714447efedd68f1b05512e30a8 100644
--- a/arch/arm/src/c5471/c5471_ethernet.c
+++ b/arch/arm/src/c5471/c5471_ethernet.c
@@ -413,11 +413,11 @@ static void c5471_macassign(struct c5471_driver_s *c5471);
#ifdef CONFIG_C5471_NET_DUMPBUFFER
static inline void c5471_dumpbuffer(const char *msg, const uint8_t *buffer, unsigned int nbytes)
{
- /* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_NET have to be
+ /* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_NET have to be
* defined or the following does nothing.
*/
- nvdbgdumpbuffer(msg, buffer, nbytes);
+ ninfodumpbuffer(msg, buffer, nbytes);
}
#else
# define c5471_dumpbuffer(msg, buffer,nbytes)
@@ -737,22 +737,22 @@ static int c5471_phyinit (void)
phyid = (c5471_mdread(0, MD_PHY_MSB_REG) << 16) | c5471_mdread(0, MD_PHY_LSB_REG);
if (phyid != LU3X31_T64_PHYID)
{
- ndbg("Unrecognized PHY ID: %08x\n", phyid);
+ nerr("Unrecognized PHY ID: %08x\n", phyid);
return ERROR;
}
/* Next, Set desired network rate, 10BaseT, 100BaseT, or auto. */
#ifdef CONFIG_C5471_AUTONEGOTIATION
- ndbg("Setting PHY Transceiver for Autonegotiation\n");
+ nerr("Setting PHY Transceiver for Autonegotiation\n");
c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_AUTONEG);
#endif
#ifdef CONFIG_C5471_BASET100
- ndbg("Setting PHY Transceiver for 100BaseT FullDuplex\n");
+ nerr("Setting PHY Transceiver for 100BaseT FullDuplex\n");
c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_100MBIT_FULLDUP);
#endif
#ifdef CONFIG_C5471_BASET10
- ndbg("Setting PHY Transceiver for 10BaseT FullDuplex\n");
+ nerr("Setting PHY Transceiver for 10BaseT FullDuplex\n");
c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_10MBIT_FULLDUP);
#endif
@@ -802,7 +802,7 @@ static inline void c5471_inctxcpu(struct c5471_driver_s *c5471)
c5471->c_txcpudesc += 2*sizeof(uint32_t);
}
- nvdbg("TX CPU desc: %08x\n", c5471->c_txcpudesc);
+ ninfo("TX CPU desc: %08x\n", c5471->c_txcpudesc);
}
/****************************************************************************
@@ -825,7 +825,7 @@ static inline void c5471_incrxcpu(struct c5471_driver_s *c5471)
c5471->c_rxcpudesc += 2*sizeof(uint32_t);
}
- nvdbg("RX CPU desc: %08x\n", c5471->c_rxcpudesc);
+ ninfo("RX CPU desc: %08x\n", c5471->c_rxcpudesc);
}
/****************************************************************************
@@ -861,7 +861,7 @@ static int c5471_transmit(struct c5471_driver_s *c5471)
bfirstframe = true;
c5471->c_lastdescstart = c5471->c_rxcpudesc;
- nvdbg("Packet size: %d RX CPU desc: %08x\n", nbytes, c5471->c_rxcpudesc);
+ ninfo("Packet size: %d RX CPU desc: %08x\n", nbytes, c5471->c_rxcpudesc);
c5471_dumpbuffer("Transmit packet", dev->d_buf, dev->d_len);
while (nbytes)
@@ -918,7 +918,7 @@ static int c5471_transmit(struct c5471_driver_s *c5471)
putreg32(((getreg32(c5471->c_rxcpudesc) & ~EIM_RXDESC_BYTEMASK) | framelen), c5471->c_rxcpudesc);
nbytes -= framelen;
- nvdbg("Wrote framelen: %d nbytes: %d nshorts: %d\n", framelen, nbytes, nshorts);
+ ninfo("Wrote framelen: %d nbytes: %d nshorts: %d\n", framelen, nbytes, nshorts);
if (0 == nbytes)
{
@@ -1092,43 +1092,43 @@ static void c5471_rxstatus(struct c5471_driver_s *c5471)
if ((rxstatus & EIM_TXDESC_RETRYERROR) != 0)
{
c5471->c_rxretries++;
- nvdbg("c_rxretries: %d\n", c5471->c_rxretries);
+ ninfo("c_rxretries: %d\n", c5471->c_rxretries);
}
if ((rxstatus & EIM_TXDESC_HEARTBEAT) != 0)
{
c5471->c_rxheartbeat++;
- nvdbg("c_rxheartbeat: %d\n", c5471->c_rxheartbeat);
+ ninfo("c_rxheartbeat: %d\n", c5471->c_rxheartbeat);
}
if ((rxstatus & EIM_TXDESC_LCOLLISON) != 0)
{
c5471->c_rxlcollision++;
- nvdbg("c_rxlcollision: %d\n", c5471->c_rxlcollision);
+ ninfo("c_rxlcollision: %d\n", c5471->c_rxlcollision);
}
if ((rxstatus & EIM_TXDESC_COLLISION) != 0)
{
c5471->c_rxcollision++;
- nvdbg("c_rxcollision: %d\n", c5471->c_rxcollision);
+ ninfo("c_rxcollision: %d\n", c5471->c_rxcollision);
}
if ((rxstatus & EIM_TXDESC_CRCERROR) != 0)
{
c5471->c_rxcrc++;
- nvdbg("c_rxcrc: %d\n", c5471->c_rxcrc);
+ ninfo("c_rxcrc: %d\n", c5471->c_rxcrc);
}
if ((rxstatus & EIM_TXDESC_UNDERRUN) != 0)
{
c5471->c_rxunderrun++;
- nvdbg("c_rxunderrun: %d\n", c5471->c_rxunderrun);
+ ninfo("c_rxunderrun: %d\n", c5471->c_rxunderrun);
}
if ((rxstatus & EIM_TXDESC_LOC) != 0)
{
c5471->c_rxloc++;
- nvdbg("c_rxloc: %d\n", c5471->c_rxloc);
+ ninfo("c_rxloc: %d\n", c5471->c_rxloc);
}
}
}
@@ -1166,7 +1166,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
* the EIM for additional packets that might be received later from the network.
*/
- nvdbg("Reading TX CPU desc: %08x\n", c5471->c_txcpudesc);
+ ninfo("Reading TX CPU desc: %08x\n", c5471->c_txcpudesc);
while (bmore)
{
/* Words #0 and #1 of descriptor */
@@ -1196,7 +1196,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
/* Divide by 2 with round up to get the number of 16-bit words. */
nshorts = (framelen + 1) >> 1;
- nvdbg("Reading framelen: %d packetlen: %d nshorts: %d packetmen: %p\n",
+ ninfo("Reading framelen: %d packetlen: %d nshorts: %d packetmen: %p\n",
framelen, packetlen, nshorts, packetmem);
for (i = 0 ; i < nshorts; i++, j++)
@@ -1210,7 +1210,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
}
else
{
- nvdbg("Discarding framelen: %d packetlen\n", framelen, packetlen);
+ ninfo("Discarding framelen: %d packetlen\n", framelen, packetlen);
}
if (getreg32(c5471->c_txcpudesc) & EIM_TXDESC_LIF)
@@ -1253,7 +1253,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
/* Set amount of data in c5471->c_dev.d_len. */
dev->d_len = packetlen;
- nvdbg("Received packet, packetlen: %d type: %02x\n", packetlen, ntohs(BUF->type));
+ ninfo("Received packet, packetlen: %d type: %02x\n", packetlen, ntohs(BUF->type));
c5471_dumpbuffer("Received packet", dev->d_buf, dev->d_len);
#ifdef CONFIG_NET_PKT
@@ -1267,7 +1267,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
/* Handle ARP on input then give the IPv4 packet to the network
* layer
@@ -1310,7 +1310,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
/* Give the IPv6 packet to the network layer */
@@ -1371,7 +1371,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
{
/* Increment the count of dropped packets */
- ndbg("Too big! packetlen: %d\n", packetlen);
+ nerr("Too big! packetlen: %d\n", packetlen);
c5471->c_rxdropped++;
}
#endif
@@ -1432,43 +1432,43 @@ static void c5471_txstatus(struct c5471_driver_s *c5471)
if ((txstatus & EIM_RXDESC_MISS) != 0)
{
c5471->c_txmiss++;
- nvdbg("c_txmiss: %d\n", c5471->c_txmiss);
+ ninfo("c_txmiss: %d\n", c5471->c_txmiss);
}
if ((txstatus & EIM_RXDESC_VLAN) != 0)
{
c5471->c_txvlan++;
- nvdbg("c_txvlan: %d\n", c5471->c_txvlan);
+ ninfo("c_txvlan: %d\n", c5471->c_txvlan);
}
if ((txstatus & EIM_RXDESC_LFRAME) != 0)
{
c5471->c_txlframe++;
- nvdbg("c_txlframe: %d\n", c5471->c_txlframe);
+ ninfo("c_txlframe: %d\n", c5471->c_txlframe);
}
if ((txstatus & EIM_RXDESC_SFRAME) != 0)
{
c5471->c_txsframe++;
- nvdbg("c_txsframe: %d\n", c5471->c_txsframe);
+ ninfo("c_txsframe: %d\n", c5471->c_txsframe);
}
if ((txstatus & EIM_RXDESC_CRCERROR) != 0)
{
c5471->c_txcrc++;
- nvdbg("c_txcrc: %d\n", c5471->c_txcrc);
+ ninfo("c_txcrc: %d\n", c5471->c_txcrc);
}
if ((txstatus & EIM_RXDESC_OVERRUN) != 0)
{
c5471->c_txoverrun++;
- nvdbg("c_txoverrun: %d\n", c5471->c_txoverrun);
+ ninfo("c_txoverrun: %d\n", c5471->c_txoverrun);
}
if ((txstatus & EIM_RXDESC_OVERRUN) != 0)
{
c5471->c_txalign++;
- nvdbg("c_txalign: %d\n", c5471->c_txalign);
+ ninfo("c_txalign: %d\n", c5471->c_txalign);
}
}
}
@@ -1607,7 +1607,7 @@ static void c5471_txtimeout(int argc, uint32_t arg, ...)
#ifdef CONFIG_C5471_NET_STATS
c5471->c_txtimeouts++;
- nvdbg("c_txtimeouts: %d\n", c5471->c_txtimeouts);
+ ninfo("c_txtimeouts: %d\n", c5471->c_txtimeouts);
#endif
/* Then try to restart the hardware */
@@ -1680,7 +1680,7 @@ static int c5471_ifup(struct net_driver_s *dev)
struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private;
volatile uint32_t clearbits;
- ndbg("Bringing up: %d.%d.%d.%d\n",
+ nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
@@ -1742,7 +1742,7 @@ static int c5471_ifdown(struct net_driver_s *dev)
struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private;
irqstate_t flags;
- ndbg("Stopping\n");
+ nerr("Stopping\n");
/* Disable the Ethernet interrupt */
@@ -1798,7 +1798,7 @@ static int c5471_txavail(struct net_driver_s *dev)
struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private;
irqstate_t flags;
- ndbg("Polling\n");
+ nerr("Polling\n");
flags = enter_critical_section();
/* Ignore the notification if the interface is not yet up */
@@ -1951,7 +1951,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* TX ENET 0 */
- ndbg("TX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
+ nerr("TX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
putreg32((desc & 0x0000ffff), ENET0_TDBA); /* 16-bit offset address */
for (i = NUM_DESC_TX-1; i >= 0; i--)
{
@@ -1978,7 +1978,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* RX ENET 0 */
- ndbg("RX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
+ nerr("RX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
putreg32((desc & 0x0000ffff), ENET0_RDBA); /* 16-bit offset address */
for (i = NUM_DESC_RX-1; i >= 0; i--)
{
@@ -2005,7 +2005,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* TX CPU */
- ndbg("TX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
+ nerr("TX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
c5471->c_txcpudesc = desc;
putreg32((desc & 0x0000ffff), EIM_CPU_TXBA); /* 16-bit offset address */
for (i = NUM_DESC_TX-1; i >= 0; i--)
@@ -2035,7 +2035,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* RX CPU */
- ndbg("RX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
+ nerr("RX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
c5471->c_rxcpudesc = desc;
putreg32((desc & 0x0000ffff), EIM_CPU_RXBA); /* 16-bit offset address */
for (i = NUM_DESC_RX-1; i >= 0; i--)
@@ -2063,7 +2063,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
pbuf += sizeof(uint32_t); /* Ether Module's "Buffer Usage Word" */
}
- ndbg("END desc: %08x pbuf: %08x\n", desc, pbuf);
+ nerr("END desc: %08x pbuf: %08x\n", desc, pbuf);
/* Save the descriptor packet size */
@@ -2150,13 +2150,13 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
static void c5471_reset(struct c5471_driver_s *c5471)
{
#if defined(CONFIG_C5471_PHY_LU3X31T_T64)
- ndbg("EIM reset\n");
+ nerr("EIM reset\n");
c5471_eimreset(c5471);
#endif
- ndbg("PHY init\n");
+ nerr("PHY init\n");
c5471_phyinit();
- ndbg("EIM config\n");
+ nerr("EIM config\n");
c5471_eimconfig(c5471);
}
@@ -2178,7 +2178,7 @@ static void c5471_macassign(struct c5471_driver_s *c5471)
uint8_t *mptr = dev->d_mac.ether_addr_octet;
register uint32_t tmp;
- ndbg("MAC: %0x:%0x:%0x:%0x:%0x:%0x\n",
+ nerr("MAC: %0x:%0x:%0x:%0x:%0x:%0x\n",
mptr[0], mptr[1], mptr[2], mptr[3], mptr[4], mptr[5]);
/* Set CPU port MAC address. S/W will only see incoming packets that match
@@ -2241,7 +2241,7 @@ void up_netinitialize(void)
{
/* We could not attach the ISR to the ISR */
- nlldbg("irq_attach() failed\n");
+ nllerr("irq_attach() failed\n");
return;
}
diff --git a/arch/arm/src/c5471/c5471_watchdog.c b/arch/arm/src/c5471/c5471_watchdog.c
index 2143246d6e7597754d6716eb259808b946a17af4..011357fb5ce5f21b441c1f3886c9dd4315316b1e 100644
--- a/arch/arm/src/c5471/c5471_watchdog.c
+++ b/arch/arm/src/c5471/c5471_watchdog.c
@@ -155,7 +155,7 @@ static inline unsigned int wdt_prescaletoptv(unsigned int prescale)
}
}
- dbg("prescale=%d -> ptv=%d\n", prescale, ptv);
+ err("prescale=%d -> ptv=%d\n", prescale, ptv);
return ptv;
}
@@ -173,7 +173,7 @@ static int wdt_setusec(uint32_t usec)
uint32_t divisor = 1;
uint32_t mode;
- dbg("usec=%d\n", usec);
+ err("usec=%d\n", usec);
/* Calculate a value of prescaler and divisor that will be able
* to count to the usec. It may not be exact or the best
@@ -186,7 +186,7 @@ static int wdt_setusec(uint32_t usec)
do
{
divisor = (CLOCK_MHZx2 * usec) / (prescaler * 2);
- dbg("divisor=0x%x prescaler=0x%x\n", divisor, prescaler);
+ err("divisor=0x%x prescaler=0x%x\n", divisor, prescaler);
if (divisor >= 0x10000)
{
@@ -194,7 +194,7 @@ static int wdt_setusec(uint32_t usec)
{
/* This is the max possible ~2.5 seconds. */
- dbg("prescaler=0x%x too big!\n", prescaler);
+ err("prescaler=0x%x too big!\n", prescaler);
return ERROR;
}
@@ -207,19 +207,19 @@ static int wdt_setusec(uint32_t usec)
}
while (divisor >= 0x10000);
- dbg("prescaler=0x%x divisor=0x%x\n", prescaler, divisor);
+ err("prescaler=0x%x divisor=0x%x\n", prescaler, divisor);
mode = wdt_prescaletoptv(prescaler);
mode &= ~C5471_TIMER_AUTORELOAD; /* One shot mode. */
mode |= divisor << 5;
- dbg("mode=0x%x\n", mode);
+ err("mode=0x%x\n", mode);
c5471_wdt_cntl = mode;
/* Now start the watchdog */
c5471_wdt_cntl |= C5471_TIMER_STARTBIT;
- dbg("cntl_timer=0x%x\n", c5471_wdt_cntl);
+ err("cntl_timer=0x%x\n", c5471_wdt_cntl);
return 0;
}
@@ -234,17 +234,17 @@ static int wdt_setusec(uint32_t usec)
static int wdt_interrupt(int irq, void *context)
{
- dbg("expired\n");
+ err("expired\n");
#if defined(CONFIG_SOFTWARE_REBOOT)
# if defined(CONFIG_SOFTWARE_TEST)
- dbg(" Test only\n");
+ err(" Test only\n");
# else
- dbg(" Re-booting\n");
+ err(" Re-booting\n");
# warning "Add logic to reset CPU here"
# endif
#else
- dbg(" No reboot\n");
+ err(" No reboot\n");
#endif
return OK;
}
@@ -259,7 +259,7 @@ static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen)
* not work if the user provides a buffer smaller than 18 bytes.
*/
- dbg("buflen=%d\n", buflen);
+ err("buflen=%d\n", buflen);
if (buflen >= 18)
{
sprintf(buffer, "%08x %08x\n", c5471_wdt_cntl, c5471_wdt_count);
@@ -274,7 +274,7 @@ static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen)
static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen)
{
- dbg("buflen=%d\n", buflen);
+ err("buflen=%d\n", buflen);
if (buflen)
{
/* Reset the timer to the maximum delay */
@@ -292,7 +292,7 @@ static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen)
static int wdt_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{
- dbg("ioctl Call: cmd=0x%x arg=0x%x", cmd, arg);
+ err("ioctl Call: cmd=0x%x arg=0x%x", cmd, arg);
/* Process the IOCTL command (see arch/watchdog.h) */
@@ -315,7 +315,7 @@ static int wdt_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
static int wdt_open(struct file *filep)
{
- dbg("");
+ err("");
if (g_wdtopen)
{
@@ -339,7 +339,7 @@ static int wdt_open(struct file *filep)
static int wdt_close(struct file *filep)
{
- dbg("");
+ err("");
/* The task controlling the watchdog has terminated. Take the timer
* the
@@ -367,7 +367,7 @@ int up_wdtinit(void)
{
int ret;
- dbg("C547x Watchdog Driver\n");
+ err("C547x Watchdog Driver\n");
/* Register as /dev/wdt */
@@ -379,7 +379,7 @@ int up_wdtinit(void)
/* Register for an interrupt level callback through wdt_interrupt */
- dbg("Attach to IRQ=%d\n", C5471_IRQ_WATCHDOG);
+ err("Attach to IRQ=%d\n", C5471_IRQ_WATCHDOG);
/* Make sure that the timer is stopped */
diff --git a/arch/arm/src/calypso/calypso_spi.c b/arch/arm/src/calypso/calypso_spi.c
index e3b063a559d671f504750e3bf711c16c479be0ec..fb5f871dfb706822526eff263b396a40602ecc35 100644
--- a/arch/arm/src/calypso/calypso_spi.c
+++ b/arch/arm/src/calypso/calypso_spi.c
@@ -216,7 +216,7 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
tmp <<= (32-bitlen); /* align to MSB */
}
- dbg("spi_xfer(dev_idx=%u, bitlen=%u, data_out=0x%08x): ",
+ err("spi_xfer(dev_idx=%u, bitlen=%u, data_out=0x%08x): ",
dev_idx, bitlen, tmp);
/* fill transmit registers */
@@ -236,14 +236,14 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
}
putreg16(reg_ctrl, SPI_REG(REG_CTRL));
- dbg("reg_ctrl=0x%04x ", reg_ctrl);
+ err("reg_ctrl=0x%04x ", reg_ctrl);
/* wait until the transfer is complete */
while (1)
{
reg_status = getreg16(SPI_REG(REG_STATUS));
- dbg("status=0x%04x ", reg_status);
+ err("status=0x%04x ", reg_status);
if (din && (reg_status & SPI_STATUS_RE))
{
break;
@@ -262,7 +262,7 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
{
tmp = getreg16(SPI_REG(REG_RX_MSB)) << 16;
tmp |= getreg16(SPI_REG(REG_RX_LSB));
- dbg("data_in=0x%08x ", tmp);
+ err("data_in=0x%08x ", tmp);
if (bitlen <= 8)
{
@@ -278,7 +278,7 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
}
}
- dbg("\n");
+ err("\n");
return 0;
}
diff --git a/arch/arm/src/calypso/calypso_uwire.c b/arch/arm/src/calypso/calypso_uwire.c
index d837a7abdc249ac67c300fcfe566aa575c28f6ac..ee932b29246037e5e11d15a7e7d6c9358c385ac6 100644
--- a/arch/arm/src/calypso/calypso_uwire.c
+++ b/arch/arm/src/calypso/calypso_uwire.c
@@ -112,7 +112,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
/* FIXME uwire_init always selects CS0 for now */
- dbg("uwire_xfer(dev_idx=%u, bitlen=%u\n", cs, bitlen);
+ err("uwire_xfer(dev_idx=%u, bitlen=%u\n", cs, bitlen);
/* select the chip */
@@ -128,7 +128,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
tmp <<= 16 - bitlen; /* align to MSB */
putreg16(tmp, UWIRE_REG(REG_DATA));
- dbg(", data_out=0x%04hx", tmp);
+ err(", data_out=0x%04hx", tmp);
}
tmp = (dout ? UWIRE_CSR_BITS_WR(bitlen) : 0) |
@@ -142,7 +142,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
_uwire_wait(UWIRE_CSR_RDRB, UWIRE_CSR_RDRB);
tmp = getreg16(UWIRE_REG(REG_DATA));
- dbg(", data_in=0x%08x", tmp);
+ err(", data_in=0x%08x", tmp);
if (bitlen <= 8)
*(uint8_t *)din = tmp & 0xff;
@@ -155,7 +155,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
putreg16(UWIRE_CSR_IDX(0) | 0, UWIRE_REG(REG_CSR));
_uwire_wait(UWIRE_CSR_CSRB, 0);
- dbg(")\n");
+ err(")\n");
return 0;
}
diff --git a/arch/arm/src/common/up_createstack.c b/arch/arm/src/common/up_createstack.c
index c3aa9d7adb917d16f1e2c8c2c2e64402bbd8a26d..70d83a83a58ac63a42569869836ba0f42f3f07f3 100644
--- a/arch/arm/src/common/up_createstack.c
+++ b/arch/arm/src/common/up_createstack.c
@@ -205,12 +205,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
}
#endif /* CONFIG_TLS */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Was the allocation successful? */
if (!tcb->stack_alloc_ptr)
{
- sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+ serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
}
#endif
}
diff --git a/arch/arm/src/common/up_exit.c b/arch/arm/src/common/up_exit.c
index 57137a60def127946b8ed5079c442e2433bd85d6..be084481fd91f0b20a54b9fdd558418ddc8b56a1 100644
--- a/arch/arm/src/common/up_exit.c
+++ b/arch/arm/src/common/up_exit.c
@@ -66,7 +66,7 @@
*
****************************************************************************/
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
{
#if CONFIG_NFILE_DESCRIPTORS > 0
@@ -77,8 +77,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
int i;
#endif
- sdbg(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
- sdbg(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+ serr(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+ serr(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
#if CONFIG_NFILE_DESCRIPTORS > 0
filelist = tcb->group->tg_filelist;
@@ -87,7 +87,7 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
struct inode *inode = filelist->fl_files[i].f_inode;
if (inode)
{
- sdbg(" fd=%d refcount=%d\n",
+ serr(" fd=%d refcount=%d\n",
i, inode->i_crefs);
}
}
@@ -101,11 +101,11 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
if (filep->fs_fd >= 0)
{
#if CONFIG_STDIO_BUFFER_SIZE > 0
- sdbg(" fd=%d nbytes=%d\n",
+ serr(" fd=%d nbytes=%d\n",
filep->fs_fd,
filep->fs_bufpos - filep->fs_bufstart);
#else
- sdbg(" fd=%d\n", filep->fs_fd);
+ serr(" fd=%d\n", filep->fs_fd);
#endif
}
}
@@ -138,10 +138,10 @@ void _exit(int status)
(void)up_irq_save();
- slldbg("TCB=%p exiting\n", this_task());
+ sllerr("TCB=%p exiting\n", this_task());
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
- slldbg("Other tasks:\n");
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
+ sllerr("Other tasks:\n");
sched_foreach(_up_dumponexit, NULL);
#endif
diff --git a/arch/arm/src/common/up_initialize.c b/arch/arm/src/common/up_initialize.c
index 511138e4f51640de6328d0d1019d6241ca2c2898..6482a5fce2a78b7591564f1e0019cdb84a632e3d 100644
--- a/arch/arm/src/common/up_initialize.c
+++ b/arch/arm/src/common/up_initialize.c
@@ -72,18 +72,18 @@
*
****************************************************************************/
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
static void up_calibratedelay(void)
{
int i;
- lldbg("Beginning 100s delay\n");
+ llerr("Beginning 100s delay\n");
for (i = 0; i < 100; i++)
{
up_mdelay(1000);
}
- lldbg("End 100s delay\n");
+ llerr("End 100s delay\n");
}
#else
# define up_calibratedelay()
diff --git a/arch/arm/src/common/up_vfork.c b/arch/arm/src/common/up_vfork.c
index b902ccba7b9f93dcbd8e6f22181f472bd97a5f26..e655ab15b43c1648777e5f454ddcf04faec162f5 100644
--- a/arch/arm/src/common/up_vfork.c
+++ b/arch/arm/src/common/up_vfork.c
@@ -130,12 +130,12 @@ pid_t up_vfork(const struct vfork_s *context)
uint32_t stackutil;
int ret;
- svdbg("vfork context [%p]:\n", context);
- svdbg(" r4:%08x r5:%08x r6:%08x r7:%08x\n",
+ sinfo("vfork context [%p]:\n", context);
+ sinfo(" r4:%08x r5:%08x r6:%08x r7:%08x\n",
context->r4, context->r5, context->r6, context->r7);
- svdbg(" r8:%08x r9:%08x r10:%08x\n",
+ sinfo(" r8:%08x r9:%08x r10:%08x\n",
context->r8, context->r9, context->r10);
- svdbg(" fp:%08x sp:%08x lr:%08x\n",
+ sinfo(" fp:%08x sp:%08x lr:%08x\n",
context->fp, context->sp, context->lr);
/* Allocate and initialize a TCB for the child task. */
@@ -143,11 +143,11 @@ pid_t up_vfork(const struct vfork_s *context)
child = task_vforksetup((start_t)(context->lr & ~1));
if (!child)
{
- sdbg("ERROR: task_vforksetup failed\n");
+ serr("ERROR: task_vforksetup failed\n");
return (pid_t)ERROR;
}
- svdbg("TCBs: Parent=%p Child=%p\n", parent, child);
+ sinfo("TCBs: Parent=%p Child=%p\n", parent, child);
/* Get the size of the parent task's stack. Due to alignment operations,
* the adjusted stack size may be smaller than the stack size originally
@@ -162,7 +162,7 @@ pid_t up_vfork(const struct vfork_s *context)
parent->flags & TCB_FLAG_TTYPE_MASK);
if (ret != OK)
{
- sdbg("ERROR: up_create_stack failed: %d\n", ret);
+ serr("ERROR: up_create_stack failed: %d\n", ret);
task_vforkabort(child, -ret);
return (pid_t)ERROR;
}
@@ -176,7 +176,7 @@ pid_t up_vfork(const struct vfork_s *context)
DEBUGASSERT((uint32_t)parent->adj_stack_ptr > context->sp);
stackutil = (uint32_t)parent->adj_stack_ptr - context->sp;
- svdbg("Parent: stacksize:%d stackutil:%d\n", stacksize, stackutil);
+ sinfo("Parent: stacksize:%d stackutil:%d\n", stacksize, stackutil);
/* Make some feeble effort to preserve the stack contents. This is
* feeble because the stack surely contains invalid pointers and other
@@ -201,9 +201,9 @@ pid_t up_vfork(const struct vfork_s *context)
newfp = context->fp;
}
- svdbg("Parent: stack base:%08x SP:%08x FP:%08x\n",
+ sinfo("Parent: stack base:%08x SP:%08x FP:%08x\n",
parent->adj_stack_ptr, context->sp, context->fp);
- svdbg("Child: stack base:%08x SP:%08x FP:%08x\n",
+ sinfo("Child: stack base:%08x SP:%08x FP:%08x\n",
child->cmn.adj_stack_ptr, newsp, newfp);
/* Update the stack pointer, frame pointer, and volatile registers. When
diff --git a/arch/arm/src/dm320/dm320_framebuffer.c b/arch/arm/src/dm320/dm320_framebuffer.c
index 8fd4ec44634f3890f2a9c883ed49a99fa9d48738..ca81e8a8486c3f84510531346c3cab7290bfdc4a 100644
--- a/arch/arm/src/dm320/dm320_framebuffer.c
+++ b/arch/arm/src/dm320/dm320_framebuffer.c
@@ -768,15 +768,15 @@ static void dm320_disable(void)
{
/* Disable all planes */
- gvdbg("Inactivate OSD:\n");
+ ginfo("Inactivate OSD:\n");
putreg16(0, DM320_OSD_OSDWIN0MD); /* Win0 mode = 0 (1:active) */
putreg16(0, DM320_OSD_OSDWIN1MD); /* Win1 mode = 0 (1:active) */
putreg16(0, DM320_OSD_RECTCUR); /* Rectangular cursor mode = 0 (1:active) */
- gvdbg("DM320_OSD_OSDWIN0MD: %04x\n", getreg16(DM320_OSD_OSDWIN0MD));
- gvdbg("DM320_OSD_OSDWIN1MD: %04x\n", getreg16(DM320_OSD_OSDWIN1MD));
- gvdbg("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
+ ginfo("DM320_OSD_OSDWIN0MD: %04x\n", getreg16(DM320_OSD_OSDWIN0MD));
+ ginfo("DM320_OSD_OSDWIN1MD: %04x\n", getreg16(DM320_OSD_OSDWIN1MD));
+ ginfo("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
}
/****************************************************************************
@@ -791,17 +791,17 @@ static void dm320_hwinitialize(void)
/* Initialize the main video to correct the origin */
- gvdbg("Setup main video origin:\n");
+ ginfo("Setup main video origin:\n");
putreg16(CONFIG_DM320_BASEX, DM320_OSD_BASEPX);
putreg16(CONFIG_DM320_BASEY, DM320_OSD_BASEPY);
- gvdbg("DM320_OSD_BASEPX: %04x\n", getreg16(DM320_OSD_BASEPX));
- gvdbg("DM320_OSD_BASEPY: %04x\n", getreg16(DM320_OSD_BASEPY));
+ ginfo("DM320_OSD_BASEPX: %04x\n", getreg16(DM320_OSD_BASEPX));
+ ginfo("DM320_OSD_BASEPY: %04x\n", getreg16(DM320_OSD_BASEPY));
/* Set up the frame buffer address registers */
- gvdbg("Setup framebuffer addresses:\n");
+ ginfo("Setup framebuffer addresses:\n");
putreg16(((dm320_osd1upperoffset() << 8) |
@@ -809,9 +809,9 @@ static void dm320_hwinitialize(void)
putreg16(dm320_osd0loweroffset(), DM320_OSD_OSDWIN0ADL);
putreg16(dm320_osd1loweroffset(), DM320_OSD_OSDWIN1ADL);
- gvdbg("DM320_OSD_OSDWINADH: %04x\n", getreg16(DM320_OSD_OSDWINADH));
- gvdbg("DM320_OSD_OSDWIN0ADL: %04x\n", getreg16(DM320_OSD_OSDWIN0ADL));
- gvdbg("DM320_OSD_OSDWIN1ADL: %04x\n", getreg16(DM320_OSD_OSDWIN1ADL));
+ ginfo("DM320_OSD_OSDWINADH: %04x\n", getreg16(DM320_OSD_OSDWINADH));
+ ginfo("DM320_OSD_OSDWIN0ADL: %04x\n", getreg16(DM320_OSD_OSDWIN0ADL));
+ ginfo("DM320_OSD_OSDWIN1ADL: %04x\n", getreg16(DM320_OSD_OSDWIN1ADL));
/* Set up VID WIN0 */
@@ -820,19 +820,19 @@ static void dm320_hwinitialize(void)
#endif
#ifndef CONFIG_DM320_VID0_DISABLE
- gvdbg("Initialize video win0:\n");
+ ginfo("Initialize video win0:\n");
putreg16(dm320_vid0loweroffset(), DM320_OSD_VIDWIN0ADL);
- gvdbg("DM320_OSD_VIDWINADH: %04x\n", getreg16(DM320_OSD_VIDWINADH));
- gvdbg("DM320_OSD_VIDWIN0ADL: %04x\n", getreg16(DM320_OSD_VIDWIN0ADL));
+ ginfo("DM320_OSD_VIDWINADH: %04x\n", getreg16(DM320_OSD_VIDWINADH));
+ ginfo("DM320_OSD_VIDWIN0ADL: %04x\n", getreg16(DM320_OSD_VIDWIN0ADL));
dm320_blankscreen((uint8_t *)g_vid0base, DM320_VID0_FBLEN);
#ifndef CONFIG_DM320_DISABLE_PINGPONG
putreg16(dm320_vid0ppupperoffset(), DM320_OSD_PPVWIN0ADH);
putreg16(dm320_vid0pploweroffset(), DM320_OSD_PPVWIN0ADL);
- gvdbg("DM320_OSD_PPVWIN0ADH: %04x\n", getreg16(DM320_OSD_PPVWIN0ADH));
- gvdbg("DM320_OSD_PPVWIN0ADL: %04x\n", getreg16(DM320_OSD_PPVWIN0ADL));
+ ginfo("DM320_OSD_PPVWIN0ADH: %04x\n", getreg16(DM320_OSD_PPVWIN0ADH));
+ ginfo("DM320_OSD_PPVWIN0ADL: %04x\n", getreg16(DM320_OSD_PPVWIN0ADL));
dm320_blankscreen((uint8_t *)g_vid0ppbase, DM320_VID0_FBLEN);
#endif
@@ -842,21 +842,21 @@ static void dm320_hwinitialize(void)
putreg16(CONFIG_DM320_VID0_XRES, DM320_OSD_VIDWIN0XL);
putreg16(CONFIG_DM320_VID0_YRES, DM320_OSD_VIDWIN0YL);
- gvdbg("DM320_OSD_VIDWIN0XP: %04x\n", getreg16(DM320_OSD_VIDWIN0XP));
- gvdbg("DM320_OSD_VIDWIN0YP: %04x\n", getreg16(DM320_OSD_VIDWIN0YP));
- gvdbg("DM320_OSD_VIDWIN0OFST: %04x\n", getreg16(DM320_OSD_VIDWIN0OFST));
- gvdbg("DM320_OSD_VIDWIN0XL: %04x\n", getreg16(DM320_OSD_VIDWIN0XL));
- gvdbg("DM320_OSD_VIDWIN0YL: %04x\n", getreg16(DM320_OSD_VIDWIN0YL));
+ ginfo("DM320_OSD_VIDWIN0XP: %04x\n", getreg16(DM320_OSD_VIDWIN0XP));
+ ginfo("DM320_OSD_VIDWIN0YP: %04x\n", getreg16(DM320_OSD_VIDWIN0YP));
+ ginfo("DM320_OSD_VIDWIN0OFST: %04x\n", getreg16(DM320_OSD_VIDWIN0OFST));
+ ginfo("DM320_OSD_VIDWIN0XL: %04x\n", getreg16(DM320_OSD_VIDWIN0XL));
+ ginfo("DM320_OSD_VIDWIN0YL: %04x\n", getreg16(DM320_OSD_VIDWIN0YL));
#endif
/* Set up VID WIN1 */
#ifndef CONFIG_DM320_VID1_DISABLE
- gvdbg("Initialize video win1:\n");
+ ginfo("Initialize video win1:\n");
putreg16(dm320_vid1loweroffset(), DM320_OSD_VIDWIN1ADL);
- gvdbg("DM320_OSD_VIDWINADH: %04x\n", getreg16(DM320_OSD_VIDWINADH));
- gvdbg("DM320_OSD_VIDWIN1ADL: %04x\n", getreg16(DM320_OSD_VIDWIN1ADL));
+ ginfo("DM320_OSD_VIDWINADH: %04x\n", getreg16(DM320_OSD_VIDWINADH));
+ ginfo("DM320_OSD_VIDWIN1ADL: %04x\n", getreg16(DM320_OSD_VIDWIN1ADL));
dm320_blankscreen((uint8_t *)g_vid1base, DM320_VID1_FBLEN);
putreg16(CONFIG_DM320_VID1_XPOS, DM320_OSD_VIDWIN1XP);
@@ -865,20 +865,20 @@ static void dm320_hwinitialize(void)
putreg16(CONFIG_DM320_VID1_XRES, DM320_OSD_VIDWIN1XL);
putreg16(CONFIG_DM320_VID1_YRES, DM320_OSD_VIDWIN1YL);
- gvdbg("DM320_OSD_VIDWIN1XP: %04x\n", getreg16(DM320_OSD_VIDWIN1XP));
- gvdbg("DM320_OSD_VIDWIN1YP: %04x\n", getreg16(DM320_OSD_VIDWIN1YP));
- gvdbg("DM320_OSD_VIDWIN1OFST: %04x\n", getreg16(DM320_OSD_VIDWIN1OFST));
- gvdbg("DM320_OSD_VIDWIN1XL: %04x\n", getreg16(DM320_OSD_VIDWIN1XL));
- gvdbg("DM320_OSD_VIDWIN1YL: %04x\n", getreg16(DM320_OSD_VIDWIN1YL));
+ ginfo("DM320_OSD_VIDWIN1XP: %04x\n", getreg16(DM320_OSD_VIDWIN1XP));
+ ginfo("DM320_OSD_VIDWIN1YP: %04x\n", getreg16(DM320_OSD_VIDWIN1YP));
+ ginfo("DM320_OSD_VIDWIN1OFST: %04x\n", getreg16(DM320_OSD_VIDWIN1OFST));
+ ginfo("DM320_OSD_VIDWIN1XL: %04x\n", getreg16(DM320_OSD_VIDWIN1XL));
+ ginfo("DM320_OSD_VIDWIN1YL: %04x\n", getreg16(DM320_OSD_VIDWIN1YL));
#endif
putreg16(DM320_VIDMODE, DM320_OSD_VIDWINMD);
- gvdbg("DM320_OSD_VIDWINMD: %04x\n", getreg16(DM320_OSD_VIDWINMD));
+ ginfo("DM320_OSD_VIDWINMD: %04x\n", getreg16(DM320_OSD_VIDWINMD));
/* Set up OSD WIN0 */
#ifndef CONFIG_DM320_OSD0_DISABLE
- gvdbg("Initialize OSD win0:\n");
+ ginfo("Initialize OSD win0:\n");
dm320_blankscreen((uint8_t *)g_osd0base, DM320_OSD0_FBLEN);
putreg16(CONFIG_DM320_OSD0_XPOS, DM320_OSD_OSDWIN0XP);
@@ -892,18 +892,18 @@ static void dm320_hwinitialize(void)
putreg16(CONFIG_DM320_OSD0_YRES, DM320_OSD_OSDWIN0YL);
putreg16(INITIAL_OSD0MODE, DM320_OSD_OSDWIN0MD);
- gvdbg("DM320_OSD_OSDWIN0XP: %04x\n", getreg16(DM320_OSD_OSDWIN0XP));
- gvdbg("DM320_OSD_OSDWIN0YP: %04x\n", getreg16(DM320_OSD_OSDWIN0YP));
- gvdbg("DM320_OSD_OSDWIN0OFST: %04x\n", getreg16(DM320_OSD_OSDWIN0OFST));
- gvdbg("DM320_OSD_OSDWIN0XL: %04x\n", getreg16(DM320_OSD_OSDWIN0XL));
- gvdbg("DM320_OSD_OSDWIN0YL: %04x\n", getreg16(DM320_OSD_OSDWIN0YL));
- gvdbg("DM320_OSD_OSDWIN0MD: %04x\n", getreg16(DM320_OSD_OSDWIN0MD));
+ ginfo("DM320_OSD_OSDWIN0XP: %04x\n", getreg16(DM320_OSD_OSDWIN0XP));
+ ginfo("DM320_OSD_OSDWIN0YP: %04x\n", getreg16(DM320_OSD_OSDWIN0YP));
+ ginfo("DM320_OSD_OSDWIN0OFST: %04x\n", getreg16(DM320_OSD_OSDWIN0OFST));
+ ginfo("DM320_OSD_OSDWIN0XL: %04x\n", getreg16(DM320_OSD_OSDWIN0XL));
+ ginfo("DM320_OSD_OSDWIN0YL: %04x\n", getreg16(DM320_OSD_OSDWIN0YL));
+ ginfo("DM320_OSD_OSDWIN0MD: %04x\n", getreg16(DM320_OSD_OSDWIN0MD));
#endif
/* Set up OSD WIN1 */
#ifndef CONFIG_DM320_OSD1_DISABLE
- gvdbg("Initialize OSD win1\n");
+ ginfo("Initialize OSD win1\n");
dm320_blankscreen((uint8_t *)g_osd1base, DM320_OSD1_FBLEN);
putreg16(CONFIG_DM320_OSD1_XPOS, DM320_OSD_OSDWIN1XP);
@@ -917,18 +917,18 @@ static void dm320_hwinitialize(void)
putreg16(CONFIG_DM320_OSD1_YRES, DM320_OSD_OSDWIN1YL);
putreg16(INITIAL_OSD1MODE, DM320_OSD_OSDWIN1MD);
- gvdbg("DM320_OSD_OSDWIN1XP: %04x\n", getreg16(DM320_OSD_OSDWIN1XP));
- gvdbg("DM320_OSD_OSDWIN1YP: %04x\n", getreg16(DM320_OSD_OSDWIN1YP));
- gvdbg("DM320_OSD_OSDWIN1OFST: %04x\n", getreg16(DM320_OSD_OSDWIN1OFST));
- gvdbg("DM320_OSD_OSDWIN1XL: %04x\n", getreg16(DM320_OSD_OSDWIN1XL));
- gvdbg("DM320_OSD_OSDWIN1YL: %04x\n", getreg16(DM320_OSD_OSDWIN1YL));
- gvdbg("DM320_OSD_OSDWIN1MD: %04x\n", getreg16(DM320_OSD_OSDWIN1MD));
+ ginfo("DM320_OSD_OSDWIN1XP: %04x\n", getreg16(DM320_OSD_OSDWIN1XP));
+ ginfo("DM320_OSD_OSDWIN1YP: %04x\n", getreg16(DM320_OSD_OSDWIN1YP));
+ ginfo("DM320_OSD_OSDWIN1OFST: %04x\n", getreg16(DM320_OSD_OSDWIN1OFST));
+ ginfo("DM320_OSD_OSDWIN1XL: %04x\n", getreg16(DM320_OSD_OSDWIN1XL));
+ ginfo("DM320_OSD_OSDWIN1YL: %04x\n", getreg16(DM320_OSD_OSDWIN1YL));
+ ginfo("DM320_OSD_OSDWIN1MD: %04x\n", getreg16(DM320_OSD_OSDWIN1MD));
#endif
/* Set up the rectangular cursor with defaults */
#ifdef CONFIG_FB_HWCURSOR
- gdbg("Initialize rectangular cursor\n");
+ gerr("Initialize rectangular cursor\n");
putreg16(0, DM320_OSD_CURXP);
putreg16(0, DM320_OSD_CURYP);
@@ -946,11 +946,11 @@ static void dm320_hwinitialize(void)
putreg16(DM320_RECTCURSOR_SETUP, DM320_OSD_RECTCUR);
- gvdbg("DM320_OSD_CURXP: %04x\n", getreg16(DM320_OSD_CURXP));
- gvdbg("DM320_OSD_CURYP: %04x\n", getreg16(DM320_OSD_CURYP));
- gvdbg("DM320_OSD_CURXL: %04x\n", getreg16(DM320_OSD_CURXL));
- gvdbg("DM320_OSD_CURYL: %04x\n", getreg16(DM320_OSD_CURYL));
- gvdbg("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
+ ginfo("DM320_OSD_CURXP: %04x\n", getreg16(DM320_OSD_CURXP));
+ ginfo("DM320_OSD_CURYP: %04x\n", getreg16(DM320_OSD_CURYP));
+ ginfo("DM320_OSD_CURXL: %04x\n", getreg16(DM320_OSD_CURXL));
+ ginfo("DM320_OSD_CURYL: %04x\n", getreg16(DM320_OSD_CURYL));
+ ginfo("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
#endif
/* Set main window to the hardware default state. That initial
@@ -969,7 +969,7 @@ static void dm320_hwinitialize(void)
*/
putreg16(CONFIG_DM320_BKGDCLUT, DM320_OSD_OSDMODE);
- gvdbg("DM320_OSD_OSDMODE: %04x\n", getreg16(DM320_OSD_OSDMODE));
+ ginfo("DM320_OSD_OSDMODE: %04x\n", getreg16(DM320_OSD_OSDMODE));
}
/****************************************************************************
@@ -980,7 +980,7 @@ static void dm320_hwinitialize(void)
static int dm320_getvid0videoinfo(FAR struct fb_vtable_s *vtable,
FAR struct fb_videoinfo_s *vinfo)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!vtable || !vinfo)
{
return -EINVAL;
@@ -1003,7 +1003,7 @@ static int dm320_getvid0videoinfo(FAR struct fb_vtable_s *vtable,
static int dm320_getvid0planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
FAR struct fb_planeinfo_s *pinfo)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!vtable || !pinfo)
{
return -EINVAL;
@@ -1027,7 +1027,7 @@ static int dm320_getvid0planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
static int dm320_getvid1videoinfo(FAR struct fb_vtable_s *vtable,
FAR struct fb_videoinfo_s *vinfo)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!vtable || !vinfo)
{
return -EINVAL;
@@ -1050,7 +1050,7 @@ static int dm320_getvid1videoinfo(FAR struct fb_vtable_s *vtable,
static int dm320_getvid1planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
FAR struct fb_planeinfo_s *pinfo)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!vtable || !pinfo)
{
return -EINVAL;
@@ -1074,7 +1074,7 @@ static int dm320_getvid1planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
static int dm320_getosd0videoinfo(FAR struct fb_vtable_s *vtable,
FAR struct fb_videoinfo_s *vinfo)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!vtable || !vinfo)
{
return -EINVAL;
@@ -1101,7 +1101,7 @@ static int dm320_getosd0videoinfo(FAR struct fb_vtable_s *vtable,
static int dm320_getosd0planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
FAR struct fb_planeinfo_s *pinfo)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!vtable || !pinfo)
{
return -EINVAL;
@@ -1125,7 +1125,7 @@ static int dm320_getosd0planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
static int dm320_getosd1videoinfo(FAR struct fb_vtable_s *vtable,
FAR struct fb_videoinfo_s *vinfo)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!vtable || !vinfo)
{
return -EINVAL;
@@ -1152,7 +1152,7 @@ static int dm320_getosd1videoinfo(FAR struct fb_vtable_s *vtable,
static int dm320_getosd1planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
FAR struct fb_planeinfo_s *pinfo)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!vtable || !pinfo)
{
return -EINVAL;
@@ -1196,7 +1196,7 @@ static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *c
int len
int i;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!vtable || !cmap || !cmap->read || !cmap->green || !cmap->blue)
{
return -EINVAL;
@@ -1245,7 +1245,7 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora
{
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!vtable || !attrib)
{
return -EINVAL;
@@ -1265,16 +1265,16 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora
attrib->mxsize.w = MAX_XRES;
attrib->mxsize.h = MAX_YRES;
- gvdbg("DM320_OSD_CURXP: %04x\n", attrib->pos.x);
- gvdbg("DM320_OSD_CURYP: %04x\n", attrib->pos.y);
+ ginfo("DM320_OSD_CURXP: %04x\n", attrib->pos.x);
+ ginfo("DM320_OSD_CURYP: %04x\n", attrib->pos.y);
#ifdef CONFIG_FB_HWCURSORSIZE
- gvdbg("DM320_OSD_CURXL: %04x\n", attrib->size.w);
- gvdbg("DM320_OSD_CURYL: %04x\n", attrib->size.h);
+ ginfo("DM320_OSD_CURXL: %04x\n", attrib->size.w);
+ ginfo("DM320_OSD_CURYL: %04x\n", attrib->size.h);
#else
- gvdbg("DM320_OSD_CURXL: %04x\n", getreg16(DM320_OSD_CURXL));
- gvdbg("DM320_OSD_CURYL: %04x\n", getreg16(DM320_OSD_CURYL));
+ ginfo("DM320_OSD_CURXL: %04x\n", getreg16(DM320_OSD_CURXL));
+ ginfo("DM320_OSD_CURYL: %04x\n", getreg16(DM320_OSD_CURYL));
#endif
- gvdbg("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
+ ginfo("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
}
#endif
@@ -1288,7 +1288,7 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
irqstate_t flags;
uint16_t regval;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!vtable || !settings)
{
return -EINVAL;
@@ -1300,7 +1300,7 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
flags = enter_critical_section();
if ((settings->flags & FB_CUR_SETPOSITION) != 0)
{
- gvdbg("x=%d y=%d\n", settings->pos.x, settings->pos.y);
+ ginfo("x=%d y=%d\n", settings->pos.x, settings->pos.y);
if (settings->pos.x > MAX_YRES)
{
@@ -1319,7 +1319,7 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
#ifdef CONFIG_FB_HWCURSORSIZE
if ((settings->flags & FB_CUR_SETSIZE) != 0)
{
- gvdbg("h=%d w=%d\n", settings->size.h, settings->size.w);
+ ginfo("h=%d w=%d\n", settings->size.h, settings->size.w);
if (settings->size.w > MAX_YRES)
{
@@ -1349,11 +1349,11 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
putreg16(regval, DM320_OSD_RECTCUR);
leave_critical_section(flags);
- gvdbg("DM320_OSD_CURXP: %04x\n", getreg16(DM320_OSD_CURXP));
- gvdbg("DM320_OSD_CURYP: %04x\n", getreg16(DM320_OSD_CURYP));
- gvdbg("DM320_OSD_CURXL: %04x\n", getreg16(DM320_OSD_CURXL));
- gvdbg("DM320_OSD_CURYL: %04x\n", getreg16(DM320_OSD_CURYL));
- gvdbg("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
+ ginfo("DM320_OSD_CURXP: %04x\n", getreg16(DM320_OSD_CURXP));
+ ginfo("DM320_OSD_CURYP: %04x\n", getreg16(DM320_OSD_CURYP));
+ ginfo("DM320_OSD_CURXL: %04x\n", getreg16(DM320_OSD_CURXL));
+ ginfo("DM320_OSD_CURYL: %04x\n", getreg16(DM320_OSD_CURYL));
+ ginfo("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
}
#endif
@@ -1381,17 +1381,17 @@ int up_fbinitialize(int display)
{
int ret;
- gvdbg("Allocating framebuffers\n");
+ ginfo("Allocating framebuffers\n");
ret = dm320_allocvideomemory();
if (ret != 0)
{
- gdbg("Failed to allocate video buffers\n");
+ gerr("Failed to allocate video buffers\n");
return ret;
}
/* Initialize the hardware */
- gvdbg("Initializing hardware\n");
+ ginfo("Initializing hardware\n");
dm320_hwinitialize();
return 0;
}
diff --git a/arch/arm/src/dm320/dm320_usbdev.c b/arch/arm/src/dm320/dm320_usbdev.c
index f0f87b7f584c88cbe5ca18d1eac7ebf1bc4b2102..7f3229b7fc7d6dfed88d74dacc5a3f240773956e 100644
--- a/arch/arm/src/dm320/dm320_usbdev.c
+++ b/arch/arm/src/dm320/dm320_usbdev.c
@@ -268,7 +268,7 @@ struct dm320_epinfo_s
/* Register operations */
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t dm320_getreg8(uint32_t addr);
static uint32_t dm320_getreg16(uint32_t addr);
static uint32_t dm320_getreg32(uint32_t addr);
@@ -422,7 +422,7 @@ static const struct dm320_epinfo_s g_epinfo[DM320_NENDPOINTS] =
*
****************************************************************************/
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint8_t dm320_getreg8(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -443,7 +443,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -460,7 +460,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -472,7 +472,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%02x\n", addr, val);
+ llerr("%08x->%02x\n", addr, val);
return val;
}
#endif
@@ -485,7 +485,7 @@ static uint8_t dm320_getreg8(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t dm320_getreg16(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -506,7 +506,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -523,7 +523,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -535,7 +535,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%04x\n", addr, val);
+ llerr("%08x->%04x\n", addr, val);
return val;
}
#endif
@@ -548,7 +548,7 @@ static uint32_t dm320_getreg16(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t dm320_getreg32(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -569,7 +569,7 @@ static uint32_t dm320_getreg32(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -586,7 +586,7 @@ static uint32_t dm320_getreg32(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -598,7 +598,7 @@ static uint32_t dm320_getreg32(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@@ -611,12 +611,12 @@ static uint32_t dm320_getreg32(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void dm320_putreg8(uint8_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%02x\n", addr, val);
+ llerr("%08x<-%02x\n", addr, val);
/* Write the value */
@@ -632,12 +632,12 @@ static void dm320_putreg8(uint8_t val, uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void dm320_putreg16(uint16_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%04x\n", addr, val);
+ llerr("%08x<-%04x\n", addr, val);
/* Write the value */
@@ -653,12 +653,12 @@ static void dm320_putreg16(uint16_t val, uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DM320_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void dm320_putreg32(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, val);
+ llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@@ -1216,7 +1216,7 @@ static inline void dm320_ep0setup(struct dm320_usbdev_s *priv)
value = GETUINT16(ctrl.value);
len = GETUINT16(ctrl.len);
- ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ctrl.type, ctrl.req, value, index, len);
/* Dispatch any non-standard requests */
@@ -1618,7 +1618,7 @@ static int dm320_ctlrinterrupt(int irq, FAR void *context)
}
else
{
- ullvdbg("Pending data on OUT endpoint\n");
+ ullinfo("Pending data on OUT endpoint\n");
priv->rxpending = 1;
}
}
@@ -1943,7 +1943,7 @@ static int dm320_epdisable(FAR struct usbdev_ep_s *ep)
FAR struct dm320_ep_s *privep = (FAR struct dm320_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
@@ -1974,7 +1974,7 @@ static FAR struct usbdev_req_s *dm320_epallocreq(FAR struct usbdev_ep_s *ep)
{
FAR struct dm320_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
return NULL;
@@ -2005,7 +2005,7 @@ static void dm320_epfreereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
{
FAR struct dm320_req_s *privreq = (FAR struct dm320_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
@@ -2075,7 +2075,7 @@ static int dm320_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
irqstate_t flags;
int ret = OK;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
@@ -2170,7 +2170,7 @@ static int dm320_epcancel(struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
FAR struct dm320_usbdev_s *priv;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
@@ -2293,7 +2293,7 @@ static int dm320_getframe(struct usbdev_s *dev)
usbtrace(TRACE_DEVGETFRAME, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
@@ -2345,7 +2345,7 @@ static int dm320_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
@@ -2417,7 +2417,7 @@ void up_usbinitialize(void)
#ifdef CONFIG_DEBUG_USB
chiprev = dm320_getreg16(DM320_BUSC_REVR);
- ulldbg("DM320 revision : %d.%d\n", chiprev >> 4, chiprev & 0x0f);
+ ullerr("DM320 revision : %d.%d\n", chiprev >> 4, chiprev & 0x0f);
#endif
/* Enable USB clock & GIO clock */
@@ -2544,7 +2544,7 @@ int usbdev_register(FAR struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!driver || (driver->speed != USB_SPEED_FULL) || !driver->ops->bind ||
!driver->ops->unbind || !driver->ops->setup)
{
@@ -2602,7 +2602,7 @@ int usbdev_unregister(FAR struct usbdevclass_driver_s *driver)
{
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (driver != g_usbdev.driver)
{
usbtrace(TRACE_DEVERROR(DM320_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/efm32/Kconfig b/arch/arm/src/efm32/Kconfig
index ad1abfbfa06550a44aeb96d644df6eed23467004..877cca10740d2309d6d0830c87e6d79f490e2eb9 100644
--- a/arch/arm/src/efm32/Kconfig
+++ b/arch/arm/src/efm32/Kconfig
@@ -140,7 +140,7 @@ config EFM32_FLASHPROG
config EFM32_RMU_DEBUG
bool "Reset Management Unit (RMU) DEBUG "
default n
- depends on EFM32_RMU && DEBUG
+ depends on EFM32_RMU && DEBUG_FEATURES
config EFM32_I2C0
bool "I2C0"
diff --git a/arch/arm/src/efm32/efm32_adc.c b/arch/arm/src/efm32/efm32_adc.c
index 53cb731ad6091b64e8682a580d9b2779f81d5bfc..bc652fc59e9a1dd983e2399c2c95296547eb4db8 100644
--- a/arch/arm/src/efm32/efm32_adc.c
+++ b/arch/arm/src/efm32/efm32_adc.c
@@ -716,23 +716,23 @@ endif /* defined(ADC_COUNT) && (ADC_COUNT > 0) */
#ifdef ADC_HAVE_TIMER
static void adc_tim_dumpregs(struct efm32_dev_s *priv, FAR const char *msg)
{
-#if defined(CONFIG_DEBUG_ANALOG) && defined(CONFIG_DEBUG_VERBOSE)
- avdbg("%s:\n", msg);
- avdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
+#if defined(CONFIG_DEBUG_ANALOG) && defined(CONFIG_DEBUG_INFO)
+ ainfo("%s:\n", msg);
+ ainfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
tim_getreg(priv, EFM32_GTIM_CR1_OFFSET),
tim_getreg(priv, EFM32_GTIM_CR2_OFFSET),
tim_getreg(priv, EFM32_GTIM_SMCR_OFFSET),
tim_getreg(priv, EFM32_GTIM_DIER_OFFSET));
- avdbg(" SR: %04x EGR: 0000 CCMR1: %04x CCMR2: %04x\n",
+ ainfo(" SR: %04x EGR: 0000 CCMR1: %04x CCMR2: %04x\n",
tim_getreg(priv, EFM32_GTIM_SR_OFFSET),
tim_getreg(priv, EFM32_GTIM_CCMR1_OFFSET),
tim_getreg(priv, EFM32_GTIM_CCMR2_OFFSET));
- avdbg(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
+ ainfo(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
tim_getreg(priv, EFM32_GTIM_CCER_OFFSET),
tim_getreg(priv, EFM32_GTIM_CNT_OFFSET),
tim_getreg(priv, EFM32_GTIM_PSC_OFFSET),
tim_getreg(priv, EFM32_GTIM_ARR_OFFSET));
- avdbg(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
+ ainfo(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
tim_getreg(priv, EFM32_GTIM_CCR1_OFFSET),
tim_getreg(priv, EFM32_GTIM_CCR2_OFFSET),
tim_getreg(priv, EFM32_GTIM_CCR3_OFFSET),
@@ -740,7 +740,7 @@ static void adc_tim_dumpregs(struct efm32_dev_s *priv, FAR const char *msg)
if (priv->tbase == EFM32_TIM1_BASE || priv->tbase == EFM32_TIM8_BASE)
{
- avdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
+ ainfo(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
tim_getreg(priv, EFM32_ATIM_RCR_OFFSET),
tim_getreg(priv, EFM32_ATIM_BDTR_OFFSET),
tim_getreg(priv, EFM32_ATIM_DCR_OFFSET),
@@ -748,7 +748,7 @@ static void adc_tim_dumpregs(struct efm32_dev_s *priv, FAR const char *msg)
}
else
{
- avdbg(" DCR: %04x DMAR: %04x\n",
+ ainfo(" DCR: %04x DMAR: %04x\n",
tim_getreg(priv, EFM32_GTIM_DCR_OFFSET),
tim_getreg(priv, EFM32_GTIM_DMAR_OFFSET));
}
@@ -775,7 +775,7 @@ static void adc_startconv(struct efm32_dev_s *priv, bool enable)
{
uint32_t regval;
- avdbg("enable: %d\n", enable);
+ ainfo("enable: %d\n", enable);
regval = adc_getreg(priv, EFM32_ADC_CR2_OFFSET);
if (enable)
@@ -864,7 +864,7 @@ static void adc_enable(FAR struct efm32_dev_s *priv, bool enable)
{
uint32_t regval;
- avdbg("enable: %d\n", enable);
+ ainfo("enable: %d\n", enable);
regval = adc_getreg(priv, EFM32_ADC_CR2_OFFSET);
if (enable)
@@ -922,7 +922,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
int ret;
#endif
- avdbg("intf: ADC%d\n", priv->intf);
+ ainfo("intf: ADC%d\n", priv->intf);
flags = enter_critical_section();
/* Enable ADC reset state */
@@ -1040,11 +1040,11 @@ static void adc_reset(FAR struct adc_dev_s *dev)
leave_critical_section(flags);
- avdbg("SR: 0x%08x CR1: 0x%08x CR2: 0x%08x\n",
+ ainfo("SR: 0x%08x CR1: 0x%08x CR2: 0x%08x\n",
adc_getreg(priv, EFM32_ADC_SR_OFFSET),
adc_getreg(priv, EFM32_ADC_CR1_OFFSET),
adc_getreg(priv, EFM32_ADC_CR2_OFFSET));
- avdbg("SQR1: 0x%08x SQR2: 0x%08x SQR3: 0x%08x\n",
+ ainfo("SQR1: 0x%08x SQR2: 0x%08x SQR3: 0x%08x\n",
adc_getreg(priv, EFM32_ADC_SQR1_OFFSET),
adc_getreg(priv, EFM32_ADC_SQR2_OFFSET),
adc_getreg(priv, EFM32_ADC_SQR3_OFFSET));
@@ -1081,7 +1081,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
/* Enable the ADC interrupt */
- avdbg("Enable the ADC interrupt: irq=%d\n", priv->irq);
+ ainfo("Enable the ADC interrupt: irq=%d\n", priv->irq);
up_enable_irq(priv->irq);
}
@@ -1132,7 +1132,7 @@ static void adc_rxint(FAR struct adc_dev_s *dev, bool enable)
FAR struct efm32_dev_s *priv = (FAR struct efm32_dev_s *)dev->ad_priv;
uint32_t regval;
- avdbg("intf: %d enable: %d\n", priv->intf, enable);
+ ainfo("intf: %d enable: %d\n", priv->intf, enable);
regval = adc_getreg(priv, EFM32_ADC_CR1_OFFSET);
if (enable)
@@ -1191,7 +1191,7 @@ static int adc_interrupt(FAR struct adc_dev_s *dev)
adcsr = adc_getreg(priv, EFM32_ADC_SR_OFFSET);
if ((adcsr & ADC_SR_AWD) != 0)
{
- alldbg("WARNING: Analog Watchdog, Value converted out of range!\n");
+ allerr("WARNING: Analog Watchdog, Value converted out of range!\n");
}
/* EOC: End of conversion */
@@ -1271,12 +1271,12 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
FAR struct adc_dev_s *dev;
FAR struct efm32_dev_s *priv;
- avdbg("intf: %d nchannels: %d\n", intf, nchannels);
+ ainfo("intf: %d nchannels: %d\n", intf, nchannels);
#ifdef CONFIG_EFM32_ADC1
if (intf == 1)
{
- avdbg("ADC1 Selected\n");
+ ainfo("ADC1 Selected\n");
dev = &g_adcdev1;
}
else
@@ -1284,7 +1284,7 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
#ifdef CONFIG_EFM32_ADC2
if (intf == 2)
{
- avdbg("ADC2 Selected\n");
+ ainfo("ADC2 Selected\n");
dev = &g_adcdev2;
}
else
@@ -1292,13 +1292,13 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
#ifdef CONFIG_EFM32_ADC3
if (intf == 3)
{
- avdbg("ADC3 Selected\n");
+ ainfo("ADC3 Selected\n");
dev = &g_adcdev3;
}
else
#endif
{
- adbg("No ADC interface defined\n");
+ aerr("No ADC interface defined\n");
return NULL;
}
diff --git a/arch/arm/src/efm32/efm32_clockconfig.c b/arch/arm/src/efm32/efm32_clockconfig.c
index e2f0d3b5df7fc7530b39e467470ce7f587dc56d0..d59740781189b99663b08fa87c1fad7d8cfc4ca8 100644
--- a/arch/arm/src/efm32/efm32_clockconfig.c
+++ b/arch/arm/src/efm32/efm32_clockconfig.c
@@ -450,7 +450,7 @@ static inline uint32_t efm32_hfclk_config(uint32_t hfclksel, uint32_t hfclkdiv)
}
break;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
default:
PANIC();
#endif
diff --git a/arch/arm/src/efm32/efm32_dma.c b/arch/arm/src/efm32/efm32_dma.c
index a96bc160c0de6a072f6d9b4e3227ff576f5eec97..de260de00d21318b8d72f5cac9140fd49a0f237a 100644
--- a/arch/arm/src/efm32/efm32_dma.c
+++ b/arch/arm/src/efm32/efm32_dma.c
@@ -270,7 +270,7 @@ void weak_function up_dmainitialize(void)
uint32_t regval;
int i;
- dmallvdbg("Initialize XDMAC0\n");
+ dmallinfo("Initialize XDMAC0\n");
/* Initialize the channel list */
@@ -416,7 +416,7 @@ void efm32_dmafree(DMA_HANDLE handle)
struct dma_channel_s *dmach = (struct dma_channel_s *)handle;
DEBUGASSERT(dmach != NULL && dmach->inuse);
- dmavdbg("DMA channel %d\n", dmach->chan);
+ dmainfo("DMA channel %d\n", dmach->chan);
/* Disable the channel */
@@ -804,29 +804,29 @@ void efm32_dmadump(DMA_HANDLE handle, const struct efm32_dmaregs_s *regs,
{
struct dma_channel_s *dmach = (struct dma_channel_s *)handle;
- dmadbg("%s\n", msg);
- dmadbg(" DMA Registers:\n");
- dmadbg(" STATUS: %08x\n", regs->status);
- dmadbg(" CTRLBASE: %08x\n", regs->ctrlbase);
- dmadbg(" ALTCTRLBASE: %08x\n", regs->altctrlbase);
- dmadbg(" CHWAITSTATUS: %08x\n", regs->chwaitstatus);
- dmadbg(" CHUSEBURSTS: %08x\n", regs->chusebursts);
- dmadbg(" CHREQMASKS: %08x\n", regs->chreqmasks);
- dmadbg(" CHENS: %08x\n", regs->chens);
- dmadbg(" CHALTS: %08x\n", regs->chalts);
- dmadbg(" CHPRIS: %08x\n", regs->chpris);
- dmadbg(" ERRORC: %08x\n", regs->errorc);
- dmadbg(" CHREQSTATUS: %08x\n", regs->chreqstatus);
- dmadbg(" CHSREQSTATUS: %08x\n", regs->chsreqstatus);
- dmadbg(" IEN: %08x\n", regs->ien);
+ dmaerr("%s\n", msg);
+ dmaerr(" DMA Registers:\n");
+ dmaerr(" STATUS: %08x\n", regs->status);
+ dmaerr(" CTRLBASE: %08x\n", regs->ctrlbase);
+ dmaerr(" ALTCTRLBASE: %08x\n", regs->altctrlbase);
+ dmaerr(" CHWAITSTATUS: %08x\n", regs->chwaitstatus);
+ dmaerr(" CHUSEBURSTS: %08x\n", regs->chusebursts);
+ dmaerr(" CHREQMASKS: %08x\n", regs->chreqmasks);
+ dmaerr(" CHENS: %08x\n", regs->chens);
+ dmaerr(" CHALTS: %08x\n", regs->chalts);
+ dmaerr(" CHPRIS: %08x\n", regs->chpris);
+ dmaerr(" ERRORC: %08x\n", regs->errorc);
+ dmaerr(" CHREQSTATUS: %08x\n", regs->chreqstatus);
+ dmaerr(" CHSREQSTATUS: %08x\n", regs->chsreqstatus);
+ dmaerr(" IEN: %08x\n", regs->ien);
#if defined(CONFIG_EFM32_EFM32GG)
- dmadbg(" CTRL: %08x\n", regs->ctrl);
- dmadbg(" RDS: %08x\n", regs->rds);
- dmadbg(" LOOP0: %08x\n", regs->loop0);
- dmadbg(" LOOP1: %08x\n", regs->loop1);
- dmadbg(" RECT0: %08x\n", regs->rect0);
+ dmaerr(" CTRL: %08x\n", regs->ctrl);
+ dmaerr(" RDS: %08x\n", regs->rds);
+ dmaerr(" LOOP0: %08x\n", regs->loop0);
+ dmaerr(" LOOP1: %08x\n", regs->loop1);
+ dmaerr(" RECT0: %08x\n", regs->rect0);
#endif
- dmadbg(" DMA Channel %d Registers:\n", dmach->chan);
- dmadbg(" CHCTRL: %08x\n", regs->chnctrl);
+ dmaerr(" DMA Channel %d Registers:\n", dmach->chan);
+ dmaerr(" CHCTRL: %08x\n", regs->chnctrl);
}
#endif
diff --git a/arch/arm/src/efm32/efm32_gpio.h b/arch/arm/src/efm32/efm32_gpio.h
index ed54bb5148c80f63ad81b579f1f91840e3933eac..50c239954aa5b038eae0e66ce593ca73116d0cc0 100644
--- a/arch/arm/src/efm32/efm32_gpio.h
+++ b/arch/arm/src/efm32/efm32_gpio.h
@@ -50,7 +50,7 @@
************************************************************************************/
/* Configuration ********************************************************************/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_GPIO
#endif
diff --git a/arch/arm/src/efm32/efm32_i2c.c b/arch/arm/src/efm32/efm32_i2c.c
index 3f4638390e6b5871642d944b870a58353fe9680f..f12118f512545f5590f8ae3ccfa0fda1ab6be60f 100644
--- a/arch/arm/src/efm32/efm32_i2c.c
+++ b/arch/arm/src/efm32/efm32_i2c.c
@@ -134,14 +134,14 @@
/* Debug ****************************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
+/* CONFIG_DEBUG_I2C + CONFIG_DEBUG_FEATURES enables general I2C debug output. */
#ifdef CONFIG_DEBUG_I2C
-# define i2cdbg dbg
-# define i2cvdbg vdbg
+# define i2cerr err
+# define i2cinfo info
#else
-# define i2cdbg(x...)
-# define i2cvdbg(x...)
+# define i2cerr(x...)
+# define i2cinfo(x...)
#endif
/* I2C event trace logic. NOTE: trace uses the internal, non-standard,
@@ -605,7 +605,7 @@ static inline int efm32_i2c_sem_waitdone(FAR struct efm32_i2c_priv_s *priv)
while (priv->result == I2CRESULT_INPROGRESS);
- i2cvdbg("result: %s elapsed: %d threshold: %d i2c_state %s "
+ i2cinfo("result: %s elapsed: %d threshold: %d i2c_state %s "
"I2Cx_STATES: %08x I2Cx_IF: %08x\n",
efm32_i2c_result_str(priv->result), elapsed, timeout,
efm32_i2c_state_str(priv->i2c_state), priv->i2c_reg_state,
@@ -652,7 +652,7 @@ static inline int efm32_i2c_sem_waitdone(FAR struct efm32_i2c_priv_s *priv)
while ((priv->result == I2CRESULT_INPROGRESS) && elapsed < timeout);
- i2cvdbg("result: %s elapsed: %d threshold: %d i2c_state %s "
+ i2cinfo("result: %s elapsed: %d threshold: %d i2c_state %s "
"I2Cx_STATES: %08x I2Cx_IF: %08x\n",
efm32_i2c_result_str(priv->result), elapsed, timeout,
efm32_i2c_state_str(priv->i2c_state), priv->i2c_reg_state,
@@ -761,7 +761,7 @@ static void efm32_i2c_tracenew(FAR struct efm32_i2c_priv_s *priv)
if (priv->tndx >= (CONFIG_I2C_NTRACE - 1))
{
- i2cdbg("Trace table overflow\n");
+ i2cerr("Trace table overflow\n");
return;
}
@@ -1536,7 +1536,7 @@ static int efm32_i2c_transfer(FAR struct i2c_master_s *dev,
{
ret = -ETIMEDOUT;
- i2cdbg("Timed out: I2Cx_STATE: 0x%04x I2Cx_STATUS: 0x%08x\n",
+ i2cerr("Timed out: I2Cx_STATE: 0x%04x I2Cx_STATUS: 0x%08x\n",
efm32_i2c_getreg(priv, EFM32_I2C_STATE_OFFSET),
efm32_i2c_getreg(priv, EFM32_I2C_STATUS_OFFSET));
diff --git a/arch/arm/src/efm32/efm32_idle.c b/arch/arm/src/efm32/efm32_idle.c
index 62d4e6315ba8021e99b4390648d63b2dce98d3b6..5d42299d703f505c28a0deb0e15706489e29fd78 100644
--- a/arch/arm/src/efm32/efm32_idle.c
+++ b/arch/arm/src/efm32/efm32_idle.c
@@ -110,7 +110,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */
- llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+ llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */
diff --git a/arch/arm/src/efm32/efm32_irq.c b/arch/arm/src/efm32/efm32_irq.c
index 821d5cdc76d469b0538df013ede64f8509ddecff..f22d4a44ae52a366c2435989961d30499837ee34 100644
--- a/arch/arm/src/efm32/efm32_irq.c
+++ b/arch/arm/src/efm32/efm32_irq.c
@@ -115,34 +115,34 @@ static void efm32_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" INTCTRL: %08x VECTAB: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
- lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+ llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
- lldbg(" IRQ ENABLE: %08x %08x %08x\n",
+ llerr(" IRQ ENABLE: %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
- lldbg(" SYSH_PRIO: %08x %08x %08x\n",
+ llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 32)
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 48)
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 64)
- lldbg(" %08x\n",
+ llerr(" %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY));
#endif
#endif
@@ -155,7 +155,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: efm32_nmi, efm32_busfault, efm32_usagefault, efm32_pendsv,
- * efm32_dbgmonitor, efm32_pendsv, efm32_reserved
+ * efm32_errmonitor, efm32_pendsv, efm32_reserved
*
* Description:
* Handlers for various exceptions. None are handled and all are fatal
@@ -164,11 +164,11 @@ static void efm32_dumpnvic(const char *msg, int irq)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int efm32_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -176,7 +176,7 @@ static int efm32_nmi(int irq, FAR void *context)
static int efm32_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
+ err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -184,7 +184,7 @@ static int efm32_busfault(int irq, FAR void *context)
static int efm32_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
+ err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -192,15 +192,15 @@ static int efm32_usagefault(int irq, FAR void *context)
static int efm32_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
-static int efm32_dbgmonitor(int irq, FAR void *context)
+static int efm32_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Debug Monitor received\n");
+ err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@@ -208,7 +208,7 @@ static int efm32_dbgmonitor(int irq, FAR void *context)
static int efm32_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -448,7 +448,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(EFM32_IRQ_NMI, efm32_nmi);
#ifndef CONFIG_ARM_MPU
irq_attach(EFM32_IRQ_MEMFAULT, up_memfault);
@@ -456,7 +456,7 @@ void up_irqinitialize(void)
irq_attach(EFM32_IRQ_BUSFAULT, efm32_busfault);
irq_attach(EFM32_IRQ_USAGEFAULT, efm32_usagefault);
irq_attach(EFM32_IRQ_PENDSV, efm32_pendsv);
- irq_attach(EFM32_IRQ_DBGMONITOR, efm32_dbgmonitor);
+ irq_attach(EFM32_IRQ_DBGMONITOR, efm32_errmonitor);
irq_attach(EFM32_IRQ_RESERVED, efm32_reserved);
#endif
diff --git a/arch/arm/src/efm32/efm32_leserial.c b/arch/arm/src/efm32/efm32_leserial.c
index e57af783531a4c39980ec868be90b3534fed7043..63fbd5f8cd95ca04bd6c256be96dadd6bf316b18 100644
--- a/arch/arm/src/efm32/efm32_leserial.c
+++ b/arch/arm/src/efm32/efm32_leserial.c
@@ -119,7 +119,7 @@
#define EFM32_TXERR_INTS (LEUART_IEN_TXOF)
#define EFM32_RXERR_INTS (LEUART_IEN_RXOF | LEUART_IEN_PERR | \
LEUART_IEN_FERR)
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# define EFM32_TX_INTS (LEUART_IEN_TXBL | EFM32_TXERR_INTS)
# define EFM32_RX_INTS (LEUART_IEN_RXDATAV | EFM32_RXERR_INTS)
#else
@@ -506,7 +506,7 @@ static int efm32_interrupt(struct uart_dev_s *dev)
uart_xmitchars(dev);
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Check for receive errors */
if ((intflags & EFM32_RXERR_INTS) != 0)
@@ -518,7 +518,7 @@ static int efm32_interrupt(struct uart_dev_s *dev)
* FERR - Framing Error Interrupt Enable
*/
- lldbg("RX ERROR: %08x\n", intflags);
+ llerr("RX ERROR: %08x\n", intflags);
}
/* Check for transmit errors */
@@ -527,7 +527,7 @@ static int efm32_interrupt(struct uart_dev_s *dev)
{
/* TXOF - TX Overflow Interrupt Enable */
- lldbg("RX ERROR: %08x\n", intflags);
+ llerr("RX ERROR: %08x\n", intflags);
}
#endif
diff --git a/arch/arm/src/efm32/efm32_pwm.c b/arch/arm/src/efm32/efm32_pwm.c
index 04941d44344cae714da23e60e40ac909b4ec1937..815ae7ed96be3a9c66f2a92ab79eba35896fe91c 100644
--- a/arch/arm/src/efm32/efm32_pwm.c
+++ b/arch/arm/src/efm32/efm32_pwm.c
@@ -77,27 +77,27 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing PWM */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_PWM
#endif
#ifdef CONFIG_DEBUG_PWM
-# define pwmdbg dbg
-# define pwmlldbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define pwmvdbg vdbg
-# define pwmllvdbg llvdbg
+# define pwmerr err
+# define pwmllerr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define pwminfo info
+# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) efm32_dumpgpio(p,m)
# else
-# define pwmlldbg(x...)
-# define pwmllvdbg(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
-# define pwmdbg(x...)
-# define pwmlldbg(x...)
-# define pwmvdbg(x...)
-# define pwmllvdbg(x...)
+# define pwmerr(x...)
+# define pwmllerr(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
#endif
@@ -136,7 +136,7 @@ static uint32_t pwm_getreg(struct efm32_pwmtimer_s *priv, int offset);
static void pwm_putreg(struct efm32_pwmtimer_s *priv, int offset,
uint32_t value);
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void pwm_dumpregs(struct efm32_pwmtimer_s *priv, FAR const char *msg);
#else
# define pwm_dumpregs(priv,msg)
@@ -323,29 +323,29 @@ static void pwm_putreg(struct efm32_pwmtimer_s *priv, int offset, uint32_t value
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void pwm_dumpregs(struct efm32_pwmtimer_s *priv, FAR const char *msg)
{
/* TODO debug pwm_dumpregs */
#if 0
- pwmvdbg("%s:\n", msg);
- pwmvdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
+ pwminfo("%s:\n", msg);
+ pwminfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
pwm_getreg(priv, STM32_GTIM_CR1_OFFSET),
pwm_getreg(priv, STM32_GTIM_CR2_OFFSET),
pwm_getreg(priv, STM32_GTIM_SMCR_OFFSET),
pwm_getreg(priv, STM32_GTIM_DIER_OFFSET));
- pwmvdbg(" SR: %04x EGR: %04x CCMR1: %04x CCMR2: %04x\n",
+ pwminfo(" SR: %04x EGR: %04x CCMR1: %04x CCMR2: %04x\n",
pwm_getreg(priv, STM32_GTIM_SR_OFFSET),
pwm_getreg(priv, STM32_GTIM_EGR_OFFSET),
pwm_getreg(priv, STM32_GTIM_CCMR1_OFFSET),
pwm_getreg(priv, STM32_GTIM_CCMR2_OFFSET));
- pwmvdbg(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
+ pwminfo(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
pwm_getreg(priv, STM32_GTIM_CCER_OFFSET),
pwm_getreg(priv, STM32_GTIM_CNT_OFFSET),
pwm_getreg(priv, STM32_GTIM_PSC_OFFSET),
pwm_getreg(priv, STM32_GTIM_ARR_OFFSET));
- pwmvdbg(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
+ pwminfo(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
pwm_getreg(priv, STM32_GTIM_CCR1_OFFSET),
pwm_getreg(priv, STM32_GTIM_CCR2_OFFSET),
pwm_getreg(priv, STM32_GTIM_CCR3_OFFSET),
@@ -353,7 +353,7 @@ static void pwm_dumpregs(struct efm32_pwmtimer_s *priv, FAR const char *msg)
#if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM)
if (priv->timtype == TIMTYPE_ADVANCED)
{
- pwmvdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
+ pwminfo(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
pwm_getreg(priv, STM32_ATIM_RCR_OFFSET),
pwm_getreg(priv, STM32_ATIM_BDTR_OFFSET),
pwm_getreg(priv, STM32_ATIM_DCR_OFFSET),
@@ -362,7 +362,7 @@ static void pwm_dumpregs(struct efm32_pwmtimer_s *priv, FAR const char *msg)
else
#endif
{
- pwmvdbg(" DCR: %04x DMAR: %04x\n",
+ pwminfo(" DCR: %04x DMAR: %04x\n",
pwm_getreg(priv, STM32_GTIM_DCR_OFFSET),
pwm_getreg(priv, STM32_GTIM_DMAR_OFFSET));
}
@@ -396,11 +396,11 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
DEBUGASSERT(priv != NULL && info != NULL);
#ifdef CONFIG_PWM_PULSECOUNT
- pwmvdbg("TIMER%d channel: %d frequency: %d duty: %08x count: %d\n",
+ pwminfo("TIMER%d channel: %d frequency: %d duty: %08x count: %d\n",
priv->timid, priv->channel, info->frequency,
info->duty, info->count);
#else
- pwmvdbg("TIMER%d channel: %d frequency: %d duty: %08x\n",
+ pwminfo("TIMER%d channel: %d frequency: %d duty: %08x\n",
priv->timid, priv->channel, info->frequency, info->duty);
#endif
DEBUGASSERT(info->frequency > 0 && info->duty >= 0 &&
@@ -414,7 +414,7 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
if (efm32_timer_set_freq(priv->base, priv->pclk, info->frequency) < 0)
{
- pwmdbg("Cannot set TIMER frequency %dHz from clock %dHz\n",
+ pwmerr("Cannot set TIMER frequency %dHz from clock %dHz\n",
info->frequency, priv->pclk);
return -EINVAL;
}
@@ -541,7 +541,7 @@ static int pwm_interrupt(struct efm32_pwmtimer_s *priv)
/* Now all of the time critical stuff is done so we can do some debug output */
- pwmllvdbg("Update interrupt SR: %04x prev: %d curr: %d count: %d\n",
+ pwmllinfo("Update interrupt SR: %04x prev: %d curr: %d count: %d\n",
regval, priv->prev, priv->curr, priv->count);
return OK;
@@ -669,7 +669,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
{
FAR struct efm32_pwmtimer_s *priv = (FAR struct efm32_pwmtimer_s *)dev;
- pwmvdbg("TIMER%d pincfg: %08x\n", priv->timid, priv->pincfg);
+ pwminfo("TIMER%d pincfg: %08x\n", priv->timid, priv->pincfg);
pwm_dumpregs(priv, "Initially");
/* Configure the PWM output pin, but do not start the timer yet */
@@ -726,7 +726,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct efm32_pwmtimer_s *priv = (FAR struct efm32_pwmtimer_s *)dev;
uint32_t pincfg;
- pwmvdbg("TIMER%d pincfg: %08x\n", priv->timid, priv->pincfg);
+ pwminfo("TIMER%d pincfg: %08x\n", priv->timid, priv->pincfg);
/* Make sure that the output has been stopped */
@@ -805,7 +805,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
FAR struct efm32_pwmtimer_s *priv = (FAR struct efm32_pwmtimer_s *)dev;
irqstate_t flags;
- pwmvdbg("TIMER%d\n", priv->timid);
+ pwminfo("TIMER%d\n", priv->timid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@@ -848,7 +848,7 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg
/* There are no platform-specific ioctl commands */
- pwmvdbg("TIMER%d\n", priv->timid);
+ pwminfo("TIMER%d\n", priv->timid);
#endif
return -ENOTTY;
}
@@ -878,7 +878,7 @@ FAR struct pwm_lowerhalf_s *efm32_pwminitialize(int timer)
{
FAR struct efm32_pwmtimer_s *lower;
- pwmvdbg("TIMER%d\n", timer);
+ pwminfo("TIMER%d\n", timer);
switch (timer)
{
@@ -933,7 +933,7 @@ FAR struct pwm_lowerhalf_s *efm32_pwminitialize(int timer)
#endif
default:
- pwmdbg("No such timer configured\n");
+ pwmerr("No such timer configured\n");
return NULL;
}
diff --git a/arch/arm/src/efm32/efm32_rmu.c b/arch/arm/src/efm32/efm32_rmu.c
index 6b77564b24d73e5ff3805a804e75bf11bb06edbd..1d30cb2b409c596359594b58ad3b4f909f8dc64d 100644
--- a/arch/arm/src/efm32/efm32_rmu.c
+++ b/arch/arm/src/efm32/efm32_rmu.c
@@ -262,7 +262,7 @@ void efm32_rmu_initialize(void)
}
#ifdef CONFIG_EFM32_RMU_DEBUG
- rmudbg("RMU => reg = 0x%08X\n", g_efm32_rstcause);
+ rmuerr("RMU => reg = 0x%08X\n", g_efm32_rstcause);
for (; ; )
{
const char *str;
@@ -273,7 +273,7 @@ void efm32_rmu_initialize(void)
break;
}
- rmudbg("RMU => %s\n", str);
+ rmuerr("RMU => %s\n", str);
}
#endif
}
diff --git a/arch/arm/src/efm32/efm32_rmu.h b/arch/arm/src/efm32/efm32_rmu.h
index 0aae6fbb0d97b34543af55153e1831a3a72ea1c4..d633c9f73c721f37454b9250be7522d47dd3c1dd 100644
--- a/arch/arm/src/efm32/efm32_rmu.h
+++ b/arch/arm/src/efm32/efm32_rmu.h
@@ -50,21 +50,21 @@
****************************************************************************/
/* Configuration ************************************************************/
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+# undef CONFIG_DEBUG_INFO
# undef CONFIG_EFM32_RMU_DEBUG
#endif
#ifdef CONFIG_EFM32_RMU_DEBUG
-# define rmudbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define rmuvdbg lldbg
+# define rmuerr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define rmuinfo llerr
# else
-# define rmuvdbg(x...)
+# define rmuinfo(x...)
# endif
#else
-# define rmudbg(x...)
-# define rmuvdbg(x...)
+# define rmuerr(x...)
+# define rmuinfo(x...)
#endif
/****************************************************************************
diff --git a/arch/arm/src/efm32/efm32_rtc_burtc.c b/arch/arm/src/efm32/efm32_rtc_burtc.c
index 914ebd03ff3b226f7ac48575f32d17596dcdbb71..779c922e59136dbff6f0d00383634d9efe0d5fe9 100644
--- a/arch/arm/src/efm32/efm32_rtc_burtc.c
+++ b/arch/arm/src/efm32/efm32_rtc_burtc.c
@@ -130,10 +130,10 @@
#define __CNT_CARRY_REG EFM32_BURTC_RET_REG(0)
#define __CNT_ZERO_REG EFM32_BURTC_RET_REG(1)
-#if defined CONFIG_DEBUG && defined CONFIG_RTC_DEBUG
-# define burtcdbg lldbg
+#if defined CONFIG_DEBUG_FEATURES && defined CONFIG_RTC_DEBUG
+# define burtcerr llerr
#else
-# define burtcdbg(x...)
+# define burtcerr(x...)
#endif
/************************************************************************************
@@ -191,7 +191,7 @@ static int efm32_rtc_burtc_interrupt(int irq, void *context)
if (source & BURTC_IF_LFXOFAIL)
{
- burtcdbg("BURTC_IF_LFXOFAIL");
+ burtcerr("BURTC_IF_LFXOFAIL");
}
#ifdef CONFIG_RTC_HIRES
@@ -245,7 +245,7 @@ static void efm32_rtc_burtc_init(void)
regval = g_efm32_rstcause;
regval2 = getreg32(EFM32_BURTC_CTRL);
- burtcdbg("BURTC RESETCAUSE=0x%08X BURTC_CTRL=0x%08X\n", regval, regval2);
+ burtcerr("BURTC RESETCAUSE=0x%08X BURTC_CTRL=0x%08X\n", regval, regval2);
if (!(regval2 & BURTC_CTRL_RSTEN) &&
!(regval & RMU_RSTCAUSE_BUBODREG) &&
@@ -262,11 +262,11 @@ static void efm32_rtc_burtc_init(void)
/* restore saved base time */
- burtcdbg("BURTC OK\n");
+ burtcerr("BURTC OK\n");
return;
}
- burtcdbg("BURTC RESETED\n");
+ burtcerr("BURTC RESETED\n");
/* Disable reset of BackupDomain */
@@ -358,7 +358,7 @@ static uint64_t efm32_get_burtc_tick(void)
val = (uint64_t)cnt_carry*__CNT_TOP + cnt + cnt_zero;
- burtcdbg("Get Tick carry %u zero %u reg %u\n", cnt_carry, cnt_carry,cnt);
+ burtcerr("Get Tick carry %u zero %u reg %u\n", cnt_carry, cnt_carry,cnt);
return val;
}
@@ -449,7 +449,7 @@ int up_rtc_gettime(FAR struct timespec *tp)
tp->tv_sec = val / CONFIG_RTC_FREQUENCY;
tp->tv_nsec = (val % CONFIG_RTC_FREQUENCY)*(NSEC_PER_SEC/CONFIG_RTC_FREQUENCY);
- burtcdbg("Get RTC %u.%09u\n", tp->tv_sec, tp->tv_nsec);
+ burtcerr("Get RTC %u.%09u\n", tp->tv_sec, tp->tv_nsec);
return OK;
}
@@ -499,7 +499,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
cnt_carry = val / __CNT_TOP;
cnt = val % __CNT_TOP;
- burtcdbg("Set RTC %u.%09u carry %u zero %u reg %u\n",
+ burtcerr("Set RTC %u.%09u carry %u zero %u reg %u\n",
tp->tv_sec, tp->tv_nsec, cnt_carry, cnt, cnt_reg);
putreg32(cnt_carry, __CNT_CARRY_REG);
diff --git a/arch/arm/src/efm32/efm32_serial.c b/arch/arm/src/efm32/efm32_serial.c
index fed33adcba28fc10f17177ba5fb58b8ecd775f47..762da175a91a47439deb9118fbcbdde1d812203c 100644
--- a/arch/arm/src/efm32/efm32_serial.c
+++ b/arch/arm/src/efm32/efm32_serial.c
@@ -205,7 +205,7 @@
#define EFM32_TXERR_INTS (USART_IEN_TXOF)
#define EFM32_RXERR_INTS (USART_IEN_RXOF | USART_IEN_RXUF | \
USART_IEN_PERR | USART_IEN_FERR)
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# define EFM32_TX_INTS (USART_IEN_TXBL | EFM32_TXERR_INTS)
# define EFM32_RX_INTS (USART_IEN_RXDATAV | EFM32_RXERR_INTS)
#else
@@ -768,7 +768,7 @@ static int efm32_rxinterrupt(struct uart_dev_s *dev)
uart_recvchars(dev);
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Check for receive errors */
if ((intflags & EFM32_RXERR_INTS) != 0)
@@ -780,7 +780,7 @@ static int efm32_rxinterrupt(struct uart_dev_s *dev)
* FERR - Framing Error Interrupt Enable
*/
- lldbg("RX ERROR: %08x\n", intflags);
+ llerr("RX ERROR: %08x\n", intflags);
}
#endif
@@ -856,14 +856,14 @@ static int efm32_txinterrupt(struct uart_dev_s *dev)
uart_xmitchars(dev);
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Check for transmit errors */
if ((intflags & EFM32_TXERR_INTS) != 0)
{
/* TXOF - TX Overflow Interrupt Enable */
- lldbg("RX ERROR: %08x\n", intflags);
+ llerr("RX ERROR: %08x\n", intflags);
}
#endif
diff --git a/arch/arm/src/efm32/efm32_spi.c b/arch/arm/src/efm32/efm32_spi.c
index 05c0ab7c5197bf77625fd22f03f0889d8f70c4c2..7eafb1a77938b3af8ee320d90b8abfe872033752 100644
--- a/arch/arm/src/efm32/efm32_spi.c
+++ b/arch/arm/src/efm32/efm32_spi.c
@@ -94,21 +94,21 @@
/* Debug ********************************************************************/
/* Check if SPI debug is enabled */
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+# undef CONFIG_DEBUG_INFO
# undef CONFIG_DEBUG_SPI
#endif
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
+# define spierr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define spiinfo llerr
# else
-# define spivdbg(x...)
+# define spiinfo(x...)
# endif
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiinfo(x...)
#endif
/****************************************************************************
@@ -897,7 +897,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
*/
actual = (BOARD_HFPERCLK_FREQUENCY << 7) / (256 + clkdiv);
- spivdbg("frequency=%u actual=%u\n", frequency, actual);
+ spiinfo("frequency=%u actual=%u\n", frequency, actual);
/* Save the frequency selection so that subsequent reconfigurations
* will be faster.
@@ -932,7 +932,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
uint32_t setting;
uint32_t regval;
- spivdbg("mode=%d\n", mode);
+ spiinfo("mode=%d\n", mode);
DEBUGASSERT(priv && priv->config);
config = priv->config;
@@ -998,7 +998,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
uint32_t setting;
bool lsbfirst;
- spivdbg("nbits=%d\n", nbits);
+ spiinfo("nbits=%d\n", nbits);
DEBUGASSERT(priv && priv->config);
config = priv->config;
@@ -1222,7 +1222,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd)
spi_wait_status(config, _USART_STATUS_RXDATAV_MASK, USART_STATUS_RXDATAV);
ret = (uint16_t)spi_getreg(config, EFM32_USART_RXDATA_OFFSET);
- spivdbg("Sent: %04x Return: %04x \n", wd, ret);
+ spiinfo("Sent: %04x Return: %04x \n", wd, ret);
return ret;
}
@@ -1263,7 +1263,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
DEBUGASSERT(priv && priv->config);
config = priv->config;
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
/* Flush any unread data */
@@ -1427,7 +1427,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
else
#endif
{
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n",
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n",
txbuffer, rxbuffer, nwords);
/* Pre-calculate the timeout value */
@@ -1456,7 +1456,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = wd_start(priv->wdog, (int)ticks, spi_dma_timeout, 1, (uint32_t)priv);
if (ret < 0)
{
- spidbg("ERROR: Failed to start timeout\n");
+ spierr("ERROR: Failed to start timeout\n");
}
/* Then wait for each to complete. TX should complete first */
@@ -1492,7 +1492,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
static void spi_sndblock(struct spi_dev_s *dev, const void *txbuffer,
size_t nwords)
{
- spivdbg("txbuffer=%p nwords=%d\n", txbuffer, nwords);
+ spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
return spi_exchange(dev, txbuffer, NULL, nwords);
}
#endif
@@ -1521,7 +1521,7 @@ static void spi_sndblock(struct spi_dev_s *dev, const void *txbuffer,
static void spi_recvblock(struct spi_dev_s *dev, void *rxbuffer,
size_t nwords)
{
- spivdbg("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
+ spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
return spi_exchange(dev, NULL, rxbuffer, nwords);
}
#endif
@@ -1594,7 +1594,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
priv->rxdmach = efm32_dmachannel();
if (!priv->rxdmach)
{
- spidbg("ERROR: Failed to allocate the RX DMA channel for SPI port: %d\n",
+ spierr("ERROR: Failed to allocate the RX DMA channel for SPI port: %d\n",
port);
goto errout;
}
@@ -1602,7 +1602,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
priv->txdmach = efm32_dmachannel();
if (!priv->txdmach)
{
- spidbg("ERROR: Failed to allocate the TX DMA channel for SPI port: %d\n",
+ spierr("ERROR: Failed to allocate the TX DMA channel for SPI port: %d\n",
port);
goto errout_with_rxdmach;
}
@@ -1612,7 +1612,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
priv->wdog = wd_create();
if (!priv->wdog)
{
- spidbg("ERROR: Failed to create a timer for SPI port: %d\n", port);
+ spierr("ERROR: Failed to create a timer for SPI port: %d\n", port);
goto errout_with_txdmach;
}
@@ -1709,7 +1709,7 @@ struct spi_dev_s *efm32_spibus_initialize(int port)
else
#endif
{
- spidbg("ERROR: Unsupported SPI port: %d\n", port);
+ spierr("ERROR: Unsupported SPI port: %d\n", port);
return NULL;
}
@@ -1731,7 +1731,7 @@ struct spi_dev_s *efm32_spibus_initialize(int port)
ret = spi_portinitialize(priv);
if (ret < 0)
{
- spidbg("ERROR: Failed to initialize SPI port %d\n", port);
+ spierr("ERROR: Failed to initialize SPI port %d\n", port);
leave_critical_section(flags);
return NULL;
}
diff --git a/arch/arm/src/efm32/efm32_start.c b/arch/arm/src/efm32/efm32_start.c
index ec0171f2307b17cc93b29c239364aedf98435788..f62e1461d51e9476adf440eae9634365b4e9e90c 100644
--- a/arch/arm/src/efm32/efm32_start.c
+++ b/arch/arm/src/efm32/efm32_start.c
@@ -85,7 +85,7 @@ static void go_os_start(void *pv, unsigned int nbytes)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# if defined(CONFIG_ARMV7M_ITMSYSLOG)
# define showprogress(c) (void)syslog_putc(c)
# elif defined(HAVE_UART_CONSOLE) || defined(HAVE_LEUART_CONSOLE)
diff --git a/arch/arm/src/efm32/efm32_timer.c b/arch/arm/src/efm32/efm32_timer.c
index 19c50b56c20e7dd9de87526934eaf1344ded0de2..a1350a9154f0d76a3b5b4b199afa1bfeb3c156ef 100644
--- a/arch/arm/src/efm32/efm32_timer.c
+++ b/arch/arm/src/efm32/efm32_timer.c
@@ -63,27 +63,27 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing TIMER */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_TIMER
#endif
#ifdef CONFIG_DEBUG_TIMER
-# define efm32_timerdbg dbg
-# define efm32_timerlldbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define efm32_timervdbg vdbg
-# define efm32_timerllvdbg llvdbg
+# define efm32_timererr err
+# define efm32_timerllerr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define efm32_timerinfo info
+# define efm32_timerllinfo llinfo
# define efm32_timer_dumpgpio(p,m) efm32_dumpgpio(p,m)
# else
-# define efm32_timerlldbg(x...)
-# define efm32_timerllvdbg(x...)
+# define efm32_timerllerr(x...)
+# define efm32_timerllinfo(x...)
# define efm32_timer_dumpgpio(p,m)
# endif
#else
-# define efm32_timerdbg(x...)
-# define efm32_timerlldbg(x...)
-# define efm32_timervdbg(x...)
-# define efm32_timerllvdbg(x...)
+# define efm32_timererr(x...)
+# define efm32_timerllerr(x...)
+# define efm32_timerinfo(x...)
+# define efm32_timerllinfo(x...)
# define efm32_timer_dumpgpio(p,m)
#endif
@@ -121,14 +121,14 @@ void efm32_timer_dumpregs(uintptr_t base, FAR const char *msg)
{
int i;
- efm32_timervdbg("%s:\n", msg);
- efm32_timervdbg(" CTRL: %04x STATUS: %04x IEN: %04x IF: %04x\n",
+ efm32_timerinfo("%s:\n", msg);
+ efm32_timerinfo(" CTRL: %04x STATUS: %04x IEN: %04x IF: %04x\n",
getreg32(base + EFM32_TIMER_CTRL_OFFSET ),
getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
getreg32(base + EFM32_TIMER_IEN_OFFSET ),
getreg32(base + EFM32_TIMER_IF_OFFSET )
);
- efm32_timervdbg(" TOP: %04x TOPB: %04x CNT: %04x ROUTE: %04x\n",
+ efm32_timerinfo(" TOP: %04x TOPB: %04x CNT: %04x ROUTE: %04x\n",
getreg32(base + EFM32_TIMER_TOP_OFFSET ),
getreg32(base + EFM32_TIMER_TOPB_OFFSET ),
getreg32(base + EFM32_TIMER_CNT_OFFSET ),
@@ -137,10 +137,10 @@ void efm32_timer_dumpregs(uintptr_t base, FAR const char *msg)
for (i = 0; i < EFM32_TIMER_NCC; i++)
{
-#if defined(CONFIG_DEBUG_TIMER) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_TIMER) && defined(CONFIG_DEBUG_INFO)
uintptr_t base_cc = base + EFM32_TIMER_CC_OFFSET(i);
#endif
- efm32_timervdbg("CC%d => CTRL: %04x CCV: %04x CCVP: %04x CCVB: %04x\n",
+ efm32_timerinfo("CC%d => CTRL: %04x CCV: %04x CCVP: %04x CCVB: %04x\n",
i
getreg32(base_cc + EFM32_TIMER_CC_CTRL_OFFSET ),
getreg32(base_cc + EFM32_TIMER_CC_CCV_OFFSET ),
@@ -149,13 +149,13 @@ void efm32_timer_dumpregs(uintptr_t base, FAR const char *msg)
);
}
- efm32_timervdbg("DTCTRL: %04x DTTIME: %04x DTFC: %04x DTOGEN: %04x\n",
+ efm32_timerinfo("DTCTRL: %04x DTTIME: %04x DTFC: %04x DTOGEN: %04x\n",
getreg32(base + EFM32_TIMER_CTRL_OFFSET ),
getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
getreg32(base + EFM32_TIMER_IEN_OFFSET ),
getreg32(base + EFM32_TIMER_IF_OFFSET )
);
- efm32_timervdbg("DTFAULT: %04x DTFAULTC: %04x DTLOCK: %04x \n",
+ efm32_timerinfo("DTFAULT: %04x DTFAULTC: %04x DTLOCK: %04x \n",
getreg32(base + EFM32_TIMER_CTRL_OFFSET ),
getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
getreg32(base + EFM32_TIMER_IEN_OFFSET ),
@@ -262,7 +262,7 @@ int efm32_timer_set_freq(uintptr_t base, uint32_t clk_freq, uint32_t freq)
reload = (clk_freq / prescaler / freq);
- efm32_timerdbg("Source: %4xHz Div: %4x Reload: %4x \n",
+ efm32_timererr("Source: %4xHz Div: %4x Reload: %4x \n",
clk_freq, prescaler, reload);
putreg32(reload, base + EFM32_TIMER_TOP_OFFSET);
diff --git a/arch/arm/src/efm32/efm32_usbdev.c b/arch/arm/src/efm32/efm32_usbdev.c
index fb20993657f4f926aa58d0d9f1cc6ee91a4dcd18..a6f4c7362c1af605611957624a9a94671aa249ef 100644
--- a/arch/arm/src/efm32/efm32_usbdev.c
+++ b/arch/arm/src/efm32/efm32_usbdev.c
@@ -474,7 +474,7 @@ struct efm32_usbdev_s
/* Register operations ********************************************************/
-#if defined(CONFIG_EFM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_EFM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t efm32_getreg(uint32_t addr);
static void efm32_putreg(uint32_t val, uint32_t addr);
#else
@@ -794,7 +794,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
*
****************************************************************************/
-#if defined(CONFIG_EFM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_EFM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t efm32_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -815,7 +815,7 @@ static uint32_t efm32_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -832,7 +832,7 @@ static uint32_t efm32_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -844,7 +844,7 @@ static uint32_t efm32_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@@ -857,12 +857,12 @@ static uint32_t efm32_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_EFM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_EFM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void efm32_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, val);
+ llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@@ -1220,7 +1220,7 @@ static void efm32_epin_request(FAR struct efm32_usbdev_s *priv,
return;
}
- ullvdbg("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
+ ullinfo("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
privep->epphy, privreq, privreq->req.len,
privreq->req.xfrd, privep->zlp);
@@ -1486,7 +1486,7 @@ static void efm32_epout_complete(FAR struct efm32_usbdev_s *priv,
return;
}
- ullvdbg("EP%d: len=%d xfrd=%d\n",
+ ullinfo("EP%d: len=%d xfrd=%d\n",
privep->epphy, privreq->req.len, privreq->req.xfrd);
/* Return the completed read request to the class driver and mark the state
@@ -1521,7 +1521,7 @@ static inline void efm32_ep0out_receive(FAR struct efm32_ep_s *privep, int bcnt)
DEBUGASSERT(privep && privep->ep.priv);
priv = (FAR struct efm32_usbdev_s *)privep->ep.priv;
- ullvdbg("EP0: bcnt=%d\n", bcnt);
+ ullinfo("EP0: bcnt=%d\n", bcnt);
usbtrace(TRACE_READ(EP0), bcnt);
/* Verify that an OUT SETUP request as received before this data was
@@ -1614,7 +1614,7 @@ static inline void efm32_epout_receive(FAR struct efm32_ep_s *privep, int bcnt)
return;
}
- ullvdbg("EP%d: len=%d xfrd=%d\n", privep->epphy, privreq->req.len, privreq->req.xfrd);
+ ullinfo("EP%d: len=%d xfrd=%d\n", privep->epphy, privreq->req.len, privreq->req.xfrd);
usbtrace(TRACE_READ(privep->epphy), bcnt);
/* Get the number of bytes to transfer from the RxFIFO */
@@ -1698,7 +1698,7 @@ static void efm32_epout_request(FAR struct efm32_usbdev_s *priv,
return;
}
- ullvdbg("EP%d: len=%d\n", privep->epphy, privreq->req.len);
+ ullinfo("EP%d: len=%d\n", privep->epphy, privreq->req.len);
/* Ignore any attempt to receive a zero length packet (this really
* should not happen.
@@ -2494,7 +2494,7 @@ static inline void efm32_ep0out_setup(struct efm32_usbdev_s *priv)
ctrlreq.index = GETUINT16(priv->ctrlreq.index);
ctrlreq.len = GETUINT16(priv->ctrlreq.len);
- ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, ctrlreq.len);
/* Check for a standard request */
@@ -2629,7 +2629,7 @@ static inline void efm32_epout_interrupt(FAR struct efm32_usbdev_s *priv)
if ((daint & 1) != 0)
{
regval = efm32_getreg(EFM32_USB_DOEPINT(epno));
- ulldbg("DOEPINT(%d) = %08x\n", epno, regval);
+ ullerr("DOEPINT(%d) = %08x\n", epno, regval);
efm32_putreg(0xFF, EFM32_USB_DOEPINT(epno));
}
@@ -2859,7 +2859,7 @@ static inline void efm32_epin_interrupt(FAR struct efm32_usbdev_s *priv)
{
if ((daint & 1) != 0)
{
- ulldbg("DIEPINT(%d) = %08x\n",
+ ullerr("DIEPINT(%d) = %08x\n",
epno, efm32_getreg(EFM32_USB_DIEPINT(epno)));
efm32_putreg(0xFF, EFM32_USB_DIEPINT(epno));
}
@@ -3799,7 +3799,7 @@ static int efm32_epout_configure(FAR struct efm32_ep_s *privep, uint8_t eptype,
break;
default:
- udbg("Unsupported maxpacket: %d\n", maxpacket);
+ uerr("Unsupported maxpacket: %d\n", maxpacket);
return -EINVAL;
}
}
@@ -3894,7 +3894,7 @@ static int efm32_epin_configure(FAR struct efm32_ep_s *privep, uint8_t eptype,
break;
default:
- udbg("Unsupported maxpacket: %d\n", maxpacket);
+ uerr("Unsupported maxpacket: %d\n", maxpacket);
return -EINVAL;
}
}
@@ -4184,7 +4184,7 @@ static int efm32_ep_disable(FAR struct usbdev_ep_s *ep)
{
FAR struct efm32_ep_s *privep = (FAR struct efm32_ep_s *)ep;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
@@ -4224,7 +4224,7 @@ static FAR struct usbdev_req_s *efm32_ep_allocreq(FAR struct usbdev_ep_s *ep)
{
FAR struct efm32_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
@@ -4257,7 +4257,7 @@ static void efm32_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
{
FAR struct efm32_req_s *privreq = (FAR struct efm32_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
@@ -4329,11 +4329,11 @@ static int efm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
/* Some sanity checking */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
- ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+ ullinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
@@ -4341,7 +4341,7 @@ static int efm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
usbtrace(TRACE_EPSUBMIT, privep->epphy);
priv = privep->dev;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!priv->driver)
{
usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
@@ -4418,7 +4418,7 @@ static int efm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
FAR struct efm32_ep_s *privep = (FAR struct efm32_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
@@ -4876,7 +4876,7 @@ static int efm32_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
@@ -5482,7 +5482,7 @@ void up_usbinitialize(void)
ret = irq_attach(EFM32_IRQ_USB, efm32_usbinterrupt);
if (ret < 0)
{
- udbg("irq_attach failed\n", ret);
+ uerr("irq_attach failed\n", ret);
goto errout;
}
@@ -5605,7 +5605,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@@ -5676,7 +5676,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (driver != priv->driver)
{
usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/efm32/efm32_usbhost.c b/arch/arm/src/efm32/efm32_usbhost.c
index cc9fe1c7d8d0a3037c98b0b74bfa2e488578ab1b..55786d14e04a24691f2809cbe04318f034811fa0 100644
--- a/arch/arm/src/efm32/efm32_usbhost.c
+++ b/arch/arm/src/efm32/efm32_usbhost.c
@@ -92,9 +92,9 @@
* CONFIG_EFM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever
* want to do that?
* CONFIG_EFM32_USBHOST_REGDEBUG - Enable very low-level register access
- * debug. Depends on CONFIG_DEBUG.
+ * debug. Depends on CONFIG_DEBUG_FEATURES.
* CONFIG_EFM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
- * packets. Depends on CONFIG_DEBUG.
+ * packets. Depends on CONFIG_DEBUG_FEATURES.
*/
/* Default RxFIFO size */
@@ -121,9 +121,9 @@
# define CONFIG_EFM32_OTGFS_DESCSIZE 128
#endif
-/* Register/packet debug depends on CONFIG_DEBUG */
+/* Register/packet debug depends on CONFIG_DEBUG_FEATURES */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_EFM32_USBHOST_REGDEBUG
# undef CONFIG_EFM32_USBHOST_PKTDUMP
#endif
@@ -582,7 +582,7 @@ static const struct efm32_usbhost_trace_s g_trace2[TRACE2_NSTRINGS] =
#ifdef CONFIG_EFM32_USBHOST_REGDEBUG
static void efm32_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
- lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+ llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@@ -632,7 +632,7 @@ static void efm32_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ llerr("[repeats %d more times]\n", count);
}
}
@@ -1362,7 +1362,7 @@ static int efm32_ctrlep_alloc(FAR struct efm32_usbhost_s *priv,
ctrlep = (FAR struct efm32_ctrlinfo_s *)kmm_malloc(sizeof(struct efm32_ctrlinfo_s));
if (ctrlep == NULL)
{
- udbg("ERROR: Failed to allocate control endpoint container\n");
+ uerr("ERROR: Failed to allocate control endpoint container\n");
return -ENOMEM;
}
@@ -1372,7 +1372,7 @@ static int efm32_ctrlep_alloc(FAR struct efm32_usbhost_s *priv,
hport->funcaddr, hport->speed, ctrlep);
if (ret < 0)
{
- udbg("ERROR: efm32_ctrlchan_alloc failed: %d\n", ret);
+ uerr("ERROR: efm32_ctrlchan_alloc failed: %d\n", ret);
kmm_free(ctrlep);
return ret;
}
@@ -1424,7 +1424,7 @@ static int efm32_xfrep_alloc(FAR struct efm32_usbhost_s *priv,
chidx = efm32_chan_alloc(priv);
if (chidx < 0)
{
- udbg("ERROR: Failed to allocate a host channel\n");
+ uerr("ERROR: Failed to allocate a host channel\n");
return -ENOMEM;
}
@@ -1934,7 +1934,7 @@ static ssize_t efm32_in_transfer(FAR struct efm32_usbhost_s *priv, int chidx,
ret = efm32_in_setup(priv, chidx);
if (ret < 0)
{
- udbg("ERROR: efm32_in_setup failed: %d\n", ret);
+ uerr("ERROR: efm32_in_setup failed: %d\n", ret);
return (ssize_t)ret;
}
@@ -1965,7 +1965,7 @@ static ssize_t efm32_in_transfer(FAR struct efm32_usbhost_s *priv, int chidx,
{
/* Break out and return the error */
- udbg("ERROR: efm32_chan_wait failed: %d\n", ret);
+ uerr("ERROR: efm32_chan_wait failed: %d\n", ret);
return (ssize_t)ret;
}
}
@@ -2010,13 +2010,13 @@ static void efm32_in_next(FAR struct efm32_usbhost_s *priv,
return;
}
- udbg("ERROR: efm32_in_setup failed: %d\n", ret);
+ uerr("ERROR: efm32_in_setup failed: %d\n", ret);
result = ret;
}
/* The transfer is complete, with or without an error */
- uvdbg("Transfer complete: %d\n", result);
+ uinfo("Transfer complete: %d\n", result);
/* Extract the callback information */
@@ -2068,7 +2068,7 @@ static int efm32_in_asynch(FAR struct efm32_usbhost_s *priv, int chidx,
ret = efm32_chan_asynchsetup(priv, chan, callback, arg);
if (ret < 0)
{
- udbg("ERROR: efm32_chan_asynchsetup failed: %d\n", ret);
+ uerr("ERROR: efm32_chan_asynchsetup failed: %d\n", ret);
return ret;
}
@@ -2077,7 +2077,7 @@ static int efm32_in_asynch(FAR struct efm32_usbhost_s *priv, int chidx,
ret = efm32_in_setup(priv, chidx);
if (ret < 0)
{
- udbg("ERROR: efm32_in_setup failed: %d\n", ret);
+ uerr("ERROR: efm32_in_setup failed: %d\n", ret);
}
/* And return with the transfer pending */
@@ -2203,7 +2203,7 @@ static ssize_t efm32_out_transfer(FAR struct efm32_usbhost_s *priv, int chidx,
ret = efm32_out_setup(priv, chidx);
if (ret < 0)
{
- udbg("ERROR: efm32_out_setup failed: %d\n", ret);
+ uerr("ERROR: efm32_out_setup failed: %d\n", ret);
return (ssize_t)ret;
}
@@ -2231,7 +2231,7 @@ static ssize_t efm32_out_transfer(FAR struct efm32_usbhost_s *priv, int chidx,
{
/* Break out and return the error */
- udbg("ERROR: efm32_chan_wait failed: %d\n", ret);
+ uerr("ERROR: efm32_chan_wait failed: %d\n", ret);
return (ssize_t)ret;
}
@@ -2296,13 +2296,13 @@ static void efm32_out_next(FAR struct efm32_usbhost_s *priv,
return;
}
- udbg("ERROR: efm32_out_setup failed: %d\n", ret);
+ uerr("ERROR: efm32_out_setup failed: %d\n", ret);
result = ret;
}
/* The transfer is complete, with or without an error */
- uvdbg("Transfer complete: %d\n", result);
+ uinfo("Transfer complete: %d\n", result);
/* Extract the callback information */
@@ -2354,7 +2354,7 @@ static int efm32_out_asynch(FAR struct efm32_usbhost_s *priv, int chidx,
ret = efm32_chan_asynchsetup(priv, chan, callback, arg);
if (ret < 0)
{
- udbg("ERROR: efm32_chan_asynchsetup failed: %d\n", ret);
+ uerr("ERROR: efm32_chan_asynchsetup failed: %d\n", ret);
return ret;
}
@@ -2363,7 +2363,7 @@ static int efm32_out_asynch(FAR struct efm32_usbhost_s *priv, int chidx,
ret = efm32_out_setup(priv, chidx);
if (ret < 0)
{
- udbg("ERROR: efm32_out_setup failed: %d\n", ret);
+ uerr("ERROR: efm32_out_setup failed: %d\n", ret);
}
/* And return with the transfer pending */
@@ -2448,7 +2448,7 @@ static inline void efm32_gint_hcinisr(FAR struct efm32_usbhost_s *priv,
/* AND the two to get the set of enabled, pending HC interrupts */
pending &= regval;
- ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+ ullinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
/* Check for a pending ACK response received/transmitted (ACK) interrupt */
@@ -2709,7 +2709,7 @@ static inline void efm32_gint_hcoutisr(FAR struct efm32_usbhost_s *priv,
/* AND the two to get the set of enabled, pending HC interrupts */
pending &= regval;
- ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+ ullinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
/* Check for a pending ACK response received/transmitted (ACK) interrupt */
@@ -3012,7 +3012,7 @@ static inline void efm32_gint_rxflvlisr(FAR struct efm32_usbhost_s *priv)
/* Read and pop the next status from the Rx FIFO */
grxsts = efm32_getreg(EFM32_USB_GRXSTSP);
- ullvdbg("GRXSTS: %08x\n", grxsts);
+ ullinfo("GRXSTS: %08x\n", grxsts);
/* Isolate the channel number/index in the status word */
@@ -3166,7 +3166,7 @@ static inline void efm32_gint_nptxfeisr(FAR struct efm32_usbhost_s *priv)
/* Write the next group of packets into the Tx FIFO */
- ullvdbg("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+ ullinfo("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
efm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
@@ -3254,7 +3254,7 @@ static inline void efm32_gint_ptxfeisr(FAR struct efm32_usbhost_s *priv)
/* Write the next group of packets into the Tx FIFO */
- ullvdbg("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+ ullinfo("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
efm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
@@ -3827,7 +3827,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
- uvdbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
+ uinfo("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
}
@@ -3844,7 +3844,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
- uvdbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
+ uinfo("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
}
#endif
@@ -3932,7 +3932,7 @@ static int efm32_rh_enumerate(FAR struct efm32_usbhost_s *priv,
ret = efm32_ctrlchan_alloc(priv, 0, 0, priv->rhport.hport.speed, &priv->ep0);
if (ret < 0)
{
- udbg("ERROR: Failed to allocate a control endpoint: %d\n", ret);
+ uerr("ERROR: Failed to allocate a control endpoint: %d\n", ret);
}
return ret;
@@ -3964,7 +3964,7 @@ static int efm32_enumerate(FAR struct usbhost_connection_s *conn,
/* Then let the common usbhost_enumerate do the real enumeration. */
- uvdbg("Enumerate the device\n");
+ uinfo("Enumerate the device\n");
priv->smstate = SMSTATE_ENUM;
ret = usbhost_enumerate(hport, &hport->devclass);
@@ -3978,7 +3978,7 @@ static int efm32_enumerate(FAR struct usbhost_connection_s *conn,
{
/* Return to the disconnected state */
- udbg("ERROR: Enumeration failed: %d\n", ret);
+ uerr("ERROR: Enumeration failed: %d\n", ret);
efm32_gint_disconnected(priv);
}
@@ -4380,7 +4380,7 @@ static int efm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
usbhost_vtrace2(USBHOST_VTRACE2_CTRLIN, req->type, req->req);
- uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+ uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
req->type, req->req, req->value[1], req->value[0],
req->index[1], req->index[0], req->len[1], req->len[0]);
@@ -4465,7 +4465,7 @@ static int efm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
usbhost_vtrace2(USBHOST_VTRACE2_CTRLOUT, req->type, req->req);
- uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+ uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
req->type, req->req, req->value[1], req->value[0],
req->index[1], req->index[0], req->len[1], req->len[0]);
@@ -4583,7 +4583,7 @@ static ssize_t efm32_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep
unsigned int chidx = (unsigned int)ep;
ssize_t nbytes;
- uvdbg("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
+ uinfo("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
DEBUGASSERT(priv && buffer && chidx < EFM32_MAX_TX_FIFOS && buflen > 0);
@@ -4650,7 +4650,7 @@ static int efm32_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
unsigned int chidx = (unsigned int)ep;
int ret;
- uvdbg("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
+ uinfo("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
DEBUGASSERT(priv && buffer && chidx < EFM32_MAX_TX_FIFOS && buflen > 0);
@@ -4700,7 +4700,7 @@ static int efm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
unsigned int chidx = (unsigned int)ep;
irqstate_t flags;
- uvdbg("chidx: %u: %d\n", chidx);
+ uinfo("chidx: %u: %d\n", chidx);
DEBUGASSERT(priv && chidx < EFM32_MAX_TX_FIFOS);
chan = &priv->chan[chidx];
@@ -4795,7 +4795,7 @@ static int efm32_connect(FAR struct usbhost_driver_s *drvr,
/* Set the connected/disconnected flag */
hport->connected = connected;
- ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+ ullinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
/* Report the connection event */
diff --git a/arch/arm/src/imx6/imx_lowputc.c b/arch/arm/src/imx6/imx_lowputc.c
index a6387e732168c2b2bda1cb45c3b4ab04fb0077a0..8bfabf7085641fb359bfd3555ebe96265224df57 100644
--- a/arch/arm/src/imx6/imx_lowputc.c
+++ b/arch/arm/src/imx6/imx_lowputc.c
@@ -584,7 +584,7 @@ int imx_uart_configure(uint32_t base, FAR const struct uart_config_s *config)
*
************************************************************************************/
-#if defined(IMX_HAVE_UART) && defined(CONFIG_DEBUG)
+#if defined(IMX_HAVE_UART) && defined(CONFIG_DEBUG_FEATURES)
void imx_lowputc(int ch)
{
/* Poll the TX fifo trigger level bit of the UART status register. When the TXFE
diff --git a/arch/arm/src/imx6/imx_lowputc.h b/arch/arm/src/imx6/imx_lowputc.h
index d487931dc63362a429f80b953a7255e818a04312..081f366ea7cb6e7ed1265001fedc0ff6800bffdb 100644
--- a/arch/arm/src/imx6/imx_lowputc.h
+++ b/arch/arm/src/imx6/imx_lowputc.h
@@ -105,7 +105,7 @@ int imx_uart_configure(uint32_t base, FAR const struct uart_config_s *config);
*
************************************************************************************/
-#if defined(IMX_HAVE_UART) && defined(CONFIG_DEBUG)
+#if defined(IMX_HAVE_UART) && defined(CONFIG_DEBUG_FEATURES)
void imx_lowputc(int ch);
#else
# define imx_lowputc(ch)
diff --git a/arch/arm/src/kinetis/Kconfig b/arch/arm/src/kinetis/Kconfig
index fdf54e1941c65fe4445f3d303201eba7b1f58ea2..5710c2d32ce6c7e4067fcc53e430f3aa734dde0b 100644
--- a/arch/arm/src/kinetis/Kconfig
+++ b/arch/arm/src/kinetis/Kconfig
@@ -383,6 +383,69 @@ config KINETIS_PIT
endmenu
+config KINETIS_FTM0_PWM
+ bool "FTM0 PWM"
+ default n
+ depends on KINETIS_FTM0
+ ---help---
+ Reserve timer 0 for use by PWM
+
+ Timer devices may be used for different purposes. One special purpose is
+ to generate modulated outputs for such things as motor control. If KINETIS_FTM0
+ is defined then THIS following may also be defined to indicate that
+ the timer is intended to be used for pulsed output modulation.
+
+config KINETIS_FTM0_CHANNEL
+ int "FTM0 PWM Output Channel"
+ default 0
+ range 0 7
+ depends on KINETIS_FTM0_PWM
+ ---help---
+ If FTM0 is enabled for PWM usage, you also need specifies the timer output
+ channel {0,..,7}
+
+config KINETIS_FTM1_PWM
+ bool "FTM1 PWM"
+ default n
+ depends on KINETIS_FTM1
+ ---help---
+ Reserve timer 1 for use by PWM
+
+ Timer devices may be used for different purposes. One special purpose is
+ to generate modulated outputs for such things as motor control. If KINETIS_FTM1
+ is defined then THIS following may also be defined to indicate that
+ the timer is intended to be used for pulsed output modulation.
+
+config KINETIS_FTM1_CHANNEL
+ int "FTM1 PWM Output Channel"
+ default 0
+ range 0 1
+ depends on KINETIS_FTM1_PWM
+ ---help---
+ If FTM1 is enabled for PWM usage, you also need specifies the timer output
+ channel {0,..,1}
+
+config KINETIS_FTM2_PWM
+ bool "FTM2 PWM"
+ default n
+ depends on KINETIS_FTM2
+ ---help---
+ Reserve timer 2 for use by PWM
+
+ Timer devices may be used for different purposes. One special purpose is
+ to generate modulated outputs for such things as motor control. If KINETIS_FTM2
+ is defined then THIS following may also be defined to indicate that
+ the timer is intended to be used for pulsed output modulation.
+
+config KINETIS_FTM2_CHANNEL
+ int "FTM2 PWM Output Channel"
+ default 0
+ range 0 1
+ depends on KINETIS_FTM2_PWM
+ ---help---
+ If FTM2 is enabled for PWM usage, you also need specifies the timer output
+ channel {0,..,1}
+
comment "Kinetis GPIO Interrupt Configuration"
config GPIO_IRQ
diff --git a/arch/arm/src/kinetis/Make.defs b/arch/arm/src/kinetis/Make.defs
index c9c5ec6ca802c979bb4f056e4a6ff9b8e95ff2fd..ed4311a721849931977d60bf2c6cf090c00c21a2 100644
--- a/arch/arm/src/kinetis/Make.defs
+++ b/arch/arm/src/kinetis/Make.defs
@@ -108,7 +108,7 @@ CHIP_CSRCS += kinetis_pinirq.c
endif
ifeq ($(CONFIG_DEBUG_GPIO),y)
-CHIP_CSRCS += kinetis_pindbg.c
+CHIP_CSRCS += kinetis_pindump.c
endif
ifeq ($(CONFIG_KINETIS_SDHC),y)
@@ -127,6 +127,10 @@ ifeq ($(CONFIG_KINETIS_DMA),y)
CHIP_CSRCS += kinetis_dma.c kinetis_pindma.c
endif
+ifeq ($(CONFIG_PWM),y)
+CHIP_CSRCS += kinetis_pwm.c
+endif
+
ifeq ($(CONFIG_NET),y)
ifeq ($(CONFIG_KINETIS_ENET),y)
CHIP_CSRCS += kinetis_enet.c
diff --git a/arch/arm/src/kinetis/kinetis.h b/arch/arm/src/kinetis/kinetis.h
index b0c016d22a1dfea6f7077175d8a2b03f0e8c08e6..325b88d6971ea94fed412dffd6400eb8ddf8d996 100644
--- a/arch/arm/src/kinetis/kinetis.h
+++ b/arch/arm/src/kinetis/kinetis.h
@@ -567,7 +567,7 @@ void kinetis_pindmadisable(uint32_t pinset);
************************************************************************************/
#ifdef CONFIG_DEBUG_GPIO
-int kinetis_pindump(uint32_t pinset, const char *msg);
+void kinetis_pindump(uint32_t pinset, const char *msg);
#else
# define kinetis_pindump(p,m)
#endif
diff --git a/arch/arm/src/kinetis/kinetis_enet.c b/arch/arm/src/kinetis/kinetis_enet.c
index 0a05346055eec8c3f56a74d4437aa2baf93d0aa6..b8e0ed627eb5d208067fc3aa9f36248b749418fe 100644
--- a/arch/arm/src/kinetis/kinetis_enet.c
+++ b/arch/arm/src/kinetis/kinetis_enet.c
@@ -557,7 +557,7 @@ static void kinetis_receive(FAR struct kinetis_driver_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
NETDEV_RXIPV4(&priv->dev);
/* Handle ARP on input then give the IPv4 packet to the network
@@ -598,7 +598,7 @@ static void kinetis_receive(FAR struct kinetis_driver_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
NETDEV_RXIPV6(&priv->dev);
/* Give the IPv6 packet to the network layer */
@@ -918,7 +918,7 @@ static int kinetis_ifup(struct net_driver_s *dev)
uint8_t *mac = dev->d_mac.ether_addr_octet;
uint32_t regval;
- ndbg("Bringing up: %d.%d.%d.%d\n",
+ nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
@@ -1695,7 +1695,7 @@ int kinetis_netinitialize(int intf)
{
/* We could not attach the ISR to the interrupt */
- ndbg("Failed to attach EMACTMR IRQ\n");
+ nerr("Failed to attach EMACTMR IRQ\n");
return -EAGAIN;
}
#endif
@@ -1706,7 +1706,7 @@ int kinetis_netinitialize(int intf)
{
/* We could not attach the ISR to the interrupt */
- ndbg("Failed to attach EMACTX IRQ\n");
+ nerr("Failed to attach EMACTX IRQ\n");
return -EAGAIN;
}
@@ -1716,7 +1716,7 @@ int kinetis_netinitialize(int intf)
{
/* We could not attach the ISR to the interrupt */
- ndbg("Failed to attach EMACRX IRQ\n");
+ nerr("Failed to attach EMACRX IRQ\n");
return -EAGAIN;
}
@@ -1726,7 +1726,7 @@ int kinetis_netinitialize(int intf)
{
/* We could not attach the ISR to the interrupt */
- ndbg("Failed to attach EMACMISC IRQ\n");
+ nerr("Failed to attach EMACMISC IRQ\n");
return -EAGAIN;
}
diff --git a/arch/arm/src/kinetis/kinetis_irq.c b/arch/arm/src/kinetis/kinetis_irq.c
index 44f21af47d611f546d8c80d9c2c13bc2b6aedcb5..45b147af672dee39007bdc2855e1ea48a21ae198 100644
--- a/arch/arm/src/kinetis/kinetis_irq.c
+++ b/arch/arm/src/kinetis/kinetis_irq.c
@@ -111,43 +111,43 @@ static void kinetis_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" INTCTRL: %08x VECTAB: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+ llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
- lldbg(" IRQ ENABLE: %08x %08x %08x %08x\n",
+ llerr(" IRQ ENABLE: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
- lldbg(" SYSH_PRIO: %08x %08x %08x\n",
+ llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
#if NR_VECTORS > 111
- lldbg(" %08x %08x\n",
+ llerr(" %08x %08x\n",
getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY));
#endif
@@ -159,7 +159,7 @@ static void kinetis_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: kinetis_nmi, kinetis_busfault, kinetis_usagefault, kinetis_pendsv,
- * kinetis_dbgmonitor, kinetis_pendsv, kinetis_reserved
+ * kinetis_errmonitor, kinetis_pendsv, kinetis_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@@ -168,11 +168,11 @@ static void kinetis_dumpnvic(const char *msg, int irq)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int kinetis_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -180,7 +180,7 @@ static int kinetis_nmi(int irq, FAR void *context)
static int kinetis_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Bus fault recived\n");
+ err("PANIC!!! Bus fault recived\n");
PANIC();
return 0;
}
@@ -188,7 +188,7 @@ static int kinetis_busfault(int irq, FAR void *context)
static int kinetis_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Usage fault received\n");
+ err("PANIC!!! Usage fault received\n");
PANIC();
return 0;
}
@@ -196,15 +196,15 @@ static int kinetis_usagefault(int irq, FAR void *context)
static int kinetis_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
-static int kinetis_dbgmonitor(int irq, FAR void *context)
+static int kinetis_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Debug Monitor received\n");
+ err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@@ -212,7 +212,7 @@ static int kinetis_dbgmonitor(int irq, FAR void *context)
static int kinetis_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -420,7 +420,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(KINETIS_IRQ_NMI, kinetis_nmi);
#ifndef CONFIG_ARM_MPU
irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault);
@@ -428,7 +428,7 @@ void up_irqinitialize(void)
irq_attach(KINETIS_IRQ_BUSFAULT, kinetis_busfault);
irq_attach(KINETIS_IRQ_USAGEFAULT, kinetis_usagefault);
irq_attach(KINETIS_IRQ_PENDSV, kinetis_pendsv);
- irq_attach(KINETIS_IRQ_DBGMONITOR, kinetis_dbgmonitor);
+ irq_attach(KINETIS_IRQ_DBGMONITOR, kinetis_errmonitor);
irq_attach(KINETIS_IRQ_RESERVED, kinetis_reserved);
#endif
diff --git a/arch/arm/src/kinetis/kinetis_pindump.c b/arch/arm/src/kinetis/kinetis_pindump.c
new file mode 100644
index 0000000000000000000000000000000000000000..de750115e740fa59256576f91ff6a4df1428aa00
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_pindump.c
@@ -0,0 +1,128 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_pindump.c
+ *
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include
+
+#include
+#include
+
+#include
+#include "up_arch.h"
+
+#include "kinetis.h"
+#include "kinetis_gpio.h"
+#include "kinetis_port.h"
+
+#ifdef CONFIG_DEBUG_GPIO
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Port letters for prettier debug output */
+
+static const char g_portchar[KINETIS_NPORTS] =
+{
+#if KINETIS_NPORTS > 9
+# error "Additional support required for this number of GPIOs"
+#elif KINETIS_NPORTS > 8
+ 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I'
+#elif KINETIS_NPORTS > 7
+ 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H'
+#elif KINETIS_NPORTS > 6
+ 'A', 'B', 'C', 'D', 'E', 'F', 'G'
+#elif KINETIS_NPORTS > 5
+ 'A', 'B', 'C', 'D', 'E', 'F'
+#elif KINETIS_NPORTS > 4
+ 'A', 'B', 'C', 'D', 'E'
+#elif KINETIS_NPORTS > 3
+ 'A', 'B', 'C', 'D'
+#elif KINETIS_NPORTS > 2
+ 'A', 'B', 'C'
+#elif KINETIS_NPORTS > 1
+ 'A', 'B'
+#elif KINETIS_NPORTS > 0
+ 'A'
+#else
+# error "Bad number of GPIOs"
+#endif
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function: kinetis_pindump
+ *
+ * Description:
+ * Dump all GPIO registers associated with the provided pin description
+ * along with a descriptive messasge.
+ *
+ ****************************************************************************/
+
+void kinetis_pindump(uint32_t pinset, const char *msg)
+{
+ irqstate_t flags;
+ uintptr_t base;
+ int port;
+
+ /* Decode the port and pin. Use the port number to get the GPIO base
+ * address.
+ */
+
+ port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
+ DEBUGASSERT((unsigned)port < KINETIS_NPORTS);
+ base = KINETIS_GPIO_BASE(port);
+
+ /* The following requires exclusive access to the GPIO registers */
+
+ flags = enter_critical_section();
+
+ llerr("GPIO%c pinset: %08x base: %08x -- %s\n",
+ g_portchar[port], pinset, base, msg);
+ llerr(" PDOR: %08x PDIR: %08x PDDR: %08x\n",
+ getreg32(base + KINETIS_GPIO_PDOR_OFFSET),
+ getreg32(base + KINETIS_GPIO_PDIR_OFFSET),
+ getreg32(base + KINETIS_GPIO_PDDR_OFFSET));
+
+ leave_critical_section(flags);
+}
+
+#endif /* CONFIG_DEBUG_GPIO */
diff --git a/arch/arm/src/kinetis/kinetis_pwm.c b/arch/arm/src/kinetis/kinetis_pwm.c
new file mode 100644
index 0000000000000000000000000000000000000000..1f552d8e4be8bbe9ac0951eae1bb05d22605328c
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_pwm.c
@@ -0,0 +1,808 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_pwm.c
+ *
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt
+ * Alan Carvalho de Assis
+ * Ken Fazzone
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+
+#include "kinetis.h"
+#include "kinetis_pwm.h"
+#include "kinetis_gpio.h"
+#include "kinetis_ftm.h"
+#include "kinetis_sim.h"
+
+/* This module then only compiles if there is at least one enabled timer
+ * intended for use with the PWM upper half driver.
+ */
+
+#if defined(CONFIG_KINETIS_FTM0_PWM) || defined(CONFIG_KINETIS_FTM1_PWM) || \
+ defined(CONFIG_KINETIS_FTM2_PWM)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* PWM/Timer Definitions ****************************************************/
+
+/* Debug ********************************************************************/
+/* Non-standard debug that may be enabled just for testing PWM */
+
+#ifndef CONFIG_DEBUG_FEATURES
+# undef CONFIG_DEBUG_PWM
+#endif
+
+#ifdef CONFIG_DEBUG_PWM
+# define pwmerr err
+# define pwmllerr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define pwminfo info
+# define pwmllinfo llinfo
+# define pwm_dumpgpio(p,m) kinetis_pindump(p,m)
+# else
+# define pwmllerr(x...)
+# define pwmllinfo(x...)
+# define pwm_dumpgpio(p,m)
+# endif
+#else
+# define pwmerr(x...)
+# define pwmllerr(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
+# define pwm_dumpgpio(p,m)
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+/* This structure represents the state of one PWM timer */
+
+struct kinetis_pwmtimer_s
+{
+ FAR const struct pwm_ops_s *ops; /* PWM operations */
+ uint8_t tpmid; /* Timer/PWM Module ID {0,..,2} */
+ uint8_t channel; /* Timer/PWM Module channel: {0,..5} */
+ uint32_t base; /* The base address of the timer */
+ uint32_t pincfg; /* Output pin configuration */
+ uint32_t pclk; /* The frequency of the peripheral clock */
+};
+
+/****************************************************************************
+ * Static Function Prototypes
+ ****************************************************************************/
+
+/* Register access */
+
+static uint32_t pwm_getreg(struct kinetis_pwmtimer_s *priv, int offset);
+static void pwm_putreg(struct kinetis_pwmtimer_s *priv, int offset, uint32_t value);
+
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
+static void pwm_dumpregs(struct kinetis_pwmtimer_s *priv, FAR const char *msg);
+#else
+# define pwm_dumpregs(priv,msg)
+#endif
+
+/* Timer management */
+
+static int pwm_timer(FAR struct kinetis_pwmtimer_s *priv,
+ FAR const struct pwm_info_s *info);
+
+/* PWM driver methods */
+
+static int pwm_setup(FAR struct pwm_lowerhalf_s *dev);
+static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev);
+
+static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
+ FAR const struct pwm_info_s *info);
+
+static int pwm_stop(FAR struct pwm_lowerhalf_s *dev);
+static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev,
+ int cmd, unsigned long arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* This is the list of lower half PWM driver methods used by the upper half
+ * driver.
+ */
+
+static const struct pwm_ops_s g_pwmops =
+{
+ .setup = pwm_setup,
+ .shutdown = pwm_shutdown,
+ .start = pwm_start,
+ .stop = pwm_stop,
+ .ioctl = pwm_ioctl,
+};
+
+#ifdef CONFIG_KINETIS_FTM0_PWM
+static struct kinetis_pwmtimer_s g_pwm0dev =
+{
+ .ops = &g_pwmops,
+ .tpmid = 0,
+ .channel = CONFIG_KINETIS_FTM0_CHANNEL,
+ .base = KINETIS_FTM0_BASE,
+ .pincfg = PWM_FTM0_PINCFG,
+ .pclk = BOARD_CORECLK_FREQ,
+};
+#endif
+
+#ifdef CONFIG_KINETIS_FTM1_PWM
+static struct kinetis_pwmtimer_s g_pwm1dev =
+{
+ .ops = &g_pwmops,
+ .tpmid = 1,
+ .channel = CONFIG_KINETIS_FTM1_CHANNEL,
+ .base = KINETIS_FTM1_BASE,
+ .pincfg = PWM_FTM1_PINCFG,
+ .pclk = BOARD_CORECLK_FREQ,
+};
+#endif
+
+#ifdef CONFIG_KINETIS_FTM2_PWM
+static struct kinetis_pwmtimer_s g_pwm2dev =
+{
+ .ops = &g_pwmops,
+ .tpmid = 2,
+ .channel = CONFIG_KINETIS_FTM2_CHANNEL,
+ .base = KINETIS_FTM2_BASE,
+ .pincfg = PWM_FTM2_PINCFG,
+ .pclk = BOARD_CORECLK_FREQ,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: pwm_getreg
+ *
+ * Description:
+ * Read the value of an PWM timer register.
+ *
+ * Input Parameters:
+ * priv - A reference to the PWM block status
+ * offset - The offset to the register to read
+ *
+ * Returned Value:
+ * The current contents of the specified register
+ *
+ ****************************************************************************/
+
+static uint32_t pwm_getreg(struct kinetis_pwmtimer_s *priv, int offset)
+{
+ return getreg32(priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: pwm_putreg
+ *
+ * Description:
+ * Read the value of an PWM timer register.
+ *
+ * Input Parameters:
+ * priv - A reference to the PWM block status
+ * offset - The offset to the register to read
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+static void pwm_putreg(struct kinetis_pwmtimer_s *priv, int offset, uint32_t value)
+{
+ putreg32(value, priv->base + offset);
+}
+
+/****************************************************************************
+ * Name: pwm_dumpregs
+ *
+ * Description:
+ * Dump all timer registers.
+ *
+ * Input parameters:
+ * priv - A reference to the PWM block status
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
+static void pwm_dumpregs(struct kinetis_pwmtimer_s *priv, FAR const char *msg)
+{
+ int nchannels = (priv->tpmid == 0) ? 8 : 2;
+
+ pwminfo("%s:\n", msg);
+ pwminfo(" FTM%d_SC: %04x FTM%d_CNT: %04x FTM%d_MOD: %04x\n",
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_SC_OFFSET),
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_CNT_OFFSET),
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_MOD_OFFSET));
+ pwminfo(" FTM%d_STATUS: %04x FTM%d_CONF: %04x\n",
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_STATUS_OFFSET),
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_CONF_OFFSET));
+ pwminfo(" FTM%d_C0SC: %04x FTM%d_C0V: %04x\n",
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C0SC_OFFSET),
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C0V_OFFSET));
+ pwminfo(" FTM%d_C1SC: %04x FTM%d_C1V: %04x\n",
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C1SC_OFFSET),
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C1V_OFFSET));
+
+ if (nchannels >= 3)
+ {
+ pwminfo(" FTM%d_C2SC: %04x FTM%d_C2V: %04x\n",
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C2SC_OFFSET),
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C2V_OFFSET));
+ }
+
+ if (nchannels >= 4)
+ {
+ pwminfo(" FTM%d_C3SC: %04x FTM%d_C3V: %04x\n",
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C3SC_OFFSET),
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C3V_OFFSET));
+ }
+
+ if (nchannels >= 5)
+ {
+ pwminfo(" FTM%d_C4SC: %04x FTM%d_C4V: %04x\n",
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C4SC_OFFSET),
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C4V_OFFSET));
+ }
+
+ if (nchannels >= 6)
+ {
+ pwminfo(" FTM%d_C5SC: %04x FTM%d_C5V: %04x\n",
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C5SC_OFFSET),
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C5V_OFFSET));
+ }
+ if (nchannels >= 7)
+ {
+ pwminfo(" FTM%d_C6SC: %04x FTM%d_C6V: %04x\n",
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C6SC_OFFSET),
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C6V_OFFSET));
+ }
+ if (nchannels >= 8)
+ {
+ pwminfo(" FTM%d_C7SC: %04x FTM%d_C7V: %04x\n",
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C7SC_OFFSET),
+ priv->tpmid,
+ pwm_getreg(priv, KINETIS_FTM_C7V_OFFSET));
+ }
+}
+#endif
+
+/****************************************************************************
+ * Name: pwm_timer
+ *
+ * Description:
+ * (Re-)initialize the timer resources and start the pulsed output
+ *
+ * Input parameters:
+ * priv - A reference to the lower half PWM driver state structure
+ * info - A reference to the characteristics of the pulsed output
+ *
+ * Returned Value:
+ * Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int pwm_timer(FAR struct kinetis_pwmtimer_s *priv,
+ FAR const struct pwm_info_s *info)
+{
+ /* Calculated values */
+
+ uint32_t prescaler;
+ uint32_t tpmclk;
+ uint32_t modulo;
+ uint32_t regval;
+ uint32_t cv;
+ uint8_t i;
+
+ static const uint8_t presc_values[8] = {1, 2, 4, 8, 16, 32, 64, 128};
+
+ /* Register contents */
+
+ DEBUGASSERT(priv != NULL && info != NULL);
+
+ pwminfo("FTM%d channel: %d frequency: %d duty: %08x\n",
+ priv->tpmid, priv->channel, info->frequency, info->duty);
+
+ DEBUGASSERT(info->frequency > 0 && info->duty > 0 &&
+ info->duty < uitoub16(100));
+
+ /* Calculate optimal values for the timer prescaler and for the timer modulo
+ * register. If' frequency' is the desired frequency, then
+ *
+ * modulo = tpmclk / frequency
+ * tpmclk = pclk / presc
+ *
+ * Or,
+ *
+ * modulo = pclk / presc / frequency
+ *
+ * There are many solutions to do this, but the best solution will be the
+ * one that has the largest modulo value and the smallest prescaler value.
+ * That is the solution that should give us the most accuracy in the timer
+ * control. Subject to:
+ *
+ * 1 <= presc <= 128 (need to be 1, 2, 4, 8, 16, 32, 64, 128)
+ * 1 <= modulo <= 65535
+ *
+ * So presc = pclk / 65535 / frequency would be optimal.
+ *
+ * Example:
+ *
+ * pclk = 24 MHz
+ * frequency = 100 Hz
+ *
+ * prescaler = 24,000,000 / 65,535 / 100
+ * = 3.6 (or 4 -- taking the ceiling always)
+ * timclk = 24,000,000 / 4
+ * = 6,000,000
+ * modulo = 6,000,000 / 100
+ * = 60,000
+ */
+
+ prescaler = (priv->pclk / info->frequency + 65534) / 65535;
+
+ for (i = 0; i < 7; i++)
+ {
+ if (prescaler <= presc_values[i])
+ {
+ break;
+ }
+ }
+
+ prescaler = i;
+
+ tpmclk = priv->pclk / presc_values[prescaler];
+
+ modulo = tpmclk / info->frequency;
+ if (modulo < 1)
+ {
+ modulo = 1;
+ }
+ else if (modulo > 65535)
+ {
+ modulo = 65535;
+ }
+
+ /* Duty cycle:
+ *
+ * duty cycle = cv / modulo (fractional value)
+ */
+
+ cv = b16toi(info->duty * modulo + b16HALF);
+
+ pwminfo("FTM%d PCLK: %d frequency: %d FTMCLK: %d prescaler: %d modulo: %d c0v: %d\n",
+ priv->tpmid, priv->pclk, info->frequency, tpmclk,
+ presc_values[prescaler], modulo, cv);
+
+ /* Disable FTM and reset CNT before writing MOD and PS */
+
+ pwm_putreg(priv, KINETIS_FTM_SC_OFFSET, FTM_SC_CLKS_NONE);
+ pwm_putreg(priv, KINETIS_FTM_CNT_OFFSET, 0);
+
+ /* Set the modulo value */
+
+ pwm_putreg(priv, KINETIS_FTM_MOD_OFFSET, (uint16_t)modulo);
+
+ /* Set the duty cycle for channel specific */
+
+ switch (priv->channel)
+ {
+ case 0: /* PWM Mode configuration: Channel 0 */
+ {
+ pwm_putreg(priv, KINETIS_FTM_C0SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+ pwm_putreg(priv, KINETIS_FTM_C0V_OFFSET, (uint16_t) cv);
+ }
+ break;
+
+ case 1: /* PWM Mode configuration: Channel 1 */
+ {
+ pwm_putreg(priv, KINETIS_FTM_C1SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+ pwm_putreg(priv, KINETIS_FTM_C1V_OFFSET, (uint16_t) cv);
+ }
+ break;
+
+ case 2: /* PWM Mode configuration: Channel 2 */
+ {
+ pwm_putreg(priv, KINETIS_FTM_C2SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+ pwm_putreg(priv, KINETIS_FTM_C2V_OFFSET, (uint16_t) cv);
+ }
+ break;
+
+ case 3: /* PWM Mode configuration: Channel 3 */
+ {
+ pwm_putreg(priv, KINETIS_FTM_C3SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+ pwm_putreg(priv, KINETIS_FTM_C3V_OFFSET, (uint16_t) cv);
+ }
+ break;
+
+ case 4: /* PWM Mode configuration: Channel 4 */
+ {
+ pwm_putreg(priv, KINETIS_FTM_C4SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+ pwm_putreg(priv, KINETIS_FTM_C4V_OFFSET, (uint16_t) cv);
+ }
+ break;
+
+ case 5: /* PWM Mode configuration: Channel 5 */
+ {
+ pwm_putreg(priv, KINETIS_FTM_C5SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+ pwm_putreg(priv, KINETIS_FTM_C5V_OFFSET, (uint16_t) cv);
+ }
+ break;
+
+ case 6: /* PWM Mode configuration: Channel 6 */
+ {
+ pwm_putreg(priv, KINETIS_FTM_C6SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+ pwm_putreg(priv, KINETIS_FTM_C6V_OFFSET, (uint16_t) cv);
+ }
+ break;
+ case 7: /* PWM Mode configuration: Channel 7 */
+ {
+ pwm_putreg(priv, KINETIS_FTM_C7SC_OFFSET, FTM_CSC_MSB | FTM_CSC_ELSB);
+ pwm_putreg(priv, KINETIS_FTM_C7V_OFFSET, (uint16_t) cv);
+ }
+ break;
+
+ default:
+ pwmerr("No such channel: %d\n", priv->channel);
+ return -EINVAL;
+ }
+
+ /* Set prescaler and enable clock */
+
+ regval = pwm_getreg(priv, KINETIS_FTM_SC_OFFSET);
+ regval &= ~(FTM_SC_PS_MASK);
+ regval &= ~(FTM_SC_CLKS_MASK);
+ regval |= prescaler | FTM_SC_CLKS_SYSCLK;
+ pwm_putreg(priv, KINETIS_FTM_SC_OFFSET, (uint16_t)regval);
+
+ pwm_dumpregs(priv, "After starting");
+ return OK;
+}
+
+/****************************************************************************
+ * Name: pwm_setup
+ *
+ * Description:
+ * This method is called when the driver is opened. The lower half driver
+ * should configure and initialize the device so that it is ready for use.
+ * It should not, however, output pulses until the start method is called.
+ *
+ * Input parameters:
+ * dev - A reference to the lower half PWM driver state structure
+ *
+ * Returned Value:
+ * Zero on success; a negated errno value on failure
+ *
+ * Assumptions:
+ * AHB1 or 2 clocking for the GPIOs and timer has already been configured
+ * by the RCC logic at power up.
+ *
+ ****************************************************************************/
+
+static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
+{
+ uint32_t regval;
+ FAR struct kinetis_pwmtimer_s *priv = (FAR struct kinetis_pwmtimer_s *)dev;
+
+ /* Enable access to FTM modules */
+
+ regval = getreg32(KINETIS_SIM_SCGC6);
+ regval |= SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1;
+ putreg32(regval, KINETIS_SIM_SCGC6);
+
+ regval = getreg32(KINETIS_SIM_SCGC3);
+ regval |= SIM_SCGC3_FTM2;
+ putreg32(regval, KINETIS_SIM_SCGC3);
+
+ pwminfo("FTM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
+ pwm_dumpregs(priv, "Initially");
+
+ /* Configure the PWM output pin, but do not start the timer yet */
+
+ kinetis_pinconfig(priv->pincfg);
+ pwm_dumpgpio(priv->pincfg, "PWM setup");
+ return OK;
+}
+
+/****************************************************************************
+ * Name: pwm_shutdown
+ *
+ * Description:
+ * This method is called when the driver is closed. The lower half driver
+ * stop pulsed output, free any resources, disable the timer hardware, and
+ * put the system into the lowest possible power usage state
+ *
+ * Input parameters:
+ * dev - A reference to the lower half PWM driver state structure
+ *
+ * Returned Value:
+ * Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
+{
+ FAR struct kinetis_pwmtimer_s *priv = (FAR struct kinetis_pwmtimer_s *)dev;
+ uint32_t pincfg;
+
+ pwminfo("FTM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
+
+ /* Make sure that the output has been stopped */
+
+ pwm_stop(dev);
+
+ /* Then put the GPIO pin back to the default state */
+
+ pincfg = (priv->pincfg & ~(_PIN_MODE_MASK));
+ pincfg |= GPIO_INPUT;
+ kinetis_pinconfig(pincfg);
+ return OK;
+}
+
+/****************************************************************************
+ * Name: pwm_start
+ *
+ * Description:
+ * (Re-)initialize the timer resources and start the pulsed output
+ *
+ * Input parameters:
+ * dev - A reference to the lower half PWM driver state structure
+ * info - A reference to the characteristics of the pulsed output
+ *
+ * Returned Value:
+ * Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
+ FAR const struct pwm_info_s *info)
+{
+ FAR struct kinetis_pwmtimer_s *priv = (FAR struct kinetis_pwmtimer_s *)dev;
+ return pwm_timer(priv, info);
+}
+
+/****************************************************************************
+ * Name: pwm_stop
+ *
+ * Description:
+ * Stop the pulsed output and reset the timer resources
+ *
+ * Input parameters:
+ * dev - A reference to the lower half PWM driver state structure
+ *
+ * Returned Value:
+ * Zero on success; a negated errno value on failure
+ *
+ * Assumptions:
+ * This function is called to stop the pulsed output at anytime. This
+ * method is also called from the timer interrupt handler when a repetition
+ * count expires... automatically stopping the timer.
+ *
+ ****************************************************************************/
+
+static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
+{
+ FAR struct kinetis_pwmtimer_s *priv = (FAR struct kinetis_pwmtimer_s *)dev;
+ irqstate_t flags;
+
+ pwminfo("FTM%d\n", priv->tpmid);
+
+ /* Disable interrupts momentary to stop any ongoing timer processing and
+ * to prevent any concurrent access to the reset register.
+ */
+
+ flags = enter_critical_section();
+
+ /* Disable further interrupts and stop the timer */
+
+ pwm_putreg(priv, KINETIS_FTM_SC_OFFSET, FTM_SC_CLKS_NONE);
+ pwm_putreg(priv, KINETIS_FTM_CNT_OFFSET, 0);
+
+ /* Determine which timer channel to clear */
+
+ switch (priv->channel)
+ {
+ case 0:
+ pwm_putreg(priv, KINETIS_FTM_C0V_OFFSET, 0);
+ break;
+
+ case 1:
+ pwm_putreg(priv, KINETIS_FTM_C1V_OFFSET, 0);
+ break;
+
+ case 2:
+ pwm_putreg(priv, KINETIS_FTM_C2V_OFFSET, 0);
+ break;
+
+ case 3:
+ pwm_putreg(priv, KINETIS_FTM_C3V_OFFSET, 0);
+ break;
+
+ case 4:
+ pwm_putreg(priv, KINETIS_FTM_C4V_OFFSET, 0);
+ break;
+
+ case 5:
+ pwm_putreg(priv, KINETIS_FTM_C5V_OFFSET, 0);
+ break;
+
+ case 6:
+ pwm_putreg(priv, KINETIS_FTM_C6V_OFFSET, 0);
+ break;
+
+ case 7:
+ pwm_putreg(priv, KINETIS_FTM_C7V_OFFSET, 0);
+ break;
+
+ default:
+ pwmerr("No such channel: %d\n", priv->channel);
+ return -EINVAL;
+ }
+
+ leave_critical_section(flags);
+
+ pwm_dumpregs(priv, "After stop");
+ return OK;
+}
+
+/****************************************************************************
+ * Name: pwm_ioctl
+ *
+ * Description:
+ * Lower-half logic may support platform-specific ioctl commands
+ *
+ * Input parameters:
+ * dev - A reference to the lower half PWM driver state structure
+ * cmd - The ioctl command
+ * arg - The argument accompanying the ioctl command
+ *
+ * Returned Value:
+ * Zero on success; a negated errno value on failure
+ *
+ ****************************************************************************/
+
+static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
+{
+#ifdef CONFIG_DEBUG_PWM
+ FAR struct kinetis_pwmtimer_s *priv = (FAR struct kinetis_pwmtimer_s *)dev;
+
+ /* There are no platform-specific ioctl commands */
+
+ pwminfo("FTM%d\n", priv->tpmid);
+#endif
+ return -ENOTTY;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: kinetis_pwminitialize
+ *
+ * Description:
+ * Initialize one timer for use with the upper_level PWM driver.
+ *
+ * Input Parameters:
+ * timer - A number identifying the timer use.
+ *
+ * Returned Value:
+ * On success, a pointer to the kinetis lower half PWM driver is returned.
+ * NULL is returned on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct pwm_lowerhalf_s *kinetis_pwminitialize(int timer)
+{
+ FAR struct kinetis_pwmtimer_s *lower;
+
+ pwminfo("FTM%d\n", timer);
+
+ switch (timer)
+ {
+#ifdef CONFIG_KINETIS_FTM0_PWM
+ case 0:
+ lower = &g_pwm0dev;
+
+ break;
+#endif
+
+#ifdef CONFIG_KINETIS_FTM1_PWM
+ case 1:
+ lower = &g_pwm1dev;
+
+ break;
+#endif
+
+#ifdef CONFIG_KINETIS_FTM2_PWM
+ case 2:
+ lower = &g_pwm2dev;
+
+ break;
+#endif
+
+ default:
+ pwmerr("No such timer configured\n");
+ return NULL;
+ }
+
+ return (FAR struct pwm_lowerhalf_s *)lower;
+}
+
+#endif /* CONFIG_KINETIS_FTMn_PWM, n = 0,...,2 */
diff --git a/arch/arm/src/kinetis/kinetis_pwm.h b/arch/arm/src/kinetis/kinetis_pwm.h
new file mode 100644
index 0000000000000000000000000000000000000000..09508d4bfea7a1433bb7865600a1d924c4fa4e63
--- /dev/null
+++ b/arch/arm/src/kinetis/kinetis_pwm.h
@@ -0,0 +1,198 @@
+/************************************************************************************
+ * arch/arm/src/kinetis/kinetis_pwm.h
+ *
+ * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt
+ * Alan Carvalho de Assis
+ * Ken Fazzone
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_PWM_H
+#define __ARCH_ARM_SRC_KINETIS_KINETIS_PWM_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include
+
+#include "chip.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+/* Timer devices may be used for different purposes. One special purpose is
+ * to generate modulated outputs for such things as motor control. If CONFIG_KINETIS_FTMn
+ * is defined then the CONFIG_KINETIS_FTMn_PWM must also be defined to indicate that
+ * timer "n" is intended to be used for pulsed output signal generation.
+ */
+
+#ifndef CONFIG_KINETIS_FTM0
+# undef CONFIG_KINETIS_FTM0_PWM
+#endif
+#ifndef CONFIG_KINETIS_FTM1
+# undef CONFIG_KINETIS_FTM1_PWM
+#endif
+#ifndef CONFIG_KINETIS_FTM2
+# undef CONFIG_KINETIS_FTM2_PWM
+#endif
+
+/* Check if PWM support for any channel is enabled. */
+
+#if defined(CONFIG_KINETIS_FTM0_PWM) || defined(CONFIG_KINETIS_FTM1_PWM) || \
+ defined(CONFIG_KINETIS_FTM2_PWM)
+
+#include
+#include "kinetis_pinmux.h"
+
+/* For each timer that is enabled for PWM usage, we need the following additional
+ * configuration settings:
+ *
+ * CONFIG_KINETIS_FTMx_CHANNEL - Specifies the timer output channel {1,..,4}
+ * PWM_FTMx_CHn - One of the values defined in kinetis*_pinmap.h. In the case
+ * where there are multiple pin selections, the correct setting must be provided
+ * in the arch/board/board.h file.
+ */
+
+#ifdef CONFIG_KINETIS_FTM0_PWM
+# if !defined(CONFIG_KINETIS_FTM0_CHANNEL)
+# error "CONFIG_KINETIS_FTM0_CHANNEL must be provided"
+# elif CONFIG_KINETIS_FTM0_CHANNEL == 0
+# define PWM_FTM0_PINCFG GPIO_FTM0_CH0OUT
+# elif CONFIG_KINETIS_FTM0_CHANNEL == 1
+# define PWM_FTM0_PINCFG GPIO_FTM0_CH1OUT
+# elif CONFIG_KINETIS_FTM0_CHANNEL == 2
+# define PWM_FTM0_PINCFG GPIO_FTM0_CH2OUT
+# elif CONFIG_KINETIS_FTM0_CHANNEL == 3
+# define PWM_FTM0_PINCFG GPIO_FTM0_CH3OUT
+# elif CONFIG_KINETIS_FTM0_CHANNEL == 4
+# define PWM_FTM0_PINCFG GPIO_FTM0_CH4OUT
+# elif CONFIG_KINETIS_FTM0_CHANNEL == 5
+# define PWM_FTM0_PINCFG GPIO_FTM0_CH5OUT
+# elif CONFIG_KINETIS_FTM0_CHANNEL == 6
+# define PWM_FTM0_PINCFG GPIO_FTM0_CH6OUT
+# elif CONFIG_KINETIS_FTM0_CHANNEL == 7
+# define PWM_FTM0_PINCFG GPIO_FTM0_CH7OUT
+# else
+# error "Unsupported value of CONFIG_KINETIS_FTM1_CHANNEL"
+# endif
+#endif
+
+#ifdef CONFIG_KINETIS_FTM1_PWM
+# if !defined(CONFIG_KINETIS_FTM1_CHANNEL)
+# error "CONFIG_KINETIS_FTM1_CHANNEL must be provided"
+# elif CONFIG_KINETIS_FTM1_CHANNEL == 0
+# define PWM_FTM1_PINCFG GPIO_FTM1_CH0OUT
+# elif CONFIG_KINETIS_FTM1_CHANNEL == 1
+# define PWM_FTM1_PINCFG GPIO_FTM1_CH1OUT
+# elif CONFIG_KINETIS_FTM1_CHANNEL == 2
+# define PWM_FTM1_PINCFG GPIO_FTM1_CH2OUT
+# elif CONFIG_KINETIS_FTM1_CHANNEL == 3
+# define PWM_FTM1_PINCFG GPIO_FTM1_CH3OUT
+# elif CONFIG_KINETIS_FTM1_CHANNEL == 4
+# define PWM_FTM1_PINCFG GPIO_FTM1_CH4OUT
+# elif CONFIG_KINETIS_FTM1_CHANNEL == 5
+# define PWM_FTM1_PINCFG GPIO_FTM1_CH5OUT
+# else
+# error "Unsupported value of CONFIG_KINETIS_FTM2_CHANNEL"
+# endif
+#endif
+
+#ifdef CONFIG_KINETIS_FTM2_PWM
+# if !defined(CONFIG_KINETIS_FTM2_CHANNEL)
+# error "CONFIG_KINETIS_FTM2_CHANNEL must be provided"
+# elif CONFIG_KINETIS_FTM2_CHANNEL == 0
+# define PWM_FTM2_PINCFG GPIO_FTM2_CH0OUT
+# elif CONFIG_KINETIS_FTM2_CHANNEL == 1
+# define PWM_FTM2_PINCFG GPIO_FTM2_CH1OUT
+# elif CONFIG_KINETIS_FTM2_CHANNEL == 2
+# define PWM_FTM2_PINCFG GPIO_FTM2_CH2OUT
+# elif CONFIG_KINETIS_FTM2_CHANNEL == 3
+# define PWM_FTM2_PINCFG GPIO_FTM2_CH3OUT
+# elif CONFIG_KINETIS_FTM2_CHANNEL == 4
+# define PWM_FTM2_PINCFG GPIO_FTM2_CH4OUT
+# elif CONFIG_KINETIS_FTM2_CHANNEL == 5
+# define PWM_FTM2_PINCFG GPIO_FTM2_CH5OUT
+# else
+# error "Unsupported value of CONFIG_KINETIS_FTM3_CHANNEL"
+# endif
+#endif
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: kinetis_pwminitialize
+ *
+ * Description:
+ * Initialize one timer for use with the upper_level PWM driver.
+ *
+ * Input Parameters:
+ * timer - A number identifying the timer use.
+ *
+ * Returned Value:
+ * On success, a pointer to the kinetis lower half PWM driver is returned.
+ * NULL is returned on any failure.
+ *
+ ************************************************************************************/
+
+FAR struct pwm_lowerhalf_s *kinetis_pwminitialize(int timer);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_KINETIS_FTMx_PWM */
+#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_PWM_H */
diff --git a/arch/arm/src/kinetis/kinetis_sdhc.c b/arch/arm/src/kinetis/kinetis_sdhc.c
index 7841cc1ad59e7e3ec842515f39fcc8f61d2aa709..0b2214cb2b03b8d9436719ad44169e61a1f2fb6d 100644
--- a/arch/arm/src/kinetis/kinetis_sdhc.c
+++ b/arch/arm/src/kinetis/kinetis_sdhc.c
@@ -89,7 +89,7 @@
# define CONFIG_KINETIS_SDHC_DMAPRIO DMA_CCR_PRIMED
#endif
-#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_VERBOSE)
+#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_INFO)
# undef CONFIG_SDIO_XFRDEBUG
#endif
@@ -574,29 +574,29 @@ static void kinetis_sample(struct kinetis_dev_s *priv, int index)
static void kinetis_dumpsample(struct kinetis_dev_s *priv,
struct kinetis_sdhcregs_s *regs, const char *msg)
{
- fdbg("SDHC Registers: %s\n", msg);
- fdbg(" DSADDR[%08x]: %08x\n", KINETIS_SDHC_DSADDR, regs->dsaddr);
- fdbg(" BLKATTR[%08x]: %08x\n", KINETIS_SDHC_BLKATTR, regs->blkattr);
- fdbg(" CMDARG[%08x]: %08x\n", KINETIS_SDHC_CMDARG, regs->cmdarg);
- fdbg(" XFERTY[%08x]: %08x\n", KINETIS_SDHC_XFERTYP, regs->xferty);
- fdbg(" CMDRSP0[%08x]: %08x\n", KINETIS_SDHC_CMDRSP0, regs->cmdrsp0);
- fdbg(" CMDRSP1[%08x]: %08x\n", KINETIS_SDHC_CMDRSP1, regs->cmdrsp1);
- fdbg(" CMDRSP2[%08x]: %08x\n", KINETIS_SDHC_CMDRSP2, regs->cmdrsp2);
- fdbg(" CMDRSP3[%08x]: %08x\n", KINETIS_SDHC_CMDRSP3, regs->cmdrsp3);
- fdbg(" PRSSTAT[%08x]: %08x\n", KINETIS_SDHC_PRSSTAT, regs->prsstat);
- fdbg(" PROCTL[%08x]: %08x\n", KINETIS_SDHC_PROCTL, regs->proctl);
- fdbg(" SYSCTL[%08x]: %08x\n", KINETIS_SDHC_SYSCTL, regs->sysctl);
- fdbg(" IRQSTAT[%08x]: %08x\n", KINETIS_SDHC_IRQSTAT, regs->irqstat);
- fdbg("IRQSTATEN[%08x]: %08x\n", KINETIS_SDHC_IRQSTATEN, regs->irqstaten);
- fdbg(" IRQSIGEN[%08x]: %08x\n", KINETIS_SDHC_IRQSIGEN, regs->irqsigen);
- fdbg(" AC12ERR[%08x]: %08x\n", KINETIS_SDHC_AC12ERR, regs->ac12err);
- fdbg(" HTCAPBLT[%08x]: %08x\n", KINETIS_SDHC_HTCAPBLT, regs->htcapblt);
- fdbg(" WML[%08x]: %08x\n", KINETIS_SDHC_WML, regs->wml);
- fdbg(" ADMAES[%08x]: %08x\n", KINETIS_SDHC_ADMAES, regs->admaes);
- fdbg(" ADSADDR[%08x]: %08x\n", KINETIS_SDHC_ADSADDR, regs->adsaddr);
- fdbg(" VENDOR[%08x]: %08x\n", KINETIS_SDHC_VENDOR, regs->vendor);
- fdbg(" MMCBOOT[%08x]: %08x\n", KINETIS_SDHC_MMCBOOT, regs->mmcboot);
- fdbg(" HOSTVER[%08x]: %08x\n", KINETIS_SDHC_HOSTVER, regs->hostver);
+ ferr("SDHC Registers: %s\n", msg);
+ ferr(" DSADDR[%08x]: %08x\n", KINETIS_SDHC_DSADDR, regs->dsaddr);
+ ferr(" BLKATTR[%08x]: %08x\n", KINETIS_SDHC_BLKATTR, regs->blkattr);
+ ferr(" CMDARG[%08x]: %08x\n", KINETIS_SDHC_CMDARG, regs->cmdarg);
+ ferr(" XFERTY[%08x]: %08x\n", KINETIS_SDHC_XFERTYP, regs->xferty);
+ ferr(" CMDRSP0[%08x]: %08x\n", KINETIS_SDHC_CMDRSP0, regs->cmdrsp0);
+ ferr(" CMDRSP1[%08x]: %08x\n", KINETIS_SDHC_CMDRSP1, regs->cmdrsp1);
+ ferr(" CMDRSP2[%08x]: %08x\n", KINETIS_SDHC_CMDRSP2, regs->cmdrsp2);
+ ferr(" CMDRSP3[%08x]: %08x\n", KINETIS_SDHC_CMDRSP3, regs->cmdrsp3);
+ ferr(" PRSSTAT[%08x]: %08x\n", KINETIS_SDHC_PRSSTAT, regs->prsstat);
+ ferr(" PROCTL[%08x]: %08x\n", KINETIS_SDHC_PROCTL, regs->proctl);
+ ferr(" SYSCTL[%08x]: %08x\n", KINETIS_SDHC_SYSCTL, regs->sysctl);
+ ferr(" IRQSTAT[%08x]: %08x\n", KINETIS_SDHC_IRQSTAT, regs->irqstat);
+ ferr("IRQSTATEN[%08x]: %08x\n", KINETIS_SDHC_IRQSTATEN, regs->irqstaten);
+ ferr(" IRQSIGEN[%08x]: %08x\n", KINETIS_SDHC_IRQSIGEN, regs->irqsigen);
+ ferr(" AC12ERR[%08x]: %08x\n", KINETIS_SDHC_AC12ERR, regs->ac12err);
+ ferr(" HTCAPBLT[%08x]: %08x\n", KINETIS_SDHC_HTCAPBLT, regs->htcapblt);
+ ferr(" WML[%08x]: %08x\n", KINETIS_SDHC_WML, regs->wml);
+ ferr(" ADMAES[%08x]: %08x\n", KINETIS_SDHC_ADMAES, regs->admaes);
+ ferr(" ADSADDR[%08x]: %08x\n", KINETIS_SDHC_ADSADDR, regs->adsaddr);
+ ferr(" VENDOR[%08x]: %08x\n", KINETIS_SDHC_VENDOR, regs->vendor);
+ ferr(" MMCBOOT[%08x]: %08x\n", KINETIS_SDHC_MMCBOOT, regs->mmcboot);
+ ferr(" HOSTVER[%08x]: %08x\n", KINETIS_SDHC_HOSTVER, regs->hostver);
}
#endif
@@ -791,7 +791,7 @@ static void kinetis_transmit(struct kinetis_dev_s *priv)
* ready (BWR)
*/
- fllvdbg("Entry: remaining: %d IRQSTAT: %08x\n",
+ fllinfo("Entry: remaining: %d IRQSTAT: %08x\n",
priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT));
while (priv->remaining > 0 &&
@@ -837,7 +837,7 @@ static void kinetis_transmit(struct kinetis_dev_s *priv)
putreg32(data.w, KINETIS_SDHC_DATPORT);
}
- fllvdbg("Exit: remaining: %d IRQSTAT: %08x\n",
+ fllinfo("Exit: remaining: %d IRQSTAT: %08x\n",
priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT));
}
@@ -877,7 +877,7 @@ static void kinetis_receive(struct kinetis_dev_s *priv)
* ready (BRR)
*/
- fllvdbg("Entry: remaining: %d IRQSTAT: %08x\n",
+ fllinfo("Entry: remaining: %d IRQSTAT: %08x\n",
priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT));
while (priv->remaining > 0 &&
@@ -929,7 +929,7 @@ static void kinetis_receive(struct kinetis_dev_s *priv)
putreg32(watermark << SDHC_WML_RD_SHIFT, KINETIS_SDHC_WML);
- fllvdbg("Exit: remaining: %d IRQSTAT: %08x WML: %08x\n",
+ fllinfo("Exit: remaining: %d IRQSTAT: %08x WML: %08x\n",
priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT),
getreg32(KINETIS_SDHC_WML));
@@ -973,7 +973,7 @@ static void kinetis_eventtimeout(int argc, uint32_t arg)
/* Wake up any waiting threads */
kinetis_endwait(priv, SDIOWAIT_TIMEOUT);
- flldbg("Timeout: remaining: %d\n", priv->remaining);
+ fllerr("Timeout: remaining: %d\n", priv->remaining);
}
}
@@ -1105,7 +1105,7 @@ static int kinetis_interrupt(int irq, void *context)
regval = getreg32(KINETIS_SDHC_IRQSIGEN);
enabled = getreg32(KINETIS_SDHC_IRQSTAT) & regval;
- fllvdbg("IRQSTAT: %08x IRQSIGEN %08x enabled: %08x\n",
+ fllinfo("IRQSTAT: %08x IRQSIGEN %08x enabled: %08x\n",
getreg32(KINETIS_SDHC_IRQSTAT), regval, enabled);
/* Disable card interrupts to clear the card interrupt to the host system. */
@@ -1162,7 +1162,7 @@ static int kinetis_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
- flldbg("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
+ fllerr("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
kinetis_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@@ -1172,7 +1172,7 @@ static int kinetis_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
- flldbg("ERROR: Data timeout, remaining: %d\n", priv->remaining);
+ fllerr("ERROR: Data timeout, remaining: %d\n", priv->remaining);
kinetis_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT);
}
}
@@ -1289,7 +1289,7 @@ static void kinetis_reset(FAR struct sdio_dev_s *dev)
putreg32(SDHC_INT_ALL, KINETIS_SDHC_IRQSTATEN);
- fvdbg("SYSCTL: %08x PRSSTAT: %08x IRQSTATEN: %08x\n",
+ finfo("SYSCTL: %08x PRSSTAT: %08x IRQSTATEN: %08x\n",
getreg32(KINETIS_SDHC_SYSCTL), getreg32(KINETIS_SDHC_PRSSTAT),
getreg32(KINETIS_SDHC_IRQSTATEN));
@@ -1504,7 +1504,7 @@ static void kinetis_frequency(FAR struct sdio_dev_s *dev, uint32_t frequency)
regval |= (SDHC_SYSCTL_SDCLKEN | SDHC_SYSCTL_PEREN | SDHC_SYSCTL_HCKEN |
SDHC_SYSCTL_IPGEN);
putreg32(regval, KINETIS_SDHC_SYSCTL);
- fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
+ finfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
}
#endif
@@ -1538,7 +1538,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
regval = getreg32(KINETIS_SDHC_SYSCTL);
regval &= ~SDHC_SYSCTL_SDCLKEN;
putreg32(regval, KINETIS_SDHC_SYSCTL);
- fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
+ finfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
switch (rate)
{
@@ -1552,7 +1552,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
regval &= ~(SDHC_SYSCTL_IPGEN | SDHC_SYSCTL_HCKEN | SDHC_SYSCTL_PEREN |
SDHC_SYSCTL_SDCLKFS_MASK | SDHC_SYSCTL_DVS_MASK);
putreg32(regval, KINETIS_SDHC_SYSCTL);
- fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
+ finfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
return;
}
@@ -1593,7 +1593,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
regval = getreg32(KINETIS_SDHC_SYSCTL);
regval &= ~SDHC_SYSCTL_SDCLKEN;
putreg32(regval, KINETIS_SDHC_SYSCTL);
- fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
+ finfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
/* Clear the old prescaler and divisor values so that new ones can be ORed
* in.
@@ -1619,7 +1619,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
regval &= ~(SDHC_SYSCTL_IPGEN | SDHC_SYSCTL_HCKEN | SDHC_SYSCTL_PEREN);
putreg32(regval, KINETIS_SDHC_SYSCTL);
- fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
+ finfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
return;
}
@@ -1653,7 +1653,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
}
putreg32(regval, KINETIS_SDHC_SYSCTL);
- fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
+ finfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
}
#endif
@@ -1824,7 +1824,7 @@ static int kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t ar
/* Other bits? What about CMDTYP? */
- fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+ finfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
/* The Command Inhibit (CIHB) bit is set in the PRSSTAT bit immediately
* after the transfer type register is written. This bit is cleared when
@@ -1840,7 +1840,7 @@ static int kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t ar
{
if (--timeout <= 0)
{
- fdbg("ERROR: Timeout cmd: %08x PRSSTAT: %08x\n",
+ ferr("ERROR: Timeout cmd: %08x PRSSTAT: %08x\n",
cmd, getreg32(KINETIS_SDHC_PRSSTAT));
return -EBUSY;
@@ -2079,7 +2079,7 @@ static int kinetis_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
{
if (--timeout <= 0)
{
- fdbg("ERROR: Timeout cmd: %08x IRQSTAT: %08x\n",
+ ferr("ERROR: Timeout cmd: %08x IRQSTAT: %08x\n",
cmd, getreg32(KINETIS_SDHC_IRQSTAT));
return -ETIMEDOUT;
@@ -2090,7 +2090,7 @@ static int kinetis_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
if ((getreg32(KINETIS_SDHC_IRQSTAT) & errors) != 0)
{
- fdbg("ERROR: cmd: %08x errors: %08x IRQSTAT: %08x\n",
+ ferr("ERROR: cmd: %08x errors: %08x IRQSTAT: %08x\n",
cmd, errors, getreg32(KINETIS_SDHC_IRQSTAT));
ret = -EIO;
}
@@ -2152,10 +2152,10 @@ static int kinetis_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!rshort)
{
- fdbg("ERROR: rshort=NULL\n");
+ ferr("ERROR: rshort=NULL\n");
ret = -EINVAL;
}
@@ -2165,7 +2165,7 @@ static int kinetis_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R1B_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R6_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2176,12 +2176,12 @@ static int kinetis_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
regval = getreg32(KINETIS_SDHC_IRQSTAT);
if ((regval & SDHC_INT_CTOE) != 0)
{
- fdbg("ERROR: Command timeout: %08x\n", regval);
+ ferr("ERROR: Command timeout: %08x\n", regval);
ret = -ETIMEDOUT;
}
else if ((regval & SDHC_INT_CCE) != 0)
{
- fdbg("ERROR: CRC failure: %08x\n", regval);
+ ferr("ERROR: CRC failure: %08x\n", regval);
ret = -EIO;
}
}
@@ -2209,12 +2209,12 @@ static int kinetis_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t r
* 0 1 End bit
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Check that R1 is the correct response to this command */
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2225,12 +2225,12 @@ static int kinetis_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t r
regval = getreg32(KINETIS_SDHC_IRQSTAT);
if (regval & SDHC_INT_CTOE)
{
- fdbg("ERROR: Timeout IRQSTAT: %08x\n", regval);
+ ferr("ERROR: Timeout IRQSTAT: %08x\n", regval);
ret = -ETIMEDOUT;
}
else if (regval & SDHC_INT_CCE)
{
- fdbg("ERROR: CRC fail IRQSTAT: %08x\n", regval);
+ ferr("ERROR: CRC fail IRQSTAT: %08x\n", regval);
ret = -EIO;
}
}
@@ -2263,11 +2263,11 @@ static int kinetis_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
/* Check that this is the correct response to this command */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2280,7 +2280,7 @@ static int kinetis_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
regval = getreg32(KINETIS_SDHC_IRQSTAT);
if (regval & SDHC_INT_CTOE)
{
- fdbg("ERROR: Timeout IRQSTAT: %08x\n", regval);
+ ferr("ERROR: Timeout IRQSTAT: %08x\n", regval);
ret = -ETIMEDOUT;
}
}
@@ -2416,7 +2416,7 @@ static sdio_eventset_t kinetis_eventwait(FAR struct sdio_dev_s *dev,
1, (uint32_t)priv);
if (ret != OK)
{
- fdbg("ERROR: wd_start failed: %d\n", ret);
+ ferr("ERROR: wd_start failed: %d\n", ret);
}
}
@@ -2486,7 +2486,7 @@ static void kinetis_callbackenable(FAR struct sdio_dev_s *dev,
{
struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev;
- fvdbg("eventset: %02x\n", eventset);
+ finfo("eventset: %02x\n", eventset);
DEBUGASSERT(priv != NULL);
priv->cbevents = eventset;
@@ -2522,7 +2522,7 @@ static int kinetis_registercallback(FAR struct sdio_dev_s *dev,
/* Disable callbacks and register this callback and is argument */
- fvdbg("Register %p(%p)\n", callback, arg);
+ finfo("Register %p(%p)\n", callback, arg);
DEBUGASSERT(priv != NULL);
priv->cbevents = 0;
@@ -2694,7 +2694,7 @@ static void kinetis_callback(void *arg)
/* Is a callback registered? */
DEBUGASSERT(priv != NULL);
- fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
+ finfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
if (priv->callback)
@@ -2739,14 +2739,14 @@ static void kinetis_callback(void *arg)
{
/* Yes.. queue it */
- fvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
+ finfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
(void)work_queue(HPWORK, &priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0);
}
else
{
/* No.. then just call the callback here */
- fvdbg("Callback to %p(%p)\n", priv->callback, priv->cbarg);
+ finfo("Callback to %p(%p)\n", priv->callback, priv->cbarg);
priv->callback(priv->cbarg);
}
}
@@ -2792,7 +2792,7 @@ FAR struct sdio_dev_s *sdhc_initialize(int slotno)
regval = getreg32(KINETIS_SIM_SCGC3);
regval |= SIM_SCGC3_SDHC;
putreg32(regval, KINETIS_SIM_SCGC3);
- fvdbg("SIM_SCGC3: %08x\n", regval);
+ finfo("SIM_SCGC3: %08x\n", regval);
/* In addition to the system clock, the SDHC module needs a clock for the
* base for the external card clock. There are four possible sources for
@@ -2808,7 +2808,7 @@ FAR struct sdio_dev_s *sdhc_initialize(int slotno)
regval &= ~SIM_SOPT2_SDHCSRC_MASK;
regval |= SIM_SOPT2_SDHCSRC_CORE;
putreg32(regval, KINETIS_SIM_SOPT2);
- fvdbg("SIM_SOPT2: %08x\n", regval);
+ finfo("SIM_SOPT2: %08x\n", regval);
/* Configure pins for 1 or 4-bit, wide-bus operation (the chip is capable
* of 8-bit wide bus operation but D4-D7 are not configured).
@@ -2892,7 +2892,7 @@ void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
priv->cdstatus &= ~SDIO_STATUS_PRESENT;
}
- fvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
+ finfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
/* Perform any requested callback if the status has changed */
@@ -2937,7 +2937,7 @@ void sdhc_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
}
- fvdbg("cdstatus: %02x\n", priv->cdstatus);
+ finfo("cdstatus: %02x\n", priv->cdstatus);
leave_critical_section(flags);
}
#endif /* CONFIG_KINETIS_SDHC */
diff --git a/arch/arm/src/kinetis/kinetis_serial.c b/arch/arm/src/kinetis/kinetis_serial.c
index 550ff55917d5a613f893164ea9a74ba147e4f219..3b169232a953df4f6bc86c1584ae2f59e8cefe19 100644
--- a/arch/arm/src/kinetis/kinetis_serial.c
+++ b/arch/arm/src/kinetis/kinetis_serial.c
@@ -232,7 +232,7 @@ struct up_dev_s
uintptr_t uartbase; /* Base address of UART registers */
uint32_t baud; /* Configured baud */
uint32_t clock; /* Clocking frequency of the UART module */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
uint8_t irqe; /* Error IRQ associated with this UART (for enable) */
#endif
uint8_t irqs; /* Status IRQ associated with this UART (for enable) */
@@ -250,8 +250,8 @@ static int up_setup(struct uart_dev_s *dev);
static void up_shutdown(struct uart_dev_s *dev);
static int up_attach(struct uart_dev_s *dev);
static void up_detach(struct uart_dev_s *dev);
-#ifdef CONFIG_DEBUG
-static int up_interrupte(int irq, void *context);
+#ifdef CONFIG_DEBUG_FEATURES
+static int up_interrupt(int irq, void *context);
#endif
static int up_interrupts(int irq, void *context);
static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
@@ -327,7 +327,7 @@ static struct up_dev_s g_uart0priv =
.uartbase = KINETIS_UART0_BASE,
.clock = BOARD_CORECLK_FREQ,
.baud = CONFIG_UART0_BAUD,
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.irqe = KINETIS_IRQ_UART0E,
#endif
.irqs = KINETIS_IRQ_UART0S,
@@ -361,7 +361,7 @@ static struct up_dev_s g_uart1priv =
.uartbase = KINETIS_UART1_BASE,
.clock = BOARD_CORECLK_FREQ,
.baud = CONFIG_UART1_BAUD,
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.irqe = KINETIS_IRQ_UART1E,
#endif
.irqs = KINETIS_IRQ_UART1S,
@@ -395,7 +395,7 @@ static struct up_dev_s g_uart2priv =
.uartbase = KINETIS_UART2_BASE,
.clock = BOARD_BUS_FREQ,
.baud = CONFIG_UART2_BAUD,
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.irqe = KINETIS_IRQ_UART2E,
#endif
.irqs = KINETIS_IRQ_UART2S,
@@ -429,7 +429,7 @@ static struct up_dev_s g_uart3priv =
.uartbase = KINETIS_UART3_BASE,
.clock = BOARD_BUS_FREQ,
.baud = CONFIG_UART3_BAUD,
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.irqe = KINETIS_IRQ_UART3E,
#endif
.irqs = KINETIS_IRQ_UART3S,
@@ -463,7 +463,7 @@ static struct up_dev_s g_uart4priv =
.uartbase = KINETIS_UART4_BASE,
.clock = BOARD_BUS_FREQ,
.baud = CONFIG_UART4_BAUD,
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.irqe = KINETIS_IRQ_UART4E,
#endif
.irqs = KINETIS_IRQ_UART4S,
@@ -497,7 +497,7 @@ static struct up_dev_s g_uart5priv =
.uartbase = KINETIS_UART5_BASE,
.clock = BOARD_BUS_FREQ,
.baud = CONFIG_UART5_BAUD,
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.irqe = KINETIS_IRQ_UART5E,
#endif
.irqs = KINETIS_IRQ_UART5S,
@@ -626,7 +626,7 @@ static int up_setup(struct uart_dev_s *dev)
/* Set up the interrupt priority */
up_prioritize_irq(priv->irqs, priv->irqprio);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
up_prioritize_irq(priv->irqe, priv->irqprio);
#endif
#endif
@@ -681,16 +681,16 @@ static int up_attach(struct uart_dev_s *dev)
*/
ret = irq_attach(priv->irqs, up_interrupts);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (ret == OK)
{
- ret = irq_attach(priv->irqe, up_interrupte);
+ ret = irq_attach(priv->irqe, up_interrupt);
}
#endif
if (ret == OK)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
up_enable_irq(priv->irqe);
#endif
up_enable_irq(priv->irqs);
@@ -716,7 +716,7 @@ static void up_detach(struct uart_dev_s *dev)
/* Disable interrupts */
up_restoreuartint(priv, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
up_disable_irq(priv->irqe);
#endif
up_disable_irq(priv->irqs);
@@ -724,13 +724,13 @@ static void up_detach(struct uart_dev_s *dev)
/* Detach from the interrupt(s) */
irq_detach(priv->irqs);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_detach(priv->irqe);
#endif
}
/****************************************************************************
- * Name: up_interrupte
+ * Name: up_interrupt
*
* Description:
* This is the UART error interrupt handler. It will be invoked when an
@@ -738,8 +738,8 @@ static void up_detach(struct uart_dev_s *dev)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
-static int up_interrupte(int irq, void *context)
+#ifdef CONFIG_DEBUG_FEATURES
+static int up_interrupt(int irq, void *context)
{
struct uart_dev_s *dev = NULL;
struct up_dev_s *priv;
@@ -790,6 +790,7 @@ static int up_interrupte(int irq, void *context)
{
PANIC();
}
+
priv = (struct up_dev_s *)dev->priv;
DEBUGASSERT(priv);
@@ -804,11 +805,15 @@ static int up_interrupte(int irq, void *context)
*/
regval = up_serialin(priv, KINETIS_UART_S1_OFFSET);
- lldbg("S1: %02x\n", regval);
+ llerr("S1: %02x\n", regval);
+ UNUSED(regval);
+
regval = up_serialin(priv, KINETIS_UART_D_OFFSET);
+ UNUSED(regval);
+
return OK;
}
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
/****************************************************************************
* Name: up_interrupts
@@ -1064,7 +1069,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
}
else
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# warning "Revisit: How are errors enabled?"
priv->ie |= UART_C2_RIE;
#else
diff --git a/arch/arm/src/kinetis/kinetis_start.c b/arch/arm/src/kinetis/kinetis_start.c
index f686e77915cedb8a48cf085dbec960fe039c2b26..4b0451acf8c1fb7dfe2a866af95210cb3de6d995 100644
--- a/arch/arm/src/kinetis/kinetis_start.c
+++ b/arch/arm/src/kinetis/kinetis_start.c
@@ -156,7 +156,7 @@ void __start(void)
/* Show reset status */
- dbg("Reset status: %02x:%02x\n",
+ err("Reset status: %02x:%02x\n",
getreg8(KINETIS_SMC_SRSH), getreg8(KINETIS_SMC_SRSL));
/* Then start NuttX */
diff --git a/arch/arm/src/kinetis/kinetis_usbdev.c b/arch/arm/src/kinetis/kinetis_usbdev.c
index 6bb47d5e3bb27ea0af0d56dae45ce3a01f40a4eb..dee28aed0a66601601bba8095c002a6adbeaece1 100644
--- a/arch/arm/src/kinetis/kinetis_usbdev.c
+++ b/arch/arm/src/kinetis/kinetis_usbdev.c
@@ -86,7 +86,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_KHCI_USBDEV_REGDEBUG
# undef CONFIG_KHCI_USBDEV_BDTDEBUG
#endif
@@ -369,19 +369,19 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
# undef CONFIG_KHCI_USBDEV_BDTDEBUG
# define CONFIG_KHCI_USBDEV_BDTDEBUG 1
-# define regdbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define regvdbg lldbg
+# define regerr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define reginfo llerr
# else
-# define regvdbg(x...)
+# define reginfo(x...)
# endif
#else
# define khci_getreg(addr) getreg8(addr)
# define khci_putreg(val,addr) putreg8(val,addr)
-# define regdbg(x...)
-# define regvdbg(x...)
+# define regerr(x...)
+# define reginfo(x...)
#endif
@@ -389,17 +389,17 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
#ifdef CONFIG_KHCI_USBDEV_BDTDEBUG
-# define bdtdbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define bdtvdbg lldbg
+# define bdterr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define bdtinfo llerr
# else
-# define bdtvdbg(x...)
+# define bdtinfo(x...)
# endif
#else
-# define bdtdbg(x...)
-# define bdtvdbg(x...)
+# define bdterr(x...)
+# define bdtinfo(x...)
#endif
@@ -714,7 +714,7 @@ static uint16_t khci_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
}
@@ -730,7 +730,7 @@ static uint16_t khci_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -742,7 +742,7 @@ static uint16_t khci_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%04x\n", addr, val);
+ llerr("%08x->%04x\n", addr, val);
return val;
}
#endif
@@ -756,7 +756,7 @@ static void khci_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%04x\n", addr, val);
+ llerr("%08x<-%04x\n", addr, val);
/* Write the value */
@@ -953,7 +953,7 @@ static void khci_epwrite(struct khci_ep_s *privep,
/* And, finally, give the BDT to the USB */
- bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n",
+ bdterr("EP%d BDT IN [%p] {%08x, %08x}\n",
USB_EPNO(privep->ep.eplog), bdt, status, bdt->addr);
bdt->status = status;
@@ -987,14 +987,14 @@ static void khci_wrcomplete(struct khci_usbdev_s *priv,
epno = USB_EPNO(privep->ep.eplog);
#ifdef CONFIG_USBDEV_NOWRITEAHEAD
- ullvdbg("EP%d: len=%d xfrd=%d inflight=%d\n",
+ ullinfo("EP%d: len=%d xfrd=%d inflight=%d\n",
epno, privreq->req.len, privreq->req.xfrd, privreq->inflight[0]);
#else
- ullvdbg("EP%d: len=%d xfrd=%d inflight={%d, %d}\n",
+ ullinfo("EP%d: len=%d xfrd=%d inflight={%d, %d}\n",
epno, privreq->req.len, privreq->req.xfrd,
privreq->inflight[0], privreq->inflight[1]);
#endif
- bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n",
+ bdterr("EP%d BDT IN [%p] {%08x, %08x}\n",
epno, bdtin, bdtin->status, bdtin->addr);
/* We should own the BDT that just completed. But NULLify the entire BDT IN.
@@ -1303,7 +1303,7 @@ static int khci_wrstart(struct khci_usbdev_s *priv,
bytesleft = privreq->req.len;
}
- ullvdbg("epno=%d req=%p: len=%d xfrd=%d index=%d nullpkt=%d\n",
+ ullinfo("epno=%d req=%p: len=%d xfrd=%d index=%d nullpkt=%d\n",
epno, privreq, privreq->req.len, xfrd, index, privep->txnullpkt);
/* Get the number of bytes left to be sent in the packet */
@@ -1417,9 +1417,9 @@ static int khci_rdcomplete(struct khci_usbdev_s *priv,
bdtout = privep->bdtout;
epno = USB_EPNO(privep->ep.eplog);
- ullvdbg("EP%d: len=%d xfrd=%d\n",
+ ullinfo("EP%d: len=%d xfrd=%d\n",
epno, privreq->req.len, privreq->req.xfrd);
- bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n",
+ bdterr("EP%d BDT OUT [%p] {%08x, %08x}\n",
epno, bdtout, bdtout->status, bdtout->addr);
/* We should own the BDT that just completed */
@@ -1563,7 +1563,7 @@ static int khci_ep0rdsetup(struct khci_usbdev_s *priv, uint8_t *dest,
/* Then give the BDT to the USB */
- bdtdbg("EP0 BDT OUT [%p] {%08x, %08x}\n", bdtout, status, bdtout->addr);
+ bdterr("EP0 BDT OUT [%p] {%08x, %08x}\n", bdtout, status, bdtout->addr);
bdtout->status = status;
priv->ctrlstate = CTRLSTATE_RDREQUEST;
@@ -1664,7 +1664,7 @@ static int khci_rdsetup(struct khci_ep_s *privep, uint8_t *dest, int readlen)
/* Then give the BDT to the USB */
- bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdtout, status, bdtout->addr);
+ bdterr("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdtout, status, bdtout->addr);
bdtout->status = status;
return OK;
@@ -1705,7 +1705,7 @@ static int khci_rdrequest(struct khci_usbdev_s *priv,
return OK;
}
- ullvdbg("EP%d: len=%d\n", USB_EPNO(privep->ep.eplog), privreq->req.len);
+ ullinfo("EP%d: len=%d\n", USB_EPNO(privep->ep.eplog), privreq->req.len);
/* Ignore any attempt to receive a zero length packet */
@@ -1995,7 +1995,7 @@ static void khci_ep0setup(struct khci_usbdev_s *priv)
index.w = GETUINT16(priv->ctrl.index);
len.w = GETUINT16(priv->ctrl.len);
- ullvdbg("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
/* Dispatch any non-standard requests */
@@ -2239,7 +2239,7 @@ static void khci_ep0setup(struct khci_usbdev_s *priv)
{
/* Special case recipient=device test mode */
- ullvdbg("test mode: %d\n", index.w);
+ ullinfo("test mode: %d\n", index.w);
}
else
{
@@ -2676,7 +2676,7 @@ static void khci_ep0transfer(struct khci_usbdev_s *priv, uint16_t ustat)
bdt = &g_bdt[index];
priv->eplist[0].bdtout = bdt;
- bdtdbg("EP0 BDT OUT [%p] {%08x, %08x}\n", bdt, bdt->status, bdt->addr);
+ bdterr("EP0 BDT OUT [%p] {%08x, %08x}\n", bdt, bdt->status, bdt->addr);
/* Check the current EP0 OUT buffer contains a SETUP packet */
@@ -2913,7 +2913,7 @@ x
if ((usbir & USB_INT_ERROR) != 0)
{
usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_UERR), usbir);
- ulldbg("Error: EIR=%04x\n", khci_getreg(KINETIS_USB0_ERRSTAT));
+ ullerr("Error: EIR=%04x\n", khci_getreg(KINETIS_USB0_ERRSTAT));
/* Clear all pending USB error interrupts */
@@ -3237,11 +3237,11 @@ static int khci_epconfigure(struct usbdev_ep_s *ep,
bool bidi;
int index;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !desc)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
- ulldbg("ERROR: ep=%p desc=%p\n");
+ ullerr("ERROR: ep=%p desc=%p\n");
return -EINVAL;
}
#endif
@@ -3299,7 +3299,7 @@ static int khci_epconfigure(struct usbdev_ep_s *ep,
bdt->status = 0;
bdt->addr = 0;
- bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
+ bdterr("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
/* Now do the same for the other buffer. */
@@ -3307,7 +3307,7 @@ static int khci_epconfigure(struct usbdev_ep_s *ep,
bdt->status = 0;
bdt->addr = 0;
- bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
+ bdterr("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
}
if (!epin || bidi)
@@ -3321,7 +3321,7 @@ static int khci_epconfigure(struct usbdev_ep_s *ep,
bdt->status = 0;
bdt->addr = 0;
- bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
+ bdterr("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
/* Now do the same for the other buffer. */
@@ -3329,7 +3329,7 @@ static int khci_epconfigure(struct usbdev_ep_s *ep,
bdt->status = 0;
bdt->addr = 0;
- bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
+ bdterr("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
}
/* Get the maxpacket size of the endpoint. */
@@ -3364,11 +3364,11 @@ static int khci_epdisable(struct usbdev_ep_s *ep)
int i;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
- ulldbg("ERROR: ep=%p\n", ep);
+ ullerr("ERROR: ep=%p\n", ep);
return -EINVAL;
}
#endif
@@ -3408,7 +3408,7 @@ static struct usbdev_req_s *khci_epallocreq(struct usbdev_ep_s *ep)
{
struct khci_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
@@ -3437,7 +3437,7 @@ static void khci_epfreereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
{
struct khci_req_s *privreq = (struct khci_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
@@ -3463,11 +3463,11 @@ static int khci_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
uint8_t epno;
int ret = OK;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
- ulldbg("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+ ullerr("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
@@ -3475,11 +3475,11 @@ static int khci_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
usbtrace(TRACE_EPSUBMIT, USB_EPNO(ep->eplog));
priv = privep->dev;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!priv->driver)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
- ulldbg("ERROR: driver=%p\n", priv->driver);
+ ullerr("ERROR: driver=%p\n", priv->driver);
return -ESHUTDOWN;
}
#endif
@@ -3550,7 +3550,7 @@ static int khci_epcancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
struct khci_ep_s *privep = (struct khci_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
@@ -3666,9 +3666,9 @@ static int khci_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin)
bdt->addr = (uint8_t *)physaddr;
bdt->status = (USB_BDT_UOWN | bytecount);
- bdtdbg("EP0 BDT IN [%p] {%08x, %08x}\n",
+ bdterr("EP0 BDT IN [%p] {%08x, %08x}\n",
bdt, bdt->status, bdt->addr);
- bdtdbg("EP0 BDT IN [%p] {%08x, %08x}\n",
+ bdterr("EP0 BDT IN [%p] {%08x, %08x}\n",
otherbdt, otherbdt->status, otherbdt->addr);
}
else
@@ -3683,9 +3683,9 @@ static int khci_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin)
bdt->addr = 0;
bdt->status = 0;
- bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
+ bdterr("EP%d BDT %s [%p] {%08x, %08x}\n",
epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
- bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
+ bdterr("EP%d BDT %s [%p] {%08x, %08x}\n",
epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status, otherbdt->addr);
/* Restart any queued requests (after a delay so that we can be assured
@@ -3718,9 +3718,9 @@ static int khci_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin)
khci_rqstop(privep);
- bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
+ bdterr("EP%d BDT %s [%p] {%08x, %08x}\n",
epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
- bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
+ bdterr("EP%d BDT %s [%p] {%08x, %08x}\n",
epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status, otherbdt->addr);
}
@@ -3737,7 +3737,7 @@ static int khci_epstall(struct usbdev_ep_s *ep, bool resume)
irqstate_t flags;
int ret;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
@@ -3798,7 +3798,7 @@ static struct usbdev_ep_s *khci_allocep(struct usbdev_s *dev, uint8_t epno,
uint16_t epset = KHCI_ENDP_ALLSET;
usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
@@ -3856,7 +3856,7 @@ static void khci_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep)
struct khci_usbdev_s *priv;
struct khci_ep_s *privep;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev || !ep)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
@@ -3888,7 +3888,7 @@ static int khci_getframe(struct usbdev_s *dev)
uint16_t frmh;
uint16_t tmp;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
@@ -3929,7 +3929,7 @@ static int khci_wakeup(struct usbdev_s *dev)
struct khci_usbdev_s *priv = (struct khci_usbdev_s *)dev;
usbtrace(TRACE_DEVWAKEUP, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
@@ -3953,7 +3953,7 @@ static int khci_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
@@ -4248,10 +4248,10 @@ static void khci_hwreset(struct khci_usbdev_s *priv)
khci_putreg((uint8_t)((uint32_t)g_bdt >> 16), KINETIS_USB0_BDTPAGE2);
khci_putreg((uint8_t)(((uint32_t)g_bdt >> 8) & USB_BDTPAGE1_MASK), KINETIS_USB0_BDTPAGE1);
- ulldbg("BDT Address %hhx \n" ,&g_bdt);
- ulldbg("BDTPAGE3 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE3));
- ulldbg("BDTPAGE2 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE2));
- ulldbg("BDTPAGE1 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE1));
+ ullerr("BDT Address %hhx \n" ,&g_bdt);
+ ullerr("BDTPAGE3 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE3));
+ ullerr("BDTPAGE2 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE2));
+ ullerr("BDTPAGE1 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE1));
/* Clear any pending interrupts */
@@ -4532,7 +4532,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@@ -4599,7 +4599,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (driver != priv->driver)
{
usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/kl/Make.defs b/arch/arm/src/kl/Make.defs
index 39308b6948c0ed1c5651a3a960cc610bfa9f5bcc..105d267a73ac32ea846f1d8b2e12103b7eb02e18 100644
--- a/arch/arm/src/kl/Make.defs
+++ b/arch/arm/src/kl/Make.defs
@@ -65,7 +65,7 @@ else ifeq ($(CONFIG_MODULE),y)
CMN_CSRCS += up_elf.c
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
CMN_CSRCS += up_dumpnvic.c
endif
@@ -101,6 +101,6 @@ ifeq ($(CONFIG_PWM),y)
CHIP_CSRCS += kl_pwm.c
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
CHIP_CSRCS += kl_dumpgpio.c
endif
diff --git a/arch/arm/src/kl/kl_dumpgpio.c b/arch/arm/src/kl/kl_dumpgpio.c
index b6ea6de628318495dd17d2f5a53cd459290b736d..60eea460099150f0f4a3dbdc7353570c62ed05be 100644
--- a/arch/arm/src/kl/kl_dumpgpio.c
+++ b/arch/arm/src/kl/kl_dumpgpio.c
@@ -39,6 +39,11 @@
#include
+/* Output debug info even if debug output is not selected. */
+
+#undef CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_INFO 1
+
#include
#include
@@ -48,14 +53,13 @@
#include "chip.h"
#include "kl_gpio.h"
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/****************************************************************************
* Private Data
****************************************************************************/
/* Port letters for prettier debug output */
-#ifdef CONFIG_DEBUG
static const char g_portchar[KL_GPIO_NPORTS] =
{
#if KL_GPIO_NPORTS > 9
@@ -82,15 +86,6 @@ static const char g_portchar[KL_GPIO_NPORTS] =
# error "Bad number of GPIOs"
#endif
};
-#endif
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
/****************************************************************************
* Public Functions
@@ -123,14 +118,14 @@ void kl_dumpgpio(gpio_cfgset_t pinset, const char *msg)
flags = enter_critical_section();
- lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
- g_portchar[port], pinset, base, msg);
- lldbg(" PDOR: %08x PDIR: %08x PDDR: %08x\n",
- getreg32(base + KL_GPIO_PDOR_OFFSET),
- getreg32(base + KL_GPIO_PDIR_OFFSET),
- getreg32(base + KL_GPIO_PDDR_OFFSET));
+ llinfo("GPIO%c pinset: %08x base: %08x -- %s\n",
+ g_portchar[port], pinset, base, msg);
+ llinfo(" PDOR: %08x PDIR: %08x PDDR: %08x\n",
+ getreg32(base + KL_GPIO_PDOR_OFFSET),
+ getreg32(base + KL_GPIO_PDIR_OFFSET),
+ getreg32(base + KL_GPIO_PDDR_OFFSET));
leave_critical_section(flags);
}
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/arch/arm/src/kl/kl_idle.c b/arch/arm/src/kl/kl_idle.c
index e711b39e3c51d92765be3de3576e98aa29e5364e..b8a51b04dab686dc0244a2947e8d8be280d9f430 100644
--- a/arch/arm/src/kl/kl_idle.c
+++ b/arch/arm/src/kl/kl_idle.c
@@ -103,7 +103,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */
- llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+ llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */
diff --git a/arch/arm/src/kl/kl_irq.c b/arch/arm/src/kl/kl_irq.c
index 87d47ab35c0d9f2ce06874e42bdc131730332cde..bb9ac77db28b4194bfe097ab3dd3b1055b7e240c 100644
--- a/arch/arm/src/kl/kl_irq.c
+++ b/arch/arm/src/kl/kl_irq.c
@@ -97,26 +97,26 @@ static void kl_dumpnvic(const char *msg, int irq)
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" ISER: %08x ICER: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" ISER: %08x ICER: %08x\n",
getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
- lldbg(" ISPR: %08x ICPR: %08x\n",
+ llerr(" ISPR: %08x ICPR: %08x\n",
getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
- lldbg("SYSCON:\n");
- lldbg(" CPUID: %08x\n",
+ llerr("SYSCON:\n");
+ llerr(" CPUID: %08x\n",
getreg32(ARMV6M_SYSCON_CPUID));
- lldbg(" ICSR: %08x AIRCR: %08x\n",
+ llerr(" ICSR: %08x AIRCR: %08x\n",
getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
- lldbg(" SCR: %08x CCR: %08x\n",
+ llerr(" SCR: %08x CCR: %08x\n",
getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
- lldbg(" SHPR2: %08x SHPR3: %08x\n",
+ llerr(" SHPR2: %08x SHPR3: %08x\n",
getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
leave_critical_section(flags);
@@ -128,7 +128,7 @@ static void kl_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: kl_nmi, kl_busfault, kl_usagefault, kl_pendsv,
- * kl_dbgmonitor, kl_pendsv, kl_reserved
+ * kl_errmonitor, kl_pendsv, kl_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@@ -137,11 +137,11 @@ static void kl_dumpnvic(const char *msg, int irq)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int kl_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -149,7 +149,7 @@ static int kl_nmi(int irq, FAR void *context)
static int kl_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
@@ -157,7 +157,7 @@ static int kl_pendsv(int irq, FAR void *context)
static int kl_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -236,7 +236,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(KL_IRQ_NMI, kl_nmi);
irq_attach(KL_IRQ_PENDSV, kl_pendsv);
irq_attach(KL_IRQ_RESERVED, kl_reserved);
diff --git a/arch/arm/src/kl/kl_pwm.c b/arch/arm/src/kl/kl_pwm.c
index c4714178e4cb03dd65a17c42946ea661cf1b283b..3ff80e32f078cde86b51bc51aec223b2a952282c 100644
--- a/arch/arm/src/kl/kl_pwm.c
+++ b/arch/arm/src/kl/kl_pwm.c
@@ -75,27 +75,27 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing PWM */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_PWM
#endif
#ifdef CONFIG_DEBUG_PWM
-# define pwmdbg dbg
-# define pwmlldbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define pwmvdbg vdbg
-# define pwmllvdbg llvdbg
+# define pwmerr err
+# define pwmllerr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define pwminfo info
+# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) kl_dumpgpio(p,m)
# else
-# define pwmlldbg(x...)
-# define pwmllvdbg(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
-# define pwmdbg(x...)
-# define pwmlldbg(x...)
-# define pwmvdbg(x...)
-# define pwmllvdbg(x...)
+# define pwmerr(x...)
+# define pwmllerr(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
#endif
@@ -122,7 +122,7 @@ struct kl_pwmtimer_s
static uint32_t pwm_getreg(struct kl_pwmtimer_s *priv, int offset);
static void pwm_putreg(struct kl_pwmtimer_s *priv, int offset, uint32_t value);
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg);
#else
# define pwm_dumpregs(priv,msg)
@@ -253,30 +253,30 @@ static void pwm_putreg(struct kl_pwmtimer_s *priv, int offset, uint32_t value)
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
{
int nchannels = (priv->tpmid == 0) ? 6 : 2;
- pwmvdbg("%s:\n", msg);
- pwmvdbg(" TPM%d_SC: %04x TPM%d_CNT: %04x TPM%d_MOD: %04x\n",
+ pwminfo("%s:\n", msg);
+ pwminfo(" TPM%d_SC: %04x TPM%d_CNT: %04x TPM%d_MOD: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_SC_OFFSET),
priv->tpmid,
pwm_getreg(priv, TPM_CNT_OFFSET),
priv->tpmid,
pwm_getreg(priv, TPM_MOD_OFFSET));
- pwmvdbg(" TPM%d_STATUS: %04x TPM%d_CONF: %04x\n",
+ pwminfo(" TPM%d_STATUS: %04x TPM%d_CONF: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_STATUS_OFFSET),
priv->tpmid,
pwm_getreg(priv, TPM_CONF_OFFSET));
- pwmvdbg(" TPM%d_C0SC: %04x TPM%d_C0V: %04x\n",
+ pwminfo(" TPM%d_C0SC: %04x TPM%d_C0V: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_C0SC_OFFSET),
priv->tpmid,
pwm_getreg(priv, TPM_C0V_OFFSET));
- pwmvdbg(" TPM%d_C1SC: %04x TPM%d_C1V: %04x\n",
+ pwminfo(" TPM%d_C1SC: %04x TPM%d_C1V: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_C1SC_OFFSET),
priv->tpmid,
@@ -284,7 +284,7 @@ static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
if (nchannels >= 3)
{
- pwmvdbg(" TPM%d_C2SC: %04x TPM%d_C2V: %04x\n",
+ pwminfo(" TPM%d_C2SC: %04x TPM%d_C2V: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_C2SC_OFFSET),
priv->tpmid,
@@ -293,7 +293,7 @@ static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
if (nchannels >= 4)
{
- pwmvdbg(" TPM%d_C3SC: %04x TPM%d_C3V: %04x\n",
+ pwminfo(" TPM%d_C3SC: %04x TPM%d_C3V: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_C3SC_OFFSET),
priv->tpmid,
@@ -302,7 +302,7 @@ static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
if (nchannels >= 5)
{
- pwmvdbg(" TPM%d_C4SC: %04x TPM%d_C4V: %04x\n",
+ pwminfo(" TPM%d_C4SC: %04x TPM%d_C4V: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_C4SC_OFFSET),
priv->tpmid,
@@ -311,7 +311,7 @@ static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
if (nchannels >= 6)
{
- pwmvdbg(" TPM%d_C5SC: %04x TPM%d_C5V: %04x\n",
+ pwminfo(" TPM%d_C5SC: %04x TPM%d_C5V: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_C5SC_OFFSET),
priv->tpmid,
@@ -353,7 +353,7 @@ static int pwm_timer(FAR struct kl_pwmtimer_s *priv,
DEBUGASSERT(priv != NULL && info != NULL);
- pwmvdbg("TPM%d channel: %d frequency: %d duty: %08x\n",
+ pwminfo("TPM%d channel: %d frequency: %d duty: %08x\n",
priv->tpmid, priv->channel, info->frequency, info->duty);
DEBUGASSERT(info->frequency > 0 && info->duty > 0 &&
@@ -423,7 +423,7 @@ static int pwm_timer(FAR struct kl_pwmtimer_s *priv,
cv = b16toi(info->duty * modulo + b16HALF);
- pwmvdbg("TPM%d PCLK: %d frequency: %d TPMCLK: %d prescaler: %d modulo: %d c0v: %d\n",
+ pwminfo("TPM%d PCLK: %d frequency: %d TPMCLK: %d prescaler: %d modulo: %d c0v: %d\n",
priv->tpmid, priv->pclk, info->frequency, tpmclk,
presc_values[prescaler], modulo, cv);
@@ -483,7 +483,7 @@ static int pwm_timer(FAR struct kl_pwmtimer_s *priv,
break;
default:
- pwmdbg("No such channel: %d\n", priv->channel);
+ pwmerr("No such channel: %d\n", priv->channel);
return -EINVAL;
}
@@ -530,7 +530,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
regval |= SIM_SCGC6_TPM0 | SIM_SCGC6_TPM1 | SIM_SCGC6_TPM2;
putreg32(regval, KL_SIM_SCGC6);
- pwmvdbg("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
+ pwminfo("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
pwm_dumpregs(priv, "Initially");
/* Configure the PWM output pin, but do not start the timer yet */
@@ -561,7 +561,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct kl_pwmtimer_s *priv = (FAR struct kl_pwmtimer_s *)dev;
uint32_t pincfg;
- pwmvdbg("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
+ pwminfo("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
/* Make sure that the output has been stopped */
@@ -621,7 +621,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
FAR struct kl_pwmtimer_s *priv = (FAR struct kl_pwmtimer_s *)dev;
irqstate_t flags;
- pwmvdbg("TPM%d\n", priv->tpmid);
+ pwminfo("TPM%d\n", priv->tpmid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@@ -663,7 +663,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
break;
default:
- pwmdbg("No such channel: %d\n", priv->channel);
+ pwmerr("No such channel: %d\n", priv->channel);
return -EINVAL;
}
@@ -696,7 +696,7 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg
/* There are no platform-specific ioctl commands */
- pwmvdbg("TPM%d\n", priv->tpmid);
+ pwminfo("TPM%d\n", priv->tpmid);
#endif
return -ENOTTY;
}
@@ -724,7 +724,7 @@ FAR struct pwm_lowerhalf_s *kl_pwminitialize(int timer)
{
FAR struct kl_pwmtimer_s *lower;
- pwmvdbg("TPM%d\n", timer);
+ pwminfo("TPM%d\n", timer);
switch (timer)
{
@@ -750,7 +750,7 @@ FAR struct pwm_lowerhalf_s *kl_pwminitialize(int timer)
#endif
default:
- pwmdbg("No such timer configured\n");
+ pwmerr("No such timer configured\n");
return NULL;
}
diff --git a/arch/arm/src/kl/kl_spi.c b/arch/arm/src/kl/kl_spi.c
index 0b738aedf5ea7f135d36c638cd8959fe050ecff8..50553e3cf7c6f1677865e015993c2d921d196ff5 100644
--- a/arch/arm/src/kl/kl_spi.c
+++ b/arch/arm/src/kl/kl_spi.c
@@ -65,21 +65,21 @@
/* Debug ********************************************************************/
/* The following enable debug output from this file:
*
- * CONFIG_DEBUG - Define to enable general debug features
- * CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG)
- * CONFIG_DEBUG_VERBOSE - Define to enable verbose SSP debug
+ * CONFIG_DEBUG_FEATURES - Define to enable general debug features
+ * CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG_FEATURES)
+ * CONFIG_DEBUG_INFO - Define to enable verbose SSP debug
*/
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
+# define spierr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define spiinfo llerr
# else
-# define spivdbg(x...)
+# define spiinfo(x...)
# endif
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiinfo(x...)
#endif
/****************************************************************************
@@ -364,7 +364,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
- spidbg("Frequency %d->%d\n", frequency, actual);
+ spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -388,7 +388,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
FAR struct kl_spidev_s *priv = (FAR struct kl_spidev_s *)dev;
uint8_t regval;
- spivdbg("mode=%d\n", mode);
+ spiinfo("mode=%d\n", mode);
/* Has the mode changed? */
@@ -519,7 +519,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
FAR uint8_t *txptr = (FAR uint8_t *)txbuffer;
uint8_t data;
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
/* Loop, sending each word in the user-provied data buffer. */
@@ -585,7 +585,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
size_t nwords)
{
- spivdbg("txbuffer=%p nwords=%d\n", txbuffer, nwords);
+ spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
return spi_exchange(dev, txbuffer, NULL, nwords);
}
#endif
@@ -612,7 +612,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
#ifndef CONFIG_SPI_EXCHANGE
static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, size_t nwords)
{
- spivdbg("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
+ spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
return spi_exchange(dev, NULL, rxbuffer, nwords);
}
#endif
@@ -687,7 +687,7 @@ FAR struct spi_dev_s *kl_spibus_initialize(int port)
else
#endif
{
- spidbg("ERROR: Port %d not configured\n", port);
+ spierr("ERROR: Port %d not configured\n", port);
return NULL;
}
diff --git a/arch/arm/src/kl/kl_start.c b/arch/arm/src/kl/kl_start.c
index 63491ac74d70503d749dfb32f01c9d59e55f0173..6e9970517f57854eb7cc18986237dccbd6bd50b7 100644
--- a/arch/arm/src/kl/kl_start.c
+++ b/arch/arm/src/kl/kl_start.c
@@ -94,7 +94,7 @@ const uint32_t g_idle_topstack = IDLE_STACK;
*
****************************************************************************/
-#if defined(CONFIG_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES)
# define showprogress(c) kl_lowputc((uint32_t)c)
#else
# define showprogress(c)
diff --git a/arch/arm/src/lpc11xx/Kconfig b/arch/arm/src/lpc11xx/Kconfig
index 45bb842a302f9c4706c1b9986899e4b4ba73fc81..64badf0dbdaec832267b3b3860f83450a5e3d449 100644
--- a/arch/arm/src/lpc11xx/Kconfig
+++ b/arch/arm/src/lpc11xx/Kconfig
@@ -229,10 +229,11 @@ config CAN_LOOPBACK
config CAN_REGDEBUG
bool "Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
- Output detailed register-level CAN debug information. Requires also DEBUG and DEBUG_CAN.
+ Output detailed register-level CAN debug information. Requires also
+ CONFIG_DEBUG_FEATURES and CONFIG_DEBUG_CAN.
endmenu
diff --git a/arch/arm/src/lpc11xx/Make.defs b/arch/arm/src/lpc11xx/Make.defs
index fd0e046964d6e115d0ca12975edda4de2db24ca8..041419c2488e42776cb9ed6abd3270ec76e896c7 100644
--- a/arch/arm/src/lpc11xx/Make.defs
+++ b/arch/arm/src/lpc11xx/Make.defs
@@ -65,7 +65,7 @@ else ifeq ($(CONFIG_MODULE),y)
CMN_CSRCS += up_elf.c
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
CMN_CSRCS += up_dumpnvic.c
endif
diff --git a/arch/arm/src/lpc11xx/lpc11_gpiodbg.c b/arch/arm/src/lpc11xx/lpc11_gpiodbg.c
index 6be8d9c55fee4b6b11c0177cc31cdf6c17cf08f2..d88aeb7362c2acfd917351099d746514b9112a65 100644
--- a/arch/arm/src/lpc11xx/lpc11_gpiodbg.c
+++ b/arch/arm/src/lpc11xx/lpc11_gpiodbg.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc11xx/lpc11_gpiodbg.c
*
- * Copyright (C) 2010-2011, 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2010-2011, 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,6 +39,11 @@
#include
+/* Output debug info even if debug output is not selected. */
+
+#undef CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_INFO 1
+
#include
#include
#include
@@ -53,20 +58,12 @@
* Pre-processor Definitions
****************************************************************************/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_GPIO
#endif
#ifdef CONFIG_DEBUG_GPIO
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -157,32 +154,33 @@ int lpc11_dumpgpio(lpc11_pinset_t pinset, const char *msg)
/* The following requires exclusive access to the GPIO registers */
flags = enter_critical_section();
- lldbg("GPIO%c pin%d (pinset: %08x) -- %s\n",
+ llinfo("GPIO%c pin%d (pinset: %08x) -- %s\n",
port + '0', pin, pinset, msg);
#if defined(LPC176x)
- lldbg(" PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n",
- pinsel, pinsel ? getreg32(pinsel) : 0,
- pinmode, pinmode ? getreg32(pinmode) : 0,
- g_odmode[port], getreg32(g_odmode[port]));
+ llinfo(" PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n",
+ pinsel, pinsel ? getreg32(pinsel) : 0,
+ pinmode, pinmode ? getreg32(pinmode) : 0,
+ g_odmode[port], getreg32(g_odmode[port]));
#elif defined(LPC178x)
- lldbg(" IOCON[%08x]: %08x\n", iocon, getreg32(iocon));
+ llinfo(" IOCON[%08x]: %08x\n", iocon, getreg32(iocon));
#endif
base = g_fiobase[port];
- lldbg(" FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n",
- base+LPC11_FIO_DIR_OFFSET, getreg32(base+LPC11_FIO_DIR_OFFSET),
- base+LPC11_FIO_MASK_OFFSET, getreg32(base+LPC11_FIO_MASK_OFFSET),
- base+LPC11_FIO_PIN_OFFSET, getreg32(base+LPC11_FIO_PIN_OFFSET));
+ llinfo(" FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n",
+ base+LPC11_FIO_DIR_OFFSET, getreg32(base+LPC11_FIO_DIR_OFFSET),
+ base+LPC11_FIO_MASK_OFFSET, getreg32(base+LPC11_FIO_MASK_OFFSET),
+ base+LPC11_FIO_PIN_OFFSET, getreg32(base+LPC11_FIO_PIN_OFFSET));
base = g_intbase[port];
- lldbg(" IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n",
- LPC11_GPIOINT_IOINTSTATUS, getreg32(LPC11_GPIOINT_IOINTSTATUS),
- base+LPC11_GPIOINT_INTSTATR_OFFSET, getreg32(base+LPC11_GPIOINT_INTSTATR_OFFSET),
- base+LPC11_GPIOINT_INTSTATF_OFFSET, getreg32(base+LPC11_GPIOINT_INTSTATF_OFFSET));
- lldbg(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
- base+LPC11_GPIOINT_INTENR_OFFSET, getreg32(base+LPC11_GPIOINT_INTENR_OFFSET),
- base+LPC11_GPIOINT_INTENF_OFFSET, getreg32(base+LPC11_GPIOINT_INTENF_OFFSET));
+ llinfo(" IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n",
+ LPC11_GPIOINT_IOINTSTATUS, getreg32(LPC11_GPIOINT_IOINTSTATUS),
+ base+LPC11_GPIOINT_INTSTATR_OFFSET, getreg32(base+LPC11_GPIOINT_INTSTATR_OFFSET),
+ base+LPC11_GPIOINT_INTSTATF_OFFSET, getreg32(base+LPC11_GPIOINT_INTSTATF_OFFSET));
+ llinfo(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
+ base+LPC11_GPIOINT_INTENR_OFFSET, getreg32(base+LPC11_GPIOINT_INTENR_OFFSET),
+ base+LPC11_GPIOINT_INTENF_OFFSET, getreg32(base+LPC11_GPIOINT_INTENF_OFFSET));
+
leave_critical_section(flags);
return OK;
}
diff --git a/arch/arm/src/lpc11xx/lpc11_i2c.c b/arch/arm/src/lpc11xx/lpc11_i2c.c
index f838629fb2e50c6c217eac3f6cec0a44d4b88128..6d4c60f852412d341a2ca9093e0f4add6c80fdee 100644
--- a/arch/arm/src/lpc11xx/lpc11_i2c.c
+++ b/arch/arm/src/lpc11xx/lpc11_i2c.c
@@ -485,7 +485,7 @@ struct i2c_master_s *lpc11_i2cbus_initialize(int port)
if (port > 1)
{
- dbg("lpc I2C Only support 0,1\n");
+ err("lpc I2C Only support 0,1\n");
return NULL;
}
diff --git a/arch/arm/src/lpc11xx/lpc11_irq.c b/arch/arm/src/lpc11xx/lpc11_irq.c
index c6daaba380de3f4595ce7c7e7b304648c8746578..d48cec28f8be82a14eab055ff4345a99035f07dd 100644
--- a/arch/arm/src/lpc11xx/lpc11_irq.c
+++ b/arch/arm/src/lpc11xx/lpc11_irq.c
@@ -93,26 +93,26 @@ static void lpc11_dumpnvic(const char *msg, int irq)
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" ISER: %08x ICER: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" ISER: %08x ICER: %08x\n",
getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
- lldbg(" ISPR: %08x ICPR: %08x\n",
+ llerr(" ISPR: %08x ICPR: %08x\n",
getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
- lldbg("SYSCON:\n");
- lldbg(" CPUID: %08x\n",
+ llerr("SYSCON:\n");
+ llerr(" CPUID: %08x\n",
getreg32(ARMV6M_SYSCON_CPUID));
- lldbg(" ICSR: %08x AIRCR: %08x\n",
+ llerr(" ICSR: %08x AIRCR: %08x\n",
getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
- lldbg(" SCR: %08x CCR: %08x\n",
+ llerr(" SCR: %08x CCR: %08x\n",
getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
- lldbg(" SHPR2: %08x SHPR3: %08x\n",
+ llerr(" SHPR2: %08x SHPR3: %08x\n",
getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
leave_critical_section(flags);
@@ -124,7 +124,7 @@ static void lpc11_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: lpc11_nmi, lpc11_busfault, lpc11_usagefault, lpc11_pendsv,
- * lpc11_dbgmonitor, lpc11_pendsv, lpc11_reserved
+ * lpc11_errmonitor, lpc11_pendsv, lpc11_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@@ -133,11 +133,11 @@ static void lpc11_dumpnvic(const char *msg, int irq)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int lpc11_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -145,7 +145,7 @@ static int lpc11_nmi(int irq, FAR void *context)
static int lpc11_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
@@ -153,7 +153,7 @@ static int lpc11_pendsv(int irq, FAR void *context)
static int lpc11_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -232,7 +232,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(LPC11_IRQ_NMI, lpc11_nmi);
irq_attach(LPC11_IRQ_PENDSV, lpc11_pendsv);
irq_attach(LPC11_IRQ_RESERVED, lpc11_reserved);
diff --git a/arch/arm/src/lpc11xx/lpc11_serial.c b/arch/arm/src/lpc11xx/lpc11_serial.c
index 86e3feb11c5fe81c267060124ced75cd6b5a47f8..331c4df7c2c242366565fda80fcd7539d18ac8de 100644
--- a/arch/arm/src/lpc11xx/lpc11_serial.c
+++ b/arch/arm/src/lpc11xx/lpc11_serial.c
@@ -630,7 +630,7 @@ static int up_interrupt(int irq, void *context)
/* Read the line status register (LSR) to clear */
status = up_serialin(priv, LPC11_UART_LSR_OFFSET);
- vdbg("LSR: %02x\n", status);
+ info("LSR: %02x\n", status);
break;
}
@@ -638,7 +638,7 @@ static int up_interrupt(int irq, void *context)
default:
{
- dbg("Unexpected IIR: %02x\n", status);
+ err("Unexpected IIR: %02x\n", status);
break;
}
}
diff --git a/arch/arm/src/lpc11xx/lpc11_spi.c b/arch/arm/src/lpc11xx/lpc11_spi.c
index 178bd77c3604f635383b8c4647f2e0150db39ff6..2354977bff16990f67fb2c92c59092568be39201 100644
--- a/arch/arm/src/lpc11xx/lpc11_spi.c
+++ b/arch/arm/src/lpc11xx/lpc11_spi.c
@@ -74,21 +74,21 @@
/* Debug ********************************************************************/
/* The following enable debug output from this file:
*
- * CONFIG_DEBUG - Define to enable general debug features
- * CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG)
- * CONFIG_DEBUG_VERBOSE - Define to enable verbose SSP debug
+ * CONFIG_DEBUG_FEATURES - Define to enable general debug features
+ * CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG_FEATURES)
+ * CONFIG_DEBUG_INFO - Define to enable verbose SSP debug
*/
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
+# define spierr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define spiinfo llerr
# else
-# define spivdbg(x...)
+# define spiinfo(x...)
# endif
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiinfo(x...)
#endif
/* SSP Clocking *************************************************************/
@@ -292,7 +292,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev,
priv->frequency = frequency;
priv->actual = actual;
- spidbg("Frequency %d->%d\n", frequency, actual);
+ spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -456,7 +456,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
uint8_t data;
- spidbg("nwords: %d\n", nwords);
+ spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write the data to transmitted to the SPI Data Register */
@@ -503,7 +503,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
{
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
- spidbg("nwords: %d\n", nwords);
+ spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write some dummy data to the SPI Data Register in order to clock the
diff --git a/arch/arm/src/lpc11xx/lpc11_ssp.c b/arch/arm/src/lpc11xx/lpc11_ssp.c
index c94eac7692d0198ff318afb9fbc950c2d9466331..ab34fd40f8a0f92fc4297eff8458967a2eb2df22 100644
--- a/arch/arm/src/lpc11xx/lpc11_ssp.c
+++ b/arch/arm/src/lpc11xx/lpc11_ssp.c
@@ -75,21 +75,21 @@
/* Debug ********************************************************************/
/* The following enable debug output from this file:
*
- * CONFIG_DEBUG - Define to enable general debug features
- * CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG)
- * CONFIG_DEBUG_VERBOSE - Define to enable verbose SSP debug
+ * CONFIG_DEBUG_FEATURES - Define to enable general debug features
+ * CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG_FEATURES)
+ * CONFIG_DEBUG_INFO - Define to enable verbose SSP debug
*/
#ifdef CONFIG_DEBUG_SPI
-# define sspdbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
+# define ssperr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define spiinfo llerr
# else
-# define spivdbg(x...)
+# define spiinfo(x...)
# endif
#else
-# define sspdbg(x...)
-# define spivdbg(x...)
+# define ssperr(x...)
+# define spiinfo(x...)
#endif
/* SSP Clocking *************************************************************/
@@ -474,7 +474,7 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
- sspdbg("Frequency %d->%d\n", frequency, actual);
+ ssperr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -525,7 +525,7 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
break;
default:
- sspdbg("Bad mode: %d\n", mode);
+ ssperr("Bad mode: %d\n", mode);
DEBUGASSERT(FALSE);
return;
}
@@ -613,7 +613,7 @@ static uint16_t ssp_send(FAR struct spi_dev_s *dev, uint16_t wd)
/* Get the value from the RX FIFO and return it */
regval = ssp_getreg(priv, LPC11_SSP_DR_OFFSET);
- sspdbg("%04x->%04x\n", wd, regval);
+ ssperr("%04x->%04x\n", wd, regval);
return (uint16_t)regval;
}
@@ -651,7 +651,7 @@ static void ssp_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
/* Loop while thre are bytes remaining to be sent */
- sspdbg("nwords: %d\n", nwords);
+ ssperr("nwords: %d\n", nwords);
u.pv = buffer;
while (nwords > 0)
{
@@ -679,7 +679,7 @@ static void ssp_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
/* Then discard all card responses until the RX & TX FIFOs are emptied. */
- sspdbg("discarding\n");
+ ssperr("discarding\n");
do
{
/* Is there anything in the RX fifo? */
@@ -744,7 +744,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
* occurred).
*/
- sspdbg("nwords: %d\n", nwords);
+ ssperr("nwords: %d\n", nwords);
u.pv = buffer;
while (nwords || rxpending)
{
@@ -754,7 +754,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
* and (3) there are more bytes to be sent.
*/
- spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
+ spiinfo("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
while ((ssp_getreg(priv, LPC11_SSP_SR_OFFSET) & SSP_SR_TNF) &&
(rxpending < LPC11_SSP_FIFOSZ) && nwords)
{
@@ -767,7 +767,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
* empty.
*/
- spivdbg("RX: rxpending: %d\n", rxpending);
+ spiinfo("RX: rxpending: %d\n", rxpending);
while (ssp_getreg(priv, LPC11_SSP_SR_OFFSET) & SSP_SR_RNE)
{
data = (uint8_t)ssp_getreg(priv, LPC11_SSP_DR_OFFSET);
diff --git a/arch/arm/src/lpc11xx/lpc11_start.c b/arch/arm/src/lpc11xx/lpc11_start.c
index 78429691490d69c6284c9e1adb74fb1133fff331..917cdeae275e6a5ef705a3e14e67293309b684c6 100644
--- a/arch/arm/src/lpc11xx/lpc11_start.c
+++ b/arch/arm/src/lpc11xx/lpc11_start.c
@@ -86,7 +86,7 @@ const uint32_t g_idle_topstack = IDLE_STACK;
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# define showprogress(c) up_lowputc(c)
#else
# define showprogress(c)
diff --git a/arch/arm/src/lpc11xx/lpc11_timer.c b/arch/arm/src/lpc11xx/lpc11_timer.c
index b9106becbcc016f8f4cd7876b470546d85746389..cb18e4c158cb378eac462f9ea66d9beb539cd671 100644
--- a/arch/arm/src/lpc11xx/lpc11_timer.c
+++ b/arch/arm/src/lpc11xx/lpc11_timer.c
@@ -84,27 +84,27 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing PWM */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_PWM
#endif
#ifdef CONFIG_DEBUG_PWM
-# define pwmdbg dbg
-# define pwmlldbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define pwmvdbg vdbg
-# define pwmllvdbg llvdbg
+# define pwmerr err
+# define pwmllerr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define pwminfo info
+# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
# else
-# define pwmlldbg(x...)
-# define pwmllvdbg(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
-# define pwmdbg(x...)
-# define pwmlldbg(x...)
-# define pwmvdbg(x...)
-# define pwmllvdbg(x...)
+# define pwmerr(x...)
+# define pwmllerr(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
#endif
@@ -133,7 +133,7 @@ struct lpc11_timer_s
static uint32_t timer_getreg(struct lpc11_timer_s *priv, int offset);
static void timer_putreg(struct lpc11_timer_s *priv, int offset, uint32_t value);
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void timer_dumpregs(struct lpc11_timer_s *priv, FAR const char *msg);
#else
# define timer_dumpregs(priv,msg)
@@ -242,11 +242,11 @@ static void timer_putreg(struct lpc11_timer_s *priv, int offset,
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void timer_dumpregs(struct lpc11_timer_s *priv, FAR const char *msg)
{
- pwmdbg("%s:\n", msg);
- pwmdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
+ pwmerr("%s:\n", msg);
+ pwmerr(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
timer_getreg(priv, LPC11_PWM_MR0_OFFSET),
timer_getreg(priv, LPC11_PWM_MR1_OFFSET),
timer_getreg(priv, LPC11_PWM_MR2_OFFSET),
@@ -254,7 +254,7 @@ static void timer_dumpregs(struct lpc11_timer_s *priv, FAR const char *msg)
#if defined(CONFIG_LPC11_TMR0)
if (priv->timtype == TIMTYPE_ADVANCED)
{
- pwmdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
+ pwmerr(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
timer_getreg(priv, LPC11_PWM_MR0_OFFSET),
timer_getreg(priv, LPC11_PWM_MR1_OFFSET),
timer_getreg(priv, LPC11_PWM_MR2_OFFSET),
@@ -263,7 +263,7 @@ static void timer_dumpregs(struct lpc11_timer_s *priv, FAR const char *msg)
else
#endif
{
- pwmdbg(" DCR: %04x DMAR: %04x\n",
+ pwmerr(" DCR: %04x DMAR: %04x\n",
timer_getreg(priv, LPC11_PWM_MR2_OFFSET),
timer_getreg(priv, LPC11_PWM_MR3_OFFSET));
}
@@ -469,7 +469,7 @@ static int timer_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct lpc11_timer_s *priv = (FAR struct lpc11_timer_s *)dev;
uint32_t pincfg;
- pwmdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
+ pwmerr("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
/* Make sure that the output has been stopped */
@@ -525,7 +525,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
uint32_t regval;
irqstate_t flags;
- pwmdbg("TIM%d\n", priv->timid);
+ pwmerr("TIM%d\n", priv->timid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@@ -551,7 +551,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
leave_critical_section(flags);
- pwmdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+ pwmerr("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
timer_dumpregs(priv, "After stop");
return OK;
}
@@ -580,7 +580,7 @@ static int timer_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd,
/* There are no platform-specific ioctl commands */
- pwmdbg("TIM%d\n", priv->timid);
+ pwmerr("TIM%d\n", priv->timid);
#endif
return -ENOTTY;
}
@@ -610,7 +610,7 @@ FAR struct pwm_lowerhalf_s *lpc11_timerinitialize(int timer)
{
FAR struct lpc11_timer_s *lower;
- pwmdbg("TIM%d\n", timer);
+ pwmerr("TIM%d\n", timer);
switch (timer)
{
@@ -624,7 +624,7 @@ FAR struct pwm_lowerhalf_s *lpc11_timerinitialize(int timer)
#endif
default:
- pwmdbg("No such timer configured\n");
+ pwmerr("No such timer configured\n");
return NULL;
}
diff --git a/arch/arm/src/lpc17xx/Kconfig b/arch/arm/src/lpc17xx/Kconfig
index 4bb53068bb687b6213aad7464bb4451b31479cfb..e2315fedd7ccc3b098062f6489c2c1e29c5d0109 100644
--- a/arch/arm/src/lpc17xx/Kconfig
+++ b/arch/arm/src/lpc17xx/Kconfig
@@ -596,10 +596,11 @@ config CAN_LOOPBACK
config CAN_REGDEBUG
bool "Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
- Output detailed register-level CAN debug information. Requires also DEBUG and DEBUG_CAN.
+ Output detailed register-level CAN debug information. Requires also
+ CONFIG_DEBUG_FEATURES and CONFIG_DEBUG_CAN.
endmenu
@@ -705,10 +706,10 @@ config NET_WOL
config NET_REGDEBUG
bool "Ethernet register-level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
- Enable low level register debug. Also needs DEBUG.
+ Enable low level register debug. Also needs CONFIG_DEBUG_FEATURES.
config NET_HASH
bool "Hashing"
@@ -900,10 +901,11 @@ config LPC17_USBDEV_NOLED
config LPC17_USBDEV_REGDEBUG
bool "Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
- Output detailed register-level USB device debug information. Requires also DEBUG.
+ Output detailed register-level USB device debug information. Requires
+ also CONFIG_DEBUG_FEATURES.
endmenu
@@ -976,9 +978,10 @@ config USBHOST_ISOC_DISABLE
config LPC17_USBHOST_REGDEBUG
bool "Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
- Output detailed register-level USB host debug information. Requires also DEBUG.
+ Output detailed register-level USB host debug information. Requires
+ also CONFIG_DEBUG_FEATURES.
endmenu
diff --git a/arch/arm/src/lpc17xx/lpc176x_rtc.c b/arch/arm/src/lpc17xx/lpc176x_rtc.c
index a0aa525ff736ccd5d172ef4e8d5ac111a781014c..1ffbbf93f4c144685370f7ed07f4b851a8f4b2ce 100644
--- a/arch/arm/src/lpc17xx/lpc176x_rtc.c
+++ b/arch/arm/src/lpc17xx/lpc176x_rtc.c
@@ -72,7 +72,7 @@
# error "CONFIG_RTC_HIRES must NOT be set with this driver"
#endif
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_RTC
#endif
@@ -81,15 +81,15 @@
/* Debug ****************************************************************************/
#ifdef CONFIG_DEBUG_RTC
-# define rtcdbg dbg
-# define rtcvdbg vdbg
-# define rtclldbg lldbg
-# define rtcllvdbg llvdbg
+# define rtcerr err
+# define rtcinfo info
+# define rtcllerr llerr
+# define rtcllinfo llinfo
#else
-# define rtcdbg(x...)
-# define rtcvdbg(x...)
-# define rtclldbg(x...)
-# define rtcllvdbg(x...)
+# define rtcerr(x...)
+# define rtcinfo(x...)
+# define rtcllerr(x...)
+# define rtcllinfo(x...)
#endif
/************************************************************************************
@@ -134,9 +134,9 @@ volatile bool g_rtc_enabled = false;
#ifdef CONFIG_DEBUG_RTC
static void rtc_dumpregs(FAR const char *msg)
{
- rtclldbg("%s:\n", msg);
- rtclldbg(" DOM : %08x\n", (getreg32(LPC17_RTC_DOM) & RTC_DOM_MASK));
- rtclldbg(" DOW : %08x\n", (getreg32(LPC17_RTC_DOW) & RTC_DOW_MASK));
+ rtcllerr("%s:\n", msg);
+ rtcllerr(" DOM : %08x\n", (getreg32(LPC17_RTC_DOM) & RTC_DOM_MASK));
+ rtcllerr(" DOW : %08x\n", (getreg32(LPC17_RTC_DOW) & RTC_DOW_MASK));
}
#else
# define rtc_dumpregs(msg)
@@ -159,13 +159,13 @@ static void rtc_dumpregs(FAR const char *msg)
#ifdef CONFIG_DEBUG_RTC
static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
{
- rtclldbg("%s:\n", msg);
- rtclldbg(" tm_sec: %08x\n", tp->tm_sec);
- rtclldbg(" tm_min: %08x\n", tp->tm_min);
- rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
- rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
- rtclldbg(" tm_mon: %08x\n", tp->tm_mon);
- rtclldbg(" tm_year: %08x\n", tp->tm_year);
+ rtcllerr("%s:\n", msg);
+ rtcllerr(" tm_sec: %08x\n", tp->tm_sec);
+ rtcllerr(" tm_min: %08x\n", tp->tm_min);
+ rtcllerr(" tm_hour: %08x\n", tp->tm_hour);
+ rtcllerr(" tm_mday: %08x\n", tp->tm_mday);
+ rtcllerr(" tm_mon: %08x\n", tp->tm_mon);
+ rtcllerr(" tm_year: %08x\n", tp->tm_year);
}
#else
# define rtc_dumptime(tp, msg)
diff --git a/arch/arm/src/lpc17xx/lpc17_can.c b/arch/arm/src/lpc17xx/lpc17_can.c
index c3949f2778e0427b0de7aae20582dd6e5ccf223f..725a68332e44ece68f3fd823e81bd71d1aedd99e 100644
--- a/arch/arm/src/lpc17xx/lpc17_can.c
+++ b/arch/arm/src/lpc17xx/lpc17_can.c
@@ -160,25 +160,25 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing CAN */
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_CAN)
+#if !defined(CONFIG_DEBUG_FEATURES) || !defined(CONFIG_DEBUG_CAN)
# undef CONFIG_CAN_REGDEBUG
#endif
#ifdef CONFIG_DEBUG_CAN
# ifdef CONFIG_CAN_REGDEBUG
-# define candbg lldbg
-# define canvdbg llvdbg
+# define canerr llerr
+# define caninfo llinfo
# else
-# define candbg dbg
-# define canvdbg vdbg
+# define canerr err
+# define caninfo info
# endif
-# define canlldbg lldbg
-# define canllvdbg llvdbg
+# define canllerr llerr
+# define canllinfo llinfo
#else
-# define candbg(x...)
-# define canvdbg(x...)
-# define canlldbg(x...)
-# define canllvdbg(x...)
+# define canerr(x...)
+# define caninfo(x...)
+# define canllerr(x...)
+# define canllinfo(x...)
#endif
/* Timing *******************************************************************/
@@ -325,7 +325,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return;
@@ -342,7 +342,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -354,7 +354,7 @@ static void can_printreg(uint32_t addr, uint32_t value)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, value);
+ llerr("%08x->%08x\n", addr, value);
}
#endif
@@ -415,7 +415,7 @@ static void can_putreg(struct up_dev_s *priv, int offset, uint32_t value)
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, value);
+ llerr("%08x<-%08x\n", addr, value);
/* Write the value */
@@ -475,7 +475,7 @@ static void can_putcommon(uint32_t addr, uint32_t value)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, value);
+ llerr("%08x<-%08x\n", addr, value);
/* Write the value */
@@ -504,7 +504,7 @@ static void can_reset(FAR struct can_dev_s *dev)
irqstate_t flags;
int ret;
- canvdbg("CAN%d\n", priv->port);
+ caninfo("CAN%d\n", priv->port);
flags = enter_critical_section();
@@ -520,7 +520,7 @@ static void can_reset(FAR struct can_dev_s *dev)
ret = can_bittiming(priv);
if (ret != OK)
{
- candbg("ERROR: Failed to set bit timing: %d\n", ret);
+ canerr("ERROR: Failed to set bit timing: %d\n", ret);
}
/* Restart the CAN */
@@ -558,7 +558,7 @@ static int can_setup(FAR struct can_dev_s *dev)
#endif
int ret;
- canvdbg("CAN%d\n", priv->port);
+ caninfo("CAN%d\n", priv->port);
ret = irq_attach(LPC17_IRQ_CAN, can12_interrupt);
if (ret == OK)
@@ -588,7 +588,7 @@ static void can_shutdown(FAR struct can_dev_s *dev)
#ifdef CONFIG_DEBUG_CAN
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->cd_priv;
- canvdbg("CAN%d\n", priv->port);
+ caninfo("CAN%d\n", priv->port);
#endif
up_disable_irq(LPC17_IRQ_CAN);
@@ -615,7 +615,7 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
uint32_t regval;
irqstate_t flags;
- canvdbg("CAN%d enable: %d\n", priv->port, enable);
+ caninfo("CAN%d enable: %d\n", priv->port, enable);
/* The EIR register is also modifed from the interrupt handler, so we have
* to protect this code section.
@@ -656,7 +656,7 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
uint32_t regval;
irqstate_t flags;
- canvdbg("CAN%d enable: %d\n", priv->port, enable);
+ caninfo("CAN%d enable: %d\n", priv->port, enable);
/* Only disabling of the TX interrupt is supported here. The TX interrupt
* is automatically enabled just before a message is sent in order to avoid
@@ -697,7 +697,7 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
{
- dbg("Fix me:Not Implemented\n");
+ err("Fix me:Not Implemented\n");
return 0;
}
@@ -717,7 +717,7 @@ static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
{
- dbg("Fix me:Not Implemented\n");
+ err("Fix me:Not Implemented\n");
return 0;
}
@@ -753,7 +753,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
irqstate_t flags;
int ret = OK;
- canvdbg("CAN%d ID: %d DLC: %d\n",
+ caninfo("CAN%d ID: %d DLC: %d\n",
priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
if (msg->cm_hdr.ch_rtr)
@@ -878,7 +878,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
}
else
{
- candbg("No available transmission buffer, SR: %08x\n", regval);
+ canerr("No available transmission buffer, SR: %08x\n", regval);
ret = -EBUSY;
}
@@ -958,7 +958,7 @@ static void can_interrupt(FAR struct can_dev_s *dev)
/* Read the interrupt and capture register (also clearing most status bits) */
regval = can_getreg(priv, LPC17_CAN_ICR_OFFSET);
- canllvdbg("CAN%d ICR: %08x\n", priv->port, regval);
+ canllinfo("CAN%d ICR: %08x\n", priv->port, regval);
/* Check for a receive interrupt */
@@ -988,7 +988,7 @@ static void can_interrupt(FAR struct can_dev_s *dev)
if ((rfs & CAN_RFS_FF) != 0)
{
- canlldbg("ERROR: Received message with extended identifier. Dropped\n");
+ canllerr("ERROR: Received message with extended identifier. Dropped\n");
}
else
#endif
@@ -1065,7 +1065,7 @@ static int can12_interrupt(int irq, void *context)
{
/* Handle CAN1/2 interrupts */
- canllvdbg("irq: %d\n", irq);
+ canllinfo("irq: %d\n", irq);
#ifdef CONFIG_LPC17_CAN1
can_interrupt(&g_can1dev);
@@ -1142,7 +1142,7 @@ static int can_bittiming(struct up_dev_s *priv)
uint32_t ts2;
uint32_t sjw;
- canllvdbg("CAN%d PCLK: %d baud: %d\n", priv->port,
+ canllinfo("CAN%d PCLK: %d baud: %d\n", priv->port,
CAN_CLOCK_FREQUENCY(priv->divisor), priv->baud);
/* Try to get CAN_BIT_QUANTA quanta in one bit_time.
@@ -1195,7 +1195,7 @@ static int can_bittiming(struct up_dev_s *priv)
sjw = 1;
- canllvdbg("TS1: %d TS2: %d BRP: %d SJW= %d\n", ts1, ts2, brp, sjw);
+ canllinfo("TS1: %d TS2: %d BRP: %d SJW= %d\n", ts1, ts2, brp, sjw);
/* Configure bit timing */
@@ -1212,7 +1212,7 @@ static int can_bittiming(struct up_dev_s *priv)
btr |= CAN_BTR_SAM;
#endif
- canllvdbg("Setting CANxBTR= 0x%08x\n", btr);
+ canllinfo("Setting CANxBTR= 0x%08x\n", btr);
can_putreg(priv, LPC17_CAN_BTR_OFFSET, btr); /* Set bit timing */
return OK;
}
@@ -1240,7 +1240,7 @@ FAR struct can_dev_s *lpc17_caninitialize(int port)
irqstate_t flags;
uint32_t regval;
- canllvdbg("CAN%d\n", port);
+ canllinfo("CAN%d\n", port);
flags = enter_critical_section();
@@ -1299,7 +1299,7 @@ FAR struct can_dev_s *lpc17_caninitialize(int port)
else
#endif
{
- candbg("Unsupported port: %d\n", port);
+ canerr("Unsupported port: %d\n", port);
leave_critical_section(flags);
return NULL;
}
diff --git a/arch/arm/src/lpc17xx/lpc17_dac.c b/arch/arm/src/lpc17xx/lpc17_dac.c
index d5100c5e50a443eacd766e4b5508980de71201e3..6508b0968345f1948f7cd6e4f23febd23e843fa2 100644
--- a/arch/arm/src/lpc17xx/lpc17_dac.c
+++ b/arch/arm/src/lpc17xx/lpc17_dac.c
@@ -172,7 +172,7 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
{
- dbg("Fix me:Not Implemented\n");
+ err("Fix me:Not Implemented\n");
return 0;
}
diff --git a/arch/arm/src/lpc17xx/lpc17_ethernet.c b/arch/arm/src/lpc17xx/lpc17_ethernet.c
index 4bc992d2ce9cf440c3a38deeb694361a504ba149..369112368b3553adba0bb1e44c7c85870e936427 100644
--- a/arch/arm/src/lpc17xx/lpc17_ethernet.c
+++ b/arch/arm/src/lpc17xx/lpc17_ethernet.c
@@ -127,9 +127,9 @@
#endif
/* Debug Configuration *****************************************************/
-/* Register debug -- can only happen of CONFIG_DEBUG is selected */
+/* Register debug -- can only happen of CONFIG_DEBUG_FEATURES is selected */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_NET_REGDEBUG
#endif
@@ -137,7 +137,7 @@
* console.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_NET_DUMPPACKET
#endif
@@ -415,7 +415,7 @@ static void lpc17_ethreset(struct lpc17_driver_s *priv);
#ifdef CONFIG_NET_REGDEBUG
static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
- dbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+ err("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@@ -465,7 +465,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
- dbg("[repeats %d more times]\n", count);
+ err("[repeats %d more times]\n", count);
}
}
@@ -837,7 +837,7 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
if ((*rxstat & RXSTAT_INFO_ERROR) != 0)
{
- nlldbg("Error. considx: %08x prodidx: %08x rxstat: %08x\n",
+ nllerr("Error. considx: %08x prodidx: %08x rxstat: %08x\n",
considx, prodidx, *rxstat);
NETDEV_RXERRORS(&priv->lp_dev);
}
@@ -850,20 +850,20 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
/* else */ if (pktlen > CONFIG_NET_ETH_MTU + CONFIG_NET_GUARDSIZE)
{
- nlldbg("Too big. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
+ nllerr("Too big. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
considx, prodidx, pktlen, *rxstat);
NETDEV_RXERRORS(&priv->lp_dev);
}
else if ((*rxstat & RXSTAT_INFO_LASTFLAG) == 0)
{
- nlldbg("Fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
+ nllerr("Fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
considx, prodidx, pktlen, *rxstat);
NETDEV_RXFRAGMENTS(&priv->lp_dev);
fragment = true;
}
else if (fragment)
{
- nlldbg("Last fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
+ nllerr("Last fragment. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
considx, prodidx, pktlen, *rxstat);
NETDEV_RXFRAGMENTS(&priv->lp_dev);
fragment = false;
@@ -906,7 +906,7 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
NETDEV_RXIPV4(&priv->lp_dev);
/* Handle ARP on input then give the IPv4 packet to the
@@ -948,7 +948,7 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
NETDEV_RXIPV6(&priv->lp_dev);
/* Give the IPv6 packet to the network layer */
@@ -1202,13 +1202,13 @@ static int lpc17_interrupt(int irq, void *context)
{
if ((status & ETH_INT_RXOVR) != 0)
{
- nlldbg("RX Overrun. status: %08x\n", status);
+ nllerr("RX Overrun. status: %08x\n", status);
NETDEV_RXERRORS(&priv->lp_dev);
}
if ((status & ETH_INT_TXUNR) != 0)
{
- nlldbg("TX Underrun. status: %08x\n", status);
+ nllerr("TX Underrun. status: %08x\n", status);
NETDEV_TXERRORS(&priv->lp_dev);
}
@@ -1229,7 +1229,7 @@ static int lpc17_interrupt(int irq, void *context)
if ((status & ETH_INT_RXERR) != 0)
{
- nlldbg("RX Error. status: %08x\n", status);
+ nllerr("RX Error. status: %08x\n", status);
NETDEV_RXERRORS(&priv->lp_dev);
}
@@ -1281,7 +1281,7 @@ static int lpc17_interrupt(int irq, void *context)
if ((status & ETH_INT_TXERR) != 0)
{
- nlldbg("TX Error. status: %08x\n", status);
+ nllerr("TX Error. status: %08x\n", status);
NETDEV_TXERRORS(&priv->lp_dev);
}
@@ -1671,7 +1671,7 @@ static void lpc17_ipv6multicast(FAR struct lpc17_driver_s *priv)
mac[4] = tmp16 & 0xff;
mac[5] = tmp16 >> 8;
- nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
(void)lpc17_addmac(dev, mac);
@@ -1720,7 +1720,7 @@ static int lpc17_ifup(struct net_driver_s *dev)
uint32_t regval;
int ret;
- ndbg("Bringing up: %d.%d.%d.%d\n",
+ nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
@@ -1733,7 +1733,7 @@ static int lpc17_ifup(struct net_driver_s *dev)
ret = lpc17_phyinit(priv);
if (ret != 0)
{
- ndbg("lpc17_phyinit failed: %d\n", ret);
+ nerr("lpc17_phyinit failed: %d\n", ret);
return ret;
}
@@ -2145,7 +2145,7 @@ static int lpc17_addmac(struct net_driver_s *dev, const uint8_t *mac)
uint32_t crc;
unsigned int ndx;
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Hash function:
@@ -2221,7 +2221,7 @@ static int lpc17_rmmac(struct net_driver_s *dev, const uint8_t *mac)
uint32_t crc;
unsigned int ndx;
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Hash function:
@@ -2319,14 +2319,14 @@ static void lpc17_showpins(void)
#if defined(CONFIG_NET_REGDEBUG) && defined(LPC17_HAVE_PHY)
static void lpc17_showmii(uint8_t phyaddr, const char *msg)
{
- dbg("PHY " LPC17_PHYNAME ": %s\n", msg);
- dbg(" MCR: %04x\n", lpc17_phyread(phyaddr, MII_MCR));
- dbg(" MSR: %04x\n", lpc17_phyread(phyaddr, MII_MSR));
- dbg(" ADVERTISE: %04x\n", lpc17_phyread(phyaddr, MII_ADVERTISE));
- dbg(" LPA: %04x\n", lpc17_phyread(phyaddr, MII_LPA));
- dbg(" EXPANSION: %04x\n", lpc17_phyread(phyaddr, MII_EXPANSION));
+ err("PHY " LPC17_PHYNAME ": %s\n", msg);
+ err(" MCR: %04x\n", lpc17_phyread(phyaddr, MII_MCR));
+ err(" MSR: %04x\n", lpc17_phyread(phyaddr, MII_MSR));
+ err(" ADVERTISE: %04x\n", lpc17_phyread(phyaddr, MII_ADVERTISE));
+ err(" LPA: %04x\n", lpc17_phyread(phyaddr, MII_LPA));
+ err(" EXPANSION: %04x\n", lpc17_phyread(phyaddr, MII_EXPANSION));
#ifdef CONFIG_ETH0_PHY_KS8721
- dbg(" 10BTCR: %04x\n", lpc17_phyread(phyaddr, MII_KS8721_10BTCR));
+ err(" 10BTCR: %04x\n", lpc17_phyread(phyaddr, MII_KS8721_10BTCR));
#endif
}
#endif
@@ -2462,7 +2462,7 @@ static inline int lpc17_phyreset(uint8_t phyaddr)
}
}
- ndbg("Reset failed. MCR: %04x\n", phyreg);
+ nerr("Reset failed. MCR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@@ -2509,7 +2509,7 @@ static inline int lpc17_phyautoneg(uint8_t phyaddr)
}
}
- ndbg("Auto-negotiation failed. MSR: %04x\n", phyreg);
+ nerr("Auto-negotiation failed. MSR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@@ -2593,7 +2593,7 @@ static int lpc17_phymode(uint8_t phyaddr, uint8_t mode)
#endif
}
- ndbg("Link failed. MSR: %04x\n", phyreg);
+ nerr("Link failed. MSR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@@ -2647,14 +2647,14 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
*/
phyreg = (unsigned int)lpc17_phyread(phyaddr, MII_PHYID1);
- nvdbg("Addr: %d PHY ID1: %04x\n", phyaddr, phyreg);
+ ninfo("Addr: %d PHY ID1: %04x\n", phyaddr, phyreg);
/* Compare OUI bits 3-18 */
if (phyreg == LPC17_PHYID1)
{
phyreg = lpc17_phyread(phyaddr, MII_PHYID2);
- nvdbg("Addr: %d PHY ID2: %04x\n", phyaddr, phyreg);
+ ninfo("Addr: %d PHY ID2: %04x\n", phyaddr, phyreg);
/* Compare OUI bits 19-24 and the 6-bit model number (ignoring the
* 4-bit revision number).
@@ -2673,10 +2673,10 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
{
/* Failed to find PHY at any location */
- ndbg("No PHY detected\n");
+ nerr("No PHY detected\n");
return -ENODEV;
}
- nvdbg("phyaddr: %d\n", phyaddr);
+ ninfo("phyaddr: %d\n", phyaddr);
/* Save the discovered PHY device address */
@@ -2760,7 +2760,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
break;
default:
- ndbg("Unrecognized mode: %04x\n", phyreg);
+ nerr("Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
@@ -2788,7 +2788,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
break;
default:
- ndbg("Unrecognized mode: %04x\n", phyreg);
+ nerr("Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
@@ -2816,7 +2816,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
break;
default:
- ndbg("Unrecognized mode: %04x\n", phyreg);
+ nerr("Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
@@ -2862,7 +2862,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
}
else
{
- ndbg("Unrecognized mode: %04x\n", phyreg);
+ nerr("Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
}
@@ -2871,7 +2871,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
# warning "PHY Unknown: speed and duplex are bogus"
#endif
- ndbg("%dBase-T %s duplex\n",
+ nerr("%dBase-T %s duplex\n",
(priv->lp_mode & LPC17_SPEED_MASK) == LPC17_SPEED_100 ? 100 : 10,
(priv->lp_mode & LPC17_DUPLEX_MASK) == LPC17_DUPLEX_FULL ?"full" : "half");
diff --git a/arch/arm/src/lpc17xx/lpc17_gpdma.c b/arch/arm/src/lpc17xx/lpc17_gpdma.c
index 4a93267718d60943963442a9b5722f2aad35327b..7b692c2535a834fad863de9505003e99d8218f16 100644
--- a/arch/arm/src/lpc17xx/lpc17_gpdma.c
+++ b/arch/arm/src/lpc17xx/lpc17_gpdma.c
@@ -707,47 +707,47 @@ void lpc17_dmadump(DMA_HANDLE handle, const struct lpc17_dmaregs_s *regs,
/* Dump the sampled global DMA registers */
- dmadbg("Global GPDMA Registers: %s\n", msg);
- dmadbg(" INTST[%08x]: %08x\n",
+ dmaerr("Global GPDMA Registers: %s\n", msg);
+ dmaerr(" INTST[%08x]: %08x\n",
LPC17_DMA_INTST, regs->gbl.intst);
- dmadbg(" INTTCST[%08x]: %08x\n",
+ dmaerr(" INTTCST[%08x]: %08x\n",
LPC17_DMA_INTTCST, regs->gbl.inttcst);
- dmadbg(" INTERRST[%08x]: %08x\n",
+ dmaerr(" INTERRST[%08x]: %08x\n",
LPC17_DMA_INTERRST, regs->gbl.interrst);
- dmadbg(" RAWINTTCST[%08x]: %08x\n",
+ dmaerr(" RAWINTTCST[%08x]: %08x\n",
LPC17_DMA_RAWINTTCST, regs->gbl.rawinttcst);
- dmadbg(" RAWINTERRST[%08x]: %08x\n",
+ dmaerr(" RAWINTERRST[%08x]: %08x\n",
LPC17_DMA_RAWINTERRST, regs->gbl.rawinterrst);
- dmadbg(" ENBLDCHNS[%08x]: %08x\n",
+ dmaerr(" ENBLDCHNS[%08x]: %08x\n",
LPC17_DMA_ENBLDCHNS, regs->gbl.enbldchns);
- dmadbg(" SOFTBREQ[%08x]: %08x\n",
+ dmaerr(" SOFTBREQ[%08x]: %08x\n",
LPC17_DMA_SOFTBREQ, regs->gbl.softbreq);
- dmadbg(" SOFTSREQ[%08x]: %08x\n",
+ dmaerr(" SOFTSREQ[%08x]: %08x\n",
LPC17_DMA_SOFTSREQ, regs->gbl.softsreq);
- dmadbg(" SOFTLBREQ[%08x]: %08x\n",
+ dmaerr(" SOFTLBREQ[%08x]: %08x\n",
LPC17_DMA_SOFTLBREQ, regs->gbl.softlbreq);
- dmadbg(" SOFTLSREQ[%08x]: %08x\n",
+ dmaerr(" SOFTLSREQ[%08x]: %08x\n",
LPC17_DMA_SOFTLSREQ, regs->gbl.softlsreq);
- dmadbg(" CONFIG[%08x]: %08x\n",
+ dmaerr(" CONFIG[%08x]: %08x\n",
LPC17_DMA_CONFIG, regs->gbl.config);
- dmadbg(" SYNC[%08x]: %08x\n",
+ dmaerr(" SYNC[%08x]: %08x\n",
LPC17_DMA_SYNC, regs->gbl.sync);
/* Dump the DMA channel registers */
base = LPC17_DMACH_BASE((uint32_t)dmach->chn);
- dmadbg("Channel GPDMA Registers: %d\n", dmach->chn);
+ dmaerr("Channel GPDMA Registers: %d\n", dmach->chn);
- dmadbg(" SRCADDR[%08x]: %08x\n",
+ dmaerr(" SRCADDR[%08x]: %08x\n",
base + LPC17_DMACH_SRCADDR_OFFSET, regs->ch.srcaddr);
- dmadbg(" DESTADDR[%08x]: %08x\n",
+ dmaerr(" DESTADDR[%08x]: %08x\n",
base + LPC17_DMACH_DESTADDR_OFFSET, regs->ch.destaddr);
- dmadbg(" LLI[%08x]: %08x\n",
+ dmaerr(" LLI[%08x]: %08x\n",
base + LPC17_DMACH_LLI_OFFSET, regs->ch.lli);
- dmadbg(" CONTROL[%08x]: %08x\n",
+ dmaerr(" CONTROL[%08x]: %08x\n",
base + LPC17_DMACH_CONTROL_OFFSET, regs->ch.control);
- dmadbg(" CONFIG[%08x]: %08x\n",
+ dmaerr(" CONFIG[%08x]: %08x\n",
base + LPC17_DMACH_CONFIG_OFFSET, regs->ch.config);
}
#endif /* CONFIG_DEBUG_DMA */
diff --git a/arch/arm/src/lpc17xx/lpc17_gpiodbg.c b/arch/arm/src/lpc17xx/lpc17_gpiodbg.c
index fc6ce33162bee1d163bfc36700c33bd38b848b74..abe2534cdc4e35b9f0573dd35b5a0fcee1eb858e 100644
--- a/arch/arm/src/lpc17xx/lpc17_gpiodbg.c
+++ b/arch/arm/src/lpc17xx/lpc17_gpiodbg.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc17xx/lpc17_gpiodbg.c
*
- * Copyright (C) 2010-2011, 2013 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2010-2011, 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,6 +39,11 @@
#include
+/* Output debug info even if debug output is not selected. */
+
+#undef CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_INFO 1
+
#include
#include
#include
@@ -53,20 +58,12 @@
* Pre-processor Definitions
****************************************************************************/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_GPIO
#endif
#ifdef CONFIG_DEBUG_GPIO
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -157,32 +154,33 @@ int lpc17_dumpgpio(lpc17_pinset_t pinset, const char *msg)
/* The following requires exclusive access to the GPIO registers */
flags = enter_critical_section();
- lldbg("GPIO%c pin%d (pinset: %08x) -- %s\n",
- port + '0', pin, pinset, msg);
+ llinfo("GPIO%c pin%d (pinset: %08x) -- %s\n",
+ port + '0', pin, pinset, msg);
#if defined(LPC176x)
- lldbg(" PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n",
- pinsel, pinsel ? getreg32(pinsel) : 0,
- pinmode, pinmode ? getreg32(pinmode) : 0,
- g_odmode[port], getreg32(g_odmode[port]));
+ llinfo(" PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n",
+ pinsel, pinsel ? getreg32(pinsel) : 0,
+ pinmode, pinmode ? getreg32(pinmode) : 0,
+ g_odmode[port], getreg32(g_odmode[port]));
#elif defined(LPC178x)
- lldbg(" IOCON[%08x]: %08x\n", iocon, getreg32(iocon));
+ llinfo(" IOCON[%08x]: %08x\n", iocon, getreg32(iocon));
#endif
base = g_fiobase[port];
- lldbg(" FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n",
- base+LPC17_FIO_DIR_OFFSET, getreg32(base+LPC17_FIO_DIR_OFFSET),
- base+LPC17_FIO_MASK_OFFSET, getreg32(base+LPC17_FIO_MASK_OFFSET),
- base+LPC17_FIO_PIN_OFFSET, getreg32(base+LPC17_FIO_PIN_OFFSET));
+ llinfo(" FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n",
+ base+LPC17_FIO_DIR_OFFSET, getreg32(base+LPC17_FIO_DIR_OFFSET),
+ base+LPC17_FIO_MASK_OFFSET, getreg32(base+LPC17_FIO_MASK_OFFSET),
+ base+LPC17_FIO_PIN_OFFSET, getreg32(base+LPC17_FIO_PIN_OFFSET));
base = g_intbase[port];
- lldbg(" IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n",
- LPC17_GPIOINT_IOINTSTATUS, getreg32(LPC17_GPIOINT_IOINTSTATUS),
- base+LPC17_GPIOINT_INTSTATR_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATR_OFFSET),
- base+LPC17_GPIOINT_INTSTATF_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATF_OFFSET));
- lldbg(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
- base+LPC17_GPIOINT_INTENR_OFFSET, getreg32(base+LPC17_GPIOINT_INTENR_OFFSET),
- base+LPC17_GPIOINT_INTENF_OFFSET, getreg32(base+LPC17_GPIOINT_INTENF_OFFSET));
+ llinfo(" IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n",
+ LPC17_GPIOINT_IOINTSTATUS, getreg32(LPC17_GPIOINT_IOINTSTATUS),
+ base+LPC17_GPIOINT_INTSTATR_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATR_OFFSET),
+ base+LPC17_GPIOINT_INTSTATF_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATF_OFFSET));
+ llinfo(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
+ base+LPC17_GPIOINT_INTENR_OFFSET, getreg32(base+LPC17_GPIOINT_INTENR_OFFSET),
+ base+LPC17_GPIOINT_INTENF_OFFSET, getreg32(base+LPC17_GPIOINT_INTENF_OFFSET));
+
leave_critical_section(flags);
return OK;
}
diff --git a/arch/arm/src/lpc17xx/lpc17_i2c.c b/arch/arm/src/lpc17xx/lpc17_i2c.c
index 9b106fdda4e813e2c237fdb1f4f491befa1fc228..7b5346e9f3cbd0fe1ffb9593c71365b823b24470 100644
--- a/arch/arm/src/lpc17xx/lpc17_i2c.c
+++ b/arch/arm/src/lpc17xx/lpc17_i2c.c
@@ -485,7 +485,7 @@ struct i2c_master_s *lpc17_i2cbus_initialize(int port)
if (port > 1)
{
- dbg("lpc I2C Only support 0,1\n");
+ err("lpc I2C Only support 0,1\n");
return NULL;
}
diff --git a/arch/arm/src/lpc17xx/lpc17_irq.c b/arch/arm/src/lpc17xx/lpc17_irq.c
index d1f72be399a9bdd1a7c93424e19fe7e50eca7ed1..9029d7b1c260e85043f459670ae4d5566894b103 100644
--- a/arch/arm/src/lpc17xx/lpc17_irq.c
+++ b/arch/arm/src/lpc17xx/lpc17_irq.c
@@ -108,25 +108,25 @@ static void lpc17_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" INTCTRL: %08x VECTAB: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+ llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
- lldbg(" IRQ ENABLE: %08x\n", getreg32(NVIC_IRQ0_31_ENABLE));
- lldbg(" SYSH_PRIO: %08x %08x %08x\n",
+ llerr(" IRQ ENABLE: %08x\n", getreg32(NVIC_IRQ0_31_ENABLE));
+ llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
leave_critical_section(flags);
@@ -137,7 +137,7 @@ static void lpc17_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: lpc17_nmi, lpc17_busfault, lpc17_usagefault, lpc17_pendsv,
- * lpc17_dbgmonitor, lpc17_pendsv, lpc17_reserved
+ * lpc17_errmonitor, lpc17_pendsv, lpc17_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@@ -146,11 +146,11 @@ static void lpc17_dumpnvic(const char *msg, int irq)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int lpc17_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -158,7 +158,7 @@ static int lpc17_nmi(int irq, FAR void *context)
static int lpc17_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Bus fault recived\n");
+ err("PANIC!!! Bus fault recived\n");
PANIC();
return 0;
}
@@ -166,7 +166,7 @@ static int lpc17_busfault(int irq, FAR void *context)
static int lpc17_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Usage fault received\n");
+ err("PANIC!!! Usage fault received\n");
PANIC();
return 0;
}
@@ -174,15 +174,15 @@ static int lpc17_usagefault(int irq, FAR void *context)
static int lpc17_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
-static int lpc17_dbgmonitor(int irq, FAR void *context)
+static int lpc17_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Debug Monitor received\n");
+ err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@@ -190,7 +190,7 @@ static int lpc17_dbgmonitor(int irq, FAR void *context)
static int lpc17_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -392,7 +392,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(LPC17_IRQ_NMI, lpc17_nmi);
#ifndef CONFIG_ARM_MPU
irq_attach(LPC17_IRQ_MEMFAULT, up_memfault);
@@ -400,7 +400,7 @@ void up_irqinitialize(void)
irq_attach(LPC17_IRQ_BUSFAULT, lpc17_busfault);
irq_attach(LPC17_IRQ_USAGEFAULT, lpc17_usagefault);
irq_attach(LPC17_IRQ_PENDSV, lpc17_pendsv);
- irq_attach(LPC17_IRQ_DBGMONITOR, lpc17_dbgmonitor);
+ irq_attach(LPC17_IRQ_DBGMONITOR, lpc17_errmonitor);
irq_attach(LPC17_IRQ_RESERVED, lpc17_reserved);
#endif
diff --git a/arch/arm/src/lpc17xx/lpc17_lcd.c b/arch/arm/src/lpc17xx/lpc17_lcd.c
index 79be36191caab688dfce9ed204fdd0bb85dcfbf6..5abf5d319ed665509dc17e35e26d977812494090 100644
--- a/arch/arm/src/lpc17xx/lpc17_lcd.c
+++ b/arch/arm/src/lpc17xx/lpc17_lcd.c
@@ -202,14 +202,14 @@ struct fb_vtable_s g_fbobject =
static int lpc17_getvideoinfo(FAR struct fb_vtable_s *vtable,
FAR struct fb_videoinfo_s *vinfo)
{
- gvdbg("vtable=%p vinfo=%p\n", vtable, vinfo);
+ ginfo("vtable=%p vinfo=%p\n", vtable, vinfo);
if (vtable && vinfo)
{
memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -220,14 +220,14 @@ static int lpc17_getvideoinfo(FAR struct fb_vtable_s *vtable,
static int lpc17_getplaneinfo(FAR struct fb_vtable_s *vtable, int planeno,
FAR struct fb_planeinfo_s *pinfo)
{
- gvdbg("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
+ ginfo("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
if (vtable && planeno == 0 && pinfo)
{
memcpy(pinfo, &g_planeinfo, sizeof(struct fb_planeinfo_s));
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -244,7 +244,7 @@ static int lpc17_getcmap(FAR struct fb_vtable_s *vtable,
int last;
int i;
- gvdbg("vtable=%p cmap=%p first=%d len=%d\n",
+ ginfo("vtable=%p cmap=%p first=%d len=%d\n",
vtable, cmap, cmap->first, cmap->len);
DEBUGASSERT(vtable && cmap &&
@@ -319,7 +319,7 @@ static int lpc17_putcmap(FAR struct fb_vtable_s *vtable,
int last;
int i;
- gvdbg("vtable=%p cmap=%p first=%d len=%d\n",
+ ginfo("vtable=%p cmap=%p first=%d len=%d\n",
vtable, cmap, cmap->first, cmap->len);
DEBUGASSERT(vtable && cmap);
@@ -383,27 +383,27 @@ static int lpc17_putcmap(FAR struct fb_vtable_s *vtable,
static int lpc17_getcursor(FAR struct fb_vtable_s *vtable,
FAR struct fb_cursorattrib_s *attrib)
{
- gvdbg("vtable=%p attrib=%p\n", vtable, attrib);
+ ginfo("vtable=%p attrib=%p\n", vtable, attrib);
if (vtable && attrib)
{
#ifdef CONFIG_FB_HWCURSORIMAGE
attrib->fmt = LPC17_COLOR_FMT;
#endif
- gvdbg("pos: (x=%d, y=%d)\n", g_cpos.x, g_cpos.y);
+ ginfo("pos: (x=%d, y=%d)\n", g_cpos.x, g_cpos.y);
attrib->pos = g_cpos;
#ifdef CONFIG_FB_HWCURSORSIZE
attrib->mxsize.h = CONFIG_LPC17_LCD_VHEIGHT;
attrib->mxsize.w = CONFIG_LPC17_LCD_HWIDTH;
- gvdbg("size: (h=%d, w=%d)\n", g_csize.h, g_csize.w);
+ ginfo("size: (h=%d, w=%d)\n", g_csize.h, g_csize.w);
attrib->size = g_csize;
#endif
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
#endif
@@ -416,26 +416,26 @@ static int lpc17_getcursor(FAR struct fb_vtable_s *vtable,
static int lpc17_setcursor(FAR struct fb_vtable_s *vtable,
FAR struct fb_setcursor_s *setttings)
{
- gvdbg("vtable=%p setttings=%p\n", vtable, setttings);
+ ginfo("vtable=%p setttings=%p\n", vtable, setttings);
if (vtable && setttings)
{
- gvdbg("flags: %02x\n", settings->flags);
+ ginfo("flags: %02x\n", settings->flags);
if ((flags & FB_CUR_SETPOSITION) != 0)
{
g_cpos = settings->pos;
- gvdbg("pos: (h:%d, w:%d)\n", g_cpos.x, g_cpos.y);
+ ginfo("pos: (h:%d, w:%d)\n", g_cpos.x, g_cpos.y);
}
#ifdef CONFIG_FB_HWCURSORSIZE
if ((flags & FB_CUR_SETSIZE) != 0)
{
g_csize = settings->size;
- gvdbg("size: (h:%d, w:%d)\n", g_csize.h, g_csize.w);
+ ginfo("size: (h:%d, w:%d)\n", g_csize.h, g_csize.w);
}
#endif
#ifdef CONFIG_FB_HWCURSORIMAGE
if ((flags & FB_CUR_SETIMAGE) != 0)
{
- gvdbg("image: (h:%d, w:%d) @ %p\n",
+ ginfo("image: (h:%d, w:%d) @ %p\n",
settings->img.height, settings->img.width,
settings->img.image);
}
@@ -443,7 +443,7 @@ static int lpc17_setcursor(FAR struct fb_vtable_s *vtable,
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
#endif
@@ -473,7 +473,7 @@ int up_fbinitialize(int display)
uint32_t regval;
int i;
- gvdbg("Entry\n");
+ ginfo("Entry\n");
/* Give LCD bus priority */
@@ -485,7 +485,7 @@ int up_fbinitialize(int display)
/* Configure pins */
/* Video data */
- gvdbg("Configuring pins\n");
+ ginfo("Configuring pins\n");
lpc17_configgpio(GPIO_LCD_VD0);
lpc17_configgpio(GPIO_LCD_VD1);
@@ -528,7 +528,7 @@ int up_fbinitialize(int display)
modifyreg32(LPC17_SYSCON_PCONP, 0, SYSCON_PCONP_PCLCD);
- gvdbg("Configuring the LCD controller\n");
+ ginfo("Configuring the LCD controller\n");
/* Disable the cursor */
@@ -686,7 +686,7 @@ int up_fbinitialize(int display)
#endif
putreg32(0, LPC17_LCD_INTMSK);
- gvdbg("Enabling the display\n");
+ ginfo("Enabling the display\n");
for (i = LPC17_LCD_PWREN_DELAY; i; i--);
@@ -727,7 +727,7 @@ int up_fbinitialize(int display)
FAR struct fb_vtable_s *up_fbgetvplane(int display, int vplane)
{
- gvdbg("vplane: %d\n", vplane);
+ ginfo("vplane: %d\n", vplane);
if (vplane == 0)
{
return &g_fbobject;
@@ -801,14 +801,14 @@ void lpc17_lcdclear(nxgl_mxpixel_t color)
#if LPC17_BPP > 16
uint32_t *dest = (uint32_t *)CONFIG_LPC17_LCD_VRAMBASE;
- gvdbg("Clearing display: color=%08x VRAM=%08x size=%d\n",
+ ginfo("Clearing display: color=%08x VRAM=%08x size=%d\n",
color, CONFIG_LPC17_LCD_VRAMBASE,
CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT * sizeof(uint32_t));
#else
uint16_t *dest = (uint16_t *)CONFIG_LPC17_LCD_VRAMBASE;
- gvdbg("Clearing display: color=%08x VRAM=%08x size=%d\n",
+ ginfo("Clearing display: color=%08x VRAM=%08x size=%d\n",
color, CONFIG_LPC17_LCD_VRAMBASE,
CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT * sizeof(uint16_t));
#endif
diff --git a/arch/arm/src/lpc17xx/lpc17_mcpwm.c b/arch/arm/src/lpc17xx/lpc17_mcpwm.c
index f8d552941b04a34992b0d2a9898ad0c1b16b08f0..0d0f1db15a7723ff1bd228e4b143ebe35a6a112b 100644
--- a/arch/arm/src/lpc17xx/lpc17_mcpwm.c
+++ b/arch/arm/src/lpc17xx/lpc17_mcpwm.c
@@ -83,27 +83,27 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing PWM */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_PWM
#endif
#ifdef CONFIG_DEBUG_PWM
-# define pwmdbg dbg
-# define pwmlldbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define pwmvdbg vdbg
-# define pwmllvdbg llvdbg
+# define pwmerr err
+# define pwmllerr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define pwminfo info
+# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
# else
-# define pwmlldbg(x...)
-# define pwmllvdbg(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
-# define pwmdbg(x...)
-# define pwmlldbg(x...)
-# define pwmvdbg(x...)
-# define pwmllvdbg(x...)
+# define pwmerr(x...)
+# define pwmllerr(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
#endif
@@ -132,7 +132,7 @@ struct lpc17_mcpwmtimer_s
static uint32_t mcpwm_getreg(struct lpc17_mcpwmtimer_s *priv, int offset);
static void mcpwm_putreg(struct lpc17_mcpwmtimer_s *priv, int offset, uint32_t value);
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void mcpwm_dumpregs(struct lpc17_mcpwmtimer_s *priv, FAR const char *msg);
#else
# define mcpwm_dumpregs(priv,msg)
@@ -242,12 +242,12 @@ static void mcpwm_putreg(struct lpc17_mcpwmtimer_s *priv, int offset, uint32_t v
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void mcpwm_dumpregs(FAR struct lpc17_mcpwmtimer_s *priv,
FAR const char *msg)
{
- pwmvdbg("%s:\n", msg);
- pwmvdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
+ pwminfo("%s:\n", msg);
+ pwminfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
mcpwm_getreg(priv, LPC17_PWM_MR0_OFFSET),
mcpwm_getreg(priv, LPC17_PWM_MR1_OFFSET),
mcpwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -255,7 +255,7 @@ static void mcpwm_dumpregs(FAR struct lpc17_mcpwmtimer_s *priv,
#if defined(CONFIG_LPC17_MCPWM)
if (priv->timtype == TIMTYPE_ADVANCED)
{
- pwmvdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
+ pwminfo(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
mcpwm_getreg(priv, LPC17_PWM_MR0_OFFSET),
mcpwm_getreg(priv, LPC17_PWM_MR1_OFFSET),
mcpwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -264,7 +264,7 @@ static void mcpwm_dumpregs(FAR struct lpc17_mcpwmtimer_s *priv,
else
#endif
{
- pwmvdbg(" DCR: %04x DMAR: %04x\n",
+ pwminfo(" DCR: %04x DMAR: %04x\n",
mcpwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
mcpwm_getreg(priv, LPC17_PWM_MR3_OFFSET));
}
@@ -520,7 +520,7 @@ static int mcpwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct lpc17_mcpwmtimer_s *priv = (FAR struct lpc17_mcpwmtimer_s *)dev;
uint32_t pincfg;
- pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
+ pwminfo("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
/* Make sure that the output has been stopped */
@@ -576,7 +576,7 @@ static int mcpwm_stop(FAR struct pwm_lowerhalf_s *dev)
uint32_t regval;
irqstate_t flags;
- pwmvdbg("TIM%d\n", priv->timid);
+ pwminfo("TIM%d\n", priv->timid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@@ -602,7 +602,7 @@ static int mcpwm_stop(FAR struct pwm_lowerhalf_s *dev)
leave_critical_section(flags);
- pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+ pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
mcpwm_dumpregs(priv, "After stop");
return OK;
}
@@ -630,7 +630,7 @@ static int mcpwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long a
/* There are no platform-specific ioctl commands */
- pwmvdbg("TIM%d\n", priv->timid);
+ pwminfo("TIM%d\n", priv->timid);
#endif
return -ENOTTY;
}
@@ -660,7 +660,7 @@ FAR struct pwm_lowerhalf_s *lpc17_mcpwminitialize(int timer)
{
FAR struct lpc17_mcpwmtimer_s *lower;
- pwmvdbg("TIM%d\n", timer);
+ pwminfo("TIM%d\n", timer);
switch (timer)
{
@@ -674,7 +674,7 @@ FAR struct pwm_lowerhalf_s *lpc17_mcpwminitialize(int timer)
#endif
default:
- pwmdbg("No such timer configured\n");
+ pwmerr("No such timer configured\n");
return NULL;
}
diff --git a/arch/arm/src/lpc17xx/lpc17_pwm.c b/arch/arm/src/lpc17xx/lpc17_pwm.c
index 4f8c79315c607a6735ed60a78c710389a909f2fb..2d668b07b232b4cc305ee3b85e0c155debab9a26 100644
--- a/arch/arm/src/lpc17xx/lpc17_pwm.c
+++ b/arch/arm/src/lpc17xx/lpc17_pwm.c
@@ -101,27 +101,27 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing PWM */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_PWM
#endif
#ifdef CONFIG_DEBUG_PWM
-# define pwmdbg dbg
-# define pwmlldbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define pwmvdbg vdbg
-# define pwmllvdbg llvdbg
+# define pwmerr err
+# define pwmllerr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define pwminfo info
+# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
# else
-# define pwmlldbg(x...)
-# define pwmllvdbg(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
-# define pwmdbg(x...)
-# define pwmlldbg(x...)
-# define pwmvdbg(x...)
-# define pwmllvdbg(x...)
+# define pwmerr(x...)
+# define pwmllerr(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
#endif
@@ -150,7 +150,7 @@ struct lpc17_pwmtimer_s
static uint32_t pwm_getreg(struct lpc17_pwmtimer_s *priv, int offset);
static void pwm_putreg(struct lpc17_pwmtimer_s *priv, int offset, uint32_t value);
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void pwm_dumpregs(struct lpc17_pwmtimer_s *priv, FAR const char *msg);
#else
# define pwm_dumpregs(priv,msg)
@@ -258,11 +258,11 @@ static void pwm_putreg(struct lpc17_pwmtimer_s *priv, int offset, uint32_t value
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void pwm_dumpregs(struct lpc17_pwmtimer_s *priv, FAR const char *msg)
{
- pwmvdbg("%s:\n", msg);
- pwmvdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
+ pwminfo("%s:\n", msg);
+ pwminfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
pwm_getreg(priv, LPC17_PWM_MR0_OFFSET),
pwm_getreg(priv, LPC17_PWM_MR1_OFFSET),
pwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -270,7 +270,7 @@ static void pwm_dumpregs(struct lpc17_pwmtimer_s *priv, FAR const char *msg)
#if defined(CONFIG_LPC17_PWM1)
if (priv->timtype == TIMTYPE_ADVANCED)
{
- pwmvdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
+ pwminfo(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
pwm_getreg(priv, LPC17_PWM_MR0_OFFSET),
pwm_getreg(priv, LPC17_PWM_MR1_OFFSET),
pwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -279,7 +279,7 @@ static void pwm_dumpregs(struct lpc17_pwmtimer_s *priv, FAR const char *msg)
else
#endif
{
- pwmvdbg(" DCR: %04x DMAR: %04x\n",
+ pwminfo(" DCR: %04x DMAR: %04x\n",
pwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
pwm_getreg(priv, LPC17_PWM_MR3_OFFSET));
}
@@ -491,7 +491,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct lpc17_pwmtimer_s *priv = (FAR struct lpc17_pwmtimer_s *)dev;
uint32_t pincfg;
- pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
+ pwminfo("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
/* Make sure that the output has been stopped */
@@ -547,7 +547,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
uint32_t regval;
irqstate_t flags;
- pwmvdbg("TIM%d\n", priv->timid);
+ pwminfo("TIM%d\n", priv->timid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@@ -573,7 +573,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
leave_critical_section(flags);
- pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+ pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
pwm_dumpregs(priv, "After stop");
return OK;
}
@@ -601,7 +601,7 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg
/* There are no platform-specific ioctl commands */
- pwmvdbg("TIM%d\n", priv->timid);
+ pwminfo("TIM%d\n", priv->timid);
#endif
return -ENOTTY;
}
@@ -631,7 +631,7 @@ FAR struct pwm_lowerhalf_s *lpc17_pwminitialize(int timer)
{
FAR struct lpc17_pwmtimer_s *lower;
- pwmvdbg("TIM%d\n", timer);
+ pwminfo("TIM%d\n", timer);
switch (timer)
{
@@ -645,7 +645,7 @@ FAR struct pwm_lowerhalf_s *lpc17_pwminitialize(int timer)
#endif
default:
- pwmdbg("No such timer configured\n");
+ pwmerr("No such timer configured\n");
return NULL;
}
diff --git a/arch/arm/src/lpc17xx/lpc17_sdcard.c b/arch/arm/src/lpc17xx/lpc17_sdcard.c
index e6cb9fafd7e117537fe3b192aa14db5255c3601b..1143d4ca1fb821affaf280982cd1b45b2057438e 100644
--- a/arch/arm/src/lpc17xx/lpc17_sdcard.c
+++ b/arch/arm/src/lpc17xx/lpc17_sdcard.c
@@ -94,7 +94,7 @@
* operate with only a single data line (the default is to use all
* 4 SD data lines).
* CONFIG_DEBUG_SDIO - Enables some very low-level debug output
- * This also requires CONFIG_DEBUG_FS and CONFIG_DEBUG_VERBOSE
+ * This also requires CONFIG_DEBUG_FS and CONFIG_DEBUG_INFO
*/
#if defined(CONFIG_SDIO_DMA) && !defined(CONFIG_LPC17_GPDMA)
@@ -109,7 +109,7 @@
# error "Callback support requires CONFIG_SCHED_WORKQUEUE"
#endif
-#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG)
+#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_FEATURES)
# undef CONFIG_DEBUG_SDIO
#endif
@@ -529,7 +529,7 @@ static inline void lpc17_setclock(uint32_t clkcr)
regval |= clkcr;
putreg32(regval, LPC17_SDCARD_CLOCK);
- fvdbg("CLKCR: %08x PWR: %08x\n",
+ finfo("CLKCR: %08x PWR: %08x\n",
getreg32(LPC17_SDCARD_CLOCK), getreg32(LPC17_SDCARD_PWR));
}
@@ -722,16 +722,16 @@ static void lpc17_sample(struct lpc17_dev_s *priv, int index)
#ifdef CONFIG_DEBUG_SDIO
static void lpc17_sdcard_dump(struct lpc17_sdcard_regs_s *regs, const char *msg)
{
- fdbg("SD Card Registers: %s\n", msg);
- fdbg(" POWER[%08x]: %08x\n", LPC17_SDCARD_PWR, regs->pwr);
- fdbg(" CLKCR[%08x]: %08x\n", LPC17_SDCARD_CLOCK, regs->clkcr);
- fdbg(" DCTRL[%08x]: %08x\n", LPC17_SDCARD_DCTRL, regs->dctrl);
- fdbg(" DTIMER[%08x]: %08x\n", LPC17_SDCARD_DTIMER, regs->dtimer);
- fdbg(" DLEN[%08x]: %08x\n", LPC17_SDCARD_DLEN, regs->dlen);
- fdbg(" DCOUNT[%08x]: %08x\n", LPC17_SDCARD_DCOUNT, regs->dcount);
- fdbg(" STA[%08x]: %08x\n", LPC17_SDCARD_STATUS, regs->sta);
- fdbg(" MASK[%08x]: %08x\n", LPC17_SDCARD_MASK0, regs->mask);
- fdbg("FIFOCNT[%08x]: %08x\n", LPC17_SDCARD_FIFOCNT, regs->fifocnt);
+ ferr("SD Card Registers: %s\n", msg);
+ ferr(" POWER[%08x]: %08x\n", LPC17_SDCARD_PWR, regs->pwr);
+ ferr(" CLKCR[%08x]: %08x\n", LPC17_SDCARD_CLOCK, regs->clkcr);
+ ferr(" DCTRL[%08x]: %08x\n", LPC17_SDCARD_DCTRL, regs->dctrl);
+ ferr(" DTIMER[%08x]: %08x\n", LPC17_SDCARD_DTIMER, regs->dtimer);
+ ferr(" DLEN[%08x]: %08x\n", LPC17_SDCARD_DLEN, regs->dlen);
+ ferr(" DCOUNT[%08x]: %08x\n", LPC17_SDCARD_DCOUNT, regs->dcount);
+ ferr(" STA[%08x]: %08x\n", LPC17_SDCARD_STATUS, regs->sta);
+ ferr(" MASK[%08x]: %08x\n", LPC17_SDCARD_MASK0, regs->mask);
+ ferr("FIFOCNT[%08x]: %08x\n", LPC17_SDCARD_FIFOCNT, regs->fifocnt);
}
#endif
@@ -813,7 +813,7 @@ static void lpc17_dmacallback(DMA_HANDLE handle, void *arg, int status)
if (status < 0)
{
- flldbg("DMA error %d, remaining: %d\n", status, priv->remaining);
+ fllerr("DMA error %d, remaining: %d\n", status, priv->remaining);
result = SDIOWAIT_ERROR;
}
else
@@ -1080,7 +1080,7 @@ static void lpc17_eventtimeout(int argc, uint32_t arg)
/* Yes.. wake up any waiting threads */
lpc17_endwait(priv, SDIOWAIT_TIMEOUT);
- flldbg("Timeout: remaining: %d\n", priv->remaining);
+ fllerr("Timeout: remaining: %d\n", priv->remaining);
}
}
@@ -1297,7 +1297,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
- flldbg("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
+ fllerr("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@@ -1307,7 +1307,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
- flldbg("ERROR: Data timeout, remaining: %d\n", priv->remaining);
+ fllerr("ERROR: Data timeout, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT);
}
@@ -1317,7 +1317,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
- flldbg("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining);
+ fllerr("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@@ -1327,7 +1327,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
- flldbg("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining);
+ fllerr("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@@ -1337,7 +1337,7 @@ static int lpc17_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
- flldbg("ERROR: Start bit, remaining: %d\n", priv->remaining);
+ fllerr("ERROR: Start bit, remaining: %d\n", priv->remaining);
lpc17_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
}
@@ -1480,7 +1480,7 @@ static void lpc17_reset(FAR struct sdio_dev_s *dev)
lpc17_setpwrctrl(SDCARD_PWR_CTRL_ON);
leave_critical_section(flags);
- fvdbg("CLCKR: %08x POWER: %08x\n",
+ finfo("CLCKR: %08x POWER: %08x\n",
getreg32(LPC17_SDCARD_CLOCK), getreg32(LPC17_SDCARD_PWR));
}
@@ -1689,7 +1689,7 @@ static int lpc17_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t arg)
cmdidx = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT;
regval |= cmdidx | SDCARD_CMD_CPSMEN;
- fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+ finfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
/* Write the SD card CMD */
@@ -1920,7 +1920,7 @@ static int lpc17_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
{
if (--timeout <= 0)
{
- fdbg("ERROR: Timeout cmd: %08x events: %08x STA: %08x\n",
+ ferr("ERROR: Timeout cmd: %08x events: %08x STA: %08x\n",
cmd, events, getreg32(LPC17_SDCARD_STATUS));
return -ETIMEDOUT;
@@ -1955,7 +1955,7 @@ static int lpc17_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *rshort)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
uint32_t respcmd;
#endif
uint32_t regval;
@@ -1984,10 +1984,10 @@ static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!rshort)
{
- fdbg("ERROR: rshort=NULL\n");
+ ferr("ERROR: rshort=NULL\n");
ret = -EINVAL;
}
@@ -1997,7 +1997,7 @@ static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R1B_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R6_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2008,15 +2008,15 @@ static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
regval = getreg32(LPC17_SDCARD_STATUS);
if ((regval & SDCARD_STATUS_CTIMEOUT) != 0)
{
- fdbg("ERROR: Command timeout: %08x\n", regval);
+ ferr("ERROR: Command timeout: %08x\n", regval);
ret = -ETIMEDOUT;
}
else if ((regval & SDCARD_STATUS_CCRCFAIL) != 0)
{
- fdbg("ERROR: CRC failure: %08x\n", regval);
+ ferr("ERROR: CRC failure: %08x\n", regval);
ret = -EIO;
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
else
{
/* Check response received is of desired command */
@@ -2024,7 +2024,7 @@ static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
respcmd = getreg32(LPC17_SDCARD_RESPCMD);
if ((uint8_t)(respcmd & SDCARD_RESPCMD_MASK) != (cmd & MMCSD_CMDIDX_MASK))
{
- fdbg("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd);
+ ferr("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd);
ret = -EINVAL;
}
}
@@ -2052,12 +2052,12 @@ static int lpc17_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo
* 0 1 End bit
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Check that R1 is the correct response to this command */
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2068,12 +2068,12 @@ static int lpc17_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo
regval = getreg32(LPC17_SDCARD_STATUS);
if (regval & SDCARD_STATUS_CTIMEOUT)
{
- fdbg("ERROR: Timeout STA: %08x\n", regval);
+ ferr("ERROR: Timeout STA: %08x\n", regval);
ret = -ETIMEDOUT;
}
else if (regval & SDCARD_STATUS_CCRCFAIL)
{
- fdbg("ERROR: CRC fail STA: %08x\n", regval);
+ ferr("ERROR: CRC fail STA: %08x\n", regval);
ret = -EIO;
}
}
@@ -2107,11 +2107,11 @@ static int lpc17_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *r
/* Check that this is the correct response to this command */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2124,7 +2124,7 @@ static int lpc17_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *r
regval = getreg32(LPC17_SDCARD_STATUS);
if (regval & SDCARD_STATUS_CTIMEOUT)
{
- fdbg("ERROR: Timeout STA: %08x\n", regval);
+ ferr("ERROR: Timeout STA: %08x\n", regval);
ret = -ETIMEDOUT;
}
}
@@ -2269,7 +2269,7 @@ static sdio_eventset_t lpc17_eventwait(FAR struct sdio_dev_s *dev,
1, (uint32_t)priv);
if (ret != OK)
{
- fdbg("ERROR: wd_start failed: %d\n", ret);
+ ferr("ERROR: wd_start failed: %d\n", ret);
}
}
@@ -2341,7 +2341,7 @@ static void lpc17_callbackenable(FAR struct sdio_dev_s *dev,
{
struct lpc17_dev_s *priv = (struct lpc17_dev_s *)dev;
- fvdbg("eventset: %02x\n", eventset);
+ finfo("eventset: %02x\n", eventset);
DEBUGASSERT(priv != NULL);
priv->cbevents = eventset;
@@ -2377,7 +2377,7 @@ static int lpc17_registercallback(FAR struct sdio_dev_s *dev,
/* Disable callbacks and register this callback and is argument */
- fvdbg("Register %p(%p)\n", callback, arg);
+ finfo("Register %p(%p)\n", callback, arg);
DEBUGASSERT(priv != NULL);
priv->cbevents = 0;
@@ -2590,7 +2590,7 @@ static void lpc17_callback(void *arg)
/* Is a callback registered? */
DEBUGASSERT(priv != NULL);
- fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
+ finfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
if (priv->callback)
@@ -2635,14 +2635,14 @@ static void lpc17_callback(void *arg)
{
/* Yes.. queue it */
- fvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
+ finfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
(void)work_queue(HPWORK, &priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0);
}
else
{
/* No.. then just call the callback here */
- fvdbg("Callback to %p(%p)\n", priv->callback, priv->cbarg);
+ finfo("Callback to %p(%p)\n", priv->callback, priv->cbarg);
priv->callback(priv->cbarg);
}
}
@@ -2781,7 +2781,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
{
priv->cdstatus &= ~SDIO_STATUS_PRESENT;
}
- fvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
+ finfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
/* Perform any requested callback if the status has changed */
@@ -2824,7 +2824,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
{
priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
}
- fvdbg("cdstatus: %02x\n", priv->cdstatus);
+ finfo("cdstatus: %02x\n", priv->cdstatus);
leave_critical_section(flags);
}
#endif /* CONFIG_LPC17_SDCARD */
diff --git a/arch/arm/src/lpc17xx/lpc17_serial.c b/arch/arm/src/lpc17xx/lpc17_serial.c
index d0e2ceeecf93c6379e7850339d11e8d4ee0dccac..94a92873d21807f3f5f94df68baec8d450ce5ee7 100644
--- a/arch/arm/src/lpc17xx/lpc17_serial.c
+++ b/arch/arm/src/lpc17xx/lpc17_serial.c
@@ -1134,7 +1134,7 @@ static int up_interrupt(int irq, void *context)
/* Read the modem status register (MSR) to clear */
status = up_serialin(priv, LPC17_UART_MSR_OFFSET);
- vdbg("MSR: %02x\n", status);
+ info("MSR: %02x\n", status);
break;
}
@@ -1145,7 +1145,7 @@ static int up_interrupt(int irq, void *context)
/* Read the line status register (LSR) to clear */
status = up_serialin(priv, LPC17_UART_LSR_OFFSET);
- vdbg("LSR: %02x\n", status);
+ info("LSR: %02x\n", status);
break;
}
@@ -1153,7 +1153,7 @@ static int up_interrupt(int irq, void *context)
default:
{
- dbg("Unexpected IIR: %02x\n", status);
+ err("Unexpected IIR: %02x\n", status);
break;
}
}
diff --git a/arch/arm/src/lpc17xx/lpc17_spi.c b/arch/arm/src/lpc17xx/lpc17_spi.c
index c915d1dfc2328944b2967d684523ff9c35abf9d2..a3a4f28b0fc76d72a17372e4b9b9c8eefb1b2edb 100644
--- a/arch/arm/src/lpc17xx/lpc17_spi.c
+++ b/arch/arm/src/lpc17xx/lpc17_spi.c
@@ -74,21 +74,21 @@
/* Debug ********************************************************************/
/* The following enable debug output from this file:
*
- * CONFIG_DEBUG - Define to enable general debug features
- * CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG)
- * CONFIG_DEBUG_VERBOSE - Define to enable verbose SSP debug
+ * CONFIG_DEBUG_FEATURES - Define to enable general debug features
+ * CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG_FEATURES)
+ * CONFIG_DEBUG_INFO - Define to enable verbose SSP debug
*/
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
+# define spierr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define spiinfo llerr
# else
-# define spivdbg(x...)
+# define spiinfo(x...)
# endif
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiinfo(x...)
#endif
/* SSP Clocking *************************************************************/
@@ -287,7 +287,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
- spidbg("Frequency %d->%d\n", frequency, actual);
+ spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -449,7 +449,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
uint8_t data;
- spidbg("nwords: %d\n", nwords);
+ spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write the data to transmitted to the SPI Data Register */
@@ -494,7 +494,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
{
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
- spidbg("nwords: %d\n", nwords);
+ spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write some dummy data to the SPI Data Register in order to clock the
diff --git a/arch/arm/src/lpc17xx/lpc17_ssp.c b/arch/arm/src/lpc17xx/lpc17_ssp.c
index 9cdee092423c8c8320d84242a56a8b5c8f7d5b58..25d2ef42ffe9212c9462c68c5c448567079460bd 100644
--- a/arch/arm/src/lpc17xx/lpc17_ssp.c
+++ b/arch/arm/src/lpc17xx/lpc17_ssp.c
@@ -75,21 +75,21 @@
/* Debug ********************************************************************/
/* The following enable debug output from this file:
*
- * CONFIG_DEBUG - Define to enable general debug features
- * CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG)
- * CONFIG_DEBUG_VERBOSE - Define to enable verbose SSP debug
+ * CONFIG_DEBUG_FEATURES - Define to enable general debug features
+ * CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG_FEATURES)
+ * CONFIG_DEBUG_INFO - Define to enable verbose SSP debug
*/
#ifdef CONFIG_DEBUG_SPI
-# define sspdbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
+# define ssperr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define spiinfo llerr
# else
-# define spivdbg(x...)
+# define spiinfo(x...)
# endif
#else
-# define sspdbg(x...)
-# define spivdbg(x...)
+# define ssperr(x...)
+# define spiinfo(x...)
#endif
/* SSP Clocking *************************************************************/
@@ -470,7 +470,7 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
- sspdbg("Frequency %d->%d\n", frequency, actual);
+ ssperr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -521,7 +521,7 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
break;
default:
- sspdbg("Bad mode: %d\n", mode);
+ ssperr("Bad mode: %d\n", mode);
DEBUGASSERT(FALSE);
return;
}
@@ -609,7 +609,7 @@ static uint16_t ssp_send(FAR struct spi_dev_s *dev, uint16_t wd)
/* Get the value from the RX FIFO and return it */
regval = ssp_getreg(priv, LPC17_SSP_DR_OFFSET);
- sspdbg("%04x->%04x\n", wd, regval);
+ ssperr("%04x->%04x\n", wd, regval);
return (uint16_t)regval;
}
@@ -646,7 +646,7 @@ static void ssp_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
/* Loop while thre are bytes remaining to be sent */
- sspdbg("nwords: %d\n", nwords);
+ ssperr("nwords: %d\n", nwords);
u.pv = buffer;
while (nwords > 0)
{
@@ -674,7 +674,7 @@ static void ssp_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
/* Then discard all card responses until the RX & TX FIFOs are emptied. */
- sspdbg("discarding\n");
+ ssperr("discarding\n");
do
{
/* Is there anything in the RX fifo? */
@@ -735,7 +735,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
/* While there is remaining to be sent (and no synchronization error has occurred) */
- sspdbg("nwords: %d\n", nwords);
+ ssperr("nwords: %d\n", nwords);
u.pv = buffer;
while (nwords || rxpending)
{
@@ -745,7 +745,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
* and (3) there are more bytes to be sent.
*/
- spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
+ spiinfo("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
while ((ssp_getreg(priv, LPC17_SSP_SR_OFFSET) & SSP_SR_TNF) &&
(rxpending < LPC17_SSP_FIFOSZ) && nwords)
{
@@ -756,7 +756,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
/* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */
- spivdbg("RX: rxpending: %d\n", rxpending);
+ spiinfo("RX: rxpending: %d\n", rxpending);
while (ssp_getreg(priv, LPC17_SSP_SR_OFFSET) & SSP_SR_RNE)
{
data = (uint8_t)ssp_getreg(priv, LPC17_SSP_DR_OFFSET);
diff --git a/arch/arm/src/lpc17xx/lpc17_start.c b/arch/arm/src/lpc17xx/lpc17_start.c
index 8d95518d02d3db2e930b93ff0e956cb4e8eba1e2..3a0ae1d70554331623ad0447b8a4df2949941ed5 100644
--- a/arch/arm/src/lpc17xx/lpc17_start.c
+++ b/arch/arm/src/lpc17xx/lpc17_start.c
@@ -82,7 +82,7 @@
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# define showprogress(c) up_lowputc(c)
#else
# define showprogress(c)
diff --git a/arch/arm/src/lpc17xx/lpc17_timer.c b/arch/arm/src/lpc17xx/lpc17_timer.c
index b4a821ffc0b97e507b807ef877fc715e54b22249..d609b1f4f599df9f69b3f2b29320ffee61c66ff1 100644
--- a/arch/arm/src/lpc17xx/lpc17_timer.c
+++ b/arch/arm/src/lpc17xx/lpc17_timer.c
@@ -84,27 +84,27 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing PWM */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_PWM
#endif
#ifdef CONFIG_DEBUG_PWM
-# define pwmdbg dbg
-# define pwmlldbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define pwmvdbg vdbg
-# define pwmllvdbg llvdbg
+# define pwmerr err
+# define pwmllerr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define pwminfo info
+# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
# else
-# define pwmlldbg(x...)
-# define pwmllvdbg(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
-# define pwmdbg(x...)
-# define pwmlldbg(x...)
-# define pwmvdbg(x...)
-# define pwmllvdbg(x...)
+# define pwmerr(x...)
+# define pwmllerr(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
#endif
@@ -133,7 +133,7 @@ struct lpc17_timer_s
static uint32_t timer_getreg(struct lpc17_timer_s *priv, int offset);
static void timer_putreg(struct lpc17_timer_s *priv, int offset, uint32_t value);
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void timer_dumpregs(struct lpc17_timer_s *priv, FAR const char *msg);
#else
# define timer_dumpregs(priv,msg)
@@ -242,11 +242,11 @@ static void timer_putreg(struct lpc17_timer_s *priv, int offset,
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void timer_dumpregs(struct lpc17_timer_s *priv, FAR const char *msg)
{
- pwmdbg("%s:\n", msg);
- pwmdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
+ pwmerr("%s:\n", msg);
+ pwmerr(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
timer_getreg(priv, LPC17_PWM_MR0_OFFSET),
timer_getreg(priv, LPC17_PWM_MR1_OFFSET),
timer_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -254,7 +254,7 @@ static void timer_dumpregs(struct lpc17_timer_s *priv, FAR const char *msg)
#if defined(CONFIG_LPC17_TMR0)
if (priv->timtype == TIMTYPE_ADVANCED)
{
- pwmdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
+ pwmerr(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
timer_getreg(priv, LPC17_PWM_MR0_OFFSET),
timer_getreg(priv, LPC17_PWM_MR1_OFFSET),
timer_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -263,7 +263,7 @@ static void timer_dumpregs(struct lpc17_timer_s *priv, FAR const char *msg)
else
#endif
{
- pwmdbg(" DCR: %04x DMAR: %04x\n",
+ pwmerr(" DCR: %04x DMAR: %04x\n",
timer_getreg(priv, LPC17_PWM_MR2_OFFSET),
timer_getreg(priv, LPC17_PWM_MR3_OFFSET));
}
@@ -469,7 +469,7 @@ static int timer_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct lpc17_timer_s *priv = (FAR struct lpc17_timer_s *)dev;
uint32_t pincfg;
- pwmdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
+ pwmerr("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
/* Make sure that the output has been stopped */
@@ -525,7 +525,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
uint32_t regval;
irqstate_t flags;
- pwmdbg("TIM%d\n", priv->timid);
+ pwmerr("TIM%d\n", priv->timid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@@ -551,7 +551,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
leave_critical_section(flags);
- pwmdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+ pwmerr("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
timer_dumpregs(priv, "After stop");
return OK;
}
@@ -579,7 +579,7 @@ static int timer_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long a
/* There are no platform-specific ioctl commands */
- pwmdbg("TIM%d\n", priv->timid);
+ pwmerr("TIM%d\n", priv->timid);
#endif
return -ENOTTY;
}
@@ -609,7 +609,7 @@ FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer)
{
FAR struct lpc17_timer_s *lower;
- pwmdbg("TIM%d\n", timer);
+ pwmerr("TIM%d\n", timer);
switch (timer)
{
@@ -623,7 +623,7 @@ FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer)
#endif
default:
- pwmdbg("No such timer configured\n");
+ pwmerr("No such timer configured\n");
return NULL;
}
diff --git a/arch/arm/src/lpc17xx/lpc17_usbdev.c b/arch/arm/src/lpc17xx/lpc17_usbdev.c
index 9995e03cdaddbe25fae2b6051b41edeb0fe8cfc9..ef796bb0deb66e2bc6a8975a8b48ff1f19eb1344 100644
--- a/arch/arm/src/lpc17xx/lpc17_usbdev.c
+++ b/arch/arm/src/lpc17xx/lpc17_usbdev.c
@@ -99,7 +99,7 @@
# define USB_FRAME_INT 0
#endif
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
# define USB_ERROR_INT USBDEV_INT_ERRINT
#else
# undef CONFIG_LPC17_USBDEV_REGDEBUG
@@ -531,7 +531,7 @@ static struct lpc17_dmadesc_s g_usbddesc[CONFIG_LPC17_USBDEV_NDMADESCRIPTORS];
#ifdef CONFIG_LPC17_USBDEV_REGDEBUG
static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
- lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+ llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@@ -581,7 +581,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ llerr("[repeats %d more times]\n", count);
}
}
@@ -1076,7 +1076,7 @@ static int lpc17_wrrequest(struct lpc17_ep_s *privep)
return OK;
}
- ullvdbg("epphy=%d req=%p: len=%d xfrd=%d nullpkt=%d\n",
+ ullinfo("epphy=%d req=%p: len=%d xfrd=%d nullpkt=%d\n",
privep->epphy, privreq, privreq->req.len, privreq->req.xfrd, privep->txnullpkt);
/* Ignore any attempt to send a zero length packet on anything but EP0IN */
@@ -1185,7 +1185,7 @@ static int lpc17_rdrequest(struct lpc17_ep_s *privep)
return OK;
}
- ullvdbg("len=%d xfrd=%d nullpkt=%d\n",
+ ullinfo("len=%d xfrd=%d nullpkt=%d\n",
privreq->req.len, privreq->req.xfrd, privep->txnullpkt);
/* Ignore any attempt to receive a zero length packet */
@@ -1593,7 +1593,7 @@ static inline void lpc17_ep0setup(struct lpc17_usbdev_s *priv)
index = GETUINT16(ctrl.index);
len = GETUINT16(ctrl.len);
- ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ctrl.type, ctrl.req, value, index, len);
/* Dispatch any non-standard requests */
@@ -1739,7 +1739,7 @@ static inline void lpc17_ep0setup(struct lpc17_usbdev_s *priv)
if (((ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) &&
value == USB_FEATURE_TESTMODE)
{
- ullvdbg("test mode: %d\n", index);
+ ullinfo("test mode: %d\n", index);
}
else if ((ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
{
@@ -2090,7 +2090,7 @@ static int lpc17_usbinterrupt(int irq, FAR void *context)
#endif
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
/* USB engine error interrupt */
if ((devintstatus & USBDEV_INT_ERRINT) != 0)
@@ -2321,7 +2321,7 @@ static int lpc17_usbinterrupt(int irq, FAR void *context)
}
else
{
- ullvdbg("Pending data on OUT endpoint\n");
+ ullinfo("Pending data on OUT endpoint\n");
priv->rxpending = 1;
}
}
@@ -2412,7 +2412,7 @@ static int lpc17_dmasetup(struct lpc17_usbdev_s *priv, uint8_t epphy,
struct lpc17_dmadesc_s *dmadesc = priv;
uint32_t regval;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!priv || epphy < 2)
{
usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
@@ -2611,13 +2611,14 @@ static int lpc17_epdisable(FAR struct usbdev_ep_s *ep)
uint32_t mask = (1 << privep->epphy);
uint32_t regval;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!ep)
{
usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
return -EINVAL;
}
#endif
+
usbtrace(TRACE_EPDISABLE, privep->epphy);
/* Cancel any ongoing activity */
@@ -2653,13 +2654,14 @@ static FAR struct usbdev_req_s *lpc17_epallocreq(FAR struct usbdev_ep_s *ep)
{
FAR struct lpc17_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!ep)
{
usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
return NULL;
}
#endif
+
usbtrace(TRACE_EPALLOCREQ, ((FAR struct lpc17_ep_s *)ep)->epphy);
privreq = (FAR struct lpc17_req_s *)kmm_malloc(sizeof(struct lpc17_req_s));
@@ -2685,13 +2687,14 @@ static void lpc17_epfreereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
{
FAR struct lpc17_req_s *privreq = (FAR struct lpc17_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
return;
}
#endif
+
usbtrace(TRACE_EPFREEREQ, ((FAR struct lpc17_ep_s *)ep)->epphy);
kmm_free(privreq);
@@ -2793,11 +2796,11 @@ static int lpc17_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
irqstate_t flags;
int ret = OK;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
- ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+ ullinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
@@ -2878,7 +2881,7 @@ static int lpc17_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
FAR struct lpc17_ep_s *privep = (FAR struct lpc17_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
@@ -3142,7 +3145,7 @@ static int lpc17_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!dev)
{
usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
@@ -3406,7 +3409,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@@ -3456,7 +3459,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
{
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (driver != g_usbdev.driver)
{
usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/lpc17xx/lpc17_usbhost.c b/arch/arm/src/lpc17xx/lpc17_usbhost.c
index 94003be06d79178b5eb5ebb2299039e2c9e15713..c128b182179c050b30a950ebade3850748e49477 100644
--- a/arch/arm/src/lpc17xx/lpc17_usbhost.c
+++ b/arch/arm/src/lpc17xx/lpc17_usbhost.c
@@ -456,7 +456,7 @@ static struct lpc17_xfrinfo_s g_xfrbuffers[CONFIG_LPC17_USBHOST_NPREALLOC];
#ifdef CONFIG_LPC17_USBHOST_REGDEBUG
static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
- lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+ llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@@ -506,7 +506,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ llerr("[repeats %d more times]\n", count);
}
}
@@ -1192,7 +1192,7 @@ static inline int lpc17_addinted(struct lpc17_usbhost_s *priv,
interval = lpc17_getinterval(epdesc->interval);
ed->interval = interval;
- uvdbg("interval: %d->%d\n", epdesc->interval, interval);
+ uinfo("interval: %d->%d\n", epdesc->interval, interval);
/* Get the offset associated with the ED direction. IN EDs get the even
* entries, OUT EDs get the odd entries.
@@ -1225,7 +1225,7 @@ static inline int lpc17_addinted(struct lpc17_usbhost_s *priv,
interval = priv->outinterval;
}
}
- uvdbg("min interval: %d offset: %d\n", interval, offset);
+ uinfo("min interval: %d offset: %d\n", interval, offset);
/* Get the head of the first of the duplicated entries. The first offset
* entry is always guaranteed to contain the common ED list head.
@@ -1244,7 +1244,7 @@ static inline int lpc17_addinted(struct lpc17_usbhost_s *priv,
ed->hw.nexted = head;
lpc17_setinttab((uint32_t)ed, interval, offset);
- uvdbg("head: %08x next: %08x\n", ed, head);
+ uinfo("head: %08x next: %08x\n", ed, head);
/* Re-enabled periodic list processing */
@@ -1314,7 +1314,7 @@ static inline int lpc17_reminted(struct lpc17_usbhost_s *priv,
*/
head = (struct lpc17_ed_s *)HCCA->inttbl[offset];
- uvdbg("ed: %08x head: %08x next: %08x offset: %d\n",
+ uinfo("ed: %08x head: %08x next: %08x offset: %d\n",
ed, head, head ? head->hw.nexted : 0, offset);
/* Find the ED to be removed in the ED list */
@@ -1349,7 +1349,7 @@ static inline int lpc17_reminted(struct lpc17_usbhost_s *priv,
prev->hw.nexted = ed->hw.nexted;
}
- uvdbg("ed: %08x head: %08x next: %08x\n",
+ uinfo("ed: %08x head: %08x next: %08x\n",
ed, head, head ? head->hw.nexted : 0);
/* Calculate the new minimum interval for this list */
@@ -1363,7 +1363,7 @@ static inline int lpc17_reminted(struct lpc17_usbhost_s *priv,
}
}
- uvdbg("min interval: %d offset: %d\n", interval, offset);
+ uinfo("min interval: %d offset: %d\n", interval, offset);
/* Save the new minimum interval */
@@ -1547,7 +1547,7 @@ static int lpc17_ctrltd(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed,
xfrinfo = lpc17_alloc_xfrinfo();
if (xfrinfo == NULL)
{
- udbg("ERROR: lpc17_alloc_xfrinfo failed\n");
+ uerr("ERROR: lpc17_alloc_xfrinfo failed\n");
return -ENOMEM;
}
@@ -1566,7 +1566,7 @@ static int lpc17_ctrltd(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed,
ret = lpc17_wdhwait(priv, ed);
if (ret < 0)
{
- udbg("ERROR: Device disconnected\n");
+ uerr("ERROR: Device disconnected\n");
goto errout_with_xfrinfo;
}
@@ -1607,7 +1607,7 @@ static int lpc17_ctrltd(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed,
}
else
{
- udbg("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
+ uerr("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
ret = xfrinfo->tdstatus == TD_CC_STALL ? -EPERM : -EIO;
}
}
@@ -1642,7 +1642,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
intst = lpc17_getreg(LPC17_USBHOST_INTST);
regval = lpc17_getreg(LPC17_USBHOST_INTEN);
- ullvdbg("INST: %08x INTEN: %08x\n", intst, regval);
+ ullinfo("INST: %08x INTEN: %08x\n", intst, regval);
pending = intst & regval;
if (pending != 0)
@@ -1652,18 +1652,18 @@ static int lpc17_usbinterrupt(int irq, void *context)
if ((pending & OHCI_INT_RHSC) != 0)
{
uint32_t rhportst1 = lpc17_getreg(LPC17_USBHOST_RHPORTST1);
- ullvdbg("Root Hub Status Change, RHPORTST1: %08x\n", rhportst1);
+ ullinfo("Root Hub Status Change, RHPORTST1: %08x\n", rhportst1);
if ((rhportst1 & OHCI_RHPORTST_CSC) != 0)
{
uint32_t rhstatus = lpc17_getreg(LPC17_USBHOST_RHSTATUS);
- ullvdbg("Connect Status Change, RHSTATUS: %08x\n", rhstatus);
+ ullinfo("Connect Status Change, RHSTATUS: %08x\n", rhstatus);
/* If DRWE is set, Connect Status Change indicates a remote wake-up event */
if (rhstatus & OHCI_RHSTATUS_DRWE)
{
- ullvdbg("DRWE: Remote wake-up\n");
+ ullinfo("DRWE: Remote wake-up\n");
}
/* Otherwise... Not a remote wake-up event */
@@ -1680,7 +1680,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
{
/* Yes.. connected. */
- ullvdbg("Connected\n");
+ ullinfo("Connected\n");
priv->connected = true;
priv->change = true;
@@ -1694,7 +1694,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
}
else
{
- ulldbg("Spurious status change (connected)\n");
+ ullerr("Spurious status change (connected)\n");
}
/* The LSDA (Low speed device attached) bit is valid
@@ -1710,7 +1710,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
priv->rhport.hport.speed = USB_SPEED_FULL;
}
- ullvdbg("Speed:%d\n", priv->rhport.hport.speed);
+ ullinfo("Speed:%d\n", priv->rhport.hport.speed);
}
/* Check if we are now disconnected */
@@ -1719,7 +1719,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
{
/* Yes.. disconnect the device */
- ullvdbg("Disconnected\n");
+ ullinfo("Disconnected\n");
priv->connected = false;
priv->change = true;
@@ -1750,7 +1750,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
}
else
{
- ulldbg("Spurious status change (disconnected)\n");
+ ullerr("Spurious status change (disconnected)\n");
}
}
@@ -1830,7 +1830,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
{
/* The transfer failed for some reason... dump some diagnostic info. */
- ulldbg("ERROR: ED xfrtype:%d TD CTRL:%08x/CC:%d RHPORTST1:%08x\n",
+ ullerr("ERROR: ED xfrtype:%d TD CTRL:%08x/CC:%d RHPORTST1:%08x\n",
ed->xfrtype, td->hw.ctrl, xfrinfo->tdstatus,
lpc17_getreg(LPC17_USBHOST_RHPORTST1));
}
@@ -1894,7 +1894,7 @@ static int lpc17_usbinterrupt(int irq, void *context)
#ifdef CONFIG_DEBUG_USB
if ((pending & LPC17_DEBUG_INTS) != 0)
{
- ulldbg("ERROR: Unhandled interrupts INTST:%08x\n", intst);
+ ullerr("ERROR: Unhandled interrupts INTST:%08x\n", intst);
}
#endif
@@ -1967,7 +1967,7 @@ static int lpc17_wait(struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
- udbg("RHport Connected: %s\n",
+ uerr("RHport Connected: %s\n",
connport->connected ? "YES" : "NO");
return OK;
@@ -1987,7 +1987,7 @@ static int lpc17_wait(struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
- udbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
+ uerr("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
}
#endif
@@ -2041,7 +2041,7 @@ static int lpc17_rh_enumerate(struct usbhost_connection_s *conn,
{
/* No, return an error */
- udbg("Not connected\n");
+ uerr("Not connected\n");
return -ENODEV;
}
@@ -2089,11 +2089,11 @@ static int lpc17_enumerate(FAR struct usbhost_connection_s *conn,
/* Then let the common usbhost_enumerate do the real enumeration. */
- uvdbg("Enumerate the device\n");
+ uinfo("Enumerate the device\n");
ret = usbhost_enumerate(hport, &hport->devclass);
if (ret < 0)
{
- udbg("ERROR: Enumeration failed: %d\n", ret);
+ uerr("ERROR: Enumeration failed: %d\n", ret);
}
return ret;
@@ -2155,7 +2155,7 @@ static int lpc17_ep0configure(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
lpc17_givesem(&priv->exclsem);
- uvdbg("EP0 CTRL:%08x\n", ed->hw.ctrl);
+ uinfo("EP0 CTRL:%08x\n", ed->hw.ctrl);
return OK;
}
@@ -2255,7 +2255,7 @@ static int lpc17_epalloc(struct usbhost_driver_s *drvr,
ed->hw.ctrl |= ED_CONTROL_F;
}
#endif
- uvdbg("EP%d CTRL:%08x\n", epdesc->addr, ed->hw.ctrl);
+ uinfo("EP%d CTRL:%08x\n", epdesc->addr, ed->hw.ctrl);
/* Initialize the semaphore that is used to wait for the endpoint
* WDH event.
@@ -2299,7 +2299,7 @@ static int lpc17_epalloc(struct usbhost_driver_s *drvr,
{
/* No.. destroy it and report the error */
- udbg("ERROR: Failed to queue ED for transfer type: %d\n", ed->xfrtype);
+ uerr("ERROR: Failed to queue ED for transfer type: %d\n", ed->xfrtype);
sem_destroy(&ed->wdhsem);
lpc17_edfree(ed);
}
@@ -2608,7 +2608,7 @@ static int lpc17_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
DEBUGASSERT(priv != NULL && ed != NULL && req != NULL);
- uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+ uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
req->type, req->req, req->value[1], req->value[0],
req->index[1], req->index[0], req->len[1], req->len[0]);
@@ -2646,7 +2646,7 @@ static int lpc17_ctrlout(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
DEBUGASSERT(priv != NULL && ed != NULL && req != NULL);
- uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+ uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
req->type, req->req, req->value[1], req->value[0],
req->index[1], req->index[0], req->len[1], req->len[0]);
@@ -2712,7 +2712,7 @@ static int lpc17_transfer_common(struct lpc17_usbhost_s *priv,
xfrinfo = ed->xfrinfo;
in = (ed->hw.ctrl & ED_CONTROL_D_MASK) == ED_CONTROL_D_IN;
- uvdbg("EP%u %s toggle:%u maxpacket:%u buflen:%lu\n",
+ uinfo("EP%u %s toggle:%u maxpacket:%u buflen:%lu\n",
(ed->hw.ctrl & ED_CONTROL_EN_MASK) >> ED_CONTROL_EN_SHIFT,
in ? "IN" : "OUT",
(ed->hw.headp & ED_HEADP_C) != 0 ? 1 : 0,
@@ -2790,7 +2790,7 @@ static int lpc17_dma_alloc(struct lpc17_usbhost_s *priv,
if (buflen > CONFIG_USBHOST_IOBUFSIZE)
{
- uvdbg("buflen (%d) > IO buffer size (%d)\n",
+ uinfo("buflen (%d) > IO buffer size (%d)\n",
buflen, CONFIG_USBHOST_IOBUFSIZE);
return -ENOMEM;
}
@@ -2800,7 +2800,7 @@ static int lpc17_dma_alloc(struct lpc17_usbhost_s *priv,
newbuffer = lpc17_allocio();
if (!newbuffer)
{
- uvdbg("IO buffer allocation failed\n");
+ uinfo("IO buffer allocation failed\n");
return -ENOMEM;
}
@@ -2947,7 +2947,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
xfrinfo = lpc17_alloc_xfrinfo();
if (xfrinfo == NULL)
{
- udbg("ERROR: lpc17_alloc_xfrinfo failed\n");
+ uerr("ERROR: lpc17_alloc_xfrinfo failed\n");
nbytes = -ENOMEM;
goto errout_with_sem;
}
@@ -2966,7 +2966,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
ret = lpc17_dma_alloc(priv, ed, buffer, buflen, &alloc);
if (ret < 0)
{
- udbg("ERROR: lpc17_dma_alloc failed: %d\n", ret);
+ uerr("ERROR: lpc17_dma_alloc failed: %d\n", ret);
nbytes = (ssize_t)ret;
goto errout_with_xfrinfo;
}
@@ -2987,7 +2987,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
ret = lpc17_wdhwait(priv, ed);
if (ret < 0)
{
- udbg("ERROR: Device disconnected\n");
+ uerr("ERROR: Device disconnected\n");
nbytes = (ssize_t)ret;
goto errout_with_buffers;
}
@@ -2997,7 +2997,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
ret = lpc17_transfer_common(priv, ed, buffer, buflen);
if (ret < 0)
{
- udbg("ERROR: lpc17_transfer_common failed: %d\n", ret);
+ uerr("ERROR: lpc17_transfer_common failed: %d\n", ret);
nbytes = (ssize_t)ret;
goto errout_with_wdhwait;
}
@@ -3021,7 +3021,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
* might understand.
*/
- udbg("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
+ uerr("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
switch (xfrinfo->tdstatus)
{
@@ -3111,7 +3111,7 @@ static void lpc17_asynch_completion(struct lpc17_usbhost_s *priv,
* might understand.
*/
- udbg("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
+ uerr("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
switch (xfrinfo->tdstatus)
{
@@ -3213,7 +3213,7 @@ static int lpc17_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
xfrinfo = lpc17_alloc_xfrinfo();
if (xfrinfo == NULL)
{
- udbg("ERROR: lpc17_alloc_xfrinfo failed\n");
+ uerr("ERROR: lpc17_alloc_xfrinfo failed\n");
ret = -ENOMEM;
goto errout_with_sem;
}
@@ -3234,7 +3234,7 @@ static int lpc17_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
ret = lpc17_dma_alloc(priv, ed, buffer, buflen, &xfrinfo->alloc);
if (ret < 0)
{
- udbg("ERROR: lpc17_dma_alloc failed: %d\n", ret);
+ uerr("ERROR: lpc17_dma_alloc failed: %d\n", ret);
goto errout_with_sem;
}
@@ -3251,7 +3251,7 @@ static int lpc17_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
ret = lpc17_transfer_common(priv, ed, buffer, buflen);
if (ret < 0)
{
- udbg("ERROR: lpc17_transfer_common failed: %d\n", ret);
+ uerr("ERROR: lpc17_transfer_common failed: %d\n", ret);
goto errout_with_asynch;
}
@@ -3454,7 +3454,7 @@ static int lpc17_connect(FAR struct usbhost_driver_s *drvr,
/* Set the connected/disconnected flag */
hport->connected = connected;
- ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+ ullinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
/* Report the connection event */
@@ -3695,19 +3695,19 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
lpc17_configgpio(GPIO_USB_OVRCR); /* USB port Over-Current status */
usbhost_dumpgpio();
- udbg("Initializing Host Stack\n");
+ uerr("Initializing Host Stack\n");
/* Show AHB SRAM memory map */
#if 0 /* Useful if you have doubts about the layout */
- uvdbg("AHB SRAM:\n");
- uvdbg(" HCCA: %08x %d\n", LPC17_HCCA_BASE, LPC17_HCCA_SIZE);
- uvdbg(" TDTAIL: %08x %d\n", LPC17_TDTAIL_ADDR, LPC17_TD_SIZE);
- uvdbg(" EDCTRL: %08x %d\n", LPC17_EDCTRL_ADDR, LPC17_ED_SIZE);
- uvdbg(" EDFREE: %08x %d\n", LPC17_EDFREE_BASE, LPC17_ED_SIZE);
- uvdbg(" TDFREE: %08x %d\n", LPC17_TDFREE_BASE, LPC17_EDFREE_SIZE);
- uvdbg(" TBFREE: %08x %d\n", LPC17_TBFREE_BASE, LPC17_TBFREE_SIZE);
- uvdbg(" IOFREE: %08x %d\n", LPC17_IOFREE_BASE, LPC17_IOBUFFERS * CONFIG_USBHOST_IOBUFSIZE);
+ uinfo("AHB SRAM:\n");
+ uinfo(" HCCA: %08x %d\n", LPC17_HCCA_BASE, LPC17_HCCA_SIZE);
+ uinfo(" TDTAIL: %08x %d\n", LPC17_TDTAIL_ADDR, LPC17_TD_SIZE);
+ uinfo(" EDCTRL: %08x %d\n", LPC17_EDCTRL_ADDR, LPC17_ED_SIZE);
+ uinfo(" EDFREE: %08x %d\n", LPC17_EDFREE_BASE, LPC17_ED_SIZE);
+ uinfo(" TDFREE: %08x %d\n", LPC17_TDFREE_BASE, LPC17_EDFREE_SIZE);
+ uinfo(" TBFREE: %08x %d\n", LPC17_TBFREE_BASE, LPC17_TBFREE_SIZE);
+ uinfo(" IOFREE: %08x %d\n", LPC17_IOFREE_BASE, LPC17_IOBUFFERS * CONFIG_USBHOST_IOBUFSIZE);
#endif
/* Initialize all the TDs, EDs and HCCA to 0 */
@@ -3825,7 +3825,7 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
if (irq_attach(LPC17_IRQ_USB, lpc17_usbinterrupt) != 0)
{
- udbg("Failed to attach IRQ\n");
+ uerr("Failed to attach IRQ\n");
return NULL;
}
@@ -3850,7 +3850,7 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
/* Enable interrupts at the interrupt controller */
up_enable_irq(LPC17_IRQ_USB); /* enable USB interrupt */
- udbg("USB host Initialized, Device connected:%s\n",
+ uerr("USB host Initialized, Device connected:%s\n",
priv->connected ? "YES" : "NO");
return &g_usbconn;
diff --git a/arch/arm/src/lpc214x/Kconfig b/arch/arm/src/lpc214x/Kconfig
index 68926095cf0deb8d235805575f08c988e03c1c74..a9fc00c245e5beaa0baba9e763fbcf451da98d93 100644
--- a/arch/arm/src/lpc214x/Kconfig
+++ b/arch/arm/src/lpc214x/Kconfig
@@ -140,7 +140,7 @@ config LPC214X_USBDEV_FRAME_INTERRUPT
config LPC214X_USBDEV_REGDEBUG
bool "USB Device Register-Level Debug Output"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
endmenu
endif
diff --git a/arch/arm/src/lpc214x/lpc214x_head.S b/arch/arm/src/lpc214x/lpc214x_head.S
index 8db27f29ebde0131b6debe98baf61c91b2c28949..c0d6c7651005064685c3af454ee3866ac941e9d1 100644
--- a/arch/arm/src/lpc214x/lpc214x_head.S
+++ b/arch/arm/src/lpc214x/lpc214x_head.S
@@ -280,7 +280,7 @@
*/
.macro showprogress, code
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
mov r0, #\code
bl up_lowputc
#endif
diff --git a/arch/arm/src/lpc214x/lpc214x_serial.c b/arch/arm/src/lpc214x/lpc214x_serial.c
index 62b18ecfe35d4a89935de94b3c94922b961673a8..b0bcafd44ee31e9f1539a01072ad397dc33cfbca 100644
--- a/arch/arm/src/lpc214x/lpc214x_serial.c
+++ b/arch/arm/src/lpc214x/lpc214x_serial.c
@@ -530,7 +530,7 @@ static int up_interrupt(int irq, void *context)
/* Read the modem status register (MSR) to clear */
status = up_serialin(priv, LPC214X_UART_MSR_OFFSET);
- vdbg("MSR: %02x\n", status);
+ info("MSR: %02x\n", status);
break;
}
@@ -541,7 +541,7 @@ static int up_interrupt(int irq, void *context)
/* Read the line status register (LSR) to clear */
status = up_serialin(priv, LPC214X_UART_LSR_OFFSET);
- vdbg("LSR: %02x\n", status);
+ info("LSR: %02x\n", status);
break;
}
@@ -549,7 +549,7 @@ static int up_interrupt(int irq, void *context)
default:
{
- dbg("Unexpected IIR: %02x\n", status);
+ err("Unexpected IIR: %02x\n", status);
break;
}
}
diff --git a/arch/arm/src/lpc214x/lpc214x_usbdev.c b/arch/arm/src/lpc214x/lpc214x_usbdev.c
index 5c058a6bc3b297353ab3cfd76311a76ca3ca6b98..431b71655e79b3efcc7a074da6d8322c52841fe3 100644
--- a/arch/arm/src/lpc214x/lpc214x_usbdev.c
+++ b/arch/arm/src/lpc214x/lpc214x_usbdev.c
@@ -104,7 +104,7 @@
# define USB_FRAME_INT 0
#endif
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# define USB_ERROR_INT USBDEV_DEVINT_EPRINT
#else
# define USB_ERROR_INT 0
@@ -382,7 +382,7 @@ struct lpc214x_usbdev_s
/* Register operations ********************************************************/
-#if defined(CONFIG_LPC214X_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_LPC214X_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t lpc214x_getreg(uint32_t addr);
static void lpc214x_putreg(uint32_t val, uint32_t addr);
#else
@@ -518,7 +518,7 @@ static const struct usbdev_ops_s g_devops =
*
****************************************************************************/
-#if defined(CONFIG_LPC214X_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_LPC214X_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t lpc214x_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -539,7 +539,7 @@ static uint32_t lpc214x_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -556,7 +556,7 @@ static uint32_t lpc214x_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -568,7 +568,7 @@ static uint32_t lpc214x_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@@ -581,12 +581,12 @@ static uint32_t lpc214x_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_LPC214X_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_LPC214X_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void lpc214x_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, val);
+ llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@@ -1021,7 +1021,7 @@ static int lpc214x_wrrequest(struct lpc214x_ep_s *privep)
return OK;
}
- ullvdbg("epphy=%d req=%p: len=%d xfrd=%d nullpkt=%d\n",
+ ullinfo("epphy=%d req=%p: len=%d xfrd=%d nullpkt=%d\n",
privep->epphy, privreq, privreq->req.len, privreq->req.xfrd, privep->txnullpkt);
/* Ignore any attempt to send a zero length packet on anything but EP0IN */
@@ -1130,7 +1130,7 @@ static int lpc214x_rdrequest(struct lpc214x_ep_s *privep)
return OK;
}
- ullvdbg("len=%d xfrd=%d nullpkt=%d\n",
+ ullinfo("len=%d xfrd=%d nullpkt=%d\n",
privreq->req.len, privreq->req.xfrd, privep->txnullpkt);
/* Ignore any attempt to receive a zero length packet */
@@ -1552,7 +1552,7 @@ static inline void lpc214x_ep0setup(struct lpc214x_usbdev_s *priv)
index = GETUINT16(ctrl.index);
len = GETUINT16(ctrl.len);
- ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ctrl.type, ctrl.req, value, index, len);
/* Dispatch any non-standard requests */
@@ -1697,7 +1697,7 @@ static inline void lpc214x_ep0setup(struct lpc214x_usbdev_s *priv)
if (((ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) &&
value == USB_FEATURE_TESTMODE)
{
- ullvdbg("test mode: %d\n", index);
+ ullinfo("test mode: %d\n", index);
}
else if ((ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
{
@@ -2055,7 +2055,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context)
#endif
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* USB engine error interrupt */
if ((devintstatus & USBDEV_DEVINT_EPRINT))
@@ -2287,7 +2287,7 @@ static int lpc214x_usbinterrupt(int irq, FAR void *context)
}
else
{
- ullvdbg("Pending data on OUT endpoint\n");
+ ullinfo("Pending data on OUT endpoint\n");
priv->rxpending = 1;
}
}
@@ -2378,7 +2378,7 @@ static int lpc214x_dmasetup(struct lpc214x_usbdev_s *priv, uint8_t epphy,
struct lpc214x_dmadesc_s *dmadesc = priv;
uint32_t reg;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!priv || epphy < 2)
{
usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
@@ -2577,7 +2577,7 @@ static int lpc214x_epdisable(FAR struct usbdev_ep_s *ep)
uint32_t mask = (1 << privep->epphy);
uint32_t reg;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
@@ -2619,7 +2619,7 @@ static FAR struct usbdev_req_s *lpc214x_epallocreq(FAR struct usbdev_ep_s *ep)
{
FAR struct lpc214x_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
@@ -2651,7 +2651,7 @@ static void lpc214x_epfreereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_
{
FAR struct lpc214x_req_s *privreq = (FAR struct lpc214x_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
@@ -2759,11 +2759,11 @@ static int lpc214x_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
irqstate_t flags;
int ret = OK;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
- ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+ ullinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
@@ -2844,7 +2844,7 @@ static int lpc214x_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
FAR struct lpc214x_ep_s *privep = (FAR struct lpc214x_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
@@ -3107,7 +3107,7 @@ static int lpc214x_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
@@ -3322,7 +3322,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@@ -3372,7 +3372,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
{
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (driver != g_usbdev.driver)
{
usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/lpc2378/Kconfig b/arch/arm/src/lpc2378/Kconfig
index 08197970c66441ba32757d370888ef34abbf7406..eb9cba75701bf43af424c84e4c63e2ca32329783 100644
--- a/arch/arm/src/lpc2378/Kconfig
+++ b/arch/arm/src/lpc2378/Kconfig
@@ -185,7 +185,7 @@ config LPC2378_USBDEV_FRAME_INTERRUPT
config LPC2378_USBDEV_REGDEBUG
bool "USB Device Register-Level Debug Output"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
endmenu
endif
diff --git a/arch/arm/src/lpc2378/lpc23xx_head.S b/arch/arm/src/lpc2378/lpc23xx_head.S
index 179b390271c02226308150de9ae423983f223189..551f2d240e7275403bfeeb92b84c81f90bfe93ac 100644
--- a/arch/arm/src/lpc2378/lpc23xx_head.S
+++ b/arch/arm/src/lpc2378/lpc23xx_head.S
@@ -60,7 +60,7 @@
* modify r0, r1, r2 and r14
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.macro showprogress, code
mov r0, #\code
bl up_lowputc
diff --git a/arch/arm/src/lpc2378/lpc23xx_i2c.c b/arch/arm/src/lpc2378/lpc23xx_i2c.c
index 54efbc52c00e04c480665578692c786d0a6521c5..d3bec89884509474cbfa5476af86644665d3cb07 100644
--- a/arch/arm/src/lpc2378/lpc23xx_i2c.c
+++ b/arch/arm/src/lpc2378/lpc23xx_i2c.c
@@ -490,7 +490,7 @@ struct i2c_master_s *lpc2378_i2cbus_initialize(int port)
if (port > 1)
{
- dbg("lpc I2C Only support 0,1\n");
+ err("lpc I2C Only support 0,1\n");
return NULL;
}
diff --git a/arch/arm/src/lpc2378/lpc23xx_serial.c b/arch/arm/src/lpc2378/lpc23xx_serial.c
index 9650a0827a3b21f490a9977af901f9166cb090b4..9ea299783d9aceb2cb4199af2e5c1dab7f377589 100644
--- a/arch/arm/src/lpc2378/lpc23xx_serial.c
+++ b/arch/arm/src/lpc2378/lpc23xx_serial.c
@@ -320,14 +320,14 @@ static inline void up_configbaud(struct up_dev_s *priv)
/* Test values calculated for every multiplier/divisor combination */
uint32_t tdiv;
- uint32_t terr;
+ uint32_t tmperr;
int tmulval;
int tdivaddval;
/* Optimal multiplier/divider values */
uint32_t div = 0;
- uint32_t err = 100000;
+ uint32_t errval = 100000;
int mulval = 1;
int divaddval = 0;
@@ -350,13 +350,13 @@ static inline void up_configbaud(struct up_dev_s *priv)
/* Try every valid multiplier, tmulval (or until a perfect match is found). */
- for (tmulval = 1; tmulval <= 15 && err > 0; tmulval++)
+ for (tmulval = 1; tmulval <= 15 && errval > 0; tmulval++)
{
/* Try every valid pre-scale div, tdivaddval (or until a perfect match is
* found).
*/
- for (tdivaddval = 0; tdivaddval <= 15 && err > 0; tdivaddval++)
+ for (tdivaddval = 0; tdivaddval <= 15 && errval > 0; tdivaddval++)
{
/* Calculate the divisor with these fractional divider settings */
@@ -373,16 +373,16 @@ static inline void up_configbaud(struct up_dev_s *priv)
if (actualbaud <= priv->baud)
{
- terr = priv->baud - actualbaud;
+ tmperr = priv->baud - actualbaud;
}
else
{
- terr = actualbaud - priv->baud;
+ tmperr = actualbaud - priv->baud;
}
/* Is this the smallest error we have encountered? */
- if (terr < err)
+ if (tmperr < errval)
{
/* Yes, save these settings as the new, candidate optimal
* settings
@@ -391,7 +391,7 @@ static inline void up_configbaud(struct up_dev_s *priv)
mulval = tmulval;
divaddval = tdivaddval;
div = tdiv;
- err = terr;
+ errval = tmperr;
}
}
}
@@ -648,7 +648,7 @@ static int up_interrupt(int irq, void *context)
/* Read the modem status register (MSR) to clear */
status = up_serialin(priv, UART_MSR_OFFSET);
- vdbg("MSR: %02x\n", status);
+ info("MSR: %02x\n", status);
break;
}
@@ -659,7 +659,7 @@ static int up_interrupt(int irq, void *context)
/* Read the line status register (LSR) to clear */
status = up_serialin(priv, UART_LSR_OFFSET);
- vdbg("LSR: %02x\n", status);
+ info("LSR: %02x\n", status);
break;
}
@@ -667,7 +667,7 @@ static int up_interrupt(int irq, void *context)
default:
{
- dbg("Unexpected IIR: %02x\n", status);
+ err("Unexpected IIR: %02x\n", status);
break;
}
}
diff --git a/arch/arm/src/lpc2378/lpc23xx_spi.c b/arch/arm/src/lpc2378/lpc23xx_spi.c
index 42c951c9540eafdca16df6aaef7c56be38da5ab6..1260105373118594212164aa3a9c63dd219ea4f8 100644
--- a/arch/arm/src/lpc2378/lpc23xx_spi.c
+++ b/arch/arm/src/lpc2378/lpc23xx_spi.c
@@ -79,15 +79,15 @@
/* CONFIG_DEBUG_SPI enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
+# define spierr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define spiinfo llerr
# else
-# define spivdbg(x...)
+# define spiinfo(x...)
# endif
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiinfo(x...)
#endif
/* SPI Clocking.
@@ -289,7 +289,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
- spidbg("Frequency %d->%d\n", frequency, actual);
+ spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -453,7 +453,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
uint8_t data;
- spidbg("nwords: %d\n", nwords);
+ spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write the data to transmitted to the SPI Data Register */
@@ -498,7 +498,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
{
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
- spidbg("nwords: %d\n", nwords);
+ spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write some dummy data to the SPI Data Register in order to clock the
diff --git a/arch/arm/src/lpc31xx/Kconfig b/arch/arm/src/lpc31xx/Kconfig
index ffdaa81146074f8e13b6a2ae858a5931459c397b..e89430ec9b0e238c2aa63da3a636ba32117f34c4 100644
--- a/arch/arm/src/lpc31xx/Kconfig
+++ b/arch/arm/src/lpc31xx/Kconfig
@@ -243,10 +243,11 @@ config LPC31_USBDEV_DMA
config LPC31_USBDEV_REGDEBUG
bool "Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
- Output detailed register-level USB device debug information. Requires also DEBUG.
+ Output detailed register-level USB device debug information. Requires
+ also CONFIG_DEBUG_FEATURES.
endmenu # USB device driver controller (DCD) options
endif # LPC31_USBOTG && USBDEV
@@ -300,7 +301,7 @@ config LPC31_EHCI_PREALLOCATE
config LPC31_EHCI_REGDEBUG
bool "Enable low-level EHCI register debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
endmenu # USB host controller driver (HCD) options
endif # LPC31_USBOTG && USBHOST
@@ -309,9 +310,9 @@ menu "SPI device driver options"
config LPC31_SPI_REGDEBUG
bool "SPI Register level debug"
- depends on LPC31_SPI && DEBUG
+ depends on LPC31_SPI && DEBUG_FEATURES
default n
---help---
- Output detailed register-level SPI device debug information. Requires also DEBUG.
+ Output detailed register-level SPI device debug information. Requires also CONFIG_DEBUG_FEATURES.
endmenu # SPI device driver options
diff --git a/arch/arm/src/lpc31xx/lpc31_ehci.c b/arch/arm/src/lpc31xx/lpc31_ehci.c
index 67ef095f2d39e3ba0267c926646f284587319c97..0734e85e51d34b3202335ae91532fd006a4860df 100644
--- a/arch/arm/src/lpc31xx/lpc31_ehci.c
+++ b/arch/arm/src/lpc31xx/lpc31_ehci.c
@@ -113,7 +113,7 @@
/* Debug options */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_LPC31_EHCI_REGDEBUG
#endif
@@ -122,13 +122,6 @@
#undef CONFIG_USBHOST_ISOC_DISABLE
#define CONFIG_USBHOST_ISOC_DISABLE 1
-/* Simplify DEBUG checks */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_USB
-#endif
-
/* Registers *******************************************************************/
/* Traditionally, NuttX specifies register locations using individual
* register offsets from a base address. That tradition is broken here and,
@@ -833,7 +826,7 @@ static uint32_t lpc31_swap32(uint32_t value)
static void lpc31_printreg(volatile uint32_t *regaddr, uint32_t regval,
bool iswrite)
{
- lldbg("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
+ llerr("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
}
#endif
@@ -884,7 +877,7 @@ static void lpc31_checkreg(volatile uint32_t *regaddr, uint32_t regval, bool isw
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ llerr("[repeats %d more times]\n", count);
}
}
@@ -1463,11 +1456,11 @@ static int lpc31_qh_flush(struct lpc31_qh_s *qh)
#ifdef CONFIG_LPC31_EHCI_REGDEBUG
static void lpc31_qtd_print(struct lpc31_qtd_s *qtd)
{
- udbg(" QTD[%p]:\n", qtd);
- udbg(" hw:\n");
- udbg(" nqp: %08x alt: %08x token: %08x\n",
+ uerr(" QTD[%p]:\n", qtd);
+ uerr(" hw:\n");
+ uerr(" nqp: %08x alt: %08x token: %08x\n",
qtd->hw.nqp, qtd->hw.alt, qtd->hw.token);
- udbg(" bpl: %08x %08x %08x %08x %08x\n",
+ uerr(" bpl: %08x %08x %08x %08x %08x\n",
qtd->hw.bpl[0], qtd->hw.bpl[1], qtd->hw.bpl[2],
qtd->hw.bpl[3], qtd->hw.bpl[4]);
}
@@ -1487,29 +1480,29 @@ static void lpc31_qh_print(struct lpc31_qh_s *qh)
struct lpc31_epinfo_s *epinfo;
struct ehci_overlay_s *overlay;
- udbg("QH[%p]:\n", qh);
- udbg(" hw:\n");
- udbg(" hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
+ uerr("QH[%p]:\n", qh);
+ uerr(" hw:\n");
+ uerr(" hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
qh->hw.hlp, qh->hw.epchar, qh->hw.epcaps, qh->hw.cqp);
overlay = &qh->hw.overlay;
- udbg(" overlay:\n");
- udbg(" nqp: %08x alt: %08x token: %08x\n",
+ uerr(" overlay:\n");
+ uerr(" nqp: %08x alt: %08x token: %08x\n",
overlay->nqp, overlay->alt, overlay->token);
- udbg(" bpl: %08x %08x %08x %08x %08x\n",
+ uerr(" bpl: %08x %08x %08x %08x %08x\n",
overlay->bpl[0], overlay->bpl[1], overlay->bpl[2],
overlay->bpl[3], overlay->bpl[4]);
- udbg(" fqp:\n", qh->fqp);
+ uerr(" fqp:\n", qh->fqp);
epinfo = qh->epinfo;
- udbg(" epinfo[%p]:\n", epinfo);
+ uerr(" epinfo[%p]:\n", epinfo);
if (epinfo)
{
- udbg(" EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
+ uerr(" EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
epinfo->epno, epinfo->dirin ? "IN" : "OUT", epinfo->devaddr,
epinfo->xfrtype, epinfo->maxpacket);
- udbg(" Toggle=%d iocwait=%d speed=%d result=%d\n",
+ uerr(" Toggle=%d iocwait=%d speed=%d result=%d\n",
epinfo->toggle, epinfo->iocwait, epinfo->speed, epinfo->result);
}
}
@@ -2113,7 +2106,7 @@ static int lpc31_async_setup(struct lpc31_rhport_s *rhport,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(EHCI_VTRACE2_ASYNCXFR, epinfo->epno, buflen);
#else
- uvdbg("RHport%d EP%d: buffer=%p, buflen=%d, req=%p\n",
+ uinfo("RHport%d EP%d: buffer=%p, buflen=%d, req=%p\n",
RHPORT(rhport), epinfo->epno, buffer, buflen, req);
#endif
@@ -2391,7 +2384,7 @@ static int lpc31_intr_setup(struct lpc31_rhport_s *rhport,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(EHCI_VTRACE2_INTRXFR, epinfo->epno, buflen);
#else
- uvdbg("RHport%d EP%d: buffer=%p, buflen=%d\n",
+ uinfo("RHport%d EP%d: buffer=%p, buflen=%d\n",
RHPORT(rhport), epinfo->epno, buffer, buflen);
#endif
@@ -3377,7 +3370,7 @@ static int lpc31_ehci_interrupt(int irq, FAR void *context)
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace1(EHCI_VTRACE1_TOPHALF, usbsts & regval);
#else
- ullvdbg("USBSTS: %08x USBINTR: %08x\n", usbsts, regval);
+ ullinfo("USBSTS: %08x USBINTR: %08x\n", usbsts, regval);
#endif
/* Handle all unmasked interrupt sources */
@@ -3909,7 +3902,7 @@ static int lpc31_epalloc(FAR struct usbhost_driver_s *drvr,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(EHCI_VTRACE2_EPALLOC, epdesc->addr, epdesc->xfrtype);
#else
- uvdbg("EP%d DIR=%s FA=%08x TYPE=%d Interval=%d MaxPacket=%d\n",
+ uinfo("EP%d DIR=%s FA=%08x TYPE=%d Interval=%d MaxPacket=%d\n",
epdesc->addr, epdesc->in ? "IN" : "OUT", hport->funcaddr,
epdesc->xfrtype, epdesc->interval, epdesc->mxpacketsize);
#endif
@@ -4199,7 +4192,7 @@ static int lpc31_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(EHCI_VTRACE2_CTRLINOUT, RHPORT(rhport), req->req);
#else
- uvdbg("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %04x\n",
+ uinfo("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %04x\n",
RHPORT(rhport), req->type, req->req, req->value[1], req->value[0],
req->index[1], req->index[0], len);
#endif
@@ -4222,7 +4215,7 @@ static int lpc31_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
ret = lpc31_async_setup(rhport, ep0info, req, buffer, len);
if (ret < 0)
{
- udbg("ERROR: lpc31_async_setup failed: %d\n", ret);
+ uerr("ERROR: lpc31_async_setup failed: %d\n", ret);
goto errout_with_iocwait;
}
@@ -4687,7 +4680,7 @@ static int lpc31_connect(FAR struct usbhost_driver_s *drvr,
/* Set the connected/disconnected flag */
hport->connected = connected;
- ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+ ullinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
/* Report the connection event */
@@ -4887,7 +4880,7 @@ FAR struct usbhost_connection_s *lpc31_ehci_initialize(int controller)
{
FAR struct usbhost_hubport_s *hport;
uint32_t regval;
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_ASSERTIONS)
uint16_t regval16;
unsigned int nports;
#endif
@@ -5140,7 +5133,7 @@ FAR struct usbhost_connection_s *lpc31_ehci_initialize(int controller)
lpc31_putreg(EHCI_INT_ALLINTS, &HCOR->usbsts);
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_ASSERTIONS)
/* Show the EHCI version */
regval16 = lpc31_swap16(HCCR->hciversion);
diff --git a/arch/arm/src/lpc31xx/lpc31_lowputc.c b/arch/arm/src/lpc31xx/lpc31_lowputc.c
index 3e3213927f14b5c804598dc66bd9584febb54f27..7d1335fd5ad91605e993234f426c05fb00a656e7 100644
--- a/arch/arm/src/lpc31xx/lpc31_lowputc.c
+++ b/arch/arm/src/lpc31xx/lpc31_lowputc.c
@@ -144,14 +144,14 @@ static inline void up_configbaud(void)
/* Test values calculated for every multiplier/divisor combination */
uint32_t tdiv;
- uint32_t terr;
+ uint32_t tmperr;
int tmulval;
int tdivaddval;
/* Optimal multiplier/divider values */
uint32_t div = 0;
- uint32_t err = 100000;
+ uint32_t errval = 100000;
int mulval = 1;
int divaddval = 0;
@@ -176,13 +176,13 @@ static inline void up_configbaud(void)
* match is found).
*/
- for (tmulval = 1 ; tmulval <= 15 && err > 0; tmulval++)
+ for (tmulval = 1 ; tmulval <= 15 && errval > 0; tmulval++)
{
/* Try every valid pre-scale div, tdivaddval (or until a perfect
* match is found).
*/
- for (tdivaddval = 0 ; tdivaddval <= 15 && err > 0; tdivaddval++)
+ for (tdivaddval = 0 ; tdivaddval <= 15 && errval > 0; tdivaddval++)
{
/* Calculate the divisor with these fractional divider settings */
@@ -199,23 +199,23 @@ static inline void up_configbaud(void)
if (actualbaud <= CONFIG_UART_BAUD)
{
- terr = CONFIG_UART_BAUD - actualbaud;
+ tmperr = CONFIG_UART_BAUD - actualbaud;
}
else
{
- terr = actualbaud - CONFIG_UART_BAUD;
+ tmperr = actualbaud - CONFIG_UART_BAUD;
}
/* Is this the smallest error we have encountered? */
- if (terr < err)
+ if (tmperr < errval)
{
/* Yes, save these settings as the new, candidate optimal settings */
- mulval = tmulval ;
+ mulval = tmulval ;
divaddval = tdivaddval;
div = tdiv;
- err = terr;
+ errval = tmperr;
}
}
}
diff --git a/arch/arm/src/lpc31xx/lpc31_serial.c b/arch/arm/src/lpc31xx/lpc31_serial.c
index 6567ce267e15179d51e23a4e16265e876d27c61d..c3b9b3f50908b59a245bdaf4436a68a4ae7cdff3 100644
--- a/arch/arm/src/lpc31xx/lpc31_serial.c
+++ b/arch/arm/src/lpc31xx/lpc31_serial.c
@@ -215,14 +215,14 @@ static inline void up_configbaud(void)
/* Test values calculated for every multiplier/divisor combination */
uint32_t tdiv;
- uint32_t terr;
+ uint32_t tmperr;
int tmulval;
int tdivaddval;
/* Optimal multiplier/divider values */
uint32_t div = 0;
- uint32_t err = 100000;
+ uint32_t errval = 100000;
int mulval = 1;
int divaddval = 0;
@@ -247,13 +247,13 @@ static inline void up_configbaud(void)
* match is found).
*/
- for (tmulval = 1 ; tmulval <= 15 && err > 0; tmulval++)
+ for (tmulval = 1 ; tmulval <= 15 && errval > 0; tmulval++)
{
/* Try every valid pre-scale div, tdivaddval (or until a perfect
* match is found).
*/
- for (tdivaddval = 0 ; tdivaddval <= 15 && err > 0; tdivaddval++)
+ for (tdivaddval = 0 ; tdivaddval <= 15 && errval > 0; tdivaddval++)
{
/* Calculate the divisor with these fractional divider settings */
@@ -270,23 +270,23 @@ static inline void up_configbaud(void)
if (actualbaud <= CONFIG_UART_BAUD)
{
- terr = CONFIG_UART_BAUD - actualbaud;
+ tmperr = CONFIG_UART_BAUD - actualbaud;
}
else
{
- terr = actualbaud - CONFIG_UART_BAUD;
+ tmperr = actualbaud - CONFIG_UART_BAUD;
}
/* Is this the smallest error we have encountered? */
- if (terr < err)
+ if (tmperr < errval)
{
/* Yes, save these settings as the new, candidate optimal settings */
- mulval = tmulval ;
+ mulval = tmulval ;
divaddval = tdivaddval;
div = tdiv;
- err = terr;
+ errval = tmperr;
}
}
}
@@ -541,7 +541,7 @@ static int up_interrupt(int irq, void *context)
/* Read the modem status register (MSR) to clear */
status = getreg32(LPC31_UART_MSR);
- fvdbg("MSR: %02x\n", status);
+ finfo("MSR: %02x\n", status);
break;
}
@@ -552,7 +552,7 @@ static int up_interrupt(int irq, void *context)
/* Read the line status register (LSR) to clear */
status = getreg32(LPC31_UART_LSR);
- fvdbg("LSR: %02x\n", status);
+ finfo("LSR: %02x\n", status);
break;
}
@@ -560,7 +560,7 @@ static int up_interrupt(int irq, void *context)
default:
{
- dbg("Unexpected IIR: %02x\n", status);
+ err("Unexpected IIR: %02x\n", status);
break;
}
}
diff --git a/arch/arm/src/lpc31xx/lpc31_spi.c b/arch/arm/src/lpc31xx/lpc31_spi.c
index f750ca0792db960e6025838e5975bacabfb70076..c72a0221c0d61281751c228139b97cc9c99132e7 100644
--- a/arch/arm/src/lpc31xx/lpc31_spi.c
+++ b/arch/arm/src/lpc31xx/lpc31_spi.c
@@ -63,10 +63,10 @@
/* Debug ****************************************************************************/
/* CONFIG_LPC31_SPI_REGDEBUG enabled very low, register-level debug output.
- * CONFIG_DEBUG must also be defined
+ * CONFIG_DEBUG_FEATURES must also be defined
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_LPC31_SPI_REGDEBUG
#endif
@@ -207,7 +207,7 @@ static bool spi_checkreg(bool wr, uint32_t value, uint32_t address)
{
if (g_ntimes > 0)
{
- lldbg("...[Repeats %d times]...\n", g_ntimes);
+ llerr("...[Repeats %d times]...\n", g_ntimes);
}
g_wrlast = wr;
@@ -239,7 +239,7 @@ static void spi_putreg(uint32_t value, uint32_t address)
{
if (spi_checkreg(true, value, address))
{
- lldbg("%08x<-%08x\n", address, value);
+ llerr("%08x<-%08x\n", address, value);
}
putreg32(value, address);
}
@@ -265,7 +265,7 @@ static uint32_t spi_getreg(uint32_t address)
uint32_t value = getreg32(address);
if (spi_checkreg(false, value, address))
{
- lldbg("%08x->%08x\n", address, value);
+ llerr("%08x->%08x\n", address, value);
}
return value;
}
@@ -921,7 +921,7 @@ FAR struct spi_dev_s *lpc31_spibus_initialize(int port)
*/
#ifdef CONFIG_LPC31_SPI_REGDEBUG
- lldbg("PINS: %08x MODE0: %08x MODE1: %08x\n",
+ llerr("PINS: %08x MODE0: %08x MODE1: %08x\n",
spi_getreg(LPC31_IOCONFIG_SPI_PINS),
spi_getreg(LPC31_IOCONFIG_SPI_MODE0),
spi_getreg(LPC31_IOCONFIG_SPI_MODE1));
diff --git a/arch/arm/src/lpc31xx/lpc31_usbdev.c b/arch/arm/src/lpc31xx/lpc31_usbdev.c
index c1ece00bf6f37f36e4293690ca5bfcb640f5d61e..3d56725cea7404500e02fee20839da412a8947e4 100644
--- a/arch/arm/src/lpc31xx/lpc31_usbdev.c
+++ b/arch/arm/src/lpc31xx/lpc31_usbdev.c
@@ -100,7 +100,7 @@
# define USB_FRAME_INT 0
#endif
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# define USB_ERROR_INT USBDEV_USBINTR_UEE
#else
# define USB_ERROR_INT 0
@@ -343,7 +343,7 @@ struct lpc31_usbdev_s
/* Register operations ********************************************************/
-#if defined(CONFIG_LPC31_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_LPC31_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t lpc31_getreg(uint32_t addr);
static void lpc31_putreg(uint32_t val, uint32_t addr);
#else
@@ -480,7 +480,7 @@ static const struct usbdev_ops_s g_devops =
*
****************************************************************************/
-#if defined(CONFIG_LPC31_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_LPC31_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t lpc31_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -501,7 +501,7 @@ static uint32_t lpc31_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -518,7 +518,7 @@ static uint32_t lpc31_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -530,7 +530,7 @@ static uint32_t lpc31_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@@ -543,12 +543,12 @@ static uint32_t lpc31_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_LPC31_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_LPC31_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void lpc31_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, val);
+ llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@@ -1183,7 +1183,7 @@ static inline void lpc31_ep0setup(struct lpc31_usbdev_s *priv)
index = GETUINT16(ctrl.index);
len = GETUINT16(ctrl.len);
- ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ctrl.type, ctrl.req, value, index, len);
/* Dispatch any non-standard requests */
@@ -1323,7 +1323,7 @@ static inline void lpc31_ep0setup(struct lpc31_usbdev_s *priv)
if (((ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) &&
value == USB_FEATURE_TESTMODE)
{
- ullvdbg("test mode: %d\n", index);
+ ullinfo("test mode: %d\n", index);
}
else if ((ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
{
@@ -1536,7 +1536,7 @@ static void lpc31_ep0complete(struct lpc31_usbdev_s *priv, uint8_t epphy)
break;
default:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
DEBUGASSERT(priv->ep0state != EP0STATE_DATA_IN &&
priv->ep0state != EP0STATE_DATA_OUT &&
priv->ep0state != EP0STATE_SHORTWRITE &&
@@ -1578,7 +1578,7 @@ static void lpc31_ep0nak(struct lpc31_usbdev_s *priv, uint8_t epphy)
lpc31_ep0state (priv, EP0STATE_WAIT_STATUS_OUT);
break;
default:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
DEBUGASSERT(priv->ep0state != EP0STATE_WAIT_NAK_IN &&
priv->ep0state != EP0STATE_WAIT_NAK_OUT);
#endif
@@ -1939,7 +1939,7 @@ static int lpc31_epdisable(FAR struct usbdev_ep_s *ep)
FAR struct lpc31_ep_s *privep = (FAR struct lpc31_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
@@ -1977,7 +1977,7 @@ static FAR struct usbdev_req_s *lpc31_epallocreq(FAR struct usbdev_ep_s *ep)
{
FAR struct lpc31_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
@@ -2009,7 +2009,7 @@ static void lpc31_epfreereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
{
FAR struct lpc31_req_s *privreq = (FAR struct lpc31_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
@@ -2079,11 +2079,11 @@ static int lpc31_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
irqstate_t flags;
int ret = OK;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
- ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+ ullinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
@@ -2144,7 +2144,7 @@ static int lpc31_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
FAR struct lpc31_ep_s *privep = (FAR struct lpc31_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
@@ -2423,7 +2423,7 @@ static int lpc31_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
@@ -2655,7 +2655,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@@ -2716,7 +2716,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
{
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (driver != g_usbdev.driver)
{
usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/lpc43xx/Kconfig b/arch/arm/src/lpc43xx/Kconfig
index 9a2bcad916f94fba57da7c71ca09dee5c9fd71b7..84868ab13fa8082a75f372cc7238cf0a60cca86c 100644
--- a/arch/arm/src/lpc43xx/Kconfig
+++ b/arch/arm/src/lpc43xx/Kconfig
@@ -457,9 +457,9 @@ config LPC43_RMII
config LPC43_ETHERNET_REGDEBUG
bool "Register-Level Debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
- Enable very low-level register access debug. Depends on DEBUG.
+ Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES.
endmenu # Ethernet MAC configuration
endif # LPC43_ETHERNET
diff --git a/arch/arm/src/lpc43xx/Make.defs b/arch/arm/src/lpc43xx/Make.defs
index 60e0ad3ed0fea63be3a6b51f66894dbeb178fe93..6e5d7ef3a789e822e5243a1608208cb3bb9e5d74 100644
--- a/arch/arm/src/lpc43xx/Make.defs
+++ b/arch/arm/src/lpc43xx/Make.defs
@@ -110,7 +110,7 @@ ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
CHIP_CSRCS += lpc43_idle.c
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
CHIP_CSRCS += lpc43_debug.c
endif
diff --git a/arch/arm/src/lpc43xx/lpc43_dac.c b/arch/arm/src/lpc43xx/lpc43_dac.c
index 16fa92a36547167452602bb8142ac73d9a7cb2c5..b9ab14b8749d95cf7a38887021718d056b328e6b 100644
--- a/arch/arm/src/lpc43xx/lpc43_dac.c
+++ b/arch/arm/src/lpc43xx/lpc43_dac.c
@@ -173,7 +173,7 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
{
- dbg("Fix me:Not Implemented\n");
+ err("Fix me:Not Implemented\n");
return 0;
}
diff --git a/arch/arm/src/lpc43xx/lpc43_debug.c b/arch/arm/src/lpc43xx/lpc43_debug.c
index 51cf9470672601f15904c445e435afdcbd7c058a..3b20bc63e74116d6d44f7fbb99003b4093b4d132 100644
--- a/arch/arm/src/lpc43xx/lpc43_debug.c
+++ b/arch/arm/src/lpc43xx/lpc43_debug.c
@@ -47,23 +47,12 @@
#include "lpc43_pinconfig.h"
#include "lpc43_gpio.h"
-#ifdef CONFIG_DEBUG
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+#ifdef CONFIG_DEBUG_FEATURES
/****************************************************************************
* Public Functions
****************************************************************************/
+
/****************************************************************************
* Function: lpc43_pin_dump
*
@@ -93,4 +82,4 @@ int lpc43_gpio_dump(uint16_t gpiocfg, const char *msg)
return -ENOSYS;
}
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/arch/arm/src/lpc43xx/lpc43_ehci.c b/arch/arm/src/lpc43xx/lpc43_ehci.c
index 08b2ae8e0f99344819224fcb2735b9bb03d59f40..a0d4d1160e5ce1b1c8359d6d5eac5fa4e1b2e671 100644
--- a/arch/arm/src/lpc43xx/lpc43_ehci.c
+++ b/arch/arm/src/lpc43xx/lpc43_ehci.c
@@ -105,7 +105,7 @@
/* Debug options */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_LPC43_EHCI_REGDEBUG
#endif
@@ -116,8 +116,8 @@
/* Simplify DEBUG checks */
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+# undef CONFIG_DEBUG_INFO
# undef CONFIG_DEBUG_USB
#endif
@@ -817,7 +817,7 @@ static uint32_t lpc43_swap32(uint32_t value)
static void lpc43_printreg(volatile uint32_t *regaddr, uint32_t regval,
bool iswrite)
{
- lldbg("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
+ llerr("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
}
#endif
@@ -868,7 +868,7 @@ static void lpc43_checkreg(volatile uint32_t *regaddr, uint32_t regval, bool isw
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ llerr("[repeats %d more times]\n", count);
}
}
@@ -1350,11 +1350,11 @@ static int lpc43_qh_discard(struct lpc43_qh_s *qh)
#ifdef CONFIG_LPC43_EHCI_REGDEBUG
static void lpc43_qtd_print(struct lpc43_qtd_s *qtd)
{
- udbg(" QTD[%p]:\n", qtd);
- udbg(" hw:\n");
- udbg(" nqp: %08x alt: %08x token: %08x\n",
+ uerr(" QTD[%p]:\n", qtd);
+ uerr(" hw:\n");
+ uerr(" nqp: %08x alt: %08x token: %08x\n",
qtd->hw.nqp, qtd->hw.alt, qtd->hw.token);
- udbg(" bpl: %08x %08x %08x %08x %08x\n",
+ uerr(" bpl: %08x %08x %08x %08x %08x\n",
qtd->hw.bpl[0], qtd->hw.bpl[1], qtd->hw.bpl[2],
qtd->hw.bpl[3], qtd->hw.bpl[4]);
}
@@ -1374,29 +1374,29 @@ static void lpc43_qh_print(struct lpc43_qh_s *qh)
struct lpc43_epinfo_s *epinfo;
struct ehci_overlay_s *overlay;
- udbg("QH[%p]:\n", qh);
- udbg(" hw:\n");
- udbg(" hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
+ uerr("QH[%p]:\n", qh);
+ uerr(" hw:\n");
+ uerr(" hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
qh->hw.hlp, qh->hw.epchar, qh->hw.epcaps, qh->hw.cqp);
overlay = &qh->hw.overlay;
- udbg(" overlay:\n");
- udbg(" nqp: %08x alt: %08x token: %08x\n",
+ uerr(" overlay:\n");
+ uerr(" nqp: %08x alt: %08x token: %08x\n",
overlay->nqp, overlay->alt, overlay->token);
- udbg(" bpl: %08x %08x %08x %08x %08x\n",
+ uerr(" bpl: %08x %08x %08x %08x %08x\n",
overlay->bpl[0], overlay->bpl[1], overlay->bpl[2],
overlay->bpl[3], overlay->bpl[4]);
- udbg(" fqp:\n", qh->fqp);
+ uerr(" fqp:\n", qh->fqp);
epinfo = qh->epinfo;
- udbg(" epinfo[%p]:\n", epinfo);
+ uerr(" epinfo[%p]:\n", epinfo);
if (epinfo)
{
- udbg(" EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
+ uerr(" EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
epinfo->epno, epinfo->dirin ? "IN" : "OUT", epinfo->devaddr,
epinfo->xfrtype, epinfo->maxpacket);
- udbg(" Toggle=%d iocwait=%d speed=%d result=%d\n",
+ uerr(" Toggle=%d iocwait=%d speed=%d result=%d\n",
epinfo->toggle, epinfo->iocwait, epinfo->speed, epinfo->result);
}
}
@@ -1989,7 +1989,7 @@ static int lpc43_async_setup(struct lpc43_rhport_s *rhport,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(EHCI_VTRACE2_ASYNCXFR, epinfo->epno, buflen);
#else
- uvdbg("RHport%d EP%d: buffer=%p, buflen=%d, req=%p\n",
+ uinfo("RHport%d EP%d: buffer=%p, buflen=%d, req=%p\n",
RHPORT(rhport), epinfo->epno, buffer, buflen, req);
#endif
@@ -2267,7 +2267,7 @@ static int lpc43_intr_setup(struct lpc43_rhport_s *rhport,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(EHCI_VTRACE2_INTRXFR, epinfo->epno, buflen);
#else
- uvdbg("RHport%d EP%d: buffer=%p, buflen=%d\n",
+ uinfo("RHport%d EP%d: buffer=%p, buflen=%d\n",
RHPORT(rhport), epinfo->epno, buffer, buflen);
#endif
@@ -3207,7 +3207,7 @@ static int lpc43_ehci_interrupt(int irq, FAR void *context)
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace1(EHCI_VTRACE1_TOPHALF, usbsts & regval);
#else
- ullvdbg("USBSTS: %08x USBINTR: %08x\n", usbsts, regval);
+ ullinfo("USBSTS: %08x USBINTR: %08x\n", usbsts, regval);
#endif
/* Handle all unmasked interrupt sources */
@@ -3739,7 +3739,7 @@ static int lpc43_epalloc(FAR struct usbhost_driver_s *drvr,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(EHCI_VTRACE2_EPALLOC, epdesc->addr, epdesc->xfrtype);
#else
- uvdbg("EP%d DIR=%s FA=%08x TYPE=%d Interval=%d MaxPacket=%d\n",
+ uinfo("EP%d DIR=%s FA=%08x TYPE=%d Interval=%d MaxPacket=%d\n",
epdesc->addr, epdesc->in ? "IN" : "OUT", hport->funcaddr,
epdesc->xfrtype, epdesc->interval, epdesc->mxpacketsize);
#endif
@@ -4023,7 +4023,7 @@ static int lpc43_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(EHCI_VTRACE2_CTRLINOUT, RHPORT(rhport), req->req);
#else
- uvdbg("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %04x\n",
+ uinfo("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %04x\n",
RHPORT(rhport), req->type, req->req, req->value[1], req->value[0],
req->index[1], req->index[0], len);
#endif
@@ -4046,7 +4046,7 @@ static int lpc43_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
ret = lpc43_async_setup(rhport, ep0info, req, buffer, len);
if (ret < 0)
{
- udbg("ERROR: lpc43_async_setup failed: %d\n", ret);
+ uerr("ERROR: lpc43_async_setup failed: %d\n", ret);
goto errout_with_iocwait;
}
@@ -4511,7 +4511,7 @@ static int lpc43_connect(FAR struct usbhost_driver_s *drvr,
/* Set the connected/disconnected flag */
hport->connected = connected;
- ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+ ullinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
/* Report the connection event */
@@ -4711,7 +4711,7 @@ FAR struct usbhost_connection_s *lpc43_ehci_initialize(int controller)
{
FAR struct usbhost_hubport_s *hport;
uint32_t regval;
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_INFO)
uint16_t regval16;
unsigned int nports;
#endif
@@ -4948,7 +4948,7 @@ FAR struct usbhost_connection_s *lpc43_ehci_initialize(int controller)
lpc43_putreg(EHCI_INT_ALLINTS, &HCOR->usbsts);
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_INFO)
/* Show the EHCI version */
regval16 = lpc43_swap16(HCCR->hciversion);
diff --git a/arch/arm/src/lpc43xx/lpc43_ethernet.c b/arch/arm/src/lpc43xx/lpc43_ethernet.c
index cca1e897666bafecb8c3d2a5f9c53d7455d81036..37e39dee6df9e8bd7ae1255586d764dc84a0f322 100644
--- a/arch/arm/src/lpc43xx/lpc43_ethernet.c
+++ b/arch/arm/src/lpc43xx/lpc43_ethernet.c
@@ -197,7 +197,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_LPC43_ETHMAC_REGDEBUG
#endif
@@ -559,7 +559,7 @@ static struct lpc43_ethmac_s g_lpc43ethmac;
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_LPC43_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_LPC43_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t lpc43_getreg(uint32_t addr);
static void lpc43_putreg(uint32_t val, uint32_t addr);
static void lpc43_checksetup(void);
@@ -683,7 +683,7 @@ static int lpc43_ethconfig(FAR struct lpc43_ethmac_s *priv);
*
****************************************************************************/
-#if defined(CONFIG_LPC43_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_LPC43_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t lpc43_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -704,7 +704,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -721,7 +721,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -733,7 +733,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@@ -755,12 +755,12 @@ static uint32_t lpc43_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_LPC43_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_LPC43_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void lpc43_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, val);
+ llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@@ -782,7 +782,7 @@ static void lpc43_putreg(uint32_t val, uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_LPC43_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_LPC43_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void lpc43_checksetup(void)
{
}
@@ -947,7 +947,7 @@ static int lpc43_transmit(FAR struct lpc43_ethmac_s *priv)
txdesc = priv->txhead;
txfirst = txdesc;
- nllvdbg("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
+ nllinfo("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
priv->dev.d_len, priv->dev.d_buf, txdesc, txdesc->tdes0);
DEBUGASSERT(txdesc && (txdesc->tdes0 & ETH_TDES0_OWN) == 0);
@@ -964,7 +964,7 @@ static int lpc43_transmit(FAR struct lpc43_ethmac_s *priv)
bufcount = (priv->dev.d_len + (CONFIG_LPC43_ETH_BUFSIZE-1)) / CONFIG_LPC43_ETH_BUFSIZE;
lastsize = priv->dev.d_len - (bufcount - 1) * CONFIG_LPC43_ETH_BUFSIZE;
- nllvdbg("bufcount: %d lastsize: %d\n", bufcount, lastsize);
+ nllinfo("bufcount: %d lastsize: %d\n", bufcount, lastsize);
/* Set the first segment bit in the first TX descriptor */
@@ -1074,7 +1074,7 @@ static int lpc43_transmit(FAR struct lpc43_ethmac_s *priv)
priv->inflight++;
- nllvdbg("txhead: %p txtail: %p inflight: %d\n",
+ nllinfo("txhead: %p txtail: %p inflight: %d\n",
priv->txhead, priv->txtail, priv->inflight);
/* If all TX descriptors are in-flight, then we have to disable receive interrupts
@@ -1373,7 +1373,7 @@ static void lpc43_freesegment(FAR struct lpc43_ethmac_s *priv,
struct eth_rxdesc_s *rxdesc;
int i;
- nllvdbg("rxfirst: %p segments: %d\n", rxfirst, segments);
+ nllinfo("rxfirst: %p segments: %d\n", rxfirst, segments);
/* Set OWN bit in RX descriptors. This gives the buffers back to DMA */
@@ -1431,7 +1431,7 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
uint8_t *buffer;
int i;
- nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+ nllinfo("rxhead: %p rxcurr: %p segments: %d\n",
priv->rxhead, priv->rxcurr, priv->segments);
/* Check if there are free buffers. We cannot receive new frames in this
@@ -1440,7 +1440,7 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
if (!lpc43_isfreebuffer(priv))
{
- nlldbg("No free buffers\n");
+ nllerr("No free buffers\n");
return -ENOMEM;
}
@@ -1497,7 +1497,7 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
rxcurr = priv->rxcurr;
}
- nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+ nllinfo("rxhead: %p rxcurr: %p segments: %d\n",
priv->rxhead, priv->rxcurr, priv->segments);
/* Check if any errors are reported in the frame */
@@ -1536,7 +1536,7 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
priv->rxhead = (struct eth_rxdesc_s *)rxdesc->rdes3;
lpc43_freesegment(priv, rxcurr, priv->segments);
- nllvdbg("rxhead: %p d_buf: %p d_len: %d\n",
+ nllinfo("rxhead: %p d_buf: %p d_len: %d\n",
priv->rxhead, dev->d_buf, dev->d_len);
return OK;
@@ -1547,7 +1547,7 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
* scanning logic, and continue scanning with the next frame.
*/
- nlldbg("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
+ nllerr("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
lpc43_freesegment(priv, rxcurr, priv->segments);
}
}
@@ -1563,7 +1563,7 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv)
priv->rxhead = rxdesc;
- nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+ nllinfo("rxhead: %p rxcurr: %p segments: %d\n",
priv->rxhead, priv->rxcurr, priv->segments);
return -EAGAIN;
@@ -1608,7 +1608,7 @@ static void lpc43_receive(FAR struct lpc43_ethmac_s *priv)
if (dev->d_len > CONFIG_NET_ETH_MTU)
{
- nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+ nllerr("DROPPED: Too big: %d\n", dev->d_len);
/* Free dropped packet buffer */
if (dev->d_buf)
@@ -1632,7 +1632,7 @@ static void lpc43_receive(FAR struct lpc43_ethmac_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
/* Handle ARP on input then give the IPv4 packet to the network
* layer
@@ -1672,7 +1672,7 @@ static void lpc43_receive(FAR struct lpc43_ethmac_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
/* Give the IPv6 packet to the network layer */
@@ -1709,7 +1709,7 @@ static void lpc43_receive(FAR struct lpc43_ethmac_s *priv)
#ifdef CONFIG_NET_ARP
if (BUF->type == htons(ETHTYPE_ARP))
{
- nllvdbg("ARP frame\n");
+ nllinfo("ARP frame\n");
/* Handle ARP packet */
@@ -1727,7 +1727,7 @@ static void lpc43_receive(FAR struct lpc43_ethmac_s *priv)
else
#endif
{
- nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+ nllerr("DROPPED: Unknown type: %04x\n", BUF->type);
}
/* We are finished with the RX buffer. NOTE: If the buffer is
@@ -1768,7 +1768,7 @@ static void lpc43_freeframe(FAR struct lpc43_ethmac_s *priv)
struct eth_txdesc_s *txdesc;
int i;
- nllvdbg("txhead: %p txtail: %p inflight: %d\n",
+ nllinfo("txhead: %p txtail: %p inflight: %d\n",
priv->txhead, priv->txtail, priv->inflight);
/* Scan for "in-flight" descriptors owned by the CPU */
@@ -1784,7 +1784,7 @@ static void lpc43_freeframe(FAR struct lpc43_ethmac_s *priv)
* TX descriptors.
*/
- nllvdbg("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
+ nllinfo("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
txdesc, txdesc->tdes0, txdesc->tdes2, txdesc->tdes3);
DEBUGASSERT(txdesc->tdes2 != 0);
@@ -1837,7 +1837,7 @@ static void lpc43_freeframe(FAR struct lpc43_ethmac_s *priv)
priv->txtail = txdesc;
- nllvdbg("txhead: %p txtail: %p inflight: %d\n",
+ nllinfo("txhead: %p txtail: %p inflight: %d\n",
priv->txhead, priv->txtail, priv->inflight);
}
}
@@ -1975,7 +1975,7 @@ static inline void lpc43_interrupt_process(FAR struct lpc43_ethmac_s *priv)
{
/* Just let the user know what happened */
- nlldbg("Abnormal event(s): %08x\n", dmasr);
+ nllerr("Abnormal event(s): %08x\n", dmasr);
/* Clear all pending abnormal events */
@@ -2179,7 +2179,7 @@ static void lpc43_txtimeout_expiry(int argc, uint32_t arg, ...)
{
FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)arg;
- nlldbg("Timeout!\n");
+ nllerr("Timeout!\n");
#ifdef CONFIG_NET_NOINTS
/* Disable further Ethernet interrupts. This will prevent some race
@@ -2381,12 +2381,12 @@ static int lpc43_ifup(struct net_driver_s *dev)
int ret;
#ifdef CONFIG_NET_IPv4
- ndbg("Bringing up: %d.%d.%d.%d\n",
+ nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
#endif
#ifdef CONFIG_NET_IPv6
- ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+ nerr("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
@@ -2435,7 +2435,7 @@ static int lpc43_ifdown(struct net_driver_s *dev)
FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)dev->d_private;
irqstate_t flags;
- ndbg("Taking the network down\n");
+ nerr("Taking the network down\n");
/* Disable the Ethernet interrupt */
@@ -2480,7 +2480,7 @@ static int lpc43_ifdown(struct net_driver_s *dev)
static inline void lpc43_txavail_process(FAR struct lpc43_ethmac_s *priv)
{
- nvdbg("ifup: %d\n", priv->ifup);
+ ninfo("ifup: %d\n", priv->ifup);
/* Ignore the notification if the interface is not yet up */
@@ -2647,7 +2647,7 @@ static int lpc43_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
uint32_t temp;
uint32_t registeraddress;
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Add the MAC address to the hardware multicast hash table */
@@ -2704,7 +2704,7 @@ static int lpc43_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
uint32_t temp;
uint32_t registeraddress;
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Remove the MAC address to the hardware multicast hash table */
@@ -3065,7 +3065,7 @@ static int lpc43_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *val
}
}
- ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
+ nerr("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
phydevaddr, phyregaddr);
return -ETIMEDOUT;
@@ -3124,7 +3124,7 @@ static int lpc43_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t val
}
}
- ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
+ nerr("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
phydevaddr, phyregaddr, value);
return -ETIMEDOUT;
@@ -3161,7 +3161,7 @@ static inline int lpc43_dm9161(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, MII_PHYID1, &phyval);
if (ret < 0)
{
- ndbg("Failed to read the PHY ID1: %d\n", ret);
+ nerr("Failed to read the PHY ID1: %d\n", ret);
return ret;
}
@@ -3172,14 +3172,14 @@ static inline int lpc43_dm9161(FAR struct lpc43_ethmac_s *priv)
up_systemreset();
}
- nvdbg("PHY ID1: 0x%04X\n", phyval);
+ ninfo("PHY ID1: 0x%04X\n", phyval);
/* Now check the "DAVICOM Specified Configuration Register (DSCR)", Register 16 */
ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, 16, &phyval);
if (ret < 0)
{
- ndbg("Failed to read the PHY Register 0x10: %d\n", ret);
+ nerr("Failed to read the PHY Register 0x10: %d\n", ret);
return ret;
}
@@ -3236,7 +3236,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phywrite(CONFIG_LPC43_PHYADDR, MII_MCR, MII_MCR_RESET);
if (ret < 0)
{
- ndbg("Failed to reset the PHY: %d\n", ret);
+ nerr("Failed to reset the PHY: %d\n", ret);
return ret;
}
@@ -3248,7 +3248,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phy_boardinitialize(0);
if (ret < 0)
{
- ndbg("Failed to initialize the PHY: %d\n", ret);
+ nerr("Failed to initialize the PHY: %d\n", ret);
return ret;
}
#endif
@@ -3273,7 +3273,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, MII_MSR, &phyval);
if (ret < 0)
{
- ndbg("Failed to read the PHY MSR: %d\n", ret);
+ nerr("Failed to read the PHY MSR: %d\n", ret);
return ret;
}
else if ((phyval & MII_MSR_LINKSTATUS) != 0)
@@ -3284,7 +3284,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
if (timeout >= PHY_RETRY_TIMEOUT)
{
- ndbg("Timed out waiting for link status: %04x\n", phyval);
+ nerr("Timed out waiting for link status: %04x\n", phyval);
return -ETIMEDOUT;
}
@@ -3293,7 +3293,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phywrite(CONFIG_LPC43_PHYADDR, MII_MCR, MII_MCR_ANENABLE);
if (ret < 0)
{
- ndbg("Failed to enable auto-negotiation: %d\n", ret);
+ nerr("Failed to enable auto-negotiation: %d\n", ret);
return ret;
}
@@ -3304,7 +3304,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, MII_MSR, &phyval);
if (ret < 0)
{
- ndbg("Failed to read the PHY MSR: %d\n", ret);
+ nerr("Failed to read the PHY MSR: %d\n", ret);
return ret;
}
else if ((phyval & MII_MSR_ANEGCOMPLETE) != 0)
@@ -3315,7 +3315,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
if (timeout >= PHY_RETRY_TIMEOUT)
{
- ndbg("Timed out waiting for auto-negotiation\n");
+ nerr("Timed out waiting for auto-negotiation\n");
return -ETIMEDOUT;
}
@@ -3324,13 +3324,13 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, CONFIG_LPC43_PHYSR, &phyval);
if (ret < 0)
{
- ndbg("Failed to read PHY status register\n");
+ nerr("Failed to read PHY status register\n");
return ret;
}
/* Remember the selected speed and duplex modes */
- nvdbg("PHYSR[%d]: %04x\n", CONFIG_LPC43_PHYSR, phyval);
+ ninfo("PHYSR[%d]: %04x\n", CONFIG_LPC43_PHYSR, phyval);
#ifdef CONFIG_ETH0_PHY_LAN8720
if ((phyval & (MII_MSR_100BASETXHALF | MII_MSR_100BASETXFULL)) != 0)
@@ -3418,7 +3418,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phywrite(CONFIG_LPC43_PHYADDR, MII_MCR, phyval);
if (ret < 0)
{
- ndbg("Failed to write the PHY MCR: %d\n", ret);
+ nerr("Failed to write the PHY MCR: %d\n", ret);
return ret;
}
@@ -3434,7 +3434,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
#endif
#endif
- ndbg("Duplex: %s Speed: %d MBps\n",
+ nerr("Duplex: %s Speed: %d MBps\n",
priv->fduplex ? "FULL" : "HALF",
priv->mbps100 ? 100 : 10);
@@ -3718,7 +3718,7 @@ static void lpc43_macaddress(FAR struct lpc43_ethmac_s *priv)
FAR struct net_driver_s *dev = &priv->dev;
uint32_t regval;
- nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
@@ -3786,7 +3786,7 @@ static void lpc43_ipv6multicast(FAR struct lpc43_ethmac_s *priv)
mac[4] = tmp16 & 0xff;
mac[5] = tmp16 >> 8;
- nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
(void)lpc43_addmac(dev, mac);
@@ -3925,12 +3925,12 @@ static int lpc43_ethconfig(FAR struct lpc43_ethmac_s *priv)
/* Reset the Ethernet block */
- nllvdbg("Reset the Ethernet block\n");
+ nllinfo("Reset the Ethernet block\n");
lpc43_ethreset(priv);
/* Initialize the PHY */
- nllvdbg("Initialize the PHY\n");
+ nllinfo("Initialize the PHY\n");
ret = lpc43_phyinit(priv);
if (ret < 0)
{
@@ -3945,7 +3945,7 @@ static int lpc43_ethconfig(FAR struct lpc43_ethmac_s *priv)
/* Initialize the MAC and DMA */
- nllvdbg("Initialize the MAC and DMA\n");
+ nllinfo("Initialize the MAC and DMA\n");
ret = lpc43_macconfig(priv);
if (ret < 0)
{
@@ -3966,7 +3966,7 @@ static int lpc43_ethconfig(FAR struct lpc43_ethmac_s *priv)
/* Enable normal MAC operation */
- nllvdbg("Enable normal operation\n");
+ nllinfo("Enable normal operation\n");
return lpc43_macenable(priv);
}
diff --git a/arch/arm/src/lpc43xx/lpc43_gpdma.c b/arch/arm/src/lpc43xx/lpc43_gpdma.c
index 991f80a1cfd74590c4d603727c6ef909b4b581ab..242b169952e1dee68b2e40cb210afb86166bb38d 100644
--- a/arch/arm/src/lpc43xx/lpc43_gpdma.c
+++ b/arch/arm/src/lpc43xx/lpc43_gpdma.c
@@ -61,22 +61,22 @@
* Pre-processor Definitions
****************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
+/* Enables debug output from this file (needs CONFIG_DEBUG_FEATURES too) */
#undef DMA_DEBUG /* Define to enable debug */
#undef DMA_VERBOSE /* Define to enable verbose debug */
#ifdef DMA_DEBUG
-# define dmadbg lldbg
+# define dmaerr llerr
# ifdef DMA_VERBOSE
-# define spivdbg lldbg
+# define spiinfo llerr
# else
-# define spivdbg(x...)
+# define spiinfo(x...)
# endif
#else
# undef DMA_VERBOSE
-# define dmadbg(x...)
-# define spivdbg(x...)
+# define dmaerr(x...)
+# define spiinfo(x...)
#endif
/****************************************************************************
diff --git a/arch/arm/src/lpc43xx/lpc43_gpio.c b/arch/arm/src/lpc43xx/lpc43_gpio.c
index cda1757cd379bb9370981145d1feb35f502d31d5..783c66c0605a2de6a99780852e2002574129abdb 100644
--- a/arch/arm/src/lpc43xx/lpc43_gpio.c
+++ b/arch/arm/src/lpc43xx/lpc43_gpio.c
@@ -198,7 +198,7 @@ int lpc43_gpio_config(uint16_t gpiocfg)
break;
default :
- sdbg("ERROR: Unrecognized pin mode: %04x\n", gpiocfg);
+ serr("ERROR: Unrecognized pin mode: %04x\n", gpiocfg);
ret = -EINVAL;
break;
}
diff --git a/arch/arm/src/lpc43xx/lpc43_gpio.h b/arch/arm/src/lpc43xx/lpc43_gpio.h
index 4f16c841de4fc3d64bf38f3a6ecf68cc0e59649c..24a492beaed8d0f3851258de97427215111ca541 100644
--- a/arch/arm/src/lpc43xx/lpc43_gpio.h
+++ b/arch/arm/src/lpc43xx/lpc43_gpio.h
@@ -310,7 +310,7 @@ bool lpc43_gpio_read(uint16_t gpiocfg);
*
********************************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
int lpc43_gpio_dump(uint16_t gpiocfg, const char *msg);
#else
# define lpc43_gpio_dump(p,m)
diff --git a/arch/arm/src/lpc43xx/lpc43_i2c.c b/arch/arm/src/lpc43xx/lpc43_i2c.c
index a7ddfa4726cbf0f43a9aa4137269b2d353c8c87d..9bc4f4b6e078d1289e435d73c00855f60b308bd5 100644
--- a/arch/arm/src/lpc43xx/lpc43_i2c.c
+++ b/arch/arm/src/lpc43xx/lpc43_i2c.c
@@ -464,7 +464,7 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port)
if (port > 1)
{
- dbg("lpc I2C Only support 0,1\n");
+ err("lpc I2C Only support 0,1\n");
return NULL;
}
diff --git a/arch/arm/src/lpc43xx/lpc43_idle.c b/arch/arm/src/lpc43xx/lpc43_idle.c
index 62f665495e01bd3c1fddad91f2278912e347b362..4dc5a30209fa30420ad0dc9924409d25bcf2e469 100644
--- a/arch/arm/src/lpc43xx/lpc43_idle.c
+++ b/arch/arm/src/lpc43xx/lpc43_idle.c
@@ -98,7 +98,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */
- llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+ llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */
diff --git a/arch/arm/src/lpc43xx/lpc43_irq.c b/arch/arm/src/lpc43xx/lpc43_irq.c
index a6e54b51f04c12ac917dcc400325d1e8d4ca8fd8..a792163de33a7141ef684015682f4785b7cd6118 100644
--- a/arch/arm/src/lpc43xx/lpc43_irq.c
+++ b/arch/arm/src/lpc43xx/lpc43_irq.c
@@ -113,29 +113,29 @@ static void lpc43_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" INTCTRL: %08x VECTAB: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+ llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
- lldbg(" IRQ ENABLE: %08x %08x\n",
+ llerr(" IRQ ENABLE: %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
- lldbg(" SYSH_PRIO: %08x %08x %08x\n",
+ llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
- lldbg(" %08x %08x %08x\n",
+ llerr(" %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY));
leave_critical_section(flags);
@@ -146,7 +146,7 @@ static void lpc43_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: lpc43_nmi, lpc43_busfault, lpc43_usagefault, lpc43_pendsv,
- * lpc43_dbgmonitor, lpc43_pendsv, lpc43_reserved
+ * lpc43_errmonitor, lpc43_pendsv, lpc43_reserved
*
* Description:
* Handlers for various exceptions. None are handled and all are fatal
@@ -155,11 +155,11 @@ static void lpc43_dumpnvic(const char *msg, int irq)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int lpc43_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -167,7 +167,7 @@ static int lpc43_nmi(int irq, FAR void *context)
static int lpc43_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Bus fault recived\n");
+ err("PANIC!!! Bus fault recived\n");
PANIC();
return 0;
}
@@ -175,7 +175,7 @@ static int lpc43_busfault(int irq, FAR void *context)
static int lpc43_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Usage fault received\n");
+ err("PANIC!!! Usage fault received\n");
PANIC();
return 0;
}
@@ -183,15 +183,15 @@ static int lpc43_usagefault(int irq, FAR void *context)
static int lpc43_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
-static int lpc43_dbgmonitor(int irq, FAR void *context)
+static int lpc43_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Debug Monitor received\n");
+ err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@@ -199,7 +199,7 @@ static int lpc43_dbgmonitor(int irq, FAR void *context)
static int lpc43_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -336,7 +336,7 @@ static int lpc43_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
void up_irqinitialize(void)
{
uint32_t regaddr;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
uint32_t regval;
#endif
int num_priority_registers;
@@ -427,7 +427,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(LPC43_IRQ_NMI, lpc43_nmi);
#ifndef CONFIG_ARM_MPU
irq_attach(LPC43_IRQ_MEMFAULT, up_memfault);
@@ -435,7 +435,7 @@ void up_irqinitialize(void)
irq_attach(LPC43_IRQ_BUSFAULT, lpc43_busfault);
irq_attach(LPC43_IRQ_USAGEFAULT, lpc43_usagefault);
irq_attach(LPC43_IRQ_PENDSV, lpc43_pendsv);
- irq_attach(LPC43_IRQ_DBGMONITOR, lpc43_dbgmonitor);
+ irq_attach(LPC43_IRQ_DBGMONITOR, lpc43_errmonitor);
irq_attach(LPC43_IRQ_RESERVED, lpc43_reserved);
#endif
@@ -446,7 +446,7 @@ void up_irqinitialize(void)
* operation.
*/
-#if defined(CONFIG_DEBUG) && !defined(CONFIG_ARMV7M_USEBASEPRI)
+#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI)
regval = getreg32(NVIC_DEMCR);
regval &= ~NVIC_DEMCR_VCHARDERR;
putreg32(regval, NVIC_DEMCR);
diff --git a/arch/arm/src/lpc43xx/lpc43_pinconfig.h b/arch/arm/src/lpc43xx/lpc43_pinconfig.h
index dad885d86bd52050605ed24abd7df00322dde0e7..63e7d768bdc6c712a921970f00819f4512893689 100644
--- a/arch/arm/src/lpc43xx/lpc43_pinconfig.h
+++ b/arch/arm/src/lpc43xx/lpc43_pinconfig.h
@@ -264,7 +264,7 @@ int lpc43_pin_config(uint32_t pinconf);
*
********************************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
int lpc43_pin_dump(uint32_t pinconf, const char *msg);
#else
# define lpc43_pin_dump(p,m)
diff --git a/arch/arm/src/lpc43xx/lpc43_rgu.c b/arch/arm/src/lpc43xx/lpc43_rgu.c
index 9671a4f8a59709f3b672240eeeaa33acb1f5c4f6..799e3c21e65dc5cc79a0d2b548cd9b27d2765cf0 100644
--- a/arch/arm/src/lpc43xx/lpc43_rgu.c
+++ b/arch/arm/src/lpc43xx/lpc43_rgu.c
@@ -75,7 +75,7 @@
* Description:
* Reset as many of the LPC43 peripherals as possible. This is necessary
* because the LPC43 does not provide any way of performing a full system
- * reset under debugger control. So, if CONFIG_DEBUG is set (indicating
+ * reset under debugger control. So, if CONFIG_DEBUG_FEATURES is set (indicating
* that a debugger is being used?), the boot logic will call this
* function on all restarts.
*
diff --git a/arch/arm/src/lpc43xx/lpc43_rgu.h b/arch/arm/src/lpc43xx/lpc43_rgu.h
index 2d1604d23a4c3a9b44ce09773c587b1a6c47e75f..f283a9aaf3611d083652eefa8c6c70309cced9fb 100644
--- a/arch/arm/src/lpc43xx/lpc43_rgu.h
+++ b/arch/arm/src/lpc43xx/lpc43_rgu.h
@@ -76,7 +76,7 @@ extern "C"
* Description:
* Reset as many of the LPC43 peripherals as possible. This is necessary
* because the LPC43 does not provide any way of performing a full system
- * reset under debugger control. So, if CONFIG_DEBUG is set (indicating
+ * reset under debugger control. So, if CONFIG_DEBUG_FEATURES is set (indicating
* that a debugger is being used?), the boot logic will call this
* function on all restarts.
*
diff --git a/arch/arm/src/lpc43xx/lpc43_rit.c b/arch/arm/src/lpc43xx/lpc43_rit.c
index f80cd550ac052725e44155c8ba45c918c1e5003a..2b153fb1b3199f98dc0ff976533893fd8eef859e 100644
--- a/arch/arm/src/lpc43xx/lpc43_rit.c
+++ b/arch/arm/src/lpc43xx/lpc43_rit.c
@@ -201,7 +201,7 @@ void up_timer_initialize(void)
mask_bits++;
}
- lldbg("mask_bits = %d, mask = %X, ticks_per_int = %d\r\n",
+ llerr("mask_bits = %d, mask = %X, ticks_per_int = %d\r\n",
mask_bits, (0xffffffff << (32 - mask_bits)), ticks_per_int);
/* Set the mask and compare value so we get interrupts every
diff --git a/arch/arm/src/lpc43xx/lpc43_serial.c b/arch/arm/src/lpc43xx/lpc43_serial.c
index c12d65597b1b2e7df3709df5f75fe79df6bc052d..1e045e13d7ea0aac023d7b4e72d8a53c4f51df56 100644
--- a/arch/arm/src/lpc43xx/lpc43_serial.c
+++ b/arch/arm/src/lpc43xx/lpc43_serial.c
@@ -854,7 +854,7 @@ static int up_interrupt(int irq, void *context)
/* Read the modem status register (MSR) to clear */
status = up_serialin(priv, LPC43_UART_MSR_OFFSET);
- vdbg("MSR: %02x\n", status);
+ info("MSR: %02x\n", status);
break;
}
@@ -865,7 +865,7 @@ static int up_interrupt(int irq, void *context)
/* Read the line status register (LSR) to clear */
status = up_serialin(priv, LPC43_UART_LSR_OFFSET);
- vdbg("LSR: %02x\n", status);
+ info("LSR: %02x\n", status);
break;
}
@@ -873,7 +873,7 @@ static int up_interrupt(int irq, void *context)
default:
{
- dbg("Unexpected IIR: %02x\n", status);
+ err("Unexpected IIR: %02x\n", status);
break;
}
}
diff --git a/arch/arm/src/lpc43xx/lpc43_spi.c b/arch/arm/src/lpc43xx/lpc43_spi.c
index 32b5a45913188bb7bc0d1f39dbfafdf51f41bc01..16dde2582e16748286eeb4c0b538ea2fe8f7a06d 100644
--- a/arch/arm/src/lpc43xx/lpc43_spi.c
+++ b/arch/arm/src/lpc43xx/lpc43_spi.c
@@ -64,19 +64,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
+/* Enables debug output from this file (needs CONFIG_DEBUG_FEATURES too) */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# undef CONFIG_DEBUG_VERBOSE
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
/* SPI Clocking.
@@ -274,7 +271,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
- spidbg("Frequency %d->%d\n", frequency, actual);
+ spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -436,7 +433,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
uint8_t data;
- spidbg("nwords: %d\n", nwords);
+ spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write the data to transmitted to the SPI Data Register */
@@ -481,7 +478,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
{
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
- spidbg("nwords: %d\n", nwords);
+ spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write some dummy data to the SPI Data Register in order to clock the
diff --git a/arch/arm/src/lpc43xx/lpc43_spifi.c b/arch/arm/src/lpc43xx/lpc43_spifi.c
index 0d90ea9fceb15b162652c9a627e1888c160ef990..71920dc47750290990302ffd9dd6d9670f737df5 100644
--- a/arch/arm/src/lpc43xx/lpc43_spifi.c
+++ b/arch/arm/src/lpc43xx/lpc43_spifi.c
@@ -92,7 +92,7 @@
* from the SPI address space after each write.
* CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers. You
* probably do not want to enable this unless you want to dig through a
- * *lot* of debug output! Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE,
+ * *lot* of debug output! Also required CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO,
* and CONFIG_DEBUG_FS,
*/
@@ -263,7 +263,7 @@
* enable this unless you want to dig through a *lot* of debug output!
*/
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_VERBOSE) || !defined(CONFIG_DEBUG_FS)
+#if !defined(CONFIG_DEBUG_FEATURES) || !defined(CONFIG_DEBUG_INFO) || !defined(CONFIG_DEBUG_FS)
# undef CONFIG_DEBUG_SPIFI_DUMP
#endif
@@ -382,13 +382,13 @@ static void lpc43_blockerase(struct lpc43_dev_s *priv, off_t sector)
priv->operands.dest = SPIFI_BASE + (sector << SPIFI_BLKSHIFT);
priv->operands.length = SPIFI_BLKSIZE;
- fvdbg("SPIFI_ERASE: dest=%p length=%d\n",
+ finfo("SPIFI_ERASE: dest=%p length=%d\n",
priv->operands.dest, priv->operands.length);
result = SPIFI_ERASE(priv, &priv->rom, &priv->operands);
if (result != 0)
{
- fdbg("ERROR: SPIFI_ERASE failed: %05x\n", result);
+ ferr("ERROR: SPIFI_ERASE failed: %05x\n", result);
}
}
@@ -411,13 +411,13 @@ static inline int lpc43_chiperase(struct lpc43_dev_s *priv)
priv->operands.dest = SPIFI_BASE;
priv->operands.length = SPIFI_BLKSIZE * priv->nblocks;
- fvdbg("SPIFI_ERASE: dest=%p length=%d\n",
+ finfo("SPIFI_ERASE: dest=%p length=%d\n",
priv->operands.dest, priv->operands.length);
result = SPIFI_ERASE(priv, &priv->rom, &priv->operands);
if (result != 0)
{
- fdbg("ERROR: SPIFI_ERASE failed: %05x\n", result);
+ ferr("ERROR: SPIFI_ERASE failed: %05x\n", result);
return -EIO;
}
@@ -457,13 +457,13 @@ static int lpc43_pagewrite(FAR struct lpc43_dev_s *priv, FAR uint8_t *dest,
priv->operands.dest = dest;
priv->operands.length = nbytes;
- fvdbg("SPIFI_PROGRAM: src=%p dest=%p length=%d\n",
+ finfo("SPIFI_PROGRAM: src=%p dest=%p length=%d\n",
src, priv->operands.dest, priv->operands.length);
result = SPIFI_PROGRAM(priv, &priv->rom, src, &priv->operands);
if (result != 0)
{
- fdbg("ERROR: SPIFI_PROGRAM failed: %05x\n", result);
+ ferr("ERROR: SPIFI_PROGRAM failed: %05x\n", result);
return -EIO;
}
@@ -475,7 +475,7 @@ static int lpc43_pagewrite(FAR struct lpc43_dev_s *priv, FAR uint8_t *dest,
result = lpc43_verify(priv, dest, src, nbytes);
if (result != 0)
{
- fdbg("ERROR: lpc43_verify failed: %05x\n", result);
+ ferr("ERROR: lpc43_verify failed: %05x\n", result);
return -EIO;
}
#endif
@@ -492,7 +492,7 @@ static inline void lpc43_pageread(FAR struct lpc43_dev_s *priv,
FAR uint8_t *dest, FAR const uint8_t *src,
size_t nbytes)
{
- fvdbg("src=%p dest=%p length=%d\n", src, dest, nbytes);
+ finfo("src=%p dest=%p length=%d\n", src, dest, nbytes);
memcpy(dest, src, nbytes);
}
@@ -511,7 +511,7 @@ static void lpc43_cacheflush(struct lpc43_dev_s *priv)
* the cached erase block to FLASH.
*/
- fvdbg("flags: %02x blkno: %d\n", priv->flags, priv->blkno);
+ finfo("flags: %02x blkno: %d\n", priv->flags, priv->blkno);
if (IS_DIRTY(priv) || IS_ERASED(priv))
{
/* Get the SPIFI address corresponding to the cached erase block */
@@ -523,7 +523,7 @@ static void lpc43_cacheflush(struct lpc43_dev_s *priv)
ret = lpc43_pagewrite(priv, dest, priv->cache, SPIFI_BLKSIZE);
if (ret < 0)
{
- fdbg("ERROR: lpc43_pagewrite failed: %d\n", ret);
+ ferr("ERROR: lpc43_pagewrite failed: %d\n", ret);
}
/* The case is no long dirty and the FLASH is no longer erased */
@@ -551,7 +551,7 @@ static FAR uint8_t *lpc43_cacheread(struct lpc43_dev_s *priv, off_t sector)
*/
blkno = sector >> (SPIFI_BLKSHIFT - SPIFI_512SHIFT);
- fvdbg("sector: %ld blkno: %d\n", sector, blkno);
+ finfo("sector: %ld blkno: %d\n", sector, blkno);
/* Check if the requested erase block is already in the cache */
@@ -612,7 +612,7 @@ static void lpc43_cacheerase(struct lpc43_dev_s *priv, off_t sector)
if (!IS_ERASED(priv))
{
off_t blkno = sector >> (SPIFI_BLKSHIFT - SPIFI_512SHIFT);
- fvdbg("sector: %ld blkno: %d\n", sector, blkno);
+ finfo("sector: %ld blkno: %d\n", sector, blkno);
lpc43_blockerase(priv, blkno);
SET_ERASED(priv);
@@ -646,7 +646,7 @@ static void lpc43_cachewrite(FAR struct lpc43_dev_s *priv, FAR const uint8_t *bu
dest = lpc43_cacheread(priv, sector);
- fvdbg("dest=%p src=%p sector: %ld flags: %02x\n",
+ finfo("dest=%p src=%p sector: %ld flags: %02x\n",
dest, buffer, sector, priv->flags);
/* Erase the block containing this sector if it is not already erased.
@@ -657,7 +657,7 @@ static void lpc43_cachewrite(FAR struct lpc43_dev_s *priv, FAR const uint8_t *bu
if (!IS_ERASED(priv))
{
off_t blkno = sector >> (SPIFI_BLKSHIFT - SPIFI_512SHIFT);
- fvdbg("sector: %ld blkno: %d\n", sector, blkno);
+ finfo("sector: %ld blkno: %d\n", sector, blkno);
lpc43_blockerase(priv, blkno);
SET_ERASED(priv);
@@ -692,7 +692,7 @@ static int lpc43_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbloc
FAR struct lpc43_dev_s *priv = (FAR struct lpc43_dev_s *)dev;
size_t blocksleft = nblocks;
- fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+ finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
while (blocksleft-- > 0)
{
@@ -726,7 +726,7 @@ static ssize_t lpc43_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t n
#ifdef CONFIG_SPIFI_SECTOR512
ssize_t nbytes;
- fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+ finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
/* On this device, we can handle the block read just like the byte-oriented read */
@@ -743,7 +743,7 @@ static ssize_t lpc43_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t n
FAR struct lpc43_dev_s *priv = (FAR struct lpc43_dev_s *)dev;
ssize_t nbytes;
- fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+ finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
/* On this device, we can handle the block read just like the byte-oriented read */
@@ -774,7 +774,7 @@ static ssize_t lpc43_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t
FAR struct lpc43_dev_s *priv = (FAR struct lpc43_dev_s *)dev;
- fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+ finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
lpc43_cachewrite(priv, buffer, startblock, nblocks);
@@ -786,7 +786,7 @@ static ssize_t lpc43_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t
FAR struct lpc43_dev_s *priv = (FAR struct lpc43_dev_s *)dev;
FAR uint8_t *dest;
- fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+ finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
/* Get the SPIFI address corresponding to the erase block */
@@ -798,7 +798,7 @@ static ssize_t lpc43_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t
ret = lpc43_pagewrite(priv, dest, buffer, nblocks << SPIFI_512SHIFT);
if (ret < 0)
{
- fdbg("ERROR: lpc43_pagewrite failed: %d\n", ret);
+ ferr("ERROR: lpc43_pagewrite failed: %d\n", ret);
return ret;
}
#endif
@@ -819,7 +819,7 @@ static ssize_t lpc43_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes
FAR struct lpc43_dev_s *priv = (FAR struct lpc43_dev_s *)dev;
FAR const uint8_t *src;
- fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+ finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
/* Get the SPIFI address corresponding sector */
@@ -829,7 +829,7 @@ static ssize_t lpc43_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes
lpc43_pageread(priv, buffer, src, nbytes);
- fvdbg("return nbytes: %d\n", (int)nbytes);
+ finfo("return nbytes: %d\n", (int)nbytes);
return nbytes;
}
@@ -842,7 +842,7 @@ static int lpc43_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
FAR struct lpc43_dev_s *priv = (FAR struct lpc43_dev_s *)dev;
int ret = -EINVAL; /* Assume good command with bad parameters */
- fvdbg("cmd: %d \n", cmd);
+ finfo("cmd: %d \n", cmd);
switch (cmd)
{
@@ -871,7 +871,7 @@ static int lpc43_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
#endif
ret = OK;
- fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+ finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
geo->blocksize, geo->erasesize, geo->neraseblocks);
}
}
@@ -891,7 +891,7 @@ static int lpc43_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
break;
}
- fvdbg("return %d\n", ret);
+ finfo("return %d\n", ret);
return ret;
}
@@ -1025,7 +1025,7 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv)
S_RCVCLK | S_FULLCLK, SCLK_MHZ);
if (result != 0)
{
- fdbg("ERROR: SPIFI_INIT failed: %05x\n", result);
+ ferr("ERROR: SPIFI_INIT failed: %05x\n", result);
/* Try again */
@@ -1033,29 +1033,29 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv)
S_RCVCLK | S_FULLCLK, SCLK_MHZ);
if (result != 0)
{
- fdbg("ERROR: SPIFI_INIT failed: %05x\n", result);
+ ferr("ERROR: SPIFI_INIT failed: %05x\n", result);
return -ENODEV;
}
}
- fvdbg("SPFI:\n");
- fvdbg(" base: %08x\n", priv->rom.base);
- fvdbg(" regbase: %08x\n", priv->rom.regbase);
- fvdbg(" devsize: %08x\n", priv->rom.devsize);
- fvdbg(" memsize: %08x\n", priv->rom.memsize);
- fvdbg(" mfger: %02x\n", priv->rom.mfger);
- fvdbg(" devtype: %02x\n", priv->rom.devtype);
- fvdbg(" devid: %02x\n", priv->rom.devid);
- fvdbg(" busy: %02x\n", priv->rom.busy);
- fvdbg(" stat: %04x\n", priv->rom.stat.h);
- fvdbg(" setprot: %04x\n", priv->rom.setprot);
- fvdbg(" writeprot: %04x\n", priv->rom.writeprot);
- fvdbg(" memcmd: %08x\n", priv->rom.memcmd);
- fvdbg(" progcmd: %08x\n", priv->rom.progcmd);
- fvdbg(" sectors: %04x\n", priv->rom.sectors);
- fvdbg(" protbytes: %04x\n", priv->rom.protbytes);
- fvdbg(" opts: %08x\n", priv->rom.opts);
- fvdbg(" errcheck: %08x\n", priv->rom.errcheck);
+ finfo("SPFI:\n");
+ finfo(" base: %08x\n", priv->rom.base);
+ finfo(" regbase: %08x\n", priv->rom.regbase);
+ finfo(" devsize: %08x\n", priv->rom.devsize);
+ finfo(" memsize: %08x\n", priv->rom.memsize);
+ finfo(" mfger: %02x\n", priv->rom.mfger);
+ finfo(" devtype: %02x\n", priv->rom.devtype);
+ finfo(" devid: %02x\n", priv->rom.devid);
+ finfo(" busy: %02x\n", priv->rom.busy);
+ finfo(" stat: %04x\n", priv->rom.stat.h);
+ finfo(" setprot: %04x\n", priv->rom.setprot);
+ finfo(" writeprot: %04x\n", priv->rom.writeprot);
+ finfo(" memcmd: %08x\n", priv->rom.memcmd);
+ finfo(" progcmd: %08x\n", priv->rom.progcmd);
+ finfo(" sectors: %04x\n", priv->rom.sectors);
+ finfo(" protbytes: %04x\n", priv->rom.protbytes);
+ finfo(" opts: %08x\n", priv->rom.opts);
+ finfo(" errcheck: %08x\n", priv->rom.errcheck);
/* Get the largest erase block size */
@@ -1065,11 +1065,11 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv)
sectors = priv->rom.sectors;
log2 = 0;
- fvdbg("FLASH Geometry:\n");
+ finfo("FLASH Geometry:\n");
while (sectors > 0)
{
- fvdbg(" log2: %d rept: %d\n", desc->log2, desc->rept);
+ finfo(" log2: %d rept: %d\n", desc->log2, desc->rept);
/* Check if this is the largest erase block size seen */
@@ -1091,10 +1091,10 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv)
priv->blksize = (1 << log2);
priv->nblocks = (priv->rom.memsize - CONFIG_SPIFI_OFFSET) / priv->blksize;
- fvdbg("Driver FLASH Geometry:\n");
- fvdbg(" blkshift: %d\n", priv->blkshift);
- fvdbg(" blksize: %08x\n", priv->blksize);
- fvdbg(" nblocks: %d\n", priv->nblocks);
+ finfo("Driver FLASH Geometry:\n");
+ finfo(" blkshift: %d\n", priv->blkshift);
+ finfo(" blksize: %08x\n", priv->blksize);
+ finfo(" nblocks: %d\n", priv->nblocks);
#ifdef CONFIG_SPIFI_SECTOR512
DEBUGASSERT(log2 > 9);
@@ -1106,10 +1106,10 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv)
priv->nblocks = ((priv->rom.memsize - CONFIG_SPIFI_OFFSET) >> SPIFI_BLKSHIFT);
- fvdbg("Driver FLASH Geometry:\n");
- fvdbg(" blkshift: %d\n", SPIFI_BLKSHIFT);
- fvdbg(" blksize: %08x\n", SPIFI_BLKSIZE);
- fvdbg(" nblocks: %d\n", priv->nblocks);
+ finfo("Driver FLASH Geometry:\n");
+ finfo(" blkshift: %d\n", SPIFI_BLKSHIFT);
+ finfo(" blksize: %08x\n", SPIFI_BLKSIZE);
+ finfo(" nblocks: %d\n", priv->nblocks);
#endif
return OK;
@@ -1201,14 +1201,14 @@ FAR struct mtd_dev_s *lpc43_spifi_initialize(void)
{
/* Allocation failed! Discard all of that work we just did and return NULL */
- fdbg("ERROR: Allocation failed\n");
+ ferr("ERROR: Allocation failed\n");
return NULL;
}
#endif
/* Return the implementation-specific state structure as the MTD device */
- fvdbg("Return %p\n", priv);
+ finfo("Return %p\n", priv);
return (FAR struct mtd_dev_s *)priv;
}
diff --git a/arch/arm/src/lpc43xx/lpc43_ssp.c b/arch/arm/src/lpc43xx/lpc43_ssp.c
index 0d227fa8fa57e3ff7f808a366d78870eb564d22f..78c880b92ec467a6ce6e862d260daa29e510a973 100644
--- a/arch/arm/src/lpc43xx/lpc43_ssp.c
+++ b/arch/arm/src/lpc43xx/lpc43_ssp.c
@@ -69,27 +69,18 @@
* Pre-processor Definitions
****************************************************************************/
-/* The following enable debug output from this file (needs CONFIG_DEBUG too).
- *
- * CONFIG_SSP_DEBUG - Define to enable basic SSP debug
- * CONFIG_SSP_VERBOSE - Define to enable verbose SSP debug
- */
-
-#ifdef CONFIG_SSP_DEBUG
-# define sspdbg lldbg
-# ifdef CONFIG_SSP_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+/* The following enable debug output from this file */
+
+#ifdef CONFIG_DEBUG_SPI
+# define ssperr llerr
+# define sspwarn llwarn
+# define sspinfo llinfo
#else
-# undef CONFIG_SSP_VERBOSE
-# define sspdbg(x...)
-# define spivdbg(x...)
+# define ssperr(x...)
+# define sspwarn(x...)
+# define sspinfo(x...)
#endif
-
-
/****************************************************************************
* Private Types
****************************************************************************/
@@ -378,7 +369,7 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
- sspdbg("Frequency %d->%d\n", frequency, actual);
+ ssperr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -429,7 +420,7 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
break;
default:
- sspdbg("Bad mode: %d\n", mode);
+ ssperr("Bad mode: %d\n", mode);
DEBUGASSERT(FALSE);
return;
}
@@ -517,7 +508,7 @@ static uint16_t ssp_send(FAR struct spi_dev_s *dev, uint16_t wd)
/* Get the value from the RX FIFO and return it */
regval = ssp_getreg(priv, LPC43_SSP_DR_OFFSET);
- sspdbg("%04x->%04x\n", wd, regval);
+ ssperr("%04x->%04x\n", wd, regval);
return (uint16_t)regval;
}
@@ -564,7 +555,7 @@ static void ssp_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
/* While there is remaining to be sent (and no synchronization error has occurred) */
- sspdbg("nwords: %d\n", nwords);
+ ssperr("nwords: %d\n", nwords);
tx.pv = txbuffer;
rx.pv = rxbuffer;
@@ -576,7 +567,7 @@ static void ssp_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
* and (3) there are more bytes to be sent.
*/
- spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
+ sspinfo("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
while ((ssp_getreg(priv, LPC43_SSP_SR_OFFSET) & SSP_SR_TNF) &&
(rxpending < LPC43_SSP_FIFOSZ) && nwords)
{
@@ -599,7 +590,7 @@ static void ssp_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
/* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */
- spivdbg("RX: rxpending: %d\n", rxpending);
+ sspinfo("RX: rxpending: %d\n", rxpending);
while (ssp_getreg(priv, LPC43_SSP_SR_OFFSET) & SSP_SR_RNE)
{
data = ssp_getreg(priv, LPC43_SSP_DR_OFFSET);
diff --git a/arch/arm/src/lpc43xx/lpc43_start.c b/arch/arm/src/lpc43xx/lpc43_start.c
index 80ffb581ee8fb978e3f69d84435504b2a4493890..e3fe5c552e8b37ff2f652875cd35027fdac61b51 100644
--- a/arch/arm/src/lpc43xx/lpc43_start.c
+++ b/arch/arm/src/lpc43xx/lpc43_start.c
@@ -87,7 +87,7 @@
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# define showprogress(c) up_lowputc(c)
#else
# define showprogress(c)
@@ -271,12 +271,12 @@ void __start(void)
/* Reset as many of the LPC43 peripherals as possible. This is necessary
* because the LPC43 does not provide any way of performing a full system
- * reset under debugger control. So, if CONFIG_DEBUG is set (indicating
+ * reset under debugger control. So, if CONFIG_DEBUG_FEATURES is set (indicating
* that a debugger is being used?), the boot logic will call this
* function on all restarts.
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
lpc43_softreset();
#endif
diff --git a/arch/arm/src/lpc43xx/lpc43_usb0dev.c b/arch/arm/src/lpc43xx/lpc43_usb0dev.c
index 57e3ef2c8ce7a934c7e606182a53b1ab49403721..035b1827b9cc92a19bdf68093b7b132a25031bfe 100644
--- a/arch/arm/src/lpc43xx/lpc43_usb0dev.c
+++ b/arch/arm/src/lpc43xx/lpc43_usb0dev.c
@@ -107,7 +107,7 @@
# define USB_FRAME_INT 0
#endif
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# define USB_ERROR_INT USBDEV_USBINTR_UEE
#else
# define USB_ERROR_INT 0
@@ -361,7 +361,7 @@ struct lpc43_usbdev_s
/* Register operations ********************************************************/
-#if defined(CONFIG_LPC43_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_LPC43_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t lpc43_getreg(uint32_t addr);
static void lpc43_putreg(uint32_t val, uint32_t addr);
#else
@@ -501,7 +501,7 @@ static const struct usbdev_ops_s g_devops =
*
****************************************************************************/
-#if defined(CONFIG_LPC43_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_LPC43_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t lpc43_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -522,7 +522,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -539,7 +539,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -551,7 +551,7 @@ static uint32_t lpc43_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@@ -564,12 +564,12 @@ static uint32_t lpc43_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_LPC43_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_LPC43_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void lpc43_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, val);
+ llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@@ -1228,7 +1228,7 @@ static inline void lpc43_ep0setup(struct lpc43_usbdev_s *priv)
priv->ep0buf_len = len;
- ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ctrl->type, ctrl->req, value, index, len);
/* Starting a control request - update state */
@@ -1393,7 +1393,7 @@ static inline void lpc43_ep0setup(struct lpc43_usbdev_s *priv)
if (((ctrl->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) &&
value == USB_FEATURE_TESTMODE)
{
- ullvdbg("test mode: %d\n", index);
+ ullinfo("test mode: %d\n", index);
}
else if ((ctrl->type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
{
@@ -1623,7 +1623,7 @@ static void lpc43_ep0complete(struct lpc43_usbdev_s *priv, uint8_t epphy)
break;
default:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
DEBUGASSERT(priv->ep0state != EP0STATE_DATA_IN &&
priv->ep0state != EP0STATE_DATA_OUT &&
priv->ep0state != EP0STATE_SHORTWRITE &&
@@ -1667,7 +1667,7 @@ static void lpc43_ep0nak(struct lpc43_usbdev_s *priv, uint8_t epphy)
break;
default:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
DEBUGASSERT(priv->ep0state != EP0STATE_WAIT_NAK_IN &&
priv->ep0state != EP0STATE_WAIT_NAK_OUT);
#endif
@@ -2056,7 +2056,7 @@ static int lpc43_epdisable(FAR struct usbdev_ep_s *ep)
FAR struct lpc43_ep_s *privep = (FAR struct lpc43_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
@@ -2100,7 +2100,7 @@ static FAR struct usbdev_req_s *lpc43_epallocreq(FAR struct usbdev_ep_s *ep)
{
FAR struct lpc43_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
@@ -2132,7 +2132,7 @@ static void lpc43_epfreereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
{
FAR struct lpc43_req_s *privreq = (FAR struct lpc43_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
@@ -2202,11 +2202,11 @@ static int lpc43_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
irqstate_t flags;
int ret = OK;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
- ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+ ullinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
@@ -2271,7 +2271,7 @@ static int lpc43_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
FAR struct lpc43_ep_s *privep = (FAR struct lpc43_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
@@ -2554,7 +2554,7 @@ static int lpc43_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
@@ -2790,7 +2790,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@@ -2851,7 +2851,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
{
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (driver != g_usbdev.driver)
{
usbtrace(TRACE_DEVERROR(LPC43_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/lpc43xx/spifi/src/spifilib_dev_common.c b/arch/arm/src/lpc43xx/spifi/src/spifilib_dev_common.c
index 8adc8f762b30af84b5ef7cfa5691bf07b03dbe88..c3e0a7b53bb6962b59e405be075183af275a8834 100644
--- a/arch/arm/src/lpc43xx/spifi/src/spifilib_dev_common.c
+++ b/arch/arm/src/lpc43xx/spifi/src/spifilib_dev_common.c
@@ -785,50 +785,50 @@ uint32_t spifiGetSubBlockFromBlock(const SPIFI_HANDLE_T *pHandle, uint32_t block
SPIFI_ERR_T spifiProgram(const SPIFI_HANDLE_T *pHandle, uint32_t addr, const uint32_t *writeBuff, uint32_t bytes)
{
uint32_t sendBytes;
- SPIFI_ERR_T err = SPIFI_ERR_NONE;
+ SPIFI_ERR_T errcode = SPIFI_ERR_NONE;
/* Program using up to page size */
- while ((bytes > 0) && (err == SPIFI_ERR_NONE)) {
+ while ((bytes > 0) && (errcode == SPIFI_ERR_NONE)) {
sendBytes = bytes;
if (sendBytes > pHandle->pInfoData->pageSize) {
sendBytes = pHandle->pInfoData->pageSize;
}
- err = pHandle->pFamFx->pageProgram(pHandle, addr, writeBuff, sendBytes);
+ errcode = pHandle->pFamFx->pageProgram(pHandle, addr, writeBuff, sendBytes);
addr += sendBytes;
writeBuff += (sendBytes >> 2);
bytes -= sendBytes;
}
- return err;
+ return errcode;
}
/* Read the device into the passed buffer */
SPIFI_ERR_T spifiRead(const SPIFI_HANDLE_T *pHandle, uint32_t addr, uint32_t *readBuff, uint32_t bytes)
{
uint32_t readBytes;
- SPIFI_ERR_T err = SPIFI_ERR_NONE;
+ SPIFI_ERR_T errcode = SPIFI_ERR_NONE;
/* Read using up to the maximum read size */
- while ((bytes > 0) && (err == SPIFI_ERR_NONE)) {
+ while ((bytes > 0) && (errcode == SPIFI_ERR_NONE)) {
readBytes = bytes;
if (readBytes > pHandle->pInfoData->maxReadSize) {
readBytes = pHandle->pInfoData->maxReadSize;
}
- err = pHandle->pFamFx->read(pHandle, addr, readBuff, readBytes);
+ errcode = pHandle->pFamFx->read(pHandle, addr, readBuff, readBytes);
addr += readBytes;
readBuff += (readBytes / sizeof(uint32_t));
bytes -= readBytes;
}
- return err;
+ return errcode;
}
/* Erase multiple blocks */
SPIFI_ERR_T spifiErase(const SPIFI_HANDLE_T *pHandle, uint32_t firstBlock, uint32_t numBlocks)
{
- SPIFI_ERR_T err = SPIFI_ERR_NONE;
+ SPIFI_ERR_T errcode = SPIFI_ERR_NONE;
if ((firstBlock + numBlocks) > pHandle->pInfoData->numBlocks) {
return SPIFI_ERR_RANGE;
@@ -836,20 +836,20 @@ SPIFI_ERR_T spifiErase(const SPIFI_HANDLE_T *pHandle, uint32_t firstBlock, uint3
/* Only perform erase if numBlocks is != 0 */
for (; (numBlocks); ++firstBlock, --numBlocks) {
- err = pHandle->pFamFx->eraseBlock(pHandle, firstBlock);
- if (err != SPIFI_ERR_NONE) {
+ errcode = pHandle->pFamFx->eraseBlock(pHandle, firstBlock);
+ if (errcode != SPIFI_ERR_NONE) {
break;
}
}
- return err;
+ return errcode;
}
/* Erase multiple blocks by address range */
SPIFI_ERR_T spifiEraseByAddr(const SPIFI_HANDLE_T *pHandle, uint32_t firstAddr, uint32_t lastAddr)
{
uint32_t firstBlock, lastBlock;
- SPIFI_ERR_T err = SPIFI_ERR_RANGE;
+ SPIFI_ERR_T errcode = SPIFI_ERR_RANGE;
/* Get block numbers for addresses */
firstBlock = spifiGetBlockFromAddr(pHandle, firstAddr);
@@ -857,8 +857,8 @@ SPIFI_ERR_T spifiEraseByAddr(const SPIFI_HANDLE_T *pHandle, uint32_t firstAddr,
/* Limit to legal address range */
if ((firstBlock != ~0UL) && (lastBlock != ~0UL)) {
- err = spifiErase(pHandle, firstBlock, ((lastBlock - firstBlock) + 1));
+ errcode = spifiErase(pHandle, firstBlock, ((lastBlock - firstBlock) + 1));
}
- return err;
+ return errcode;
}
diff --git a/arch/arm/src/moxart/moxart_irq.c b/arch/arm/src/moxart/moxart_irq.c
index 8d2b07cc22011c5136622e354ed77009d09ff99a..71d9e686298648c5c029ff25c45f3273021dbd6c 100644
--- a/arch/arm/src/moxart/moxart_irq.c
+++ b/arch/arm/src/moxart/moxart_irq.c
@@ -145,15 +145,15 @@ void up_irqinitialize(void)
#if 1
#define REG(x) (*(volatile uint32_t *)(x))
- lldbg("\n=============================================================\n");
- lldbg("TM CNTL=%08x INTRS=%08x MASK=%08x LOAD=%08x COUNT=%08x M1=%08x\n",
+ llerr("\n=============================================================\n");
+ llerr("TM CNTL=%08x INTRS=%08x MASK=%08x LOAD=%08x COUNT=%08x M1=%08x\n",
REG(0x98400030), REG(0x98400034), REG(0x98400038), REG(0x98400004),
REG(0x98400000), REG(0x98400008));
- lldbg("IRQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
+ llerr("IRQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
REG(0x98800014), REG(0x98800004), REG(0x9880000C), REG(0x98800010));
- lldbg("FIQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
+ llerr("FIQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
REG(0x98800034), REG(0x98800024), REG(0x9880002C), REG(0x98800020));
- lldbg("=============================================================\n");
+ llerr("=============================================================\n");
#endif
#ifndef CONFIG_SUPPRESS_INTERRUPTS
diff --git a/arch/arm/src/nuc1xx/Make.defs b/arch/arm/src/nuc1xx/Make.defs
index 3a9f06519125e649d5395e84056e24f1ec2bd0e6..7a5a00e85a2fe4961dacfb800b81548789e42610 100644
--- a/arch/arm/src/nuc1xx/Make.defs
+++ b/arch/arm/src/nuc1xx/Make.defs
@@ -65,7 +65,7 @@ else ifeq ($(CONFIG_MODULE),y)
CMN_CSRCS += up_elf.c
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
CMN_CSRCS += up_dumpnvic.c
endif
@@ -81,6 +81,6 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y)
CHIP_CSRCS += nuc_userspace.c
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
CHIP_CSRCS += nuc_dumpgpio.c
endif
diff --git a/arch/arm/src/nuc1xx/nuc_dumpgpio.c b/arch/arm/src/nuc1xx/nuc_dumpgpio.c
index 480bb4f588d3d96e51bbf284e81488dda38ff8ad..45db371a8b98b9e2276740849769ac60c2137b15 100644
--- a/arch/arm/src/nuc1xx/nuc_dumpgpio.c
+++ b/arch/arm/src/nuc1xx/nuc_dumpgpio.c
@@ -49,14 +49,14 @@
#include "chip.h"
#include "nuc_gpio.h"
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/****************************************************************************
* Private Data
****************************************************************************/
/* Port letters for prettier debug output */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static const char g_portchar[NUC_GPIO_NPORTS] =
{
#if NUC_GPIO_NPORTS > 9
@@ -124,22 +124,22 @@ void nuc_dumpgpio(gpio_cfgset_t pinset, const char *msg)
flags = enter_critical_section();
- lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
+ llerr("GPIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg);
- lldbg(" PMD: %08x OFFD: %08x DOUT: %08x DMASK: %08x\n",
+ llerr(" PMD: %08x OFFD: %08x DOUT: %08x DMASK: %08x\n",
getreg32(base + NUC_GPIO_PMD_OFFSET),
getreg32(base + NUC_GPIO_OFFD_OFFSET),
getreg32(base + NUC_GPIO_DOUT_OFFSET),
getreg32(base + NUC_GPIO_DMASK_OFFSET));
- lldbg(" PIN: %08x DBEN: %08x IMD: %08x IEN: %08x\n",
+ llerr(" PIN: %08x DBEN: %08x IMD: %08x IEN: %08x\n",
getreg32(base + NUC_GPIO_PIN_OFFSET),
getreg32(base + NUC_GPIO_DBEN_OFFSET),
getreg32(base + NUC_GPIO_IMD_OFFSET),
getreg32(base + NUC_GPIO_IEN_OFFSET));
- lldbg(" ISRC: %08x\n",
+ llerr(" ISRC: %08x\n",
getreg32(base + NUC_GPIO_ISRC_OFFSET));
leave_critical_section(flags);
}
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/arch/arm/src/nuc1xx/nuc_gpio.h b/arch/arm/src/nuc1xx/nuc_gpio.h
index 52e9dd209506eb1c68801ffdd5a13b21ef635864..1fca1dc0e50933c0ae6f6a1142c67d8f7f6cac5a 100644
--- a/arch/arm/src/nuc1xx/nuc_gpio.h
+++ b/arch/arm/src/nuc1xx/nuc_gpio.h
@@ -245,7 +245,7 @@ bool nuc_gpioread(gpio_cfgset_t pinset);
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
void nuc_dumpgpio(gpio_cfgset_t pinset, const char *msg);
#else
# define nuc_dumpgpio(p,m)
diff --git a/arch/arm/src/nuc1xx/nuc_idle.c b/arch/arm/src/nuc1xx/nuc_idle.c
index 9dd225313f948d8c90e4e62fb2466fb4f373d43c..e0e0131059ff7a772aa33a1e05923e70d6f81591 100644
--- a/arch/arm/src/nuc1xx/nuc_idle.c
+++ b/arch/arm/src/nuc1xx/nuc_idle.c
@@ -99,7 +99,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */
- llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+ llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */
diff --git a/arch/arm/src/nuc1xx/nuc_irq.c b/arch/arm/src/nuc1xx/nuc_irq.c
index 0bdb86a8ee91758b9abe40595dc4197cf239cce5..ff4d6f0e6126d6fc4a4a9f0f3c954bb8956a8194 100644
--- a/arch/arm/src/nuc1xx/nuc_irq.c
+++ b/arch/arm/src/nuc1xx/nuc_irq.c
@@ -97,26 +97,26 @@ static void nuc_dumpnvic(const char *msg, int irq)
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" ISER: %08x ICER: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" ISER: %08x ICER: %08x\n",
getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
- lldbg(" ISPR: %08x ICPR: %08x\n",
+ llerr(" ISPR: %08x ICPR: %08x\n",
getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
- lldbg("SYSCON:\n");
- lldbg(" CPUID: %08x\n",
+ llerr("SYSCON:\n");
+ llerr(" CPUID: %08x\n",
getreg32(ARMV6M_SYSCON_CPUID));
- lldbg(" ICSR: %08x AIRCR: %08x\n",
+ llerr(" ICSR: %08x AIRCR: %08x\n",
getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
- lldbg(" SCR: %08x CCR: %08x\n",
+ llerr(" SCR: %08x CCR: %08x\n",
getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
- lldbg(" SHPR2: %08x SHPR3: %08x\n",
+ llerr(" SHPR2: %08x SHPR3: %08x\n",
getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
leave_critical_section(flags);
@@ -128,7 +128,7 @@ static void nuc_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: nuc_nmi, nuc_busfault, nuc_usagefault, nuc_pendsv,
- * nuc_dbgmonitor, nuc_pendsv, nuc_reserved
+ * nuc_errmonitor, nuc_pendsv, nuc_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@@ -137,11 +137,11 @@ static void nuc_dumpnvic(const char *msg, int irq)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int nuc_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -149,7 +149,7 @@ static int nuc_nmi(int irq, FAR void *context)
static int nuc_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
@@ -157,7 +157,7 @@ static int nuc_pendsv(int irq, FAR void *context)
static int nuc_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -236,7 +236,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(NUC_IRQ_NMI, nuc_nmi);
irq_attach(NUC_IRQ_PENDSV, nuc_pendsv);
irq_attach(NUC_IRQ_RESERVED, nuc_reserved);
diff --git a/arch/arm/src/nuc1xx/nuc_start.c b/arch/arm/src/nuc1xx/nuc_start.c
index 3cbb5becdeefd337815e90a32aef0a00dea9d778..80c01077ae817643421d210c4bab4ba6e52c60ca 100644
--- a/arch/arm/src/nuc1xx/nuc_start.c
+++ b/arch/arm/src/nuc1xx/nuc_start.c
@@ -92,7 +92,7 @@ const uint32_t g_idle_topstack = IDLE_STACK;
*
****************************************************************************/
-#if defined(CONFIG_DEBUG) && defined(HAVE_SERIAL_CONSOLE)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(HAVE_SERIAL_CONSOLE)
# define showprogress(c) nuc_lowputc((uint32_t)c)
#else
# define showprogress(c)
diff --git a/arch/arm/src/sam34/Kconfig b/arch/arm/src/sam34/Kconfig
index b704da5674f8f1729b3fb05d6d2ef86d627661c3..ce158857cd253f0f5125940c7299e10c914248c3 100644
--- a/arch/arm/src/sam34/Kconfig
+++ b/arch/arm/src/sam34/Kconfig
@@ -1118,7 +1118,7 @@ config SAM34_SPI_DMATHRESHOLD
config SAM34_SPI_DMADEBUG
bool "SPI DMA transfer debug"
- depends on SAM34_SPI_DMA && DEBUG && DEBUG_DMA
+ depends on SAM34_SPI_DMA && DEBUG_FEATURES && DEBUG_DMA
default n
---help---
Enable special debug instrumentation analyze SPI DMA data transfers.
@@ -1128,11 +1128,11 @@ config SAM34_SPI_DMADEBUG
config SAM34_SPI_REGDEBUG
bool "SPI Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level SPI device debug information.
- Requires also DEBUG.
+ Requires also CONFIG_DEBUG_FEATURES.
endmenu # AT91SAM3/4 SPI device driver options
endif # SAM34_SPI0 || SAM34_SPI1
@@ -1336,9 +1336,9 @@ config SAM34_EMAC_PHYSR_100FD
config SAM34_EMAC_REGDEBUG
bool "Register-Level Debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
- Enable very low-level register access debug. Depends on DEBUG.
+ Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES.
config SAM34_EMAC_ISETH0
bool
@@ -1369,7 +1369,7 @@ config SAM34_HSMCI_WRPROOF
config SAM34_HSMCI_XFRDEBUG
bool "HSMCI transfer debug"
- depends on DEBUG_FS && DEBUG_VERBOSE
+ depends on DEBUG_FS && CONFIG_DEBUG_INFO
default n
---help---
Enable special debug instrumentation analyze HSMCI data transfers.
@@ -1377,11 +1377,11 @@ config SAM34_HSMCI_XFRDEBUG
registers at key points in the data transfer and then dumps all of
the registers at the end of the transfer. If DEBUG_DMA is also
enabled, then DMA register will be collected as well. Requires also
- DEBUG_FS and DEBUG_VERBOSE.
+ DEBUG_FS and CONFIG_DEBUG_INFO.
config SAM34_HSMCI_CMDDEBUG
bool "HSMCI command debug"
- depends on DEBUG_FS && DEBUG_VERBOSE
+ depends on DEBUG_FS && CONFIG_DEBUG_INFO
default n
---help---
Enable special debug instrumentation analyze HSMCI commands. This
@@ -1389,7 +1389,7 @@ config SAM34_HSMCI_CMDDEBUG
key points in the data transfer and then dumps all of the registers
at the end of the transfer. If DEBUG_DMA is also enabled, then DMA
register will be collected as well. Requires also DEBUG_FS and
- DEBUG_VERBOSE.
+ CONFIG_DEBUG_INFO.
endmenu # HSMCI device driver options
endif # SAM34_HSMCI
@@ -1400,7 +1400,7 @@ menu "AT91SAM3/4 USB Full Speed Device Controller driver (DCD) options"
config SAM34_UDP_REGDEBUG
bool "Enable low-level UDP register debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
endmenu # USB Full Speed Device Controller driver (DCD) options
@@ -1415,7 +1415,7 @@ menu "AT91SAM3/4 Timer/Counter options"
config SAM34_TC_REGDEBUG
bool "Enable low-level timer/counter register debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
endmenu # USB Full Speed Device Controller driver (DCD) options
diff --git a/arch/arm/src/sam34/chip/sam_afec.h b/arch/arm/src/sam34/chip/sam_afec.h
index 9e779a1e4c16f5ce9dc1f4d12e39cc0eeb51cd81..d5a8be44ab94786cc901f8e7b7fa664d9bf6e830 100644
--- a/arch/arm/src/sam34/chip/sam_afec.h
+++ b/arch/arm/src/sam34/chip/sam_afec.h
@@ -205,57 +205,57 @@
/* Extended Mode Register */
-#define AFEC_EMR_CMPMODE_SHIFT (0) /* Bit 0-1: Comparison Mode */
-#define AFEC_EMR_CMPMODE_MASK (3 << AFEC_EMR_CMPMODE_SHIFT)
-# define AFEC_EMR_CMPMODE_LOW (0 << AFEC_EMR_CMPMODE_SHIFT) /* Event when lower than low window threshold */
-# define AFEC_EMR_CMPMODE_HIGH (1 << AFEC_EMR_CMPMODE_SHIFT) /* Event when higher than high window threshold */
-# define AFEC_EMR_CMPMODE_IN (2 << AFEC_EMR_CMPMODE_SHIFT) /* Event when in comparison window */
-# define AFEC_EMR_CMPMODE_OUT (3 << AFEC_EMR_CMPMODE_SHIFT) /* Event when out of comparison window */
-#define AFEC_EMR_CMPSEL_SHIFT (4) /* Bit 4-7: Comparison Selected Channel */
-#define AFEC_EMR_CMPSEL_MASK (15 << AFEC_EMR_CMPSEL_SHIFT)
-# define AFEC_EMR_CMPSEL(n) ((uint32_t)(n) << AFEC_EMR_CMPSEL_SHIFT)
-#define AFEC_EMR_CMPALL (1 << 9) /* Bit 9: Compare All Channels */
-#define AFEC_EMR_CMPFILTER_SHIFT (12) /* Bits 12-13: Compare Event Filtering */
-#define AFEC_EMR_CMPFILTER_MASK (3 << AFEC_EMR_CMPFILTER_SHIFT)
-# define AFEC_EMR_CMPFILTER(n) ((uint32_t)(n) << AFEC_EMR_CMPFILTER_SHIFT)
-#define AFEC_EMR_RES_SHIFT (16) /* Bits 16-18: Resolution */
-#define AFEC_EMR_RES_MASK (7 << AFEC_EMR_RES_SHIFT)
-# define AFEC_EMR_RES_NOAVG (0 << AFEC_EMR_RES_SHIFT) /* 12-bit resolution, AFEC sample rate is maximum (no averaging) */
-# define AFEC_EMR_RES_LOWRES (1 << AFEC_EMR_RES_SHIFT) /* 10-bit resolution, AFEC sample rate is maximum (no averaging) */
-# define AFEC_EMR_RES_OSR4 (2 << AFEC_EMR_RES_SHIFT) /* 13-bit resolution, AFEC sample rate divided by 4 (averaging) */
-# define AFEC_EMR_RES_OSR16 (3 << AFEC_EMR_RES_SHIFT) /* 14-bit resolution, AFEC sample rate divided by 16 (averaging) */
-# define AFEC_EMR_RES_OSR64 (4 << AFEC_EMR_RES_SHIFT) /* 15-bit resolution, AFEC sample rate divided by 64 (averaging) */
-# define AFEC_EMR_RES_OSR256 (5 << AFEC_EMR_RES_SHIFT) /* 16-bit resolution, AFEC sample rate divided by 256 (averaging) */
-#define AFEC_EMR_TAG (1 << 24) /* Bit 24: TAG of the AFEC_LDCR register */
-#define AFEC_EMR_STM (1 << 25) /* Bit 25: Single Trigger Mode */
+#define AFEC_EMR_CMPMODE_SHIFT (0) /* Bit 0-1: Comparison Mode */
+#define AFEC_EMR_CMPMODE_MASK (3 << AFEC_EMR_CMPMODE_SHIFT)
+# define AFEC_EMR_CMPMODE_LOW (0 << AFEC_EMR_CMPMODE_SHIFT) /* Event when lower than low window threshold */
+# define AFEC_EMR_CMPMODE_HIGH (1 << AFEC_EMR_CMPMODE_SHIFT) /* Event when higher than high window threshold */
+# define AFEC_EMR_CMPMODE_IN (2 << AFEC_EMR_CMPMODE_SHIFT) /* Event when in comparison window */
+# define AFEC_EMR_CMPMODE_OUT (3 << AFEC_EMR_CMPMODE_SHIFT) /* Event when out of comparison window */
+#define AFEC_EMR_CMPSEL_SHIFT (3) /* Bit 3-7: Comparison Selected Channel */
+#define AFEC_EMR_CMPSEL_MASK (31 << AFEC_EMR_CMPSEL_SHIFT)
+# define AFEC_EMR_CMPSEL(n) ((uint32_t)(n) << AFEC_EMR_CMPSEL_SHIFT)
+#define AFEC_EMR_CMPALL (1 << 9) /* Bit 9: Compare All Channels */
+#define AFEC_EMR_CMPFILTER_SHIFT (12) /* Bits 12-13: Compare Event Filtering */
+#define AFEC_EMR_CMPFILTER_MASK (3 << AFEC_EMR_CMPFILTER_SHIFT)
+# define AFEC_EMR_CMPFILTER(n) ((uint32_t)(n) << AFEC_EMR_CMPFILTER_SHIFT)
+#define AFEC_EMR_RES_SHIFT (16) /* Bits 16-18: Resolution */
+#define AFEC_EMR_RES_MASK (7 << AFEC_EMR_RES_SHIFT)
+# define AFEC_EMR_RES_NOAVG (0 << AFEC_EMR_RES_SHIFT) /* 12-bit resolution, AFEC sample rate is maximum (no averaging) */
+# define AFEC_EMR_RES_LOWRES (1 << AFEC_EMR_RES_SHIFT) /* 10-bit resolution, AFEC sample rate is maximum (no averaging) */
+# define AFEC_EMR_RES_OSR4 (2 << AFEC_EMR_RES_SHIFT) /* 13-bit resolution, AFEC sample rate divided by 4 (averaging) */
+# define AFEC_EMR_RES_OSR16 (3 << AFEC_EMR_RES_SHIFT) /* 14-bit resolution, AFEC sample rate divided by 16 (averaging) */
+# define AFEC_EMR_RES_OSR64 (4 << AFEC_EMR_RES_SHIFT) /* 15-bit resolution, AFEC sample rate divided by 64 (averaging) */
+# define AFEC_EMR_RES_OSR256 (5 << AFEC_EMR_RES_SHIFT) /* 16-bit resolution, AFEC sample rate divided by 256 (averaging) */
+#define AFEC_EMR_TAG (1 << 24) /* Bit 24: TAG of the AFEC_LDCR register */
+#define AFEC_EMR_STM (1 << 25) /* Bit 25: Single Trigger Mode */
/* Channel Sequence 1 Register */
#define AFEC_SEQ1R_USCH_SHIFT(n) ((n) << 2) /* n=0..7 */
#define AFEC_SEQ1R_USCH_MASK(n) (15 << AFEC_SEQ1R_USCH_SHIFT(n))
# define AFEC_SEQ1R_USCH(n,v) ((uint32_t)(v) << AFEC_SEQ1R_USCH_SHIFT(n))
-#define AFEC_SEQ1R_USCH0_SHIFT (0) /* Bits 0-3: User sequence number 0 */
+#define AFEC_SEQ1R_USCH0_SHIFT (0) /* Bits 0-3: User sequence number 0 */
#define AFEC_SEQ1R_USCH0_MASK (15 << AFEC_SEQ1R_USCH0_SHIFT)
# define AFEC_SEQ1R_USCH0(v) ((uint32_t)(v) << AFEC_SEQ1R_USCH0_SHIFT)
-#define AFEC_SEQ1R_USCH1_SHIFT (4) /* Bits 4-7: User sequence number 1 */
+#define AFEC_SEQ1R_USCH1_SHIFT (4) /* Bits 4-7: User sequence number 1 */
#define AFEC_SEQ1R_USCH1_MASK (15 << AFEC_SEQ1R_USCH1_SHIFT)
# define AFEC_SEQ1R_USCH1(v) ((uint32_t)(v) << AFEC_SEQ1R_USCH1_SHIFT)
-#define AFEC_SEQ1R_USCH2_SHIFT (8) /* Bits 8-11: User sequence number 2 */
+#define AFEC_SEQ1R_USCH2_SHIFT (8) /* Bits 8-11: User sequence number 2 */
#define AFEC_SEQ1R_USCH2_MASK (15 << AFEC_SEQ1R_USCH2_SHIFT)
# define AFEC_SEQ1R_USCH2(v) ((uint32_t)(v) << AFEC_SEQ1R_USCH2_SHIFT)
-#define AFEC_SEQ1R_USCH3_SHIFT (12) /* Bits 12-15: User sequence number 3 */
+#define AFEC_SEQ1R_USCH3_SHIFT (12) /* Bits 12-15: User sequence number 3 */
#define AFEC_SEQ1R_USCH3_MASK (15 << AFEC_SEQ1R_USCH3_SHIFT)
# define AFEC_SEQ1R_USCH3(v) ((uint32_t)(v) << AFEC_SEQ1R_USCH3_SHIFT)
-#define AFEC_SEQ1R_USCH4_SHIFT (16) /* Bits 16-19: User sequence number 4 */
+#define AFEC_SEQ1R_USCH4_SHIFT (16) /* Bits 16-19: User sequence number 4 */
#define AFEC_SEQ1R_USCH4_MASK (15 << AFEC_SEQ1R_USCH4_SHIFT)
# define AFEC_SEQ1R_USCH4(v) ((uint32_t)(v) << AFEC_SEQ1R_USCH4_SHIFT)
-#define AFEC_SEQ1R_USCH5_SHIFT (20) /* Bits 20-23: User sequence number 5 */
+#define AFEC_SEQ1R_USCH5_SHIFT (20) /* Bits 20-23: User sequence number 5 */
#define AFEC_SEQ1R_USCH5_MASK (15 << AFEC_SEQ1R_USCH5_SHIFT)
# define AFEC_SEQ1R_USCH5(v) ((uint32_t)(v) << AFEC_SEQ1R_USCH5_SHIFT)
-#define AFEC_SEQ1R_USCH6_SHIFT (24) /* Bits 24-27: User sequence number 6 */
+#define AFEC_SEQ1R_USCH6_SHIFT (24) /* Bits 24-27: User sequence number 6 */
#define AFEC_SEQ1R_USCH6_MASK (15 << AFEC_SEQ1R_USCH6_SHIFT)
# define AFEC_SEQ1R_USCH6(v) ((uint32_t)(v) << AFEC_SEQ1R_USCH6_SHIFT)
-#define AFEC_SEQ1R_USCH7_SHIFT (28) /* Bits 28-31: User sequence number 7 */
+#define AFEC_SEQ1R_USCH7_SHIFT (28) /* Bits 28-31: User sequence number 7 */
#define AFEC_SEQ1R_USCH7_MASK (15 << AFEC_SEQ1R_USCH7_SHIFT)
# define AFEC_SEQ1R_USCH7(v) ((uint32_t)(v) << AFEC_SEQ1R_USCH7_SHIFT)
@@ -264,28 +264,28 @@
#define AFEC_SEQ2R_USCH_SHIFT(n) (((n)-8) << 2) /* n=8..15 */
#define AFEC_SEQ2R_USCH_MASK(n) (15 << AFEC_SEQ2R_USCH_SHIFT(n))
# define AFEC_SEQ2R_USCH(n,v) ((uint32_t)(v) << AFEC_SEQ2R_USCH_SHIFT(n))
-#define AFEC_SEQ2R_USCH8_SHIFT (0) /* Bits 0-3: User sequence number 8 */
+#define AFEC_SEQ2R_USCH8_SHIFT (0) /* Bits 0-3: User sequence number 8 */
#define AFEC_SEQ2R_USCH8_MASK (15 << AFEC_SEQ2R_USCH8_SHIFT)
# define AFEC_SEQ2R_USCH8(v) ((uint32_t)(v) << AFEC_SEQ2R_USCH8_SHIFT)
-#define AFEC_SEQ2R_USCH9_SHIFT (4) /* Bits 4-7: User sequence number 9 */
+#define AFEC_SEQ2R_USCH9_SHIFT (4) /* Bits 4-7: User sequence number 9 */
#define AFEC_SEQ2R_USCH9_MASK (15 << AFEC_SEQ2R_USCH9_SHIFT)
# define AFEC_SEQ2R_USCH9(v) ((uint32_t)(v) << AFEC_SEQ2R_USCH9_SHIFT)
-#define AFEC_SEQ2R_USCH10_SHIFT (8) /* Bits 8-11: User sequence number 10 */
+#define AFEC_SEQ2R_USCH10_SHIFT (8) /* Bits 8-11: User sequence number 10 */
#define AFEC_SEQ2R_USCH10_MASK (15 << AFEC_SEQ2R_USCH10_SHIFT)
# define AFEC_SEQ2R_USCH10(v) ((uint32_t)(v) << AFEC_SEQ2R_USCH10_SHIFT)
-#define AFEC_SEQ2R_USCH11_SHIFT (12) /* Bits 12-15: User sequence number 11 */
+#define AFEC_SEQ2R_USCH11_SHIFT (12) /* Bits 12-15: User sequence number 11 */
#define AFEC_SEQ2R_USCH11_MASK (15 << AFEC_SEQ2R_USCH11_SHIFT)
# define AFEC_SEQ2R_USCH11(v) ((uint32_t)(v) << AFEC_SEQ2R_USCH11_SHIFT)
-#define AFEC_SEQ2R_USCH12_SHIFT (16) /* Bits 16-19: User sequence number 12 */
+#define AFEC_SEQ2R_USCH12_SHIFT (16) /* Bits 16-19: User sequence number 12 */
#define AFEC_SEQ2R_USCH12_MASK (15 << AFEC_SEQ2R_USCH12_SHIFT)
# define AFEC_SEQ2R_USCH12(v) ((uint32_t)(v) << AFEC_SEQ2R_USCH12_SHIFT)
-#define AFEC_SEQ2R_USCH13_SHIFT (20) /* Bits 20-23: User sequence number 13 */
+#define AFEC_SEQ2R_USCH13_SHIFT (20) /* Bits 20-23: User sequence number 13 */
#define AFEC_SEQ2R_USCH13_MASK (15 << AFEC_SEQ2R_USCH13_SHIFT)
# define AFEC_SEQ2R_USCH13(v) ((uint32_t)(v) << AFEC_SEQ2R_USCH13_SHIFT)
-#define AFEC_SEQ2R_USCH14_SHIFT (24) /* Bits 24-27: User sequence number 14 */
+#define AFEC_SEQ2R_USCH14_SHIFT (24) /* Bits 24-27: User sequence number 14 */
#define AFEC_SEQ2R_USCH14_MASK (15 << AFEC_SEQ2R_USCH14_SHIFT)
# define AFEC_SEQ2R_USCH14(v) ((uint32_t)(v) << AFEC_SEQ2R_USCH14_SHIFT)
-#define AFEC_SEQ2R_USCH15_SHIFT (28) /* Bits 28-31: User sequence number 15 */
+#define AFEC_SEQ2R_USCH15_SHIFT (28) /* Bits 28-31: User sequence number 15 */
#define AFEC_SEQ2R_USCH15_MASK (15 << AFEC_SEQ2R_USCH15_SHIFT)
# define AFEC_SEQ2R_USCH15(v) ((uint32_t)(v) << AFEC_SEQ2R_USCH15_SHIFT)
@@ -375,59 +375,59 @@
# define AFEC_CWR_LOWTHRES(n) ((uint32_t)(n) << AFEC_CWR_LOWTHRES_SHIFT)
#define AFEC_CWR_HIGHTHRES_SHIFT (16) /* Bits 16-27: High Threshold */
#define AFEC_CWR_HIGHTHRES_MASK (0xfff << AFEC_CWR_LOWTHRES_SHIFT)
-# define AFEC_CWR_HIGHTHRES(n)K ((uint32_t)(n) << AFEC_CWR_LOWTHRES_SHIFT)
+# define AFEC_CWR_HIGHTHRES(n) ((uint32_t)(n) << AFEC_CWR_LOWTHRES_SHIFT)
/* Channel Gain Register */
#define AFEC_CGR_GAIN_SHIFT(n) ((n) << 1) /* n=0..15 */
#define AFEC_CGR_GAIN_MASK(n) (3 << AFEC_CGR_GAIN_SHIFT(n))
# define AFEC_CGR_GAIN(n,v) ((uint32_t)(v) << AFEC_CGR_GAIN_SHIFT(n))
-#define AFEC_CGR_GAIN0_SHIFT (0) /* Bits 0-1: Gain for channel 0 */
+#define AFEC_CGR_GAIN0_SHIFT (0) /* Bits 0-1: Gain for channel 0 */
#define AFEC_CGR_GAIN0_MASK (3 << AFEC_CGR_GAIN0_SHIFT)
# define AFEC_CGR_GAIN0(v) ((uint32_t)(v) << AFEC_CGR_GAIN0_SHIFT)
-#define AFEC_CGR_GAIN1_SHIFT (2) /* Bits 2-3: Gain for channel 1 */
+#define AFEC_CGR_GAIN1_SHIFT (2) /* Bits 2-3: Gain for channel 1 */
#define AFEC_CGR_GAIN1_MASK (3 << AFEC_CGR_GAIN1_SHIFT)
# define AFEC_CGR_GAIN1(v) ((uint32_t)(v) << AFEC_CGR_GAIN1_SHIFT)
-#define AFEC_CGR_GAIN2_SHIFT (4) /* Bits 4-5: Gain for channel 2 */
+#define AFEC_CGR_GAIN2_SHIFT (4) /* Bits 4-5: Gain for channel 2 */
#define AFEC_CGR_GAIN2_MASK (3 << AFEC_CGR_GAIN2_SHIFT)
# define AFEC_CGR_GAIN2(v) ((uint32_t)(v) << AFEC_CGR_GAIN2_SHIFT)
-#define AFEC_CGR_GAIN3_SHIFT (6) /* Bits 6-7: Gain for channel 3 */
+#define AFEC_CGR_GAIN3_SHIFT (6) /* Bits 6-7: Gain for channel 3 */
#define AFEC_CGR_GAIN3_MASK (3 << AFEC_CGR_GAIN3_SHIFT)
# define AFEC_CGR_GAIN3(v) ((uint32_t)(v) << AFEC_CGR_GAIN3_SHIFT)
-#define AFEC_CGR_GAIN4_SHIFT (8) /* Bits 8-9: Gain for channel 4 */
+#define AFEC_CGR_GAIN4_SHIFT (8) /* Bits 8-9: Gain for channel 4 */
#define AFEC_CGR_GAIN4_MASK (3 << AFEC_CGR_GAIN4_SHIFT)
# define AFEC_CGR_GAIN4(v) ((uint32_t)(v) << AFEC_CGR_GAIN4_SHIFT)
-#define AFEC_CGR_GAIN5_SHIFT (10) /* Bits 10-11: Gain for channel 5 */
+#define AFEC_CGR_GAIN5_SHIFT (10) /* Bits 10-11: Gain for channel 5 */
#define AFEC_CGR_GAIN5_MASK (3 << AFEC_CGR_GAIN5_SHIFT)
# define AFEC_CGR_GAIN5(v) ((uint32_t)(v) << AFEC_CGR_GAIN5_SHIFT)
-#define AFEC_CGR_GAIN6_SHIFT (12) /* Bits 12-13: Gain for channel 6 */
+#define AFEC_CGR_GAIN6_SHIFT (12) /* Bits 12-13: Gain for channel 6 */
#define AFEC_CGR_GAIN6_MASK (3 << AFEC_CGR_GAIN6_SHIFT)
# define AFEC_CGR_GAIN6(v) ((uint32_t)(v) << AFEC_CGR_GAIN6_SHIFT)
-#define AFEC_CGR_GAIN7_SHIFT (14) /* Bits 14-15: Gain for channel 7 */
+#define AFEC_CGR_GAIN7_SHIFT (14) /* Bits 14-15: Gain for channel 7 */
#define AFEC_CGR_GAIN7_MASK (3 << AFEC_CGR_GAIN7_SHIFT)
# define AFEC_CGR_GAIN7(v) ((uint32_t)(v) << AFEC_CGR_GAIN7_SHIFT)
-#define AFEC_CGR_GAIN8_SHIFT (16) /* Bits 16-17: Gain for channel 8 */
+#define AFEC_CGR_GAIN8_SHIFT (16) /* Bits 16-17: Gain for channel 8 */
#define AFEC_CGR_GAIN8_MASK (3 << AFEC_CGR_GAIN8_SHIFT)
# define AFEC_CGR_GAIN8(v) ((uint32_t)(v) << AFEC_CGR_GAIN8_SHIFT)
-#define AFEC_CGR_GAIN9_SHIFT (18) /* Bits 18-19: Gain for channel 9 */
+#define AFEC_CGR_GAIN9_SHIFT (18) /* Bits 18-19: Gain for channel 9 */
#define AFEC_CGR_GAIN9_MASK (3 << AFEC_CGR_GAIN9_SHIFT)
# define AFEC_CGR_GAIN9(v) ((uint32_t)(v) << AFEC_CGR_GAIN9_SHIFT)
-#define AFEC_CGR_GAIN10_SHIFT (20) /* Bits 20-21: Gain for channel 10 */
+#define AFEC_CGR_GAIN10_SHIFT (20) /* Bits 20-21: Gain for channel 10 */
#define AFEC_CGR_GAIN10_MASK (3 << AFEC_CGR_GAIN10_SHIFT)
# define AFEC_CGR_GAIN10(v) ((uint32_t)(v) << AFEC_CGR_GAIN10_SHIFT)
-#define AFEC_CGR_GAIN11_SHIFT (22) /* Bits 22-23: Gain for channel 11 */
+#define AFEC_CGR_GAIN11_SHIFT (22) /* Bits 22-23: Gain for channel 11 */
#define AFEC_CGR_GAIN11_MASK (3 << AFEC_CGR_GAIN11_SHIFT)
# define AFEC_CGR_GAIN11(v) ((uint32_t)(v) << AFEC_CGR_GAIN11_SHIFT)
-#define AFEC_CGR_GAIN12_SHIFT (24) /* Bits 24-25: Gain for channel 12 */
+#define AFEC_CGR_GAIN12_SHIFT (24) /* Bits 24-25: Gain for channel 12 */
#define AFEC_CGR_GAIN12_MASK (3 << AFEC_CGR_GAIN12_SHIFT)
# define AFEC_CGR_GAIN12(v) ((uint32_t)(v) << AFEC_CGR_GAIN12_SHIFT)
-#define AFEC_CGR_GAIN13_SHIFT (26) /* Bits 26-27: Gain for channel 13 */
+#define AFEC_CGR_GAIN13_SHIFT (26) /* Bits 26-27: Gain for channel 13 */
#define AFEC_CGR_GAIN13_MASK (3 << AFEC_CGR_GAIN13_SHIFT)
# define AFEC_CGR_GAIN13(v) ((uint32_t)(v) << AFEC_CGR_GAIN13_SHIFT)
-#define AFEC_CGR_GAIN14_SHIFT (28) /* Bits 28-29: Gain for channel 14 */
+#define AFEC_CGR_GAIN14_SHIFT (28) /* Bits 28-29: Gain for channel 14 */
#define AFEC_CGR_GAIN14_MASK (3 << AFEC_CGR_GAIN14_SHIFT)
# define AFEC_CGR_GAIN14(v) ((uint32_t)(v) << AFEC_CGR_GAIN14_SHIFT)
-#define AFEC_CGR_GAIN15_SHIFT (30) /* Bits 30-31: Gain for channel 15 */
+#define AFEC_CGR_GAIN15_SHIFT (30) /* Bits 30-31: Gain for channel 15 */
#define AFEC_CGR_GAIN15_MASK (3 << AFEC_CGR_GAIN15_SHIFT)
# define AFEC_CGR_GAIN15(v) ((uint32_t)(v) << AFEC_CGR_GAIN15_SHIFT)
@@ -487,8 +487,8 @@
/* Temperature Sensor Mode Register */
-#define AFEC_TEMPMR_RTCT (1 << 0) /* Bit 0: Temperature Sensor RTC Trigger mode */
-#define AFEC_TEMPMR_TEMPCMPMOD_SHIFT (4) /* Bits 4-5: Temperature Comparison Mode */
+#define AFEC_TEMPMR_RTCT (1 << 0) /* Bit 0: Temperature Sensor RTC Trigger mode */
+#define AFEC_TEMPMR_TEMPCMPMOD_SHIFT (4) /* Bits 4-5: Temperature Comparison Mode */
#define AFEC_TEMPMR_TEMPCMPMOD_MASK (3 << AFEC_TEMPMR_TEMPCMPMOD_SHIFT)
# define AFEC_TEMPMR_TEMPCMPMOD_LOW (0 << AFEC_TEMPMR_TEMPCMPMOD_SHIFT) /* Event when data is lower than low threshold */
# define AFEC_TEMPMR_TEMPCMPMOD_HIGH (1 << AFEC_TEMPMR_TEMPCMPMOD_SHIFT) /* Event when data is higher than high threshold */
diff --git a/arch/arm/src/sam34/sam4cm_freerun.c b/arch/arm/src/sam34/sam4cm_freerun.c
index 63bcea20315f4e43701f461926d6a376ee1f2bc0..1b741447136fec5cd0347f9ecc3f06f849c1f0a9 100644
--- a/arch/arm/src/sam34/sam4cm_freerun.c
+++ b/arch/arm/src/sam34/sam4cm_freerun.c
@@ -121,7 +121,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
uint32_t cmr;
int ret;
- tcvdbg("chan=%d resolution=%d usec\n", chan, resolution);
+ tcinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(freerun && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
@@ -133,11 +133,11 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
ret = sam_tc_divisor(frequency, &divisor, &cmr);
if (ret < 0)
{
- tcdbg("ERROR: sam_tc_divisor failed: %d\n", ret);
+ tcerr("ERROR: sam_tc_divisor failed: %d\n", ret);
return ret;
}
- tcvdbg("frequency=%lu, divisor=%u, cmr=%08lx\n",
+ tcinfo("frequency=%lu, divisor=%u, cmr=%08lx\n",
(unsigned long)frequency, (unsigned long)divisor,
(unsigned long)cmr);
@@ -172,7 +172,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
freerun->tch = sam_tc_allocate(chan, cmr);
if (!freerun->tch)
{
- tcdbg("ERROR: Failed to allocate timer channel %d\n", chan);
+ tcerr("ERROR: Failed to allocate timer channel %d\n", chan);
return -EBUSY;
}
@@ -257,7 +257,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
leave_critical_section(flags);
- tcvdbg("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
+ tcinfo("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
(unsigned long)counter, (unsigned long)verify,
(unsigned long)overflow, (unsigned long)sr);
@@ -277,7 +277,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
ts->tv_sec = sec;
ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
- tcvdbg("usec=%llu ts=(%lu, %lu)\n",
+ tcinfo("usec=%llu ts=(%lu, %lu)\n",
usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
return OK;
diff --git a/arch/arm/src/sam34/sam4cm_oneshot.c b/arch/arm/src/sam34/sam4cm_oneshot.c
index eeda41bc8ee98ad77dc48ae420fd3e45a0bba428..6ce9858d4cd9aa0a049b5415a6e8e8fe21f80d60 100644
--- a/arch/arm/src/sam34/sam4cm_oneshot.c
+++ b/arch/arm/src/sam34/sam4cm_oneshot.c
@@ -91,7 +91,7 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
oneshot_handler_t oneshot_handler;
void *oneshot_arg;
- tcllvdbg("Expired...\n");
+ tcllinfo("Expired...\n");
DEBUGASSERT(oneshot && oneshot->handler);
/* The clock was stopped, but not disabled when the RC match occurred.
@@ -148,7 +148,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
uint32_t cmr;
int ret;
- tcvdbg("chan=%d resolution=%d usec\n", chan, resolution);
+ tcinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(oneshot && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
@@ -160,11 +160,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
ret = sam_tc_divisor(frequency, &divisor, &cmr);
if (ret < 0)
{
- tcdbg("ERROR: sam_tc_divisor failed: %d\n", ret);
+ tcerr("ERROR: sam_tc_divisor failed: %d\n", ret);
return ret;
}
- tcvdbg("frequency=%lu, divisor=%lu, cmr=%08lx\n",
+ tcinfo("frequency=%lu, divisor=%lu, cmr=%08lx\n",
(unsigned long)frequency, (unsigned long)divisor,
(unsigned long)cmr);
@@ -200,7 +200,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
oneshot->tch = sam_tc_allocate(chan, cmr);
if (!oneshot->tch)
{
- tcdbg("ERROR: Failed to allocate timer channel %d\n", chan);
+ tcerr("ERROR: Failed to allocate timer channel %d\n", chan);
return -EBUSY;
}
@@ -258,7 +258,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
uint64_t regval;
irqstate_t flags;
- tcvdbg("handler=%p arg=%p, ts=(%lu, %lu)\n",
+ tcinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
DEBUGASSERT(oneshot && handler && ts);
@@ -269,7 +269,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
{
/* Yes.. then cancel it */
- tcvdbg("Already running... cancelling\n");
+ tcinfo("Already running... cancelling\n");
(void)sam_oneshot_cancel(oneshot, freerun, NULL);
}
@@ -291,7 +291,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
regval = (usec * (uint64_t)sam_tc_divfreq(oneshot->tch)) / USEC_PER_SEC;
- tcvdbg("usec=%llu regval=%08llx\n", usec, regval);
+ tcinfo("usec=%llu regval=%08llx\n", usec, regval);
DEBUGASSERT(regval <= UINT16_MAX);
/* Set up to receive the callback when the interrupt occurs */
@@ -400,7 +400,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
* REVISIT: This does not appear to be the case.
*/
- tcvdbg("Cancelling...\n");
+ tcinfo("Cancelling...\n");
count = sam_tc_getcounter(oneshot->tch);
rc = sam_tc_getregister(oneshot->tch, TC_REGC);
@@ -436,7 +436,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
* oneshot timer.
*/
- tcvdbg("rc=%lu count=%lu usec=%lu\n",
+ tcinfo("rc=%lu count=%lu usec=%lu\n",
(unsigned long)rc, (unsigned long)count, (unsigned long)usec);
/* REVISIT: I am not certain why the timer counter value sometimes
@@ -481,7 +481,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
ts->tv_nsec = (unsigned long)nsec;
}
- tcvdbg("remaining (%lu, %lu)\n",
+ tcinfo("remaining (%lu, %lu)\n",
(unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
}
diff --git a/arch/arm/src/sam34/sam4cm_tc.c b/arch/arm/src/sam34/sam4cm_tc.c
index 91ab9c3ca2e86957eb10d6108be31127a1e12b57..5a7be95409f5a673995b7f3797195a90945a194c 100644
--- a/arch/arm/src/sam34/sam4cm_tc.c
+++ b/arch/arm/src/sam34/sam4cm_tc.c
@@ -390,20 +390,20 @@ static void sam_regdump(struct sam_chan_s *chan, const char *msg)
uintptr_t base;
base = chan->base;
- lldbg("TC%d [%08x]: %s\n", chan->chan, (int)base, msg);
- lldbg(" BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
+ llerr("TC%d [%08x]: %s\n", chan->chan, (int)base, msg);
+ llerr(" BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
getreg32(base+SAM_TC_BMR_OFFSET), getreg32(base+SAM_TC_QIMR_OFFSET),
getreg32(base+SAM_TC_QISR_OFFSET), getreg32(base+SAM_TC_WPMR_OFFSET));
base = chan->base;
- lldbg("TC%d Channel %d [%08x]: %s\n", chan->chan, chan->chan, (int)base, msg);
- lldbg(" CMR: %08x SSMR: %08x RAB: %08x CV: %08x\n",
+ llerr("TC%d Channel %d [%08x]: %s\n", chan->chan, chan->chan, (int)base, msg);
+ llerr(" CMR: %08x SSMR: %08x RAB: %08x CV: %08x\n",
getreg32(base+SAM_TC_CMR_OFFSET), getreg32(base+SAM_TC_SMMR_OFFSET),
getreg32(base+SAM_TC_RAB_OFFSET), getreg32(base+SAM_TC_CV_OFFSET));
- lldbg(" RA: %08x RB: %08x RC: %08x SR: %08x\n",
+ llerr(" RA: %08x RB: %08x RC: %08x SR: %08x\n",
getreg32(base+SAM_TC_RA_OFFSET), getreg32(base+SAM_TC_RB_OFFSET),
getreg32(base+SAM_TC_RC_OFFSET), getreg32(base+SAM_TC_SR_OFFSET));
- lldbg(" IMR: %08x\n",
+ llerr(" IMR: %08x\n",
getreg32(base+SAM_TC_IMR_OFFSET));
}
#endif
@@ -447,7 +447,7 @@ static bool sam_checkreg(struct sam_chan_s *chan, bool wr, uint32_t regaddr,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", chan->ntimes);
+ llerr("...[Repeats %d times]...\n", chan->ntimes);
}
/* Save information about the new access */
@@ -481,7 +481,7 @@ static inline uint32_t sam_chan_getreg(struct sam_chan_s *chan,
#ifdef CONFIG_SAM34_TC_REGDEBUG
if (sam_checkreg(chan, false, regaddr, regval))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -504,7 +504,7 @@ static inline void sam_chan_putreg(struct sam_chan_s *chan, unsigned int offset,
#ifdef CONFIG_SAM34_TC_REGDEBUG
if (sam_checkreg(chan, true, regaddr, regval))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -757,7 +757,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* Timer/counter is not invalid or not enabled */
- tcdbg("ERROR: Bad channel number: %d\n", channel);
+ tcerr("ERROR: Bad channel number: %d\n", channel);
return NULL;
}
@@ -770,7 +770,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* Initialize the channel. */
- tcdbg("Initializing TC%d\n", chconfig->chan);
+ tcerr("Initializing TC%d\n", chconfig->chan);
memset(chan, 0, sizeof(struct sam_chan_s));
sem_init(&chan->exclsem, 0, 1);
@@ -831,7 +831,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* No.. return a failure */
- tcdbg("Channel %d is in-used\n", channel);
+ tcerr("Channel %d is in-used\n", channel);
sam_givesem(chan);
return NULL;
}
@@ -876,7 +876,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
* access to the requested channel.
*/
- tcvdbg("channel=%d mode=%08x\n", channel, mode);
+ tcinfo("channel=%d mode=%08x\n", channel, mode);
chan = sam_tc_initialize(channel);
if (chan)
@@ -902,7 +902,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
/* Return an opaque reference to the channel */
- tcvdbg("Returning %p\n", chan);
+ tcinfo("Returning %p\n", chan);
return (TC_HANDLE)chan;
}
@@ -924,7 +924,7 @@ void sam_tc_free(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
- tcvdbg("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
+ tcinfo("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
/* Make sure that interrupts are detached and disabled and that the channel
@@ -957,7 +957,7 @@ void sam_tc_start(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
- tcvdbg("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
+ tcinfo("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
/* Read the SR to clear any pending interrupts on this channel */
@@ -989,7 +989,7 @@ void sam_tc_stop(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
- tcvdbg("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
+ tcinfo("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
sam_chan_putreg(chan, SAM_TC_CCR_OFFSET, TC_CCR_CLKDIS);
@@ -1096,7 +1096,7 @@ void sam_tc_setregister(TC_HANDLE handle, int regid, uint32_t regval)
DEBUGASSERT(chan && regid < TC_NREGISTERS);
- tcvdbg("Channel %d: Set register RC%d to %08lx\n",
+ tcinfo("Channel %d: Set register RC%d to %08lx\n",
chan->chan, regid, (unsigned long)regval);
sam_chan_putreg(chan, g_regoffset[regid], regval);
@@ -1233,7 +1233,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
uint32_t ftcin = sam_tc_infreq();
int ndx = 0;
- tcvdbg("frequency=%d\n", frequency);
+ tcinfo("frequency=%d\n", frequency);
/* Satisfy lower bound. That is, the value of the divider such that:
*
@@ -1246,7 +1246,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
{
/* If no divisor can be found, return -ERANGE */
- tcdbg("Lower bound search failed\n");
+ tcerr("Lower bound search failed\n");
return -ERANGE;
}
}
@@ -1270,7 +1270,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
if (div)
{
uint32_t value = sam_tc_freqdiv_lookup(ftcin, ndx);
- tcvdbg("return div=%lu\n", (unsigned long)value);
+ tcinfo("return div=%lu\n", (unsigned long)value);
*div = value;
}
@@ -1278,7 +1278,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
if (tcclks)
{
- tcvdbg("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS(ndx));
+ tcinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS(ndx));
*tcclks = TC_CMR_TCCLKS(ndx);
}
diff --git a/arch/arm/src/sam34/sam4cm_tc.h b/arch/arm/src/sam34/sam4cm_tc.h
index 85520d84d935c7b89e3ccc52166ea976351c4397..f3b32a1a6f137b2d4e1f2f9fb2d80fe4c117d810 100644
--- a/arch/arm/src/sam34/sam4cm_tc.h
+++ b/arch/arm/src/sam34/sam4cm_tc.h
@@ -71,7 +71,7 @@
/* Timer debug is enabled if any timer client is enabled */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_ANALOG
# undef CONFIG_SAMA5_TC_REGDEBUG
#endif
@@ -83,15 +83,15 @@
/* Timer/counter debug output */
#ifdef CONFIG_SAM34_TC_DEBUG
-# define tcdbg dbg
-# define tcvdbg vdbg
-# define tclldbg lldbg
-# define tcllvdbg llvdbg
+# define tcerr err
+# define tcinfo info
+# define tcllerr llerr
+# define tcllinfo llinfo
#else
-# define tcdbg(x...)
-# define tcvdbg(x...)
-# define tclldbg(x...)
-# define tcllvdbg(x...)
+# define tcerr(x...)
+# define tcinfo(x...)
+# define tcllerr(x...)
+# define tcllinfo(x...)
#endif
/****************************************************************************
diff --git a/arch/arm/src/sam34/sam4cm_tickless.c b/arch/arm/src/sam34/sam4cm_tickless.c
index 7d13e8756ef10502e1c9043d983c4510918597c6..048c42ffaba83bc32304a9d7470665a519b9a322 100644
--- a/arch/arm/src/sam34/sam4cm_tickless.c
+++ b/arch/arm/src/sam34/sam4cm_tickless.c
@@ -197,7 +197,7 @@ static struct sam_tickless_s g_tickless;
static void sam_oneshot_handler(void *arg)
{
- tcllvdbg("Expired...\n");
+ tcllinfo("Expired...\n");
sched_timer_expiration();
}
@@ -244,7 +244,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
- tclldbg("ERROR: sam_oneshot_initialize failed\n");
+ tcllerr("ERROR: sam_oneshot_initialize failed\n");
PANIC();
}
@@ -256,7 +256,7 @@ void up_timer_initialize(void)
ret = sam_oneshot_max_delay(&g_tickless.oneshot, &max_delay);
if (ret < 0)
{
- tclldbg("ERROR: sam_oneshot_max_delay failed\n");
+ tcllerr("ERROR: sam_oneshot_max_delay failed\n");
PANIC();
}
@@ -280,7 +280,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
- tclldbg("ERROR: sam_freerun_initialize failed\n");
+ tcllerr("ERROR: sam_freerun_initialize failed\n");
PANIC();
}
diff --git a/arch/arm/src/sam34/sam4l_gpio.c b/arch/arm/src/sam34/sam4l_gpio.c
index 4dcefcef55e1a5e3ee8e3fe614a674829377d7b9..efd97ee1b78f68125c816879e8a01185e7b9fe76 100644
--- a/arch/arm/src/sam34/sam4l_gpio.c
+++ b/arch/arm/src/sam34/sam4l_gpio.c
@@ -539,21 +539,21 @@ int sam_dumpgpio(uint32_t pinset, const char *msg)
/* The following requires exclusive access to the GPIO registers */
flags = enter_critical_section();
- lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
+ llerr("GPIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg);
- lldbg(" GPER: %08x PMR0: %08x PMR1: %08x PMR2: %08x\n",
+ llerr(" GPER: %08x PMR0: %08x PMR1: %08x PMR2: %08x\n",
getreg32(base + SAM_GPIO_GPER_OFFSET), getreg32(base + SAM_GPIO_PMR0_OFFSET),
getreg32(base + SAM_GPIO_PMR1_OFFSET), getreg32(base + SAM_GPIO_PMR2_OFFSET));
- lldbg(" ODER: %08x OVR: %08x PVR: %08x PUER: %08x\n",
+ llerr(" ODER: %08x OVR: %08x PVR: %08x PUER: %08x\n",
getreg32(base + SAM_GPIO_ODER_OFFSET), getreg32(base + SAM_GPIO_OVR_OFFSET),
getreg32(base + SAM_GPIO_PVR_OFFSET), getreg32(base + SAM_GPIO_PUER_OFFSET));
- lldbg(" PDER: %08x IER: %08x IMR0: %08x IMR1: %08x\n",
+ llerr(" PDER: %08x IER: %08x IMR0: %08x IMR1: %08x\n",
getreg32(base + SAM_GPIO_PDER_OFFSET), getreg32(base + SAM_GPIO_IER_OFFSET),
getreg32(base + SAM_GPIO_IMR0_OFFSET), getreg32(base + SAM_GPIO_IMR1_OFFSET));
- lldbg(" GFER: %08x IFR: %08x ODCR0: %08x ODCR1: %08x\n",
+ llerr(" GFER: %08x IFR: %08x ODCR0: %08x ODCR1: %08x\n",
getreg32(base + SAM_GPIO_GFER_OFFSET), getreg32(base + SAM_GPIO_IFR_OFFSET),
getreg32(base + SAM_GPIO_ODCR0_OFFSET), getreg32(base + SAM_GPIO_ODCR1_OFFSET));
- lldbg(" OSRR0: %08x EVER: %08x PARAM: %08x VERS: %08x\n",
+ llerr(" OSRR0: %08x EVER: %08x PARAM: %08x VERS: %08x\n",
getreg32(base + SAM_GPIO_OSRR0_OFFSET), getreg32(base + SAM_GPIO_EVER_OFFSET),
getreg32(base + SAM_GPIO_PARAMETER_OFFSET), getreg32(base + SAM_GPIO_VERSION_OFFSET));
leave_critical_section(flags);
diff --git a/arch/arm/src/sam34/sam_dmac.c b/arch/arm/src/sam34/sam_dmac.c
index bcc8fb03f0726e14c8c3b0176437beba35c26adf..7eb31148cb66d2f5dae469ae30b75a43b89a3978 100644
--- a/arch/arm/src/sam34/sam_dmac.c
+++ b/arch/arm/src/sam34/sam_dmac.c
@@ -889,7 +889,7 @@ sam_allocdesc(struct sam_dma_s *dmach, struct dma_linklist_s *prev,
* Obviously setting it to zero would break that usage.
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (src != 0)
#endif
{
@@ -1354,7 +1354,7 @@ static int sam_dmainterrupt(int irq, void *context)
void weak_function up_dmainitialize(void)
{
- dmallvdbg("Initialize DMAC0\n");
+ dmallinfo("Initialize DMAC0\n");
/* Enable peripheral clock */
@@ -1460,7 +1460,7 @@ DMA_HANDLE sam_dmachannel(uint32_t chflags)
sam_givechsem();
- dmavdbg("chflags: %08x returning dmach: %p\n", (int)chflags, dmach);
+ dmainfo("chflags: %08x returning dmach: %p\n", (int)chflags, dmach);
return (DMA_HANDLE)dmach;
}
@@ -1486,7 +1486,7 @@ void sam_dmaconfig(DMA_HANDLE handle, uint32_t chflags)
/* Set the new DMA channel flags. */
- dmavdbg("chflags: %08x\n", (int)chflags);
+ dmainfo("chflags: %08x\n", (int)chflags);
dmach->flags = chflags;
}
@@ -1507,7 +1507,7 @@ void sam_dmafree(DMA_HANDLE handle)
{
struct sam_dma_s *dmach = (struct sam_dma_s *)handle;
- dmavdbg("dmach: %p\n", dmach);
+ dmainfo("dmach: %p\n", dmach);
DEBUGASSERT((dmach != NULL) && (dmach->inuse));
/* Mark the channel no longer in use. Clearing the inuse flag is an atomic
@@ -1536,10 +1536,10 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, size_t nby
size_t maxtransfer;
int ret = OK;
- dmavdbg("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+ dmainfo("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
dmach, (int)paddr, (int)maddr, (int)nbytes);
DEBUGASSERT(dmach);
- dmavdbg("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
+ dmainfo("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
/* The maximum transfer size in bytes depends upon the maximum number of
* transfers and the number of bytes per transfer.
@@ -1604,10 +1604,10 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, size_t nby
size_t maxtransfer;
int ret = OK;
- dmavdbg("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+ dmainfo("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
dmach, (int)paddr, (int)maddr, (int)nbytes);
DEBUGASSERT(dmach);
- dmavdbg("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
+ dmainfo("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
/* The maximum transfer size in bytes depends upon the maximum number of
* transfers and the number of bytes per transfer.
@@ -1667,7 +1667,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
struct sam_dma_s *dmach = (struct sam_dma_s *)handle;
int ret = -EINVAL;
- dmavdbg("dmach: %p callback: %p arg: %p\n", dmach, callback, arg);
+ dmainfo("dmach: %p callback: %p arg: %p\n", dmach, callback, arg);
DEBUGASSERT(dmach != NULL);
/* Verify that the DMA has been setup (i.e., at least one entry in the
@@ -1711,7 +1711,7 @@ void sam_dmastop(DMA_HANDLE handle)
struct sam_dma_s *dmach = (struct sam_dma_s *)handle;
irqstate_t flags;
- dmavdbg("dmach: %p\n", dmach);
+ dmainfo("dmach: %p\n", dmach);
DEBUGASSERT(dmach != NULL);
flags = enter_critical_section();
@@ -1780,22 +1780,22 @@ void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
{
struct sam_dma_s *dmach = (struct sam_dma_s *)handle;
- dmadbg("%s\n", msg);
- dmadbg(" DMA Global Registers:\n");
- dmadbg(" GCFG[%08x]: %08x\n", SAM_DMAC_GCFG, regs->gcfg);
- dmadbg(" EN[%08x]: %08x\n", SAM_DMAC_EN, regs->en);
- dmadbg(" SREQ[%08x]: %08x\n", SAM_DMAC_SREQ, regs->sreq);
- dmadbg(" CREQ[%08x]: %08x\n", SAM_DMAC_CREQ, regs->creq);
- dmadbg(" LAST[%08x]: %08x\n", SAM_DMAC_LAST, regs->last);
- dmadbg(" EBCIMR[%08x]: %08x\n", SAM_DMAC_EBCIMR, regs->ebcimr);
- dmadbg(" CHSR[%08x]: %08x\n", SAM_DMAC_CHSR, regs->chsr);
- dmadbg(" DMA Channel Registers:\n");
- dmadbg(" SADDR[%08x]: %08x\n", dmach->base + SAM_DMACHAN_SADDR_OFFSET, regs->saddr);
- dmadbg(" DADDR[%08x]: %08x\n", dmach->base + SAM_DMACHAN_DADDR_OFFSET, regs->daddr);
- dmadbg(" DSCR[%08x]: %08x\n", dmach->base + SAM_DMACHAN_DSCR_OFFSET, regs->dscr);
- dmadbg(" CTRLA[%08x]: %08x\n", dmach->base + SAM_DMACHAN_CTRLA_OFFSET, regs->ctrla);
- dmadbg(" CTRLB[%08x]: %08x\n", dmach->base + SAM_DMACHAN_CTRLB_OFFSET, regs->ctrlb);
- dmadbg(" CFG[%08x]: %08x\n", dmach->base + SAM_DMACHAN_CFG_OFFSET, regs->cfg);
+ dmaerr("%s\n", msg);
+ dmaerr(" DMA Global Registers:\n");
+ dmaerr(" GCFG[%08x]: %08x\n", SAM_DMAC_GCFG, regs->gcfg);
+ dmaerr(" EN[%08x]: %08x\n", SAM_DMAC_EN, regs->en);
+ dmaerr(" SREQ[%08x]: %08x\n", SAM_DMAC_SREQ, regs->sreq);
+ dmaerr(" CREQ[%08x]: %08x\n", SAM_DMAC_CREQ, regs->creq);
+ dmaerr(" LAST[%08x]: %08x\n", SAM_DMAC_LAST, regs->last);
+ dmaerr(" EBCIMR[%08x]: %08x\n", SAM_DMAC_EBCIMR, regs->ebcimr);
+ dmaerr(" CHSR[%08x]: %08x\n", SAM_DMAC_CHSR, regs->chsr);
+ dmaerr(" DMA Channel Registers:\n");
+ dmaerr(" SADDR[%08x]: %08x\n", dmach->base + SAM_DMACHAN_SADDR_OFFSET, regs->saddr);
+ dmaerr(" DADDR[%08x]: %08x\n", dmach->base + SAM_DMACHAN_DADDR_OFFSET, regs->daddr);
+ dmaerr(" DSCR[%08x]: %08x\n", dmach->base + SAM_DMACHAN_DSCR_OFFSET, regs->dscr);
+ dmaerr(" CTRLA[%08x]: %08x\n", dmach->base + SAM_DMACHAN_CTRLA_OFFSET, regs->ctrla);
+ dmaerr(" CTRLB[%08x]: %08x\n", dmach->base + SAM_DMACHAN_CTRLB_OFFSET, regs->ctrlb);
+ dmaerr(" CFG[%08x]: %08x\n", dmach->base + SAM_DMACHAN_CFG_OFFSET, regs->cfg);
}
#endif /* CONFIG_DEBUG_DMA */
#endif /* CONFIG_SAM34_DMAC0 */
diff --git a/arch/arm/src/sam34/sam_dmac.h b/arch/arm/src/sam34/sam_dmac.h
index 0ff4f2e14485f92635e190cf0fab525f7ad3f973..3b8a3cc2c4105beb9e0ca0646b0fe2258918c259 100644
--- a/arch/arm/src/sam34/sam_dmac.h
+++ b/arch/arm/src/sam34/sam_dmac.h
@@ -52,7 +52,7 @@
/* Configuration ********************************************************************/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_DMA
#endif
diff --git a/arch/arm/src/sam34/sam_emac.c b/arch/arm/src/sam34/sam_emac.c
index c11332586ae6ba31061ec7ab028bf0a57d5330a9..1c7d6276777430ee152aad077aa27eca67a45ed6 100644
--- a/arch/arm/src/sam34/sam_emac.c
+++ b/arch/arm/src/sam34/sam_emac.c
@@ -231,7 +231,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_SAM34_EMAC_REGDEBUG
#endif
@@ -346,7 +346,7 @@ static uint8_t g_rxbuffer[CONFIG_SAM34_EMAC_NRXBUFFERS * EMAC_RX_UNITSIZE]
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_SAM34_EMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAM34_EMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static bool sam_checkreg(struct sam_emac_s *priv, bool wr,
uint32_t regval, uintptr_t address);
static uint32_t sam_getreg(struct sam_emac_s *priv, uintptr_t addr);
@@ -419,7 +419,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg);
/* PHY Initialization */
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
static void sam_phydump(struct sam_emac_s *priv);
#else
# define sam_phydump(priv)
@@ -490,7 +490,7 @@ static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -522,7 +522,7 @@ static uint32_t sam_getreg(struct sam_emac_s *priv, uintptr_t address)
if (sam_checkreg(priv, false, regval, address))
{
- lldbg("%08x->%08x\n", address, regval);
+ llerr("%08x->%08x\n", address, regval);
}
return regval;
@@ -543,7 +543,7 @@ static void sam_putreg(struct sam_emac_s *priv, uintptr_t address,
{
if (sam_checkreg(priv, true, regval, address))
{
- lldbg("%08x<-%08x\n", address, regval);
+ llerr("%08x<-%08x\n", address, regval);
}
putreg32(regval, address);
@@ -636,7 +636,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
priv->txdesc = (struct emac_txdesc_s *)kmm_memalign(8, allocsize);
if (!priv->txdesc)
{
- nlldbg("ERROR: Failed to allocate TX descriptors\n");
+ nllerr("ERROR: Failed to allocate TX descriptors\n");
return -ENOMEM;
}
@@ -646,7 +646,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
priv->rxdesc = (struct emac_rxdesc_s *)kmm_memalign(8, allocsize);
if (!priv->rxdesc)
{
- nlldbg("ERROR: Failed to allocate RX descriptors\n");
+ nllerr("ERROR: Failed to allocate RX descriptors\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -657,7 +657,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
priv->txbuffer = (uint8_t *)kmm_memalign(8, allocsize);
if (!priv->txbuffer)
{
- nlldbg("ERROR: Failed to allocate TX buffer\n");
+ nllerr("ERROR: Failed to allocate TX buffer\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -666,7 +666,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
priv->rxbuffer = (uint8_t *)kmm_memalign(8, allocsize);
if (!priv->rxbuffer)
{
- nlldbg("ERROR: Failed to allocate RX buffer\n");
+ nllerr("ERROR: Failed to allocate RX buffer\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -753,14 +753,14 @@ static int sam_transmit(struct sam_emac_s *priv)
uint32_t regval;
uint32_t status;
- nllvdbg("d_len: %d txhead: %d\n", dev->d_len, priv->txhead);
+ nllinfo("d_len: %d txhead: %d\n", dev->d_len, priv->txhead);
sam_dumppacket("Transmit packet", dev->d_buf, dev->d_len);
/* Check parameter */
if (dev->d_len > EMAC_TX_UNITSIZE)
{
- nlldbg("ERROR: Packet too big: %d\n", dev->d_len);
+ nllerr("ERROR: Packet too big: %d\n", dev->d_len);
return -EINVAL;
}
@@ -772,7 +772,7 @@ static int sam_transmit(struct sam_emac_s *priv)
if (sam_txfree(priv) < 1)
{
- nlldbg("ERROR: No free TX descriptors\n");
+ nllerr("ERROR: No free TX descriptors\n");
return -EBUSY;
}
@@ -830,7 +830,7 @@ static int sam_transmit(struct sam_emac_s *priv)
if (sam_txfree(priv) < 1)
{
- nllvdbg("Disabling RX interrupts\n");
+ nllinfo("Disabling RX interrupts\n");
sam_putreg(priv, SAM_EMAC_IDR, EMAC_INT_RCOMP);
}
@@ -1010,7 +1010,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
sam_cmcc_invalidate((uintptr_t)rxdesc,
(uintptr_t)rxdesc + sizeof(struct emac_rxdesc_s));
- nllvdbg("rxndx: %d\n", rxndx);
+ nllinfo("rxndx: %d\n", rxndx);
while ((rxdesc->addr & EMACRXD_ADDR_OWNER) != 0)
{
@@ -1060,7 +1060,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
{
if (rxndx == priv->rxndx)
{
- nllvdbg("ERROR: No EOF (Invalid of buffers too small)\n");
+ nllinfo("ERROR: No EOF (Invalid of buffers too small)\n");
do
{
/* Give ownership back to the EMAC */
@@ -1107,7 +1107,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
/* Frame size from the EMAC */
dev->d_len = (rxdesc->status & EMACRXD_STA_FRLEN_MASK);
- nllvdbg("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
+ nllinfo("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
/* All data have been copied in the application frame buffer,
* release the RX descriptor
@@ -1132,11 +1132,11 @@ static int sam_recvframe(struct sam_emac_s *priv)
* all of the data.
*/
- nllvdbg("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
+ nllinfo("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
if (pktlen < dev->d_len)
{
- nlldbg("ERROR: Buffer size %d; frame size %d\n", dev->d_len, pktlen);
+ nllerr("ERROR: Buffer size %d; frame size %d\n", dev->d_len, pktlen);
return -E2BIG;
}
@@ -1167,7 +1167,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
/* No packet was found */
priv->rxndx = rxndx;
- nllvdbg("rxndx: %d\n", priv->rxndx);
+ nllinfo("rxndx: %d\n", priv->rxndx);
return -EAGAIN;
}
@@ -1207,7 +1207,7 @@ static void sam_receive(struct sam_emac_s *priv)
if (dev->d_len > CONFIG_NET_ETH_MTU)
{
- nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+ nllerr("DROPPED: Too big: %d\n", dev->d_len);
continue;
}
@@ -1222,7 +1222,7 @@ static void sam_receive(struct sam_emac_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
/* Handle ARP on input then give the IPv4 packet to the network
* layer
@@ -1262,7 +1262,7 @@ static void sam_receive(struct sam_emac_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
/* Give the IPv6 packet to the network layer */
@@ -1299,7 +1299,7 @@ static void sam_receive(struct sam_emac_s *priv)
#ifdef CONFIG_NET_ARP
if (BUF->type == htons(ETHTYPE_ARP))
{
- nllvdbg("ARP frame\n");
+ nllinfo("ARP frame\n");
/* Handle ARP packet */
@@ -1317,7 +1317,7 @@ static void sam_receive(struct sam_emac_s *priv)
else
#endif
{
- nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+ nllerr("DROPPED: Unknown type: %04x\n", BUF->type);
}
}
}
@@ -1442,7 +1442,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
imr = sam_getreg(priv, SAM_EMAC_IMR);
pending = isr & ~(imr | EMAC_INT_UNUSED);
- nllvdbg("isr: %08x pending: %08x\n", isr, pending);
+ nllinfo("isr: %08x pending: %08x\n", isr, pending);
/* Check for the completion of a transmission. This should be done before
* checking for received data (because receiving can cause another transmission
@@ -1468,7 +1468,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
clrbits = EMAC_TSR_RLE | sam_txinuse(priv);
sam_txreset(priv);
- nlldbg("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
+ nllerr("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
regval = sam_getreg(priv, SAM_EMAC_NCR);
regval |= EMAC_NCR_TXEN;
@@ -1479,7 +1479,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((tsr & EMAC_TSR_COL) != 0)
{
- nlldbg("ERROR: Collision occurred TSR: %08x\n", tsr);
+ nllerr("ERROR: Collision occurred TSR: %08x\n", tsr);
clrbits |= EMAC_TSR_COL;
}
@@ -1487,7 +1487,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((tsr & EMAC_TSR_TFC) != 0)
{
- nlldbg("ERROR: Transmit Frame Corruption due to AHB error: %08x\n", tsr);
+ nllerr("ERROR: Transmit Frame Corruption due to AHB error: %08x\n", tsr);
clrbits |= EMAC_TSR_TFC;
}
@@ -1502,7 +1502,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((tsr & EMAC_TSR_UND) != 0)
{
- nlldbg("ERROR: Transmit Underrun TSR: %08x\n", tsr);
+ nllerr("ERROR: Transmit Underrun TSR: %08x\n", tsr);
clrbits |= EMAC_TSR_UND;
}
@@ -1539,7 +1539,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((rsr & EMAC_RSR_RXOVR) != 0)
{
- nlldbg("ERROR: Receiver overrun RSR: %08x\n", rsr);
+ nllerr("ERROR: Receiver overrun RSR: %08x\n", rsr);
clrbits |= EMAC_RSR_RXOVR;
}
@@ -1556,7 +1556,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((rsr & EMAC_RSR_BNA) != 0)
{
- nlldbg("ERROR: Buffer not available RSR: %08x\n", rsr);
+ nllerr("ERROR: Buffer not available RSR: %08x\n", rsr);
clrbits |= EMAC_RSR_BNA;
}
@@ -1578,7 +1578,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((pending & EMAC_INT_PFNZ) != 0)
{
- nlldbg("Pause frame received\n");
+ nllerr("Pause frame received\n");
}
/* Check for Pause Time Zero (PTZ)
@@ -1588,7 +1588,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((pending & EMAC_INT_PTZ) != 0)
{
- nlldbg("Pause TO!\n");
+ nllerr("Pause TO!\n");
}
#endif
}
@@ -1725,7 +1725,7 @@ static int sam_emac_interrupt(int irq, void *context)
static inline void sam_txtimeout_process(FAR struct sam_emac_s *priv)
{
- nlldbg("Timeout!\n");
+ nllerr("Timeout!\n");
/* Then reset the hardware. Just take the interface down, then back
* up again.
@@ -1956,13 +1956,13 @@ static int sam_ifup(struct net_driver_s *dev)
struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
int ret;
- nlldbg("Bringing up: %d.%d.%d.%d\n",
+ nllerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
/* Configure the EMAC interface for normal operation. */
- nllvdbg("Initialize the EMAC\n");
+ nllinfo("Initialize the EMAC\n");
sam_emac_configure(priv);
/* Set the MAC address (should have been configured while we were down) */
@@ -1980,7 +1980,7 @@ static int sam_ifup(struct net_driver_s *dev)
ret = sam_phyinit(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phyinit failed: %d\n", ret);
+ nllerr("ERROR: sam_phyinit failed: %d\n", ret);
return ret;
}
@@ -1989,16 +1989,16 @@ static int sam_ifup(struct net_driver_s *dev)
ret = sam_autonegotiate(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_autonegotiate failed: %d\n", ret);
+ nllerr("ERROR: sam_autonegotiate failed: %d\n", ret);
return ret;
}
while (sam_linkup(priv) == 0);
- nllvdbg("Link detected \n");
+ nllinfo("Link detected \n");
/* Enable normal MAC operation */
- nllvdbg("Enable normal operation\n");
+ nllinfo("Enable normal operation\n");
/* Set and activate a timer process */
@@ -2032,7 +2032,7 @@ static int sam_ifdown(struct net_driver_s *dev)
struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
irqstate_t flags;
- nlldbg("Taking the network down\n");
+ nllerr("Taking the network down\n");
/* Disable the EMAC interrupt */
@@ -2077,7 +2077,7 @@ static int sam_ifdown(struct net_driver_s *dev)
static inline void sam_txavail_process(FAR struct sam_emac_s *priv)
{
- nllvdbg("ifup: %d\n", priv->ifup);
+ nllinfo("ifup: %d\n", priv->ifup);
/* Ignore the notification if the interface is not yet up */
@@ -2331,7 +2331,7 @@ static int sam_addmac(struct net_driver_s *dev, const uint8_t *mac)
unsigned int bit;
UNUSED(priv);
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Calculate the 6-bit has table index */
@@ -2405,7 +2405,7 @@ static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac)
unsigned int bit;
UNUSED(priv);
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Calculate the 6-bit has table index */
@@ -2588,7 +2588,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
static void sam_phydump(struct sam_emac_s *priv)
{
uint32_t regval;
@@ -2601,21 +2601,21 @@ static void sam_phydump(struct sam_emac_s *priv)
sam_putreg(priv, SAM_EMAC_NCR, regval);
#ifdef CONFIG_SAM34_EMAC_RMII
- nllvdbg("RMII Registers (Address %02x)\n", priv->phyaddr);
+ nllinfo("RMII Registers (Address %02x)\n", priv->phyaddr);
#else /* defined(CONFIG_SAM34_EMAC_MII) */
- nllvdbg("MII Registers (Address %02x)\n", priv->phyaddr);
+ nllinfo("MII Registers (Address %02x)\n", priv->phyaddr);
#endif
sam_phyread(priv, priv->phyaddr, MII_MCR, &phyval);
- nllvdbg(" MCR: %04x\n", phyval);
+ nllinfo(" MCR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, MII_MSR, &phyval);
- nllvdbg(" MSR: %04x\n", phyval);
+ nllinfo(" MSR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, MII_ADVERTISE, &phyval);
- nllvdbg(" ADVERTISE: %04x\n", phyval);
+ nllinfo(" ADVERTISE: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, MII_LPA, &phyval);
- nllvdbg(" LPR: %04x\n", phyval);
+ nllinfo(" LPR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, CONFIG_SAM34_EMAC_PHYSR, &phyval);
- nllvdbg(" PHYSR: %04x\n", phyval);
+ nllinfo(" PHYSR: %04x\n", phyval);
/* Disable management port */
@@ -2738,7 +2738,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
int timeout;
int ret;
- nllvdbg(" sam_phyreset\n");
+ nllinfo(" sam_phyreset\n");
/* Enable management port */
@@ -2751,7 +2751,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, MII_MCR_RESET);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywrite failed: %d\n", ret);
+ nllerr("ERROR: sam_phywrite failed: %d\n", ret);
}
/* Wait for the PHY reset to complete */
@@ -2763,7 +2763,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
int result = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
if (result < 0)
{
- nlldbg("ERROR: Failed to read the MCR register: %d\n", ret);
+ nllerr("ERROR: Failed to read the MCR register: %d\n", ret);
ret = result;
}
else if ((mcr & MII_MCR_RESET) == 0)
@@ -2805,7 +2805,7 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
unsigned int offset;
int ret = -ESRCH;
- nllvdbg("Find a valid PHY address\n");
+ nllinfo("Find a valid PHY address\n");
/* Enable management port */
@@ -2828,7 +2828,7 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
else
{
- nlldbg("ERROR: sam_phyread failed for PHY address %02x: %d\n",
+ nllerr("ERROR: sam_phyread failed for PHY address %02x: %d\n",
candidate, ret);
for (offset = 0; offset < 32; offset++)
@@ -2850,10 +2850,10 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
if (ret == OK)
{
- nllvdbg(" PHYID1: %04x PHY addr: %d\n", phyval, candidate);
+ nllinfo(" PHYID1: %04x PHY addr: %d\n", phyval, candidate);
*phyaddr = candidate;
sam_phyread(priv, candidate, CONFIG_SAM34_EMAC_PHYSR, &phyval);
- nllvdbg(" PHYSR: %04x PHY addr: %d\n", phyval, candidate);
+ nllinfo(" PHYSR: %04x PHY addr: %d\n", phyval, candidate);
}
/* Disable management port */
@@ -2894,7 +2894,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -2918,7 +2918,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -2958,7 +2958,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -2982,7 +2982,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -3026,32 +3026,32 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_PHYID1, &phyid1);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYID1\n");
+ nllerr("ERROR: Failed to read PHYID1\n");
goto errout;
}
- nllvdbg("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
+ nllinfo("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
ret = sam_phyread(priv, priv->phyaddr, MII_PHYID2, &phyid2);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYID2\n");
+ nllerr("ERROR: Failed to read PHYID2\n");
goto errout;
}
- nllvdbg("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
+ nllinfo("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
if (phyid1 == MII_OUI_MSB &&
((phyid2 & MII_PHYID2_OUI_MASK) >> MII_PHYID2_OUI_SHIFT) == MII_OUI_LSB)
{
- nllvdbg(" Vendor Model Number: %04x\n",
+ nllinfo(" Vendor Model Number: %04x\n",
(phyid2 & MII_PHYID2_MODEL_MASK) >> MII_PHYID2_MODEL_SHIFT);
- nllvdbg(" Model Revision Number: %04x\n",
+ nllinfo(" Model Revision Number: %04x\n",
(phyid2 & MII_PHYID2_REV_MASK) >> MII_PHYID2_REV_SHIFT);
}
else
{
- nlldbg("ERROR: PHY not recognized\n");
+ nllerr("ERROR: PHY not recognized\n");
}
/* Setup control register */
@@ -3059,7 +3059,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MCR\n");
+ nllerr("ERROR: Failed to read MCR\n");
goto errout;
}
@@ -3070,7 +3070,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write MCR\n");
+ nllerr("ERROR: Failed to write MCR\n");
goto errout;
}
@@ -3085,7 +3085,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_ADVERTISE, advertise);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write ANAR\n");
+ nllerr("ERROR: Failed to write ANAR\n");
goto errout;
}
@@ -3094,7 +3094,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MCR\n");
+ nllerr("ERROR: Failed to read MCR\n");
goto errout;
}
@@ -3102,7 +3102,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write MCR\n");
+ nllerr("ERROR: Failed to write MCR\n");
goto errout;
}
@@ -3114,11 +3114,11 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write MCR\n");
+ nllerr("ERROR: Failed to write MCR\n");
goto errout;
}
- nllvdbg(" MCR: %04x\n", mcr);
+ nllinfo(" MCR: %04x\n", mcr);
/* Check AutoNegotiate complete */
@@ -3128,7 +3128,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MSR\n");
+ nllerr("ERROR: Failed to read MSR\n");
goto errout;
}
@@ -3138,7 +3138,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
{
/* Yes.. break out of the loop */
- nllvdbg("AutoNegotiate complete\n");
+ nllinfo("AutoNegotiate complete\n");
break;
}
@@ -3146,7 +3146,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
if (++timeout >= PHY_RETRY_MAX)
{
- nlldbg("ERROR: TimeOut\n");
+ nllerr("ERROR: TimeOut\n");
sam_phydump(priv);
ret = -ETIMEDOUT;
goto errout;
@@ -3158,7 +3158,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_LPA, &lpa);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read ANLPAR\n");
+ nllerr("ERROR: Failed to read ANLPAR\n");
goto errout;
}
@@ -3244,13 +3244,13 @@ static bool sam_linkup(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MSR: %d\n", ret);
+ nllerr("ERROR: Failed to read MSR: %d\n", ret);
goto errout;
}
if ((msr & MII_MSR_LINKSTATUS) == 0)
{
- nlldbg("ERROR: MSR LinkStatus: %04x\n", msr);
+ nllerr("ERROR: MSR LinkStatus: %04x\n", msr);
goto errout;
}
@@ -3259,7 +3259,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, CONFIG_SAM34_EMAC_PHYSR, &physr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYSR: %d\n", ret);
+ nllerr("ERROR: Failed to read PHYSR: %d\n", ret);
goto errout;
}
@@ -3297,7 +3297,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
/* Start the EMAC transfers */
- nllvdbg("Link is up\n");
+ nllinfo("Link is up\n");
linkup = true;
errout:
@@ -3354,7 +3354,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
ret = sam_phyfind(priv, &priv->phyaddr);
if (ret < 0)
{
- nlldbg("ERROR: sam_phyfind failed: %d\n", ret);
+ nllerr("ERROR: sam_phyfind failed: %d\n", ret);
return ret;
}
@@ -3598,7 +3598,7 @@ static void sam_macaddress(struct sam_emac_s *priv)
struct net_driver_s *dev = &priv->dev;
uint32_t regval;
- nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
@@ -3664,7 +3664,7 @@ static void sam_ipv6multicast(struct sam_emac_s *priv)
mac[4] = tmp16 & 0xff;
mac[5] = tmp16 >> 8;
- nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
(void)sam_addmac(dev, mac);
@@ -3710,7 +3710,7 @@ static int sam_emac_configure(struct sam_emac_s *priv)
{
uint32_t regval;
- nllvdbg("Entry\n");
+ nllinfo("Entry\n");
/* Enable clocking to the EMAC peripheral */
@@ -3823,14 +3823,14 @@ void up_netinitialize(void)
priv->txpoll = wd_create();
if (!priv->txpoll)
{
- nlldbg("ERROR: Failed to create periodic poll timer\n");
+ nllerr("ERROR: Failed to create periodic poll timer\n");
return;
}
priv->txtimeout = wd_create(); /* Create TX timeout timer */
if (!priv->txtimeout)
{
- nlldbg("ERROR: Failed to create periodic poll timer\n");
+ nllerr("ERROR: Failed to create periodic poll timer\n");
goto errout_with_txpoll;
}
@@ -3843,7 +3843,7 @@ void up_netinitialize(void)
ret = sam_buffer_initialize(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_buffer_initialize failed: %d\n", ret);
+ nllerr("ERROR: sam_buffer_initialize failed: %d\n", ret);
goto errout_with_txtimeout;
}
@@ -3854,7 +3854,7 @@ void up_netinitialize(void)
ret = irq_attach(SAM_IRQ_EMAC, sam_emac_interrupt);
if (ret < 0)
{
- nlldbg("ERROR: Failed to attach the handler to the IRQ%d\n", SAM_IRQ_EMAC);
+ nllerr("ERROR: Failed to attach the handler to the IRQ%d\n", SAM_IRQ_EMAC);
goto errout_with_buffers;
}
@@ -3867,7 +3867,7 @@ void up_netinitialize(void)
ret = sam_ifdown(&priv->dev);
if (ret < 0)
{
- nlldbg("ERROR: Failed to put the interface in the down state: %d\n", ret);
+ nllerr("ERROR: Failed to put the interface in the down state: %d\n", ret);
goto errout_with_buffers;
}
@@ -3879,7 +3879,7 @@ void up_netinitialize(void)
return;
}
- nlldbg("ERROR: netdev_register() failed: %d\n", ret);
+ nllerr("ERROR: netdev_register() failed: %d\n", ret);
errout_with_buffers:
sam_buffer_free(priv);
diff --git a/arch/arm/src/sam34/sam_gpio.c b/arch/arm/src/sam34/sam_gpio.c
index b0f45e89e7ba95b4baa96feceb1b4dd55e19e124..78f5e1aff17a1e588f1b514f84b023885ea51979 100644
--- a/arch/arm/src/sam34/sam_gpio.c
+++ b/arch/arm/src/sam34/sam_gpio.c
@@ -488,41 +488,41 @@ int sam_dumpgpio(uint32_t pinset, const char *msg)
/* The following requires exclusive access to the GPIO registers */
flags = enter_critical_section();
- lldbg("PIO%c pinset: %08x base: %08x -- %s\n",
+ llerr("PIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg);
- lldbg(" PSR: %08x OSR: %08x IFSR: %08x ODSR: %08x\n",
+ llerr(" PSR: %08x OSR: %08x IFSR: %08x ODSR: %08x\n",
getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_OSR_OFFSET),
getreg32(base + SAM_PIO_IFSR_OFFSET), getreg32(base + SAM_PIO_ODSR_OFFSET));
- lldbg(" PDSR: %08x IMR: %08x ISR: %08x MDSR: %08x\n",
+ llerr(" PDSR: %08x IMR: %08x ISR: %08x MDSR: %08x\n",
getreg32(base + SAM_PIO_PDSR_OFFSET), getreg32(base + SAM_PIO_IMR_OFFSET),
getreg32(base + SAM_PIO_ISR_OFFSET), getreg32(base + SAM_PIO_MDSR_OFFSET));
#if defined(CONFIG_ARCH_CHIP_SAM3U)
- lldbg(" ABSR: %08x SCIFSR: %08x DIFSR: %08x IFDGSR: %08x\n",
+ llerr(" ABSR: %08x SCIFSR: %08x DIFSR: %08x IFDGSR: %08x\n",
getreg32(base + SAM_PIO_ABSR_OFFSET), getreg32(base + SAM_PIO_SCIFSR_OFFSET),
getreg32(base + SAM_PIO_DIFSR_OFFSET), getreg32(base + SAM_PIO_IFDGSR_OFFSET));
#elif defined(CONFIG_ARCH_CHIP_SAM4S) || defined(CONFIG_ARCH_CHIP_SAM4E)
- lldbg(" ABCDSR: %08x %08x IFSCSR: %08x PPDSR: %08x\n",
+ llerr(" ABCDSR: %08x %08x IFSCSR: %08x PPDSR: %08x\n",
getreg32(base + SAM_PIO_ABCDSR1_OFFSET), getreg32(base + SAM_PIO_ABCDSR2_OFFSET),
getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIO_PPDSR_OFFSET));
#endif
- lldbg(" PUSR: %08x SCDR: %08x OWSR: %08x AIMMR: %08x\n",
+ llerr(" PUSR: %08x SCDR: %08x OWSR: %08x AIMMR: %08x\n",
getreg32(base + SAM_PIO_PUSR_OFFSET), getreg32(base + SAM_PIO_SCDR_OFFSET),
getreg32(base + SAM_PIO_OWSR_OFFSET), getreg32(base + SAM_PIO_AIMMR_OFFSET));
- lldbg(" ESR: %08x LSR: %08x ELSR: %08x FELLSR: %08x\n",
+ llerr(" ESR: %08x LSR: %08x ELSR: %08x FELLSR: %08x\n",
getreg32(base + SAM_PIO_ESR_OFFSET), getreg32(base + SAM_PIO_LSR_OFFSET),
getreg32(base + SAM_PIO_ELSR_OFFSET), getreg32(base + SAM_PIO_FELLSR_OFFSET));
- lldbg(" FRLHSR: %08x LOCKSR: %08x WPMR: %08x WPSR: %08x\n",
+ llerr(" FRLHSR: %08x LOCKSR: %08x WPMR: %08x WPSR: %08x\n",
getreg32(base + SAM_PIO_FRLHSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET),
getreg32(base + SAM_PIO_WPMR_OFFSET), getreg32(base + SAM_PIO_WPSR_OFFSET));
#if defined(CONFIG_ARCH_CHIP_SAM4S) || defined(CONFIG_ARCH_CHIP_SAM4E)
- lldbg(" PCMR: %08x PCIMR: %08x PCISR: %08x PCRHR: %08x\n",
+ llerr(" PCMR: %08x PCIMR: %08x PCISR: %08x PCRHR: %08x\n",
getreg32(base + SAM_PIO_PCMR_OFFSET), getreg32(base + SAM_PIO_PCIMR_OFFSET),
getreg32(base + SAM_PIO_PCISR_OFFSET), getreg32(base + SAM_PIO_PCRHR_OFFSET));
#ifdef CONFIG_ARCH_CHIP_SAM4E
- lldbg("SCHMITT: %08x DELAYR:%08x\n",
+ llerr("SCHMITT: %08x DELAYR:%08x\n",
getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DELAYR_OFFSET));
#else
- lldbg("SCHMITT: %08x\n",
+ llerr("SCHMITT: %08x\n",
getreg32(base + SAM_PIO_SCHMITT_OFFSET));
#endif
#endif
diff --git a/arch/arm/src/sam34/sam_gpio.h b/arch/arm/src/sam34/sam_gpio.h
index f8f267ef5e39a95025affce1248a5e82c06d9707..32d579a12c127f80f15bcfd94898edd825bc7f1f 100644
--- a/arch/arm/src/sam34/sam_gpio.h
+++ b/arch/arm/src/sam34/sam_gpio.h
@@ -77,7 +77,7 @@
# undef CONFIG_SAM34_GPIO_IRQ
#endif
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_GPIO
#endif
diff --git a/arch/arm/src/sam34/sam_hsmci.c b/arch/arm/src/sam34/sam_hsmci.c
index 21e9098cd5aecc3804eab568f5d86e75a9424c4a..f07fdf5be3e662186c6e86a25542d13c160815d2 100644
--- a/arch/arm/src/sam34/sam_hsmci.c
+++ b/arch/arm/src/sam34/sam_hsmci.c
@@ -104,7 +104,7 @@
#define SAM34_HSMCI_PRIO NVIC_SYSH_PRIORITY_DEFAULT
-#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_VERBOSE)
+#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_INFO)
# undef CONFIG_SAM34_HSMCI_CMDDEBUG
# undef CONFIG_SAM34_HSMCI_XFRDEBUG
#endif
@@ -831,38 +831,38 @@ static void sam_hsmcisample(struct sam_hsmciregs_s *regs)
#if defined(CONFIG_SAM34_HSMCI_XFRDEBUG) || defined(CONFIG_SAM34_HSMCI_CMDDEBUG)
static void sam_hsmcidump(struct sam_hsmciregs_s *regs, const char *msg)
{
- fdbg("HSMCI Registers: %s\n", msg);
- fdbg(" MR[%08x]: %08x\n", SAM_HSMCI_MR, regs->mr);
- fdbg(" DTOR[%08x]: %08x\n", SAM_HSMCI_DTOR, regs->dtor);
- fdbg(" SDCR[%08x]: %08x\n", SAM_HSMCI_SDCR, regs->sdcr);
- fdbg(" ARGR[%08x]: %08x\n", SAM_HSMCI_ARGR, regs->argr);
- fdbg(" BLKR[%08x]: %08x\n", SAM_HSMCI_BLKR, regs->blkr);
- fdbg(" CSTOR[%08x]: %08x\n", SAM_HSMCI_CSTOR, regs->cstor);
- fdbg(" RSPR0[%08x]: %08x\n", SAM_HSMCI_RSPR0, regs->rsp0);
- fdbg(" RSPR1[%08x]: %08x\n", SAM_HSMCI_RSPR1, regs->rsp1);
- fdbg(" RSPR2[%08x]: %08x\n", SAM_HSMCI_RSPR2, regs->rsp2);
- fdbg(" RSPR3[%08x]: %08x\n", SAM_HSMCI_RSPR3, regs->rsp3);
- fdbg(" SR[%08x]: %08x\n", SAM_HSMCI_SR, regs->sr);
- fdbg(" IMR[%08x]: %08x\n", SAM_HSMCI_IMR, regs->imr);
+ ferr("HSMCI Registers: %s\n", msg);
+ ferr(" MR[%08x]: %08x\n", SAM_HSMCI_MR, regs->mr);
+ ferr(" DTOR[%08x]: %08x\n", SAM_HSMCI_DTOR, regs->dtor);
+ ferr(" SDCR[%08x]: %08x\n", SAM_HSMCI_SDCR, regs->sdcr);
+ ferr(" ARGR[%08x]: %08x\n", SAM_HSMCI_ARGR, regs->argr);
+ ferr(" BLKR[%08x]: %08x\n", SAM_HSMCI_BLKR, regs->blkr);
+ ferr(" CSTOR[%08x]: %08x\n", SAM_HSMCI_CSTOR, regs->cstor);
+ ferr(" RSPR0[%08x]: %08x\n", SAM_HSMCI_RSPR0, regs->rsp0);
+ ferr(" RSPR1[%08x]: %08x\n", SAM_HSMCI_RSPR1, regs->rsp1);
+ ferr(" RSPR2[%08x]: %08x\n", SAM_HSMCI_RSPR2, regs->rsp2);
+ ferr(" RSPR3[%08x]: %08x\n", SAM_HSMCI_RSPR3, regs->rsp3);
+ ferr(" SR[%08x]: %08x\n", SAM_HSMCI_SR, regs->sr);
+ ferr(" IMR[%08x]: %08x\n", SAM_HSMCI_IMR, regs->imr);
#if defined(CONFIG_ARCH_CHIP_SAM3U)
- fdbg(" DMA[%08x]: %08x\n", SAM_HSMCI_DMA, regs->dma);
+ ferr(" DMA[%08x]: %08x\n", SAM_HSMCI_DMA, regs->dma);
#endif
- fdbg(" CFG[%08x]: %08x\n", SAM_HSMCI_CFG, regs->cfg);
- fdbg(" WPMR[%08x]: %08x\n", SAM_HSMCI_WPMR, regs->wpmr);
- fdbg(" WPSR[%08x]: %08x\n", SAM_HSMCI_WPSR, regs->wpsr);
+ ferr(" CFG[%08x]: %08x\n", SAM_HSMCI_CFG, regs->cfg);
+ ferr(" WPMR[%08x]: %08x\n", SAM_HSMCI_WPMR, regs->wpmr);
+ ferr(" WPSR[%08x]: %08x\n", SAM_HSMCI_WPSR, regs->wpsr);
#ifdef CONFIG_SAM34_PDCA
- fdbg("HSMCI PDC Registers:\n");
- fdbg(" RPR[%08x]: %08x\n", SAM_HSMCI_PDC_RPR, regs->pdc_rpr);
- fdbg(" RCR[%08x]: %08x\n", SAM_HSMCI_PDC_RCR, regs->pdc_rcr);
- fdbg(" TPR[%08x]: %08x\n", SAM_HSMCI_PDC_TPR, regs->pdc_tpr);
- fdbg(" TCR[%08x]: %08x\n", SAM_HSMCI_PDC_TCR, regs->pdc_tcr);
- fdbg(" RNPR[%08x]: %08x\n", SAM_HSMCI_PDC_RNPR, regs->pdc_rnpr);
- fdbg(" RNCR[%08x]: %08x\n", SAM_HSMCI_PDC_RNCR, regs->pdc_rncr);
- fdbg(" TNPR[%08x]: %08x\n", SAM_HSMCI_PDC_TNPR, regs->pdc_tnpr);
- fdbg(" TNCR[%08x]: %08x\n", SAM_HSMCI_PDC_TNCR, regs->pdc_tncr);
-//fdbg(" TCR[%08x]: %08x\n", SAM_HSMCI_PDC_PTCR, regs->pdc_ptcr);
- fdbg(" PTSR[%08x]: %08x\n", SAM_HSMCI_PDC_PTSR, regs->pdc_ptsr);
+ ferr("HSMCI PDC Registers:\n");
+ ferr(" RPR[%08x]: %08x\n", SAM_HSMCI_PDC_RPR, regs->pdc_rpr);
+ ferr(" RCR[%08x]: %08x\n", SAM_HSMCI_PDC_RCR, regs->pdc_rcr);
+ ferr(" TPR[%08x]: %08x\n", SAM_HSMCI_PDC_TPR, regs->pdc_tpr);
+ ferr(" TCR[%08x]: %08x\n", SAM_HSMCI_PDC_TCR, regs->pdc_tcr);
+ ferr(" RNPR[%08x]: %08x\n", SAM_HSMCI_PDC_RNPR, regs->pdc_rnpr);
+ ferr(" RNCR[%08x]: %08x\n", SAM_HSMCI_PDC_RNCR, regs->pdc_rncr);
+ ferr(" TNPR[%08x]: %08x\n", SAM_HSMCI_PDC_TNPR, regs->pdc_tnpr);
+ ferr(" TNCR[%08x]: %08x\n", SAM_HSMCI_PDC_TNCR, regs->pdc_tncr);
+//ferr(" TCR[%08x]: %08x\n", SAM_HSMCI_PDC_PTCR, regs->pdc_ptcr);
+ ferr(" PTSR[%08x]: %08x\n", SAM_HSMCI_PDC_PTSR, regs->pdc_ptsr);
#endif
}
#endif
@@ -1083,7 +1083,7 @@ static void sam_eventtimeout(int argc, uint32_t arg)
/* Yes.. wake up any waiting threads */
sam_endwait(priv, SDIOWAIT_TIMEOUT);
- flldbg("Timeout\n");
+ fllerr("Timeout\n");
}
}
@@ -1278,7 +1278,7 @@ static int sam_interrupt(int irq, void *context)
{
/* Yes.. Was it some kind of timeout error? */
- flldbg("ERROR: enabled: %08x pending: %08x\n", enabled, pending);
+ fllerr("ERROR: enabled: %08x pending: %08x\n", enabled, pending);
if ((pending & HSMCI_DATA_TIMEOUT_ERRORS) != 0)
{
/* Yes.. Terminate with a timeout. */
@@ -1320,7 +1320,7 @@ static int sam_interrupt(int irq, void *context)
{
/* Yes.. Was the error some kind of timeout? */
- fllvdbg("ERROR: events: %08x SR: %08x\n",
+ fllinfo("ERROR: events: %08x SR: %08x\n",
priv->cmdrmask, enabled);
if ((pending & HSMCI_RESPONSE_TIMEOUT_ERRORS) != 0)
@@ -1754,7 +1754,7 @@ static int sam_sendcmd(FAR struct sdio_dev_s *dev,
/* Write the fully decorated command to CMDR */
- fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+ finfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
putreg32(regval, SAM_HSMCI_CMDR);
sam_cmdsample1(SAMPLENDX_AFTER_CMDR);
return OK;
@@ -1933,7 +1933,7 @@ static int sam_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
{
/* Yes.. Was the error some kind of timeout? */
- fdbg("ERROR: cmd: %08x events: %08x SR: %08x\n",
+ ferr("ERROR: cmd: %08x events: %08x SR: %08x\n",
cmd, priv->cmdrmask, sr);
if ((pending & HSMCI_RESPONSE_TIMEOUT_ERRORS) != 0)
@@ -1963,7 +1963,7 @@ static int sam_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
}
else if (--timeout <= 0)
{
- fdbg("ERROR: Timeout cmd: %08x events: %08x SR: %08x\n",
+ ferr("ERROR: Timeout cmd: %08x events: %08x SR: %08x\n",
cmd, priv->cmdrmask, sr);
priv->wkupevent = SDIOWAIT_TIMEOUT;
@@ -2035,10 +2035,10 @@ static int sam_recvshort(FAR struct sdio_dev_s *dev,
* 0 1 End bit
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!rshort)
{
- fdbg("ERROR: rshort=NULL\n");
+ ferr("ERROR: rshort=NULL\n");
ret = -EINVAL;
}
@@ -2050,7 +2050,7 @@ static int sam_recvshort(FAR struct sdio_dev_s *dev,
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2095,12 +2095,12 @@ static int sam_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlong
* 0 1 End bit
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Check that R1 is the correct response to this command */
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2282,7 +2282,7 @@ static sdio_eventset_t sam_eventwait(FAR struct sdio_dev_s *dev,
1, (uint32_t)priv);
if (ret != OK)
{
- fdbg("ERROR: wd_start failed: %d\n", ret);
+ ferr("ERROR: wd_start failed: %d\n", ret);
}
}
@@ -2348,7 +2348,7 @@ static void sam_callbackenable(FAR struct sdio_dev_s *dev,
{
struct sam_dev_s *priv = (struct sam_dev_s *)dev;
- fvdbg("eventset: %02x\n", eventset);
+ finfo("eventset: %02x\n", eventset);
DEBUGASSERT(priv != NULL);
priv->cbevents = eventset;
@@ -2384,7 +2384,7 @@ static int sam_registercallback(FAR struct sdio_dev_s *dev,
/* Disable callbacks and register this callback and is argument */
- fvdbg("Register %p(%p)\n", callback, arg);
+ finfo("Register %p(%p)\n", callback, arg);
DEBUGASSERT(priv != NULL);
priv->cbevents = 0;
@@ -2472,7 +2472,7 @@ static int sam_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
#ifdef CONFIG_SAM34_PDCA
modifyreg32(SAM_HSMCI_MR, 0, HSMCI_MR_PDCMODE);
- fdbg("SAM_HSMCI_MR = 0x%08X\n", getreg32(SAM_HSMCI_MR));
+ ferr("SAM_HSMCI_MR = 0x%08X\n", getreg32(SAM_HSMCI_MR));
putreg32((uint32_t)buffer, SAM_HSMCI_PDC_RPR);
putreg32(buflen/4, SAM_HSMCI_PDC_RCR);
putreg32(PDC_PTCR_RXTEN, SAM_HSMCI_PDC_PTCR);
@@ -2541,7 +2541,7 @@ static int sam_dmasendsetup(FAR struct sdio_dev_s *dev,
#ifdef CONFIG_SAM34_PDCA
modifyreg32(SAM_HSMCI_MR, 0, HSMCI_MR_PDCMODE);
- fdbg("SAM_HSMCI_MR = 0x%08X\n", getreg32(SAM_HSMCI_MR));
+ ferr("SAM_HSMCI_MR = 0x%08X\n", getreg32(SAM_HSMCI_MR));
putreg32((uint32_t)buffer, SAM_HSMCI_PDC_TPR);
putreg32(buflen/4, SAM_HSMCI_PDC_TCR);
putreg32(PDC_PTCR_TXTEN, SAM_HSMCI_PDC_PTCR);
@@ -2581,7 +2581,7 @@ static void sam_callback(void *arg)
/* Is a callback registered? */
DEBUGASSERT(priv != NULL);
- fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
+ finfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
if (priv->callback)
@@ -2626,14 +2626,14 @@ static void sam_callback(void *arg)
{
/* Yes.. queue it */
- fllvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
+ fllinfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
(void)work_queue(LPWORK, &priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0);
}
else
{
/* No.. then just call the callback here */
- fvdbg("Callback to %p(%p)\n", priv->callback, priv->cbarg);
+ finfo("Callback to %p(%p)\n", priv->callback, priv->cbarg);
priv->callback(priv->cbarg);
}
}
@@ -2663,7 +2663,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
struct sam_dev_s *priv = &g_sdiodev;
- fdbg("slotno: %d\n", slotno);
+ ferr("slotno: %d\n", slotno);
/* Initialize the HSMCI slot structure */
@@ -2741,7 +2741,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
priv->cdstatus &= ~SDIO_STATUS_PRESENT;
}
- fllvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
+ fllinfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
/* Perform any requested callback if the status has changed */
@@ -2786,7 +2786,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
}
- fvdbg("cdstatus: %02x\n", priv->cdstatus);
+ finfo("cdstatus: %02x\n", priv->cdstatus);
leave_critical_section(flags);
}
#endif /* CONFIG_SAM34_HSMCI */
diff --git a/arch/arm/src/sam34/sam_irq.c b/arch/arm/src/sam34/sam_irq.c
index 2a8b2f990ed4c6b582a9dca47e5d907927e4e606..3eee00dbdc444f3e4ed9b412fd3417d2bdb89d8e 100644
--- a/arch/arm/src/sam34/sam_irq.c
+++ b/arch/arm/src/sam34/sam_irq.c
@@ -114,40 +114,40 @@ static void sam_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" INTCTRL: %08x VECTAB: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+ llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
- lldbg(" IRQ ENABLE: %08x %08x %08x\n",
+ llerr(" IRQ ENABLE: %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
- lldbg(" SYSH_PRIO: %08x %08x %08x\n",
+ llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
#if SAM_IRQ_NEXTINT > 15
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 31
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 47
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 63
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
#endif
@@ -161,7 +161,7 @@ static void sam_dumpnvic(const char *msg, int irq)
#endif
/****************************************************************************
- * Name: sam_nmi, sam_busfault, sam_usagefault, sam_pendsv, sam_dbgmonitor,
+ * Name: sam_nmi, sam_busfault, sam_usagefault, sam_pendsv, sam_errmonitor,
* sam_pendsv, sam_reserved
*
* Description:
@@ -171,11 +171,11 @@ static void sam_dumpnvic(const char *msg, int irq)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int sam_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -183,7 +183,7 @@ static int sam_nmi(int irq, FAR void *context)
static int sam_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
+ err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -191,7 +191,7 @@ static int sam_busfault(int irq, FAR void *context)
static int sam_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
+ err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -199,15 +199,15 @@ static int sam_usagefault(int irq, FAR void *context)
static int sam_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
-static int sam_dbgmonitor(int irq, FAR void *context)
+static int sam_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Debug Monitor received\n");
+ err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@@ -215,7 +215,7 @@ static int sam_dbgmonitor(int irq, FAR void *context)
static int sam_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -456,7 +456,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(SAM_IRQ_NMI, sam_nmi);
#ifndef CONFIG_ARM_MPU
irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
@@ -464,7 +464,7 @@ void up_irqinitialize(void)
irq_attach(SAM_IRQ_BUSFAULT, sam_busfault);
irq_attach(SAM_IRQ_USAGEFAULT, sam_usagefault);
irq_attach(SAM_IRQ_PENDSV, sam_pendsv);
- irq_attach(SAM_IRQ_DBGMONITOR, sam_dbgmonitor);
+ irq_attach(SAM_IRQ_DBGMONITOR, sam_errmonitor);
irq_attach(SAM_IRQ_RESERVED, sam_reserved);
#endif
diff --git a/arch/arm/src/sam34/sam_rtc.c b/arch/arm/src/sam34/sam_rtc.c
index 8dbe4e9e1af6602dddee528887cabf0772b44745..698a9df29587597f7834de41eb28939107bb0d96 100644
--- a/arch/arm/src/sam34/sam_rtc.c
+++ b/arch/arm/src/sam34/sam_rtc.c
@@ -80,7 +80,7 @@
#define RTC_MAGIC 0xdeadbeef
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_RTC
#endif
@@ -89,15 +89,15 @@
/* Debug ****************************************************************************/
#ifdef CONFIG_DEBUG_RTC
-# define rtcdbg dbg
-# define rtcvdbg vdbg
-# define rtclldbg lldbg
-# define rtcllvdbg llvdbg
+# define rtcerr err
+# define rtcinfo info
+# define rtcllerr llerr
+# define rtcllinfo llinfo
#else
-# define rtcdbg(x...)
-# define rtcvdbg(x...)
-# define rtclldbg(x...)
-# define rtcllvdbg(x...)
+# define rtcerr(x...)
+# define rtcinfo(x...)
+# define rtcllerr(x...)
+# define rtcllinfo(x...)
#endif
/************************************************************************************
@@ -149,16 +149,16 @@ uint32_t g_rtt_offset = 0;
#ifdef CONFIG_DEBUG_RTC
static void rtc_dumpregs(FAR const char *msg)
{
- rtclldbg("%s:\n", msg);
- rtclldbg(" CR: %08x\n", getreg32(SAM_RTC_CR));
- rtclldbg(" MR: %08x\n", getreg32(SAM_RTC_MR));
- rtclldbg(" TIMR: %08x\n", getreg32(SAM_RTC_TIMR));
- rtclldbg(" CALR: %08x\n", getreg32(SAM_RTC_CALR));
- rtclldbg(" TIMALR: %08x\n", getreg32(SAM_RTC_TIMALR));
- rtclldbg(" CALALR: %08x\n", getreg32(SAM_RTC_CALALR));
- rtclldbg(" SR: %08x\n", getreg32(SAM_RTC_SR));
- rtclldbg(" IMR: %08x\n", getreg32(SAM_RTC_IMR));
- rtclldbg(" VER: %08x\n", getreg32(SAM_RTC_VER));
+ rtcllerr("%s:\n", msg);
+ rtcllerr(" CR: %08x\n", getreg32(SAM_RTC_CR));
+ rtcllerr(" MR: %08x\n", getreg32(SAM_RTC_MR));
+ rtcllerr(" TIMR: %08x\n", getreg32(SAM_RTC_TIMR));
+ rtcllerr(" CALR: %08x\n", getreg32(SAM_RTC_CALR));
+ rtcllerr(" TIMALR: %08x\n", getreg32(SAM_RTC_TIMALR));
+ rtcllerr(" CALALR: %08x\n", getreg32(SAM_RTC_CALALR));
+ rtcllerr(" SR: %08x\n", getreg32(SAM_RTC_SR));
+ rtcllerr(" IMR: %08x\n", getreg32(SAM_RTC_IMR));
+ rtcllerr(" VER: %08x\n", getreg32(SAM_RTC_VER));
}
#else
# define rtc_dumpregs(msg)
@@ -181,13 +181,13 @@ static void rtc_dumpregs(FAR const char *msg)
#ifdef CONFIG_DEBUG_RTC
static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
{
- rtclldbg("%s:\n", msg);
- rtclldbg(" tm_sec: %08x\n", tp->tm_sec);
- rtclldbg(" tm_min: %08x\n", tp->tm_min);
- rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
- rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
- rtclldbg(" tm_mon: %08x\n", tp->tm_mon);
- rtclldbg(" tm_year: %08x\n", tp->tm_year);
+ rtcllerr("%s:\n", msg);
+ rtcllerr(" tm_sec: %08x\n", tp->tm_sec);
+ rtcllerr(" tm_min: %08x\n", tp->tm_min);
+ rtcllerr(" tm_hour: %08x\n", tp->tm_hour);
+ rtcllerr(" tm_mday: %08x\n", tp->tm_mday);
+ rtcllerr(" tm_mon: %08x\n", tp->tm_mon);
+ rtcllerr(" tm_year: %08x\n", tp->tm_year);
}
#else
# define rtc_dumptime(tp, msg)
@@ -298,7 +298,7 @@ static int rtc_interrupt(int irq, void *context)
ret = work_queue(LPWORK, &g_alarmwork, rtc_worker, NULL, 0);
if (ret < 0)
{
- rtclldbg("ERRPR: work_queue failed: %d\n", ret);
+ rtcllerr("ERRPR: work_queue failed: %d\n", ret);
}
/* Disable any further alarm interrupts */
diff --git a/arch/arm/src/sam34/sam_rtt.c b/arch/arm/src/sam34/sam_rtt.c
index a0c94f7ef77e0323eafb6009fec459100fa06603..e2972e00bae8565c713c96df50aea5d2da78dddb 100644
--- a/arch/arm/src/sam34/sam_rtt.c
+++ b/arch/arm/src/sam34/sam_rtt.c
@@ -76,16 +76,16 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the timer
- * driver. NOTE: that only lldbg types are used so that the output is
+ * driver. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_RTT
-# define rttdbg lldbg
-# define rttvdbg llvdbg
+# define rtterr llerr
+# define rttinfo llinfo
#else
-# define rttdbg(x...)
-# define rttvdbg(x...)
+# define rtterr(x...)
+# define rttinfo(x...)
#endif
/****************************************************************************
@@ -115,7 +115,7 @@ struct sam34_lowerhalf_s
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_SAM34_RTT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAM34_RTT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t sam34_getreg(uint32_t addr);
static void sam34_putreg(uint32_t val, uint32_t addr);
#else
@@ -193,7 +193,7 @@ static inline uint32_t sam34_readvr(void)
*
****************************************************************************/
-#if defined(CONFIG_SAM34_RTT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAM34_RTT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t sam34_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -214,7 +214,7 @@ static uint32_t sam34_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -231,7 +231,7 @@ static uint32_t sam34_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -243,7 +243,7 @@ static uint32_t sam34_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08lx->%08lx\n", addr, val);
+ llerr("%08lx->%08lx\n", addr, val);
return val;
}
#endif
@@ -256,12 +256,12 @@ static uint32_t sam34_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_SAM34_RTT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAM34_RTT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void sam34_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08lx<-%08lx\n", addr, val);
+ llerr("%08lx<-%08lx\n", addr, val);
/* Write the value */
@@ -287,7 +287,7 @@ static int sam34_interrupt(int irq, FAR void *context)
{
FAR struct sam34_lowerhalf_s *priv = &g_tcdev;
- rttvdbg("Entry\n");
+ rttinfo("Entry\n");
DEBUGASSERT(irq == SAM_IRQ_RTT);
/* Check if the interrupt is really pending */
@@ -373,7 +373,7 @@ static int sam34_start(FAR struct timer_lowerhalf_s *lower)
uint32_t mr;
uint32_t vr;
- rttvdbg("Entry\n");
+ rttinfo("Entry\n");
DEBUGASSERT(priv);
if (priv->started)
@@ -433,7 +433,7 @@ static int sam34_start(FAR struct timer_lowerhalf_s *lower)
static int sam34_stop(FAR struct timer_lowerhalf_s *lower)
{
FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
- rttvdbg("Entry\n");
+ rttinfo("Entry\n");
DEBUGASSERT(priv);
if (!priv->started)
@@ -474,7 +474,7 @@ static int sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
{
FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
- rttvdbg("Entry\n");
+ rttinfo("Entry\n");
DEBUGASSERT(priv);
/* Return the status bit */
@@ -498,9 +498,9 @@ static int sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
status->timeleft = 1000000ULL*(sam34_getreg(SAM_RTT_AR) - sam34_readvr())/RTT_FCLK;
- rttvdbg(" flags : %08x\n", status->flags);
- rttvdbg(" timeout : %d\n", status->timeout);
- rttvdbg(" timeleft : %d\n", status->timeleft);
+ rttinfo(" flags : %08x\n", status->flags);
+ rttinfo(" timeout : %d\n", status->timeout);
+ rttinfo(" timeleft : %d\n", status->timeleft);
return OK;
}
@@ -526,7 +526,7 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
DEBUGASSERT(priv);
- rttvdbg("Entry: timeout=%d\n", timeout);
+ rttinfo("Entry: timeout=%d\n", timeout);
if (priv->started)
{
@@ -537,7 +537,7 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
if (timeout < 1 || timeout > RTT_MAXTIMEOUT)
{
- rttdbg("Cannot represent timeout=%lu > %lu\n",
+ rtterr("Cannot represent timeout=%lu > %lu\n",
timeout, RTT_MAXTIMEOUT);
return -ERANGE;
}
@@ -547,7 +547,7 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
timeout = (1000000ULL * priv->clkticks) / RTT_FCLK; /* Truncated timeout */
priv->adjustment = priv->timeout - timeout; /* Truncated time to be added to next interval (dither) */
- rttvdbg("fclk=%d clkticks=%d timout=%d, adjustment=%d\n",
+ rttinfo("fclk=%d clkticks=%d timout=%d, adjustment=%d\n",
RTT_FCLK, priv->clkticks, priv->timeout, priv->adjustment);
return OK;
@@ -582,7 +582,7 @@ static tccb_t sam34_sethandler(FAR struct timer_lowerhalf_s *lower,
flags = enter_critical_section();
DEBUGASSERT(priv);
- rttvdbg("Entry: handler=%p\n", handler);
+ rttinfo("Entry: handler=%p\n", handler);
/* Get the old handler return value */
@@ -623,7 +623,7 @@ static int sam34_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
int ret = -ENOTTY;
DEBUGASSERT(priv);
- rttvdbg("Entry: cmd=%d arg=%ld\n", cmd, arg);
+ rttinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
UNUSED(priv);
return ret;
@@ -653,7 +653,7 @@ void sam_rttinitialize(FAR const char *devpath)
{
FAR struct sam34_lowerhalf_s *priv = &g_tcdev;
- rttvdbg("Entry: devpath=%s\n", devpath);
+ rttinfo("Entry: devpath=%s\n", devpath);
/* Initialize the driver state structure. Here we assume: (1) the state
* structure lies in .bss and was zeroed at reset time. (2) This function
diff --git a/arch/arm/src/sam34/sam_spi.c b/arch/arm/src/sam34/sam_spi.c
index 424d9218449e6f8185d098442a54e03398f7c69c..a495bb9007e7982c040bd75875a2d2fa55bcd19a 100644
--- a/arch/arm/src/sam34/sam_spi.c
+++ b/arch/arm/src/sam34/sam_spi.c
@@ -132,31 +132,20 @@
#define DMA_TIMEOUT_TICKS MSEC2TICK(DMA_TIMEOUT_MS)
/* Debug *******************************************************************/
-/* Check if SPI debut is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_SPI
-# undef CONFIG_SAM34_SPI_DMADEBUG
-# undef CONFIG_SAM34_SPI_REGDEBUG
-#endif
+/* Check if SPI debut is enabled */
#ifndef CONFIG_DEBUG_DMA
# undef CONFIG_SAM34_SPI_DMADEBUG
#endif
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
#define DMA_INITIAL 0
@@ -252,7 +241,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
unsigned int offset);
static inline struct sam_spidev_s *spi_device(struct sam_spics_s *spics);
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg);
#else
# define spi_dumpregs(spi,msg)
@@ -441,7 +430,7 @@ static bool spi_checkreg(struct sam_spidev_s *spi, bool wr, uint32_t value,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", spi->ntimes);
+ llerr("...[Repeats %d times]...\n", spi->ntimes);
}
/* Save information about the new access */
@@ -475,7 +464,7 @@ static inline uint32_t spi_getreg(struct sam_spidev_s *spi,
#ifdef CONFIG_SAM34_SPI_REGDEBUG
if (spi_checkreg(spi, false, value, address))
{
- lldbg("%08x->%08x\n", address, value);
+ llerr("%08x->%08x\n", address, value);
}
#endif
@@ -498,7 +487,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
#ifdef CONFIG_SAM34_SPI_REGDEBUG
if (spi_checkreg(spi, true, value, address))
{
- lldbg("%08x<-%08x\n", address, value);
+ llerr("%08x<-%08x\n", address, value);
}
#endif
@@ -520,20 +509,20 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg)
{
- spivdbg("%s:\n", msg);
- spivdbg(" MR:%08x SR:%08x IMR:%08x\n",
+ spiinfo("%s:\n", msg);
+ spiinfo(" MR:%08x SR:%08x IMR:%08x\n",
getreg32(spi->base + SAM_SPI_MR_OFFSET),
getreg32(spi->base + SAM_SPI_SR_OFFSET),
getreg32(spi->base + SAM_SPI_IMR_OFFSET));
- spivdbg(" CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
+ spiinfo(" CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
getreg32(spi->base + SAM_SPI_CSR0_OFFSET),
getreg32(spi->base + SAM_SPI_CSR1_OFFSET),
getreg32(spi->base + SAM_SPI_CSR2_OFFSET),
getreg32(spi->base + SAM_SPI_CSR3_OFFSET));
- spivdbg(" WPCR:%08x WPSR:%08x\n",
+ spiinfo(" WPCR:%08x WPSR:%08x\n",
getreg32(spi->base + SAM_SPI_WPCR_OFFSET),
getreg32(spi->base + SAM_SPI_WPSR_OFFSET));
}
@@ -893,7 +882,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
struct sam_spics_s *spics = (struct sam_spics_s *)dev;
struct sam_spidev_s *spi = spi_device(spics);
- spivdbg("lock=%d\n", lock);
+ spiinfo("lock=%d\n", lock);
if (lock)
{
/* Take the semaphore (perhaps waiting) */
@@ -941,10 +930,10 @@ static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
/* Are we selecting or de-selecting the device? */
- spivdbg("selected=%d\n", selected);
+ spiinfo("selected=%d\n", selected);
if (selected)
{
- spivdbg("cs=%d\n", spics->cs);
+ spiinfo("cs=%d\n", spics->cs);
/* Before writing the TDR, the PCS field in the SPI_MR register must be set
* in order to select a slave.
@@ -999,7 +988,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
uint32_t regval;
unsigned int offset;
- spivdbg("cs=%d frequency=%d\n", spics->cs, frequency);
+ spiinfo("cs=%d frequency=%d\n", spics->cs, frequency);
/* Check if the requested frequency is the same as the frequency selection */
@@ -1069,14 +1058,14 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
/* Calculate the new actual frequency */
actual = SAM_SPI_CLOCK / scbr;
- spivdbg("csr[offset=%02x]=%08x actual=%d\n", offset, regval, actual);
+ spiinfo("csr[offset=%02x]=%08x actual=%d\n", offset, regval, actual);
/* Save the frequency setting */
spics->frequency = frequency;
spics->actual = actual;
- spidbg("Frequency %d->%d\n", frequency, actual);
+ spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -1102,7 +1091,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
uint32_t regval;
unsigned int offset;
- spivdbg("cs=%d mode=%d\n", spics->cs, mode);
+ spiinfo("cs=%d mode=%d\n", spics->cs, mode);
/* Has the mode changed? */
@@ -1145,7 +1134,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
}
spi_putreg(spi, regval, offset);
- spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+ spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
/* Save the mode so that subsequent re-configurations will be faster */
@@ -1175,7 +1164,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
uint32_t regval;
unsigned int offset;
- spivdbg("cs=%d nbits=%d\n", spics->cs, nbits);
+ spiinfo("cs=%d nbits=%d\n", spics->cs, nbits);
DEBUGASSERT(spics && nbits > 7 && nbits < 17);
/* Has the number of bits changed? */
@@ -1190,7 +1179,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
regval |= SPI_CSR_BITS(nbits);
spi_putreg(spi, regval, offset);
- spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+ spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
/* Save the selection so the subsequence re-configurations will be faster */
@@ -1228,7 +1217,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd)
rxbyte = (uint8_t)0;
spi_exchange(dev, &txbyte, &rxbyte, 1);
- spivdbg("Sent %02x received %02x\n", txbyte, rxbyte);
+ spiinfo("Sent %02x received %02x\n", txbyte, rxbyte);
return (uint16_t)rxbyte;
}
@@ -1276,7 +1265,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
uint8_t *rxptr8;
uint8_t *txptr8;
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
/* Set up PCS bits */
@@ -1422,7 +1411,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
return;
}
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
spics = (struct sam_spics_s *)dev;
spi = spi_device(spics);
@@ -1543,7 +1532,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = sam_dmarxsetup(spics->rxdma, regaddr, memaddr, nwords);
if (ret < 0)
{
- dmadbg("ERROR: sam_dmarxsetup failed: %d\n", ret);
+ dmaerr("ERROR: sam_dmarxsetup failed: %d\n", ret);
return;
}
@@ -1557,7 +1546,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = sam_dmatxsetup(spics->txdma, regaddr, memaddr, nwords);
if (ret < 0)
{
- dmadbg("ERROR: sam_dmatxsetup failed: %d\n", ret);
+ dmaerr("ERROR: sam_dmatxsetup failed: %d\n", ret);
return;
}
@@ -1569,7 +1558,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = sam_dmastart(spics->rxdma, spi_rxcallback, (void *)spics);
if (ret < 0)
{
- dmadbg("ERROR: RX sam_dmastart failed: %d\n", ret);
+ dmaerr("ERROR: RX sam_dmastart failed: %d\n", ret);
return;
}
@@ -1578,7 +1567,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = sam_dmastart(spics->txdma, spi_txcallback, (void *)spics);
if (ret < 0)
{
- dmadbg("ERROR: RX sam_dmastart failed: %d\n", ret);
+ dmaerr("ERROR: RX sam_dmastart failed: %d\n", ret);
sam_dmastop(spics->rxdma);
return;
}
@@ -1600,7 +1589,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
(wdentry_t)spi_dmatimeout, 1, (uint32_t)spics);
if (ret != OK)
{
- spidbg("ERROR: wd_start failed: %d\n", ret);
+ spierr("ERROR: wd_start failed: %d\n", ret);
}
/* Wait for the DMA complete */
@@ -1651,7 +1640,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
if (spics->result)
{
- spidbg("ERROR: DMA failed with result: %d\n", spics->result);
+ spierr("ERROR: DMA failed with result: %d\n", spics->result);
}
}
#endif /* CONFIG_SAM34_SPI_DMA */
@@ -1745,7 +1734,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
/* The support SAM parts have only a single SPI port */
- spivdbg("port: %d csno: %d spino: %d\n", port, csno, spino);
+ spiinfo("port: %d csno: %d spino: %d\n", port, csno, spino);
DEBUGASSERT(csno >= 0 && csno <= SAM_SPI_NCS);
#if defined(CONFIG_SAM34_SPI0) && defined(CONFIG_SAM34_SPI1)
@@ -1764,7 +1753,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
spics = (struct sam_spics_s *)zalloc(sizeof(struct sam_spics_s));
if (!spics)
{
- spidbg("ERROR: Failed to allocate a chip select structure\n");
+ spierr("ERROR: Failed to allocate a chip select structure\n");
return NULL;
}
@@ -1787,7 +1776,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
spics->rxdma = sam_dmachannel(0);
if (!spics->rxdma)
{
- spidbg("ERROR: Failed to allocate the RX DMA channel\n");
+ spierr("ERROR: Failed to allocate the RX DMA channel\n");
spics->candma = false;
}
}
@@ -1797,7 +1786,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
spics->txdma = sam_dmachannel(0);
if (!spics->txdma)
{
- spidbg("ERROR: Failed to allocate the TX DMA channel\n");
+ spierr("ERROR: Failed to allocate the TX DMA channel\n");
sam_dmafree(spics->rxdma);
spics->rxdma = NULL;
spics->candma = false;
@@ -1924,7 +1913,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
spi_putreg(spi, regval, offset);
spics->nbits = 8;
- spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+ spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
return &spics->spidev;
}
diff --git a/arch/arm/src/sam34/sam_start.c b/arch/arm/src/sam34/sam_start.c
index dc1d449808ab653ad2d43a1d5730a745c740451b..abae1da7615ee1040fe70e7d33fd8d480ce86b1f 100644
--- a/arch/arm/src/sam34/sam_start.c
+++ b/arch/arm/src/sam34/sam_start.c
@@ -88,7 +88,7 @@ void __start(void) __attribute__ ((no_instrument_function));
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# define showprogress(c) up_lowputc(c)
#else
# define showprogress(c)
diff --git a/arch/arm/src/sam34/sam_tc.c b/arch/arm/src/sam34/sam_tc.c
index a95fa495273d1f392a2491705ea48ec45f254790..d18da143a3fcacf49d28594012447b18d9070df9 100644
--- a/arch/arm/src/sam34/sam_tc.c
+++ b/arch/arm/src/sam34/sam_tc.c
@@ -74,16 +74,16 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the timer
- * driver. NOTE: that only lldbg types are used so that the output is
+ * driver. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_TIMER
-# define tcdbg lldbg
-# define tcvdbg llvdbg
+# define tcerr llerr
+# define tcinfo llinfo
#else
-# define tcdbg(x...)
-# define tcvdbg(x...)
+# define tcerr(x...)
+# define tcinfo(x...)
#endif
/****************************************************************************
@@ -114,7 +114,7 @@ struct sam34_lowerhalf_s
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_SAM34_TC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAM34_TC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t sam34_getreg(uint32_t addr);
static void sam34_putreg(uint32_t val, uint32_t addr);
#else
@@ -174,7 +174,7 @@ static struct sam34_lowerhalf_s g_tcdevs[6];
*
****************************************************************************/
-#if defined(CONFIG_SAM34_TC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAM34_TC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t sam34_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -195,7 +195,7 @@ static uint32_t sam34_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -212,7 +212,7 @@ static uint32_t sam34_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -224,7 +224,7 @@ static uint32_t sam34_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08lx->%08lx\n", addr, val);
+ llerr("%08lx->%08lx\n", addr, val);
return val;
}
#endif
@@ -237,12 +237,12 @@ static uint32_t sam34_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_SAM34_TC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAM34_TC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void sam34_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08lx<-%08lx\n", addr, val);
+ llerr("%08lx<-%08lx\n", addr, val);
/* Write the value */
@@ -268,7 +268,7 @@ static int sam34_interrupt(int irq, FAR void *context)
{
FAR struct sam34_lowerhalf_s *priv = &g_tcdevs[irq-SAM_IRQ_TC0];
- tcvdbg("Entry\n");
+ tcinfo("Entry\n");
DEBUGASSERT((irq >= SAM_IRQ_TC0) && (irq <= SAM_IRQ_TC5));
/* Check if the interrupt is really pending */
@@ -299,7 +299,7 @@ static int sam34_interrupt(int irq, FAR void *context)
/* No handler or the handler returned false.. stop the timer */
sam34_stop((FAR struct timer_lowerhalf_s *)priv);
- tcvdbg("Stopped\n");
+ tcinfo("Stopped\n");
}
/* TC_INT_CPCS is cleared by reading SAM_TCx_SR */
@@ -328,7 +328,7 @@ static int sam34_start(FAR struct timer_lowerhalf_s *lower)
FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
uint32_t mr_val;
- tcvdbg("Entry\n");
+ tcinfo("Entry\n");
DEBUGASSERT(priv);
if (priv->started)
@@ -382,7 +382,7 @@ static int sam34_start(FAR struct timer_lowerhalf_s *lower)
static int sam34_stop(FAR struct timer_lowerhalf_s *lower)
{
FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
- tcvdbg("Entry\n");
+ tcinfo("Entry\n");
DEBUGASSERT(priv);
if (!priv->started)
@@ -421,7 +421,7 @@ static int sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
uint32_t elapsed;
- tcvdbg("Entry\n");
+ tcinfo("Entry\n");
DEBUGASSERT(priv);
/* Return the status bit */
@@ -446,9 +446,9 @@ static int sam34_getstatus(FAR struct timer_lowerhalf_s *lower,
elapsed = sam34_getreg(priv->base + SAM_TC_CV_OFFSET);
status->timeleft = ((uint64_t)priv->timeout * elapsed) / (priv->clkticks + 1); /* TODO - check on this +1 */
- tcvdbg(" flags : %08x\n", status->flags);
- tcvdbg(" timeout : %d\n", status->timeout);
- tcvdbg(" timeleft : %d\n", status->timeleft);
+ tcinfo(" flags : %08x\n", status->flags);
+ tcinfo(" timeout : %d\n", status->timeout);
+ tcinfo(" timeleft : %d\n", status->timeleft);
return OK;
}
@@ -480,13 +480,13 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
return -EPERM;
}
- tcvdbg("Entry: timeout=%d\n", timeout);
+ tcinfo("Entry: timeout=%d\n", timeout);
/* Can this timeout be represented? */
if (timeout < 1 || timeout > TC_MAXTIMEOUT)
{
- tcdbg("Cannot represent timeout=%lu > %lu\n",
+ tcerr("Cannot represent timeout=%lu > %lu\n",
timeout, TC_MAXTIMEOUT);
return -ERANGE;
}
@@ -496,7 +496,7 @@ static int sam34_settimeout(FAR struct timer_lowerhalf_s *lower,
timeout = (1000000ULL * priv->clkticks) / TC_FCLK; /* Truncated timeout */
priv->adjustment = priv->timeout - timeout; /* Truncated time to be added to next interval (dither) */
- tcvdbg("fclk=%d clkticks=%d timout=%d, adjustment=%d\n",
+ tcinfo("fclk=%d clkticks=%d timout=%d, adjustment=%d\n",
TC_FCLK, priv->clkticks, priv->timeout, priv->adjustment);
return OK;
@@ -531,7 +531,7 @@ static tccb_t sam34_sethandler(FAR struct timer_lowerhalf_s *lower,
flags = enter_critical_section();
DEBUGASSERT(priv);
- tcvdbg("Entry: handler=%p\n", handler);
+ tcinfo("Entry: handler=%p\n", handler);
/* Get the old handler return value */
@@ -572,7 +572,7 @@ static int sam34_ioctl(FAR struct timer_lowerhalf_s *lower, int cmd,
int ret = -ENOTTY;
DEBUGASSERT(priv);
- tcvdbg("Entry: cmd=%d arg=%ld\n", cmd, arg);
+ tcinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
UNUSED(priv);
return ret;
@@ -602,7 +602,7 @@ void sam_tcinitialize(FAR const char *devpath, int irq)
{
FAR struct sam34_lowerhalf_s *priv = &g_tcdevs[irq-SAM_IRQ_TC0];
- tcvdbg("Entry: devpath=%s\n", devpath);
+ tcinfo("Entry: devpath=%s\n", devpath);
DEBUGASSERT((irq >= SAM_IRQ_TC0) && (irq <= SAM_IRQ_TC5));
/* Initialize the driver state structure. Here we assume: (1) the state
diff --git a/arch/arm/src/sam34/sam_twi.c b/arch/arm/src/sam34/sam_twi.c
index f8c2f7f7caf6af014b1f80c981bcf5eea08b9752..dcf324770b1820649f29708d6fd8b5964a3407f5 100644
--- a/arch/arm/src/sam34/sam_twi.c
+++ b/arch/arm/src/sam34/sam_twi.c
@@ -96,18 +96,18 @@
#define TWI_MAX_FREQUENCY 66000000 /* Maximum TWI frequency */
/* Debug ***********************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
+/* CONFIG_DEBUG_I2C + CONFIG_DEBUG_FEATURES enables general I2C debug output. */
#ifdef CONFIG_DEBUG_I2C
-# define i2cdbg dbg
-# define i2cvdbg vdbg
-# define i2clldbg lldbg
-# define i2cllvdbg llvdbg
+# define i2cerr err
+# define i2cinfo info
+# define i2cllerr llerr
+# define i2cllinfo llinfo
#else
-# define i2cdbg(x...)
-# define i2cvdbg(x...)
-# define i2clldbg(x...)
-# define i2cllvdbg(x...)
+# define i2cerr(x...)
+# define i2cinfo(x...)
+# define i2cllerr(x...)
+# define i2cllinfo(x...)
#endif
/****************************************************************************
@@ -288,7 +288,7 @@ static bool twi_checkreg(struct twi_dev_s *priv, bool wr, uint32_t value,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -320,7 +320,7 @@ static uint32_t twi_getabs(struct twi_dev_s *priv, uintptr_t address)
if (twi_checkreg(priv, false, value, address))
{
- lldbg("%08x->%08x\n", address, value);
+ llerr("%08x->%08x\n", address, value);
}
return value;
@@ -341,7 +341,7 @@ static void twi_putabs(struct twi_dev_s *priv, uintptr_t address,
{
if (twi_checkreg(priv, true, value, address))
{
- lldbg("%08x<-%08x\n", address, value);
+ llerr("%08x<-%08x\n", address, value);
}
putreg32(value, address);
@@ -401,9 +401,9 @@ static int twi_wait(struct twi_dev_s *priv)
do
{
- i2clldbg("TWI%d Waiting...\n", priv->twi);
+ i2cllerr("TWI%d Waiting...\n", priv->twi);
twi_takesem(&priv->waitsem);
- i2clldbg("TWI%d Awakened with result: %d\n", priv->twi, priv->result);
+ i2cllerr("TWI%d Awakened with result: %d\n", priv->twi, priv->result);
}
while (priv->result == -EBUSY);
@@ -460,7 +460,7 @@ static int twi_interrupt(struct twi_dev_s *priv)
imr = twi_getrel(priv, SAM_TWI_IMR_OFFSET);
pending = sr & imr;
- i2cllvdbg("TWI%d pending: %08x\n", priv->twi, pending);
+ i2cllinfo("TWI%d pending: %08x\n", priv->twi, pending);
msg = priv->msg;
@@ -470,7 +470,7 @@ static int twi_interrupt(struct twi_dev_s *priv)
{
/* Wake up the thread with an I/O error indication */
- i2clldbg("ERROR: TWI%d pending: %08x\n", priv->twi, pending);
+ i2cllerr("ERROR: TWI%d pending: %08x\n", priv->twi, pending);
twi_wakeup(priv, -EIO);
}
@@ -593,7 +593,7 @@ static void twi_timeout(int argc, uint32_t arg, ...)
{
struct twi_dev_s *priv = (struct twi_dev_s *)arg;
- i2clldbg("TWI%d Timeout!\n", priv->twi);
+ i2cllerr("TWI%d Timeout!\n", priv->twi);
twi_wakeup(priv, -ETIMEDOUT);
}
@@ -708,7 +708,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
int ret;
DEBUGASSERT(dev != NULL);
- i2cvdbg("TWI%d count: %d\n", priv->twi, count);
+ i2cinfo("TWI%d count: %d\n", priv->twi, count);
/* Get exclusive access to the device */
@@ -742,7 +742,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
ret = twi_wait(priv);
if (ret < 0)
{
- i2cdbg("ERROR: Transfer failed: %d\n", ret);
+ i2cerr("ERROR: Transfer failed: %d\n", ret);
}
leave_critical_section(flags);
@@ -842,7 +842,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, unsigned int pid,
uint32_t mck;
#endif
- i2cvdbg("TWI%d Initializing\n", priv->twi);
+ i2cinfo("TWI%d Initializing\n", priv->twi);
/* SVEN: TWI Slave Mode Enabled */
@@ -925,7 +925,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
uint32_t frequency;
unsigned int pid;
- i2cvdbg("Initializing TWI%d\n", bus);
+ i2cinfo("Initializing TWI%d\n", bus);
flags = enter_critical_section();
@@ -985,7 +985,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
#endif
{
leave_critical_section(flags);
- i2cdbg("ERROR: Unsupported bus: TWI%d\n", bus);
+ i2cerr("ERROR: Unsupported bus: TWI%d\n", bus);
return NULL;
}
@@ -1029,7 +1029,7 @@ int sam_i2cbus_uninitialize(FAR struct i2c_master_s * dev)
{
struct twi_dev_s *priv = (struct twi_dev_s *) dev;
- i2cvdbg("TWI%d Un-initializing\n", priv->twi);
+ i2cinfo("TWI%d Un-initializing\n", priv->twi);
/* Disable interrupts */
diff --git a/arch/arm/src/sam34/sam_udp.c b/arch/arm/src/sam34/sam_udp.c
index 0a74f5ba243bdaaddb41da57dc7ac2d50296e472..851b61c741ba0412a601b0d8785fe9f7d7643616 100644
--- a/arch/arm/src/sam34/sam_udp.c
+++ b/arch/arm/src/sam34/sam_udp.c
@@ -90,7 +90,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_USB
# undef CONFIG_SAM34_UDP_REGDEBUG
#endif
@@ -606,7 +606,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
#ifdef CONFIG_SAM34_UDP_REGDEBUG
static void sam_printreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
{
- lldbg("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
+ llinfo("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
}
#endif
@@ -657,7 +657,7 @@ static void sam_checkreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ llinfo("[repeats %d more times]\n", count);
}
}
@@ -732,20 +732,20 @@ static inline void sam_putreg(uint32_t regval, uint32_t regaddr)
* Name: sam_dumpep
****************************************************************************/
-#if defined(CONFIG_SAM34_UDP_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAM34_UDP_REGDEBUG) && defined(CONFIG_DEBUG_USB)
static void sam_dumpep(struct sam_usbdev_s *priv, uint8_t epno)
{
/* Global Registers */
- lldbg("Global Registers:\n");
- lldbg(" FRMNUM: %08x\n", sam_getreg(SAM_UDP_FRMNUM));
- lldbg("GLBSTAT: %08x\n", sam_getreg(SAM_UDP_GLBSTAT));
- lldbg(" FADDR: %08x\n", sam_getreg(SAM_UDP_FADDR));
- lldbg(" IMR: %08x\n", sam_getreg(SAM_UDP_IMR));
- lldbg(" ISR: %08x\n", sam_getreg(SAM_UDP_ISR));
- lldbg(" RSTEP: %08x\n", sam_getreg(SAM_UDP_RSTEP));
- lldbg(" TXVC: %08x\n", sam_getreg(SAM_UDP_TXVC));
- lldbg(" CSR[%d]: %08x\n", epno, sam_getreg(SAM_UDPEP_CSR(epno)));
+ llinfo("Global Registers:\n");
+ llinfo(" FRMNUM: %08x\n", sam_getreg(SAM_UDP_FRMNUM));
+ llinfo("GLBSTAT: %08x\n", sam_getreg(SAM_UDP_GLBSTAT));
+ llinfo(" FADDR: %08x\n", sam_getreg(SAM_UDP_FADDR));
+ llinfo(" IMR: %08x\n", sam_getreg(SAM_UDP_IMR));
+ llinfo(" ISR: %08x\n", sam_getreg(SAM_UDP_ISR));
+ llinfo(" RSTEP: %08x\n", sam_getreg(SAM_UDP_RSTEP));
+ llinfo(" TXVC: %08x\n", sam_getreg(SAM_UDP_TXVC));
+ llinfo(" CSR[%d]: %08x\n", epno, sam_getreg(SAM_UDPEP_CSR(epno)));
}
#endif
@@ -968,7 +968,7 @@ static int sam_req_write(struct sam_usbdev_s *priv, struct sam_ep_s *privep)
return -ENOENT;
}
- ullvdbg("epno=%d req=%p: len=%d xfrd=%d inflight=%d zlpneeded=%d\n",
+ ullinfo("epno=%d req=%p: len=%d xfrd=%d inflight=%d zlpneeded=%d\n",
epno, privreq, privreq->req.len, privreq->req.xfrd,
privreq->inflight, privep->zlpneeded);
@@ -1139,7 +1139,7 @@ static int sam_req_read(struct sam_usbdev_s *priv, struct sam_ep_s *privep,
return -ENOENT;
}
- ullvdbg("EP%d: len=%d xfrd=%d\n",
+ ullinfo("EP%d: len=%d xfrd=%d\n",
epno, privreq->req.len, privreq->req.xfrd);
/* Ignore any attempt to receive a zero length packet */
@@ -1408,7 +1408,7 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
index.w = GETUINT16(priv->ctrl.index);
len.w = GETUINT16(priv->ctrl.len);
- ullvdbg("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
/* Dispatch any non-standard requests */
@@ -1572,7 +1572,7 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
{
/* Special case recipient=device test mode */
- ullvdbg("test mode: %d\n", index.w);
+ ullinfo("test mode: %d\n", index.w);
}
else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
{
@@ -2749,7 +2749,7 @@ static int sam_ep_configure_internal(struct sam_ep_s *privep,
DEBUGASSERT(privep && privep->dev && desc);
- uvdbg("len: %02x type: %02x addr: %02x attr: %02x "
+ uinfo("len: %02x type: %02x addr: %02x attr: %02x "
"maxpacketsize: %02x %02x interval: %02x\n",
desc->len, desc->type, desc->addr, desc->attr,
desc->mxpacketsize[0], desc->mxpacketsize[1],
@@ -2891,7 +2891,7 @@ static int sam_ep_configure(struct usbdev_ep_s *ep,
/* Verify parameters. Endpoint 0 is not available at this interface */
-#if defined(CONFIG_DEBUG) || defined(CONFIG_USBDEV_TRACE)
+#if defined(CONFIG_DEBUG_USB) || defined(CONFIG_USBDEV_TRACE)
uint8_t epno = USB_EPNO(desc->addr);
usbtrace(TRACE_EPCONFIGURE, (uint16_t)epno);
@@ -2942,11 +2942,11 @@ static int sam_ep_disable(struct usbdev_ep_s *ep)
irqstate_t flags;
uint8_t epno;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
- ulldbg("ERROR: ep=%p\n", ep);
+ ullerr("ERROR: ep=%p\n", ep);
return -EINVAL;
}
#endif
@@ -2979,13 +2979,14 @@ static struct usbdev_req_s *sam_ep_allocreq(struct usbdev_ep_s *ep)
{
struct sam_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
return NULL;
}
#endif
+
usbtrace(TRACE_EPALLOCREQ, USB_EPNO(ep->eplog));
privreq = (struct sam_req_s *)kmm_malloc(sizeof(struct sam_req_s));
@@ -3011,7 +3012,7 @@ static void sam_ep_freereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
{
struct sam_req_s *privreq = (struct sam_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3074,11 +3075,11 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
uint8_t epno;
int ret = OK;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
- ulldbg("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+ ullerr("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
@@ -3086,11 +3087,11 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
usbtrace(TRACE_EPSUBMIT, USB_EPNO(ep->eplog));
priv = privep->dev;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!priv->driver)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
- ulldbg("ERROR: driver=%p\n", priv->driver);
+ ullerr("ERROR: driver=%p\n", priv->driver);
return -ESHUTDOWN;
}
#endif
@@ -3118,7 +3119,7 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
* "pending" they will get queue until the stall is cleared.
*/
- ulldbg("Pending stall clear\n");
+ ullerr("Pending stall clear\n");
sam_req_enqueue(&privep->pendq, privreq);
usbtrace(TRACE_INREQQUEUED(epno), req->len);
ret = OK;
@@ -3182,13 +3183,14 @@ static int sam_ep_cancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
struct sam_ep_s *privep = (struct sam_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
return -EINVAL;
}
#endif
+
usbtrace(TRACE_EPCANCEL, USB_EPNO(ep->eplog));
flags = enter_critical_section();
@@ -3208,7 +3210,7 @@ static int sam_ep_stallresume(struct usbdev_ep_s *ep, bool resume)
irqstate_t flags;
int ret;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3283,7 +3285,8 @@ static struct usbdev_ep_s *sam_allocep(struct usbdev_s *dev, uint8_t epno,
uint16_t epset = SAM_EPSET_NOTEP0;
usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno);
-#ifdef CONFIG_DEBUG
+
+#ifdef CONFIG_DEBUG_USB
if (!dev)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3345,13 +3348,14 @@ static void sam_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep)
struct sam_usbdev_s *priv;
struct sam_ep_s *privep;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!dev || !ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
return;
}
#endif
+
priv = (struct sam_usbdev_s *)dev;
privep = (struct sam_ep_s *)ep;
usbtrace(TRACE_DEVFREEEP, (uint16_t)USB_EPNO(ep->eplog));
@@ -3377,7 +3381,7 @@ static int sam_getframe(struct usbdev_s *dev)
uint32_t regval;
uint16_t frameno;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!dev)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3409,7 +3413,8 @@ static int sam_wakeup(struct usbdev_s *dev)
uint32_t regval;
usbtrace(TRACE_DEVWAKEUP, 0);
-#ifdef CONFIG_DEBUG
+
+#ifdef CONFIG_DEBUG_USB
if (!dev)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3480,7 +3485,7 @@ static int sam_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!dev)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3926,7 +3931,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@@ -4000,7 +4005,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_USB
if (driver != priv->driver)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/sam34/sam_wdt.c b/arch/arm/src/sam34/sam_wdt.c
index dbb3f6f895ec5136cc1aa17dea21a364840dc9da..8fc5abf70c9d7b67e8939c383a1985d91f1610a6 100644
--- a/arch/arm/src/sam34/sam_wdt.c
+++ b/arch/arm/src/sam34/sam_wdt.c
@@ -83,16 +83,16 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the watchdog
- * driver. NOTE: that only lldbg types are used so that the output is
+ * driver. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_WATCHDOG
-# define wddbg lldbg
-# define wdvdbg llvdbg
+# define wderr llerr
+# define wdinfo llinfo
#else
-# define wddbg(x...)
-# define wdvdbg(x...)
+# define wderr(x...)
+# define wdinfo(x...)
#endif
/****************************************************************************
@@ -118,7 +118,7 @@ struct sam34_lowerhalf_s
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_SAM34_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAM34_WDT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t sam34_getreg(uint32_t addr);
static void sam34_putreg(uint32_t val, uint32_t addr);
#else
@@ -176,7 +176,7 @@ static struct sam34_lowerhalf_s g_wdgdev;
*
****************************************************************************/
-#if defined(CONFIG_SAM34_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAM34_WDT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t sam34_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -197,7 +197,7 @@ static uint32_t sam34_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -214,7 +214,7 @@ static uint32_t sam34_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -226,7 +226,7 @@ static uint32_t sam34_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@@ -239,12 +239,12 @@ static uint32_t sam34_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_SAM34_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAM34_WDT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void sam34_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, val);
+ llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@@ -314,7 +314,7 @@ static int sam34_start(FAR struct watchdog_lowerhalf_s *lower)
FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
uint32_t mr_val = 0;
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
DEBUGASSERT(priv);
/* The watchdog is always disabled after a reset. It is enabled by setting
@@ -360,7 +360,7 @@ static int sam34_stop(FAR struct watchdog_lowerhalf_s *lower)
* except by a reset.
*/
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
return -ENOSYS;
}
@@ -386,7 +386,7 @@ static int sam34_stop(FAR struct watchdog_lowerhalf_s *lower)
static int sam34_keepalive(FAR struct watchdog_lowerhalf_s *lower)
{
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
sam34_putreg((WDT_CR_KEY | WDT_CR_WDRSTT), SAM_WDT_CR);
return OK;
@@ -414,7 +414,7 @@ static int sam34_getstatus(FAR struct watchdog_lowerhalf_s *lower,
FAR struct sam34_lowerhalf_s *priv = (FAR struct sam34_lowerhalf_s *)lower;
uint32_t elapsed;
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
DEBUGASSERT(priv);
/* Return the status bit */
@@ -441,10 +441,10 @@ static int sam34_getstatus(FAR struct watchdog_lowerhalf_s *lower,
status->timeleft = (priv->timeout * elapsed) / (priv->reload + 1);
- wdvdbg("Status : %08x\n", sam34_getreg(SAM_WDT_SR));
- wdvdbg(" flags : %08x\n", status->flags);
- wdvdbg(" timeout : %d\n", status->timeout);
- wdvdbg(" timeleft : %d\n", status->timeleft);
+ wdinfo("Status : %08x\n", sam34_getreg(SAM_WDT_SR));
+ wdinfo(" flags : %08x\n", status->flags);
+ wdinfo(" timeout : %d\n", status->timeout);
+ wdinfo(" timeleft : %d\n", status->timeleft);
return OK;
}
@@ -471,13 +471,13 @@ static int sam34_settimeout(FAR struct watchdog_lowerhalf_s *lower,
uint32_t reload;
DEBUGASSERT(priv);
- wdvdbg("Entry: timeout=%d\n", timeout);
+ wdinfo("Entry: timeout=%d\n", timeout);
/* Can this timeout be represented? */
if (timeout < 1 || timeout > WDT_MAXTIMEOUT)
{
- wddbg("Cannot represent timeout=%d > %d\n",
+ wderr("Cannot represent timeout=%d > %d\n",
timeout, WDT_MAXTIMEOUT);
return -ERANGE;
}
@@ -503,7 +503,7 @@ static int sam34_settimeout(FAR struct watchdog_lowerhalf_s *lower,
priv->reload = reload;
- wdvdbg("fwdt=%d reload=%d timout=%d\n",
+ wdinfo("fwdt=%d reload=%d timout=%d\n",
WDT_FCLK, reload, priv->timeout);
/* Don't commit to MR register until started! */
@@ -543,7 +543,7 @@ static xcpt_t sam34_capture(FAR struct watchdog_lowerhalf_s *lower,
uint16_t regval;
DEBUGASSERT(priv);
- wdvdbg("Entry: handler=%p\n", handler);
+ wdinfo("Entry: handler=%p\n", handler);
/* Get the old handler return value */
@@ -611,7 +611,7 @@ static int sam34_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
int ret = -ENOTTY;
DEBUGASSERT(priv);
- wdvdbg("Entry: cmd=%d arg=%ld\n", cmd, arg);
+ wdinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
/* WDIOC_MINTIME: Set the minimum ping time. If two keepalive ioctls
* are received within this time, a reset event will be generated.
@@ -676,7 +676,7 @@ void sam_wdtinitialize(FAR const char *devpath)
WDT_MR_WDRSTEN);
sam34_putreg(mr_val, SAM_WDT_MR);
- wdvdbg("Entry: devpath=%s\n", devpath);
+ wdinfo("Entry: devpath=%s\n", devpath);
/* NOTE we assume that clocking to the IWDG has already been provided by
* the RCC initialization logic.
diff --git a/arch/arm/src/sama5/Kconfig b/arch/arm/src/sama5/Kconfig
index b2701131bc292e0907c39aac351af9aa5d87d5c3..19ffbf035254c042c50ab7dcd267609082a52a86 100644
--- a/arch/arm/src/sama5/Kconfig
+++ b/arch/arm/src/sama5/Kconfig
@@ -1393,9 +1393,9 @@ endif # SAMA5_LCDC_HCR
config SAMA5_LCDC_REGDEBUG
bool "Register-Level Debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
- Enable very low-level register access debug. Depends on DEBUG.
+ Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES.
endmenu # LCDC configuration
endif # SAMA5_LCDC
@@ -1499,9 +1499,9 @@ endif # !SAMA5_GMAC_AUTONEG
config SAMA5_GMAC_REGDEBUG
bool "Register-Level Debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
- Enable very low-level register access debug. Depends on DEBUG.
+ Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES.
endmenu # GMAC device driver options
endif # SAMA5_GMAC
@@ -1678,9 +1678,9 @@ config SAMA5_EMACA_NBC
config SAMA5_EMACA_REGDEBUG
bool "Register-Level Debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
- Enable very low-level register access debug. Depends on DEBUG.
+ Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES.
endmenu # EMAC device driver options
endif # SAMA5_EMACA
@@ -2076,7 +2076,7 @@ config SAMA5_EMACB_NBC
config SAMA5_EMACB_DEBUG
bool "Force EMAC0/1 DEBUG"
default n
- depends on DEBUG && !DEBUG_NET
+ depends on DEBUG_FEATURES && !DEBUG_NET
---help---
This option will force debug output from EMAC driver even without
network debug output enabled. This is not normally something
@@ -2087,9 +2087,9 @@ config SAMA5_EMACB_DEBUG
config SAMA5_EMACB_REGDEBUG
bool "Register-Level Debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
- Enable very low-level register access debug. Depends on DEBUG.
+ Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES.
endmenu # EMAC device driver options
endif # SAMA5_EMACB
@@ -2323,11 +2323,11 @@ config SAMA5_CAN_AUTOBAUD
config SAMA5_CAN_REGDEBUG
bool "CAN Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level CAN device debug information.
- Requires also DEBUG.
+ Requires also CONFIG_DEBUG_FEATURES.
endmenu # CAN device driver options
endif # SAMA5_CAN0 || SAMA5_CAN1
@@ -2354,7 +2354,7 @@ config SAMA5_SPI_DMATHRESHOLD
config SAMA5_SPI_DMADEBUG
bool "SPI DMA transfer debug"
- depends on SAMA5_SPI_DMA && DEBUG && DEBUG_DMA
+ depends on SAMA5_SPI_DMA && DEBUG_FEATURES && DEBUG_DMA
default n
---help---
Enable special debug instrumentation analyze SPI DMA data transfers.
@@ -2364,11 +2364,11 @@ config SAMA5_SPI_DMADEBUG
config SAMA5_SPI_REGDEBUG
bool "SPI Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level SPI device debug information.
- Requires also DEBUG.
+ Requires also CONFIG_DEBUG_FEATURES.
endmenu # SPI device driver options
endif # SAMA5_SPI0 || SAMA5_SPI1
@@ -2399,11 +2399,11 @@ config SAMA5_TWI3_FREQUENCY
config SAMA5_TWI_REGDEBUG
bool "TWI register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level TWI device debug information.
- Very invasive! Requires also DEBUG.
+ Very invasive! Requires also CONFIG_DEBUG_FEATURES.
endmenu # TWI device driver options
endif # SAMA5_TWI0 || SAMA5_TWI1 || SAMA5_TWI2 || SAMA5_TWI3
@@ -2766,7 +2766,7 @@ endif # SAMA5_SSC1
config SAMA5_SSC_DMADEBUG
bool "SSC DMA transfer debug"
- depends on DEBUG && DEBUG_DMA
+ depends on DEBUG_FEATURES && DEBUG_DMA
default n
---help---
Enable special debug instrumentation analyze SSC DMA data transfers.
@@ -2776,11 +2776,11 @@ config SAMA5_SSC_DMADEBUG
config SAMA5_SSC_REGDEBUG
bool "SSC Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level SSC device debug information.
- Very invasive! Requires also DEBUG.
+ Very invasive! Requires also CONFIG_DEBUG_FEATURES.
config SAMA5_SSC_QDEBUG
bool "SSC Queue debug"
@@ -2857,7 +2857,7 @@ config SAMA5_HSMCI_WRPROOF
config SAMA5_HSMCI_XFRDEBUG
bool "HSMCI transfer debug"
- depends on DEBUG_FS && DEBUG_VERBOSE
+ depends on DEBUG_FS && CONFIG_DEBUG_INFO
default n
---help---
Enable special debug instrumentation analyze HSMCI data transfers.
@@ -2865,11 +2865,11 @@ config SAMA5_HSMCI_XFRDEBUG
registers at key points in the data transfer and then dumps all of
the registers at the end of the transfer. If DEBUG_DMA is also
enabled, then DMA register will be collected as well. Requires also
- DEBUG_FS and DEBUG_VERBOSE.
+ DEBUG_FS and CONFIG_DEBUG_INFO.
config SAMA5_HSMCI_CMDDEBUG
bool "HSMCI command debug"
- depends on DEBUG_FS && DEBUG_VERBOSE
+ depends on DEBUG_FS && CONFIG_DEBUG_INFO
default n
---help---
Enable special debug instrumentation analyze HSMCI commands. This
@@ -2877,15 +2877,15 @@ config SAMA5_HSMCI_CMDDEBUG
key points in the data transfer and then dumps all of the registers
at the end of the transfer. If DEBUG_DMA is also enabled, then DMA
register will be collected as well. Requires also DEBUG_FS and
- DEBUG_VERBOSE.
+ CONFIG_DEBUG_INFO.
config SAMA5_HSMCI_REGDEBUG
bool "HSMCI Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level HSCMI device debug information.
- Very invasive! Requires also DEBUG.
+ Very invasive! Requires also CONFIG_DEBUG_FEATURES.
endmenu # HSMCI device driver options
endif # SAMA5_HSMCI0 || SAMA5_HSMCI1 || SAMA5_HSMCI2
@@ -2920,7 +2920,7 @@ config SAMA5_UDPHS_PREALLOCATE
config SAMA5_UDPHS_REGDEBUG
bool "Enable low-level UDPHS register debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
endmenu # USB High Speed Device Controller driver (DCD) options
endif # SAMA5_UDPHS
@@ -2960,7 +2960,7 @@ config SAMA5_OHCI_TDBUFSIZE
config SAMA5_OHCI_REGDEBUG
bool "Enable low-level OHCI register debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
endif # SAMA5_OHCI
@@ -3009,7 +3009,7 @@ config SAMA5_EHCI_PREALLOCATE
config SAMA5_EHCI_REGDEBUG
bool "Enable low-level EHCI register debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
endif # SAMA5_EHCI
@@ -3661,7 +3661,7 @@ endif # SAMA5_ADC_HAVE_CHAN
config SAMA5_ADC_REGDEBUG
bool "Enable register-level ADC/touchscreen debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
Enable very low register-level debug output.
@@ -3903,23 +3903,23 @@ endif
config SAMA5_TC_DEBUG
bool "TC debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output high level Timer/Counter device debug information.
- Requires also DEBUG. If this option AND DEBUG_VERBOSE are
+ Requires also CONFIG_DEBUG_FEATURES. If this option AND CONFIG_DEBUG_INFO are
enabled, then the system will be overwhelmed the timer debug
- output. If DEBUG_VERBOSE is disabled, then debug output will
+ output. If CONFIG_DEBUG_INFO is disabled, then debug output will
only indicate if/when timer-related errors occur. This
latter mode is completely usable.
config SAMA5_TC_REGDEBUG
bool "TC register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level Timer/Counter device debug
- information. Very invasive! Requires also DEBUG.
+ information. Very invasive! Requires also CONFIG_DEBUG_FEATURES.
endmenu # Timer/counter Configuration
endif # SAMA5_HAVE_TC
@@ -4150,7 +4150,7 @@ endif # SAMA5_PWM_CHAN3
config SAMA5_PWM_REGDEBUG
bool "Enable register-level PWM debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
Enable very low register-level debug output.
@@ -4171,8 +4171,8 @@ config SAMA5_WDT_INTERRUPT
config SAMA5_WDT_DEBUGHALT
bool "Halt on DEBUG"
- default y if DEBUG
- default n if !DEBUG
+ default y if DEBUG_FEATURES
+ default n if !DEBUG_FEATURES
---help---
Halt the watchdog timer in the debug state
@@ -4185,7 +4185,7 @@ config SAMA5_WDT_IDLEHALT
config SAMA5_WDT_REGDEBUG
bool "Register level debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
Enable low-level register debug output
@@ -4688,7 +4688,7 @@ endif # SAMA5_HAVE_PMECC
config SAMA5_NAND_DMADEBUG
bool "NAND DMA transfer debug"
- depends on SAMA5_NAND_DMA && DEBUG && DEBUG_DMA
+ depends on SAMA5_NAND_DMA && DEBUG_FEATURES && DEBUG_DMA
default n
---help---
Enable special debug instrumentation analyze NAND DMA data transfers.
@@ -4699,18 +4699,18 @@ config SAMA5_NAND_DMADEBUG
config SAMA5_NAND_REGDEBUG
bool "Register-Level NAND Debug"
default n
- depends on DEBUG && DEBUG_FS
+ depends on DEBUG_FEATURES && DEBUG_FS
---help---
- Enable very low-level register access debug. Depends on DEBUG and
+ Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES and
DEBUG_FS.
config SAMA5_NAND_DUMP
bool "NAND data dump"
default n
- depends on DEBUG && DEBUG_FS
+ depends on DEBUG_FEATURES && DEBUG_FS
---help---
Dump the contents of all data read and written to FLAH. Depends on
- DEBUG and DEBUG_FS.
+ CONFIG_DEBUG_FEATURES and DEBUG_FS.
endif # SAMA5_HAVE_NAND
endmenu # External Memory Configuration
diff --git a/arch/arm/src/sama5/sam_adc.c b/arch/arm/src/sama5/sam_adc.c
index 68565bc502fa80f0f5a5fc69253aac04151b7789..35bb4ea9feb5862b9d2d9aa60e54638b10289c1a 100644
--- a/arch/arm/src/sama5/sam_adc.c
+++ b/arch/arm/src/sama5/sam_adc.c
@@ -423,7 +423,7 @@ struct sam_adc_s
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_SAMA5_ADC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMA5_ADC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static bool sam_adc_checkreg(struct sam_adc_s *priv, bool wr,
uint32_t regval, uintptr_t address);
#endif
@@ -544,7 +544,7 @@ static bool sam_adc_checkreg(struct sam_adc_s *priv, bool wr,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -604,7 +604,7 @@ static void sam_adc_dmadone(void *arg)
int chan;
int i;
- avdbg("ready=%d enabled=%d\n", priv->enabled, priv->ready);
+ ainfo("ready=%d enabled=%d\n", priv->enabled, priv->ready);
ASSERT(priv != NULL && !priv->ready);
/* If the DMA transfer is not enabled, just ignore the data (and do not start
@@ -725,7 +725,7 @@ static void sam_adc_dmacallback(DMA_HANDLE handle, void *arg, int result)
struct sam_adc_s *priv = (struct sam_adc_s *)arg;
int ret;
- allvdbg("ready=%d enabled=%d\n", priv->enabled, priv->ready);
+ allinfo("ready=%d enabled=%d\n", priv->enabled, priv->ready);
DEBUGASSERT(priv->ready);
/* Check of the bottom half is keeping up with us.
@@ -751,7 +751,7 @@ static void sam_adc_dmacallback(DMA_HANDLE handle, void *arg, int result)
ret = work_queue(HPWORK, &priv->work, sam_adc_dmadone, priv, 0);
if (ret != 0)
{
- alldbg("ERROR: Failed to queue work: %d\n", ret);
+ allerr("ERROR: Failed to queue work: %d\n", ret);
}
}
@@ -798,7 +798,7 @@ static int sam_adc_dmasetup(FAR struct sam_adc_s *priv, FAR uint8_t *buffer,
uint32_t paddr;
uint32_t maddr;
- avdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+ ainfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
DEBUGASSERT(((uint32_t)buffer & 3) == 0);
@@ -849,7 +849,7 @@ static void sam_adc_endconversion(void *arg)
int chan;
ASSERT(priv != NULL);
- avdbg("pending=%08x\n", priv->pending);
+ ainfo("pending=%08x\n", priv->pending);
/* Get the set of unmasked, pending ADC interrupts */
@@ -957,7 +957,7 @@ static int sam_adc_interrupt(int irq, void *context)
ret = work_queue(HPWORK, &priv->work, sam_adc_endconversion, priv, 0);
if (ret != 0)
{
- alldbg("ERROR: Failed to queue work: %d\n", ret);
+ allerr("ERROR: Failed to queue work: %d\n", ret);
}
pending &= ~ADC_INT_EOCALL;
@@ -1011,7 +1011,7 @@ static void sam_adc_reset(struct adc_dev_s *dev)
#endif
uint32_t regval;
- avdbg("Resetting..\n");
+ ainfo("Resetting..\n");
/* NOTE: We can't really reset the ADC hardware without losing the
* touchscreen configuration.
@@ -1081,7 +1081,7 @@ static int sam_adc_setup(struct adc_dev_s *dev)
struct sam_adc_s *priv = (struct sam_adc_s *)dev->ad_priv;
uint32_t regval;
- avdbg("Setup\n");
+ ainfo("Setup\n");
/* Enable channel number tag. This bit will force the channel number (CHNB)
* to be included in the LDCR register content.
@@ -1152,7 +1152,7 @@ static void sam_adc_shutdown(struct adc_dev_s *dev)
struct sam_adc_s *priv = (struct sam_adc_s *)dev->ad_priv;
#endif
- avdbg("Shutdown\n");
+ ainfo("Shutdown\n");
/* Reset the ADC peripheral */
@@ -1181,7 +1181,7 @@ static void sam_adc_rxint(struct adc_dev_s *dev, bool enable)
struct sam_adc_s *priv = (struct sam_adc_s *)dev->ad_priv;
#endif
- avdbg("enable=%d\n", enable);
+ ainfo("enable=%d\n", enable);
#ifdef CONFIG_SAMA5_ADC_DMA
/* Ignore redundant requests */
@@ -1232,7 +1232,7 @@ static int sam_adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg)
#endif
int ret = OK;
- avdbg("cmd=%d arg=%ld\n", cmd, arg);
+ ainfo("cmd=%d arg=%ld\n", cmd, arg);
switch (cmd)
{
@@ -1277,7 +1277,7 @@ static int sam_adc_settimer(struct sam_adc_s *priv, uint32_t frequency,
uint32_t regval;
int ret;
- avdbg("frequency=%ld channel=%d\n", (long)frequency, channel);
+ ainfo("frequency=%ld channel=%d\n", (long)frequency, channel);
DEBUGASSERT(priv && frequency > 0);
/* Configure TC for a 1Hz frequency and trigger on RC compare. */
@@ -1285,7 +1285,7 @@ static int sam_adc_settimer(struct sam_adc_s *priv, uint32_t frequency,
ret = sam_tc_divisor(frequency, &div, &tcclks);
if (ret < 0)
{
- adbg("ERROR: sam_tc_divisor failed: %d\n", ret);
+ aerr("ERROR: sam_tc_divisor failed: %d\n", ret);
return ret;
}
@@ -1304,7 +1304,7 @@ static int sam_adc_settimer(struct sam_adc_s *priv, uint32_t frequency,
priv->tc = sam_tc_allocate(channel, mode);
if (!priv->tc)
{
- adbg("ERROR: Failed to allocate channel %d mode %08x\n", channel, mode);
+ aerr("ERROR: Failed to allocate channel %d mode %08x\n", channel, mode);
return -EINVAL;
}
@@ -1350,7 +1350,7 @@ static void sam_adc_freetimer(struct sam_adc_s *priv)
{
/* Is a timer allocated? */
- avdbg("tc=%p\n", priv->tc);
+ ainfo("tc=%p\n", priv->tc);
if (priv->tc)
{
@@ -1377,7 +1377,7 @@ static int sam_adc_trigger(struct sam_adc_s *priv)
int ret = OK;
#if defined(CONFIG_SAMA5_ADC_SWTRIG)
- avdbg("Setup software trigger\n");
+ ainfo("Setup software trigger\n");
/* Configure the software trigger */
@@ -1393,7 +1393,7 @@ static int sam_adc_trigger(struct sam_adc_s *priv)
sam_adc_putreg(priv, SAM_ADC_TRGR, regval);
#elif defined(CONFIG_SAMA5_ADC_ADTRG)
- avdbg("Setup ADTRG trigger\n");
+ ainfo("Setup ADTRG trigger\n");
/* Configure the trigger via the external ADTRG signal */
@@ -1420,7 +1420,7 @@ static int sam_adc_trigger(struct sam_adc_s *priv)
sam_adc_putreg(priv, SAM_ADC_TRGR, regval);
#elif defined(CONFIG_SAMA5_ADC_TIOATRIG)
- avdbg("Setup timer/counter trigger\n");
+ ainfo("Setup timer/counter trigger\n");
/* Start the timer */
@@ -1436,7 +1436,7 @@ static int sam_adc_trigger(struct sam_adc_s *priv)
#endif
if (ret < 0)
{
- adbg("ERROR: sam_adc_settimer failed: %d\n", ret);
+ aerr("ERROR: sam_adc_settimer failed: %d\n", ret);
return ret;
}
@@ -1500,7 +1500,7 @@ static void sam_adc_autocalibrate(struct sam_adc_s *priv)
#ifdef CONFIG_SAMA5_ADC_AUTOCALIB
uint32_t regval;
- avdbg("Entry\n");
+ ainfo("Entry\n");
/* Launch an automatic calibration of the ADC cell on next sequence */
@@ -1527,7 +1527,7 @@ static void sam_adc_offset(struct sam_adc_s *priv)
{
uint32_t regval = 0;
- avdbg("Entry\n");
+ ainfo("Entry\n");
#ifdef CONFIG_SAMA5_ADC_ANARCH
/* Set the offset for each enabled channel. This centers the analog signal
@@ -1644,7 +1644,7 @@ static void sam_adc_gain(struct sam_adc_s *priv)
#ifdef CONFIG_SAMA5_ADC_ANARCH
uint32_t regval;
- avdbg("Entry\n");
+ ainfo("Entry\n");
/* Set the gain for each enabled channel */
@@ -1690,7 +1690,7 @@ static void sam_adc_gain(struct sam_adc_s *priv)
sam_adc_putreg(priv, SAM_ADC_CGR, regval);
#else
- avdbg("Gain=%d\n", CONFIG_SAMA5_ADC_GAIN);
+ ainfo("Gain=%d\n", CONFIG_SAMA5_ADC_GAIN);
/* Set GAIN0 only. GAIN0 will be used for all channels. */
@@ -1711,7 +1711,7 @@ static void sam_adc_analogchange(struct sam_adc_s *priv)
{
uint32_t regval;
- avdbg("Entry\n");
+ ainfo("Entry\n");
/* Enable/disable the analog change feature */
@@ -1754,7 +1754,7 @@ static void sam_adc_setseqr(int chan, uint32_t *seqr1, uint32_t *seqr2, int seq)
*seqr1 |= ADC_SEQR1_USCH(seq, chan);
}
- avdbg("chan=%d seqr1=%08x seqr2=%08x seq=%d\n", chan, *seqr1, *seqr2, seq);
+ ainfo("chan=%d seqr1=%08x seqr2=%08x seq=%d\n", chan, *seqr1, *seqr2, seq);
}
#endif
@@ -1766,7 +1766,7 @@ static void sam_adc_sequencer(struct sam_adc_s *priv)
uint32_t seqr2;
int seq;
- avdbg("Setup sequencer\n");
+ ainfo("Setup sequencer\n");
/* Set user configured channel sequence */
@@ -1855,7 +1855,7 @@ static void sam_adc_sequencer(struct sam_adc_s *priv)
#else
uint32_t regval;
- avdbg("Disable sequencer\n");
+ ainfo("Disable sequencer\n");
/* Disable the sequencer */
@@ -1878,7 +1878,7 @@ static void sam_adc_channels(struct sam_adc_s *priv)
{
uint32_t regval;
- avdbg("Entry\n");
+ ainfo("Entry\n");
/* Enable channels. */
@@ -1964,7 +1964,7 @@ struct adc_dev_s *sam_adc_initialize(void)
if (!priv->initialized)
{
- avdbg("Initializing...\n");
+ ainfo("Initializing...\n");
/* Disable ADC peripheral clock */
@@ -2056,7 +2056,7 @@ struct adc_dev_s *sam_adc_initialize(void)
}
else
{
- adbg("ERROR: Cannot realize ADC input frequency\n");
+ aerr("ERROR: Cannot realize ADC input frequency\n");
return NULL;
}
@@ -2108,7 +2108,7 @@ struct adc_dev_s *sam_adc_initialize(void)
ret = irq_attach(SAM_IRQ_ADC, sam_adc_interrupt);
if (ret < 0)
{
- adbg("ERROR: Failed to attach IRQ %d: %d\n", SAM_IRQ_ADC, ret);
+ aerr("ERROR: Failed to attach IRQ %d: %d\n", SAM_IRQ_ADC, ret);
return NULL;
}
@@ -2127,7 +2127,7 @@ struct adc_dev_s *sam_adc_initialize(void)
/* Return a pointer to the device structure */
- avdbg("Returning %p\n", &g_adcdev);
+ ainfo("Returning %p\n", &g_adcdev);
return &g_adcdev;
}
@@ -2143,7 +2143,7 @@ void sam_adc_lock(FAR struct sam_adc_s *priv)
{
int ret;
- avdbg("Locking\n");
+ ainfo("Locking\n");
do
{
@@ -2168,7 +2168,7 @@ void sam_adc_lock(FAR struct sam_adc_s *priv)
void sam_adc_unlock(FAR struct sam_adc_s *priv)
{
- avdbg("Unlocking\n");
+ ainfo("Unlocking\n");
sem_post(&priv->exclsem);
}
@@ -2187,7 +2187,7 @@ uint32_t sam_adc_getreg(struct sam_adc_s *priv, uintptr_t address)
if (sam_adc_checkreg(priv, false, regval, address))
{
- lldbg("%08x->%08x\n", address, regval);
+ llerr("%08x->%08x\n", address, regval);
}
return regval;
@@ -2207,7 +2207,7 @@ void sam_adc_putreg(struct sam_adc_s *priv, uintptr_t address, uint32_t regval)
{
if (sam_adc_checkreg(priv, true, regval, address))
{
- lldbg("%08x<-%08x\n", address, regval);
+ llerr("%08x<-%08x\n", address, regval);
}
putreg32(regval, address);
diff --git a/arch/arm/src/sama5/sam_adc.h b/arch/arm/src/sama5/sam_adc.h
index f8ba29f157636ed0913b530aca1cf3c069bd6d32..f84a45a65d027e675a4b59417c1d83d04c090b51 100644
--- a/arch/arm/src/sama5/sam_adc.h
+++ b/arch/arm/src/sama5/sam_adc.h
@@ -57,7 +57,7 @@
# error Work queue support is required (CONFIG_SCHED_WORKQUEUE)
#endif
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_SAMA5_ADC_REGDEBUG
#endif
diff --git a/arch/arm/src/sama5/sam_allocateheap.c b/arch/arm/src/sama5/sam_allocateheap.c
index 14388795f984bcd3b72bd4b7835ea6da662b7411..c666b09ce6098a31748f9793a30f07afd4ea75c5 100644
--- a/arch/arm/src/sama5/sam_allocateheap.c
+++ b/arch/arm/src/sama5/sam_allocateheap.c
@@ -312,9 +312,9 @@ void up_addregion(void)
}
else
{
- lldbg("ERROR: SDRAM memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
+ llerr("ERROR: SDRAM memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
CONFIG_MM_REGIONS);
- lldbg(" Increase the size of CONFIG_MM_NREGIONS\n");
+ llerr(" Increase the size of CONFIG_MM_NREGIONS\n");
}
#endif
@@ -331,9 +331,9 @@ void up_addregion(void)
}
else
{
- lldbg("ERROR: CS0 memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
+ llerr("ERROR: CS0 memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
CONFIG_MM_REGIONS);
- lldbg(" Increase the size of CONFIG_MM_NREGIONS\n");
+ llerr(" Increase the size of CONFIG_MM_NREGIONS\n");
}
#endif
@@ -350,9 +350,9 @@ void up_addregion(void)
}
else
{
- lldbg("ERROR: CS1 memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
+ llerr("ERROR: CS1 memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
CONFIG_MM_REGIONS);
- lldbg(" Increase the size of CONFIG_MM_NREGIONS\n");
+ llerr(" Increase the size of CONFIG_MM_NREGIONS\n");
}
#endif
@@ -369,9 +369,9 @@ void up_addregion(void)
}
else
{
- lldbg("ERROR: CS2 memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
+ llerr("ERROR: CS2 memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
CONFIG_MM_REGIONS);
- lldbg(" Increase the size of CONFIG_MM_NREGIONS\n");
+ llerr(" Increase the size of CONFIG_MM_NREGIONS\n");
}
#endif
@@ -388,9 +388,9 @@ void up_addregion(void)
}
else
{
- lldbg("ERROR: CS3 memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
+ llerr("ERROR: CS3 memory not added to heap. CONFIG_MM_NREGIONS=%d\n",
CONFIG_MM_REGIONS);
- lldbg(" Increase the size of CONFIG_MM_NREGIONS\n");
+ llerr(" Increase the size of CONFIG_MM_NREGIONS\n");
}
#endif
@@ -398,9 +398,9 @@ void up_addregion(void)
if (nregions > 0)
{
- lldbg("ERROR: Not all regions added to heap: %d added, but CONFIG_MM_NREGIONS=%d\n",
+ llerr("ERROR: Not all regions added to heap: %d added, but CONFIG_MM_NREGIONS=%d\n",
CONFIG_MM_REGIONS - nregions, CONFIG_MM_REGIONS);
- lldbg(" Decrease the size of CONFIG_MM_NREGIONS\n");
+ llerr(" Decrease the size of CONFIG_MM_NREGIONS\n");
}
}
#endif
diff --git a/arch/arm/src/sama5/sam_can.c b/arch/arm/src/sama5/sam_can.c
index ac9e93cc08a6e2474498c12ed062702e89892e1c..d563f8d0f3db9d58c2d93ada76b348371ff5d399 100644
--- a/arch/arm/src/sama5/sam_can.c
+++ b/arch/arm/src/sama5/sam_can.c
@@ -127,18 +127,18 @@
/* Non-standard debug that may be enabled just for testing CAN */
#ifdef CONFIG_DEBUG_CAN
-# define candbg dbg
-# define canvdbg vdbg
-# define canlldbg lldbg
-# define canllvdbg llvdbg
+# define canerr err
+# define caninfo info
+# define canllerr llerr
+# define canllinfo llinfo
#else
-# define candbg(x...)
-# define canvdbg(x...)
-# define canlldbg(x...)
-# define canllvdbg(x...)
+# define canerr(x...)
+# define caninfo(x...)
+# define canllerr(x...)
+# define canllinfo(x...)
#endif
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_CAN)
+#if !defined(CONFIG_DEBUG_FEATURES) || !defined(CONFIG_DEBUG_CAN)
# undef CONFIG_SAMA5_CAN_REGDEBUG
#endif
@@ -386,7 +386,7 @@ static uint32_t can_getreg(FAR struct sam_can_s *priv, int offset)
{
if (priv->count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return regval;
@@ -403,7 +403,7 @@ static uint32_t can_getreg(FAR struct sam_can_s *priv, int offset)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", priv->count - 3);
+ llerr("[repeats %d more times]\n", priv->count - 3);
}
/* Save the new address, value, and count */
@@ -415,7 +415,7 @@ static uint32_t can_getreg(FAR struct sam_can_s *priv, int offset)
/* Show the register value read */
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
return regval;
}
@@ -452,7 +452,7 @@ static void can_putreg(FAR struct sam_can_s *priv, int offset, uint32_t regval)
/* Show the register value being written */
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
/* Write the value */
@@ -489,26 +489,26 @@ static void can_dumpctrlregs(FAR struct sam_can_s *priv, FAR const char *msg)
if (msg)
{
- canlldbg("Control Registers: %s\n", msg);
+ canllerr("Control Registers: %s\n", msg);
}
else
{
- canlldbg("Control Registers:\n");
+ canllerr("Control Registers:\n");
}
/* CAN control and status registers */
- lldbg(" MR: %08x IMR: %08x SR: %08x\n",
+ llerr(" MR: %08x IMR: %08x SR: %08x\n",
getreg32(config->base + SAM_CAN_MR_OFFSET),
getreg32(config->base + SAM_CAN_IMR_OFFSET),
getreg32(config->base + SAM_CAN_SR_OFFSET));
- lldbg(" BR: %08x TIM: %08x TIMESTP: %08x\n",
+ llerr(" BR: %08x TIM: %08x TIMESTP: %08x\n",
getreg32(config->base + SAM_CAN_BR_OFFSET),
getreg32(config->base + SAM_CAN_TIM_OFFSET),
getreg32(config->base + SAM_CAN_TIMESTP_OFFSET));
- lldbg(" ECR: %08x WPMR: %08x WPSR: %08x\n",
+ llerr(" ECR: %08x WPMR: %08x WPSR: %08x\n",
getreg32(config->base + SAM_CAN_ECR_OFFSET),
getreg32(config->base + SAM_CAN_TCR_OFFSET),
getreg32(config->base + SAM_CAN_ACR_OFFSET));
@@ -538,27 +538,27 @@ static void can_dumpmbregs(FAR struct sam_can_s *priv, FAR const char *msg)
if (msg)
{
- canlldbg("Mailbox Registers: %s\n", msg);
+ canllerr("Mailbox Registers: %s\n", msg);
}
else
{
- canlldbg("Mailbox Registers:\n");
+ canllerr("Mailbox Registers:\n");
}
for (i = 0; i < SAM_CAN_NMAILBOXES; i++)
{
mbbase = config->base + SAM_CAN_MBn_OFFSET(i);
- lldbg(" MB%d:\n", i);
+ llerr(" MB%d:\n", i);
/* CAN mailbox registers */
- lldbg(" MMR: %08x MAM: %08x MID: %08x MFID: %08x\n",
+ llerr(" MMR: %08x MAM: %08x MID: %08x MFID: %08x\n",
getreg32(mbbase + SAM_CAN_MMR_OFFSET),
getreg32(mbbase + SAM_CAN_MAM_OFFSET),
getreg32(mbbase + SAM_CAN_MID_OFFSET),
getreg32(mbbase + SAM_CAN_MFID_OFFSET));
- lldbg(" MSR: %08x MDL: %08x MDH: %08x\n",
+ llerr(" MSR: %08x MDL: %08x MDH: %08x\n",
getreg32(mbbase + SAM_CAN_MSR_OFFSET),
getreg32(mbbase + SAM_CAN_MDL_OFFSET),
getreg32(mbbase + SAM_CAN_MDH_OFFSET));
@@ -722,7 +722,7 @@ static int can_recvsetup(FAR struct sam_can_s *priv)
mbndx = can_mballoc(priv);
if (mbndx < 0)
{
- candbg("ERROR: Failed to allocate mailbox %d: %d\n", mbno, mbndx);
+ canerr("ERROR: Failed to allocate mailbox %d: %d\n", mbno, mbndx);
return mbndx;
}
@@ -730,7 +730,7 @@ static int can_recvsetup(FAR struct sam_can_s *priv)
priv->rxmbset |= (1 << mbndx);
- canvdbg("CAN%d Mailbox %d: Index=%d rxmbset=%02x\n",
+ caninfo("CAN%d Mailbox %d: Index=%d rxmbset=%02x\n",
config->port, mbno, mbndx, priv->rxmbset);
/* Set up the message ID and filter mask
@@ -798,7 +798,7 @@ static void can_reset(FAR struct can_dev_s *dev)
config = priv->config;
DEBUGASSERT(config);
- canllvdbg("CAN%d\n", config->port);
+ canllinfo("CAN%d\n", config->port);
UNUSED(config);
/* Get exclusive access to the CAN peripheral */
@@ -855,7 +855,7 @@ static int can_setup(FAR struct can_dev_s *dev)
config = priv->config;
DEBUGASSERT(config);
- canllvdbg("CAN%d pid: %d\n", config->port, config->pid);
+ canllinfo("CAN%d pid: %d\n", config->port, config->pid);
/* Get exclusive access to the CAN peripheral */
@@ -866,7 +866,7 @@ static int can_setup(FAR struct can_dev_s *dev)
ret = can_hwinitialize(priv);
if (ret < 0)
{
- canlldbg("CAN%d H/W initialization failed: %d\n", config->port, ret);
+ canllerr("CAN%d H/W initialization failed: %d\n", config->port, ret);
return ret;
}
@@ -878,7 +878,7 @@ static int can_setup(FAR struct can_dev_s *dev)
ret = irq_attach(config->pid, config->handler);
if (ret < 0)
{
- canlldbg("Failed to attach CAN%d IRQ (%d)", config->port, config->pid);
+ canllerr("Failed to attach CAN%d IRQ (%d)", config->port, config->pid);
return ret;
}
@@ -887,13 +887,13 @@ static int can_setup(FAR struct can_dev_s *dev)
ret = can_recvsetup(priv);
if (ret < 0)
{
- canlldbg("CAN%d H/W initialization failed: %d\n", config->port, ret);
+ canllerr("CAN%d H/W initialization failed: %d\n", config->port, ret);
return ret;
}
/* Enable all error interrupts */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
can_putreg(priv, SAM_CAN_IER_OFFSET, CAN_DEBUG_INTS);
#endif
@@ -933,7 +933,7 @@ static void can_shutdown(FAR struct can_dev_s *dev)
config = priv->config;
DEBUGASSERT(config);
- canllvdbg("CAN%d\n", config->port);
+ canllinfo("CAN%d\n", config->port);
/* Get exclusive access to the CAN peripheral */
@@ -972,7 +972,7 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
FAR struct sam_can_s *priv = dev->cd_priv;
DEBUGASSERT(priv && priv->config);
- canllvdbg("CAN%d enable: %d\n", priv->config->port, enable);
+ canllinfo("CAN%d enable: %d\n", priv->config->port, enable);
/* Enable/disable the mailbox interrupts from all receive mailboxes */
@@ -1005,7 +1005,7 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
FAR struct sam_can_s *priv = dev->cd_priv;
DEBUGASSERT(priv && priv->config);
- canllvdbg("CAN%d enable: %d\n", priv->config->port, enable);
+ canllinfo("CAN%d enable: %d\n", priv->config->port, enable);
/* Get exclusive access to the CAN peripheral */
@@ -1106,8 +1106,8 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
priv = dev->cd_priv;
DEBUGASSERT(priv && priv->config);
- canllvdbg("CAN%d\n", priv->config->port);
- canllvdbg("CAN%d ID: %d DLC: %d\n",
+ canllinfo("CAN%d\n", priv->config->port);
+ canllinfo("CAN%d ID: %d DLC: %d\n",
priv->config->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
/* Get exclusive access to the CAN peripheral */
@@ -1119,14 +1119,14 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
mbndx = can_mballoc(priv);
if (mbndx < 0)
{
- candbg("ERROR: CAN%d failed to allocate a mailbox: %d\n",
+ canerr("ERROR: CAN%d failed to allocate a mailbox: %d\n",
priv->config->port, mbndx);
return mbndx;
}
priv->txmbset |= (1 << mbndx);
- canvdbg("Mailbox Index=%d txmbset=%02x\n", mbndx, priv->txmbset);
+ caninfo("Mailbox Index=%d txmbset=%02x\n", mbndx, priv->txmbset);
/* Set up the ID and mask, standard 11-bit or extended 29-bit.
* REVISIT: This logic should be capable of sending standard messages
@@ -1342,7 +1342,7 @@ static inline void can_rxinterrupt(FAR struct can_dev_s *dev, int mbndx,
ret = can_receive(dev, &hdr, (FAR uint8_t *)md);
if (ret < 0)
{
- canlldbg("ERROR: can_receive failed: %d\n", ret);
+ canllerr("ERROR: can_receive failed: %d\n", ret);
}
/* Set the MTCR flag in the CAN_MCRx register. This clears the
@@ -1437,9 +1437,9 @@ static inline void can_mbinterrupt(FAR struct can_dev_s *dev, int mbndx)
case CAN_MMR_MOT_CONSUMER: /* Consumer Mailbox */
case CAN_MMR_MOT_PRODUCER: /* Producer Mailbox */
case CAN_MMR_MOT_DISABLED: /* Mailbox is disabled */
- canlldbg("ERROR: CAN%d MB%d: Unsupported or invalid mailbox type\n",
+ canllerr("ERROR: CAN%d MB%d: Unsupported or invalid mailbox type\n",
priv->config->port, mbndx);
- canlldbg(" MSR: %08x MMR: %08x\n", msr, mmr);
+ canllerr(" MSR: %08x MMR: %08x\n", msr, mmr);
break;
}
}
@@ -1530,7 +1530,7 @@ static void can_interrupt(FAR struct can_dev_s *dev)
if ((pending & ~CAN_INT_MBALL) != 0)
{
- canlldbg("ERROR: CAN%d system interrupt, SR=%08x IMR=%08x\n",
+ canllerr("ERROR: CAN%d system interrupt, SR=%08x IMR=%08x\n",
priv->config->port, sr, imr);
}
}
@@ -1708,7 +1708,7 @@ static int can_bittiming(struct sam_can_s *priv)
{
/* The BRP field must be within the range 1 - 0x7f */
- candbg("CAN%d: baud %d too high\n", config->port, config->baud);
+ canerr("CAN%d: baud %d too high\n", config->port, config->baud);
return -EINVAL;
}
@@ -1756,7 +1756,7 @@ static int can_bittiming(struct sam_can_s *priv)
if ((propag + phase1 + phase2) != (uint32_t)(tq - 4))
{
- candbg("CAN%d: Could not realize baud %d\n", config->port, config->baud);
+ canerr("CAN%d: Could not realize baud %d\n", config->port, config->baud);
return -EINVAL;
}
@@ -1788,7 +1788,7 @@ static int can_autobaud(struct sam_can_s *priv)
uint32_t regval;
int ret;
- canllvdbg("CAN%d\n", config->port);
+ canllinfo("CAN%d\n", config->port);
/* The CAN controller can start listening to the network in Autobaud Mode.
* In this case, the error counters are locked and a mailbox may be
@@ -1858,7 +1858,7 @@ static int can_hwinitialize(struct sam_can_s *priv)
uint32_t mck;
int ret;
- canllvdbg("CAN%d\n", config->port);
+ canllinfo("CAN%d\n", config->port);
/* Configure CAN pins */
@@ -1890,7 +1890,7 @@ static int can_hwinitialize(struct sam_can_s *priv)
}
else
{
- candbg("ERROR: Cannot realize CAN input frequency\n");
+ canerr("ERROR: Cannot realize CAN input frequency\n");
return -EINVAL;
}
@@ -1912,7 +1912,7 @@ static int can_hwinitialize(struct sam_can_s *priv)
ret = can_bittiming(priv);
if (ret < 0)
{
- candbg("ERROR: Failed to set bit timing: %d\n", ret);
+ canerr("ERROR: Failed to set bit timing: %d\n", ret);
return ret;
}
@@ -1922,7 +1922,7 @@ static int can_hwinitialize(struct sam_can_s *priv)
ret = can_autobaud(priv);
if (ret < 0)
{
- candbg("ERROR: can_autobaud failed: %d\n", ret);
+ canerr("ERROR: can_autobaud failed: %d\n", ret);
return ret;
}
#endif
@@ -1970,7 +1970,7 @@ FAR struct can_dev_s *sam_caninitialize(int port)
FAR struct sam_can_s *priv;
FAR const struct sam_config_s *config;
- canvdbg("CAN%d\n", port);
+ caninfo("CAN%d\n", port);
/* NOTE: Peripherical clocking for CAN0 and/or CAN1 was already provided
* by sam_clockconfig() early in the reset sequence.
@@ -1999,7 +1999,7 @@ FAR struct can_dev_s *sam_caninitialize(int port)
else
#endif
{
- candbg("ERROR: Unsupported port %d\n", port);
+ canerr("ERROR: Unsupported port %d\n", port);
return NULL;
}
diff --git a/arch/arm/src/sama5/sam_dmac.c b/arch/arm/src/sama5/sam_dmac.c
index bf3f1481684dc365848620542012ee4aac424e42..db6bad2ce6a7435bbc8954fd5463def89143a23a 100644
--- a/arch/arm/src/sama5/sam_dmac.c
+++ b/arch/arm/src/sama5/sam_dmac.c
@@ -657,7 +657,7 @@ static uint8_t sam_channel(uint8_t pid, const struct sam_pidmap_s *table,
}
}
- dmadbg("No channel found for pid %d\n", pid);
+ dmaerr("No channel found for pid %d\n", pid);
DEBUGPANIC();
return 0x3f;
}
@@ -1364,7 +1364,7 @@ sam_allocdesc(struct sam_dmach_s *dmach, struct dma_linklist_s *prev,
* Obviously setting it to zero would break that usage.
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (saddr != 0)
#endif
{
@@ -1818,7 +1818,7 @@ static int sam_dmac_interrupt(struct sam_dmac_s *dmac)
{
/* Yes... Terminate the transfer with an error? */
- dmalldbg("ERROR: DMA failed: %08x\n", regval);
+ dmallerr("ERROR: DMA failed: %08x\n", regval);
sam_dmaterminate(dmach, -EIO);
}
@@ -1920,7 +1920,7 @@ void sam_dmainitialize(struct sam_dmac_s *dmac)
void weak_function up_dmainitialize(void)
{
#ifdef CONFIG_SAMA5_DMAC0
- dmallvdbg("Initialize DMAC0\n");
+ dmallinfo("Initialize DMAC0\n");
/* Enable peripheral clock */
@@ -1940,7 +1940,7 @@ void weak_function up_dmainitialize(void)
#endif
#ifdef CONFIG_SAMA5_DMAC1
- dmallvdbg("Initialize DMAC1\n");
+ dmallinfo("Initialize DMAC1\n");
/* Enable peripheral clock */
@@ -2002,7 +2002,7 @@ DMA_HANDLE sam_dmachannel(uint8_t dmacno, uint32_t chflags)
#endif
{
- dmadbg("ERROR: Bad DMAC number: %d\n", dmacno);
+ dmaerr("ERROR: Bad DMAC number: %d\n", dmacno);
DEBUGPANIC();
return (DMA_HANDLE)NULL;
}
@@ -2046,12 +2046,12 @@ DMA_HANDLE sam_dmachannel(uint8_t dmacno, uint32_t chflags)
if (dmach)
{
- dmavdbg("DMAC%d CH%d: chflags: %08x returning dmach: %p\n",
+ dmainfo("DMAC%d CH%d: chflags: %08x returning dmach: %p\n",
(int)dmacno, dmach->chan, (int)chflags, dmach);
}
else
{
- dmadbg("ERROR: Failed allocate DMAC%d channel\n", (int)dmacno);
+ dmaerr("ERROR: Failed allocate DMAC%d channel\n", (int)dmacno);
}
return (DMA_HANDLE)dmach;
@@ -2082,13 +2082,13 @@ void sam_dmaconfig(DMA_HANDLE handle, uint32_t chflags)
dmach->flags = chflags;
#if defined(CONFIG_SAMA5_DMAC0) && defined(CONFIG_SAMA5_DMAC1)
- dmavdbg("DMAC%d CH%d: chflags: %08x\n",
+ dmainfo("DMAC%d CH%d: chflags: %08x\n",
dmach->dmac, dmach->chan, (int)chflags);
#elif defined(CONFIG_SAMA5_DMAC0)
- dmavdbg("DMAC0 CH%d: chflags: %08x\n",
+ dmainfo("DMAC0 CH%d: chflags: %08x\n",
dmach->chan, (int)chflags);
#else
- dmavdbg("DMAC1 CH%d: chflags: %08x\n",
+ dmainfo("DMAC1 CH%d: chflags: %08x\n",
dmach->chan, (int)chflags);
#endif
}
@@ -2110,7 +2110,7 @@ void sam_dmafree(DMA_HANDLE handle)
{
struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
- dmavdbg("dmach: %p\n", dmach);
+ dmainfo("dmach: %p\n", dmach);
DEBUGASSERT((dmach != NULL) && (dmach->inuse));
/* Mark the channel no longer in use. Clearing the inuse flag is an atomic
@@ -2140,10 +2140,10 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
size_t remaining;
int ret = OK;
- dmavdbg("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+ dmainfo("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
dmach, (int)paddr, (int)maddr, (int)nbytes);
DEBUGASSERT(dmach);
- dmavdbg("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
+ dmainfo("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
/* The maximum transfer size in bytes depends upon the maximum number of
* transfers and the number of bytes per transfer.
@@ -2219,10 +2219,10 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
size_t remaining;
int ret = OK;
- dmavdbg("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+ dmainfo("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
dmach, (int)paddr, (int)maddr, (int)nbytes);
DEBUGASSERT(dmach);
- dmavdbg("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
+ dmainfo("llhead: %p lltail: %p\n", dmach->llhead, dmach->lltail);
/* The maximum transfer size in bytes depends upon the maximum number of
* transfers and the number of bytes per transfer.
@@ -2294,7 +2294,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
int ret = -EINVAL;
- dmavdbg("dmach: %p callback: %p arg: %p\n", dmach, callback, arg);
+ dmainfo("dmach: %p callback: %p arg: %p\n", dmach, callback, arg);
DEBUGASSERT(dmach != NULL);
/* Verify that the DMA has been setup (i.e., at least one entry in the
@@ -2338,7 +2338,7 @@ void sam_dmastop(DMA_HANDLE handle)
struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
irqstate_t flags;
- dmavdbg("dmach: %p\n", dmach);
+ dmainfo("dmach: %p\n", dmach);
DEBUGASSERT(dmach != NULL);
flags = enter_critical_section();
@@ -2414,27 +2414,27 @@ void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
struct sam_dmac_s *dmac = sam_controller(dmach);
- dmadbg("%s\n", msg);
- dmadbg(" DMA Global Registers:\n");
- dmadbg(" GCFG[%08x]: %08x\n", dmac->base + SAM_DMAC_GCFG_OFFSET, regs->gcfg);
- dmadbg(" EN[%08x]: %08x\n", dmac->base + SAM_DMAC_EN_OFFSET, regs->en);
- dmadbg(" SREQ[%08x]: %08x\n", dmac->base + SAM_DMAC_SREQ_OFFSET, regs->sreq);
- dmadbg(" CREQ[%08x]: %08x\n", dmac->base + SAM_DMAC_CREQ_OFFSET, regs->creq);
- dmadbg(" LAST[%08x]: %08x\n", dmac->base + SAM_DMAC_LAST_OFFSET, regs->last);
- dmadbg(" EBCIMR[%08x]: %08x\n", dmac->base + SAM_DMAC_EBCIMR_OFFSET, regs->ebcimr);
- dmadbg(" EBCISR[%08x]: %08x\n", dmac->base + SAM_DMAC_EBCISR_OFFSET, regs->ebcisr);
- dmadbg(" CHSR[%08x]: %08x\n", dmac->base + SAM_DMAC_CHSR_OFFSET, regs->chsr);
- dmadbg(" WPMR[%08x]: %08x\n", dmac->base + SAM_DMAC_WPMR_OFFSET, regs->wpmr);
- dmadbg(" WPSR[%08x]: %08x\n", dmac->base + SAM_DMAC_WPSR_OFFSET, regs->wpsr);
- dmadbg(" DMA Channel Registers:\n");
- dmadbg(" SADDR[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_SADDR_OFFSET, regs->saddr);
- dmadbg(" DADDR[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_DADDR_OFFSET, regs->daddr);
- dmadbg(" DSCR[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_DSCR_OFFSET, regs->dscr);
- dmadbg(" CTRLA[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_CTRLA_OFFSET, regs->ctrla);
- dmadbg(" CTRLB[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_CTRLB_OFFSET, regs->ctrlb);
- dmadbg(" CFG[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_CFG_OFFSET, regs->cfg);
- dmadbg(" SPIP[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_SPIP_OFFSET, regs->spip);
- dmadbg(" DPIP[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_DPIP_OFFSET, regs->dpip);
+ dmaerr("%s\n", msg);
+ dmaerr(" DMA Global Registers:\n");
+ dmaerr(" GCFG[%08x]: %08x\n", dmac->base + SAM_DMAC_GCFG_OFFSET, regs->gcfg);
+ dmaerr(" EN[%08x]: %08x\n", dmac->base + SAM_DMAC_EN_OFFSET, regs->en);
+ dmaerr(" SREQ[%08x]: %08x\n", dmac->base + SAM_DMAC_SREQ_OFFSET, regs->sreq);
+ dmaerr(" CREQ[%08x]: %08x\n", dmac->base + SAM_DMAC_CREQ_OFFSET, regs->creq);
+ dmaerr(" LAST[%08x]: %08x\n", dmac->base + SAM_DMAC_LAST_OFFSET, regs->last);
+ dmaerr(" EBCIMR[%08x]: %08x\n", dmac->base + SAM_DMAC_EBCIMR_OFFSET, regs->ebcimr);
+ dmaerr(" EBCISR[%08x]: %08x\n", dmac->base + SAM_DMAC_EBCISR_OFFSET, regs->ebcisr);
+ dmaerr(" CHSR[%08x]: %08x\n", dmac->base + SAM_DMAC_CHSR_OFFSET, regs->chsr);
+ dmaerr(" WPMR[%08x]: %08x\n", dmac->base + SAM_DMAC_WPMR_OFFSET, regs->wpmr);
+ dmaerr(" WPSR[%08x]: %08x\n", dmac->base + SAM_DMAC_WPSR_OFFSET, regs->wpsr);
+ dmaerr(" DMA Channel Registers:\n");
+ dmaerr(" SADDR[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_SADDR_OFFSET, regs->saddr);
+ dmaerr(" DADDR[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_DADDR_OFFSET, regs->daddr);
+ dmaerr(" DSCR[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_DSCR_OFFSET, regs->dscr);
+ dmaerr(" CTRLA[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_CTRLA_OFFSET, regs->ctrla);
+ dmaerr(" CTRLB[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_CTRLB_OFFSET, regs->ctrlb);
+ dmaerr(" CFG[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_CFG_OFFSET, regs->cfg);
+ dmaerr(" SPIP[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_SPIP_OFFSET, regs->spip);
+ dmaerr(" DPIP[%08x]: %08x\n", dmach->base + SAM_DMAC_CH_DPIP_OFFSET, regs->dpip);
}
#endif /* CONFIG_DEBUG_DMA */
#endif /* CONFIG_SAMA5_DMAC0 || CONFIG_SAMA5_DMAC1 */
diff --git a/arch/arm/src/sama5/sam_dmac.h b/arch/arm/src/sama5/sam_dmac.h
index c9fc885369db4f1e689ebc442b2b638cf47c2a0c..b6ba92c23f1f60f55796ff8def881c5e9e5e9dd2 100644
--- a/arch/arm/src/sama5/sam_dmac.h
+++ b/arch/arm/src/sama5/sam_dmac.h
@@ -52,7 +52,7 @@
/* Configuration ********************************************************************/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_DMA
#endif
diff --git a/arch/arm/src/sama5/sam_ehci.c b/arch/arm/src/sama5/sam_ehci.c
index a6cb3d0d7aacbf46ccdd5113dbde8a7e349a461c..731290b6ab74681826777e9a2d958beb02a26e3d 100644
--- a/arch/arm/src/sama5/sam_ehci.c
+++ b/arch/arm/src/sama5/sam_ehci.c
@@ -112,7 +112,7 @@
/* Debug options */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_SAMA5_EHCI_REGDEBUG
#endif
@@ -127,13 +127,6 @@
# undef CONFIG_SAMA5_UHPHS_RHPORT1
#endif
-/* Simplify DEBUG checks */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_USB
-#endif
-
/* For now, suppress use of PORTA in any event. I use that for SAM-BA and
* would prefer that the board not try to drive VBUS on that port!
*/
@@ -635,7 +628,7 @@ static uint32_t sam_swap32(uint32_t value)
static void sam_printreg(volatile uint32_t *regaddr, uint32_t regval,
bool iswrite)
{
- lldbg("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
+ llerr("%08x%s%08x\n", (uintptr_t)regaddr, iswrite ? "<-" : "->", regval);
}
#endif
@@ -686,7 +679,7 @@ static void sam_checkreg(volatile uint32_t *regaddr, uint32_t regval, bool iswri
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ llerr("[repeats %d more times]\n", count);
}
}
@@ -1275,11 +1268,11 @@ static int sam_qh_flush(struct sam_qh_s *qh)
#ifdef CONFIG_SAMA5_EHCI_REGDEBUG
static void sam_qtd_print(struct sam_qtd_s *qtd)
{
- udbg(" QTD[%p]:\n", qtd);
- udbg(" hw:\n");
- udbg(" nqp: %08x alt: %08x token: %08x\n",
+ uerr(" QTD[%p]:\n", qtd);
+ uerr(" hw:\n");
+ uerr(" nqp: %08x alt: %08x token: %08x\n",
qtd->hw.nqp, qtd->hw.alt, qtd->hw.token);
- udbg(" bpl: %08x %08x %08x %08x %08x\n",
+ uerr(" bpl: %08x %08x %08x %08x %08x\n",
qtd->hw.bpl[0], qtd->hw.bpl[1], qtd->hw.bpl[2],
qtd->hw.bpl[3], qtd->hw.bpl[4]);
}
@@ -1299,29 +1292,29 @@ static void sam_qh_print(struct sam_qh_s *qh)
struct sam_epinfo_s *epinfo;
struct ehci_overlay_s *overlay;
- udbg("QH[%p]:\n", qh);
- udbg(" hw:\n");
- udbg(" hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
+ uerr("QH[%p]:\n", qh);
+ uerr(" hw:\n");
+ uerr(" hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
qh->hw.hlp, qh->hw.epchar, qh->hw.epcaps, qh->hw.cqp);
overlay = &qh->hw.overlay;
- udbg(" overlay:\n");
- udbg(" nqp: %08x alt: %08x token: %08x\n",
+ uerr(" overlay:\n");
+ uerr(" nqp: %08x alt: %08x token: %08x\n",
overlay->nqp, overlay->alt, overlay->token);
- udbg(" bpl: %08x %08x %08x %08x %08x\n",
+ uerr(" bpl: %08x %08x %08x %08x %08x\n",
overlay->bpl[0], overlay->bpl[1], overlay->bpl[2],
overlay->bpl[3], overlay->bpl[4]);
- udbg(" fqp:\n", qh->fqp);
+ uerr(" fqp:\n", qh->fqp);
epinfo = qh->epinfo;
- udbg(" epinfo[%p]:\n", epinfo);
+ uerr(" epinfo[%p]:\n", epinfo);
if (epinfo)
{
- udbg(" EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
+ uerr(" EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
epinfo->epno, epinfo->dirin ? "IN" : "OUT", epinfo->devaddr,
epinfo->xfrtype, epinfo->maxpacket);
- udbg(" Toggle=%d iocwait=%d speed=%d result=%d\n",
+ uerr(" Toggle=%d iocwait=%d speed=%d result=%d\n",
epinfo->toggle, epinfo->iocwait, epinfo->speed, epinfo->result);
}
}
@@ -1928,7 +1921,7 @@ static int sam_async_setup(struct sam_rhport_s *rhport,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(EHCI_VTRACE2_ASYNCXFR, epinfo->epno, buflen);
#else
- uvdbg("RHport%d EP%d: buffer=%p, buflen=%d, req=%p\n",
+ uinfo("RHport%d EP%d: buffer=%p, buflen=%d, req=%p\n",
RHPORT(rhport), epinfo->epno, buffer, buflen, req);
#endif
@@ -2206,7 +2199,7 @@ static int sam_intr_setup(struct sam_rhport_s *rhport,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(EHCI_VTRACE2_INTRXFR, epinfo->epno, buflen);
#else
- uvdbg("RHport%d EP%d: buffer=%p, buflen=%d\n",
+ uinfo("RHport%d EP%d: buffer=%p, buflen=%d\n",
RHPORT(rhport), epinfo->epno, buffer, buflen);
#endif
@@ -3187,7 +3180,7 @@ static int sam_ehci_tophalf(int irq, FAR void *context)
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace1(EHCI_VTRACE1_TOPHALF, usbsts & regval);
#else
- ullvdbg("USBSTS: %08x USBINTR: %08x\n", usbsts, regval);
+ ullinfo("USBSTS: %08x USBINTR: %08x\n", usbsts, regval);
#endif
/* Handle all unmasked interrupt sources */
@@ -3730,7 +3723,7 @@ static int sam_epalloc(FAR struct usbhost_driver_s *drvr,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(EHCI_VTRACE2_EPALLOC, epdesc->addr, epdesc->xfrtype);
#else
- uvdbg("EP%d DIR=%s FA=%08x TYPE=%d Interval=%d MaxPacket=%d\n",
+ uinfo("EP%d DIR=%s FA=%08x TYPE=%d Interval=%d MaxPacket=%d\n",
epdesc->addr, epdesc->in ? "IN" : "OUT", hport->funcaddr,
epdesc->xfrtype, epdesc->interval, epdesc->mxpacketsize);
#endif
@@ -4019,7 +4012,7 @@ static int sam_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(EHCI_VTRACE2_CTRLINOUT, RHPORT(rhport), req->req);
#else
- uvdbg("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %04x\n",
+ uinfo("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %04x\n",
RHPORT(rhport), req->type, req->req, req->value[1], req->value[0],
req->index[1], req->index[0], len);
#endif
@@ -4042,7 +4035,7 @@ static int sam_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
ret = sam_async_setup(rhport, ep0info, req, buffer, len);
if (ret < 0)
{
- udbg("ERROR: sam_async_setup failed: %d\n", ret);
+ uerr("ERROR: sam_async_setup failed: %d\n", ret);
goto errout_with_iocwait;
}
@@ -4160,7 +4153,7 @@ static ssize_t sam_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
if (ret < 0)
{
- udbg("ERROR: Transfer setup failed: %d\n", ret);
+ uerr("ERROR: Transfer setup failed: %d\n", ret);
goto errout_with_iocwait;
}
@@ -4500,7 +4493,7 @@ static int sam_connect(FAR struct usbhost_driver_s *drvr,
/* Set the connected/disconnected flag */
hport->connected = connected;
- ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+ ullinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
/* Report the connection event */
@@ -4701,7 +4694,7 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
FAR struct usbhost_hubport_s *hport;
irqstate_t flags;
uint32_t regval;
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_ASSERTIONS)
uint16_t regval16;
unsigned int nports;
#endif
@@ -4952,7 +4945,7 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
sam_putreg(EHCI_INT_ALLINTS, &HCOR->usbsts);
-#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_ASSERTIONS)
/* Show the EHCI version */
regval16 = sam_swap16(HCCR->hciversion);
diff --git a/arch/arm/src/sama5/sam_emaca.c b/arch/arm/src/sama5/sam_emaca.c
index a4f895760d18a255e7e7b64fa8a16b06f5bd72d6..86d0b5ffa1443d7a3777ceceda007e11cef5647a 100644
--- a/arch/arm/src/sama5/sam_emaca.c
+++ b/arch/arm/src/sama5/sam_emaca.c
@@ -223,7 +223,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_SAMA5_EMACA_REGDEBUG
#endif
@@ -335,7 +335,7 @@ static uint8_t g_rxbuffer[CONFIG_SAMA5_EMAC_NRXBUFFERS * EMAC_RX_UNITSIZE]
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_SAMA5_EMACA_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMA5_EMACA_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static bool sam_checkreg(struct sam_emac_s *priv, bool wr,
uint32_t regval, uintptr_t address);
static uint32_t sam_getreg(struct sam_emac_s *priv, uintptr_t addr);
@@ -390,7 +390,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg);
/* PHY Initialization */
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
static void sam_phydump(struct sam_emac_s *priv);
#else
# define sam_phydump(priv)
@@ -461,7 +461,7 @@ static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -493,7 +493,7 @@ static uint32_t sam_getreg(struct sam_emac_s *priv, uintptr_t address)
if (sam_checkreg(priv, false, regval, address))
{
- lldbg("%08x->%08x\n", address, regval);
+ llerr("%08x->%08x\n", address, regval);
}
return regval;
@@ -514,7 +514,7 @@ static void sam_putreg(struct sam_emac_s *priv, uintptr_t address,
{
if (sam_checkreg(priv, true, regval, address))
{
- lldbg("%08x<-%08x\n", address, regval);
+ llerr("%08x<-%08x\n", address, regval);
}
putreg32(regval, address);
@@ -607,7 +607,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
priv->txdesc = (struct emac_txdesc_s *)kmm_memalign(8, allocsize);
if (!priv->txdesc)
{
- nlldbg("ERROR: Failed to allocate TX descriptors\n");
+ nllerr("ERROR: Failed to allocate TX descriptors\n");
return -ENOMEM;
}
@@ -617,7 +617,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
priv->rxdesc = (struct emac_rxdesc_s *)kmm_memalign(8, allocsize);
if (!priv->rxdesc)
{
- nlldbg("ERROR: Failed to allocate RX descriptors\n");
+ nllerr("ERROR: Failed to allocate RX descriptors\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -628,7 +628,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
priv->txbuffer = (uint8_t *)kmm_memalign(8, allocsize);
if (!priv->txbuffer)
{
- nlldbg("ERROR: Failed to allocate TX buffer\n");
+ nllerr("ERROR: Failed to allocate TX buffer\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -637,7 +637,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
priv->rxbuffer = (uint8_t *)kmm_memalign(8, allocsize);
if (!priv->rxbuffer)
{
- nlldbg("ERROR: Failed to allocate RX buffer\n");
+ nllerr("ERROR: Failed to allocate RX buffer\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -725,14 +725,14 @@ static int sam_transmit(struct sam_emac_s *priv)
uint32_t regval;
uint32_t status;
- nllvdbg("d_len: %d txhead: %d\n", dev->d_len, priv->txhead);
+ nllinfo("d_len: %d txhead: %d\n", dev->d_len, priv->txhead);
sam_dumppacket("Transmit packet", dev->d_buf, dev->d_len);
/* Check parameter */
if (dev->d_len > EMAC_TX_UNITSIZE)
{
- nlldbg("ERROR: Packet too big: %d\n", dev->d_len);
+ nllerr("ERROR: Packet too big: %d\n", dev->d_len);
return -EINVAL;
}
@@ -744,7 +744,7 @@ static int sam_transmit(struct sam_emac_s *priv)
if (sam_txfree(priv) < 1)
{
- nlldbg("ERROR: No free TX descriptors\n");
+ nllerr("ERROR: No free TX descriptors\n");
return -EBUSY;
}
@@ -806,7 +806,7 @@ static int sam_transmit(struct sam_emac_s *priv)
if (sam_txfree(priv) < 1)
{
- nllvdbg("Disabling RX interrupts\n");
+ nllinfo("Disabling RX interrupts\n");
sam_putreg(priv, SAM_EMAC_IDR, EMAC_INT_RCOMP);
}
@@ -986,7 +986,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
arch_invalidate_dcache((uintptr_t)rxdesc,
(uintptr_t)rxdesc + sizeof(struct emac_rxdesc_s));
- nllvdbg("rxndx: %d\n", rxndx);
+ nllinfo("rxndx: %d\n", rxndx);
while ((rxdesc->addr & EMACRXD_ADDR_OWNER) != 0)
{
@@ -1042,7 +1042,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
{
if (rxndx == priv->rxndx)
{
- nllvdbg("ERROR: No EOF (Invalid of buffers too small)\n");
+ nllinfo("ERROR: No EOF (Invalid of buffers too small)\n");
do
{
/* Give ownership back to the EMAC */
@@ -1097,7 +1097,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
/* Frame size from the EMAC */
dev->d_len = (rxdesc->status & EMACRXD_STA_FRLEN_MASK);
- nllvdbg("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
+ nllinfo("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
/* All data have been copied in the application frame buffer,
* release the RX descriptor
@@ -1128,11 +1128,11 @@ static int sam_recvframe(struct sam_emac_s *priv)
* all of the data.
*/
- nllvdbg("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
+ nllinfo("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
if (pktlen < dev->d_len)
{
- nlldbg("ERROR: Buffer size %d; frame size %d\n", dev->d_len, pktlen);
+ nllerr("ERROR: Buffer size %d; frame size %d\n", dev->d_len, pktlen);
return -E2BIG;
}
@@ -1172,7 +1172,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
/* No packet was found */
priv->rxndx = rxndx;
- nllvdbg("rxndx: %d\n", priv->rxndx);
+ nllinfo("rxndx: %d\n", priv->rxndx);
return -EAGAIN;
}
@@ -1212,7 +1212,7 @@ static void sam_receive(struct sam_emac_s *priv)
if (dev->d_len > CONFIG_NET_ETH_MTU)
{
- nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+ nllerr("DROPPED: Too big: %d\n", dev->d_len);
continue;
}
@@ -1227,7 +1227,7 @@ static void sam_receive(struct sam_emac_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
/* Handle ARP on input then give the IPv4 packet to the network
* layer
@@ -1267,7 +1267,7 @@ static void sam_receive(struct sam_emac_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
/* Give the IPv6 packet to the network layer */
@@ -1304,7 +1304,7 @@ static void sam_receive(struct sam_emac_s *priv)
#ifdef CONFIG_NET_ARP
if (BUF->type == htons(ETHTYPE_ARP))
{
- nllvdbg("ARP frame\n");
+ nllinfo("ARP frame\n");
/* Handle ARP packet */
@@ -1322,7 +1322,7 @@ static void sam_receive(struct sam_emac_s *priv)
else
#endif
{
- nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+ nllerr("DROPPED: Unknown type: %04x\n", BUF->type);
}
}
}
@@ -1449,7 +1449,7 @@ static int sam_emac_interrupt(int irq, void *context)
imr = sam_getreg(priv, SAM_EMAC_IMR);
pending = isr & ~(imr | EMAC_INT_UNUSED);
- nllvdbg("isr: %08x pending: %08x\n", isr, pending);
+ nllinfo("isr: %08x pending: %08x\n", isr, pending);
/* Check for the completion of a transmission. This should be done before
* checking for received data (because receiving can cause another transmission
@@ -1475,7 +1475,7 @@ static int sam_emac_interrupt(int irq, void *context)
clrbits = EMAC_TSR_RLES | sam_txinuse(priv);
sam_txreset(priv);
- nlldbg("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
+ nllerr("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
regval = sam_getreg(priv, SAM_EMAC_NCR);
regval |= EMAC_NCR_TE;
@@ -1486,7 +1486,7 @@ static int sam_emac_interrupt(int irq, void *context)
if ((tsr & EMAC_TSR_COL) != 0)
{
- nlldbg("ERROR: Collision occurred TSR: %08x\n", tsr);
+ nllerr("ERROR: Collision occurred TSR: %08x\n", tsr);
clrbits |= EMAC_TSR_COL;
}
@@ -1494,7 +1494,7 @@ static int sam_emac_interrupt(int irq, void *context)
if ((tsr & EMAC_TSR_BEX) != 0)
{
- nlldbg("ERROR: Buffers exhausted mid-frame TSR: %08x\n", tsr);
+ nllerr("ERROR: Buffers exhausted mid-frame TSR: %08x\n", tsr);
clrbits |= EMAC_TSR_BEX;
}
@@ -1509,7 +1509,7 @@ static int sam_emac_interrupt(int irq, void *context)
if ((tsr & EMAC_TSR_UND) != 0)
{
- nlldbg("ERROR: Transmit Underrun TSR: %08x\n", tsr);
+ nllerr("ERROR: Transmit Underrun TSR: %08x\n", tsr);
clrbits |= EMAC_TSR_UND;
}
@@ -1546,7 +1546,7 @@ static int sam_emac_interrupt(int irq, void *context)
if ((rsr & EMAC_RSR_OVR) != 0)
{
- nlldbg("ERROR: Receiver overrun RSR: %08x\n", rsr);
+ nllerr("ERROR: Receiver overrun RSR: %08x\n", rsr);
clrbits |= EMAC_RSR_OVR;
}
@@ -1563,7 +1563,7 @@ static int sam_emac_interrupt(int irq, void *context)
if ((rsr & EMAC_RSR_BNA) != 0)
{
- nlldbg("ERROR: Buffer not available RSR: %08x\n", rsr);
+ nllerr("ERROR: Buffer not available RSR: %08x\n", rsr);
clrbits |= EMAC_RSR_BNA;
}
@@ -1584,7 +1584,7 @@ static int sam_emac_interrupt(int irq, void *context)
if ((pending & EMAC_INT_PFR) != 0)
{
- nlldbg("Pause frame received\n");
+ nllerr("Pause frame received\n");
}
/* Check for Pause Time Zero (PTZ)
@@ -1594,7 +1594,7 @@ static int sam_emac_interrupt(int irq, void *context)
if ((pending & EMAC_INT_PTZ) != 0)
{
- nlldbg("Pause TO!\n");
+ nllerr("Pause TO!\n");
}
#endif
@@ -1624,7 +1624,7 @@ static void sam_txtimeout(int argc, uint32_t arg, ...)
{
struct sam_emac_s *priv = (struct sam_emac_s *)arg;
- nlldbg("Timeout!\n");
+ nllerr("Timeout!\n");
/* Then reset the hardware. Just take the interface down, then back
* up again.
@@ -1699,13 +1699,13 @@ static int sam_ifup(struct net_driver_s *dev)
struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
int ret;
- nlldbg("Bringing up: %d.%d.%d.%d\n",
+ nllerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
/* Configure the EMAC interface for normal operation. */
- nllvdbg("Initialize the EMAC\n");
+ nllinfo("Initialize the EMAC\n");
sam_emac_configure(priv);
/* Set the MAC address (should have been configured while we were down) */
@@ -1723,7 +1723,7 @@ static int sam_ifup(struct net_driver_s *dev)
ret = sam_phyinit(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phyinit failed: %d\n", ret);
+ nllerr("ERROR: sam_phyinit failed: %d\n", ret);
return ret;
}
@@ -1732,16 +1732,16 @@ static int sam_ifup(struct net_driver_s *dev)
ret = sam_autonegotiate(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_autonegotiate failed: %d\n", ret);
+ nllerr("ERROR: sam_autonegotiate failed: %d\n", ret);
return ret;
}
while (sam_linkup(priv) == 0);
- nllvdbg("Link detected \n");
+ nllinfo("Link detected \n");
/* Enable normal MAC operation */
- nllvdbg("Enable normal operation\n");
+ nllinfo("Enable normal operation\n");
/* Set and activate a timer process */
@@ -1775,7 +1775,7 @@ static int sam_ifdown(struct net_driver_s *dev)
struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
irqstate_t flags;
- nlldbg("Taking the network down\n");
+ nllerr("Taking the network down\n");
/* Disable the EMAC interrupt */
@@ -1825,7 +1825,7 @@ static int sam_txavail(struct net_driver_s *dev)
struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
irqstate_t flags;
- nllvdbg("ifup: %d\n", priv->ifup);
+ nllinfo("ifup: %d\n", priv->ifup);
/* Disable interrupts because this function may be called from interrupt
* level processing.
@@ -2003,7 +2003,7 @@ static int sam_addmac(struct net_driver_s *dev, const uint8_t *mac)
unsigned int bit;
UNUSED(priv);
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Calculate the 6-bit has table index */
@@ -2077,7 +2077,7 @@ static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac)
unsigned int bit;
UNUSED(priv);
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Calculate the 6-bit has table index */
@@ -2260,7 +2260,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
static void sam_phydump(struct sam_emac_s *priv)
{
uint32_t regval;
@@ -2273,21 +2273,21 @@ static void sam_phydump(struct sam_emac_s *priv)
sam_putreg(priv, SAM_EMAC_NCR, regval);
#ifdef CONFIG_SAMA5_EMAC_RMII
- nllvdbg("RMII Registers (Address %02x)\n", priv->phyaddr);
+ nllinfo("RMII Registers (Address %02x)\n", priv->phyaddr);
#else /* defined(CONFIG_SAMA5_EMAC_MII) */
- nllvdbg("MII Registers (Address %02x)\n", priv->phyaddr);
+ nllinfo("MII Registers (Address %02x)\n", priv->phyaddr);
#endif
sam_phyread(priv, priv->phyaddr, MII_MCR, &phyval);
- nllvdbg(" MCR: %04x\n", phyval);
+ nllinfo(" MCR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, MII_MSR, &phyval);
- nllvdbg(" MSR: %04x\n", phyval);
+ nllinfo(" MSR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, MII_ADVERTISE, &phyval);
- nllvdbg(" ADVERTISE: %04x\n", phyval);
+ nllinfo(" ADVERTISE: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, MII_LPA, &phyval);
- nllvdbg(" LPR: %04x\n", phyval);
+ nllinfo(" LPR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, CONFIG_SAMA5_EMAC_PHYSR, &phyval);
- nllvdbg(" PHYSR: %04x\n", phyval);
+ nllinfo(" PHYSR: %04x\n", phyval);
/* Disable management port */
@@ -2410,7 +2410,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
int timeout;
int ret;
- nllvdbg(" sam_phyreset\n");
+ nllinfo(" sam_phyreset\n");
/* Enable management port */
@@ -2423,7 +2423,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, MII_MCR_RESET);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywrite failed: %d\n", ret);
+ nllerr("ERROR: sam_phywrite failed: %d\n", ret);
}
/* Wait for the PHY reset to complete */
@@ -2435,7 +2435,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
int result = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
if (result < 0)
{
- nlldbg("ERROR: Failed to read the MCR register: %d\n", ret);
+ nllerr("ERROR: Failed to read the MCR register: %d\n", ret);
ret = result;
}
else if ((mcr & MII_MCR_RESET) == 0)
@@ -2477,7 +2477,7 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
unsigned int offset;
int ret = -ESRCH;
- nllvdbg("Find a valid PHY address\n");
+ nllinfo("Find a valid PHY address\n");
/* Enable management port */
@@ -2500,7 +2500,7 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
else
{
- nlldbg("ERROR: sam_phyread failed for PHY address %02x: %d\n",
+ nllerr("ERROR: sam_phyread failed for PHY address %02x: %d\n",
candidate, ret);
for (offset = 0; offset < 32; offset++)
@@ -2522,10 +2522,10 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
if (ret == OK)
{
- nllvdbg(" PHYID1: %04x PHY addr: %d\n", phyval, candidate);
+ nllinfo(" PHYID1: %04x PHY addr: %d\n", phyval, candidate);
*phyaddr = candidate;
sam_phyread(priv, candidate, CONFIG_SAMA5_EMAC_PHYSR, &phyval);
- nllvdbg(" PHYSR: %04x PHY addr: %d\n", phyval, candidate);
+ nllinfo(" PHYSR: %04x PHY addr: %d\n", phyval, candidate);
}
/* Disable management port */
@@ -2566,7 +2566,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -2581,7 +2581,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -2621,7 +2621,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -2636,7 +2636,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -2680,32 +2680,32 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_PHYID1, &phyid1);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYID1\n");
+ nllerr("ERROR: Failed to read PHYID1\n");
goto errout;
}
- nllvdbg("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
+ nllinfo("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
ret = sam_phyread(priv, priv->phyaddr, MII_PHYID2, &phyid2);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYID2\n");
+ nllerr("ERROR: Failed to read PHYID2\n");
goto errout;
}
- nllvdbg("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
+ nllinfo("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
if (phyid1 == MII_OUI_MSB &&
((phyid2 & MII_PHYID2_OUI_MASK) >> MII_PHYID2_OUI_SHIFT) == MII_OUI_LSB)
{
- nllvdbg(" Vendor Model Number: %04x\n",
+ nllinfo(" Vendor Model Number: %04x\n",
(phyid2 & MII_PHYID2_MODEL_MASK) >> MII_PHYID2_MODEL_SHIFT);
- nllvdbg(" Model Revision Number: %04x\n",
+ nllinfo(" Model Revision Number: %04x\n",
(phyid2 & MII_PHYID2_REV_MASK) >> MII_PHYID2_REV_SHIFT);
}
else
{
- nlldbg("ERROR: PHY not recognized\n");
+ nllerr("ERROR: PHY not recognized\n");
}
/* Setup control register */
@@ -2713,7 +2713,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MCR\n");
+ nllerr("ERROR: Failed to read MCR\n");
goto errout;
}
@@ -2724,7 +2724,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write MCR\n");
+ nllerr("ERROR: Failed to write MCR\n");
goto errout;
}
@@ -2739,7 +2739,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_ADVERTISE, advertise);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write ANAR\n");
+ nllerr("ERROR: Failed to write ANAR\n");
goto errout;
}
@@ -2748,7 +2748,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MCR\n");
+ nllerr("ERROR: Failed to read MCR\n");
goto errout;
}
@@ -2756,7 +2756,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write MCR\n");
+ nllerr("ERROR: Failed to write MCR\n");
goto errout;
}
@@ -2768,11 +2768,11 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write MCR\n");
+ nllerr("ERROR: Failed to write MCR\n");
goto errout;
}
- nllvdbg(" MCR: %04x\n", mcr);
+ nllinfo(" MCR: %04x\n", mcr);
/* Check AutoNegotiate complete */
@@ -2782,7 +2782,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MSR\n");
+ nllerr("ERROR: Failed to read MSR\n");
goto errout;
}
@@ -2792,7 +2792,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
{
/* Yes.. break out of the loop */
- nllvdbg("AutoNegotiate complete\n");
+ nllinfo("AutoNegotiate complete\n");
break;
}
@@ -2800,7 +2800,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
if (++timeout >= PHY_RETRY_MAX)
{
- nlldbg("ERROR: TimeOut\n");
+ nllerr("ERROR: TimeOut\n");
sam_phydump(priv);
ret = -ETIMEDOUT;
goto errout;
@@ -2812,7 +2812,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_LPA, &lpa);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read ANLPAR\n");
+ nllerr("ERROR: Failed to read ANLPAR\n");
goto errout;
}
@@ -2902,13 +2902,13 @@ static bool sam_linkup(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MSR: %d\n", ret);
+ nllerr("ERROR: Failed to read MSR: %d\n", ret);
goto errout;
}
if ((msr & MII_MSR_LINKSTATUS) == 0)
{
- nlldbg("ERROR: MSR LinkStatus: %04x\n", msr);
+ nllerr("ERROR: MSR LinkStatus: %04x\n", msr);
goto errout;
}
@@ -2917,7 +2917,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, CONFIG_SAMA5_EMAC_PHYSR, &physr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYSR: %d\n", ret);
+ nllerr("ERROR: Failed to read PHYSR: %d\n", ret);
goto errout;
}
@@ -2955,7 +2955,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
/* Start the EMAC transfers */
- nllvdbg("Link is up\n");
+ nllinfo("Link is up\n");
linkup = true;
errout:
@@ -2996,7 +2996,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
mck = BOARD_MCK_FREQUENCY;
if (mck > (160*1000*1000))
{
- ndbg("ERROR: Cannot realize PHY clock\n");
+ nerr("ERROR: Cannot realize PHY clock\n");
return -EINVAL;
}
else if (mck > (80*1000*1000))
@@ -3024,7 +3024,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
ret = sam_phyfind(priv, &priv->phyaddr);
if (ret < 0)
{
- nlldbg("ERROR: sam_phyfind failed: %d\n", ret);
+ nllerr("ERROR: sam_phyfind failed: %d\n", ret);
return ret;
}
@@ -3276,7 +3276,7 @@ static void sam_macaddress(struct sam_emac_s *priv)
struct net_driver_s *dev = &priv->dev;
uint32_t regval;
- nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
@@ -3342,7 +3342,7 @@ static void sam_ipv6multicast(struct sam_emac_s *priv)
mac[4] = tmp16 & 0xff;
mac[5] = tmp16 >> 8;
- nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
(void)sam_addmac(dev, mac);
@@ -3388,7 +3388,7 @@ static int sam_emac_configure(struct sam_emac_s *priv)
{
uint32_t regval;
- nllvdbg("Entry\n");
+ nllinfo("Entry\n");
/* Enable clocking to the EMAC peripheral */
@@ -3501,7 +3501,7 @@ int sam_emac_initialize(void)
priv->txpoll = wd_create();
if (!priv->txpoll)
{
- ndbg("ERROR: Failed to create periodic poll timer\n");
+ nerr("ERROR: Failed to create periodic poll timer\n");
ret = -EAGAIN;
goto errout;
}
@@ -3509,7 +3509,7 @@ int sam_emac_initialize(void)
priv->txtimeout = wd_create(); /* Create TX timeout timer */
if (!priv->txtimeout)
{
- ndbg("ERROR: Failed to create periodic poll timer\n");
+ nerr("ERROR: Failed to create periodic poll timer\n");
ret = -EAGAIN;
goto errout_with_txpoll;
}
@@ -3523,7 +3523,7 @@ int sam_emac_initialize(void)
ret = sam_buffer_initialize(priv);
if (ret < 0)
{
- ndbg("ERROR: sam_buffer_initialize failed: %d\n", ret);
+ nerr("ERROR: sam_buffer_initialize failed: %d\n", ret);
goto errout_with_txtimeout;
}
@@ -3534,7 +3534,7 @@ int sam_emac_initialize(void)
ret = irq_attach(SAM_IRQ_EMAC, sam_emac_interrupt);
if (ret < 0)
{
- ndbg("ERROR: Failed to attach the handler to the IRQ%d\n", SAM_IRQ_EMAC);
+ nerr("ERROR: Failed to attach the handler to the IRQ%d\n", SAM_IRQ_EMAC);
goto errout_with_buffers;
}
@@ -3547,7 +3547,7 @@ int sam_emac_initialize(void)
ret = sam_ifdown(&priv->dev);
if (ret < 0)
{
- ndbg("ERROR: Failed to put the interface in the down state: %d\n", ret);
+ nerr("ERROR: Failed to put the interface in the down state: %d\n", ret);
goto errout_with_buffers;
}
@@ -3559,7 +3559,7 @@ int sam_emac_initialize(void)
return ret;
}
- ndbg("ERROR: netdev_register() failed: %d\n", ret);
+ nerr("ERROR: netdev_register() failed: %d\n", ret);
errout_with_buffers:
sam_buffer_free(priv);
diff --git a/arch/arm/src/sama5/sam_emacb.c b/arch/arm/src/sama5/sam_emacb.c
index 270acd635b5b42f994028e602ae44e28d524ab5f..f36722abb83866c829f141cfbc011b7627ffc0d8 100644
--- a/arch/arm/src/sama5/sam_emacb.c
+++ b/arch/arm/src/sama5/sam_emacb.c
@@ -58,7 +58,7 @@
#include
-#if defined(CONFIG_DEBUG) && defined(CONFIG_SAMA5_EMACB_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_SAMA5_EMACB_DEBUG)
/* Force debug output (from this file only) */
# undef CONFIG_DEBUG_NET
@@ -295,7 +295,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_SAMA5_EMACB_REGDEBUG
#endif
@@ -459,7 +459,7 @@ struct sam_emac_s
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_SAMA5_EMACB_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMA5_EMACB_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static bool sam_checkreg(struct sam_emac_s *priv, bool wr,
uint32_t regval, uintptr_t address);
#endif
@@ -536,7 +536,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg);
/* PHY Initialization */
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
static void sam_phydump(struct sam_emac_s *priv);
#else
# define sam_phydump(priv)
@@ -820,7 +820,7 @@ static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -853,7 +853,7 @@ static uint32_t sam_getreg(struct sam_emac_s *priv, uint16_t offset)
#ifdef CONFIG_SAMA5_EMACB_REGDEBUG
if (sam_checkreg(priv, false, regval, regaddr))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -877,7 +877,7 @@ static void sam_putreg(struct sam_emac_s *priv, uint16_t offset,
#ifdef CONFIG_SAMA5_EMACB_REGDEBUG
if (sam_checkreg(priv, true, regval, regaddr))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -970,7 +970,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
priv->txdesc = (struct emac_txdesc_s *)kmm_memalign(8, allocsize);
if (!priv->txdesc)
{
- nlldbg("ERROR: Failed to allocate TX descriptors\n");
+ nllerr("ERROR: Failed to allocate TX descriptors\n");
return -ENOMEM;
}
@@ -980,7 +980,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
priv->rxdesc = (struct emac_rxdesc_s *)kmm_memalign(8, allocsize);
if (!priv->rxdesc)
{
- nlldbg("ERROR: Failed to allocate RX descriptors\n");
+ nllerr("ERROR: Failed to allocate RX descriptors\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -991,7 +991,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
priv->txbuffer = (uint8_t *)kmm_memalign(8, allocsize);
if (!priv->txbuffer)
{
- nlldbg("ERROR: Failed to allocate TX buffer\n");
+ nllerr("ERROR: Failed to allocate TX buffer\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -1000,7 +1000,7 @@ static int sam_buffer_initialize(struct sam_emac_s *priv)
priv->rxbuffer = (uint8_t *)kmm_memalign(8, allocsize);
if (!priv->rxbuffer)
{
- nlldbg("ERROR: Failed to allocate RX buffer\n");
+ nllerr("ERROR: Failed to allocate RX buffer\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -1088,14 +1088,14 @@ static int sam_transmit(struct sam_emac_s *priv)
uint32_t regval;
uint32_t status;
- nllvdbg("d_len: %d txhead: %d\n", dev->d_len, priv->txhead);
+ nllinfo("d_len: %d txhead: %d\n", dev->d_len, priv->txhead);
sam_dumppacket("Transmit packet", dev->d_buf, dev->d_len);
/* Check parameter */
if (dev->d_len > EMAC_TX_UNITSIZE)
{
- nlldbg("ERROR: Packet too big: %d\n", dev->d_len);
+ nllerr("ERROR: Packet too big: %d\n", dev->d_len);
return -EINVAL;
}
@@ -1107,7 +1107,7 @@ static int sam_transmit(struct sam_emac_s *priv)
if (sam_txfree(priv) < 1)
{
- nlldbg("ERROR: No free TX descriptors\n");
+ nllerr("ERROR: No free TX descriptors\n");
return -EBUSY;
}
@@ -1169,7 +1169,7 @@ static int sam_transmit(struct sam_emac_s *priv)
if (sam_txfree(priv) < 1)
{
- nllvdbg("Disabling RX interrupts\n");
+ nllinfo("Disabling RX interrupts\n");
sam_putreg(priv, SAM_EMAC_IDR_OFFSET, EMAC_INT_RCOMP);
}
@@ -1349,7 +1349,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
arch_invalidate_dcache((uintptr_t)rxdesc,
(uintptr_t)rxdesc + sizeof(struct emac_rxdesc_s));
- nllvdbg("rxndx: %d\n", rxndx);
+ nllinfo("rxndx: %d\n", rxndx);
while ((rxdesc->addr & EMACRXD_ADDR_OWNER) != 0)
{
@@ -1405,7 +1405,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
{
if (rxndx == priv->rxndx)
{
- nllvdbg("ERROR: No EOF (Invalid of buffers too small)\n");
+ nllinfo("ERROR: No EOF (Invalid of buffers too small)\n");
do
{
/* Give ownership back to the EMAC */
@@ -1460,7 +1460,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
/* Frame size from the EMAC */
dev->d_len = (rxdesc->status & EMACRXD_STA_FRLEN_MASK);
- nllvdbg("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
+ nllinfo("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
/* All data have been copied in the application frame buffer,
* release the RX descriptor
@@ -1491,10 +1491,10 @@ static int sam_recvframe(struct sam_emac_s *priv)
* all of the data.
*/
- nllvdbg("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
+ nllinfo("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
if (pktlen < dev->d_len)
{
- nlldbg("ERROR: Buffer size %d; frame size %d\n",
+ nllerr("ERROR: Buffer size %d; frame size %d\n",
dev->d_len, pktlen);
return -E2BIG;
}
@@ -1535,7 +1535,7 @@ static int sam_recvframe(struct sam_emac_s *priv)
/* No packet was found */
priv->rxndx = rxndx;
- nllvdbg("rxndx: %d\n", priv->rxndx);
+ nllinfo("rxndx: %d\n", priv->rxndx);
return -EAGAIN;
}
@@ -1575,7 +1575,7 @@ static void sam_receive(struct sam_emac_s *priv)
if (dev->d_len > CONFIG_NET_ETH_MTU)
{
- nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+ nllerr("DROPPED: Too big: %d\n", dev->d_len);
continue;
}
@@ -1590,7 +1590,7 @@ static void sam_receive(struct sam_emac_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
/* Handle ARP on input then give the IPv4 packet to the network
* layer
@@ -1630,7 +1630,7 @@ static void sam_receive(struct sam_emac_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
/* Give the IPv6 packet to the network layer */
@@ -1667,7 +1667,7 @@ static void sam_receive(struct sam_emac_s *priv)
#ifdef CONFIG_NET_ARP
if (BUF->type == htons(ETHTYPE_ARP))
{
- nllvdbg("ARP frame\n");
+ nllinfo("ARP frame\n");
/* Handle ARP packet */
@@ -1685,7 +1685,7 @@ static void sam_receive(struct sam_emac_s *priv)
else
#endif
{
- nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+ nllerr("DROPPED: Unknown type: %04x\n", BUF->type);
}
}
}
@@ -1836,7 +1836,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
imr = sam_getreg(priv, SAM_EMAC_IMR_OFFSET);
pending = isr & ~(imr | EMAC_INT_UNUSED);
- nllvdbg("isr: %08x pending: %08x\n", isr, pending);
+ nllinfo("isr: %08x pending: %08x\n", isr, pending);
/* Check for the completion of a transmission. This should be done before
* checking for received data (because receiving can cause another transmission
@@ -1862,7 +1862,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
clrbits = EMAC_TSR_RLE | sam_txinuse(priv);
sam_txreset(priv);
- nlldbg("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
+ nllerr("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
regval = sam_getreg(priv, SAM_EMAC_NCR_OFFSET);
regval |= EMAC_NCR_TXEN;
@@ -1873,7 +1873,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((tsr & EMAC_TSR_COL) != 0)
{
- nlldbg("ERROR: Collision occurred TSR: %08x\n", tsr);
+ nllerr("ERROR: Collision occurred TSR: %08x\n", tsr);
clrbits |= EMAC_TSR_COL;
}
@@ -1881,7 +1881,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((tsr & EMAC_TSR_TFC) != 0)
{
- nlldbg("ERROR: Transmit Frame Corruption due to AHB error: %08x\n", tsr);
+ nllerr("ERROR: Transmit Frame Corruption due to AHB error: %08x\n", tsr);
clrbits |= EMAC_TSR_TFC;
}
@@ -1896,7 +1896,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((tsr & EMAC_TSR_UND) != 0)
{
- nlldbg("ERROR: Transmit Underrun TSR: %08x\n", tsr);
+ nllerr("ERROR: Transmit Underrun TSR: %08x\n", tsr);
clrbits |= EMAC_TSR_UND;
}
@@ -1933,7 +1933,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((rsr & EMAC_RSR_RXOVR) != 0)
{
- nlldbg("ERROR: Receiver overrun RSR: %08x\n", rsr);
+ nllerr("ERROR: Receiver overrun RSR: %08x\n", rsr);
clrbits |= EMAC_RSR_RXOVR;
}
@@ -1950,7 +1950,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((rsr & EMAC_RSR_BNA) != 0)
{
- nlldbg("ERROR: Buffer not available RSR: %08x\n", rsr);
+ nllerr("ERROR: Buffer not available RSR: %08x\n", rsr);
clrbits |= EMAC_RSR_BNA;
}
@@ -1972,7 +1972,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((pending & EMAC_INT_PFNZ) != 0)
{
- nlldbg("Pause frame received\n");
+ nllerr("Pause frame received\n");
}
/* Check for Pause Time Zero (PTZ)
@@ -1982,7 +1982,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv)
if ((pending & EMAC_INT_PTZ) != 0)
{
- nlldbg("Pause TO!\n");
+ nllerr("Pause TO!\n");
}
#endif
}
@@ -2147,7 +2147,7 @@ static int sam_emac1_interrupt(int irq, void *context)
static inline void sam_txtimeout_process(FAR struct sam_emac_s *priv)
{
- nlldbg("Timeout!\n");
+ nllerr("Timeout!\n");
/* Reset the hardware. Just take the interface down, then back up again. */
@@ -2377,12 +2377,12 @@ static int sam_ifup(struct net_driver_s *dev)
int ret;
#ifdef CONFIG_NET_IPv4
- ndbg("Bringing up: %d.%d.%d.%d\n",
+ nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
#endif
#ifdef CONFIG_NET_IPv6
- ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+ nerr("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
@@ -2390,7 +2390,7 @@ static int sam_ifup(struct net_driver_s *dev)
/* Configure the EMAC interface for normal operation. */
- nllvdbg("Initialize the EMAC\n");
+ nllinfo("Initialize the EMAC\n");
sam_emac_configure(priv);
/* Set the MAC address (should have been configured while we were down) */
@@ -2408,7 +2408,7 @@ static int sam_ifup(struct net_driver_s *dev)
ret = sam_phyinit(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phyinit failed: %d\n", ret);
+ nllerr("ERROR: sam_phyinit failed: %d\n", ret);
return ret;
}
@@ -2417,16 +2417,16 @@ static int sam_ifup(struct net_driver_s *dev)
ret = sam_autonegotiate(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_autonegotiate failed: %d\n", ret);
+ nllerr("ERROR: sam_autonegotiate failed: %d\n", ret);
return ret;
}
while (sam_linkup(priv) == 0);
- nllvdbg("Link detected \n");
+ nllinfo("Link detected \n");
/* Enable normal MAC operation */
- nllvdbg("Enable normal operation\n");
+ nllinfo("Enable normal operation\n");
/* Set and activate a timer process */
@@ -2460,7 +2460,7 @@ static int sam_ifdown(struct net_driver_s *dev)
struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
irqstate_t flags;
- nlldbg("Taking the network down\n");
+ nllerr("Taking the network down\n");
/* Disable the EMAC interrupt */
@@ -2505,7 +2505,7 @@ static int sam_ifdown(struct net_driver_s *dev)
static inline void sam_txavail_process(FAR struct sam_emac_s *priv)
{
- nllvdbg("ifup: %d\n", priv->ifup);
+ nllinfo("ifup: %d\n", priv->ifup);
/* Ignore the notification if the interface is not yet up */
@@ -2758,7 +2758,7 @@ static int sam_addmac(struct net_driver_s *dev, const uint8_t *mac)
unsigned int ndx;
unsigned int bit;
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Calculate the 6-bit has table index */
@@ -2831,7 +2831,7 @@ static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac)
unsigned int ndx;
unsigned int bit;
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Calculate the 6-bit has table index */
@@ -3014,7 +3014,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
static void sam_phydump(struct sam_emac_s *priv)
{
uint32_t regval;
@@ -3026,19 +3026,19 @@ static void sam_phydump(struct sam_emac_s *priv)
regval |= EMAC_NCR_MPE;
sam_putreg(priv, SAM_EMAC_NCR_OFFSET, regval);
- nllvdbg("%s Registers (Address %02x)\n",
+ nllinfo("%s Registers (Address %02x)\n",
priv->attr->rmii ? "RMII" : "MII", priv->phyaddr);
sam_phyread(priv, priv->phyaddr, MII_MCR, &phyval);
- nllvdbg(" MCR: %04x\n", phyval);
+ nllinfo(" MCR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, MII_MSR, &phyval);
- nllvdbg(" MSR: %04x\n", phyval);
+ nllinfo(" MSR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, MII_ADVERTISE, &phyval);
- nllvdbg(" ADVERTISE: %04x\n", phyval);
+ nllinfo(" ADVERTISE: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, MII_LPA, &phyval);
- nllvdbg(" LPR: %04x\n", phyval);
+ nllinfo(" LPR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, priv->attr->physr, &phyval);
- nllvdbg(" PHYSR: %04x\n", phyval);
+ nllinfo(" PHYSR: %04x\n", phyval);
/* Disable management port */
@@ -3198,7 +3198,7 @@ static int sam_phyintenable(struct sam_emac_s *priv)
else
#endif
{
- ndbg("ERROR: Unsupported PHY type: %d\n", priv->phytype);
+ nerr("ERROR: Unsupported PHY type: %d\n", priv->phytype);
ret = -ENOSYS;
}
@@ -3262,7 +3262,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
int timeout;
int ret;
- nllvdbg(" sam_phyreset\n");
+ nllinfo(" sam_phyreset\n");
/* Enable management port */
@@ -3275,7 +3275,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, MII_MCR_RESET);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywrite failed: %d\n", ret);
+ nllerr("ERROR: sam_phywrite failed: %d\n", ret);
}
/* Wait for the PHY reset to complete */
@@ -3287,7 +3287,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
int result = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
if (result < 0)
{
- nlldbg("ERROR: Failed to read the MCR register: %d\n", ret);
+ nllerr("ERROR: Failed to read the MCR register: %d\n", ret);
ret = result;
}
else if ((mcr & MII_MCR_RESET) == 0)
@@ -3329,7 +3329,7 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
unsigned int offset;
int ret = -ESRCH;
- nllvdbg("Find a valid PHY address\n");
+ nllinfo("Find a valid PHY address\n");
/* Enable management port */
@@ -3352,7 +3352,7 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
else
{
- nlldbg("ERROR: sam_phyread failed for PHY address %02x: %d\n",
+ nllerr("ERROR: sam_phyread failed for PHY address %02x: %d\n",
candidate, ret);
for (offset = 0; offset < 32; offset++)
@@ -3374,10 +3374,10 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
if (ret == OK)
{
- nllvdbg(" PHYID1: %04x PHY addr: %d\n", phyval, candidate);
+ nllinfo(" PHYID1: %04x PHY addr: %d\n", phyval, candidate);
*phyaddr = candidate;
sam_phyread(priv, candidate, priv->attr->physr, &phyval);
- nllvdbg(" PHYSR: %04x PHY addr: %d\n", phyval, candidate);
+ nllinfo(" PHYSR: %04x PHY addr: %d\n", phyval, candidate);
}
/* Disable management port */
@@ -3418,7 +3418,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -3443,7 +3443,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -3483,7 +3483,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -3508,7 +3508,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -3552,33 +3552,33 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_PHYID1, &phyid1);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYID1\n");
+ nllerr("ERROR: Failed to read PHYID1\n");
goto errout;
}
- nllvdbg("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
+ nllinfo("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
ret = sam_phyread(priv, priv->phyaddr, MII_PHYID2, &phyid2);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYID2\n");
+ nllerr("ERROR: Failed to read PHYID2\n");
goto errout;
}
- nllvdbg("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
+ nllinfo("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
if (phyid1 == priv->attr->msoui &&
((phyid2 & MII_PHYID2_OUI_MASK) >> MII_PHYID2_OUI_SHIFT) ==
(uint16_t)priv->attr->lsoui)
{
- nllvdbg(" Vendor Model Number: %04x\n",
+ nllinfo(" Vendor Model Number: %04x\n",
(phyid2 & MII_PHYID2_MODEL_MASK) >> MII_PHYID2_MODEL_SHIFT);
- nllvdbg(" Model Revision Number: %04x\n",
+ nllinfo(" Model Revision Number: %04x\n",
(phyid2 & MII_PHYID2_REV_MASK) >> MII_PHYID2_REV_SHIFT);
}
else
{
- nlldbg("ERROR: PHY not recognized\n");
+ nllerr("ERROR: PHY not recognized\n");
}
/* Setup control register */
@@ -3586,7 +3586,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MCR\n");
+ nllerr("ERROR: Failed to read MCR\n");
goto errout;
}
@@ -3597,7 +3597,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write MCR\n");
+ nllerr("ERROR: Failed to write MCR\n");
goto errout;
}
@@ -3612,7 +3612,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_ADVERTISE, advertise);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write ANAR\n");
+ nllerr("ERROR: Failed to write ANAR\n");
goto errout;
}
@@ -3621,7 +3621,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MCR\n");
+ nllerr("ERROR: Failed to read MCR\n");
goto errout;
}
@@ -3629,7 +3629,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write MCR\n");
+ nllerr("ERROR: Failed to write MCR\n");
goto errout;
}
@@ -3641,11 +3641,11 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write MCR\n");
+ nllerr("ERROR: Failed to write MCR\n");
goto errout;
}
- nllvdbg(" MCR: %04x\n", mcr);
+ nllinfo(" MCR: %04x\n", mcr);
/* Check AutoNegotiate complete */
@@ -3655,7 +3655,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MSR\n");
+ nllerr("ERROR: Failed to read MSR\n");
goto errout;
}
@@ -3665,7 +3665,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
{
/* Yes.. break out of the loop */
- nllvdbg("AutoNegotiate complete\n");
+ nllinfo("AutoNegotiate complete\n");
break;
}
@@ -3673,7 +3673,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
if (++timeout >= PHY_RETRY_MAX)
{
- nlldbg("ERROR: TimeOut\n");
+ nllerr("ERROR: TimeOut\n");
sam_phydump(priv);
ret = -ETIMEDOUT;
goto errout;
@@ -3685,7 +3685,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_LPA, &lpa);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read ANLPAR\n");
+ nllerr("ERROR: Failed to read ANLPAR\n");
goto errout;
}
@@ -3775,13 +3775,13 @@ static bool sam_linkup(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MSR: %d\n", ret);
+ nllerr("ERROR: Failed to read MSR: %d\n", ret);
goto errout;
}
if ((msr & MII_MSR_LINKSTATUS) == 0)
{
- nlldbg("ERROR: MSR LinkStatus: %04x\n", msr);
+ nllerr("ERROR: MSR LinkStatus: %04x\n", msr);
goto errout;
}
@@ -3790,7 +3790,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, priv->attr->physr, &physr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYSR: %d\n", ret);
+ nllerr("ERROR: Failed to read PHYSR: %d\n", ret);
goto errout;
}
@@ -3828,7 +3828,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
/* Start the EMAC transfers */
- nllvdbg("Link is up\n");
+ nllinfo("Link is up\n");
linkup = true;
errout:
@@ -3869,7 +3869,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
mck = BOARD_MCK_FREQUENCY;
if (mck > (160*1000*1000))
{
- ndbg("ERROR: Cannot realize PHY clock\n");
+ nerr("ERROR: Cannot realize PHY clock\n");
return -EINVAL;
}
else if (mck > (80*1000*1000))
@@ -3897,7 +3897,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
ret = sam_phyfind(priv, &priv->phyaddr);
if (ret < 0)
{
- nlldbg("ERROR: sam_phyfind failed: %d\n", ret);
+ nllerr("ERROR: sam_phyfind failed: %d\n", ret);
return ret;
}
@@ -4012,7 +4012,7 @@ static inline void sam_ethgpioconfig(struct sam_emac_s *priv)
else
#endif
{
- nvdbg("ERROR: emac=%d\n", priv->attr->emac);
+ ninfo("ERROR: emac=%d\n", priv->attr->emac);
}
}
@@ -4311,7 +4311,7 @@ static void sam_macaddress(struct sam_emac_s *priv)
struct net_driver_s *dev = &priv->dev;
uint32_t regval;
- nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
@@ -4377,7 +4377,7 @@ static void sam_ipv6multicast(struct sam_emac_s *priv)
mac[4] = tmp16 & 0xff;
mac[5] = tmp16 >> 8;
- nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
(void)sam_addmac(dev, mac);
@@ -4423,7 +4423,7 @@ static int sam_emac_configure(struct sam_emac_s *priv)
{
uint32_t regval;
- nllvdbg("Entry\n");
+ nllinfo("Entry\n");
/* Enable clocking to the EMAC peripheral */
@@ -4545,7 +4545,7 @@ int sam_emac_initialize(int intf)
else
#endif
{
- ndbg("ERROR: Interface %d not supported\n", intf);
+ nerr("ERROR: Interface %d not supported\n", intf);
return -EINVAL;
}
@@ -4574,7 +4574,7 @@ int sam_emac_initialize(int intf)
priv->txpoll = wd_create();
if (!priv->txpoll)
{
- ndbg("ERROR: Failed to create periodic poll timer\n");
+ nerr("ERROR: Failed to create periodic poll timer\n");
ret = -EAGAIN;
goto errout;
}
@@ -4582,7 +4582,7 @@ int sam_emac_initialize(int intf)
priv->txtimeout = wd_create(); /* Create TX timeout timer */
if (!priv->txtimeout)
{
- ndbg("ERROR: Failed to create periodic poll timer\n");
+ nerr("ERROR: Failed to create periodic poll timer\n");
ret = -EAGAIN;
goto errout_with_txpoll;
}
@@ -4596,7 +4596,7 @@ int sam_emac_initialize(int intf)
ret = sam_buffer_initialize(priv);
if (ret < 0)
{
- ndbg("ERROR: sam_buffer_initialize failed: %d\n", ret);
+ nerr("ERROR: sam_buffer_initialize failed: %d\n", ret);
goto errout_with_txtimeout;
}
@@ -4607,7 +4607,7 @@ int sam_emac_initialize(int intf)
ret = irq_attach(priv->attr->irq, priv->attr->handler);
if (ret < 0)
{
- ndbg("ERROR: Failed to attach the handler to the IRQ%d\n", priv->attr->irq);
+ nerr("ERROR: Failed to attach the handler to the IRQ%d\n", priv->attr->irq);
goto errout_with_buffers;
}
@@ -4620,7 +4620,7 @@ int sam_emac_initialize(int intf)
ret = sam_ifdown(&priv->dev);
if (ret < 0)
{
- ndbg("ERROR: Failed to put the interface in the down state: %d\n", ret);
+ nerr("ERROR: Failed to put the interface in the down state: %d\n", ret);
goto errout_with_buffers;
}
@@ -4632,7 +4632,7 @@ int sam_emac_initialize(int intf)
return ret;
}
- ndbg("ERROR: netdev_register() failed: %d\n", ret);
+ nerr("ERROR: netdev_register() failed: %d\n", ret);
errout_with_buffers:
sam_buffer_free(priv);
diff --git a/arch/arm/src/sama5/sam_ethernet.c b/arch/arm/src/sama5/sam_ethernet.c
index 409db45535d2c4867b6fbea900d5e82f64ea1d1c..d10f096d2944daf5a8dae55967187ae029fb336c 100644
--- a/arch/arm/src/sama5/sam_ethernet.c
+++ b/arch/arm/src/sama5/sam_ethernet.c
@@ -88,7 +88,7 @@ static inline void up_gmac_initialize(void)
ret = sam_gmac_initialize();
if (ret < 0)
{
- nlldbg("ERROR: sam_gmac_initialize failed: %d\n", ret);
+ nllerr("ERROR: sam_gmac_initialize failed: %d\n", ret);
}
}
#else
@@ -119,7 +119,7 @@ static inline void up_emac_initialize(void)
ret = sam_emac_initialize();
if (ret < 0)
{
- nlldbg("ERROR: up_emac_initialize failed: %d\n", ret);
+ nllerr("ERROR: up_emac_initialize failed: %d\n", ret);
}
}
#elif defined(CONFIG_SAMA5_EMACB)
@@ -133,7 +133,7 @@ static inline void up_emac_initialize(void)
ret = sam_emac_initialize(EMAC0_INTF);
if (ret < 0)
{
- nlldbg("ERROR: up_emac_initialize(EMAC0) failed: %d\n", ret);
+ nllerr("ERROR: up_emac_initialize(EMAC0) failed: %d\n", ret);
}
#endif
@@ -143,7 +143,7 @@ static inline void up_emac_initialize(void)
ret = sam_emac_initialize(EMAC1_INTF);
if (ret < 0)
{
- nlldbg("ERROR: up_emac_initialize(EMAC1) failed: %d\n", ret);
+ nllerr("ERROR: up_emac_initialize(EMAC1) failed: %d\n", ret);
}
#endif
}
diff --git a/arch/arm/src/sama5/sam_freerun.c b/arch/arm/src/sama5/sam_freerun.c
index 18d2556bbf5d07e8c27833ac9f6af1c4fa1064da..dfc5f7a62b60317e1bc600e81867ab1efa601c21 100644
--- a/arch/arm/src/sama5/sam_freerun.c
+++ b/arch/arm/src/sama5/sam_freerun.c
@@ -138,7 +138,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
uint32_t cmr;
int ret;
- tcvdbg("chan=%d resolution=%d usec\n", chan, resolution);
+ tcinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(freerun && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
@@ -150,11 +150,11 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
ret = sam_tc_divisor(frequency, &divisor, &cmr);
if (ret < 0)
{
- tcdbg("ERROR: sam_tc_divisor failed: %d\n", ret);
+ tcerr("ERROR: sam_tc_divisor failed: %d\n", ret);
return ret;
}
- tcvdbg("frequency=%lu, divisor=%u, cmr=%08lx\n",
+ tcinfo("frequency=%lu, divisor=%u, cmr=%08lx\n",
(unsigned long)frequency, (unsigned long)divisor,
(unsigned long)cmr);
@@ -189,7 +189,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
freerun->tch = sam_tc_allocate(chan, cmr);
if (!freerun->tch)
{
- tcdbg("ERROR: Failed to allocate timer channel %d\n", chan);
+ tcerr("ERROR: Failed to allocate timer channel %d\n", chan);
return -EBUSY;
}
@@ -274,7 +274,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
leave_critical_section(flags);
- tcvdbg("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
+ tcinfo("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
(unsigned long)counter, (unsigned long)verify,
(unsigned long)overflow, (unsigned long)sr);
@@ -294,7 +294,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
ts->tv_sec = sec;
ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
- tcvdbg("usec=%llu ts=(%lu, %lu)\n",
+ tcinfo("usec=%llu ts=(%lu, %lu)\n",
usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
return OK;
diff --git a/arch/arm/src/sama5/sam_gmac.c b/arch/arm/src/sama5/sam_gmac.c
index 7db62d10dbaeb66ffcd61c56f5df8178525dc06b..078841fbb1a45da9ac127aa88f8d3431e3068420 100644
--- a/arch/arm/src/sama5/sam_gmac.c
+++ b/arch/arm/src/sama5/sam_gmac.c
@@ -149,7 +149,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_SAMA5_GMAC_REGDEBUG
#endif
@@ -260,7 +260,7 @@ static uint8_t g_rxbuffer[CONFIG_SAMA5_GMAC_NRXBUFFERS * GMAC_RX_UNITSIZE]
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_SAMA5_GMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMA5_GMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static bool sam_checkreg(struct sam_gmac_s *priv, bool wr,
uint32_t regval, uintptr_t address);
static uint32_t sam_getreg(struct sam_gmac_s *priv, uintptr_t addr);
@@ -315,7 +315,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg);
/* PHY Initialization */
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
static void sam_phydump(struct sam_gmac_s *priv);
#else
# define sam_phydump(priv)
@@ -392,7 +392,7 @@ static bool sam_checkreg(struct sam_gmac_s *priv, bool wr, uint32_t regval,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -424,7 +424,7 @@ static uint32_t sam_getreg(struct sam_gmac_s *priv, uintptr_t address)
if (sam_checkreg(priv, false, regval, address))
{
- lldbg("%08x->%08x\n", address, regval);
+ llerr("%08x->%08x\n", address, regval);
}
return regval;
@@ -445,7 +445,7 @@ static void sam_putreg(struct sam_gmac_s *priv, uintptr_t address,
{
if (sam_checkreg(priv, true, regval, address))
{
- lldbg("%08x<-%08x\n", address, regval);
+ llerr("%08x<-%08x\n", address, regval);
}
putreg32(regval, address);
@@ -538,7 +538,7 @@ static int sam_buffer_initialize(struct sam_gmac_s *priv)
priv->txdesc = (struct gmac_txdesc_s *)kmm_memalign(8, allocsize);
if (!priv->txdesc)
{
- nlldbg("ERROR: Failed to allocate TX descriptors\n");
+ nllerr("ERROR: Failed to allocate TX descriptors\n");
return -ENOMEM;
}
@@ -548,7 +548,7 @@ static int sam_buffer_initialize(struct sam_gmac_s *priv)
priv->rxdesc = (struct gmac_rxdesc_s *)kmm_memalign(8, allocsize);
if (!priv->rxdesc)
{
- nlldbg("ERROR: Failed to allocate RX descriptors\n");
+ nllerr("ERROR: Failed to allocate RX descriptors\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -559,7 +559,7 @@ static int sam_buffer_initialize(struct sam_gmac_s *priv)
priv->txbuffer = (uint8_t *)kmm_memalign(8, allocsize);
if (!priv->txbuffer)
{
- nlldbg("ERROR: Failed to allocate TX buffer\n");
+ nllerr("ERROR: Failed to allocate TX buffer\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -568,7 +568,7 @@ static int sam_buffer_initialize(struct sam_gmac_s *priv)
priv->rxbuffer = (uint8_t *)kmm_memalign(8, allocsize);
if (!priv->rxbuffer)
{
- nlldbg("ERROR: Failed to allocate RX buffer\n");
+ nllerr("ERROR: Failed to allocate RX buffer\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -656,7 +656,7 @@ static int sam_transmit(struct sam_gmac_s *priv)
uint32_t regval;
uint32_t status;
- nllvdbg("d_len: %d txhead: %d txtail: %d\n",
+ nllinfo("d_len: %d txhead: %d txtail: %d\n",
dev->d_len, priv->txhead, priv->txtail);
sam_dumppacket("Transmit packet", dev->d_buf, dev->d_len);
@@ -664,7 +664,7 @@ static int sam_transmit(struct sam_gmac_s *priv)
if (dev->d_len > GMAC_TX_UNITSIZE)
{
- nlldbg("ERROR: Packet too big: %d\n", dev->d_len);
+ nllerr("ERROR: Packet too big: %d\n", dev->d_len);
return -EINVAL;
}
@@ -676,7 +676,7 @@ static int sam_transmit(struct sam_gmac_s *priv)
if (sam_txfree(priv) < 1)
{
- nlldbg("ERROR: No free TX descriptors\n");
+ nllerr("ERROR: No free TX descriptors\n");
return -EBUSY;
}
@@ -738,7 +738,7 @@ static int sam_transmit(struct sam_gmac_s *priv)
if (sam_txfree(priv) < 1)
{
- nllvdbg("Disabling RX interrupts\n");
+ nllinfo("Disabling RX interrupts\n");
sam_putreg(priv, SAM_GMAC_IDR, GMAC_INT_RCOMP);
}
@@ -918,7 +918,7 @@ static int sam_recvframe(struct sam_gmac_s *priv)
arch_invalidate_dcache((uintptr_t)rxdesc,
(uintptr_t)rxdesc + sizeof(struct gmac_rxdesc_s));
- nllvdbg("rxndx: %d\n", rxndx);
+ nllinfo("rxndx: %d\n", rxndx);
while ((rxdesc->addr & GMACRXD_ADDR_OWNER) != 0)
{
@@ -974,7 +974,7 @@ static int sam_recvframe(struct sam_gmac_s *priv)
{
if (rxndx == priv->rxndx)
{
- nllvdbg("ERROR: No EOF (Invalid of buffers too small)\n");
+ nllinfo("ERROR: No EOF (Invalid of buffers too small)\n");
do
{
/* Give ownership back to the GMAC */
@@ -1029,7 +1029,7 @@ static int sam_recvframe(struct sam_gmac_s *priv)
/* Frame size from the GMAC */
dev->d_len = (rxdesc->status & GMACRXD_STA_FRLEN_MASK);
- nllvdbg("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
+ nllinfo("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
/* All data have been copied in the application frame buffer,
* release the RX descriptor
@@ -1060,11 +1060,11 @@ static int sam_recvframe(struct sam_gmac_s *priv)
* all of the data.
*/
- nllvdbg("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
+ nllinfo("rxndx: %d d_len: %d\n", priv->rxndx, dev->d_len);
if (pktlen < dev->d_len)
{
- nlldbg("ERROR: Buffer size %d; frame size %d\n", dev->d_len, pktlen);
+ nllerr("ERROR: Buffer size %d; frame size %d\n", dev->d_len, pktlen);
return -E2BIG;
}
@@ -1102,7 +1102,7 @@ static int sam_recvframe(struct sam_gmac_s *priv)
/* No packet was found */
priv->rxndx = rxndx;
- nllvdbg("rxndx: %d\n", priv->rxndx);
+ nllinfo("rxndx: %d\n", priv->rxndx);
return -EAGAIN;
}
@@ -1142,7 +1142,7 @@ static void sam_receive(struct sam_gmac_s *priv)
if (dev->d_len > CONFIG_NET_ETH_MTU)
{
- nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+ nllerr("DROPPED: Too big: %d\n", dev->d_len);
continue;
}
@@ -1157,7 +1157,7 @@ static void sam_receive(struct sam_gmac_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
/* Handle ARP on input then give the IPv4 packet to the network
* layer
@@ -1197,7 +1197,7 @@ static void sam_receive(struct sam_gmac_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
/* Give the IPv6 packet to the network layer */
@@ -1234,7 +1234,7 @@ static void sam_receive(struct sam_gmac_s *priv)
#ifdef CONFIG_NET_ARP
if (BUF->type == htons(ETHTYPE_ARP))
{
- nllvdbg("ARP frame\n");
+ nllinfo("ARP frame\n");
/* Handle ARP packet */
@@ -1252,7 +1252,7 @@ static void sam_receive(struct sam_gmac_s *priv)
else
#endif
{
- nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+ nllerr("DROPPED: Unknown type: %04x\n", BUF->type);
}
}
}
@@ -1377,7 +1377,7 @@ static int sam_gmac_interrupt(int irq, void *context)
imr = sam_getreg(priv, SAM_GMAC_IMR);
pending = isr & ~(imr | GMAC_INT_UNUSED);
- nllvdbg("isr: %08x pending: %08x\n", isr, pending);
+ nllinfo("isr: %08x pending: %08x\n", isr, pending);
/* Check for the completion of a transmission. This should be done before
* checking for received data (because receiving can cause another transmission
@@ -1403,7 +1403,7 @@ static int sam_gmac_interrupt(int irq, void *context)
clrbits = GMAC_TSR_RLE | sam_txinuse(priv);
sam_txreset(priv);
- nlldbg("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
+ nllerr("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
regval = sam_getreg(priv, SAM_GMAC_NCR);
regval |= GMAC_NCR_TXEN;
@@ -1414,7 +1414,7 @@ static int sam_gmac_interrupt(int irq, void *context)
if ((tsr & GMAC_TSR_COL) != 0)
{
- nlldbg("ERROR: Collision occurred TSR: %08x\n", tsr);
+ nllerr("ERROR: Collision occurred TSR: %08x\n", tsr);
clrbits |= GMAC_TSR_COL;
}
@@ -1422,7 +1422,7 @@ static int sam_gmac_interrupt(int irq, void *context)
if ((tsr & GMAC_TSR_TFC) != 0)
{
- nlldbg("ERROR: Buffers exhausted mid-frame TSR: %08x\n", tsr);
+ nllerr("ERROR: Buffers exhausted mid-frame TSR: %08x\n", tsr);
clrbits |= GMAC_TSR_TFC;
}
@@ -1437,7 +1437,7 @@ static int sam_gmac_interrupt(int irq, void *context)
if ((tsr & GMAC_TSR_UND) != 0)
{
- nlldbg("ERROR: Transmit Underrun TSR: %08x\n", tsr);
+ nllerr("ERROR: Transmit Underrun TSR: %08x\n", tsr);
clrbits |= GMAC_TSR_UND;
}
@@ -1445,7 +1445,7 @@ static int sam_gmac_interrupt(int irq, void *context)
if ((tsr & GMAC_TSR_HRESP) != 0)
{
- nlldbg("ERROR: HRESP not OK: %08x\n", tsr);
+ nllerr("ERROR: HRESP not OK: %08x\n", tsr);
clrbits |= GMAC_TSR_HRESP;
}
@@ -1453,7 +1453,7 @@ static int sam_gmac_interrupt(int irq, void *context)
if ((tsr & GMAC_TSR_LCO) != 0)
{
- nlldbg("ERROR: Late collision: %08x\n", tsr);
+ nllerr("ERROR: Late collision: %08x\n", tsr);
clrbits |= GMAC_TSR_LCO;
}
@@ -1490,7 +1490,7 @@ static int sam_gmac_interrupt(int irq, void *context)
if ((rsr & GMAC_RSR_RXOVR) != 0)
{
- nlldbg("ERROR: Receiver overrun RSR: %08x\n", rsr);
+ nllerr("ERROR: Receiver overrun RSR: %08x\n", rsr);
clrbits |= GMAC_RSR_RXOVR;
}
@@ -1507,7 +1507,7 @@ static int sam_gmac_interrupt(int irq, void *context)
if ((rsr & GMAC_RSR_BNA) != 0)
{
- nlldbg("ERROR: Buffer not available RSR: %08x\n", rsr);
+ nllerr("ERROR: Buffer not available RSR: %08x\n", rsr);
clrbits |= GMAC_RSR_BNA;
}
@@ -1515,7 +1515,7 @@ static int sam_gmac_interrupt(int irq, void *context)
if ((rsr & GMAC_RSR_HNO) != 0)
{
- nlldbg("ERROR: HRESP not OK: %08x\n", rsr);
+ nllerr("ERROR: HRESP not OK: %08x\n", rsr);
clrbits |= GMAC_RSR_HNO;
}
@@ -1536,7 +1536,7 @@ static int sam_gmac_interrupt(int irq, void *context)
if ((pending & GMAC_INT_PFNZ) != 0)
{
- nlldbg("Pause frame received\n");
+ nllerr("Pause frame received\n");
}
/* Check for Pause Time Zero (PTZ)
@@ -1546,7 +1546,7 @@ static int sam_gmac_interrupt(int irq, void *context)
if ((pending & GMAC_INT_PTZ) != 0)
{
- nlldbg("Pause TO!\n");
+ nllerr("Pause TO!\n");
}
#endif
@@ -1576,7 +1576,7 @@ static void sam_txtimeout(int argc, uint32_t arg, ...)
{
struct sam_gmac_s *priv = (struct sam_gmac_s *)arg;
- nlldbg("Timeout!\n");
+ nllerr("Timeout!\n");
/* Then reset the hardware. Just take the interface down, then back
* up again.
@@ -1651,13 +1651,13 @@ static int sam_ifup(struct net_driver_s *dev)
struct sam_gmac_s *priv = (struct sam_gmac_s *)dev->d_private;
int ret;
- nlldbg("Bringing up: %d.%d.%d.%d\n",
+ nllerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
/* Configure the GMAC interface for normal operation. */
- nllvdbg("Initialize the GMAC\n");
+ nllinfo("Initialize the GMAC\n");
sam_gmac_configure(priv);
/* Set the MAC address (should have been configured while we were down) */
@@ -1675,7 +1675,7 @@ static int sam_ifup(struct net_driver_s *dev)
ret = sam_phyinit(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phyinit failed: %d\n", ret);
+ nllerr("ERROR: sam_phyinit failed: %d\n", ret);
return ret;
}
@@ -1685,7 +1685,7 @@ static int sam_ifup(struct net_driver_s *dev)
ret = sam_autonegotiate(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_autonegotiate failed: %d\n", ret);
+ nllerr("ERROR: sam_autonegotiate failed: %d\n", ret);
return ret;
}
#else
@@ -1696,7 +1696,7 @@ static int sam_ifup(struct net_driver_s *dev)
/* Enable normal MAC operation */
- nllvdbg("Enable normal operation\n");
+ nllinfo("Enable normal operation\n");
/* Set and activate a timer process */
@@ -1730,7 +1730,7 @@ static int sam_ifdown(struct net_driver_s *dev)
struct sam_gmac_s *priv = (struct sam_gmac_s *)dev->d_private;
irqstate_t flags;
- nlldbg("Taking the network down\n");
+ nllerr("Taking the network down\n");
/* Disable the GMAC interrupt */
@@ -1780,7 +1780,7 @@ static int sam_txavail(struct net_driver_s *dev)
struct sam_gmac_s *priv = (struct sam_gmac_s *)dev->d_private;
irqstate_t flags;
- nllvdbg("ifup: %d\n", priv->ifup);
+ nllinfo("ifup: %d\n", priv->ifup);
/* Disable interrupts because this function may be called from interrupt
* level processing.
@@ -1958,7 +1958,7 @@ static int sam_addmac(struct net_driver_s *dev, const uint8_t *mac)
unsigned int bit;
UNUSED(priv);
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Calculate the 6-bit has table index */
@@ -2032,7 +2032,7 @@ static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac)
unsigned int bit;
UNUSED(priv);
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Calculate the 6-bit has table index */
@@ -2211,7 +2211,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
static void sam_phydump(struct sam_gmac_s *priv)
{
uint16_t phyval;
@@ -2220,21 +2220,21 @@ static void sam_phydump(struct sam_gmac_s *priv)
sam_enablemdio(priv);
- nllvdbg("GMII Registers (Address %02x)\n", priv->phyaddr);
+ nllinfo("GMII Registers (Address %02x)\n", priv->phyaddr);
sam_phyread(priv, priv->phyaddr, GMII_MCR, &phyval);
- nllvdbg(" MCR: %04x\n", phyval);
+ nllinfo(" MCR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, GMII_MSR, &phyval);
- nllvdbg(" MSR: %04x\n", phyval);
+ nllinfo(" MSR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, GMII_ADVERTISE, &phyval);
- nllvdbg(" ADVERTISE: %04x\n", phyval);
+ nllinfo(" ADVERTISE: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, GMII_LPA, &phyval);
- nllvdbg(" LPR: %04x\n", phyval);
+ nllinfo(" LPR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, GMII_1000BTCR, &phyval);
- nllvdbg(" 1000BTCR: %04x\n", phyval);
+ nllinfo(" 1000BTCR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, GMII_1000BTSR, &phyval);
- nllvdbg(" 1000BTSR: %04x\n", phyval);
+ nllinfo(" 1000BTSR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, GMII_ESTATUS, &phyval);
- nllvdbg(" ESTATUS: %04x\n", phyval);
+ nllinfo(" ESTATUS: %04x\n", phyval);
/* Disable management port */
@@ -2418,7 +2418,7 @@ static int sam_phyreset(struct sam_gmac_s *priv)
int timeout;
int ret;
- nllvdbg(" sam_phyreset\n");
+ nllinfo(" sam_phyreset\n");
/* Enable management port */
@@ -2429,7 +2429,7 @@ static int sam_phyreset(struct sam_gmac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, GMII_MCR, GMII_MCR_RESET);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywrite failed: %d\n", ret);
+ nllerr("ERROR: sam_phywrite failed: %d\n", ret);
}
/* Wait for the PHY reset to complete */
@@ -2441,7 +2441,7 @@ static int sam_phyreset(struct sam_gmac_s *priv)
int result = sam_phyread(priv, priv->phyaddr, GMII_MCR, &mcr);
if (result < 0)
{
- nlldbg("ERROR: Failed to read the MCR register: %d\n", ret);
+ nllerr("ERROR: Failed to read the MCR register: %d\n", ret);
ret = result;
}
else if ((mcr & GMII_MCR_RESET) == 0)
@@ -2480,7 +2480,7 @@ static int sam_phyfind(struct sam_gmac_s *priv, uint8_t *phyaddr)
unsigned int offset;
int ret = -ESRCH;
- nllvdbg("Find a valid PHY address\n");
+ nllinfo("Find a valid PHY address\n");
/* Enable management port */
@@ -2501,7 +2501,7 @@ static int sam_phyfind(struct sam_gmac_s *priv, uint8_t *phyaddr)
else
{
- nlldbg("ERROR: sam_phyread failed for PHY address %02x: %d\n",
+ nllerr("ERROR: sam_phyread failed for PHY address %02x: %d\n",
candidate, ret);
for (offset = 0; offset < 32; offset++)
@@ -2523,7 +2523,7 @@ static int sam_phyfind(struct sam_gmac_s *priv, uint8_t *phyaddr)
if (ret == OK)
{
- nllvdbg(" PHYID1: %04x PHY addr: %d\n", phyval, candidate);
+ nllinfo(" PHYID1: %04x PHY addr: %d\n", phyval, candidate);
*phyaddr = candidate;
}
@@ -2563,7 +2563,7 @@ static int sam_phyread(struct sam_gmac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -2578,7 +2578,7 @@ static int sam_phyread(struct sam_gmac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -2618,7 +2618,7 @@ static int sam_phywrite(struct sam_gmac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -2633,7 +2633,7 @@ static int sam_phywrite(struct sam_gmac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -2679,34 +2679,34 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, GMII_PHYID1, &phyid1);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYID1 register\n");
+ nllerr("ERROR: Failed to read PHYID1 register\n");
goto errout;
}
- nllvdbg("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
+ nllinfo("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
/* Read the LS bits of the OUI from Pthe PHYID2 register */
ret = sam_phyread(priv, priv->phyaddr, GMII_PHYID2, &phyid2);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYID2 register\n");
+ nllerr("ERROR: Failed to read PHYID2 register\n");
goto errout;
}
- nllvdbg("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
+ nllinfo("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
if (phyid1 == GMII_OUI_MSB &&
(phyid2 & GMII_PHYID2_OUI_MASK) == GMII_OUI_LSB)
{
- nllvdbg(" Vendor Model Number: %04x\n",
+ nllinfo(" Vendor Model Number: %04x\n",
(phyid2 & GMII_PHYID2_MODEL_MASK) >> GMII_PHYID2_MODEL_SHIFT);
- nllvdbg(" Model Revision Number: %04x\n",
+ nllinfo(" Model Revision Number: %04x\n",
(phyid2 & GMII_PHYID2_REV_MASK) >> GMII_PHYID2_REV_SHIFT);
}
else
{
- nlldbg("ERROR: PHY not recognized: PHYID1=%04x PHYID2=%04x\n",
+ nllerr("ERROR: PHY not recognized: PHYID1=%04x PHYID2=%04x\n",
phyid1, phyid2);
}
@@ -2735,7 +2735,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, GMII_ADVERTISE, advertise);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write ADVERTISE register\n");
+ nllerr("ERROR: Failed to write ADVERTISE register\n");
goto errout;
}
@@ -2746,7 +2746,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, GMII_1000BTCR, &btcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read 1000BTCR register: %d\n", ret);
+ nllerr("ERROR: Failed to read 1000BTCR register: %d\n", ret);
goto errout;
}
@@ -2755,7 +2755,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, GMII_1000BTCR, btcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write 1000BTCR register: %d\n", ret);
+ nllerr("ERROR: Failed to write 1000BTCR register: %d\n", ret);
goto errout;
}
@@ -2764,7 +2764,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, GMII_MCR, &phyval);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MCR register: %d\n", ret);
+ nllerr("ERROR: Failed to read MCR register: %d\n", ret);
goto errout;
}
@@ -2773,11 +2773,11 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, GMII_MCR, phyval);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write MCR register: %d\n", ret);
+ nllerr("ERROR: Failed to write MCR register: %d\n", ret);
goto errout;
}
- nllvdbg(" MCR: 0x%X\n", phyval);
+ nllinfo(" MCR: 0x%X\n", phyval);
/* Wait for autonegotion to complete */
@@ -2787,7 +2787,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, GMII_MSR, &phyval);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MSR register: %d\n", ret);
+ nllerr("ERROR: Failed to read MSR register: %d\n", ret);
goto errout;
}
@@ -2797,7 +2797,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
{
/* Yes.. break out of the loop */
- nllvdbg("AutoNegotiate complete\n");
+ nllinfo("AutoNegotiate complete\n");
break;
}
@@ -2805,7 +2805,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
if (++timeout >= PHY_RETRY_MAX)
{
- nlldbg("ERROR: TimeOut\n");
+ nllerr("ERROR: TimeOut\n");
sam_phydump(priv);
ret = -ETIMEDOUT;
goto errout;
@@ -2822,7 +2822,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, GMII_1000BTSR, &btsr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read 1000BTSR register: %d\n", ret);
+ nllerr("ERROR: Failed to read 1000BTSR register: %d\n", ret);
goto errout;
}
@@ -2850,7 +2850,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, GMII_LPA, &lpa);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read LPA register: %d\n", ret);
+ nllerr("ERROR: Failed to read LPA register: %d\n", ret);
goto errout;
}
@@ -2892,7 +2892,7 @@ static int sam_autonegotiate(struct sam_gmac_s *priv)
if (++timeout >= PHY_RETRY_MAX)
{
- nlldbg("ERROR: TimeOut\n");
+ nllerr("ERROR: TimeOut\n");
sam_phydump(priv);
ret = -ETIMEDOUT;
goto errout;
@@ -3065,7 +3065,7 @@ static int sam_phyinit(struct sam_gmac_s *priv)
ret = sam_phyfind(priv, &priv->phyaddr);
if (ret < 0)
{
- nlldbg("ERROR: sam_phyfind failed: %d\n", ret);
+ nllerr("ERROR: sam_phyfind failed: %d\n", ret);
return ret;
}
@@ -3324,7 +3324,7 @@ static void sam_macaddress(struct sam_gmac_s *priv)
struct net_driver_s *dev = &priv->dev;
uint32_t regval;
- nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
@@ -3390,7 +3390,7 @@ static void sam_ipv6multicast(struct sam_gmac_s *priv)
mac[4] = tmp16 & 0xff;
mac[5] = tmp16 >> 8;
- nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
(void)sam_addmac(dev, mac);
@@ -3436,7 +3436,7 @@ static int sam_gmac_configure(struct sam_gmac_s *priv)
{
uint32_t regval;
- nllvdbg("Entry\n");
+ nllinfo("Entry\n");
/* Enable clocking to the GMAC peripheral */
@@ -3573,7 +3573,7 @@ int sam_gmac_initialize(void)
priv->txpoll = wd_create();
if (!priv->txpoll)
{
- nlldbg("ERROR: Failed to create periodic poll timer\n");
+ nllerr("ERROR: Failed to create periodic poll timer\n");
ret = -EAGAIN;
goto errout;
}
@@ -3581,7 +3581,7 @@ int sam_gmac_initialize(void)
priv->txtimeout = wd_create(); /* Create TX timeout timer */
if (!priv->txtimeout)
{
- nlldbg("ERROR: Failed to create periodic poll timer\n");
+ nllerr("ERROR: Failed to create periodic poll timer\n");
ret = -EAGAIN;
goto errout_with_txpoll;
}
@@ -3595,7 +3595,7 @@ int sam_gmac_initialize(void)
ret = sam_buffer_initialize(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_buffer_initialize failed: %d\n", ret);
+ nllerr("ERROR: sam_buffer_initialize failed: %d\n", ret);
goto errout_with_txtimeout;
}
@@ -3606,7 +3606,7 @@ int sam_gmac_initialize(void)
ret = irq_attach(SAM_IRQ_GMAC, sam_gmac_interrupt);
if (ret < 0)
{
- nlldbg("ERROR: Failed to attach the handler to the IRQ%d\n", SAM_IRQ_GMAC);
+ nllerr("ERROR: Failed to attach the handler to the IRQ%d\n", SAM_IRQ_GMAC);
goto errout_with_buffers;
}
@@ -3619,7 +3619,7 @@ int sam_gmac_initialize(void)
ret = sam_ifdown(&priv->dev);
if (ret < 0)
{
- nlldbg("ERROR: Failed to put the interface in the down state: %d\n", ret);
+ nllerr("ERROR: Failed to put the interface in the down state: %d\n", ret);
goto errout_with_buffers;
}
@@ -3631,7 +3631,7 @@ int sam_gmac_initialize(void)
return ret;
}
- nlldbg("ERROR: netdev_register() failed: %d\n", ret);
+ nllerr("ERROR: netdev_register() failed: %d\n", ret);
errout_with_buffers:
sam_buffer_free(priv);
diff --git a/arch/arm/src/sama5/sam_hsmci.c b/arch/arm/src/sama5/sam_hsmci.c
index 54a7e34d9a5cc1ea69bf190ad6d3f65f6dae6431..5bb44bec4d00e24f632bb506c97d16f49ccfb7b7 100644
--- a/arch/arm/src/sama5/sam_hsmci.c
+++ b/arch/arm/src/sama5/sam_hsmci.c
@@ -162,7 +162,7 @@
# error "This driver requires CONFIG_SDIO_BLOCKSETUP"
#endif
-#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_VERBOSE)
+#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_INFO)
# undef CONFIG_SAMA5_HSMCI_CMDDEBUG
# undef CONFIG_SAMA5_HSMCI_XFRDEBUG
#endif
@@ -725,7 +725,7 @@ static bool sam_checkreg(struct sam_dev_s *priv, bool wr, uint32_t value,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -758,7 +758,7 @@ static inline uint32_t sam_getreg(struct sam_dev_s *priv, unsigned int offset)
#ifdef CONFIG_SAMA5_HSMCI_REGDEBUG
if (sam_checkreg(priv, false, value, address))
{
- lldbg("%08x->%08x\n", address, value);
+ llerr("%08x->%08x\n", address, value);
}
#endif
@@ -781,7 +781,7 @@ static inline void sam_putreg(struct sam_dev_s *priv, uint32_t value,
#ifdef CONFIG_SAMA5_HSMCI_REGDEBUG
if (sam_checkreg(priv, true, value, address))
{
- lldbg("%08x<-%08x\n", address, value);
+ llerr("%08x<-%08x\n", address, value);
}
#endif
@@ -1003,23 +1003,23 @@ static void sam_hsmcisample(struct sam_dev_s *priv,
static void sam_hsmcidump(struct sam_dev_s *priv,
struct sam_hsmciregs_s *regs, const char *msg)
{
- fdbg("HSMCI Registers: %s\n", msg);
- fdbg(" MR[%08x]: %08x\n", priv->base + SAM_HSMCI_MR_OFFSET, regs->mr);
- fdbg(" DTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_DTOR_OFFSET, regs->dtor);
- fdbg(" SDCR[%08x]: %08x\n", priv->base + SAM_HSMCI_SDCR_OFFSET, regs->sdcr);
- fdbg(" ARGR[%08x]: %08x\n", priv->base + SAM_HSMCI_ARGR_OFFSET, regs->argr);
- fdbg(" BLKR[%08x]: %08x\n", priv->base + SAM_HSMCI_BLKR_OFFSET, regs->blkr);
- fdbg(" CSTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_CSTOR_OFFSET, regs->cstor);
- fdbg(" RSPR0[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR0_OFFSET, regs->rsp0);
- fdbg(" RSPR1[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR1_OFFSET, regs->rsp1);
- fdbg(" RSPR2[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR2_OFFSET, regs->rsp2);
- fdbg(" RSPR3[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR3_OFFSET, regs->rsp3);
- fdbg(" SR[%08x]: %08x\n", priv->base + SAM_HSMCI_SR_OFFSET, regs->sr);
- fdbg(" IMR[%08x]: %08x\n", priv->base + SAM_HSMCI_IMR_OFFSET, regs->imr);
- fdbg(" DMA[%08x]: %08x\n", priv->base + SAM_HSMCI_DMA_OFFSET, regs->dma);
- fdbg(" CFG[%08x]: %08x\n", priv->base + SAM_HSMCI_CFG_OFFSET, regs->cfg);
- fdbg(" WPMR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPMR_OFFSET, regs->wpmr);
- fdbg(" WPSR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPSR_OFFSET, regs->wpsr);
+ ferr("HSMCI Registers: %s\n", msg);
+ ferr(" MR[%08x]: %08x\n", priv->base + SAM_HSMCI_MR_OFFSET, regs->mr);
+ ferr(" DTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_DTOR_OFFSET, regs->dtor);
+ ferr(" SDCR[%08x]: %08x\n", priv->base + SAM_HSMCI_SDCR_OFFSET, regs->sdcr);
+ ferr(" ARGR[%08x]: %08x\n", priv->base + SAM_HSMCI_ARGR_OFFSET, regs->argr);
+ ferr(" BLKR[%08x]: %08x\n", priv->base + SAM_HSMCI_BLKR_OFFSET, regs->blkr);
+ ferr(" CSTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_CSTOR_OFFSET, regs->cstor);
+ ferr(" RSPR0[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR0_OFFSET, regs->rsp0);
+ ferr(" RSPR1[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR1_OFFSET, regs->rsp1);
+ ferr(" RSPR2[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR2_OFFSET, regs->rsp2);
+ ferr(" RSPR3[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR3_OFFSET, regs->rsp3);
+ ferr(" SR[%08x]: %08x\n", priv->base + SAM_HSMCI_SR_OFFSET, regs->sr);
+ ferr(" IMR[%08x]: %08x\n", priv->base + SAM_HSMCI_IMR_OFFSET, regs->imr);
+ ferr(" DMA[%08x]: %08x\n", priv->base + SAM_HSMCI_DMA_OFFSET, regs->dma);
+ ferr(" CFG[%08x]: %08x\n", priv->base + SAM_HSMCI_CFG_OFFSET, regs->cfg);
+ ferr(" WPMR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPMR_OFFSET, regs->wpmr);
+ ferr(" WPSR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPSR_OFFSET, regs->wpsr);
}
#endif
@@ -1093,7 +1093,7 @@ static void sam_xfrdumpone(struct sam_dev_s *priv, int index,
}
else
{
- fdbg("%s: Not collected\n", msg);
+ ferr("%s: Not collected\n", msg);
}
}
#endif
@@ -1237,7 +1237,7 @@ static void sam_dmacallback(DMA_HANDLE handle, void *arg, int result)
if (result < 0)
{
wkupevent = (result == -ETIMEDOUT ? SDIOWAIT_TIMEOUT : SDIOWAIT_ERROR);
- flldbg("ERROR: DMA failed: result=%d wkupevent=%04x\n", result, wkupevent);
+ fllerr("ERROR: DMA failed: result=%d wkupevent=%04x\n", result, wkupevent);
/* sam_endtransfer will terminate the transfer and wait up the waiting
* client in this case.
@@ -1337,7 +1337,7 @@ static void sam_eventtimeout(int argc, uint32_t arg)
/* Yes.. wake up any waiting threads */
sam_endwait(priv, SDIOWAIT_TIMEOUT);
- flldbg("ERROR: Timeout\n");
+ fllerr("ERROR: Timeout\n");
}
}
@@ -1537,7 +1537,7 @@ static int sam_hsmci_interrupt(struct sam_dev_s *priv)
{
/* Yes.. Was it some kind of timeout error? */
- flldbg("ERROR: enabled: %08x pending: %08x\n", enabled, pending);
+ fllerr("ERROR: enabled: %08x pending: %08x\n", enabled, pending);
if ((pending & HSMCI_DATA_TIMEOUT_ERRORS) != 0)
{
/* Yes.. Terminate with a timeout. */
@@ -1609,7 +1609,7 @@ static int sam_hsmci_interrupt(struct sam_dev_s *priv)
{
/* Yes.. Was the error some kind of timeout? */
- fllvdbg("ERROR: events: %08x SR: %08x\n",
+ fllinfo("ERROR: events: %08x SR: %08x\n",
priv->cmdrmask, enabled);
if ((pending & HSMCI_RESPONSE_TIMEOUT_ERRORS) != 0)
@@ -2090,7 +2090,7 @@ static int sam_sendcmd(FAR struct sdio_dev_s *dev,
/* Write the fully decorated command to CMDR */
- fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+ finfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
sam_putreg(priv, regval, SAM_HSMCI_CMDR_OFFSET);
sam_cmdsample1(priv, SAMPLENDX_AFTER_CMDR);
return OK;
@@ -2253,7 +2253,7 @@ static int sam_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer,
{
/* Some fatal error has occurred */
- fdbg("ERROR: sr %08x\n", sr);
+ ferr("ERROR: sr %08x\n", sr);
return -EIO;
}
else if ((sr & HSMCI_INT_TXRDY) != 0)
@@ -2388,7 +2388,7 @@ static int sam_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
{
/* Yes.. Was the error some kind of timeout? */
- fdbg("ERROR: cmd: %08x events: %08x SR: %08x\n",
+ ferr("ERROR: cmd: %08x events: %08x SR: %08x\n",
cmd, priv->cmdrmask, sr);
if ((pending & HSMCI_RESPONSE_TIMEOUT_ERRORS) != 0)
@@ -2418,7 +2418,7 @@ static int sam_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
}
else if (--timeout <= 0)
{
- fdbg("ERROR: Timeout cmd: %08x events: %08x SR: %08x\n",
+ ferr("ERROR: Timeout cmd: %08x events: %08x SR: %08x\n",
cmd, priv->cmdrmask, sr);
priv->wkupevent = SDIOWAIT_TIMEOUT;
@@ -2490,10 +2490,10 @@ static int sam_recvshort(FAR struct sdio_dev_s *dev,
* 0 1 End bit
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!rshort)
{
- fdbg("ERROR: rshort=NULL\n");
+ ferr("ERROR: rshort=NULL\n");
ret = -EINVAL;
}
@@ -2505,7 +2505,7 @@ static int sam_recvshort(FAR struct sdio_dev_s *dev,
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2550,12 +2550,12 @@ static int sam_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlong
* 0 1 End bit
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Check that R1 is the correct response to this command */
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2746,7 +2746,7 @@ static sdio_eventset_t sam_eventwait(FAR struct sdio_dev_s *dev,
1, (uint32_t)priv);
if (ret != OK)
{
- fdbg("ERROR: wd_start failed: %d\n", ret);
+ ferr("ERROR: wd_start failed: %d\n", ret);
}
}
@@ -2812,7 +2812,7 @@ static void sam_callbackenable(FAR struct sdio_dev_s *dev,
{
struct sam_dev_s *priv = (struct sam_dev_s *)dev;
- fvdbg("eventset: %02x\n", eventset);
+ finfo("eventset: %02x\n", eventset);
DEBUGASSERT(priv != NULL);
priv->cbevents = eventset;
@@ -2848,7 +2848,7 @@ static int sam_registercallback(FAR struct sdio_dev_s *dev,
/* Disable callbacks and register this callback and is argument */
- fvdbg("Register %p(%p)\n", callback, arg);
+ finfo("Register %p(%p)\n", callback, arg);
DEBUGASSERT(priv != NULL);
priv->cbevents = 0;
@@ -3095,7 +3095,7 @@ static void sam_callback(void *arg)
/* Is a callback registered? */
DEBUGASSERT(priv != NULL);
- fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
+ finfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
flags = enter_critical_section();
@@ -3150,17 +3150,17 @@ static void sam_callback(void *arg)
{
/* NOTE: Currently, work_cancel only returns success */
- fdbg("ERROR: Failed to cancel work: %d\n", ret);
+ ferr("ERROR: Failed to cancel work: %d\n", ret);
}
- fllvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
+ fllinfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
ret = work_queue(LPWORK, &priv->cbwork, (worker_t)priv->callback,
priv->cbarg, 0);
if (ret < 0)
{
/* NOTE: Currently, work_queue only returns success */
- fdbg("ERROR: Failed to schedule work: %d\n", ret);
+ ferr("ERROR: Failed to schedule work: %d\n", ret);
}
}
@@ -3199,7 +3199,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
* for now, an* HSMCI peripheral does correspond to a slot.
*/
- fdbg("slotno: %d\n", slotno);
+ ferr("slotno: %d\n", slotno);
#ifdef CONFIG_SAMA5_HSMCI0
if (slotno == 0)
@@ -3323,7 +3323,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
return NULL;
}
- fvdbg("priv: %p base: %08x hsmci: %d dmac: %d pid: %d\n",
+ finfo("priv: %p base: %08x hsmci: %d dmac: %d pid: %d\n",
priv, priv->base, priv->hsmci, dmac, pid);
/* Initialize the HSMCI slot structure */
@@ -3393,7 +3393,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
priv->cdstatus &= ~SDIO_STATUS_PRESENT;
}
- fllvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
+ fllinfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
/* Perform any requested callback if the status has changed */
@@ -3438,7 +3438,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
}
- fvdbg("cdstatus: %02x\n", priv->cdstatus);
+ finfo("cdstatus: %02x\n", priv->cdstatus);
leave_critical_section(flags);
}
diff --git a/arch/arm/src/sama5/sam_irq.c b/arch/arm/src/sama5/sam_irq.c
index 21ce68ff236dbe29458a80cc8d4ba9fde796d940..e9824e2aa7051b769f90bc95eb23e0d0c4a95272 100644
--- a/arch/arm/src/sama5/sam_irq.c
+++ b/arch/arm/src/sama5/sam_irq.c
@@ -131,7 +131,7 @@ static void sam_dumpaic(const char *msg, uintptr_t base, int irq)
irqstate_t flags;
flags = enter_critical_section();
- lldbg("AIC (%s, base=%08x irq=%d):\n", msg, base, irq);
+ llerr("AIC (%s, base=%08x irq=%d):\n", msg, base, irq);
/* Select the register set associated with this irq */
@@ -139,15 +139,15 @@ static void sam_dumpaic(const char *msg, uintptr_t base, int irq)
/* Then dump all of the (readable) register contents */
- lldbg(" SSR: %08x SMR: %08x SVR: %08x IVR: %08x\n",
+ llerr(" SSR: %08x SMR: %08x SVR: %08x IVR: %08x\n",
getreg32(base + SAM_AIC_SSR_OFFSET),
getreg32(base + SAM_AIC_SMR_OFFSET),
getreg32(base + SAM_AIC_SVR_OFFSET),
getreg32(base + SAM_AIC_IVR_OFFSET));
- lldbg(" FVR: %08x ISR: %08x\n",
+ llerr(" FVR: %08x ISR: %08x\n",
getreg32(base + SAM_AIC_FVR_OFFSET),
getreg32(base + SAM_AIC_ISR_OFFSET));
- lldbg(" IPR: %08x %08x %08x %08x\n",
+ llerr(" IPR: %08x %08x %08x %08x\n",
getreg32(base + SAM_AIC_IPR0_OFFSET),
getreg32(base + SAM_AIC_IPR1_OFFSET),
getreg32(base + SAM_AIC_IPR2_OFFSET),
@@ -156,19 +156,19 @@ static void sam_dumpaic(const char *msg, uintptr_t base, int irq)
/* SAMA5D4 does not have the FFSR register */
#if defined(SAM_AIC_FFSR)
- lldbg(" IMR: %08x CISR: %08x SPU: %08x FFSR: %08x\n",
+ llerr(" IMR: %08x CISR: %08x SPU: %08x FFSR: %08x\n",
getreg32(base + SAM_AIC_IMR_OFFSET),
getreg32(base + SAM_AIC_CISR_OFFSET),
getreg32(base + SAM_AIC_SPU_OFFSET),
getreg32(base + SAM_AIC_FFSR_OFFSET));
#else
- lldbg(" IMR: %08x CISR: %08x SPU: %08x\n",
+ llerr(" IMR: %08x CISR: %08x SPU: %08x\n",
getreg32(base + SAM_AIC_IMR_OFFSET),
getreg32(base + SAM_AIC_CISR_OFFSET),
getreg32(base + SAM_AIC_SPU_OFFSET));
#endif
- lldbg(" DCR: %08x WPMR: %08x WPSR: %08x\n",
+ llerr(" DCR: %08x WPMR: %08x WPSR: %08x\n",
getreg32(base + SAM_AIC_DCR_OFFSET),
getreg32(base + SAM_AIC_WPMR_OFFSET),
getreg32(base + SAM_AIC_WPSR_OFFSET));
@@ -235,7 +235,7 @@ static uint32_t *sam_spurious(int irq, uint32_t *regs)
*/
#if defined(CONFIG_DEBUG_IRQ)
- lldbg("Spurious interrupt: IRQ %d\n", irq);
+ llerr("Spurious interrupt: IRQ %d\n", irq);
#endif
return regs;
}
@@ -331,7 +331,7 @@ static void sam_aic_redirection(void)
/* Check if redirection was successfully enabled */
regval = getreg32(SAM_SFR_AICREDIR);
- lldbg("Interrupts %s redirected to the AIC\n",
+ llerr("Interrupts %s redirected to the AIC\n",
(regval & SFR_AICREDIR_ENABLE) != 0 ? "ARE" : "NOT");
#endif
}
diff --git a/arch/arm/src/sama5/sam_isi.c b/arch/arm/src/sama5/sam_isi.c
index 124734a416cc389bcd6b6871659a14512b41d5b2..86fa8e0dad8d7393a0f32735577d25117b27657f 100644
--- a/arch/arm/src/sama5/sam_isi.c
+++ b/arch/arm/src/sama5/sam_isi.c
@@ -160,7 +160,7 @@ int sam_isi_initialize(void)
*/
g_isi.actual = sam_pck_configure(ISI_PCKID, PCKSRC_MCK, CONFIG_ISI_MCKFREQ);
- gvdbg("PCK%d frequency=%d actual=%d\n",
+ ginfo("PCK%d frequency=%d actual=%d\n",
ISI_PCKID, CONFIG_ISI_MCKFREQ, g_isi.actual);
/* Enable the MCK (output) */
diff --git a/arch/arm/src/sama5/sam_lcd.c b/arch/arm/src/sama5/sam_lcd.c
index 8032bb04f46620ecca0d016172e76035870e1046..b1a0fd97604ba0e74713897aa51c4441190dca43 100644
--- a/arch/arm/src/sama5/sam_lcd.c
+++ b/arch/arm/src/sama5/sam_lcd.c
@@ -492,7 +492,7 @@
/* Debug */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_SAMA5_LCDC_REGDEBUG
#endif
@@ -666,7 +666,7 @@ struct sam_lcdc_s
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_SAMA5_LCDC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMA5_LCDC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static bool sam_checkreg(bool wr, uint32_t regval, uintptr_t address);
static uint32_t sam_getreg(uintptr_t addr);
static void sam_putreg(uintptr_t addr, uint32_t val);
@@ -1021,7 +1021,7 @@ static bool sam_checkreg(bool wr, uint32_t regval, uintptr_t address)
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", g_lcdc.ntimes);
+ llerr("...[Repeats %d times]...\n", g_lcdc.ntimes);
}
/* Save information about the new access */
@@ -1053,7 +1053,7 @@ static uint32_t sam_getreg(uintptr_t address)
if (sam_checkreg(false, regval, address))
{
- lldbg("%08x->%08x\n", address, regval);
+ llerr("%08x->%08x\n", address, regval);
}
return regval;
@@ -1073,7 +1073,7 @@ static void sam_putreg(uintptr_t address, uint32_t regval)
{
if (sam_checkreg(true, regval, address))
{
- lldbg("%08x<-%08x\n", address, regval);
+ llerr("%08x<-%08x\n", address, regval);
}
putreg32(regval, address);
@@ -1101,14 +1101,14 @@ static void sam_wait_lcdstatus(uint32_t mask, uint32_t value)
static int sam_base_getvideoinfo(struct fb_vtable_s *vtable,
struct fb_videoinfo_s *vinfo)
{
- gvdbg("vtable=%p vinfo=%p\n", vtable, vinfo);
+ ginfo("vtable=%p vinfo=%p\n", vtable, vinfo);
if (vtable && vinfo)
{
memcpy(vinfo, &g_base_videoinfo, sizeof(struct fb_videoinfo_s));
return OK;
}
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@@ -1119,7 +1119,7 @@ static int sam_base_getvideoinfo(struct fb_vtable_s *vtable,
static int sam_base_getplaneinfo(struct fb_vtable_s *vtable, int planeno,
struct fb_planeinfo_s *pinfo)
{
- gvdbg("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
+ ginfo("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
if (vtable && planeno == 0 && pinfo)
{
pinfo->fbmem = (void *)LAYER_BASE.framebuffer;
@@ -1130,7 +1130,7 @@ static int sam_base_getplaneinfo(struct fb_vtable_s *vtable, int planeno,
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -1166,27 +1166,27 @@ static int sam_base_putcmap(struct fb_vtable_s *vtable,
static int sam_hcr_getcursor(struct fb_vtable_s *vtable,
struct fb_cursorattrib_s *attrib)
{
- gvdbg("vtable=%p attrib=%p\n", vtable, attrib);
+ ginfo("vtable=%p attrib=%p\n", vtable, attrib);
if (vtable && attrib)
{
#ifdef CONFIG_FB_HWCURSORIMAGE
attrib->fmt = SAMA5_HCR_COLOR_FMT;
#endif
- gvdbg("pos: (x=%d, y=%d)\n", g_lcdc.cpos.x, g_lcdc.cpos.y);
+ ginfo("pos: (x=%d, y=%d)\n", g_lcdc.cpos.x, g_lcdc.cpos.y);
attrib->pos = g_lcdc.cpos;
#ifdef CONFIG_FB_HWCURSORSIZE
attrib->mxsize.h = CONFIG_SAMA5_LCDC_HCR_HEIGHT;
attrib->mxsize.w = CONFIG_SAMA5_LCDC_HCR_WIDTH;
- gvdbg("size: (h=%d, w=%d)\n", g_lcdc.csize.h, g_lcdc.csize.w);
+ ginfo("size: (h=%d, w=%d)\n", g_lcdc.csize.h, g_lcdc.csize.w);
attrib->size = g_lcdc.csize;
#endif
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
#endif
@@ -1199,26 +1199,26 @@ static int sam_hcr_getcursor(struct fb_vtable_s *vtable,
static int sam_hcr_setcursor(struct fb_vtable_s *vtable,
struct fb_setcursor_s *setttings)
{
- gvdbg("vtable=%p setttings=%p\n", vtable, setttings);
+ ginfo("vtable=%p setttings=%p\n", vtable, setttings);
if (vtable && setttings)
{
- gvdbg("flags: %02x\n", settings->flags);
+ ginfo("flags: %02x\n", settings->flags);
if ((flags & FB_CUR_SETPOSITION) != 0)
{
g_lcdc.cpos = settings->pos;
- gvdbg("pos: (h:%d, w:%d)\n", g_lcdc.cpos.x, g_lcdc.cpos.y);
+ ginfo("pos: (h:%d, w:%d)\n", g_lcdc.cpos.x, g_lcdc.cpos.y);
}
#ifdef CONFIG_FB_HWCURSORSIZE
if ((flags & FB_CUR_SETSIZE) != 0)
{
g_lcdc.csize = settings->size;
- gvdbg("size: (h:%d, w:%d)\n", g_lcdc.csize.h, g_lcdc.csize.w);
+ ginfo("size: (h:%d, w:%d)\n", g_lcdc.csize.h, g_lcdc.csize.w);
}
#endif
#ifdef CONFIG_FB_HWCURSORIMAGE
if ((flags & FB_CUR_SETIMAGE) != 0)
{
- gvdbg("image: (h:%d, w:%d) @ %p\n",
+ ginfo("image: (h:%d, w:%d) @ %p\n",
settings->img.height, settings->img.width,
settings->img.image);
}
@@ -1226,7 +1226,7 @@ static int sam_hcr_setcursor(struct fb_vtable_s *vtable,
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
#endif
@@ -1291,12 +1291,12 @@ static void sam_dmasetup(int lid, struct sam_dscr_s *dscr, uint8_t *buffer)
sam_putreg(g_layernext[lid], physdscr);
}
-#if defined(CONFIG_DEBUG_GRAPHICS) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_GRAPHICS) && defined(CONFIG_DEBUG_INFO)
/* Dump the DMA setup */
- gvdbg("DMA descriptor: addr=%08x ctrl=%08x next=%08x\n",
+ ginfo("DMA descriptor: addr=%08x ctrl=%08x next=%08x\n",
dscr->addr, dscr->ctrl, dscr->next);
- gvdbg("DMA registers[%d]: head=%08x addr=%08x ctrl=%08x next=%08x\n",
+ ginfo("DMA registers[%d]: head=%08x addr=%08x ctrl=%08x next=%08x\n",
lid, sam_getreg(g_layerhead[lid]), sam_getreg(g_layeraddr[lid]),
sam_getreg(g_layerctrl[lid]), sam_getreg(g_layernext[lid]));
#endif
@@ -1379,7 +1379,7 @@ static int sam_setclut(struct sam_layer_s *layer,
unsigned int end;
int i;
- gvdbg("layer=%d cmap=%p first=%d len=%d\n",
+ ginfo("layer=%d cmap=%p first=%d len=%d\n",
layer->lid, cmap, cmap->first, cmap->len);
DEBUGASSERT(layer && cmap);
@@ -1391,7 +1391,7 @@ static int sam_setclut(struct sam_layer_s *layer,
if (offset >= SAM_LCDC_NCLUT)
{
- gdbg("ERROR: CLUT offset is out of range: %d\n", offset);
+ gerr("ERROR: CLUT offset is out of range: %d\n", offset);
return -EINVAL;
}
@@ -1460,7 +1460,7 @@ static int sam_getclut(struct sam_layer_s *layer,
uintptr_t regval;
int i;
- gvdbg("layer=%d cmap=%p first=%d len=%d\n",
+ ginfo("layer=%d cmap=%p first=%d len=%d\n",
layer->lid, cmap, layer->offset, layer->nclut);
DEBUGASSERT(layer && cmap);
@@ -1514,7 +1514,7 @@ static void sam_pio_config(void)
{
int i;
- gvdbg("Configuring pins\n");
+ ginfo("Configuring pins\n");
/* Configure each pin */
@@ -2915,7 +2915,7 @@ int up_fbinitialize(int display)
uint32_t regval;
#endif
- gvdbg("Entry\n");
+ ginfo("Entry\n");
/* Configure layer layer structures, DMA descriptor memory, and
* framebuffers
@@ -2931,7 +2931,7 @@ int up_fbinitialize(int display)
sam_pio_config();
- gvdbg("Configuring the LCD controller\n");
+ ginfo("Configuring the LCD controller\n");
/* Enable the LCD peripheral clock */
@@ -2959,7 +2959,7 @@ int up_fbinitialize(int display)
/* And turn the LCD on */
- gvdbg("Enabling the display\n");
+ ginfo("Enabling the display\n");
sam_lcd_enable();
/* Display base layer */
@@ -3012,7 +3012,7 @@ int up_fbinitialize(int display)
FAR struct fb_vtable_s *up_fbgetvplane(int display, int vplane)
{
- gvdbg("vplane: %d\n", vplane);
+ ginfo("vplane: %d\n", vplane);
if (vplane == 0)
{
return (struct fb_vtable_s *)&g_base_vtable;
@@ -3062,7 +3062,7 @@ void sam_lcdclear(nxgl_mxpixel_t color)
uint16_t *dest = (uint16_t *)LAYER_BASE.framebuffer;
int i;
- gvdbg("Clearing display: BPP=16 color=%04x framebuffer=%08x size=%d\n",
+ ginfo("Clearing display: BPP=16 color=%04x framebuffer=%08x size=%d\n",
color, LAYER_BASE.framebuffer, SAMA5_BASE_FBSIZE);
for (i = 0; i < SAMA5_BASE_FBSIZE; i += sizeof(uint16_t))
@@ -3076,7 +3076,7 @@ void sam_lcdclear(nxgl_mxpixel_t color)
uint8_t b;
int i;
- gvdbg("Clearing display: BPP=24 color=%06x framebuffer=%08x size=%d\n",
+ ginfo("Clearing display: BPP=24 color=%06x framebuffer=%08x size=%d\n",
color, LAYER_BASE.framebuffer, SAMA5_BASE_FBSIZE);
b = color & 0xff;
@@ -3093,7 +3093,7 @@ void sam_lcdclear(nxgl_mxpixel_t color)
uint32_t *dest = (uint32_t *)LAYER_BASE.framebuffer;
int i;
- gvdbg("Clearing display: BPP=32 color=%08x framebuffer=%08x size=%d\n",
+ ginfo("Clearing display: BPP=32 color=%08x framebuffer=%08x size=%d\n",
color, LAYER_BASE.framebuffer, SAMA5_BASE_FBSIZE);
for (i = 0; i < SAMA5_BASE_FBSIZE; i += sizeof(uint32_t))
diff --git a/arch/arm/src/sama5/sam_memories.c b/arch/arm/src/sama5/sam_memories.c
index 231545ed55928a05a83286315d8c69ebcb21805f..d6b18aa7921aeeabd4b186cea3321d6769ba958f 100644
--- a/arch/arm/src/sama5/sam_memories.c
+++ b/arch/arm/src/sama5/sam_memories.c
@@ -766,7 +766,7 @@ uintptr_t sam_physregaddr(uintptr_t virtregaddr)
* address
*/
- dbg("Bad virtual address: %08lx\n", virtregaddr);
+ err("Bad virtual address: %08lx\n", virtregaddr);
DEBUGPANIC();
return virtregaddr;
}
@@ -925,7 +925,7 @@ uintptr_t sam_physramaddr(uintptr_t virtramaddr)
if (virtramaddr != 0)
{
- dbg("Bad virtual address: %08lx\n", virtramaddr);
+ err("Bad virtual address: %08lx\n", virtramaddr);
DEBUGPANIC();
}
@@ -1058,7 +1058,7 @@ uintptr_t sam_virtramaddr(uintptr_t physramaddr)
if (physramaddr != 0)
{
- dbg("Bad physical address: %08lx\n|", physramaddr);
+ err("Bad physical address: %08lx\n|", physramaddr);
DEBUGPANIC();
}
diff --git a/arch/arm/src/sama5/sam_nand.c b/arch/arm/src/sama5/sam_nand.c
index d5d235d21685c828b942afc4098d483a6a9dec6a..425120b8d393665f1bdda27288150b716402febf 100644
--- a/arch/arm/src/sama5/sam_nand.c
+++ b/arch/arm/src/sama5/sam_nand.c
@@ -999,7 +999,7 @@ static uint32_t nand_nfc_poll(void)
sr = nand_getreg(SAM_HSMC_SR);
#ifndef CONFIG_SAMA5_NAND_REGDEBUG
- // fllvdbg("sr=%08x\n", sr);
+ // fllinfo("sr=%08x\n", sr);
#endif
/* When set to one, this XFRDONE indicates that the NFC has terminated
@@ -1065,7 +1065,7 @@ static int hsmc_interrupt(int irq, void *context)
uint32_t pending = sr & imr;
#ifndef CONFIG_SAMA5_NAND_REGDEBUG
- fllvdbg("sr=%08x imr=%08x\n", sr, imr);
+ fllinfo("sr=%08x imr=%08x\n", sr, imr);
#endif
/* When set to one, this XFRDONE indicates that the NFC has terminated
@@ -1163,7 +1163,7 @@ static void nand_dma_sampleinit(struct sam_nandcs_s *priv)
#ifdef CONFIG_SAMA5_NAND_DMADEBUG
static void nand_dma_sampledone(struct sam_nandcs_s *priv, int result)
{
- lldbg("result: %d\n", result);
+ llerr("result: %d\n", result);
/* Sample the final registers */
@@ -1233,7 +1233,7 @@ static int nand_wait_dma(struct sam_nandcs_s *priv)
}
}
- fvdbg("Awakened: result=%d\n", priv->result);
+ finfo("Awakened: result=%d\n", priv->result);
priv->dmadone = false;
return priv->result;
}
@@ -1293,7 +1293,7 @@ static int nand_dma_read(struct sam_nandcs_s *priv,
DEBUGASSERT(priv->dma);
- fvdbg("vsrc=%08x vdest=%08x nbytes=%d\n",
+ finfo("vsrc=%08x vdest=%08x nbytes=%d\n",
(int)vsrc, (int)vdest, (int)nbytes);
/* Initialize sampling */
@@ -1325,7 +1325,7 @@ static int nand_dma_read(struct sam_nandcs_s *priv,
ret = sam_dmarxsetup(priv->dma, psrc, pdest, nbytes);
if (ret < 0)
{
- fdbg("ERROR: sam_dmarxsetup failed: %d\n", ret);
+ ferr("ERROR: sam_dmarxsetup failed: %d\n", ret);
return ret;
}
@@ -1344,7 +1344,7 @@ static int nand_dma_read(struct sam_nandcs_s *priv,
ret = nand_wait_dma(priv);
if (ret < 0)
{
- fdbg("ERROR: DMA failed: %d\n", ret);
+ ferr("ERROR: DMA failed: %d\n", ret);
}
nand_dma_sample(priv, DMA_END_TRANSFER);
@@ -1410,7 +1410,7 @@ static int nand_dma_write(struct sam_nandcs_s *priv,
ret = sam_dmatxsetup(priv->dma, pdest, psrc, nbytes);
if (ret < 0)
{
- fdbg("ERROR: sam_dmatxsetup failed: %d\n", ret);
+ ferr("ERROR: sam_dmatxsetup failed: %d\n", ret);
return ret;
}
@@ -1429,7 +1429,7 @@ static int nand_dma_write(struct sam_nandcs_s *priv,
ret = nand_wait_dma(priv);
if (ret < 0)
{
- fdbg("ERROR: DMA failed: %d\n", ret);
+ ferr("ERROR: DMA failed: %d\n", ret);
}
nand_dma_sample(priv, DMA_END_TRANSFER);
@@ -1463,7 +1463,7 @@ static int nand_nfcsram_read(struct sam_nandcs_s *priv, uint8_t *buffer,
int remaining;
int ret;
- fvdbg("buffer=%p buflen=%d\n", buffer, buflen);
+ finfo("buffer=%p buflen=%d\n", buffer, buflen);
/* Get the offset data source address */
@@ -1530,7 +1530,7 @@ static int nand_read(struct sam_nandcs_s *priv, uint8_t *buffer,
int buswidth;
int ret;
- fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+ finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
/* Get the buswidth */
@@ -1622,7 +1622,7 @@ static int nand_read_pmecc(struct sam_nandcs_s *priv, off_t block,
uint16_t sparesize;
int ret;
- fvdbg("block=%d page=%d data=%p\n", (int)block, page, data);
+ finfo("block=%d page=%d data=%p\n", (int)block, page, data);
DEBUGASSERT(priv && data);
/* Get page and spare sizes */
@@ -1655,7 +1655,7 @@ static int nand_read_pmecc(struct sam_nandcs_s *priv, off_t block,
break;
default:
- fdbg("ERROR: Unsupported page size: %d\n", pagesize);
+ ferr("ERROR: Unsupported page size: %d\n", pagesize);
return -EINVAL;
}
@@ -1719,7 +1719,7 @@ static int nand_read_pmecc(struct sam_nandcs_s *priv, off_t block,
#endif
if (ret < 0)
{
- fdbg("ERROR: nand_read for data region failed: %d\n", ret);
+ ferr("ERROR: nand_read for data region failed: %d\n", ret);
return ret;
}
@@ -1732,7 +1732,7 @@ static int nand_read_pmecc(struct sam_nandcs_s *priv, off_t block,
#endif
if (ret < 0)
{
- fdbg("ERROR: nand_read for spare region failed: %d\n", ret);
+ ferr("ERROR: nand_read for spare region failed: %d\n", ret);
return ret;
}
@@ -1765,7 +1765,7 @@ static int nand_nfcsram_write(struct sam_nandcs_s *priv, uint8_t *buffer,
uintptr_t dest;
int ret;
- fvdbg("buffer=%p buflen=%d offset=%d\n", buffer, buflen, offset);
+ finfo("buffer=%p buflen=%d offset=%d\n", buffer, buflen, offset);
nand_dump("NFC SRAM Write", buffer, buflen);
/* Apply the offset to the destination address */
@@ -1829,7 +1829,7 @@ static int nand_write(struct sam_nandcs_s *priv, uint8_t *buffer,
int buswidth;
int ret;
- fvdbg("buffer=%p buflen=%d offset=%d\n", buffer, buflen, offset);
+ finfo("buffer=%p buflen=%d offset=%d\n", buffer, buflen, offset);
nand_dump("NAND Write", buffer, buflen);
/* Apply the offset to the destination address */
@@ -1924,7 +1924,7 @@ static int nand_readpage_noecc(struct sam_nandcs_s *priv, off_t block,
off_t coladdr;
int ret;
- fvdbg("block=%d page=%d data=%p spare=%p\n", (int)block, page, data, spare);
+ finfo("block=%d page=%d data=%p spare=%p\n", (int)block, page, data, spare);
DEBUGASSERT(priv && (data || spare));
/* Get page and spare sizes */
@@ -1957,7 +1957,7 @@ static int nand_readpage_noecc(struct sam_nandcs_s *priv, off_t block,
break;
default:
- fdbg("ERROR: Unsupported page size: %d\n", pagesize);
+ ferr("ERROR: Unsupported page size: %d\n", pagesize);
return -EINVAL;
}
@@ -1987,7 +1987,7 @@ static int nand_readpage_noecc(struct sam_nandcs_s *priv, off_t block,
ret = nand_nfcsram_read(priv, (uint8_t *)data, pagesize, 0);
if (ret < 0)
{
- fdbg("ERROR: nand_nfcsram_read for data region failed: %d\n", ret);
+ ferr("ERROR: nand_nfcsram_read for data region failed: %d\n", ret);
return ret;
}
}
@@ -2003,7 +2003,7 @@ static int nand_readpage_noecc(struct sam_nandcs_s *priv, off_t block,
ret = nand_nfcsram_read(priv, (uint8_t *)spare, sparesize, offset);
if (ret < 0)
{
- fdbg("ERROR: nand_nfcsram_read for spare region failed: %d\n", ret);
+ ferr("ERROR: nand_nfcsram_read for spare region failed: %d\n", ret);
return ret;
}
}
@@ -2038,7 +2038,7 @@ static int nand_readpage_pmecc(struct sam_nandcs_s *priv, off_t block,
int ret;
int i;
- fvdbg("block=%d page=%d data=%p\n", (int)block, page, data);
+ finfo("block=%d page=%d data=%p\n", (int)block, page, data);
DEBUGASSERT(priv && data);
/* Make sure that we have exclusive access to the PMECC and that the PMECC
@@ -2049,7 +2049,7 @@ static int nand_readpage_pmecc(struct sam_nandcs_s *priv, off_t block,
ret = pmecc_configure(priv, false);
if (ret < 0)
{
- fdbg("ERROR: pmecc_configure failed: %d\n", ret);
+ ferr("ERROR: pmecc_configure failed: %d\n", ret);
goto errout;
}
@@ -2060,7 +2060,7 @@ static int nand_readpage_pmecc(struct sam_nandcs_s *priv, off_t block,
ret = nand_read_pmecc(priv, block, page, data);
if (ret < 0)
{
- fdbg("ERROR: Block %d page %d Failed to read page\n",
+ ferr("ERROR: Block %d page %d Failed to read page\n",
block, page, ret);
goto errout;
}
@@ -2076,7 +2076,7 @@ static int nand_readpage_pmecc(struct sam_nandcs_s *priv, off_t block,
ret = nand_readpage_noecc(priv, block, page, NULL, priv->raw.spare);
if (ret < 0)
{
- fdbg("ERROR: Block %d page %d Failed to re-read spare area: %d\n",
+ ferr("ERROR: Block %d page %d Failed to re-read spare area: %d\n",
block, page, ret);
goto errout;
}
@@ -2098,13 +2098,13 @@ static int nand_readpage_pmecc(struct sam_nandcs_s *priv, off_t block,
{
/* Yes.. clear sector errors */
- fdbg("Block=%d page=%d has been erased: %08x\n",
+ ferr("Block=%d page=%d has been erased: %08x\n",
block, page, regval);
regval = 0;
}
else
{
- fdbg("ERROR: block=%d page=%d Corrupted sectors: %08x\n",
+ ferr("ERROR: block=%d page=%d Corrupted sectors: %08x\n",
block, page, regval);
}
}
@@ -2114,7 +2114,7 @@ static int nand_readpage_pmecc(struct sam_nandcs_s *priv, off_t block,
ret = pmecc_correction(regval, (uintptr_t)data);
if (ret < 0)
{
- fdbg("ERROR: block=%d page=%d Unrecoverable data error: %d\n",
+ ferr("ERROR: block=%d page=%d Unrecoverable data error: %d\n",
block, page, ret);
}
@@ -2159,7 +2159,7 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
off_t rowaddr;
int ret = OK;
- fvdbg("block=%d page=%d data=%p spare=%p\n", (int)block, page, data, spare);
+ finfo("block=%d page=%d data=%p spare=%p\n", (int)block, page, data, spare);
/* Get page and spare sizes */
@@ -2191,7 +2191,7 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
break;
default:
- fdbg("ERROR: Unsupported page size: %d\n", pagesize);
+ ferr("ERROR: Unsupported page size: %d\n", pagesize);
return -EINVAL;
}
@@ -2220,7 +2220,7 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
ret = nand_nfcsram_write(priv, (uint8_t *)data, pagesize, 0);
if (ret < 0)
{
- fdbg("ERROR: nand_nfcsram_write for data region failed: %d\n", ret);
+ ferr("ERROR: nand_nfcsram_write for data region failed: %d\n", ret);
return ret;
}
@@ -2229,7 +2229,7 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
ret = nand_nfcsram_write(priv, (uint8_t *)spare, sparesize, pagesize);
if (ret < 0)
{
- fdbg("ERROR: nand_nfcsram_write for data region failed: %d\n", ret);
+ ferr("ERROR: nand_nfcsram_write for data region failed: %d\n", ret);
return ret;
}
}
@@ -2257,7 +2257,7 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
ret = nand_operation_complete(priv);
if (ret < 0)
{
- fdbg("ERROR: Failed writing data area: %d\n", ret);
+ ferr("ERROR: Failed writing data area: %d\n", ret);
}
}
@@ -2272,7 +2272,7 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
ret = nand_write(priv, (uint8_t *)spare, sparesize, 0);
if (ret < 0)
{
- fdbg("ERROR: nand_write for spare region failed: %d\n", ret);
+ ferr("ERROR: nand_write for spare region failed: %d\n", ret);
ret = -EPERM;
}
@@ -2320,7 +2320,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
unsigned int i;
int ret = 0;
- fvdbg("block=%d page=%d data=%p\n", (int)block, page, data);
+ finfo("block=%d page=%d data=%p\n", (int)block, page, data);
DEBUGASSERT(priv && data);
/* Make sure that we have exclusive access to the PMECC and that the PMECC
@@ -2331,7 +2331,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
ret = pmecc_configure(priv, false);
if (ret < 0)
{
- fdbg("ERROR: pmecc_configure failed: %d\n", ret);
+ ferr("ERROR: pmecc_configure failed: %d\n", ret);
goto errout;
}
@@ -2344,7 +2344,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
/* Calculate physical address of the page */
rowaddr = block * nandmodel_pagesperblock(&priv->raw.model) + page;
- fvdbg("pagesize=%d eccsaddr=%d rowaddr=%d\n", pagesize, eccsaddr, rowaddr);
+ finfo("pagesize=%d eccsaddr=%d rowaddr=%d\n", pagesize, eccsaddr, rowaddr);
#if 1 /* Use NFC SRAM */
/* Write the data area to NFC SRAM */
@@ -2352,7 +2352,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
ret = nand_nfcsram_write(priv, (uint8_t *)data, pagesize, 0);
if (ret < 0)
{
- fdbg("ERROR: Block %d page %d nand_nfcsram_write for data region failed: %d\n",
+ ferr("ERROR: Block %d page %d nand_nfcsram_write for data region failed: %d\n",
block, page, ret);
goto errout;
}
@@ -2417,7 +2417,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
ret = nand_write(priv, (uint8_t *)data, pagesize, 0);
if (ret < 0)
{
- fdbg("ERROR: Block %d page %d nand_write for data region failed: %d\n",
+ ferr("ERROR: Block %d page %d nand_write for data region failed: %d\n",
block, page, ret);
goto errout;
}
@@ -2437,7 +2437,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
eccpersector = (pmecc_get_eccsize()) / sectersperpage;
eccsize = sectersperpage * eccpersector;
- fvdbg("sectersperpage=%d eccpersector=%d eccsize=%d\n",
+ finfo("sectersperpage=%d eccpersector=%d eccsize=%d\n",
sectersperpage, eccpersector, eccsize);
#ifdef CONFIG_SAMA5_PMECC_TRIMPAGE
@@ -2474,7 +2474,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
ret = nand_write(priv, (uint8_t *)g_nand.ecctab, eccsize, 0);
if (ret < 0)
{
- fdbg("ERROR: Block %d page %d nand_write for spare region failed: %d\n",
+ ferr("ERROR: Block %d page %d nand_write for spare region failed: %d\n",
block, page, ret);
goto errout;
}
@@ -2487,7 +2487,7 @@ static int nand_writepage_pmecc(struct sam_nandcs_s *priv, off_t block,
ret = nand_operation_complete(priv);
if (ret < 0)
{
- fdbg("ERROR: Block %d page %d Failed writing data area: %d\n",
+ ferr("ERROR: Block %d page %d Failed writing data area: %d\n",
block, page, ret);
}
@@ -2536,7 +2536,7 @@ static inline int nand_tryeraseblock(struct sam_nandcs_s *priv, off_t block)
ret = nand_operation_complete(priv);
if (ret < 0)
{
- fdbg("ERROR: Block %d Could not erase: %d\n", block, ret);
+ ferr("ERROR: Block %d Could not erase: %d\n", block, ret);
}
return ret;
@@ -2550,7 +2550,7 @@ static int nand_eraseblock(struct nand_raw_s *raw, off_t block)
DEBUGASSERT(priv);
- fvdbg("block=%d\n", (int)block);
+ finfo("block=%d\n", (int)block);
/* Get exclusvie access to the HSMC hardware.
* REVISIT: The scope of this exclusivity is just NAND.
@@ -2572,7 +2572,7 @@ static int nand_eraseblock(struct nand_raw_s *raw, off_t block)
retries--;
}
- fdbg("ERROR: Block %d Failed to erase after %d tries\n",
+ ferr("ERROR: Block %d Failed to erase after %d tries\n",
(int)block, NAND_ERASE_NRETRIES);
nand_unlock();
@@ -2796,7 +2796,7 @@ static int nand_writepage(struct nand_raw_s *raw, off_t block,
static void nand_reset(struct sam_nandcs_s *priv)
{
- fvdbg("Resetting\n");
+ finfo("Resetting\n");
nand_nfc_cleale(priv, 0, COMMAND_RESET, 0, 0, 0);
nand_wait_ready(priv);
}
@@ -2834,7 +2834,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
uint8_t ecctype;
int ret;
- fvdbg("CS%d\n", cs);
+ finfo("CS%d\n", cs);
/* Select the device structure (In SAMA5D3, NAND is only supported on CS3). */
@@ -2923,7 +2923,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
else
#endif
{
- fdbg("ERROR: CS%d unsupported or invalid\n", cs);
+ ferr("ERROR: CS%d unsupported or invalid\n", cs);
return NULL;
}
@@ -2983,7 +2983,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
ret = irq_attach(SAM_IRQ_HSMC, hsmc_interrupt);
if (ret < 0)
{
- fdbg("Failed to attach HSMC IRQ (%d)", SAM_IRQ_HSMC);
+ ferr("Failed to attach HSMC IRQ (%d)", SAM_IRQ_HSMC);
return NULL;
}
#endif
@@ -3013,7 +3013,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
ret = board_nandflash_config(cs);
if (ret < 0)
{
- fdbg("ERROR: board_nandflash_config failed for CS%d: %d\n",
+ ferr("ERROR: board_nandflash_config failed for CS%d: %d\n",
cs, ret);
return NULL;
}
@@ -3029,7 +3029,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
mtd = nand_initialize(&priv->raw);
if (!mtd)
{
- fdbg("ERROR: CS%d nand_initialize failed %d\n", cs);
+ ferr("ERROR: CS%d nand_initialize failed %d\n", cs);
return NULL;
}
@@ -3043,7 +3043,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
priv->dma = sam_dmachannel(NAND_DMAC, 0);
if (!priv->dma)
{
- fdbg("ERROR: Failed to allocate the DMA channel for CS%d\n", cs);
+ ferr("ERROR: Failed to allocate the DMA channel for CS%d\n", cs);
}
#endif
@@ -3088,7 +3088,7 @@ bool nand_checkreg(bool wr, uintptr_t regaddr, uint32_t regval)
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", g_nand.ntimes);
+ llerr("...[Repeats %d times]...\n", g_nand.ntimes);
}
/* Save information about the new access */
diff --git a/arch/arm/src/sama5/sam_nand.h b/arch/arm/src/sama5/sam_nand.h
index f4229b8d6c0f4075e183cd8b038b632452bd4b9f..352b45b491956e979ad45b023c1b349aac00560d 100644
--- a/arch/arm/src/sama5/sam_nand.h
+++ b/arch/arm/src/sama5/sam_nand.h
@@ -259,7 +259,7 @@
/* Debug */
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_FS)
+#if !defined(CONFIG_DEBUG_FEATURES) || !defined(CONFIG_DEBUG_FS)
# undef CONFIG_DEBUG_FS
# undef CONFIG_SAMA5_NAND_DMADEBUG
# undef CONFIG_SAMA5_NAND_REGDEBUG
@@ -518,7 +518,7 @@ static inline uint32_t nand_getreg(uintptr_t regaddr)
#ifdef CONFIG_SAMA5_NAND_REGDEBUG
if (nand_checkreg(false, regaddr, regval))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -538,7 +538,7 @@ static inline void nand_putreg(uintptr_t regaddr, uint32_t regval)
#ifdef CONFIG_SAMA5_NAND_REGDEBUG
if (nand_checkreg(true, regaddr, regval))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
diff --git a/arch/arm/src/sama5/sam_ohci.c b/arch/arm/src/sama5/sam_ohci.c
index 5dbad089e961cb9040a5e5cf9ec72db4a0a66404..e20a1adb2464295a2223303cfb52ad6626ab54c8 100644
--- a/arch/arm/src/sama5/sam_ohci.c
+++ b/arch/arm/src/sama5/sam_ohci.c
@@ -151,7 +151,7 @@
/* Debug */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_SAMA5_OHCI_REGDEBUG
#endif
@@ -524,7 +524,7 @@ static uint8_t g_bufalloc[SAM_BUFALLOC]
#ifdef CONFIG_SAMA5_OHCI_REGDEBUG
static void sam_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
- lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+ llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@@ -574,7 +574,7 @@ static void sam_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ llerr("[repeats %d more times]\n", count);
}
}
@@ -1318,7 +1318,7 @@ static inline int sam_reminted(struct sam_ed_s *ed)
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace1(OHCI_VTRACE1_VIRTED, (uintptr_t)ed);
#else
- uvdbg("ed: %08x head: %08x next: %08x offset: %d\n",
+ uinfo("ed: %08x head: %08x next: %08x offset: %d\n",
ed, physhead, head ? head->hw.nexted : 0, offset);
#endif
@@ -1358,7 +1358,7 @@ static inline int sam_reminted(struct sam_ed_s *ed)
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace1(OHCI_VTRACE1_VIRTED, (uintptr_t)ed);
#else
- uvdbg("ed: %08x head: %08x next: %08x\n",
+ uinfo("ed: %08x head: %08x next: %08x\n",
ed, physhead, head ? head->hw.nexted : 0);
#endif
@@ -2835,7 +2835,7 @@ errout:
static int sam_epfree(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
struct sam_rhport_s *rhport = (struct sam_rhport_s *)drvr;
#endif
struct sam_eplist_s *eplist = (struct sam_eplist_s *)ep;
@@ -3103,7 +3103,7 @@ static int sam_ctrlin(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(OHCI_VTRACE2_CTRLIN, RHPORT(rhport), req->req);
#else
- uvdbg("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %02x%02x\n",
+ uinfo("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %02x%02x\n",
RHPORT(rhport), req->type, req->req, req->value[1],
req->value[0], req->index[1], req->index[0], req->len[1],
req->len[0]);
@@ -3152,7 +3152,7 @@ static int sam_ctrlout(struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
#ifdef CONFIG_USBHOST_TRACE
usbhost_vtrace2(OHCI_VTRACE2_CTRLOUT, RHPORT(rhport), req->req);
#else
- uvdbg("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %02x%02x\n",
+ uinfo("RHPort%d type: %02x req: %02x value: %02x%02x index: %02x%02x len: %02x%02x\n",
RHPORT(rhport), req->type, req->req, req->value[1],
req->value[0], req->index[1], req->index[0], req->len[1],
req->len[0]);
@@ -3227,7 +3227,7 @@ static int sam_transfer_common(struct sam_rhport_s *rhport,
(ed->hw.ctrl & ED_CONTROL_EN_MASK) >> ED_CONTROL_EN_SHIFT,
(uint16_t)buflen);
#else
- uvdbg("EP%d %s toggle: %d maxpacket: %d buflen: %d\n",
+ uinfo("EP%d %s toggle: %d maxpacket: %d buflen: %d\n",
(ed->hw.ctrl & ED_CONTROL_EN_MASK) >> ED_CONTROL_EN_SHIFT,
in ? "IN" : "OUT",
(ed->hw.headp & ED_HEADP_C) != 0 ? 1 : 0,
@@ -3342,7 +3342,7 @@ static ssize_t sam_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
ret = sam_transfer_common(rhport, eplist, buffer, buflen);
if (ret < 0)
{
- udbg("ERROR: sam_transfer_common failed: %d\n", ret);
+ uerr("ERROR: sam_transfer_common failed: %d\n", ret);
goto errout;
}
@@ -3593,7 +3593,7 @@ static int sam_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
ret = sam_transfer_common(rhport, eplist, buffer, buflen);
if (ret < 0)
{
- udbg("ERROR: sam_transfer_common failed: %d\n", ret);
+ uerr("ERROR: sam_transfer_common failed: %d\n", ret);
goto errout;
}
@@ -3788,7 +3788,7 @@ static int sam_connect(struct usbhost_driver_s *drvr,
/* Set the connected/disconnected flag */
hport->connected = connected;
- ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+ ullinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
/* Report the connection event */
diff --git a/arch/arm/src/sama5/sam_oneshot.c b/arch/arm/src/sama5/sam_oneshot.c
index c6d0a79ef58ea3575941fbfc5084a9685c1d4959..62872ea4dd6e1b73c4f8296c73359fbc4b0a7fd3 100644
--- a/arch/arm/src/sama5/sam_oneshot.c
+++ b/arch/arm/src/sama5/sam_oneshot.c
@@ -108,7 +108,7 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
oneshot_handler_t oneshot_handler;
void *oneshot_arg;
- tcllvdbg("Expired...\n");
+ tcllinfo("Expired...\n");
DEBUGASSERT(oneshot && oneshot->handler);
/* The clock was stopped, but not disabled when the RC match occurred.
@@ -165,7 +165,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
uint32_t cmr;
int ret;
- tcvdbg("chan=%d resolution=%d usec\n", chan, resolution);
+ tcinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(oneshot && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
@@ -177,11 +177,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
ret = sam_tc_divisor(frequency, &divisor, &cmr);
if (ret < 0)
{
- tcdbg("ERROR: sam_tc_divisor failed: %d\n", ret);
+ tcerr("ERROR: sam_tc_divisor failed: %d\n", ret);
return ret;
}
- tcvdbg("frequency=%lu, divisor=%lu, cmr=%08lx\n",
+ tcinfo("frequency=%lu, divisor=%lu, cmr=%08lx\n",
(unsigned long)frequency, (unsigned long)divisor,
(unsigned long)cmr);
@@ -217,7 +217,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
oneshot->tch = sam_tc_allocate(chan, cmr);
if (!oneshot->tch)
{
- tcdbg("ERROR: Failed to allocate timer channel %d\n", chan);
+ tcerr("ERROR: Failed to allocate timer channel %d\n", chan);
return -EBUSY;
}
@@ -260,7 +260,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
uint64_t regval;
irqstate_t flags;
- tcvdbg("handler=%p arg=%p, ts=(%lu, %lu)\n",
+ tcinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
DEBUGASSERT(oneshot && handler && ts);
@@ -271,7 +271,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
{
/* Yes.. then cancel it */
- tcvdbg("Already running... cancelling\n");
+ tcinfo("Already running... cancelling\n");
(void)sam_oneshot_cancel(oneshot, freerun, NULL);
}
@@ -293,7 +293,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
regval = (usec * (uint64_t)sam_tc_divfreq(oneshot->tch)) / USEC_PER_SEC;
- tcvdbg("usec=%llu regval=%08llx\n", usec, regval);
+ tcinfo("usec=%llu regval=%08llx\n", usec, regval);
DEBUGASSERT(regval <= UINT32_MAX);
/* Set up to receive the callback when the interrupt occurs */
@@ -402,7 +402,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
* REVISIT: This does not appear to be the case.
*/
- tcvdbg("Cancelling...\n");
+ tcinfo("Cancelling...\n");
count = sam_tc_getcounter(oneshot->tch);
rc = sam_tc_getregister(oneshot->tch, TC_REGC);
@@ -438,7 +438,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
* oneshot timer.
*/
- tcvdbg("rc=%lu count=%lu usec=%lu\n",
+ tcinfo("rc=%lu count=%lu usec=%lu\n",
(unsigned long)rc, (unsigned long)count, (unsigned long)usec);
/* REVISIT: I am not certain why the timer counter value sometimes
@@ -483,7 +483,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
ts->tv_nsec = (unsigned long)nsec;
}
- tcvdbg("remaining (%lu, %lu)\n",
+ tcinfo("remaining (%lu, %lu)\n",
(unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
}
diff --git a/arch/arm/src/sama5/sam_pck.c b/arch/arm/src/sama5/sam_pck.c
index 11202c5d5653709afcfd613443c222ea493b554a..9b7e406a3853ffd304357386b1564e4ae9b726f2 100644
--- a/arch/arm/src/sama5/sam_pck.c
+++ b/arch/arm/src/sama5/sam_pck.c
@@ -151,7 +151,7 @@ uint32_t sam_pck_configure(enum pckid_e pckid, enum pckid_clksrc_e clksrc,
break;
default:
- dbg("ERROR: Unknown clock source\n");
+ err("ERROR: Unknown clock source\n");
return 0;
}
@@ -213,8 +213,8 @@ uint32_t sam_pck_configure(enum pckid_e pckid, enum pckid_clksrc_e clksrc,
}
else
{
- sdbg("ERROR: frequency cannot be realized.\n");
- sdbg(" frequency=%lu clkin=%lu\n",
+ serr("ERROR: frequency cannot be realized.\n");
+ serr(" frequency=%lu clkin=%lu\n",
(unsigned long)frequency, (unsigned long)clkin);
return 0;
}
diff --git a/arch/arm/src/sama5/sam_pmecc.c b/arch/arm/src/sama5/sam_pmecc.c
index 8dfee40e3a6286472294bc37162ac0b5ba84093d..d055d0b6b33756301f14b7267cbb40c3e93f1fb9 100644
--- a/arch/arm/src/sama5/sam_pmecc.c
+++ b/arch/arm/src/sama5/sam_pmecc.c
@@ -632,7 +632,7 @@ static uint32_t pmecc_errorcorrection(uintptr_t sectorbase,
if (bytepos < sectorsz + nand_getreg(SAM_HSMC_PMECCSADDR))
{
- fdbg("Correct error bit @[Byte %d, Bit %d]\n",
+ ferr("Correct error bit @[Byte %d, Bit %d]\n",
(int)bytepos, (int)bitpos);
if (*(uint8_t *)(sectorbase + bytepos) & (1 << bitpos))
@@ -858,7 +858,7 @@ static int pmecc_pagelayout(uint16_t datasize, uint16_t eccsize)
int bcherr1k;
int selector;
- fvdbg("datasize=%d eccsize=%d\n", datasize, eccsize);
+ finfo("datasize=%d eccsize=%d\n", datasize, eccsize);
DEBUGASSERT(datasize > 0 && eccsize > 0);
/* Try for 512 byte sectors */
@@ -870,14 +870,14 @@ static int pmecc_pagelayout(uint16_t datasize, uint16_t eccsize)
bcherr512 = pmecc_bcherr512(nsectors512, eccsize);
if (bcherr512 < 0)
{
- fdbg("WARNING: Cannot realize 512B sectors\n");
+ ferr("WARNING: Cannot realize 512B sectors\n");
}
else
{
selector = 1;
}
- fvdbg("nsectors512=%d bcherr512=%d selector=%d\n",
+ finfo("nsectors512=%d bcherr512=%d selector=%d\n",
nsectors512, bcherr512, selector);
/* Try for 1024 byte sectors */
@@ -895,14 +895,14 @@ static int pmecc_pagelayout(uint16_t datasize, uint16_t eccsize)
if (bcherr1k < 0)
{
- fdbg("WARNING: Cannot realize 1KB sectors\n");
+ ferr("WARNING: Cannot realize 1KB sectors\n");
}
else
{
selector |= 2;
}
- fvdbg("nsectors1k=%d bcherr1k=%d selector=%d\n",
+ finfo("nsectors1k=%d bcherr1k=%d selector=%d\n",
nsectors1k, bcherr1k, selector);
/* Now pick the best (most likely 1024) */
@@ -960,7 +960,7 @@ static int pmecc_pagelayout(uint16_t datasize, uint16_t eccsize)
g_pmecc.desc.bcherr = ((uint32_t)bcherr << HSMC_PMECCFG_BCHERR_SHIFT);
- fvdbg("sector1k=%d nsectors=%d bcherr=%d correctability=%d\n",
+ finfo("sector1k=%d nsectors=%d bcherr=%d correctability=%d\n",
g_pmecc.sector1k, g_pmecc.nsectors, bcherr, g_pmecc.correctability);
return OK;
@@ -1018,7 +1018,7 @@ int pmecc_configure(struct sam_nandcs_s *priv, bool protected)
uint32_t regval;
int ret;
- fvdbg("protected=%d configured=%d\n", protected, g_pmecc.configured);
+ finfo("protected=%d configured=%d\n", protected, g_pmecc.configured);
/* Check if we need to re-configure */
@@ -1030,7 +1030,7 @@ int pmecc_configure(struct sam_nandcs_s *priv, bool protected)
{
/* No, we are already configured */
- fvdbg("Already configured\n");
+ finfo("Already configured\n");
return OK;
}
@@ -1059,7 +1059,7 @@ int pmecc_configure(struct sam_nandcs_s *priv, bool protected)
ret = pmecc_pagelayout(priv->raw.model.pagesize, eccsize);
if (ret < 0)
{
- fdbg("ERROR: pmecc_pagelayout failed: %d\n", ret);
+ ferr("ERROR: pmecc_pagelayout failed: %d\n", ret);
return ret;
}
@@ -1096,7 +1096,7 @@ int pmecc_configure(struct sam_nandcs_s *priv, bool protected)
#endif
}
- fvdbg("sectorsz=%08x sectorsperpage=%d mm=%d\n",
+ finfo("sectorsz=%08x sectorsperpage=%d mm=%d\n",
g_pmecc.desc.sectorsz, sectorsperpage, g_pmecc.desc.mm);
switch (sectorsperpage)
@@ -1114,13 +1114,13 @@ int pmecc_configure(struct sam_nandcs_s *priv, bool protected)
g_pmecc.desc.pagesize = HSMC_PMECCFG_PAGESIZE_8SEC;
break;
default:
- fdbg("ERROR: Unsupported sectors per page: %d\n", sectorsperpage);
+ ferr("ERROR: Unsupported sectors per page: %d\n", sectorsperpage);
return -EINVAL;
}
g_pmecc.desc.nn = (1 << g_pmecc.desc.mm) - 1;
- fvdbg("pagesize=%08x nn=%d\n", g_pmecc.desc.pagesize, g_pmecc.desc.nn);
+ finfo("pagesize=%08x nn=%d\n", g_pmecc.desc.pagesize, g_pmecc.desc.nn);
/* Real value of ECC bit number correction (2, 4, 8, 12, 24) */
@@ -1136,19 +1136,19 @@ int pmecc_configure(struct sam_nandcs_s *priv, bool protected)
(((g_pmecc.desc.mm * g_pmecc.correctability) >> 3) + 1) * sectorsperpage;
}
- fvdbg("mm=%d correctability=%d eccsize=%d\n",
+ finfo("mm=%d correctability=%d eccsize=%d\n",
g_pmecc.desc.mm, g_pmecc.correctability, g_pmecc.desc.eccsize);
g_pmecc.desc.eccstart = eccoffset;
g_pmecc.desc.eccend = eccoffset + g_pmecc.desc.eccsize;
- fvdbg("eccstart=%d eccend=%d sparesize=%d\n",
+ finfo("eccstart=%d eccend=%d sparesize=%d\n",
g_pmecc.desc.eccstart, g_pmecc.desc.eccend,
priv->raw.model.sparesize);
if (g_pmecc.desc.eccend > priv->raw.model.sparesize)
{
- fdbg("ERROR: No room for ECC in spare bytes %d > %d\n",
+ ferr("ERROR: No room for ECC in spare bytes %d > %d\n",
g_pmecc.desc.eccend, priv->raw.model.sparesize);
return -ENOSPC;
diff --git a/arch/arm/src/sama5/sam_pwm.c b/arch/arm/src/sama5/sam_pwm.c
index c83764d50c5df86d708db534fa566bf2f9f853d1..ea5364337758842c7bf8cbe0e11370975159fafa 100644
--- a/arch/arm/src/sama5/sam_pwm.c
+++ b/arch/arm/src/sama5/sam_pwm.c
@@ -396,25 +396,25 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing PWM */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_PWM
#endif
#ifdef CONFIG_DEBUG_PWM
-# define pwmdbg dbg
-# define pwmlldbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define pwmvdbg vdbg
-# define pwmllvdbg llvdbg
+# define pwmerr err
+# define pwmllerr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define pwminfo info
+# define pwmllinfo llinfo
# else
-# define pwmlldbg(x...)
-# define pwmllvdbg(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# endif
#else
-# define pwmdbg(x...)
-# define pwmlldbg(x...)
-# define pwmvdbg(x...)
-# define pwmllvdbg(x...)
+# define pwmerr(x...)
+# define pwmllerr(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
#endif
/****************************************************************************
@@ -480,7 +480,7 @@ static bool pwm_checkreg(FAR struct sam_pwm_s *chan, bool wr, uint32_t regval,
static uint32_t pwm_getreg(FAR struct sam_pwm_chan_s *chan, int offset);
static void pwm_putreg(FAR struct sam_pwm_chan_s *chan, int offset, uint32_t regval);
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void pwm_dumpregs(FAR struct sam_pwm_chan_s *chan, FAR const char *msg);
#else
# define pwm_dumpregs(chan,msg)
@@ -713,7 +713,7 @@ static bool pwm_checkreg(FAR struct sam_pwm_s *pwm, bool wr, uint32_t regval,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", pwm->count);
+ llerr("...[Repeats %d times]...\n", pwm->count);
}
/* Save information about the new access */
@@ -757,7 +757,7 @@ static uint32_t pwm_getreg(struct sam_pwm_chan_s *chan, int offset)
#ifdef CONFIG_SAMA5_PWM_REGDEBUG
if (pwm_checkreg(&g_pwm, false, regval, regaddr))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -774,7 +774,7 @@ static uint32_t pwm_getreg(struct sam_pwm_chan_s *chan, int offset)
#ifdef CONFIG_SAMA5_PWM_REGDEBUG
if (pwm_checkreg(pwm, false, regval, regaddr))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -813,7 +813,7 @@ static uint32_t pwm_chan_getreg(struct sam_pwm_chan_s *chan, int offset)
if (pwm_checkreg(chan->pwm, false, regval, regaddr))
#endif
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -844,7 +844,7 @@ static void pwm_putreg(struct sam_pwm_chan_s *chan, int offset,
#ifdef CONFIG_SAMA5_PWM_REGDEBUG
if (pwm_checkreg(&g_pwm, true, regval, regaddr))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -857,7 +857,7 @@ static void pwm_putreg(struct sam_pwm_chan_s *chan, int offset,
#ifdef CONFIG_SAMA5_PWM_REGDEBUG
if (pwm_checkreg(pwm, true, regval, regaddr))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -893,7 +893,7 @@ static void pwm_chan_putreg(struct sam_pwm_chan_s *chan, int offset,
if (pwm_checkreg(chan->pwm, true, regval, regaddr))
#endif
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -914,61 +914,61 @@ static void pwm_chan_putreg(struct sam_pwm_chan_s *chan, int offset,
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void pwm_dumpregs(struct sam_pwm_chan_s *chan, FAR const char *msg)
{
- pwmvdbg("PWM: %s\n", msg);
- pwmvdbg(" CLK: %08x SR: %08x IMR1: %08x ISR1: %08x\n",
+ pwminfo("PWM: %s\n", msg);
+ pwminfo(" CLK: %08x SR: %08x IMR1: %08x ISR1: %08x\n",
pwm_getreg(chan, SAM_PWM_CLK_OFFSET),
pwm_getreg(chan, SAM_PWM_SR_OFFSET),
pwm_getreg(chan, SAM_PWM_IMR1_OFFSET),
pwm_getreg(chan, SAM_PWM_ISR1_OFFSET));
- pwmvdbg(" SCM: %08x SCUC: %08x SCUP: %08x IMR2: %08x\n",
+ pwminfo(" SCM: %08x SCUC: %08x SCUP: %08x IMR2: %08x\n",
pwm_getreg(chan, SAM_PWM_SCM_OFFSET),
pwm_getreg(chan, SAM_PWM_SCUC_OFFSET),
pwm_getreg(chan, SAM_PWM_SCUP_OFFSET),
pwm_getreg(chan, SAM_PWM_IMR2_OFFSET));
- pwmvdbg(" ISR2: %08x OOV: %08x OS: %08x FMR: %08x\n",
+ pwminfo(" ISR2: %08x OOV: %08x OS: %08x FMR: %08x\n",
pwm_getreg(chan, SAM_PWM_ISR2_OFFSET),
pwm_getreg(chan, SAM_PWM_OOV_OFFSET),
pwm_getreg(chan, SAM_PWM_OS_OFFSET),
pwm_getreg(chan, SAM_PWM_FMR_OFFSET));
- pwmvdbg(" FSR: %08x FPV: %08x FPE: %08x ELMR0: %08x\n",
+ pwminfo(" FSR: %08x FPV: %08x FPE: %08x ELMR0: %08x\n",
pwm_getreg(chan, SAM_PWM_FSR_OFFSET),
pwm_getreg(chan, SAM_PWM_FPV_OFFSET),
pwm_getreg(chan, SAM_PWM_FPE_OFFSET),
pwm_getreg(chan, SAM_PWM_ELMR0_OFFSET));
- pwmvdbg(" ELMR1: %08x SMMR: %08x WPSR: %08x\n",
+ pwminfo(" ELMR1: %08x SMMR: %08x WPSR: %08x\n",
pwm_getreg(chan, SAM_PWM_ELMR1_OFFSET),
pwm_getreg(chan, SAM_PWM_SMMR_OFFSET),
pwm_getreg(chan, SAM_PWM_WPSR_OFFSET));
- pwmvdbg(" CMPV0: %08x CMPM0: %08x CMPV1: %08x CMPM1: %08x\n",
+ pwminfo(" CMPV0: %08x CMPM0: %08x CMPV1: %08x CMPM1: %08x\n",
pwm_getreg(chan, SAM_PWM_CMPV0_OFFSET),
pwm_getreg(chan, SAM_PWM_CMPM0_OFFSET),
pwm_getreg(chan, SAM_PWM_CMPV1_OFFSET),
pwm_getreg(chan, SAM_PWM_CMPM1_OFFSET));
- pwmvdbg(" CMPV2: %08x CMPM2: %08x CMPV3: %08x CMPM3: %08x\n",
+ pwminfo(" CMPV2: %08x CMPM2: %08x CMPV3: %08x CMPM3: %08x\n",
pwm_getreg(chan, SAM_PWM_CMPV2_OFFSET),
pwm_getreg(chan, SAM_PWM_CMPM2_OFFSET),
pwm_getreg(chan, SAM_PWM_CMPV3_OFFSET),
pwm_getreg(chan, SAM_PWM_CMPM3_OFFSET));
- pwmvdbg(" CMPV4: %08x CMPM4: %08x CMPV5: %08x CMPM5: %08x\n",
+ pwminfo(" CMPV4: %08x CMPM4: %08x CMPV5: %08x CMPM5: %08x\n",
pwm_getreg(chan, SAM_PWM_CMPV4_OFFSET),
pwm_getreg(chan, SAM_PWM_CMPM4_OFFSET),
pwm_getreg(chan, SAM_PWM_CMPV5_OFFSET),
pwm_getreg(chan, SAM_PWM_CMPM5_OFFSET));
- pwmvdbg(" CMPV6: %08x CMPM6: %08x CMPV7: %08x CMPM7: %08x\n",
+ pwminfo(" CMPV6: %08x CMPM6: %08x CMPV7: %08x CMPM7: %08x\n",
pwm_getreg(chan, SAM_PWM_CMPV6_OFFSET),
pwm_getreg(chan, SAM_PWM_CMPM6_OFFSET),
pwm_getreg(chan, SAM_PWM_CMPV7_OFFSET),
pwm_getreg(chan, SAM_PWM_CMPM7_OFFSET));
- pwmvdbg("Channel %d: %s\n", chan->channel, msg);
- pwmvdbg(" CMR: %08x CDTY: %08x CPRD: %08x CCNT: %08x\n",
+ pwminfo("Channel %d: %s\n", chan->channel, msg);
+ pwminfo(" CMR: %08x CDTY: %08x CPRD: %08x CCNT: %08x\n",
pwm_chan_getreg(chan, SAM_PWM_CMR_OFFSET),
pwm_chan_getreg(chan, SAM_PWM_CDTY_OFFSET),
pwm_chan_getreg(chan, SAM_PWM_CPRD_OFFSET),
pwm_chan_getreg(chan, SAM_PWM_CCNT_OFFSET));
- pwmvdbg(" CT: %08x\n",
+ pwminfo(" CT: %08x\n",
pwm_chan_getreg(chan, SAM_PWM_DT_OFFSET));
}
#endif
@@ -1018,7 +1018,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
{
FAR struct sam_pwm_chan_s *chan = (FAR struct sam_pwm_chan_s *)dev;
- pwmvdbg("Channel %d: H=%08x L=%08x FI=%08x\n",
+ pwminfo("Channel %d: H=%08x L=%08x FI=%08x\n",
chan->channel, chan->ohpincfg, chan->olpincfg, chan->fipincfg);
/* Configure selected PWM pins */
@@ -1061,7 +1061,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
{
FAR struct sam_pwm_chan_s *chan = (FAR struct sam_pwm_chan_s *)dev;
- pwmvdbg("Channel %d\n", chan->channel);
+ pwminfo("Channel %d\n", chan->channel);
/* Make sure that the output has been stopped */
@@ -1124,7 +1124,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
#endif
default:
- pwmdbg("ERROR: Invalid or unsupported clock source value: %d\n", chan->clksrc);
+ pwmerr("ERROR: Invalid or unsupported clock source value: %d\n", chan->clksrc);
return -EINVAL;
}
@@ -1167,7 +1167,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
}
pwm_chan_putreg(chan, SAM_PWM_CDTY_OFFSET, regval);
- pwmvdbg("Fsrc=%d cprd=%d cdty=%d\n", fsrc, cprd, regval);
+ pwminfo("Fsrc=%d cprd=%d cdty=%d\n", fsrc, cprd, regval);
/* Enable the channel */
@@ -1199,7 +1199,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
{
FAR struct sam_pwm_chan_s *chan = (FAR struct sam_pwm_chan_s *)dev;
- pwmvdbg("Channel %d\n", chan->channel);
+ pwminfo("Channel %d\n", chan->channel);
/* Disable further PWM interrupts from this channel */
@@ -1236,7 +1236,7 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg
/* There are no platform-specific ioctl commands */
- pwmvdbg("Channel %d\n", chan->channel);
+ pwminfo("Channel %d\n", chan->channel);
#endif
return -ENOTTY;
}
@@ -1299,7 +1299,7 @@ FAR struct pwm_lowerhalf_s *sam_pwminitialize(int channel)
FAR struct sam_pwm_chan_s *chan;
uint32_t regval;
- pwmvdbg("Channel %d\n", channel);
+ pwminfo("Channel %d\n", channel);
switch (channel)
{
@@ -1336,7 +1336,7 @@ FAR struct pwm_lowerhalf_s *sam_pwminitialize(int channel)
#endif
default:
- pwmdbg("ERROR: Channel invalid or not configured: %d\n", channel);
+ pwmerr("ERROR: Channel invalid or not configured: %d\n", channel);
return NULL;
}
@@ -1366,7 +1366,7 @@ FAR struct pwm_lowerhalf_s *sam_pwminitialize(int channel)
ret = irq_attach(SAM_IRQ_PWM, pwm_interrupt);
if (ret < 0)
{
- pwmdbg("ERROR: Failed to attach IRQ%d\n", channel);
+ pwmerr("ERROR: Failed to attach IRQ%d\n", channel);
return NULL;
}
diff --git a/arch/arm/src/sama5/sam_rtc.c b/arch/arm/src/sama5/sam_rtc.c
index 94bca9114246b1a0f894c4de41712667bb7aab86..06fe78d4b10dac6cceb1e64250538aea102596bc 100644
--- a/arch/arm/src/sama5/sam_rtc.c
+++ b/arch/arm/src/sama5/sam_rtc.c
@@ -77,7 +77,7 @@
#define RTC_MAGIC 0xdeadbeef
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_RTC
#endif
@@ -86,15 +86,15 @@
/* Debug ****************************************************************************/
#ifdef CONFIG_DEBUG_RTC
-# define rtcdbg dbg
-# define rtcvdbg vdbg
-# define rtclldbg lldbg
-# define rtcllvdbg llvdbg
+# define rtcerr err
+# define rtcinfo info
+# define rtcllerr llerr
+# define rtcllinfo llinfo
#else
-# define rtcdbg(x...)
-# define rtcvdbg(x...)
-# define rtclldbg(x...)
-# define rtcllvdbg(x...)
+# define rtcerr(x...)
+# define rtcinfo(x...)
+# define rtcllerr(x...)
+# define rtcllinfo(x...)
#endif
/************************************************************************************
@@ -140,16 +140,16 @@ volatile bool g_rtc_enabled = false;
#ifdef CONFIG_DEBUG_RTC
static void rtc_dumpregs(FAR const char *msg)
{
- rtclldbg("%s:\n", msg);
- rtclldbg(" CR: %08x\n", getreg32(SAM_RTC_CR));
- rtclldbg(" MR: %08x\n", getreg32(SAM_RTC_MR));
- rtclldbg(" TIMR: %08x\n", getreg32(SAM_RTC_TIMR));
- rtclldbg(" CALR: %08x\n", getreg32(SAM_RTC_CALR));
- rtclldbg(" TIMALR: %08x\n", getreg32(SAM_RTC_TIMALR));
- rtclldbg(" CALALR: %08x\n", getreg32(SAM_RTC_CALALR));
- rtclldbg(" SR: %08x\n", getreg32(SAM_RTC_SR));
- rtclldbg(" IMR: %08x\n", getreg32(SAM_RTC_IMR));
- rtclldbg(" VER: %08x\n", getreg32(SAM_RTC_VER));
+ rtcllerr("%s:\n", msg);
+ rtcllerr(" CR: %08x\n", getreg32(SAM_RTC_CR));
+ rtcllerr(" MR: %08x\n", getreg32(SAM_RTC_MR));
+ rtcllerr(" TIMR: %08x\n", getreg32(SAM_RTC_TIMR));
+ rtcllerr(" CALR: %08x\n", getreg32(SAM_RTC_CALR));
+ rtcllerr(" TIMALR: %08x\n", getreg32(SAM_RTC_TIMALR));
+ rtcllerr(" CALALR: %08x\n", getreg32(SAM_RTC_CALALR));
+ rtcllerr(" SR: %08x\n", getreg32(SAM_RTC_SR));
+ rtcllerr(" IMR: %08x\n", getreg32(SAM_RTC_IMR));
+ rtcllerr(" VER: %08x\n", getreg32(SAM_RTC_VER));
}
#else
# define rtc_dumpregs(msg)
@@ -172,13 +172,13 @@ static void rtc_dumpregs(FAR const char *msg)
#ifdef CONFIG_DEBUG_RTC
static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
{
- rtclldbg("%s:\n", msg);
- rtclldbg(" tm_sec: %08x\n", tp->tm_sec);
- rtclldbg(" tm_min: %08x\n", tp->tm_min);
- rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
- rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
- rtclldbg(" tm_mon: %08x\n", tp->tm_mon);
- rtclldbg(" tm_year: %08x\n", tp->tm_year);
+ rtcllerr("%s:\n", msg);
+ rtcllerr(" tm_sec: %08x\n", tp->tm_sec);
+ rtcllerr(" tm_min: %08x\n", tp->tm_min);
+ rtcllerr(" tm_hour: %08x\n", tp->tm_hour);
+ rtcllerr(" tm_mday: %08x\n", tp->tm_mday);
+ rtcllerr(" tm_mon: %08x\n", tp->tm_mon);
+ rtcllerr(" tm_year: %08x\n", tp->tm_year);
}
#else
# define rtc_dumptime(tp, msg)
@@ -289,7 +289,7 @@ static int rtc_interrupt(int irq, void *context)
ret = work_queue(LPWORK, &g_alarmwork, rtc_worker, NULL, 0);
if (ret < 0)
{
- rtclldbg("ERRPR: work_queue failed: %d\n", ret);
+ rtcllerr("ERRPR: work_queue failed: %d\n", ret);
}
/* Disable any further alarm interrupts */
diff --git a/arch/arm/src/sama5/sam_spi.c b/arch/arm/src/sama5/sam_spi.c
index 2d370fe7a94175451a6f61cf4d598c9e92d360ab..ed5283af048e2e8285342807dabd8119d33c07ce 100644
--- a/arch/arm/src/sama5/sam_spi.c
+++ b/arch/arm/src/sama5/sam_spi.c
@@ -125,31 +125,20 @@
#define DMA_TIMEOUT_TICKS MSEC2TICK(DMA_TIMEOUT_MS)
/* Debug *******************************************************************/
-/* Check if SPI debut is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_SPI
-# undef CONFIG_SAMA5_SPI_DMADEBUG
-# undef CONFIG_SAMA5_SPI_REGDEBUG
-#endif
+/* Check if SPI debug is enabled */
#ifndef CONFIG_DEBUG_DMA
# undef CONFIG_SAMA5_SPI_DMADEBUG
#endif
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
#define DMA_INITIAL 0
@@ -243,7 +232,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
unsigned int offset);
static inline struct sam_spidev_s *spi_device(struct sam_spics_s *spics);
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg);
#else
# define spi_dumpregs(spi,msg)
@@ -430,7 +419,7 @@ static bool spi_checkreg(struct sam_spidev_s *spi, bool wr, uint32_t value,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", spi->ntimes);
+ llerr("...[Repeats %d times]...\n", spi->ntimes);
}
/* Save information about the new access */
@@ -464,7 +453,7 @@ static inline uint32_t spi_getreg(struct sam_spidev_s *spi,
#ifdef CONFIG_SAMA5_SPI_REGDEBUG
if (spi_checkreg(spi, false, value, address))
{
- lldbg("%08x->%08x\n", address, value);
+ llerr("%08x->%08x\n", address, value);
}
#endif
@@ -487,7 +476,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
#ifdef CONFIG_SAMA5_SPI_REGDEBUG
if (spi_checkreg(spi, true, value, address))
{
- lldbg("%08x<-%08x\n", address, value);
+ llerr("%08x<-%08x\n", address, value);
}
#endif
@@ -509,20 +498,20 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg)
{
- spivdbg("%s:\n", msg);
- spivdbg(" MR:%08x SR:%08x IMR:%08x\n",
+ spiinfo("%s:\n", msg);
+ spiinfo(" MR:%08x SR:%08x IMR:%08x\n",
getreg32(spi->base + SAM_SPI_MR_OFFSET),
getreg32(spi->base + SAM_SPI_SR_OFFSET),
getreg32(spi->base + SAM_SPI_IMR_OFFSET));
- spivdbg(" CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
+ spiinfo(" CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
getreg32(spi->base + SAM_SPI_CSR0_OFFSET),
getreg32(spi->base + SAM_SPI_CSR1_OFFSET),
getreg32(spi->base + SAM_SPI_CSR2_OFFSET),
getreg32(spi->base + SAM_SPI_CSR3_OFFSET));
- spivdbg(" WPCR:%08x WPSR:%08x\n",
+ spiinfo(" WPCR:%08x WPSR:%08x\n",
getreg32(spi->base + SAM_SPI_WPCR_OFFSET),
getreg32(spi->base + SAM_SPI_WPSR_OFFSET));
}
@@ -882,7 +871,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
struct sam_spics_s *spics = (struct sam_spics_s *)dev;
struct sam_spidev_s *spi = spi_device(spics);
- spivdbg("lock=%d\n", lock);
+ spiinfo("lock=%d\n", lock);
if (lock)
{
/* Take the semaphore (perhaps waiting) */
@@ -930,10 +919,10 @@ static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
/* Are we selecting or de-selecting the device? */
- spivdbg("selected=%d\n", selected);
+ spiinfo("selected=%d\n", selected);
if (selected)
{
- spivdbg("cs=%d\n", spics->cs);
+ spiinfo("cs=%d\n", spics->cs);
/* Before writing the TDR, the PCS field in the SPI_MR register must be set
* in order to select a slave.
@@ -988,7 +977,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
uint32_t regval;
unsigned int offset;
- spivdbg("cs=%d frequency=%d\n", spics->cs, frequency);
+ spiinfo("cs=%d frequency=%d\n", spics->cs, frequency);
/* Check if the requested frequency is the same as the frequency selection */
@@ -1058,14 +1047,14 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
/* Calculate the new actual frequency */
actual = SAM_SPI_CLOCK / scbr;
- spivdbg("csr[offset=%02x]=%08x actual=%d\n", offset, regval, actual);
+ spiinfo("csr[offset=%02x]=%08x actual=%d\n", offset, regval, actual);
/* Save the frequency setting */
spics->frequency = frequency;
spics->actual = actual;
- spidbg("Frequency %d->%d\n", frequency, actual);
+ spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -1091,7 +1080,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
uint32_t regval;
unsigned int offset;
- spivdbg("cs=%d mode=%d\n", spics->cs, mode);
+ spiinfo("cs=%d mode=%d\n", spics->cs, mode);
/* Has the mode changed? */
@@ -1134,7 +1123,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
}
spi_putreg(spi, regval, offset);
- spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+ spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
/* Save the mode so that subsequent re-configurations will be faster */
@@ -1164,7 +1153,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
uint32_t regval;
unsigned int offset;
- spivdbg("cs=%d nbits=%d\n", spics->cs, nbits);
+ spiinfo("cs=%d nbits=%d\n", spics->cs, nbits);
DEBUGASSERT(spics && nbits > 7 && nbits < 17);
/* NOTE: The logic in spi_send and in spi_exchange only handles 8-bit
@@ -1186,7 +1175,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
regval |= SPI_CSR_BITS(nbits);
spi_putreg(spi, regval, offset);
- spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+ spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
/* Save the selection so the subsequence re-configurations will be faster */
@@ -1224,7 +1213,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd)
rxbyte = (uint8_t)0;
spi_exchange(dev, &txbyte, &rxbyte, 1);
- spivdbg("Sent %02x received %02x\n", txbyte, rxbyte);
+ spiinfo("Sent %02x received %02x\n", txbyte, rxbyte);
return (uint16_t)rxbyte;
}
@@ -1270,7 +1259,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
uint32_t pcs;
uint32_t data;
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
/* Set up PCS bits */
@@ -1390,7 +1379,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
return;
}
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
spics = (struct sam_spics_s *)dev;
spi = spi_device(spics);
@@ -1476,7 +1465,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = sam_dmarxsetup(spics->rxdma, paddr, maddr, nwords);
if (ret < 0)
{
- dmadbg("ERROR: sam_dmarxsetup failed: %d\n", ret);
+ dmaerr("ERROR: sam_dmarxsetup failed: %d\n", ret);
return;
}
@@ -1488,7 +1477,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = sam_dmatxsetup(spics->txdma, paddr, maddr, nwords);
if (ret < 0)
{
- dmadbg("ERROR: sam_dmatxsetup failed: %d\n", ret);
+ dmaerr("ERROR: sam_dmatxsetup failed: %d\n", ret);
return;
}
@@ -1500,7 +1489,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = sam_dmastart(spics->rxdma, spi_rxcallback, (void *)spics);
if (ret < 0)
{
- dmadbg("ERROR: RX sam_dmastart failed: %d\n", ret);
+ dmaerr("ERROR: RX sam_dmastart failed: %d\n", ret);
return;
}
@@ -1509,7 +1498,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = sam_dmastart(spics->txdma, spi_txcallback, (void *)spics);
if (ret < 0)
{
- dmadbg("ERROR: RX sam_dmastart failed: %d\n", ret);
+ dmaerr("ERROR: RX sam_dmastart failed: %d\n", ret);
sam_dmastop(spics->rxdma);
return;
}
@@ -1531,7 +1520,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
(wdentry_t)spi_dmatimeout, 1, (uint32_t)spics);
if (ret != OK)
{
- spidbg("ERROR: wd_start failed: %d\n", ret);
+ spierr("ERROR: wd_start failed: %d\n", ret);
}
/* Wait for the DMA complete */
@@ -1582,7 +1571,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
if (spics->result)
{
- spidbg("ERROR: DMA failed with result: %d\n", spics->result);
+ spierr("ERROR: DMA failed with result: %d\n", spics->result);
}
}
#endif /* CONFIG_SAMA5_SPI_DMA */
@@ -1673,7 +1662,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
/* The support SAM parts have only a single SPI port */
- spivdbg("port: %d csno: %d spino: %d\n", port, csno, spino);
+ spiinfo("port: %d csno: %d spino: %d\n", port, csno, spino);
DEBUGASSERT(csno >= 0 && csno <= SAM_SPI_NCS);
#if defined(CONFIG_SAMA5_SPI0) && defined(CONFIG_SAMA5_SPI1)
@@ -1692,7 +1681,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
spics = (struct sam_spics_s *)zalloc(sizeof(struct sam_spics_s));
if (!spics)
{
- spidbg("ERROR: Failed to allocate a chip select structure\n");
+ spierr("ERROR: Failed to allocate a chip select structure\n");
return NULL;
}
@@ -1715,7 +1704,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
spics->rxdma = sam_dmachannel(spino, 0);
if (!spics->rxdma)
{
- spidbg("ERROR: Failed to allocate the RX DMA channel\n");
+ spierr("ERROR: Failed to allocate the RX DMA channel\n");
spics->candma = false;
}
}
@@ -1725,7 +1714,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
spics->txdma = sam_dmachannel(spino, 0);
if (!spics->txdma)
{
- spidbg("ERROR: Failed to allocate the TX DMA channel\n");
+ spierr("ERROR: Failed to allocate the TX DMA channel\n");
sam_dmafree(spics->rxdma);
spics->rxdma = NULL;
spics->candma = false;
@@ -1852,7 +1841,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
spi_putreg(spi, regval, offset);
spics->nbits = 8;
- spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+ spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
return &spics->spidev;
}
diff --git a/arch/arm/src/sama5/sam_ssc.c b/arch/arm/src/sama5/sam_ssc.c
index 52aac74b17d7d96efb53a35814c04000b94527d8..61b790ad04e4c46312405029ed001ef6bd0700c8 100644
--- a/arch/arm/src/sama5/sam_ssc.c
+++ b/arch/arm/src/sama5/sam_ssc.c
@@ -397,8 +397,8 @@
* include/debug.h
*/
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+# undef CONFIG_DEBUG_INFO
# undef CONFIG_DEBUG_I2S
#endif
@@ -414,19 +414,19 @@
#endif
#ifdef CONFIG_DEBUG_I2S
-# define i2sdbg dbg
-# define i2slldbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define i2svdbg dbg
-# define i2sllvdbg lldbg
+# define i2serr err
+# define i2sllerr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define i2sinfo err
+# define i2sllinfo llerr
# else
-# define i2svdbg(x...)
+# define i2sinfo(x...)
# endif
#else
-# define i2sdbg(x...)
-# define i2slldbg(x...)
-# define i2svdbg(x...)
-# define i2sllvdbg(x...)
+# define i2serr(x...)
+# define i2sllerr(x...)
+# define i2sinfo(x...)
+# define i2sllinfo(x...)
#endif
#define DMA_INITIAL 0
@@ -476,7 +476,7 @@ struct sam_ssc_s
uintptr_t base; /* SSC controller register base address */
sem_t exclsem; /* Assures mutually exclusive acess to SSC */
uint8_t datalen; /* Data width (8, 16, or 32) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
uint8_t align; /* Log2 of data width (0, 1, or 3) */
#endif
uint8_t pid; /* Peripheral ID */
@@ -539,7 +539,7 @@ static inline void ssc_putreg(struct sam_ssc_s *priv, unsigned int offset,
static inline uintptr_t ssc_physregaddr(struct sam_ssc_s *priv,
unsigned int offset);
-#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_INFO)
static void scc_dump_regs(struct sam_ssc_s *priv, const char *msg);
#else
# define scc_dump_regs(s,m)
@@ -724,7 +724,7 @@ static bool ssc_checkreg(struct sam_ssc_s *priv, bool wr, uint32_t regval,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->count);
+ llerr("...[Repeats %d times]...\n", priv->count);
}
/* Save information about the new access */
@@ -758,7 +758,7 @@ static inline uint32_t ssc_getreg(struct sam_ssc_s *priv,
#ifdef CONFIG_SAMA5_SSC_REGDEBUG
if (ssc_checkreg(priv, false, regval, regaddr))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -781,7 +781,7 @@ static inline void ssc_putreg(struct sam_ssc_s *priv, unsigned int offset,
#ifdef CONFIG_SAMA5_SSC_REGDEBUG
if (ssc_checkreg(priv, true, regval, regaddr))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -817,21 +817,21 @@ static inline uintptr_t ssc_physregaddr(struct sam_ssc_s *priv,
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_INFO)
static void scc_dump_regs(struct sam_ssc_s *priv, const char *msg)
{
- i2svdbg("SSC%d: %s\n", priv->sscno, msg);
- i2svdbg(" CMR:%08x RCMR:%08x RFMR:%08x TCMR:%08x\n",
+ i2sinfo("SSC%d: %s\n", priv->sscno, msg);
+ i2sinfo(" CMR:%08x RCMR:%08x RFMR:%08x TCMR:%08x\n",
getreg32(priv->base + SAM_SSC_CMR_OFFSET),
getreg32(priv->base + SAM_SSC_RCMR_OFFSET),
getreg32(priv->base + SAM_SSC_RFMR_OFFSET),
getreg32(priv->base + SAM_SSC_TCMR_OFFSET));
- i2svdbg(" TFMR:%08x RC0R:%08x RC1R:%08x SR:%08x\n",
+ i2sinfo(" TFMR:%08x RC0R:%08x RC1R:%08x SR:%08x\n",
getreg32(priv->base + SAM_SSC_TFMR_OFFSET),
getreg32(priv->base + SAM_SSC_RC0R_OFFSET),
getreg32(priv->base + SAM_SSC_RC1R_OFFSET),
getreg32(priv->base + SAM_SSC_SR_OFFSET));
- i2svdbg(" IMR:%08x WPMR:%08x WPSR:%08x\n",
+ i2sinfo(" IMR:%08x WPMR:%08x WPSR:%08x\n",
getreg32(priv->base + SAM_SSC_IMR_OFFSET),
getreg32(priv->base + SAM_SSC_WPMR_OFFSET),
getreg32(priv->base + SAM_SSC_WPSR_OFFSET));
@@ -868,11 +868,11 @@ static void ssc_dump_queue(sq_queue_t *queue)
if (!apb)
{
- i2sllvdbg(" %p: No buffer\n", bfcontainer);
+ i2sllinfo(" %p: No buffer\n", bfcontainer);
}
else
{
- i2sllvdbg(" %p: buffer=%p nmaxbytes=%d nbytes=%d\n",
+ i2sllinfo(" %p: buffer=%p nmaxbytes=%d nbytes=%d\n",
bfcontainer, apb, apb->nmaxbytes, apb->nbytes);
}
}
@@ -883,12 +883,12 @@ static void ssc_dump_queues(struct sam_transport_s *xpt, const char *msg)
irqstate_t flags;
flags = enter_critical_section();
- i2sllvdbg("%s\n", msg);
- i2sllvdbg(" Pending:\n");
+ i2sllinfo("%s\n", msg);
+ i2sllinfo(" Pending:\n");
ssc_dump_queue(&xpt->pend);
- i2sllvdbg(" Active:\n");
+ i2sllinfo(" Active:\n");
ssc_dump_queue(&xpt->act);
- i2sllvdbg(" Done:\n");
+ i2sllinfo(" Done:\n");
ssc_dump_queue(&xpt->done);
leave_critical_section(flags);
}
@@ -1111,7 +1111,7 @@ static void ssc_dma_sampleinit(struct sam_ssc_s *priv,
#if defined(CONFIG_SAMA5_SSC_DMADEBUG) && defined(SSC_HAVE_RX)
static void ssc_rxdma_sampledone(struct sam_ssc_s *priv, int result)
{
- lldbg("result: %d\n", result);
+ llerr("result: %d\n", result);
/* Sample the final registers */
@@ -1176,7 +1176,7 @@ static void ssc_rxdma_sampledone(struct sam_ssc_s *priv, int result)
#if defined(CONFIG_SAMA5_SSC_DMADEBUG) && defined(SSC_HAVE_TX)
static void ssc_txdma_sampledone(struct sam_ssc_s *priv, int result)
{
- lldbg("result: %d\n", result);
+ llerr("result: %d\n", result);
/* Sample the final registers */
@@ -1398,7 +1398,7 @@ static int ssc_rxdma_setup(struct sam_ssc_s *priv)
if (ret < 0)
{
- i2slldbg("ERROR: wd_start failed: %d\n", errno);
+ i2sllerr("ERROR: wd_start failed: %d\n", errno);
}
}
@@ -1447,7 +1447,7 @@ static void ssc_rx_worker(void *arg)
* So we have to start the next DMA here.
*/
- i2svdbg("rx.act.head=%p rx.done.head=%p\n",
+ i2sinfo("rx.act.head=%p rx.done.head=%p\n",
priv->rx.act.head, priv->rx.done.head);
ssc_dump_rxqueues(priv, "RX worker start");
@@ -1586,7 +1586,7 @@ static void ssc_rx_schedule(struct sam_ssc_s *priv, int result)
ret = work_queue(HPWORK, &priv->rx.work, ssc_rx_worker, priv, 0);
if (ret != 0)
{
- i2slldbg("ERROR: Failed to queue RX work: %d\n", ret);
+ i2sllerr("ERROR: Failed to queue RX work: %d\n", ret);
}
}
}
@@ -1811,7 +1811,7 @@ static int ssc_txdma_setup(struct sam_ssc_s *priv)
if (ret < 0)
{
- i2slldbg("ERROR: wd_start failed: %d\n", errno);
+ i2sllerr("ERROR: wd_start failed: %d\n", errno);
}
}
@@ -1859,7 +1859,7 @@ static void ssc_tx_worker(void *arg)
* So we have to start the next DMA here.
*/
- i2svdbg("tx.act.head=%p tx.done.head=%p\n",
+ i2sinfo("tx.act.head=%p tx.done.head=%p\n",
priv->tx.act.head, priv->tx.done.head);
ssc_dump_txqueues(priv, "TX worker start");
@@ -1986,7 +1986,7 @@ static void ssc_tx_schedule(struct sam_ssc_s *priv, int result)
ret = work_queue(HPWORK, &priv->tx.work, ssc_tx_worker, priv, 0);
if (ret != 0)
{
- i2slldbg("ERROR: Failed to queue TX work: %d\n", ret);
+ i2sllerr("ERROR: Failed to queue TX work: %d\n", ret);
}
}
}
@@ -2059,25 +2059,25 @@ static int ssc_checkwidth(struct sam_ssc_s *priv, int bits)
switch (bits)
{
case 8:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
priv->align = 0;
#endif
break;
case 16:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
priv->align = 1;
#endif
break;
case 32:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
priv->align = 3;
#endif
break;
default:
- i2sdbg("ERROR: Unsupported or invalid data width: %d\n", bits);
+ i2serr("ERROR: Unsupported or invalid data width: %d\n", bits);
return (bits < 2 || bits > 32) ? -EINVAL : -ENOSYS;
}
@@ -2155,7 +2155,7 @@ static uint32_t ssc_rxdatawidth(struct i2s_dev_s *dev, int bits)
ret = ssc_checkwidth(priv, bits);
if (ret < 0)
{
- i2sdbg("ERROR: ssc_checkwidth failed: %d\n", ret);
+ i2serr("ERROR: ssc_checkwidth failed: %d\n", ret);
return 0;
}
@@ -2164,7 +2164,7 @@ static uint32_t ssc_rxdatawidth(struct i2s_dev_s *dev, int bits)
ret = ssc_dma_flags(priv, &dmaflags);
if (ret < 0)
{
- i2sdbg("ERROR: ssc_dma_flags failed: %d\n", ret);
+ i2serr("ERROR: ssc_dma_flags failed: %d\n", ret);
return 0;
}
@@ -2234,7 +2234,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
#endif
DEBUGASSERT(priv && apb && ((uintptr_t)apb->samp & priv->align) == 0);
- i2svdbg("apb=%p nmaxbytes=%d arg=%p timeout=%d\n",
+ i2sinfo("apb=%p nmaxbytes=%d arg=%p timeout=%d\n",
apb, apb->nmaxbytes, arg, timeout);
ssc_init_buffer(apb->samp, apb->nmaxbytes);
@@ -2253,7 +2253,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
if (!priv->rxenab)
{
- i2sdbg("ERROR: SSC%d has no receiver\n", priv->sscno);
+ i2serr("ERROR: SSC%d has no receiver\n", priv->sscno);
ret = -EAGAIN;
goto errout_with_exclsem;
}
@@ -2292,7 +2292,7 @@ errout_with_exclsem:
return ret;
#else
- i2sdbg("ERROR: SSC%d has no receiver\n", priv->sscno);
+ i2serr("ERROR: SSC%d has no receiver\n", priv->sscno);
UNUSED(priv);
return -ENOSYS;
#endif
@@ -2366,7 +2366,7 @@ static uint32_t ssc_txdatawidth(struct i2s_dev_s *dev, int bits)
ret = ssc_checkwidth(priv, bits);
if (ret < 0)
{
- i2sdbg("ERROR: ssc_checkwidth failed: %d\n", ret);
+ i2serr("ERROR: ssc_checkwidth failed: %d\n", ret);
return 0;
}
@@ -2375,7 +2375,7 @@ static uint32_t ssc_txdatawidth(struct i2s_dev_s *dev, int bits)
ret = ssc_dma_flags(priv, &dmaflags);
if (ret < 0)
{
- i2sdbg("ERROR: ssc_dma_flags failed: %d\n", ret);
+ i2serr("ERROR: ssc_dma_flags failed: %d\n", ret);
return 0;
}
@@ -2449,7 +2449,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
*/
DEBUGASSERT(priv && apb);
- i2svdbg("apb=%p nbytes=%d arg=%p timeout=%d\n",
+ i2sinfo("apb=%p nbytes=%d arg=%p timeout=%d\n",
apb, apb->nbytes - apb->curbyte, arg, timeout);
ssc_dump_buffer("Sending", &apb->samp[apb->curbyte],
@@ -2470,7 +2470,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
if (!priv->txenab)
{
- i2sdbg("ERROR: SSC%d has no transmitter\n", priv->sscno);
+ i2serr("ERROR: SSC%d has no transmitter\n", priv->sscno);
ret = -EAGAIN;
goto errout_with_exclsem;
}
@@ -2509,7 +2509,7 @@ errout_with_exclsem:
return ret;
#else
- i2sdbg("ERROR: SSC%d has no transmitter\n", priv->sscno);
+ i2serr("ERROR: SSC%d has no transmitter\n", priv->sscno);
UNUSED(priv);
return -ENOSYS;
#endif
@@ -2563,7 +2563,7 @@ static int ssc_rx_configure(struct sam_ssc_s *priv)
case SSC_CLKSRC_NONE: /* No clock */
default:
- i2sdbg("ERROR: No receiver clock\n");
+ i2serr("ERROR: No receiver clock\n");
return -EINVAL;
}
@@ -2584,7 +2584,7 @@ static int ssc_rx_configure(struct sam_ssc_s *priv)
break;
default:
- i2sdbg("ERROR: Invalid clock output selection\n");
+ i2serr("ERROR: Invalid clock output selection\n");
return -EINVAL;
}
@@ -2688,7 +2688,7 @@ static int ssc_tx_configure(struct sam_ssc_s *priv)
case SSC_CLKSRC_NONE: /* No clock */
default:
- i2sdbg("ERROR: No transmitter clock\n");
+ i2serr("ERROR: No transmitter clock\n");
return -EINVAL;
}
@@ -2709,7 +2709,7 @@ static int ssc_tx_configure(struct sam_ssc_s *priv)
break;
default:
- i2sdbg("ERROR: Invalid clock output selection\n");
+ i2serr("ERROR: Invalid clock output selection\n");
return -EINVAL;
}
@@ -2929,7 +2929,7 @@ static void ssc_clocking(struct sam_ssc_s *priv)
sam_enableperiph1(priv->pid);
- i2svdbg("PCSR1=%08x PCR=%08x CMR=%08x\n",
+ i2sinfo("PCSR1=%08x PCR=%08x CMR=%08x\n",
getreg32(SAM_PMC_PCSR1), regval,
ssc_getreg(priv, SAM_SSC_CMR_OFFSET));
}
@@ -2968,7 +2968,7 @@ static int ssc_dma_flags(struct sam_ssc_s *priv, uint32_t *dmaflags)
break;
default:
- i2sdbg("ERROR: Unsupported data width: %d\n", priv->datalen);
+ i2serr("ERROR: Unsupported data width: %d\n", priv->datalen);
return -ENOSYS;
}
@@ -3001,7 +3001,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
ret = ssc_dma_flags(priv, &dmaflags);
if (ret < 0)
{
- i2sdbg("ERROR: ssc_dma_flags failed: %d\n", ret);
+ i2serr("ERROR: ssc_dma_flags failed: %d\n", ret);
return ret;
}
@@ -3018,7 +3018,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
priv->rx.dma = sam_dmachannel(priv->sscno, dmaflags);
if (!priv->rx.dma)
{
- i2sdbg("ERROR: Failed to allocate the RX DMA channel\n");
+ i2serr("ERROR: Failed to allocate the RX DMA channel\n");
goto errout;
}
@@ -3027,7 +3027,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
priv->rx.dog = wd_create();
if (!priv->rx.dog)
{
- i2sdbg("ERROR: Failed to create the RX DMA watchdog\n");
+ i2serr("ERROR: Failed to create the RX DMA watchdog\n");
goto errout;
}
}
@@ -3041,7 +3041,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
priv->tx.dma = sam_dmachannel(priv->sscno, dmaflags);
if (!priv->tx.dma)
{
- i2sdbg("ERROR: Failed to allocate the TX DMA channel\n");
+ i2serr("ERROR: Failed to allocate the TX DMA channel\n");
goto errout;
}
@@ -3050,7 +3050,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
priv->tx.dog = wd_create();
if (!priv->tx.dog)
{
- i2sdbg("ERROR: Failed to create the TX DMA watchdog\n");
+ i2serr("ERROR: Failed to create the TX DMA watchdog\n");
goto errout;
}
}
@@ -3257,7 +3257,7 @@ static void ssc0_configure(struct sam_ssc_s *priv)
priv->base = SAM_SSC0_VBASE;
priv->datalen = CONFIG_SAMA5_SSC0_DATALEN;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
priv->align = SAMA5_SSC0_DATAMASK;
#endif
priv->pid = SAM_PID_SSC0;
@@ -3398,7 +3398,7 @@ static void ssc1_configure(struct sam_ssc_s *priv)
priv->base = SAM_SSC1_VBASE;
priv->datalen = CONFIG_SAMA5_SSC1_DATALEN;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
priv->align = SAMA5_SSC1_DATAMASK;
#endif
priv->pid = SAM_PID_SSC1;
@@ -3431,7 +3431,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
/* The support SAM parts have only a single SSC port */
- i2svdbg("port: %d\n", port);
+ i2sinfo("port: %d\n", port);
/* Allocate a new state structure for this chip select. NOTE that there
* is no protection if the same chip select is used in two different
@@ -3441,7 +3441,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
priv = (struct sam_ssc_s *)zalloc(sizeof(struct sam_ssc_s));
if (!priv)
{
- i2sdbg("ERROR: Failed to allocate a chip select structure\n");
+ i2serr("ERROR: Failed to allocate a chip select structure\n");
return NULL;
}
@@ -3475,7 +3475,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
else
#endif /* CONFIG_SAMA5_SSC1 */
{
- i2sdbg("ERROR: Unsupported I2S port: %d\n", port);
+ i2serr("ERROR: Unsupported I2S port: %d\n", port);
goto errout_with_alloc;
}
@@ -3496,7 +3496,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
ret = ssc_rx_configure(priv);
if (ret < 0)
{
- i2sdbg("ERROR: Failed to configure the receiver: %d\n", ret);
+ i2serr("ERROR: Failed to configure the receiver: %d\n", ret);
goto errout_with_clocking;
}
@@ -3505,7 +3505,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
ret = ssc_tx_configure(priv);
if (ret < 0)
{
- i2sdbg("ERROR: Failed to configure the transmitter: %d\n", ret);
+ i2serr("ERROR: Failed to configure the transmitter: %d\n", ret);
goto errout_with_clocking;
}
diff --git a/arch/arm/src/sama5/sam_tc.c b/arch/arm/src/sama5/sam_tc.c
index 54cf71242c3205afb57c264d3779d9cf94fb3cfe..6ce38f0ee26202c407fa3106d289223d162eefdd 100644
--- a/arch/arm/src/sama5/sam_tc.c
+++ b/arch/arm/src/sama5/sam_tc.c
@@ -501,20 +501,20 @@ static void sam_regdump(struct sam_chan_s *chan, const char *msg)
uintptr_t base;
base = tc->base;
- lldbg("TC%d [%08x]: %s\n", tc->tc, (int)base, msg);
- lldbg(" BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
+ llerr("TC%d [%08x]: %s\n", tc->tc, (int)base, msg);
+ llerr(" BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
getreg32(base+SAM_TC_BMR_OFFSET), getreg32(base+SAM_TC_QIMR_OFFSET),
getreg32(base+SAM_TC_QISR_OFFSET), getreg32(base+SAM_TC_WPMR_OFFSET));
base = chan->base;
- lldbg("TC%d Channel %d [%08x]: %s\n", tc->tc, chan->chan, (int)base, msg);
- lldbg(" CMR: %08x SSMR: %08x RAB: %08x CV: %08x\n",
+ llerr("TC%d Channel %d [%08x]: %s\n", tc->tc, chan->chan, (int)base, msg);
+ llerr(" CMR: %08x SSMR: %08x RAB: %08x CV: %08x\n",
getreg32(base+SAM_TC_CMR_OFFSET), getreg32(base+SAM_TC_SMMR_OFFSET),
getreg32(base+SAM_TC_RAB_OFFSET), getreg32(base+SAM_TC_CV_OFFSET));
- lldbg(" RA: %08x RB: %08x RC: %08x SR: %08x\n",
+ llerr(" RA: %08x RB: %08x RC: %08x SR: %08x\n",
getreg32(base+SAM_TC_RA_OFFSET), getreg32(base+SAM_TC_RB_OFFSET),
getreg32(base+SAM_TC_RC_OFFSET), getreg32(base+SAM_TC_SR_OFFSET));
- lldbg(" IMR: %08x\n",
+ llerr(" IMR: %08x\n",
getreg32(base+SAM_TC_IMR_OFFSET));
}
#endif
@@ -558,7 +558,7 @@ static bool sam_checkreg(struct sam_tc_s *tc, bool wr, uint32_t regaddr,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", tc->ntimes);
+ llerr("...[Repeats %d times]...\n", tc->ntimes);
}
/* Save information about the new access */
@@ -593,7 +593,7 @@ static inline uint32_t sam_tc_getreg(struct sam_chan_s *chan,
#ifdef CONFIG_SAMA5_TC_REGDEBUG
if (sam_checkreg(tc, false, regaddr, regval))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -617,7 +617,7 @@ static inline void sam_tc_putreg(struct sam_chan_s *chan, uint32_t regval,
#ifdef CONFIG_SAMA5_TC_REGDEBUG
if (sam_checkreg(tc, true, regaddr, regval))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -641,7 +641,7 @@ static inline uint32_t sam_chan_getreg(struct sam_chan_s *chan,
#ifdef CONFIG_SAMA5_TC_REGDEBUG
if (sam_checkreg(chan->tc, false, regaddr, regval))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -664,7 +664,7 @@ static inline void sam_chan_putreg(struct sam_chan_s *chan, unsigned int offset,
#ifdef CONFIG_SAMA5_TC_REGDEBUG
if (sam_checkreg(chan->tc, true, regaddr, regval))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -953,7 +953,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* Timer/counter is not invalid or not enabled */
- tcdbg("ERROR: Bad channel number: %d\n", channel);
+ tcerr("ERROR: Bad channel number: %d\n", channel);
return NULL;
}
@@ -976,7 +976,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
for (i = 0, ch = tcconfig->chfirst; i < SAM_TC_NCHANNELS; i++)
{
- tcdbg("Initializing TC%d channel %d\n", tcconfig->tc, ch);
+ tcerr("Initializing TC%d channel %d\n", tcconfig->tc, ch);
/* Initialize the channel data structure */
@@ -1057,7 +1057,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* No.. return a failure */
- tcdbg("Channel %d is in-used\n", channel);
+ tcerr("Channel %d is in-used\n", channel);
sam_givesem(tc);
return NULL;
}
@@ -1102,7 +1102,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
* access to the requested channel.
*/
- tcvdbg("channel=%d mode=%08x\n", channel, mode);
+ tcinfo("channel=%d mode=%08x\n", channel, mode);
chan = sam_tc_initialize(channel);
if (chan)
@@ -1128,7 +1128,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
/* Return an opaque reference to the channel */
- tcvdbg("Returning %p\n", chan);
+ tcinfo("Returning %p\n", chan);
return (TC_HANDLE)chan;
}
@@ -1150,7 +1150,7 @@ void sam_tc_free(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
- tcvdbg("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
+ tcinfo("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
/* Make sure that interrupts are detached and disabled and that the channel
@@ -1183,7 +1183,7 @@ void sam_tc_start(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
- tcvdbg("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
+ tcinfo("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
/* Read the SR to clear any pending interrupts on this channel */
@@ -1215,7 +1215,7 @@ void sam_tc_stop(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
- tcvdbg("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
+ tcinfo("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
sam_chan_putreg(chan, SAM_TC_CCR_OFFSET, TC_CCR_CLKDIS);
@@ -1322,7 +1322,7 @@ void sam_tc_setregister(TC_HANDLE handle, int regid, uint32_t regval)
DEBUGASSERT(chan && regid < TC_NREGISTERS);
- tcvdbg("Channel %d: Set register RC%d to %08lx\n",
+ tcinfo("Channel %d: Set register RC%d to %08lx\n",
chan->chan, regid, (unsigned long)regval);
sam_chan_putreg(chan, g_regoffset[regid], regval);
@@ -1465,7 +1465,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
uint32_t ftcin = sam_tc_infreq();
int ndx = 0;
- tcvdbg("frequency=%d\n", frequency);
+ tcinfo("frequency=%d\n", frequency);
/* Satisfy lower bound. That is, the value of the divider such that:
*
@@ -1478,7 +1478,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
{
/* If no divisor can be found, return -ERANGE */
- tcdbg("Lower bound search failed\n");
+ tcerr("Lower bound search failed\n");
return -ERANGE;
}
}
@@ -1502,7 +1502,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
if (div)
{
uint32_t value = sam_tc_freqdiv_lookup(ftcin, ndx);
- tcvdbg("return div=%lu\n", (unsigned long)value);
+ tcinfo("return div=%lu\n", (unsigned long)value);
*div = value;
}
@@ -1510,7 +1510,7 @@ int sam_tc_divisor(uint32_t frequency, uint32_t *div, uint32_t *tcclks)
if (tcclks)
{
- tcvdbg("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS(ndx));
+ tcinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS(ndx));
*tcclks = TC_CMR_TCCLKS(ndx);
}
diff --git a/arch/arm/src/sama5/sam_tc.h b/arch/arm/src/sama5/sam_tc.h
index 311f6d329f2d459a15c7e69c4764bc758bbc3fbf..dec7b783e4cf842e56160204d67add47fd8328d6 100644
--- a/arch/arm/src/sama5/sam_tc.h
+++ b/arch/arm/src/sama5/sam_tc.h
@@ -74,7 +74,7 @@
/* Timer debug is enabled if any timer client is enabled */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_ANALOG
# undef CONFIG_SAMA5_TC_REGDEBUG
#endif
@@ -86,15 +86,15 @@
/* Timer/counter debug output */
#ifdef CONFIG_SAMA5_TC_DEBUG
-# define tcdbg dbg
-# define tcvdbg vdbg
-# define tclldbg lldbg
-# define tcllvdbg llvdbg
+# define tcerr err
+# define tcinfo info
+# define tcllerr llerr
+# define tcllinfo llinfo
#else
-# define tcdbg(x...)
-# define tcvdbg(x...)
-# define tclldbg(x...)
-# define tcllvdbg(x...)
+# define tcerr(x...)
+# define tcinfo(x...)
+# define tcllerr(x...)
+# define tcllinfo(x...)
#endif
/****************************************************************************
diff --git a/arch/arm/src/sama5/sam_tickless.c b/arch/arm/src/sama5/sam_tickless.c
index 70cecb1217a24f80f2c51579f16b1d9c6518663c..42eeabf809b84ce0b026de8b906d1a1448ec1385 100644
--- a/arch/arm/src/sama5/sam_tickless.c
+++ b/arch/arm/src/sama5/sam_tickless.c
@@ -209,7 +209,7 @@ static struct sam_tickless_s g_tickless;
static void sam_oneshot_handler(void *arg)
{
- tcllvdbg("Expired...\n");
+ tcllinfo("Expired...\n");
sched_timer_expiration();
}
@@ -256,7 +256,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
- tclldbg("ERROR: sam_oneshot_initialize failed\n");
+ tcllerr("ERROR: sam_oneshot_initialize failed\n");
PANIC();
}
@@ -268,7 +268,7 @@ void up_timer_initialize(void)
ret = sam_oneshot_max_delay(&g_tickless.oneshot, &max_delay);
if (ret < 0)
{
- tclldbg("ERROR: sam_oneshot_max_delay failed\n");
+ tcllerr("ERROR: sam_oneshot_max_delay failed\n");
PANIC();
}
@@ -292,7 +292,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
- tclldbg("ERROR: sam_freerun_initialize failed\n");
+ tcllerr("ERROR: sam_freerun_initialize failed\n");
PANIC();
}
diff --git a/arch/arm/src/sama5/sam_trng.c b/arch/arm/src/sama5/sam_trng.c
index 1be5585bc4ba8f2eb22a1c90a58c59edb5e61f0e..a3eb102640e8fa881e727640623deaa61bc5884a 100644
--- a/arch/arm/src/sama5/sam_trng.c
+++ b/arch/arm/src/sama5/sam_trng.c
@@ -243,7 +243,7 @@ static ssize_t sam_read(struct file *filep, char *buffer, size_t buflen)
ssize_t retval;
int ret;
- fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+ finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
/* Get exclusive access to the TRNG harware */
@@ -283,7 +283,7 @@ static ssize_t sam_read(struct file *filep, char *buffer, size_t buflen)
{
ret = sem_wait(&g_trngdev.waitsem);
- fvdbg("Awakened: nsamples=%d maxsamples=%d ret=%d\n",
+ finfo("Awakened: nsamples=%d maxsamples=%d ret=%d\n",
g_trngdev.nsamples, g_trngdev.maxsamples, ret);
if (ret < 0)
@@ -320,7 +320,7 @@ errout:
sem_post(&g_trngdev.exclsem);
- fvdbg("Return %d\n", (int)retval);
+ finfo("Return %d\n", (int)retval);
return retval;
}
@@ -346,7 +346,7 @@ void up_rnginitialize(void)
{
int ret;
- fvdbg("Initializing TRNG hardware\n");
+ finfo("Initializing TRNG hardware\n");
/* Initialize the device structure */
@@ -362,7 +362,7 @@ void up_rnginitialize(void)
if (irq_attach(SAM_IRQ_TRNG, sam_interrupt))
{
- fdbg("ERROR: Failed to attach to IRQ%d\n", SAM_IRQ_TRNG);
+ ferr("ERROR: Failed to attach to IRQ%d\n", SAM_IRQ_TRNG);
return;
}
@@ -379,7 +379,7 @@ void up_rnginitialize(void)
ret = register_driver("/dev/random", &g_trngops, 0644, NULL);
if (ret < 0)
{
- fdbg("ERROR: Failed to register /dev/random\n");
+ ferr("ERROR: Failed to register /dev/random\n");
return;
}
diff --git a/arch/arm/src/sama5/sam_tsd.c b/arch/arm/src/sama5/sam_tsd.c
index 3bed567508bc02d54d2d4394da586eb8c1988697..de28c0a953b84951ccb9c96c99c52b72218bc5d4 100644
--- a/arch/arm/src/sama5/sam_tsd.c
+++ b/arch/arm/src/sama5/sam_tsd.c
@@ -285,7 +285,7 @@ static void sam_tsd_notify(struct sam_tsd_s *priv)
if (fds)
{
fds->revents |= POLLIN;
- ivdbg("Report events: %02x\n", fds->revents);
+ iinfo("Report events: %02x\n", fds->revents);
sem_post(fds->sem);
}
}
@@ -380,7 +380,7 @@ static int sam_tsd_waitsample(struct sam_tsd_s *priv, struct sam_sample_s *sampl
{
/* Wait for a sample data */
- ivdbg("Waiting..\n");
+ iinfo("Waiting..\n");
priv->nwaiters++;
ret = sem_wait(&priv->waitsem);
priv->nwaiters--;
@@ -391,14 +391,14 @@ static int sam_tsd_waitsample(struct sam_tsd_s *priv, struct sam_sample_s *sampl
* the failure now.
*/
- idbg("ERROR: sem_wait: %d\n", errno);
+ ierr("ERROR: sem_wait: %d\n", errno);
DEBUGASSERT(errno == EINTR);
ret = -EINTR;
goto errout;
}
}
- ivdbg("Sampled\n");
+ iinfo("Sampled\n");
/* Re-acquire the semaphore that manages mutually exclusive access to
* the device structure. We may have to wait here. But we have our sample.
@@ -538,7 +538,7 @@ static void sam_tsd_bottomhalf(void *arg)
/* Handle the change from pen down to pen up */
- ivdbg("pending: %08x pendown: %d contact: %d\n",
+ iinfo("pending: %08x pendown: %d contact: %d\n",
pending, pendown, priv->sample.contact);
if (!pendown)
@@ -644,7 +644,7 @@ static void sam_tsd_bottomhalf(void *arg)
if (xraw == 0 || xraw >= xscale || yraw == 0 || yraw > yscale)
{
- idbg("Discarding: x %d:%d y %d:%d\n", xraw, xscale);
+ ierr("Discarding: x %d:%d y %d:%d\n", xraw, xscale);
goto ignored;
}
@@ -799,7 +799,7 @@ static int sam_tsd_schedule(struct sam_tsd_s *priv)
ret = work_queue(HPWORK, &priv->work, sam_tsd_bottomhalf, priv, 0);
if (ret != 0)
{
- illdbg("Failed to queue work: %d\n", ret);
+ illerr("Failed to queue work: %d\n", ret);
}
return OK;
@@ -834,7 +834,7 @@ static int sam_tsd_open(struct file *filep)
uint8_t tmp;
int ret;
- ivdbg("crefs: %d\n", priv->crefs);
+ iinfo("crefs: %d\n", priv->crefs);
/* Get exclusive access to the device structures */
@@ -883,7 +883,7 @@ static int sam_tsd_close(struct file *filep)
FAR struct inode *inode = filep->f_inode;
FAR struct sam_tsd_s *priv = inode->i_private;
- ivdbg("crefs: %d\n", priv->crefs);
+ iinfo("crefs: %d\n", priv->crefs);
/* Get exclusive access to the ADC device */
@@ -919,7 +919,7 @@ static ssize_t sam_tsd_read(struct file *filep, char *buffer, size_t len)
struct sam_sample_s sample;
int ret;
- ivdbg("buffer:%p len:%d\n", buffer, len);
+ iinfo("buffer:%p len:%d\n", buffer, len);
DEBUGASSERT(filep);
inode = filep->f_inode;
@@ -936,7 +936,7 @@ static ssize_t sam_tsd_read(struct file *filep, char *buffer, size_t len)
* handle smaller reads... but why?
*/
- idbg("ERROR: Unsupported read size: %d\n", len);
+ ierr("ERROR: Unsupported read size: %d\n", len);
return -ENOSYS;
}
@@ -954,7 +954,7 @@ static ssize_t sam_tsd_read(struct file *filep, char *buffer, size_t len)
* option, then just return an error.
*/
- ivdbg("Sample data is not available\n");
+ iinfo("Sample data is not available\n");
if (filep->f_oflags & O_NONBLOCK)
{
ret = -EAGAIN;
@@ -968,7 +968,7 @@ static ssize_t sam_tsd_read(struct file *filep, char *buffer, size_t len)
{
/* We might have been awakened by a signal */
- idbg("ERROR: sam_tsd_waitsample: %d\n", ret);
+ ierr("ERROR: sam_tsd_waitsample: %d\n", ret);
goto errout;
}
}
@@ -1018,16 +1018,16 @@ static ssize_t sam_tsd_read(struct file *filep, char *buffer, size_t len)
report->point[0].flags = TSD_PENMOVE;
}
- ivdbg(" id: %d\n", report->point[0].id);
- ivdbg(" flags: %02x\n", report->point[0].flags);
- ivdbg(" x: %d\n", report->point[0].x);
- ivdbg(" y: %d\n", report->point[0].y);
+ iinfo(" id: %d\n", report->point[0].id);
+ iinfo(" flags: %02x\n", report->point[0].flags);
+ iinfo(" x: %d\n", report->point[0].x);
+ iinfo(" y: %d\n", report->point[0].y);
ret = SIZEOF_TOUCH_SAMPLE_S(1);
errout:
sam_adc_unlock(priv->adc);
- ivdbg("Returning: %d\n", ret);
+ iinfo("Returning: %d\n", ret);
return (ssize_t)ret;
}
@@ -1041,7 +1041,7 @@ static int sam_tsd_ioctl(struct file *filep, int cmd, unsigned long arg)
struct sam_tsd_s *priv;
int ret;
- ivdbg("cmd: %d arg: %ld\n", cmd, arg);
+ iinfo("cmd: %d arg: %ld\n", cmd, arg);
DEBUGASSERT(filep);
inode = filep->f_inode;
@@ -1077,7 +1077,7 @@ static int sam_tsd_poll(struct file *filep, struct pollfd *fds, bool setup)
int ret = OK;
int i;
- ivdbg("setup: %d\n", (int)setup);
+ iinfo("setup: %d\n", (int)setup);
DEBUGASSERT(filep && fds);
inode = filep->f_inode;
@@ -1655,7 +1655,7 @@ int sam_tsd_register(struct sam_adc_s *adc, int minor)
char devname[DEV_NAMELEN];
int ret;
- ivdbg("minor: %d\n", minor);
+ iinfo("minor: %d\n", minor);
/* Debug-only sanity checks */
@@ -1674,12 +1674,12 @@ int sam_tsd_register(struct sam_adc_s *adc, int minor)
/* Register the device as an input device */
(void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor);
- ivdbg("Registering %s\n", devname);
+ iinfo("Registering %s\n", devname);
ret = register_driver(devname, &g_tsdops, 0666, priv);
if (ret < 0)
{
- idbg("ERROR: register_driver() failed: %d\n", ret);
+ ierr("ERROR: register_driver() failed: %d\n", ret);
goto errout_with_priv;
}
@@ -1724,7 +1724,7 @@ void sam_tsd_interrupt(uint32_t pending)
ret = sam_tsd_schedule(priv);
if (ret < 0)
{
- idbg("ERROR: sam_tsd_schedule failed: %d\n", ret);
+ ierr("ERROR: sam_tsd_schedule failed: %d\n", ret);
}
}
}
diff --git a/arch/arm/src/sama5/sam_twi.c b/arch/arm/src/sama5/sam_twi.c
index 14df0f62a4219d3256436e87d7e80bd7eef11761..c08135a1ceea6abca5a243738ac290a28f4e01b0 100644
--- a/arch/arm/src/sama5/sam_twi.c
+++ b/arch/arm/src/sama5/sam_twi.c
@@ -103,7 +103,7 @@
* to transfer on byte. So these define a "long" timeout.
*/
-#if defined(CONFIG_DEBUG_I2C) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_I2C) && defined(CONFIG_DEBUG_INFO)
# define TWI_TIMEOUT_MSPB (50) /* 50 msec/byte */
#else
# define TWI_TIMEOUT_MSPB (5) /* 5 msec/byte */
@@ -124,18 +124,18 @@
#define MKI2C_OUTPUT(p) (((p) & (PIO_PORT_MASK | PIO_PIN_MASK)) | I2C_OUTPUT)
/* Debug ***********************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
+/* CONFIG_DEBUG_I2C + CONFIG_DEBUG_FEATURES enables general I2C debug output. */
#ifdef CONFIG_DEBUG_I2C
-# define i2cdbg dbg
-# define i2cvdbg vdbg
-# define i2clldbg lldbg
-# define i2cllvdbg llvdbg
+# define i2cerr err
+# define i2cinfo info
+# define i2cllerr llerr
+# define i2cllinfo llinfo
#else
-# define i2cdbg(x...)
-# define i2cvdbg(x...)
-# define i2clldbg(x...)
-# define i2cllvdbg(x...)
+# define i2cerr(x...)
+# define i2cinfo(x...)
+# define i2cllerr(x...)
+# define i2cllinfo(x...)
#endif
/****************************************************************************
@@ -384,7 +384,7 @@ static bool twi_checkreg(struct twi_dev_s *priv, bool wr, uint32_t value,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -416,7 +416,7 @@ static uint32_t twi_getabs(struct twi_dev_s *priv, uintptr_t address)
if (twi_checkreg(priv, false, value, address))
{
- lldbg("%08x->%08x\n", address, value);
+ llerr("%08x->%08x\n", address, value);
}
return value;
@@ -437,7 +437,7 @@ static void twi_putabs(struct twi_dev_s *priv, uintptr_t address,
{
if (twi_checkreg(priv, true, value, address))
{
- lldbg("%08x<-%08x\n", address, value);
+ llerr("%08x<-%08x\n", address, value);
}
putreg32(value, address);
@@ -514,9 +514,9 @@ static int twi_wait(struct twi_dev_s *priv, unsigned int size)
do
{
- i2cvdbg("TWI%d Waiting...\n", priv->attr->twi);
+ i2cinfo("TWI%d Waiting...\n", priv->attr->twi);
twi_takesem(&priv->waitsem);
- i2cvdbg("TWI%d Awakened with result: %d\n",
+ i2cinfo("TWI%d Awakened with result: %d\n",
priv->attr->twi, priv->result);
}
while (priv->result == -EBUSY);
@@ -574,7 +574,7 @@ static int twi_interrupt(struct twi_dev_s *priv)
imr = twi_getrel(priv, SAM_TWI_IMR_OFFSET);
pending = sr & imr;
- i2cllvdbg("TWI%d pending: %08x\n", priv->attr->twi, pending);
+ i2cllinfo("TWI%d pending: %08x\n", priv->attr->twi, pending);
/* Byte received */
@@ -670,7 +670,7 @@ static int twi_interrupt(struct twi_dev_s *priv)
{
/* Wake up the thread with an I/O error indication */
- i2clldbg("ERROR: TWI%d pending: %08x\n", priv->attr->twi, pending);
+ i2cllerr("ERROR: TWI%d pending: %08x\n", priv->attr->twi, pending);
twi_wakeup(priv, -EIO);
}
@@ -720,7 +720,7 @@ static void twi_timeout(int argc, uint32_t arg, ...)
{
struct twi_dev_s *priv = (struct twi_dev_s *)arg;
- i2clldbg("ERROR: TWI%d Timeout!\n", priv->attr->twi);
+ i2cllerr("ERROR: TWI%d Timeout!\n", priv->attr->twi);
twi_wakeup(priv, -ETIMEDOUT);
}
@@ -841,7 +841,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
int ret;
DEBUGASSERT(dev != NULL && msgs != NULL && count > 0);
- i2cvdbg("TWI%d count: %d\n", priv->attr->twi, count);
+ i2cinfo("TWI%d count: %d\n", priv->attr->twi, count);
/* Calculate the total transfer size so that we can calculate a reasonable
* timeout value.
@@ -887,7 +887,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
ret = twi_wait(priv, size);
if (ret < 0)
{
- i2cdbg("ERROR: Transfer failed: %d\n", ret);
+ i2cerr("ERROR: Transfer failed: %d\n", ret);
}
leave_critical_section(flags);
@@ -1127,7 +1127,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency)
uint32_t regval;
uint32_t mck;
- i2cvdbg("TWI%d Initializing\n", priv->attr->twi);
+ i2cinfo("TWI%d Initializing\n", priv->attr->twi);
/* Configure PIO pins */
@@ -1228,7 +1228,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
irqstate_t flags;
int ret;
- i2cvdbg("Initializing TWI%d\n", bus);
+ i2cinfo("Initializing TWI%d\n", bus);
#ifdef CONFIG_SAMA5_TWI0
if (bus == 0)
@@ -1287,7 +1287,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
else
#endif
{
- i2cdbg("ERROR: Unsupported bus: TWI%d\n", bus);
+ i2cerr("ERROR: Unsupported bus: TWI%d\n", bus);
return NULL;
}
@@ -1300,7 +1300,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
priv->timeout = wd_create();
if (priv->timeout == NULL)
{
- idbg("ERROR: Failed to allocate a timer\n");
+ ierr("ERROR: Failed to allocate a timer\n");
goto errout_with_irq;
}
@@ -1309,7 +1309,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
ret = irq_attach(priv->attr->irq, priv->attr->handler);
if (ret < 0)
{
- idbg("ERROR: Failed to attach irq %d\n", priv->attr->irq);
+ ierr("ERROR: Failed to attach irq %d\n", priv->attr->irq);
goto errout_with_wdog;
}
@@ -1347,7 +1347,7 @@ int sam_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
{
struct twi_dev_s *priv = (struct twi_dev_s *) dev;
- i2cvdbg("TWI%d Un-initializing\n", priv->attr->twi);
+ i2cinfo("TWI%d Un-initializing\n", priv->attr->twi);
/* Disable TWI interrupts */
diff --git a/arch/arm/src/sama5/sam_udphs.c b/arch/arm/src/sama5/sam_udphs.c
index 06c2cf2fed41d8f79cf8df99275d26d87b62238e..00f85e6381ef0e503a71b6cd0c69a6aefefe879a 100644
--- a/arch/arm/src/sama5/sam_udphs.c
+++ b/arch/arm/src/sama5/sam_udphs.c
@@ -95,7 +95,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_SAMA5_UDPHS_REGDEBUG
#endif
@@ -671,7 +671,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
#ifdef CONFIG_SAMA5_UDPHS_REGDEBUG
static void sam_printreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
{
- lldbg("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
+ llerr("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
}
#endif
@@ -722,7 +722,7 @@ static void sam_checkreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ llerr("[repeats %d more times]\n", count);
}
}
@@ -797,36 +797,36 @@ static inline void sam_putreg(uint32_t regval, uint32_t regaddr)
* Name: sam_dumpep
****************************************************************************/
-#if defined(CONFIG_SAMA5_UDPHS_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMA5_UDPHS_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void sam_dumpep(struct sam_usbdev_s *priv, int epno)
{
/* Global Registers */
- lldbg("Global Register:\n");
- lldbg(" CTRL: %04x\n", sam_getreg(SAM_UDPHS_CTRL));
- lldbg(" FNUM: %04x\n", sam_getreg(SAM_UDPHS_FNUM));
- lldbg(" IEN: %04x\n", sam_getreg(SAM_UDPHS_IEN));
- lldbg(" INSTA: %04x\n", sam_getreg(SAM_UDPHS_INTSTA));
- lldbg(" TST: %04x\n", sam_getreg(SAM_UDPHS_TST));
+ llerr("Global Register:\n");
+ llerr(" CTRL: %04x\n", sam_getreg(SAM_UDPHS_CTRL));
+ llerr(" FNUM: %04x\n", sam_getreg(SAM_UDPHS_FNUM));
+ llerr(" IEN: %04x\n", sam_getreg(SAM_UDPHS_IEN));
+ llerr(" INSTA: %04x\n", sam_getreg(SAM_UDPHS_INTSTA));
+ llerr(" TST: %04x\n", sam_getreg(SAM_UDPHS_TST));
/* Endpoint registers */
- lldbg("Endpoint %d Register:\n", epno);
- lldbg(" CFG: %04x\n", sam_getreg(SAM_UDPHS_EPTCFG(epno)));
- lldbg(" CTL: %04x\n", sam_getreg(SAM_UDPHS_EPTCTL(epno)));
- lldbg(" STA: %04x\n", sam_getreg(SAM_UDPHS_EPTSTA(epno)));
+ llerr("Endpoint %d Register:\n", epno);
+ llerr(" CFG: %04x\n", sam_getreg(SAM_UDPHS_EPTCFG(epno)));
+ llerr(" CTL: %04x\n", sam_getreg(SAM_UDPHS_EPTCTL(epno)));
+ llerr(" STA: %04x\n", sam_getreg(SAM_UDPHS_EPTSTA(epno)));
- lldbg("DMA %d Register:\n", epno);
+ llerr("DMA %d Register:\n", epno);
if ((SAM_EPSET_DMA & SAM_EP_BIT(epno)) != 0)
{
- lldbg(" NXTDSC: %04x\n", sam_getreg(SAM_UDPHS_DMANXTDSC(epno)));
- lldbg(" ADDRESS: %04x\n", sam_getreg(SAM_UDPHS_DMAADDRESS(epno)));
- lldbg(" CONTROL: %04x\n", sam_getreg(SAM_UDPHS_DMACONTROL(epno)));
- lldbg(" STATUS: %04x\n", sam_getreg(SAM_UDPHS_DMASTATUS(epno)));
+ llerr(" NXTDSC: %04x\n", sam_getreg(SAM_UDPHS_DMANXTDSC(epno)));
+ llerr(" ADDRESS: %04x\n", sam_getreg(SAM_UDPHS_DMAADDRESS(epno)));
+ llerr(" CONTROL: %04x\n", sam_getreg(SAM_UDPHS_DMACONTROL(epno)));
+ llerr(" STATUS: %04x\n", sam_getreg(SAM_UDPHS_DMASTATUS(epno)));
}
else
{
- lldbg(" None\n");
+ llerr(" None\n");
}
}
#endif
@@ -1357,7 +1357,7 @@ static int sam_req_write(struct sam_usbdev_s *priv, struct sam_ep_s *privep)
return -ENOENT;
}
- ullvdbg("epno=%d req=%p: len=%d xfrd=%d inflight=%d zlpneeded=%d\n",
+ ullinfo("epno=%d req=%p: len=%d xfrd=%d inflight=%d zlpneeded=%d\n",
epno, privreq, privreq->req.len, privreq->req.xfrd,
privreq->inflight, privep->zlpneeded);
@@ -1600,7 +1600,7 @@ static int sam_req_read(struct sam_usbdev_s *priv, struct sam_ep_s *privep,
return -ENOENT;
}
- ullvdbg("EP%d: len=%d xfrd=%d\n",
+ ullinfo("EP%d: len=%d xfrd=%d\n",
epno, privreq->req.len, privreq->req.xfrd);
/* Ignore any attempt to receive a zero length packet */
@@ -1885,7 +1885,7 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
index.w = GETUINT16(priv->ctrl.index);
len.w = GETUINT16(priv->ctrl.len);
- ullvdbg("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
/* Dispatch any non-standard requests */
@@ -2049,7 +2049,7 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
{
/* Special case recipient=device test mode */
- ullvdbg("test mode: %d\n", index.w);
+ ullinfo("test mode: %d\n", index.w);
}
else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
{
@@ -2349,7 +2349,7 @@ static void sam_dma_interrupt(struct sam_usbdev_s *priv, int epno)
/* Get the result of the DMA operation */
dmastatus = sam_getreg(SAM_UDPHS_DMASTATUS(epno));
- uvdbg("DMA%d DMASTATUS: %08x\n", epno, dmastatus);
+ uinfo("DMA%d DMASTATUS: %08x\n", epno, dmastatus);
/* Disable DMA interrupt to avoid receiving 2 (B_EN and TR_EN) */
@@ -3220,7 +3220,7 @@ static int sam_ep_configure_internal(struct sam_ep_s *privep,
uint8_t nbtrans;
bool dirin;
- uvdbg("len: %02x type: %02x addr: %02x attr: %02x "
+ uinfo("len: %02x type: %02x addr: %02x attr: %02x "
"maxpacketsize: %02x %02x interval: %02x\n",
desc->len, desc->type, desc->addr, desc->attr,
desc->mxpacketsize[0], desc->mxpacketsize[1],
@@ -3397,7 +3397,7 @@ static int sam_ep_configure(struct usbdev_ep_s *ep,
/* Verify parameters. Endpoint 0 is not available at this interface */
-#if defined(CONFIG_DEBUG) || defined(CONFIG_USBDEV_TRACE)
+#if defined(CONFIG_DEBUG_FEATURES) || defined(CONFIG_USBDEV_TRACE)
uint8_t epno = USB_EPNO(desc->addr);
usbtrace(TRACE_EPCONFIGURE, (uint16_t)epno);
@@ -3436,11 +3436,11 @@ static int sam_ep_disable(struct usbdev_ep_s *ep)
irqstate_t flags;
uint8_t epno;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
- ulldbg("ERROR: ep=%p\n", ep);
+ ullerr("ERROR: ep=%p\n", ep);
return -EINVAL;
}
#endif
@@ -3473,7 +3473,7 @@ static struct usbdev_req_s *sam_ep_allocreq(struct usbdev_ep_s *ep)
{
struct sam_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3505,7 +3505,7 @@ static void sam_ep_freereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
{
struct sam_req_s *privreq = (struct sam_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3568,11 +3568,11 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
uint8_t epno;
int ret = OK;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
- ulldbg("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+ ullerr("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
@@ -3580,11 +3580,11 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
usbtrace(TRACE_EPSUBMIT, USB_EPNO(ep->eplog));
priv = privep->dev;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!priv->driver)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
- ulldbg("ERROR: driver=%p\n", priv->driver);
+ ullerr("ERROR: driver=%p\n", priv->driver);
return -ESHUTDOWN;
}
#endif
@@ -3611,7 +3611,7 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
if (privep->stalled)
{
sam_req_abort(privep, privreq, -EBUSY);
- ulldbg("ERROR: stalled\n");
+ ullerr("ERROR: stalled\n");
ret = -EPERM;
}
else
@@ -3660,7 +3660,7 @@ static int sam_ep_cancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
struct sam_ep_s *privep = (struct sam_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3687,7 +3687,7 @@ static int sam_ep_stall(struct usbdev_ep_s *ep, bool resume)
uint32_t regval;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3826,7 +3826,7 @@ static struct usbdev_ep_s *sam_allocep(struct usbdev_s *dev, uint8_t epno,
uint16_t epset = SAM_EPSET_NOTEP0;
usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3888,7 +3888,7 @@ static void sam_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep)
struct sam_usbdev_s *priv;
struct sam_ep_s *privep;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev || !ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3920,7 +3920,7 @@ static int sam_getframe(struct usbdev_s *dev)
uint32_t regval;
uint16_t frameno;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3952,7 +3952,7 @@ static int sam_wakeup(struct usbdev_s *dev)
uint32_t regval;
usbtrace(TRACE_DEVWAKEUP, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -3998,7 +3998,7 @@ static int sam_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@@ -4300,7 +4300,7 @@ static void sam_sw_setup(struct sam_usbdev_s *priv)
kmm_memalign(16, CONFIG_SAMA5_UDPHS_NDTDS * sizeof(struct sam_dtd_s));
if (!priv->dtdpool)
{
- udbg("ERROR: Failed to allocate the DMA transfer descriptor pool\n");
+ uerr("ERROR: Failed to allocate the DMA transfer descriptor pool\n");
return NULL;
}
@@ -4517,7 +4517,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@@ -4591,7 +4591,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (driver != priv->driver)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/sama5/sam_wdt.c b/arch/arm/src/sama5/sam_wdt.c
index d14f45c1983e1786b94ca680d4948577bb65c1a6..60b079df589cb9a460945c5ea4c31e9860d79fa3 100644
--- a/arch/arm/src/sama5/sam_wdt.c
+++ b/arch/arm/src/sama5/sam_wdt.c
@@ -82,16 +82,16 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the watchdog
- * driver. NOTE: that only lldbg types are used so that the output is
+ * driver. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_WATCHDOG
-# define wddbg lldbg
-# define wdvdbg llvdbg
+# define wderr llerr
+# define wdinfo llinfo
#else
-# define wddbg(x...)
-# define wdvdbg(x...)
+# define wderr(x...)
+# define wdinfo(x...)
#endif
/****************************************************************************
@@ -118,7 +118,7 @@ struct sam_lowerhalf_s
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_SAMA5_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMA5_WDT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t sam_getreg(uintptr_t regaddr);
static void sam_putreg(uint32_t regval, uintptr_t regaddr);
#else
@@ -178,7 +178,7 @@ static struct sam_lowerhalf_s g_wdtdev;
*
****************************************************************************/
-#if defined(CONFIG_SAMA5_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMA5_WDT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t sam_getreg(uintptr_t regaddr)
{
static uint32_t prevaddr = 0;
@@ -199,7 +199,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return regval;
@@ -216,7 +216,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -228,7 +228,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
/* Show the register value read */
- lldbg("%08x->%048\n", regaddr, regval);
+ llerr("%08x->%048\n", regaddr, regval);
return regval;
}
#endif
@@ -241,12 +241,12 @@ static uint32_t sam_getreg(uintptr_t regaddr)
*
****************************************************************************/
-#if defined(CONFIG_SAMA5_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMA5_WDT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void sam_putreg(uint32_t regval, uintptr_t regaddr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
/* Write the value */
@@ -315,7 +315,7 @@ static int sam_start(FAR struct watchdog_lowerhalf_s *lower)
* timer with the newly programmed mode parameters.
*/
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
return priv->started ? OK : -ENOSYS;
}
@@ -343,7 +343,7 @@ static int sam_stop(FAR struct watchdog_lowerhalf_s *lower)
* timer with the newly programmed mode parameters.
*/
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
return -ENOSYS;
}
@@ -366,7 +366,7 @@ static int sam_stop(FAR struct watchdog_lowerhalf_s *lower)
static int sam_keepalive(FAR struct watchdog_lowerhalf_s *lower)
{
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
/* Write WDT_CR_WDRSTT to the WDT CR regiser (along with the KEY value)
* will restart the watchdog timer.
@@ -397,7 +397,7 @@ static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower,
{
FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower;
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
DEBUGASSERT(priv);
/* Return the status bit */
@@ -426,10 +426,10 @@ static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower,
status->timeleft = 0;
- wdvdbg("Status :\n");
- wdvdbg(" flags : %08x\n", status->flags);
- wdvdbg(" timeout : %d\n", status->timeout);
- wdvdbg(" timeleft : %d\n", status->timeleft);
+ wdinfo("Status :\n");
+ wdinfo(" flags : %08x\n", status->flags);
+ wdinfo(" timeout : %d\n", status->timeout);
+ wdinfo(" timeleft : %d\n", status->timeleft);
return OK;
}
@@ -457,13 +457,13 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
uint32_t regval;
DEBUGASSERT(priv);
- wdvdbg("Entry: timeout=%d\n", timeout);
+ wdinfo("Entry: timeout=%d\n", timeout);
/* Can this timeout be represented? */
if (timeout < WDT_MINTIMEOUT || timeout >= WDT_MAXTIMEOUT)
{
- wddbg("Cannot represent timeout: %d < %d > %d\n",
+ wderr("Cannot represent timeout: %d < %d > %d\n",
WDT_MINTIMEOUT, timeout, WDT_MAXTIMEOUT);
return -ERANGE;
}
@@ -496,7 +496,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
priv->reload = reload;
- wdvdbg("reload=%d timout: %d->%d\n",
+ wdinfo("reload=%d timout: %d->%d\n",
reload, timeout, priv->timeout);
/* Set the WDT_MR according to calculated value
@@ -541,7 +541,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
priv->started = true;
- wdvdbg("Setup: CR: %08x MR: %08x SR: %08x\n",
+ wdinfo("Setup: CR: %08x MR: %08x SR: %08x\n",
sam_getreg(SAM_WDT_CR), sam_getreg(SAM_WDT_MR),
sam_getreg(SAM_WDT_SR));
@@ -574,7 +574,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
xcpt_t handler)
{
#ifndef CONFIG_SAMA5_WDT_INTERRUPT
- wddbg("ERROR: Not configured for this mode\n");
+ wderr("ERROR: Not configured for this mode\n");
return NULL;
#else
FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower;
@@ -582,7 +582,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
xcpt_t oldhandler;
DEBUGASSERT(priv);
- wdvdbg("Entry: handler=%p\n", handler);
+ wdinfo("Entry: handler=%p\n", handler);
/* Get the old handler return value */
@@ -636,7 +636,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
unsigned long arg)
{
- wdvdbg("cmd=%d arg=%ld\n", cmd, arg);
+ wdinfo("cmd=%d arg=%ld\n", cmd, arg);
/* No ioctls are supported */
@@ -667,7 +667,7 @@ int sam_wdt_initialize(void)
{
FAR struct sam_lowerhalf_s *priv = &g_wdtdev;
- wdvdbg("Entry: CR: %08x MR: %08x SR: %08x\n",
+ wdinfo("Entry: CR: %08x MR: %08x SR: %08x\n",
sam_getreg(SAM_WDT_CR), sam_getreg(SAM_WDT_MR),
sam_getreg(SAM_WDT_SR));
diff --git a/arch/arm/src/sama5/sam_xdmac.c b/arch/arm/src/sama5/sam_xdmac.c
index bb4ce4e1ddcb54165a3fede40c35bdc35981a657..48a69a16e31954c7c341cf6678b23458c2dddd54 100644
--- a/arch/arm/src/sama5/sam_xdmac.c
+++ b/arch/arm/src/sama5/sam_xdmac.c
@@ -807,7 +807,7 @@ static uint8_t sam_channel(uint8_t pid, const struct sam_pidmap_s *table,
}
}
- dmadbg("No channel found for pid %d\n", pid);
+ dmaerr("No channel found for pid %d\n", pid);
DEBUGPANIC();
return 0x3f;
}
@@ -1330,7 +1330,7 @@ sam_allocdesc(struct sam_xdmach_s *xdmach, struct chnext_view1_s *prev,
* Obviously setting it to zero would break that usage.
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (csa != 0)
#endif
{
@@ -1650,7 +1650,7 @@ static inline int sam_single(struct sam_xdmach_s *xdmach)
static inline int sam_multiple(struct sam_xdmach_s *xdmach)
{
struct sam_xdmac_s *xdmac = sam_controller(xdmach);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
struct chnext_view1_s *llhead = xdmach->llhead;
#endif
uintptr_t paddr;
@@ -1860,7 +1860,7 @@ static int sam_xdmac_interrupt(struct sam_xdmac_s *xdmac)
{
/* Yes... Terminate the transfer with an error? */
- dmalldbg("ERROR: DMA failed: %08x\n", chpending);
+ dmallerr("ERROR: DMA failed: %08x\n", chpending);
sam_dmaterminate(xdmach, -EIO);
}
@@ -1877,7 +1877,7 @@ static int sam_xdmac_interrupt(struct sam_xdmac_s *xdmac)
else
{
- dmalldbg("ERROR: Unexpected interrupt: %08x\n", chpending);
+ dmallerr("ERROR: Unexpected interrupt: %08x\n", chpending);
DEBUGPANIC();
}
@@ -1957,7 +1957,7 @@ void sam_dmainitialize(struct sam_xdmac_s *xdmac)
void weak_function up_dmainitialize(void)
{
#ifdef CONFIG_SAMA5_XDMAC0
- dmallvdbg("Initialize XDMAC0\n");
+ dmallinfo("Initialize XDMAC0\n");
/* Enable peripheral clock */
@@ -1977,7 +1977,7 @@ void weak_function up_dmainitialize(void)
#endif
#ifdef CONFIG_SAMA5_XDMAC1
- dmallvdbg("Initialize XDMAC1\n");
+ dmallinfo("Initialize XDMAC1\n");
/* Enable peripheral clock */
@@ -2039,7 +2039,7 @@ DMA_HANDLE sam_dmachannel(uint8_t dmacno, uint32_t chflags)
#endif
{
- dmadbg("ERROR: Bad XDMAC number: %d\n", dmacno);
+ dmaerr("ERROR: Bad XDMAC number: %d\n", dmacno);
DEBUGPANIC();
return (DMA_HANDLE)NULL;
}
@@ -2083,12 +2083,12 @@ DMA_HANDLE sam_dmachannel(uint8_t dmacno, uint32_t chflags)
if (xdmach)
{
- dmavdbg("XDMAC%d CH%d: chflags: %08x returning xdmach: %p\n",
+ dmainfo("XDMAC%d CH%d: chflags: %08x returning xdmach: %p\n",
(int)dmacno, xdmach->chan, (int)chflags, xdmach);
}
else
{
- dmadbg("ERROR: Failed allocate XDMAC%d channel\n", (int)dmacno);
+ dmaerr("ERROR: Failed allocate XDMAC%d channel\n", (int)dmacno);
}
return (DMA_HANDLE)xdmach;
@@ -2119,13 +2119,13 @@ void sam_dmaconfig(DMA_HANDLE handle, uint32_t chflags)
xdmach->flags = chflags;
#if defined(CONFIG_SAMA5_XDMAC0) && defined(CONFIG_SAMA5_XDMAC1)
- dmavdbg("XDMAC%d CH%d: chflags: %08x\n",
+ dmainfo("XDMAC%d CH%d: chflags: %08x\n",
xdmach->xdmac, xdmach->chan, (int)chflags);
#elif defined(CONFIG_SAMA5_XDMAC0)
- dmavdbg("XDMAC0 CH%d: chflags: %08x\n",
+ dmainfo("XDMAC0 CH%d: chflags: %08x\n",
xdmach->chan, (int)chflags);
#else
- dmavdbg("XDMAC1 CH%d: chflags: %08x\n",
+ dmainfo("XDMAC1 CH%d: chflags: %08x\n",
xdmach->chan, (int)chflags);
#endif
}
@@ -2148,7 +2148,7 @@ void sam_dmafree(DMA_HANDLE handle)
struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
struct sam_xdmac_s *xdmac;
- dmavdbg("xdmach: %p\n", xdmach);
+ dmainfo("xdmach: %p\n", xdmach);
DEBUGASSERT((xdmach != NULL) && (xdmach->inuse));
xdmac = sam_controller(xdmach);
@@ -2186,10 +2186,10 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
size_t remaining;
int ret = OK;
- dmavdbg("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+ dmainfo("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
xdmach, (int)paddr, (int)maddr, (int)nbytes);
DEBUGASSERT(xdmach);
- dmavdbg("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
+ dmainfo("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
/* The maximum transfer size in bytes depends upon the maximum number of
* transfers and the number of bytes per transfer.
@@ -2265,10 +2265,10 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
size_t remaining;
int ret = OK;
- dmavdbg("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+ dmainfo("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
xdmach, (int)paddr, (int)maddr, (int)nbytes);
DEBUGASSERT(xdmach);
- dmavdbg("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
+ dmainfo("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
/* The maximum transfer size in bytes depends upon the maximum number of
* transfers and the number of bytes per transfer.
@@ -2340,7 +2340,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
int ret = -EINVAL;
- dmavdbg("xdmach: %p callback: %p arg: %p\n", xdmach, callback, arg);
+ dmainfo("xdmach: %p callback: %p arg: %p\n", xdmach, callback, arg);
DEBUGASSERT(xdmach != NULL);
/* Verify that the DMA has been setup (i.e., at least one entry in the
@@ -2384,7 +2384,7 @@ void sam_dmastop(DMA_HANDLE handle)
struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
irqstate_t flags;
- dmavdbg("xdmach: %p\n", xdmach);
+ dmainfo("xdmach: %p\n", xdmach);
DEBUGASSERT(xdmach != NULL);
flags = enter_critical_section();
@@ -2465,30 +2465,30 @@ void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
struct sam_xdmac_s *xdmac = sam_controller(xdmach);
- dmadbg("%s\n", msg);
- dmadbg(" DMA Global Registers:\n");
- dmadbg(" GTYPE[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GTYPE_OFFSET, regs->gtype);
- dmadbg(" GCFG[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GCFG_OFFSET, regs->gcfg);
- dmadbg(" GWAC[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GWAC_OFFSET, regs->gwac);
- dmadbg(" GIM[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GIM_OFFSET, regs->gim);
- dmadbg(" GIS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GIS_OFFSET, regs->gis);
- dmadbg(" GS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GS_OFFSET, regs->gs);
- dmadbg(" GRS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GRS_OFFSET, regs->grs);
- dmadbg(" GWS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GWS_OFFSET, regs->gws);
- dmadbg(" GSWS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GSWS_OFFSET, regs->gsws);
- dmadbg(" DMA Channel Registers:\n");
- dmadbg(" CIM[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIM_OFFSET, regs->cim);
- dmadbg(" CIS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIS_OFFSET, regs->cis);
- dmadbg(" CSA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSA_OFFSET, regs->csa);
- dmadbg(" CDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDA_OFFSET, regs->cda);
- dmadbg(" CNDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDA_OFFSET, regs->cnda);
- dmadbg(" CNDC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDC_OFFSET, regs->cndc);
- dmadbg(" CUBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CUBC_OFFSET, regs->cubc);
- dmadbg(" CBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CBC_OFFSET, regs->cbc);
- dmadbg(" CC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CC_OFFSET, regs->cc);
- dmadbg(" CDSMSP[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDSMSP_OFFSET, regs->cdsmsp);
- dmadbg(" CSUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSUS_OFFSET, regs->csus);
- dmadbg(" CDUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDUS_OFFSET, regs->cdus);
+ dmaerr("%s\n", msg);
+ dmaerr(" DMA Global Registers:\n");
+ dmaerr(" GTYPE[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GTYPE_OFFSET, regs->gtype);
+ dmaerr(" GCFG[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GCFG_OFFSET, regs->gcfg);
+ dmaerr(" GWAC[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GWAC_OFFSET, regs->gwac);
+ dmaerr(" GIM[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GIM_OFFSET, regs->gim);
+ dmaerr(" GIS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GIS_OFFSET, regs->gis);
+ dmaerr(" GS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GS_OFFSET, regs->gs);
+ dmaerr(" GRS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GRS_OFFSET, regs->grs);
+ dmaerr(" GWS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GWS_OFFSET, regs->gws);
+ dmaerr(" GSWS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GSWS_OFFSET, regs->gsws);
+ dmaerr(" DMA Channel Registers:\n");
+ dmaerr(" CIM[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIM_OFFSET, regs->cim);
+ dmaerr(" CIS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIS_OFFSET, regs->cis);
+ dmaerr(" CSA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSA_OFFSET, regs->csa);
+ dmaerr(" CDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDA_OFFSET, regs->cda);
+ dmaerr(" CNDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDA_OFFSET, regs->cnda);
+ dmaerr(" CNDC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDC_OFFSET, regs->cndc);
+ dmaerr(" CUBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CUBC_OFFSET, regs->cubc);
+ dmaerr(" CBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CBC_OFFSET, regs->cbc);
+ dmaerr(" CC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CC_OFFSET, regs->cc);
+ dmaerr(" CDSMSP[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDSMSP_OFFSET, regs->cdsmsp);
+ dmaerr(" CSUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSUS_OFFSET, regs->csus);
+ dmaerr(" CDUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDUS_OFFSET, regs->cdus);
}
#endif /* CONFIG_DEBUG_DMA */
#endif /* CONFIG_SAMA5_XDMAC0 || CONFIG_SAMA5_XDMAC1 */
diff --git a/arch/arm/src/sama5/sama5d2x_pio.c b/arch/arm/src/sama5/sama5d2x_pio.c
index d6daf15a82003fb57987c21d863e362e8988481d..1ca67e45bd95537c71e9f4f19e531257c86d4e01 100644
--- a/arch/arm/src/sama5/sama5d2x_pio.c
+++ b/arch/arm/src/sama5/sama5d2x_pio.c
@@ -630,31 +630,31 @@ int sam_dumppio(uint32_t pinset, const char *msg)
if (secure)
{
- lldbg("SPIO%c pinset: %08x base: %08x -- %s\n",
+ llerr("SPIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg);
}
else
{
- lldbg("PIO%c pinset: %08x base: %08x -- %s\n",
+ llerr("PIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg);
}
- lldbg(" MSKR: %08x CFGR: %08x PDSR: %08x LOCKSR: %08x\n",
+ llerr(" MSKR: %08x CFGR: %08x PDSR: %08x LOCKSR: %08x\n",
getreg32(base + SAM_PIO_MSKR_OFFSET), getreg32(base + SAM_PIO_CFGR_OFFSET),
getreg32(base + SAM_PIO_PDSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET));
- lldbg(" ODSR: %08x IMR: %08x ISR: %08x\n",
+ llerr(" ODSR: %08x IMR: %08x ISR: %08x\n",
getreg32(base + SAM_PIO_ODSR_OFFSET), getreg32(base + SAM_PIO_IMR_OFFSET),
getreg32(base + SAM_PIO_ISR_OFFSET));
if (secure)
{
- lldbg(" SCDR: %08x WPMR: %08x WPSR: %08x IOSSR: %08x\n",
+ llerr(" SCDR: %08x WPMR: %08x WPSR: %08x IOSSR: %08x\n",
getreg32(SAM_SPIO_SCDR), getreg32(SAM_SPIO_WPMR),
getreg32(SAM_SPIO_WPSR), getreg32(base + SAM_SPIO_IOSSR_OFFSET));
}
else
{
- lldbg(" WPMR: %08x WPSR: %08x\n",
+ llerr(" WPMR: %08x WPSR: %08x\n",
getreg32(SAM_PIO_WPMR), getreg32(SAM_PIO_WPSR));
}
diff --git a/arch/arm/src/sama5/sama5d2x_pio.h b/arch/arm/src/sama5/sama5d2x_pio.h
index 4b37166d4b3f0a65870dfe31a7eaea17835f8cd7..6f4f28f9a445fdabc711af013906d841b650ef14 100644
--- a/arch/arm/src/sama5/sama5d2x_pio.h
+++ b/arch/arm/src/sama5/sama5d2x_pio.h
@@ -58,7 +58,7 @@
# undef CONFIG_SAMA5_PIO_IRQ
#endif
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_GPIO
#endif
diff --git a/arch/arm/src/sama5/sama5d3x4x_pio.c b/arch/arm/src/sama5/sama5d3x4x_pio.c
index b9379ad868c734f96e427f7711c0ae5c11d69e7b..5bd0e765f2044cd01990a34c377e709d15ab488b 100644
--- a/arch/arm/src/sama5/sama5d3x4x_pio.c
+++ b/arch/arm/src/sama5/sama5d3x4x_pio.c
@@ -40,6 +40,13 @@
#include
+#ifdef CONFIG_DEBUG_GPIO
+/* Output informational debug info even if debug output is not enabled. */
+
+# undef CONFIG_DEBUG_INFO
+# define CONFIG_DEBUG_INFO 1
+#endif
+
#include
#include
#include
@@ -67,10 +74,6 @@
#define PIO_INPUT_BITS (PIO_INPUT | PIO_CFG_DEFAULT)
#define MK_INPUT(p) (((p) & (PIO_PORT_MASK | PIO_PIN_MASK)) | PIO_INPUT_BITS)
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
/****************************************************************************
* Public Data
****************************************************************************/
@@ -869,41 +872,41 @@ int sam_dumppio(uint32_t pinset, const char *msg)
/* The following requires exclusive access to the PIO registers */
flags = enter_critical_section();
- lldbg("PIO%c pinset: %08x base: %08x -- %s\n",
- g_portchar[port], pinset, base, msg);
+ llinfo("PIO%c pinset: %08x base: %08x -- %s\n",
+ g_portchar[port], pinset, base, msg);
#ifdef SAM_PIO_ISLR_OFFSET
- lldbg(" PSR: %08x ISLR: %08x OSR: %08x IFSR: %08x\n",
- getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_ISLR_OFFSET),
- getreg32(base + SAM_PIO_OSR_OFFSET), getreg32(base + SAM_PIO_IFSR_OFFSET));
+ llinfo(" PSR: %08x ISLR: %08x OSR: %08x IFSR: %08x\n",
+ getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_ISLR_OFFSET),
+ getreg32(base + SAM_PIO_OSR_OFFSET), getreg32(base + SAM_PIO_IFSR_OFFSET));
#else
- lldbg(" PSR: %08x OSR: %08x IFSR: %08x\n",
- getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_OSR_OFFSET),
- getreg32(base + SAM_PIO_IFSR_OFFSET));
-#endif
- lldbg(" ODSR: %08x PDSR: %08x IMR: %08x ISR: %08x\n",
- getreg32(base + SAM_PIO_ODSR_OFFSET), getreg32(base + SAM_PIO_PDSR_OFFSET),
- getreg32(base + SAM_PIO_IMR_OFFSET), getreg32(base + SAM_PIO_ISR_OFFSET));
- lldbg(" MDSR: %08x PUSR: %08x ABDCSR: %08x %08x\n",
- getreg32(base + SAM_PIO_MDSR_OFFSET), getreg32(base + SAM_PIO_PUSR_OFFSET),
- getreg32(base + SAM_PIO_ABCDSR1_OFFSET), getreg32(base + SAM_PIO_ABCDSR2_OFFSET));
- lldbg(" IFSCSR: %08x SCDR: %08x PPDSR: %08x OWSR: %08x\n",
- getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIO_SCDR_OFFSET),
- getreg32(base + SAM_PIO_PPDSR_OFFSET), getreg32(base + SAM_PIO_OWSR_OFFSET));
+ llinfo(" PSR: %08x OSR: %08x IFSR: %08x\n",
+ getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_OSR_OFFSET),
+ getreg32(base + SAM_PIO_IFSR_OFFSET));
+#endif
+ llinfo(" ODSR: %08x PDSR: %08x IMR: %08x ISR: %08x\n",
+ getreg32(base + SAM_PIO_ODSR_OFFSET), getreg32(base + SAM_PIO_PDSR_OFFSET),
+ getreg32(base + SAM_PIO_IMR_OFFSET), getreg32(base + SAM_PIO_ISR_OFFSET));
+ llinfo(" MDSR: %08x PUSR: %08x ABDCSR: %08x %08x\n",
+ getreg32(base + SAM_PIO_MDSR_OFFSET), getreg32(base + SAM_PIO_PUSR_OFFSET),
+ getreg32(base + SAM_PIO_ABCDSR1_OFFSET), getreg32(base + SAM_PIO_ABCDSR2_OFFSET));
+ llinfo(" IFSCSR: %08x SCDR: %08x PPDSR: %08x OWSR: %08x\n",
+ getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIO_SCDR_OFFSET),
+ getreg32(base + SAM_PIO_PPDSR_OFFSET), getreg32(base + SAM_PIO_OWSR_OFFSET));
#ifdef SAM_PIO_LOCKSR_OFFSET
- lldbg(" AIMMR: %08x ELSR: %08x FRLHSR: %08x LOCKSR: %08x\n",
- getreg32(base + SAM_PIO_AIMMR_OFFSET), getreg32(base + SAM_PIO_ELSR_OFFSET),
- getreg32(base + SAM_PIO_FRLHSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET));
+ llinfo(" AIMMR: %08x ELSR: %08x FRLHSR: %08x LOCKSR: %08x\n",
+ getreg32(base + SAM_PIO_AIMMR_OFFSET), getreg32(base + SAM_PIO_ELSR_OFFSET),
+ getreg32(base + SAM_PIO_FRLHSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET));
#else
- lldbg(" AIMMR: %08x ELSR: %08x FRLHSR: %08x\n",
- getreg32(base + SAM_PIO_AIMMR_OFFSET), getreg32(base + SAM_PIO_ELSR_OFFSET),
- getreg32(base + SAM_PIO_FRLHSR_OFFSET));
-#endif
- lldbg("SCHMITT: %08x DRIVER: %08x %08x\n",
- getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DRIVER1_OFFSET),
- getreg32(base + SAM_PIO_DRIVER2_OFFSET));
- lldbg(" WPMR: %08x WPSR: %08x\n",
- getreg32(base + SAM_PIO_WPMR_OFFSET), getreg32(base + SAM_PIO_WPSR_OFFSET));
+ llinfo(" AIMMR: %08x ELSR: %08x FRLHSR: %08x\n",
+ getreg32(base + SAM_PIO_AIMMR_OFFSET), getreg32(base + SAM_PIO_ELSR_OFFSET),
+ getreg32(base + SAM_PIO_FRLHSR_OFFSET));
+#endif
+ llinfo("SCHMITT: %08x DRIVER: %08x %08x\n",
+ getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DRIVER1_OFFSET),
+ getreg32(base + SAM_PIO_DRIVER2_OFFSET));
+ llinfo(" WPMR: %08x WPSR: %08x\n",
+ getreg32(base + SAM_PIO_WPMR_OFFSET), getreg32(base + SAM_PIO_WPSR_OFFSET));
leave_critical_section(flags);
return OK;
diff --git a/arch/arm/src/sama5/sama5d3x4x_pio.h b/arch/arm/src/sama5/sama5d3x4x_pio.h
index 63b6615b556955465ba7f093342c3fb3e7fa4b13..86ae201745016affdd9f31a5290306960a374995 100644
--- a/arch/arm/src/sama5/sama5d3x4x_pio.h
+++ b/arch/arm/src/sama5/sama5d3x4x_pio.h
@@ -52,7 +52,7 @@
# undef CONFIG_SAMA5_PIO_IRQ
#endif
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_GPIO
#endif
diff --git a/arch/arm/src/samdl/Make.defs b/arch/arm/src/samdl/Make.defs
index d9a82f959e592953e0732a5e8c066feda4e9fc7c..7ef0105780becf9555c51205ae426c66680edf1d 100644
--- a/arch/arm/src/samdl/Make.defs
+++ b/arch/arm/src/samdl/Make.defs
@@ -65,7 +65,7 @@ else ifeq ($(CONFIG_MODULE),y)
CMN_CSRCS += up_elf.c
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
CMN_CSRCS += up_dumpnvic.c
endif
diff --git a/arch/arm/src/samdl/sam_dmac.c b/arch/arm/src/samdl/sam_dmac.c
index de5004f2d74a5c5195076e76ae3616b16c1a3997..f1afd24ff076e90132a7ed5011a7d2880e0392bd 100644
--- a/arch/arm/src/samdl/sam_dmac.c
+++ b/arch/arm/src/samdl/sam_dmac.c
@@ -769,7 +769,7 @@ static int sam_rxbuffer(struct sam_dmach_s *dmach, uint32_t paddr,
void weak_function up_dmainitialize(void)
{
- dmallvdbg("Initialize DMAC\n");
+ dmallinfo("Initialize DMAC\n");
int i;
/* Initialize global semaphores */
@@ -888,7 +888,7 @@ DMA_HANDLE sam_dmachannel(uint32_t chflags)
sam_givechsem();
- dmavdbg("chflags: %08x returning dmach: %p\n", (int)chflags, dmach);
+ dmainfo("chflags: %08x returning dmach: %p\n", (int)chflags, dmach);
return (DMA_HANDLE)dmach;
}
@@ -914,7 +914,7 @@ void sam_dmaconfig(DMA_HANDLE handle, uint32_t chflags)
/* Set the new DMA channel flags. */
- dmavdbg("chflags: %08x\n", (int)chflags);
+ dmainfo("chflags: %08x\n", (int)chflags);
dmach->dc_flags = chflags;
}
@@ -935,7 +935,7 @@ void sam_dmafree(DMA_HANDLE handle)
{
struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
- dmavdbg("dmach: %p\n", dmach);
+ dmainfo("dmach: %p\n", dmach);
DEBUGASSERT((dmach != NULL) && (dmach->dc_inuse));
/* Mark the channel no longer in use. Clearing the inuse flag is an atomic
@@ -965,12 +965,12 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
size_t maxtransfer;
int ret = OK;
- dmavdbg("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+ dmainfo("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
dmach, (int)paddr, (int)maddr, (int)nbytes);
DEBUGASSERT(dmach);
#if CONFIG_SAMDL_DMAC_NDESC > 0
- dmavdbg("dc_head: %p dc_tail: %p\n", dmach->dc_head, dmach->dc_tail);
+ dmainfo("dc_head: %p dc_tail: %p\n", dmach->dc_head, dmach->dc_tail);
#endif
/* The maximum transfer size in bytes depends upon the maximum number of
@@ -1039,12 +1039,12 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
size_t maxtransfer;
int ret = OK;
- dmavdbg("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+ dmainfo("dmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
dmach, (int)paddr, (int)maddr, (int)nbytes);
DEBUGASSERT(dmach);
#if CONFIG_SAMDL_DMAC_NDESC > 0
- dmavdbg("dc_head: %p dc_tail: %p\n", dmach->dc_head, dmach->dc_tail);
+ dmainfo("dc_head: %p dc_tail: %p\n", dmach->dc_head, dmach->dc_tail);
#endif
/* The maximum transfer size in bytes depends upon the maximum number of
@@ -1115,7 +1115,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
uint8_t memqos;
int ret = -EINVAL;
- dmavdbg("dmach: %p callback: %p arg: %p\n", dmach, callback, arg);
+ dmainfo("dmach: %p callback: %p arg: %p\n", dmach, callback, arg);
DEBUGASSERT(dmach != NULL && dmach->dc_chan < SAMDL_NDMACHAN);
head = &g_base_desc[dmach->dc_chan];
@@ -1240,7 +1240,7 @@ void sam_dmastop(DMA_HANDLE handle)
struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
irqstate_t flags;
- dmavdbg("dmach: %p\n", dmach);
+ dmainfo("dmach: %p\n", dmach);
DEBUGASSERT(dmach != NULL);
flags = enter_critical_section();
@@ -1274,7 +1274,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
regs->crcdatain = getreg32(SAM_DMAC_CRCDATAIN); /* CRC Data Input Register */
regs->crcchksum = getreg32(SAM_DMAC_CRCCHKSUM); /* CRC Checksum Register */
regs->crcstatus = getreg8(SAM_DMAC_CRCSTATUS); /* CRC Status Register */
- regs->dbgctrl = getreg8(SAM_DMAC_DBGCTRL); /* Debug Control Register */
+ regs->errctrl = getreg8(SAM_DMAC_DBGCTRL); /* Debug Control Register */
regs->qosctrl = getreg8(SAM_DMAC_QOSCTRL); /* Quality of Service Control Register */
regs->swtrigctrl = getreg32(SAM_DMAC_SWTRIGCTRL); /* Software Trigger Control Register */
regs->prictrl0 = getreg32(SAM_DMAC_PRICTRL0); /* Priority Control 0 Register */
@@ -1310,19 +1310,19 @@ void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
{
struct sam_dmach_s *dmach = (struct sam_dmach_s *)handle;
- dmadbg("%s\n", msg);
- dmadbg(" DMAC Registers:\n");
- dmadbg(" CTRL: %04x CRCCTRL: %04x CRCDATAIN: %08x CRCCHKSUM: %08x\n",
+ dmaerr("%s\n", msg);
+ dmaerr(" DMAC Registers:\n");
+ dmaerr(" CTRL: %04x CRCCTRL: %04x CRCDATAIN: %08x CRCCHKSUM: %08x\n",
regs->ctrl, regs->crcctrl, regs->crcdatain, regs->crcchksum);
- dmadbg(" CRCSTATUS: %02x DBGCTRL: %02x QOSCTRL: %02x SWTRIGCTRL: %08x\n",
- regs->crcstatus, regs->dbgctrl, regs->qosctrl, regs->swtrigctrl);
- dmadbg(" PRICTRL0: %08x INTPEND: %04x INSTSTATUS: %08x BUSYCH: %08x\n",
+ dmaerr(" CRCSTATUS: %02x DBGCTRL: %02x QOSCTRL: %02x SWTRIGCTRL: %08x\n",
+ regs->crcstatus, regs->errctrl, regs->qosctrl, regs->swtrigctrl);
+ dmaerr(" PRICTRL0: %08x INTPEND: %04x INSTSTATUS: %08x BUSYCH: %08x\n",
regs->prictrl0, regs->intpend, regs->intstatus, regs->busych);
- dmadbg(" PENDCH: %08x ACTIVE: %08x BASEADDR: %08x WRBADDR: %08x\n",
+ dmaerr(" PENDCH: %08x ACTIVE: %08x BASEADDR: %08x WRBADDR: %08x\n",
regs->pendch, regs->active, regs->baseaddr, regs->wrbaddr);
- dmadbg(" CHID: %02x CHCRTRLA: %02x CHCRTRLB: %08x CHINFLAG: %02x\n",
+ dmaerr(" CHID: %02x CHCRTRLA: %02x CHCRTRLB: %08x CHINFLAG: %02x\n",
regs->chid, regs->chctrla, regs->chctrlb, regs->chintflag,
- dmadbg(" CHSTATUS: %02x\n",
+ dmaerr(" CHSTATUS: %02x\n",
regs->chstatus);
}
#endif /* CONFIG_DEBUG_DMA */
diff --git a/arch/arm/src/samdl/sam_dmac.h b/arch/arm/src/samdl/sam_dmac.h
index cc1c60e7a0cd781d2d37aed06b533b53428ccd0b..86224469ffdec482b7bffa3d5aaa9ecf3b1f7493 100644
--- a/arch/arm/src/samdl/sam_dmac.h
+++ b/arch/arm/src/samdl/sam_dmac.h
@@ -64,7 +64,7 @@
/* Configuration ********************************************************************/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_DMA
#endif
diff --git a/arch/arm/src/samdl/sam_idle.c b/arch/arm/src/samdl/sam_idle.c
index be58de12be6351cf9b21f970441e583dcb33a8f0..b54d8d3a7df212c5102b743fa8f40ef3dcddf072 100644
--- a/arch/arm/src/samdl/sam_idle.c
+++ b/arch/arm/src/samdl/sam_idle.c
@@ -99,7 +99,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */
- llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+ llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */
diff --git a/arch/arm/src/samdl/sam_irq.c b/arch/arm/src/samdl/sam_irq.c
index 3f12b9943ac58f79823e36f3b285fd8f5b8c9834..9fc246988358c4df22ce7f70599e1782a650f505 100644
--- a/arch/arm/src/samdl/sam_irq.c
+++ b/arch/arm/src/samdl/sam_irq.c
@@ -84,7 +84,7 @@ volatile uint32_t *g_current_regs[1];
/****************************************************************************
* Name: sam_nmi, sam_busfault, sam_usagefault, sam_pendsv,
- * sam_dbgmonitor, sam_pendsv, sam_reserved
+ * sam_errmonitor, sam_pendsv, sam_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@@ -93,11 +93,11 @@ volatile uint32_t *g_current_regs[1];
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int sam_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -105,7 +105,7 @@ static int sam_nmi(int irq, FAR void *context)
static int sam_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
@@ -113,7 +113,7 @@ static int sam_pendsv(int irq, FAR void *context)
static int sam_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -192,7 +192,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(SAM_IRQ_NMI, sam_nmi);
irq_attach(SAM_IRQ_PENDSV, sam_pendsv);
irq_attach(SAM_IRQ_RESERVED, sam_reserved);
@@ -306,26 +306,26 @@ void sam_dumpnvic(const char *msg, int irq)
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" ISER: %08x ICER: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" ISER: %08x ICER: %08x\n",
getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
- lldbg(" ISPR: %08x ICPR: %08x\n",
+ llerr(" ISPR: %08x ICPR: %08x\n",
getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
- lldbg("SYSCON:\n");
- lldbg(" CPUID: %08x\n",
+ llerr("SYSCON:\n");
+ llerr(" CPUID: %08x\n",
getreg32(ARMV6M_SYSCON_CPUID));
- lldbg(" ICSR: %08x AIRCR: %08x\n",
+ llerr(" ICSR: %08x AIRCR: %08x\n",
getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
- lldbg(" SCR: %08x CCR: %08x\n",
+ llerr(" SCR: %08x CCR: %08x\n",
getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
- lldbg(" SHPR2: %08x SHPR3: %08x\n",
+ llerr(" SHPR2: %08x SHPR3: %08x\n",
getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
leave_critical_section(flags);
diff --git a/arch/arm/src/samdl/sam_port.c b/arch/arm/src/samdl/sam_port.c
index 53c8664efdf97d96710f7312521b6c14b2cfb472..58d0550df37972550d7715e584c678a04fd11c99 100644
--- a/arch/arm/src/samdl/sam_port.c
+++ b/arch/arm/src/samdl/sam_port.c
@@ -538,16 +538,16 @@ int sam_dumpport(uint32_t pinset, const char *msg)
/* The following requires exclusive access to the PORT registers */
flags = enter_critical_section();
- lldbg("PORT%c pin: %d pinset: %08x base: %08x -- %s\n",
+ llerr("PORT%c pin: %d pinset: %08x base: %08x -- %s\n",
g_portchar[port], pin, pinset, base, msg);
- lldbg(" DIR: %08x OUT: %08x IN: %08x\n",
+ llerr(" DIR: %08x OUT: %08x IN: %08x\n",
getreg32(base + SAM_PORT_DIR_OFFSET),
getreg32(base + SAM_PORT_OUT_OFFSET),
getreg32(base + SAM_PORT_IN_OFFSET));
- lldbg(" CTRL: %08x WRCONFIG: %08x\n",
+ llerr(" CTRL: %08x WRCONFIG: %08x\n",
getreg32(base + SAM_PORT_CTRL_OFFSET),
getreg32(base + SAM_PORT_WRCONFIG_OFFSET));
- lldbg(" PMUX[%08x]: %02x PINCFG[%08x]: %02x\n",
+ llerr(" PMUX[%08x]: %02x PINCFG[%08x]: %02x\n",
base + SAM_PORT_PMUX_OFFSET(pin),
getreg8(base + SAM_PORT_PMUX_OFFSET(pin)),
base + SAM_PORT_PINCFG_OFFSET(pin),
diff --git a/arch/arm/src/samdl/sam_port.h b/arch/arm/src/samdl/sam_port.h
index 26ba8bcb5d3562617a54ab2552d2cc20cba4a2f1..3e9704cd141fe23b4c71e1c76e90b1a336b9c78b 100644
--- a/arch/arm/src/samdl/sam_port.h
+++ b/arch/arm/src/samdl/sam_port.h
@@ -379,7 +379,7 @@ bool sam_portread(port_pinset_t pinset);
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
int sam_dumpport(port_pinset_t pinset, const char *msg);
#else
# define sam_dumpport(p,m)
diff --git a/arch/arm/src/samdl/sam_sercom.c b/arch/arm/src/samdl/sam_sercom.c
index ae50ca39c1e3a779a2d481782f713a60517951ea..779db03738fff4175e4f97ba20d3277d9a41859c 100644
--- a/arch/arm/src/samdl/sam_sercom.c
+++ b/arch/arm/src/samdl/sam_sercom.c
@@ -68,14 +68,6 @@
# define HAVE_SERCOM0_4
#endif
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -162,9 +154,9 @@ void sercom_slowclk_configure(int sercom, int gclkgen)
#ifdef CONFIG_SAMDL_SERCOM5
static bool configured5 = false;
#endif
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
#ifdef HAVE_SERCOM0_4
- static uint8_t slowgen = 0xff;
+ static uint8_t slowgen04 = 0xff;
#endif
#ifdef CONFIG_SAMDL_SERCOM5
static uint8_t slowgen5 = 0xff;
@@ -205,19 +197,19 @@ void sercom_slowclk_configure(int sercom, int gclkgen)
*/
configured = true;
-#ifdef CONFIG_DEBUG
- slowgen = (uint8_t)gclkgen;
+#ifdef CONFIG_DEBUG_ASSERTIONS
+ slowgen04 = (uint8_t)gclkgen;
#endif
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
/* Already configured. This is okay provided that the same GCLK
* generator is being used. Otherwise, there is a problem.
*/
else
{
- DEBUGASSERT((int)slowgen == gclkgen);
+ DEBUGASSERT((int)slowgen04 == gclkgen);
}
#endif
break;
@@ -236,12 +228,12 @@ void sercom_slowclk_configure(int sercom, int gclkgen)
*/
configured5 = true;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
slowgen5 = (uint8_t)gclkgen;
#endif
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
/* Already configured. This is okay provided that the same GCLK
* generator is being used. Otherwise, there is a problem.
*/
diff --git a/arch/arm/src/samdl/sam_spi.c b/arch/arm/src/samdl/sam_spi.c
index 2a7df796bac1498d4ada4b8e47f25eb67f556605..f2108ff368134b59e8c56ec73001207e247b830b 100644
--- a/arch/arm/src/samdl/sam_spi.c
+++ b/arch/arm/src/samdl/sam_spi.c
@@ -77,29 +77,17 @@
* Pre-processor Definitions
****************************************************************************/
-/* Clocking *****************************************************************/
-
/* Debug *******************************************************************/
-/* Check if SPI debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_SPI
-# undef CONFIG_SAMDL_SPI_REGDEBUG
-#endif
+/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
/****************************************************************************
@@ -175,7 +163,7 @@ static uint32_t spi_getreg32(struct sam_spidev_s *priv,
static void spi_putreg32(struct sam_spidev_s *priv, uint32_t regval,
unsigned int offset);
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void spi_dumpregs(struct sam_spidev_s *priv, const char *msg);
#else
# define spi_dumpregs(priv,msg)
@@ -569,7 +557,7 @@ static bool spi_checkreg(struct sam_spidev_s *priv, bool wr, uint32_t regval,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -602,7 +590,7 @@ static uint8_t spi_getreg8(struct sam_spidev_s *priv, unsigned int offset)
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
if (spi_checkreg(priv, false, (uint32_t)regval, regaddr))
{
- lldbg("%08x->%02x\n", regaddr, regval);
+ llerr("%08x->%02x\n", regaddr, regval);
}
#endif
@@ -625,7 +613,7 @@ static void spi_putreg8(struct sam_spidev_s *priv, uint8_t regval,
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
if (spi_checkreg(priv, true, (uint32_t)regval, regaddr))
{
- lldbg("%08x<-%02x\n", regaddr, regval);
+ llerr("%08x<-%02x\n", regaddr, regval);
}
#endif
@@ -648,7 +636,7 @@ static uint16_t spi_getreg16(struct sam_spidev_s *priv, unsigned int offset)
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
if (spi_checkreg(priv, false, (uint32_t)regval, regaddr))
{
- lldbg("%08x->%04x\n", regaddr, regval);
+ llerr("%08x->%04x\n", regaddr, regval);
}
#endif
@@ -671,7 +659,7 @@ static void spi_putreg16(struct sam_spidev_s *priv, uint16_t regval,
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
if (spi_checkreg(priv, true, (uint32_t)regval, regaddr))
{
- lldbg("%08x<-%04x\n", regaddr, regval);
+ llerr("%08x<-%04x\n", regaddr, regval);
}
#endif
@@ -694,7 +682,7 @@ static uint32_t spi_getreg32(struct sam_spidev_s *priv, unsigned int offset)
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
if (spi_checkreg(priv, false, regval, regaddr))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -717,7 +705,7 @@ static void spi_putreg32(struct sam_spidev_s *priv, uint32_t regval,
#ifdef CONFIG_SAMDL_SPI_REGDEBUG
if (spi_checkreg(priv, true, regval, regaddr))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -739,19 +727,19 @@ static void spi_putreg32(struct sam_spidev_s *priv, uint32_t regval,
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void spi_dumpregs(struct sam_spidev_s *priv, const char *msg)
{
- spivdbg("%s:\n", msg);
- spivdbg(" CTRLA:%08x CTRLB:%08x DBGCTRL:%02x\n",
+ spiinfo("%s:\n", msg);
+ spiinfo(" CTRLA:%08x CTRLB:%08x DBGCTRL:%02x\n",
getreg32(priv->base + SAM_SPI_CTRLA_OFFSET),
getreg32(priv->base + SAM_SPI_CTRLB_OFFSET),
getreg8(priv->base + SAM_SPI_DBGCTRL_OFFSET));
- spivdbg(" BAUD:%02x INTEN:%02x INTFLAG:%02x\n",
+ spiinfo(" BAUD:%02x INTEN:%02x INTFLAG:%02x\n",
getreg8(priv->base + SAM_SPI_BAUD_OFFSET),
getreg8(priv->base + SAM_SPI_INTENCLR_OFFSET),
getreg8(priv->base + SAM_SPI_INTFLAG_OFFSET));
- spivdbg(" STATUS:%04x ADDR:%08x\n",
+ spiinfo(" STATUS:%04x ADDR:%08x\n",
getreg16(priv->base + SAM_SPI_STATUS_OFFSET),
getreg32(priv->base + SAM_SPI_ADDR_OFFSET));
}
@@ -890,7 +878,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
{
struct sam_spidev_s *priv = (struct sam_spidev_s *)dev;
- spivdbg("lock=%d\n", lock);
+ spiinfo("lock=%d\n", lock);
if (lock)
{
/* Take the semaphore (perhaps waiting) */
@@ -935,7 +923,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
uint32_t baud;
uint32_t ctrla;
- spivdbg("sercom=%d frequency=%d\n", priv->sercom, frequency);
+ spiinfo("sercom=%d frequency=%d\n", priv->sercom, frequency);
/* Check if the configured BAUD is within the valid range */
@@ -944,7 +932,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
{
/* Set the frequency to the maximum */
- spidbg("ERROR: Cannot realize frequency: %ld\n", (long)frequency);
+ spierr("ERROR: Cannot realize frequency: %ld\n", (long)frequency);
frequency = maxfreq;
}
@@ -975,7 +963,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
if (baud > 255)
{
- spidbg("ERROR: BAUD is out of range: %ld\n", (long)baud);
+ spierr("ERROR: BAUD is out of range: %ld\n", (long)baud);
baud = 255;
}
@@ -1016,7 +1004,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
- spivdbg("Frequency %d->%d\n", frequency, actual);
+ spiinfo("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -1040,7 +1028,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
struct sam_spidev_s *priv = (struct sam_spidev_s *)dev;
uint32_t regval;
- spivdbg("sercom=%d mode=%d\n", priv->sercom, mode);
+ spiinfo("sercom=%d mode=%d\n", priv->sercom, mode);
/* Has the mode changed? */
@@ -1101,7 +1089,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
struct sam_spidev_s *priv = (struct sam_spidev_s *)dev;
uint32_t regval;
- spivdbg("sercom=%d nbits=%d\n", priv->sercom, nbits);
+ spiinfo("sercom=%d nbits=%d\n", priv->sercom, nbits);
DEBUGASSERT(priv && nbits > 7 && nbits < 10);
/* Has the number of bits changed? */
@@ -1156,7 +1144,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd)
rxbyte = (uint8_t)0;
spi_exchange(dev, &txbyte, &rxbyte, 1);
- spivdbg("Sent %02x received %02x\n", txbyte, rxbyte);
+ spiinfo("Sent %02x received %02x\n", txbyte, rxbyte);
return (uint16_t)rxbyte;
}
@@ -1194,7 +1182,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
uint8_t *prx8;
uint16_t data;
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
/* Set up data receive and transmit pointers */
@@ -1281,7 +1269,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
data = spi_getreg16(priv, SAM_SPI_STATUS_OFFSET);
if ((data & SPI_STATUS_BUFOVF) != 0)
{
- spidbg("ERROR: Buffer overflow!\n");
+ spierr("ERROR: Buffer overflow!\n");
/* Clear the buffer overflow flag */
@@ -1438,7 +1426,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
/* Get the port state structure */
- spivdbg("port: %d \n", port);
+ spiinfo("port: %d \n", port);
#ifdef SAMDL_HAVE_SPI0
if (port == 0)
@@ -1488,7 +1476,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
else
#endif
{
- spidbg("ERROR: Unsupported port: %d\n", port);
+ spierr("ERROR: Unsupported port: %d\n", port);
return NULL;
}
@@ -1570,7 +1558,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
ret = irq_attach(priv->irq, priv->handler);
if (ret < 0)
{
- spidbg("ERROR: Failed to attach interrupt: %d\n", irq);
+ spierr("ERROR: Failed to attach interrupt: %d\n", irq);
return NULL;
}
diff --git a/arch/arm/src/samdl/sam_start.c b/arch/arm/src/samdl/sam_start.c
index e31a1b274df320404f28896d39d68c8dc8ddd299..f46e114fd66e41b78858a7151ca856d5ae723a27 100644
--- a/arch/arm/src/samdl/sam_start.c
+++ b/arch/arm/src/samdl/sam_start.c
@@ -91,7 +91,7 @@ const uint32_t g_idle_topstack = IDLE_STACK;
*
****************************************************************************/
-#if defined(CONFIG_DEBUG) && defined(HAVE_SERIAL_CONSOLE)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(HAVE_SERIAL_CONSOLE)
# define showprogress(c) sam_lowputc((uint32_t)c)
#else
# define showprogress(c)
diff --git a/arch/arm/src/samv7/Kconfig b/arch/arm/src/samv7/Kconfig
index 7a7d75c840844a32a17dbd895af281686e6834ab..763accea2318502b846073d76f6bad1ca25b4335 100644
--- a/arch/arm/src/samv7/Kconfig
+++ b/arch/arm/src/samv7/Kconfig
@@ -687,8 +687,8 @@ config SAMV7_WDT_INTERRUPT
config SAMV7_WDT_DEBUGHALT
bool "Halt on DEBUG"
- default y if DEBUG
- default n if !DEBUG
+ default y if DEBUG_FEATURES
+ default n if !DEBUG_FEATURES
---help---
Halt the watchdog timer in the debug state
@@ -701,7 +701,7 @@ config SAMV7_WDT_IDLEHALT
config SAMV7_WDT_REGDEBUG
bool "Register level debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
Enable low-level register debug output
@@ -721,8 +721,8 @@ config SAMV7_RSWDT_INTERRUPT
config SAMV7_RSWDT_DEBUGHALT
bool "Halt on DEBUG"
- default y if DEBUG
- default n if !DEBUG
+ default y if DEBUG_FEATURES
+ default n if !DEBUG_FEATURES
---help---
Halt the watchdog timer in the debug state
@@ -735,7 +735,7 @@ config SAMV7_RSWDT_IDLEHALT
config SAMV7_RSWDT_REGDEBUG
bool "Register level debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
Enable low-level register debug output
@@ -835,6 +835,23 @@ config SAMV7_SPI_CS_DECODING
---help---
Use Peripheral Chip Select Decoding on SPI Master
+config SAMV7_SPI_VARSELECT
+ bool "SPI Variable Peripheral Select Mode"
+ default n
+ ---help---
+ When enabled, the spi device is working in the "Variable Peripheral
+ Select Mode" (VARMODE) instead of the "Fixed Peripheral Select Mode"
+ (FIXEDMODE).
+
+ In FIXEDMODE the ChipSelect is set (once) with a call to spi_select and
+ stays the same value all the time. In addition an eventually signaled
+ LASTXFER has to be written to the global control register (SPI_CR).
+ Within the VARMODE, the ChipSelect can be changed with each datablock
+ transferred via spi_exchange because it is encoded by the driver
+ within the data.
+
+ The same behavior applies for the LASTXFER bit.
+
config SAMV7_SPI_DMA
bool "SPI DMA"
default n
@@ -853,7 +870,7 @@ config SAMV7_SPI_DMATHRESHOLD
config SAMV7_SPI_DMADEBUG
bool "SPI DMA transfer debug"
- depends on SAMV7_SPI_DMA && DEBUG && DEBUG_DMA
+ depends on SAMV7_SPI_DMA && DEBUG_FEATURES && DEBUG_DMA
default n
---help---
Enable special debug instrumentation analyze SPI DMA data transfers.
@@ -877,11 +894,11 @@ endif # SAMV7_SPI_SLAVE
config SAMV7_SPI_REGDEBUG
bool "SPI Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level SPI device debug information.
- Requires also DEBUG.
+ Requires also CONFIG_DEBUG_FEATURES.
endmenu # SPI device driver options
@@ -914,7 +931,7 @@ config SAMV7_QSPI_DMATHRESHOLD
config SAMV7_QSPI_DMADEBUG
bool "QSPI DMA transfer debug"
- depends on SAMV7_QSPI_DMA && DEBUG && DEBUG_DMA
+ depends on SAMV7_QSPI_DMA && DEBUG_FEATURES && DEBUG_DMA
default n
---help---
Enable special debug instrumentation analyze QSPI DMA data transfers.
@@ -924,11 +941,11 @@ config SAMV7_QSPI_DMADEBUG
config SAMV7_QSPI_REGDEBUG
bool "QSPI Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level QSPI device debug information.
- Requires also DEBUG.
+ Requires also CONFIG_DEBUG_FEATURES.
endmenu # QSPI device driver options
@@ -952,11 +969,11 @@ config SAMV7_TWIHS2_FREQUENCY
config SAMV7_TWIHS_REGDEBUG
bool "TWIHS register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level TWIHS device debug information.
- Very invasive! Requires also DEBUG.
+ Very invasive! Requires also CONFIG_DEBUG_FEATURES.
endmenu # TWIHS device driver options
@@ -1318,7 +1335,7 @@ endif # SAMV7_SSC1
config SAMV7_SSC_DMADEBUG
bool "SSC DMA transfer debug"
- depends on DEBUG && DEBUG_DMA
+ depends on DEBUG_FEATURES && DEBUG_DMA
default n
---help---
Enable special debug instrumentation analyze SSC DMA data transfers.
@@ -1328,11 +1345,11 @@ config SAMV7_SSC_DMADEBUG
config SAMV7_SSC_REGDEBUG
bool "SSC Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level SSC device debug information.
- Very invasive! Requires also DEBUG.
+ Very invasive! Requires also CONFIG_DEBUG_FEATURES.
config SAMV7_SSC_QDEBUG
bool "SSC Queue debug"
@@ -1551,23 +1568,23 @@ endif
config SAMV7_TC_DEBUG
bool "TC debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output high level Timer/Counter device debug information.
- Requires also DEBUG. If this option AND DEBUG_VERBOSE are
+ Requires also CONFIG_DEBUG_FEATURES. If this option AND CONFIG_DEBUG_INFO are
enabled, then the system will be overwhelmed the timer debug
- output. If DEBUG_VERBOSE is disabled, then debug output will
+ output. If CONFIG_DEBUG_INFO is disabled, then debug output will
only indicate if/when timer-related errors occur. This
latter mode is completely usable.
config SAMV7_TC_REGDEBUG
bool "TC register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level Timer/Counter device debug
- information. Very invasive! Requires also DEBUG.
+ information. Very invasive! Requires also CONFIG_DEBUG_FEATURES.
endmenu # Timer/counter Configuration
endif # SAMV7_HAVE_TC
@@ -1617,7 +1634,7 @@ config SAMV7_HSMCI_UNALIGNED
config SAMV7_HSMCI_XFRDEBUG
bool "HSMCI transfer debug"
- depends on DEBUG_FS && DEBUG_VERBOSE
+ depends on DEBUG_FS && CONFIG_DEBUG_INFO
default n
---help---
Enable special debug instrumentation analyze HSMCI data transfers.
@@ -1625,11 +1642,11 @@ config SAMV7_HSMCI_XFRDEBUG
registers at key points in the data transfer and then dumps all of
the registers at the end of the transfer. If DEBUG_DMA is also
enabled, then DMA register will be collected as well. Requires also
- DEBUG_FS and DEBUG_VERBOSE.
+ DEBUG_FS and CONFIG_DEBUG_INFO.
config SAMV7_HSMCI_CMDDEBUG
bool "HSMCI command debug"
- depends on DEBUG_FS && DEBUG_VERBOSE
+ depends on DEBUG_FS && CONFIG_DEBUG_INFO
default n
---help---
Enable special debug instrumentation analyze HSMCI commands. This
@@ -1637,15 +1654,15 @@ config SAMV7_HSMCI_CMDDEBUG
key points in the data transfer and then dumps all of the registers
at the end of the transfer. If DEBUG_DMA is also enabled, then DMA
register will be collected as well. Requires also DEBUG_FS and
- DEBUG_VERBOSE.
+ CONFIG_DEBUG_INFO.
config SAMV7_HSMCI_REGDEBUG
bool "HSMCI Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level HSCMI device debug information.
- Very invasive! Requires also DEBUG.
+ Very invasive! Requires also CONFIG_DEBUG_FEATURES.
endmenu # HSMCI device driver options
@@ -1854,7 +1871,7 @@ config SAMV7_EMAC_NBC
config SAMV7_EMAC_DEBUG
bool "Force EMAC0/1 DEBUG"
default n
- depends on DEBUG && !DEBUG_NET
+ depends on DEBUG_FEATURES && !DEBUG_NET
---help---
This option will force debug output from EMAC driver even without
network debug output enabled. This is not normally something
@@ -1865,9 +1882,9 @@ config SAMV7_EMAC_DEBUG
config SAMV7_EMAC_REGDEBUG
bool "Register-Level Debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
- Enable very low-level register access debug. Depends on DEBUG.
+ Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES.
endmenu # EMAC0 device driver options
@@ -1923,7 +1940,7 @@ config SAMV7_USBHS_EP7DMA_WAR
config SAMV7_USBHS_REGDEBUG
bool "Enable low-level USBHS register debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
endmenu # USB High Speed Device Controller driver (DCD) options
@@ -2598,11 +2615,11 @@ endmenu # MCAN1 device driver options
config SAMV7_MCAN_REGDEBUG
bool "CAN Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level CAN device debug information.
- Requires also DEBUG.
+ Requires also CONFIG_DEBUG_FEATURES.
endmenu # CAN device driver options
endif # SAMV7_MCAN
diff --git a/arch/arm/src/samv7/sam_emac.c b/arch/arm/src/samv7/sam_emac.c
index 39e14457dd4c56da3f2a6519b33ce04bf83e94dc..b11150ffaa00e5545898d6a11d4477b0e33f958d 100644
--- a/arch/arm/src/samv7/sam_emac.c
+++ b/arch/arm/src/samv7/sam_emac.c
@@ -48,7 +48,7 @@
#include
-#if defined(CONFIG_DEBUG) && defined(CONFIG_SAMV7_EMAC_DEBUG)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_SAMV7_EMAC_DEBUG)
/* Force debug output (from this file only) */
# undef CONFIG_DEBUG_NET
@@ -307,7 +307,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_SAMV7_EMAC_REGDEBUG
#endif
@@ -560,7 +560,7 @@ struct sam_emac_s
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_SAMV7_EMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMV7_EMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static bool sam_checkreg(struct sam_emac_s *priv, bool wr,
uint32_t regval, uintptr_t address);
#endif
@@ -639,7 +639,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg);
/* PHY Initialization */
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
static void sam_phydump(struct sam_emac_s *priv);
#else
# define sam_phydump(priv)
@@ -966,7 +966,7 @@ static bool sam_checkreg(struct sam_emac_s *priv, bool wr, uint32_t regval,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -999,7 +999,7 @@ static uint32_t sam_getreg(struct sam_emac_s *priv, uint16_t offset)
#ifdef CONFIG_SAMV7_EMAC_REGDEBUG
if (sam_checkreg(priv, false, regval, regaddr))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -1023,7 +1023,7 @@ static void sam_putreg(struct sam_emac_s *priv, uint16_t offset,
#ifdef CONFIG_SAMV7_EMAC_REGDEBUG
if (sam_checkreg(priv, true, regval, regaddr))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -1147,7 +1147,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
priv->xfrq[0].txdesc = (struct emac_txdesc_s *)kmm_memalign(EMAC_ALIGN, allocsize);
if (!priv->xfrq[0].txdesc)
{
- nlldbg("ERROR: Failed to allocate TX descriptors\n");
+ nllerr("ERROR: Failed to allocate TX descriptors\n");
return -ENOMEM;
}
@@ -1158,7 +1158,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
priv->xfrq[0].rxdesc = (struct emac_rxdesc_s *)kmm_memalign(EMAC_ALIGN, allocsize);
if (!priv->xfrq[0].rxdesc)
{
- nlldbg("ERROR: Failed to allocate RX descriptors\n");
+ nllerr("ERROR: Failed to allocate RX descriptors\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -1170,7 +1170,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
priv->xfrq[0].txbuffer = (uint8_t *)kmm_memalign(EMAC_ALIGN, allocsize);
if (!priv->xfrq[0].txbuffer)
{
- nlldbg("ERROR: Failed to allocate TX buffer\n");
+ nllerr("ERROR: Failed to allocate TX buffer\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -1181,7 +1181,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
priv->xfrq[0].rxbuffer = (uint8_t *)kmm_memalign(EMAC_ALIGN, allocsize);
if (!priv->xfrq[0].rxbuffer)
{
- nlldbg("ERROR: Failed to allocate RX buffer\n");
+ nllerr("ERROR: Failed to allocate RX buffer\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -1194,7 +1194,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
priv->xfrq[1].txdesc = (struct emac_txdesc_s *)kmm_memalign(EMAC_ALIGN, allocsize);
if (!priv->xfrq[1].txdesc)
{
- nlldbg("ERROR: Failed to allocate TX descriptors\n");
+ nllerr("ERROR: Failed to allocate TX descriptors\n");
return -ENOMEM;
}
@@ -1205,7 +1205,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
priv->xfrq[1].rxdesc = (struct emac_rxdesc_s *)kmm_memalign(EMAC_ALIGN, allocsize);
if (!priv->xfrq[1].rxdesc)
{
- nlldbg("ERROR: Failed to allocate RX descriptors\n");
+ nllerr("ERROR: Failed to allocate RX descriptors\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -1217,7 +1217,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
priv->xfrq[1].txbuffer = (uint8_t *)kmm_memalign(EMAC_ALIGN, allocsize);
if (!priv->xfrq[1].txbuffer)
{
- nlldbg("ERROR: Failed to allocate TX buffer\n");
+ nllerr("ERROR: Failed to allocate TX buffer\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -1228,7 +1228,7 @@ static int sam_buffer_allocate(struct sam_emac_s *priv)
priv->xfrq[1].rxbuffer = (uint8_t *)kmm_memalign(EMAC_ALIGN, allocsize);
if (!priv->xfrq[1].rxbuffer)
{
- nlldbg("ERROR: Failed to allocate RX buffer\n");
+ nllerr("ERROR: Failed to allocate RX buffer\n");
sam_buffer_free(priv);
return -ENOMEM;
}
@@ -1369,7 +1369,7 @@ static int sam_transmit(struct sam_emac_s *priv, int qid)
if (dev->d_len > EMAC_TX_UNITSIZE)
{
- nlldbg("ERROR: Packet too big: %d\n", dev->d_len);
+ nllerr("ERROR: Packet too big: %d\n", dev->d_len);
return -EINVAL;
}
@@ -1379,14 +1379,14 @@ static int sam_transmit(struct sam_emac_s *priv, int qid)
txhead = xfrq->txhead;
txdesc = &xfrq->txdesc[txhead];
- nllvdbg("d_len: %d txhead[%d]: %d\n", dev->d_len, qid, xfrq->txhead);
+ nllinfo("d_len: %d txhead[%d]: %d\n", dev->d_len, qid, xfrq->txhead);
sam_dumppacket("Transmit packet", dev->d_buf, dev->d_len);
/* If no free TX descriptor, buffer can't be sent */
if (sam_txfree(priv, qid) < 1)
{
- nlldbg("ERROR: No free TX descriptors\n");
+ nllerr("ERROR: No free TX descriptors\n");
return -EBUSY;
}
@@ -1460,7 +1460,7 @@ static int sam_transmit(struct sam_emac_s *priv, int qid)
if (sam_txfree(priv, qid) < 1)
{
- nllvdbg("Disabling RX interrupts\n");
+ nllinfo("Disabling RX interrupts\n");
sam_putreg(priv, SAM_EMAC_IDR_OFFSET, EMAC_INT_RCOMP);
}
@@ -1646,7 +1646,7 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
arch_invalidate_dcache((uintptr_t)rxdesc,
(uintptr_t)rxdesc + sizeof(struct emac_rxdesc_s));
- nllvdbg("Entry rxndx[%d]: %d\n", qid, rxndx);
+ nllinfo("Entry rxndx[%d]: %d\n", qid, rxndx);
while ((rxdesc->addr & EMACRXD_ADDR_OWNER) != 0)
{
@@ -1709,7 +1709,7 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
{
if (rxndx == xfrq->rxndx)
{
- nllvdbg("ERROR: No EOF (Invalid or buffers too small)\n");
+ nllinfo("ERROR: No EOF (Invalid or buffers too small)\n");
do
{
/* Give ownership back to the EMAC */
@@ -1767,7 +1767,7 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
/* Frame size from the EMAC */
dev->d_len = (rxdesc->status & EMACRXD_STA_FRLEN_MASK);
- nllvdbg("packet %d-%d (%d)\n", xfrq->rxndx, rxndx, dev->d_len);
+ nllinfo("packet %d-%d (%d)\n", xfrq->rxndx, rxndx, dev->d_len);
/* All data have been copied in the application frame buffer,
* release the RX descriptor(s). Loop until all descriptors
@@ -1801,11 +1801,11 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
* all of the data.
*/
- nllvdbg("rxndx: %d d_len: %d\n",
+ nllinfo("rxndx: %d d_len: %d\n",
xfrq->rxndx, dev->d_len);
if (pktlen < dev->d_len)
{
- nlldbg("ERROR: Buffer size %d; frame size %d\n",
+ nllerr("ERROR: Buffer size %d; frame size %d\n",
dev->d_len, pktlen);
NETDEV_RXERRORS(&priv->dev);
return -E2BIG;
@@ -1854,7 +1854,7 @@ static int sam_recvframe(struct sam_emac_s *priv, int qid)
/* No packet was found */
xfrq->rxndx = rxndx;
- nllvdbg("Exit rxndx[%d]: %d\n", qid, xfrq->rxndx);
+ nllinfo("Exit rxndx[%d]: %d\n", qid, xfrq->rxndx);
return -EAGAIN;
}
@@ -1896,7 +1896,7 @@ static void sam_receive(struct sam_emac_s *priv, int qid)
if (dev->d_len > CONFIG_NET_ETH_MTU)
{
- nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+ nllerr("DROPPED: Too big: %d\n", dev->d_len);
NETDEV_RXERRORS(&priv->dev);
continue;
}
@@ -1912,7 +1912,7 @@ static void sam_receive(struct sam_emac_s *priv, int qid)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
NETDEV_RXIPV4(&priv->dev);
/* Handle ARP on input then give the IPv4 packet to the network
@@ -1953,7 +1953,7 @@ static void sam_receive(struct sam_emac_s *priv, int qid)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
NETDEV_RXIPV6(&priv->dev);
/* Give the IPv6 packet to the network layer */
@@ -1991,7 +1991,7 @@ static void sam_receive(struct sam_emac_s *priv, int qid)
#ifdef CONFIG_NET_ARP
if (BUF->type == htons(ETHTYPE_ARP))
{
- nllvdbg("ARP frame\n");
+ nllinfo("ARP frame\n");
NETDEV_RXARP(&priv->dev);
/* Handle ARP packet */
@@ -2010,7 +2010,7 @@ static void sam_receive(struct sam_emac_s *priv, int qid)
else
#endif
{
- nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+ nllerr("DROPPED: Unknown type: %04x\n", BUF->type);
NETDEV_RXDROPPED(&priv->dev);
}
}
@@ -2286,7 +2286,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
imr = sam_getreg(priv, SAM_EMAC_IMR_OFFSET);
pending = isr & ~(imr | EMAC_INT_UNUSED);
- nllvdbg("isr: %08x pending: %08x\n", isr, pending);
+ nllinfo("isr: %08x pending: %08x\n", isr, pending);
/* Check for the receipt of an RX packet.
*
@@ -2312,7 +2312,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
if ((rsr & EMAC_RSR_RXOVR) != 0)
{
- nlldbg("ERROR: Receiver overrun RSR: %08x\n", rsr);
+ nllerr("ERROR: Receiver overrun RSR: %08x\n", rsr);
clrbits |= EMAC_RSR_RXOVR;
}
@@ -2329,7 +2329,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
if ((rsr & EMAC_RSR_BNA) != 0)
{
- nlldbg("ERROR: Buffer not available RSR: %08x\n", rsr);
+ nllerr("ERROR: Buffer not available RSR: %08x\n", rsr);
clrbits |= EMAC_RSR_BNA;
}
@@ -2370,7 +2370,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
clrbits = EMAC_TSR_RLE | sam_txinuse(priv, qid);
sam_txreset(priv, qid);
- nlldbg("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
+ nllerr("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
regval = sam_getreg(priv, SAM_EMAC_NCR_OFFSET);
regval |= EMAC_NCR_TXEN;
@@ -2381,7 +2381,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
if ((tsr & EMAC_TSR_COL) != 0)
{
- nlldbg("ERROR: Collision occurred TSR: %08x\n", tsr);
+ nllerr("ERROR: Collision occurred TSR: %08x\n", tsr);
NETDEV_TXERRORS(&priv->dev);
}
@@ -2389,7 +2389,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
if ((tsr & EMAC_TSR_TFC) != 0)
{
- nlldbg("ERROR: Transmit Frame Corruption due to AHB error: %08x\n", tsr);
+ nllerr("ERROR: Transmit Frame Corruption due to AHB error: %08x\n", tsr);
NETDEV_TXERRORS(&priv->dev);
}
@@ -2407,7 +2407,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
if ((pending & EMAC_INT_HRESP) != 0)
{
- nlldbg("ERROR: Hresp not OK\n");
+ nllerr("ERROR: Hresp not OK\n");
}
/* Check for PAUSE Frame received (PFRE).
@@ -2418,7 +2418,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
if ((pending & EMAC_INT_PFNZ) != 0)
{
- nlldbg("Pause frame received\n");
+ nllerr("Pause frame received\n");
}
/* Check for Pause Time Zero (PTZ)
@@ -2428,7 +2428,7 @@ static inline void sam_interrupt_process(FAR struct sam_emac_s *priv, int qid)
if ((pending & EMAC_INT_PTZ) != 0)
{
- nlldbg("Pause TO!\n");
+ nllerr("Pause TO!\n");
}
#endif
}
@@ -2593,7 +2593,7 @@ static int sam_emac1_interrupt(int irq, void *context)
static inline void sam_txtimeout_process(FAR struct sam_emac_s *priv)
{
- nlldbg("Timeout!\n");
+ nllerr("Timeout!\n");
NETDEV_TXTIMEOUTS(&priv->dev);
/* Reset the hardware. Just take the interface down, then back up again. */
@@ -2824,12 +2824,12 @@ static int sam_ifup(struct net_driver_s *dev)
int ret;
#ifdef CONFIG_NET_IPv4
- ndbg("Bringing up: %d.%d.%d.%d\n",
+ nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
#endif
#ifdef CONFIG_NET_IPv6
- ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+ nerr("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
@@ -2837,7 +2837,7 @@ static int sam_ifup(struct net_driver_s *dev)
/* Configure the EMAC interface for normal operation. */
- nllvdbg("Initialize the EMAC\n");
+ nllinfo("Initialize the EMAC\n");
sam_emac_configure(priv);
sam_queue_configure(priv, EMAC_QUEUE_1);
sam_queue_configure(priv, EMAC_QUEUE_2);
@@ -2858,7 +2858,7 @@ static int sam_ifup(struct net_driver_s *dev)
ret = sam_phyinit(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phyinit failed: %d\n", ret);
+ nllerr("ERROR: sam_phyinit failed: %d\n", ret);
return ret;
}
@@ -2867,16 +2867,16 @@ static int sam_ifup(struct net_driver_s *dev)
ret = sam_autonegotiate(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_autonegotiate failed: %d\n", ret);
+ nllerr("ERROR: sam_autonegotiate failed: %d\n", ret);
return ret;
}
while (sam_linkup(priv) == 0);
- nllvdbg("Link detected \n");
+ nllinfo("Link detected \n");
/* Enable normal MAC operation */
- nllvdbg("Enable normal operation\n");
+ nllinfo("Enable normal operation\n");
/* Set and activate a timer process */
@@ -2910,7 +2910,7 @@ static int sam_ifdown(struct net_driver_s *dev)
struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
irqstate_t flags;
- nlldbg("Taking the network down\n");
+ nllerr("Taking the network down\n");
/* Disable the EMAC interrupt */
@@ -2955,7 +2955,7 @@ static int sam_ifdown(struct net_driver_s *dev)
static inline void sam_txavail_process(FAR struct sam_emac_s *priv)
{
- nllvdbg("ifup: %d\n", priv->ifup);
+ nllinfo("ifup: %d\n", priv->ifup);
/* Ignore the notification if the interface is not yet up */
@@ -3208,7 +3208,7 @@ static int sam_addmac(struct net_driver_s *dev, const uint8_t *mac)
unsigned int ndx;
unsigned int bit;
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Calculate the 6-bit has table index */
@@ -3281,7 +3281,7 @@ static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac)
unsigned int ndx;
unsigned int bit;
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Calculate the 6-bit has table index */
@@ -3464,7 +3464,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_NET) && defined(CONFIG_DEBUG_INFO)
static void sam_phydump(struct sam_emac_s *priv)
{
uint32_t regval;
@@ -3476,19 +3476,19 @@ static void sam_phydump(struct sam_emac_s *priv)
regval |= EMAC_NCR_MPE;
sam_putreg(priv, SAM_EMAC_NCR_OFFSET, regval);
- nllvdbg("%s Registers (Address %02x)\n",
+ nllinfo("%s Registers (Address %02x)\n",
priv->attr->rmii ? "RMII" : "MII", priv->phyaddr);
sam_phyread(priv, priv->phyaddr, MII_MCR, &phyval);
- nllvdbg(" MCR: %04x\n", phyval);
+ nllinfo(" MCR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, MII_MSR, &phyval);
- nllvdbg(" MSR: %04x\n", phyval);
+ nllinfo(" MSR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, MII_ADVERTISE, &phyval);
- nllvdbg(" ADVERTISE: %04x\n", phyval);
+ nllinfo(" ADVERTISE: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, MII_LPA, &phyval);
- nllvdbg(" LPR: %04x\n", phyval);
+ nllinfo(" LPR: %04x\n", phyval);
sam_phyread(priv, priv->phyaddr, priv->attr->physr, &phyval);
- nllvdbg(" PHYSR: %04x\n", phyval);
+ nllinfo(" PHYSR: %04x\n", phyval);
/* Disable management port */
@@ -3652,7 +3652,7 @@ static int sam_phyintenable(struct sam_emac_s *priv)
else
#endif
{
- ndbg("ERROR: Unsupported PHY type: %d\n", priv->phytype);
+ nerr("ERROR: Unsupported PHY type: %d\n", priv->phytype);
ret = -ENOSYS;
}
@@ -3716,7 +3716,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
int timeout;
int ret;
- nllvdbg(" sam_phyreset\n");
+ nllinfo(" sam_phyreset\n");
/* Enable management port */
@@ -3729,7 +3729,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, MII_MCR_RESET);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywrite failed: %d\n", ret);
+ nllerr("ERROR: sam_phywrite failed: %d\n", ret);
}
/* Wait for the PHY reset to complete */
@@ -3741,7 +3741,7 @@ static int sam_phyreset(struct sam_emac_s *priv)
int result = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
if (result < 0)
{
- nlldbg("ERROR: Failed to read the MCR register: %d\n", ret);
+ nllerr("ERROR: Failed to read the MCR register: %d\n", ret);
ret = result;
}
else if ((mcr & MII_MCR_RESET) == 0)
@@ -3783,7 +3783,7 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
unsigned int offset;
int ret = -ESRCH;
- nllvdbg("Find a valid PHY address\n");
+ nllinfo("Find a valid PHY address\n");
/* Enable management port */
@@ -3806,7 +3806,7 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
else
{
- nlldbg("ERROR: sam_phyread failed for PHY address %02x: %d\n",
+ nllerr("ERROR: sam_phyread failed for PHY address %02x: %d\n",
candidate, ret);
for (offset = 0; offset < 32; offset++)
@@ -3828,10 +3828,10 @@ static int sam_phyfind(struct sam_emac_s *priv, uint8_t *phyaddr)
if (ret == OK)
{
- nllvdbg(" PHYID1: %04x PHY addr: %d\n", phyval, candidate);
+ nllinfo(" PHYID1: %04x PHY addr: %d\n", phyval, candidate);
*phyaddr = candidate;
sam_phyread(priv, candidate, priv->attr->physr, &phyval);
- nllvdbg(" PHYSR: %04x PHY addr: %d\n", phyval, candidate);
+ nllinfo(" PHYSR: %04x PHY addr: %d\n", phyval, candidate);
}
/* Disable management port */
@@ -3872,7 +3872,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -3897,7 +3897,7 @@ static int sam_phyread(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -3937,7 +3937,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -3962,7 +3962,7 @@ static int sam_phywrite(struct sam_emac_s *priv, uint8_t phyaddr,
ret = sam_phywait(priv);
if (ret < 0)
{
- nlldbg("ERROR: sam_phywait failed: %d\n", ret);
+ nllerr("ERROR: sam_phywait failed: %d\n", ret);
return ret;
}
@@ -4007,33 +4007,33 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_PHYID1, &phyid1);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYID1\n");
+ nllerr("ERROR: Failed to read PHYID1\n");
goto errout;
}
- nllvdbg("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
+ nllinfo("PHYID1: %04x PHY address: %02x\n", phyid1, priv->phyaddr);
ret = sam_phyread(priv, priv->phyaddr, MII_PHYID2, &phyid2);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYID2\n");
+ nllerr("ERROR: Failed to read PHYID2\n");
goto errout;
}
- nllvdbg("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
+ nllinfo("PHYID2: %04x PHY address: %02x\n", phyid2, priv->phyaddr);
if (phyid1 == priv->attr->msoui &&
((phyid2 & MII_PHYID2_OUI_MASK) >> MII_PHYID2_OUI_SHIFT) ==
(uint16_t)priv->attr->lsoui)
{
- nllvdbg(" Vendor Model Number: %04x\n",
+ nllinfo(" Vendor Model Number: %04x\n",
(phyid2 & MII_PHYID2_MODEL_MASK) >> MII_PHYID2_MODEL_SHIFT);
- nllvdbg(" Model Revision Number: %04x\n",
+ nllinfo(" Model Revision Number: %04x\n",
(phyid2 & MII_PHYID2_REV_MASK) >> MII_PHYID2_REV_SHIFT);
}
else
{
- nlldbg("ERROR: PHY not recognized\n");
+ nllerr("ERROR: PHY not recognized\n");
}
/* Setup control register */
@@ -4041,7 +4041,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MCR\n");
+ nllerr("ERROR: Failed to read MCR\n");
goto errout;
}
@@ -4052,7 +4052,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write MCR\n");
+ nllerr("ERROR: Failed to write MCR\n");
goto errout;
}
@@ -4067,7 +4067,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_ADVERTISE, advertise);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write ANAR\n");
+ nllerr("ERROR: Failed to write ANAR\n");
goto errout;
}
@@ -4076,7 +4076,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MCR, &mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MCR\n");
+ nllerr("ERROR: Failed to read MCR\n");
goto errout;
}
@@ -4084,7 +4084,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write MCR\n");
+ nllerr("ERROR: Failed to write MCR\n");
goto errout;
}
@@ -4096,11 +4096,11 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phywrite(priv, priv->phyaddr, MII_MCR, mcr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to write MCR\n");
+ nllerr("ERROR: Failed to write MCR\n");
goto errout;
}
- nllvdbg(" MCR: %04x\n", mcr);
+ nllinfo(" MCR: %04x\n", mcr);
/* Check AutoNegotiate complete */
@@ -4110,7 +4110,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MSR\n");
+ nllerr("ERROR: Failed to read MSR\n");
goto errout;
}
@@ -4120,7 +4120,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
{
/* Yes.. break out of the loop */
- nllvdbg("AutoNegotiate complete\n");
+ nllinfo("AutoNegotiate complete\n");
break;
}
@@ -4128,7 +4128,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
if (++timeout >= PHY_RETRY_MAX)
{
- nlldbg("ERROR: TimeOut\n");
+ nllerr("ERROR: TimeOut\n");
sam_phydump(priv);
ret = -ETIMEDOUT;
goto errout;
@@ -4140,7 +4140,7 @@ static int sam_autonegotiate(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_LPA, &lpa);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read ANLPAR\n");
+ nllerr("ERROR: Failed to read ANLPAR\n");
goto errout;
}
@@ -4235,13 +4235,13 @@ static bool sam_linkup(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, MII_MSR, &msr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read MSR: %d\n", ret);
+ nllerr("ERROR: Failed to read MSR: %d\n", ret);
goto errout;
}
if ((msr & MII_MSR_LINKSTATUS) == 0)
{
- nlldbg("ERROR: MSR LinkStatus: %04x\n", msr);
+ nllerr("ERROR: MSR LinkStatus: %04x\n", msr);
goto errout;
}
@@ -4250,7 +4250,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
ret = sam_phyread(priv, priv->phyaddr, priv->attr->physr, &physr);
if (ret < 0)
{
- nlldbg("ERROR: Failed to read PHYSR: %d\n", ret);
+ nllerr("ERROR: Failed to read PHYSR: %d\n", ret);
goto errout;
}
@@ -4288,7 +4288,7 @@ static bool sam_linkup(struct sam_emac_s *priv)
/* Start the EMAC transfers */
- nllvdbg("Link is up\n");
+ nllinfo("Link is up\n");
linkup = true;
errout:
@@ -4329,7 +4329,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
mck = BOARD_MCK_FREQUENCY;
if (mck > (240*1000*1000))
{
- ndbg("ERROR: Cannot realize PHY clock\n");
+ nerr("ERROR: Cannot realize PHY clock\n");
return -EINVAL;
}
else if (mck > (160*1000*1000))
@@ -4365,7 +4365,7 @@ static int sam_phyinit(struct sam_emac_s *priv)
ret = sam_phyfind(priv, &priv->phyaddr);
if (ret < 0)
{
- nlldbg("ERROR: sam_phyfind failed: %d\n", ret);
+ nllerr("ERROR: sam_phyfind failed: %d\n", ret);
return ret;
}
@@ -4480,7 +4480,7 @@ static inline void sam_ethgpioconfig(struct sam_emac_s *priv)
else
#endif
{
- nvdbg("ERROR: emac=%d\n", priv->attr->emac);
+ ninfo("ERROR: emac=%d\n", priv->attr->emac);
}
}
@@ -4803,7 +4803,7 @@ static void sam_macaddress(struct sam_emac_s *priv)
struct net_driver_s *dev = &priv->dev;
uint32_t regval;
- nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
@@ -4869,7 +4869,7 @@ static void sam_ipv6multicast(struct sam_emac_s *priv)
mac[4] = tmp16 & 0xff;
mac[5] = tmp16 >> 8;
- nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
(void)sam_addmac(dev, mac);
@@ -5006,7 +5006,7 @@ static int sam_emac_configure(struct sam_emac_s *priv)
{
uint32_t regval;
- nllvdbg("Entry\n");
+ nllinfo("Entry\n");
/* Enable clocking to the EMAC peripheral */
@@ -5111,7 +5111,7 @@ int sam_emac_initialize(int intf)
else
#endif
{
- ndbg("ERROR: Interface %d not supported\n", intf);
+ nerr("ERROR: Interface %d not supported\n", intf);
return -EINVAL;
}
@@ -5140,7 +5140,7 @@ int sam_emac_initialize(int intf)
priv->txpoll = wd_create();
if (!priv->txpoll)
{
- ndbg("ERROR: Failed to create periodic poll timer\n");
+ nerr("ERROR: Failed to create periodic poll timer\n");
ret = -EAGAIN;
goto errout;
}
@@ -5148,7 +5148,7 @@ int sam_emac_initialize(int intf)
priv->txtimeout = wd_create(); /* Create TX timeout timer */
if (!priv->txtimeout)
{
- ndbg("ERROR: Failed to create periodic poll timer\n");
+ nerr("ERROR: Failed to create periodic poll timer\n");
ret = -EAGAIN;
goto errout_with_txpoll;
}
@@ -5162,7 +5162,7 @@ int sam_emac_initialize(int intf)
ret = sam_buffer_allocate(priv);
if (ret < 0)
{
- ndbg("ERROR: sam_buffer_allocate failed: %d\n", ret);
+ nerr("ERROR: sam_buffer_allocate failed: %d\n", ret);
goto errout_with_txtimeout;
}
@@ -5173,7 +5173,7 @@ int sam_emac_initialize(int intf)
ret = irq_attach(priv->attr->irq, priv->attr->handler);
if (ret < 0)
{
- ndbg("ERROR: Failed to attach the handler to the IRQ%d\n", priv->attr->irq);
+ nerr("ERROR: Failed to attach the handler to the IRQ%d\n", priv->attr->irq);
goto errout_with_buffers;
}
@@ -5186,7 +5186,7 @@ int sam_emac_initialize(int intf)
ret = sam_ifdown(&priv->dev);
if (ret < 0)
{
- ndbg("ERROR: Failed to put the interface in the down state: %d\n", ret);
+ nerr("ERROR: Failed to put the interface in the down state: %d\n", ret);
goto errout_with_buffers;
}
@@ -5198,7 +5198,7 @@ int sam_emac_initialize(int intf)
return ret;
}
- ndbg("ERROR: netdev_register() failed: %d\n", ret);
+ nerr("ERROR: netdev_register() failed: %d\n", ret);
errout_with_buffers:
sam_buffer_free(priv);
@@ -5261,7 +5261,7 @@ int sam_emac_setmacaddr(int intf, uint8_t mac[6])
else
#endif
{
- ndbg("ERROR: Interface %d not supported\n", intf);
+ nerr("ERROR: Interface %d not supported\n", intf);
return -EINVAL;
}
@@ -5270,7 +5270,7 @@ int sam_emac_setmacaddr(int intf, uint8_t mac[6])
dev = &priv->dev;
memcpy(dev->d_mac.ether_addr_octet, mac, 6);
- nvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
diff --git a/arch/arm/src/samv7/sam_ethernet.c b/arch/arm/src/samv7/sam_ethernet.c
index 3e19d958738ce3d441328cd799771cf6636f34c1..84a883bfcbadcdbc72b9b2173f4325cf1d695f10 100644
--- a/arch/arm/src/samv7/sam_ethernet.c
+++ b/arch/arm/src/samv7/sam_ethernet.c
@@ -99,7 +99,7 @@ void up_netinitialize(void)
ret = sam_emac_initialize(EMAC0_INTF);
if (ret < 0)
{
- nlldbg("ERROR: up_emac_initialize(EMAC0) failed: %d\n", ret);
+ nllerr("ERROR: up_emac_initialize(EMAC0) failed: %d\n", ret);
}
#endif
@@ -109,7 +109,7 @@ void up_netinitialize(void)
ret = sam_emac_initialize(EMAC1_INTF);
if (ret < 0)
{
- nlldbg("ERROR: up_emac_initialize(EMAC1) failed: %d\n", ret);
+ nllerr("ERROR: up_emac_initialize(EMAC1) failed: %d\n", ret);
}
#endif
#endif
diff --git a/arch/arm/src/samv7/sam_freerun.c b/arch/arm/src/samv7/sam_freerun.c
index c5eec516ddf7be1a4ede26d1a053f900258dc95b..70747f867aa696add9e97c8f48e252d39455f2c0 100644
--- a/arch/arm/src/samv7/sam_freerun.c
+++ b/arch/arm/src/samv7/sam_freerun.c
@@ -124,7 +124,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
uint32_t cmr;
int ret;
- tcvdbg("chan=%d resolution=%d usec\n", chan, resolution);
+ tcinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(freerun && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
@@ -136,11 +136,11 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
ret = sam_tc_clockselect(frequency, &cmr, &actual);
if (ret < 0)
{
- tcdbg("ERROR: sam_tc_clockselect failed: %d\n", ret);
+ tcerr("ERROR: sam_tc_clockselect failed: %d\n", ret);
return ret;
}
- tcvdbg("frequency=%lu, actual=%lu, cmr=%08lx\n",
+ tcinfo("frequency=%lu, actual=%lu, cmr=%08lx\n",
(unsigned long)frequency, (unsigned long)actual,
(unsigned long)cmr);
@@ -175,7 +175,7 @@ int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan,
freerun->tch = sam_tc_allocate(chan, cmr);
if (!freerun->tch)
{
- tcdbg("ERROR: Failed to allocate timer channel %d\n", chan);
+ tcerr("ERROR: Failed to allocate timer channel %d\n", chan);
return -EBUSY;
}
@@ -260,7 +260,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
leave_critical_section(flags);
- tcvdbg("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
+ tcinfo("counter=%lu (%lu) overflow=%lu, sr=%08lx\n",
(unsigned long)counter, (unsigned long)verify,
(unsigned long)overflow, (unsigned long)sr);
@@ -280,7 +280,7 @@ int sam_freerun_counter(struct sam_freerun_s *freerun, struct timespec *ts)
ts->tv_sec = sec;
ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
- tcvdbg("usec=%llu ts=(%lu, %lu)\n",
+ tcinfo("usec=%llu ts=(%lu, %lu)\n",
usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
return OK;
diff --git a/arch/arm/src/samv7/sam_gpio.c b/arch/arm/src/samv7/sam_gpio.c
index 32547ff1a3b060a876c3cbf0f7ce8c1c1b61e917..eeb716686e15e6abc04097f933fa9597b36eb24d 100644
--- a/arch/arm/src/samv7/sam_gpio.c
+++ b/arch/arm/src/samv7/sam_gpio.c
@@ -578,38 +578,38 @@ int sam_dumpgpio(uint32_t pinset, const char *msg)
/* The following requires exclusive access to the GPIO registers */
flags = enter_critical_section();
- lldbg("PIO%c pinset: %08x base: %08x -- %s\n",
+ llerr("PIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg);
- lldbg(" PSR: %08x OSR: %08x IFSR: %08x ODSR: %08x\n",
+ llerr(" PSR: %08x OSR: %08x IFSR: %08x ODSR: %08x\n",
getreg32(base + SAM_PIO_PSR_OFFSET), getreg32(base + SAM_PIO_OSR_OFFSET),
getreg32(base + SAM_PIO_IFSR_OFFSET), getreg32(base + SAM_PIO_ODSR_OFFSET));
- lldbg(" PDSR: %08x IMR: %08x ISR: %08x MDSR: %08x\n",
+ llerr(" PDSR: %08x IMR: %08x ISR: %08x MDSR: %08x\n",
getreg32(base + SAM_PIO_PDSR_OFFSET), getreg32(base + SAM_PIO_IMR_OFFSET),
getreg32(base + SAM_PIO_ISR_OFFSET), getreg32(base + SAM_PIO_MDSR_OFFSET));
- lldbg(" ABCDSR: %08x %08x IFSCSR: %08x PPDSR: %08x\n",
+ llerr(" ABCDSR: %08x %08x IFSCSR: %08x PPDSR: %08x\n",
getreg32(base + SAM_PIO_ABCDSR1_OFFSET), getreg32(base + SAM_PIO_ABCDSR2_OFFSET),
getreg32(base + SAM_PIO_IFSCSR_OFFSET), getreg32(base + SAM_PIO_PPDSR_OFFSET));
- lldbg(" PUSR: %08x SCDR: %08x OWSR: %08x AIMMR: %08x\n",
+ llerr(" PUSR: %08x SCDR: %08x OWSR: %08x AIMMR: %08x\n",
getreg32(base + SAM_PIO_PUSR_OFFSET), getreg32(base + SAM_PIO_SCDR_OFFSET),
getreg32(base + SAM_PIO_OWSR_OFFSET), getreg32(base + SAM_PIO_AIMMR_OFFSET));
- lldbg(" ESR: %08x LSR: %08x ELSR: %08x FELLSR: %08x\n",
+ llerr(" ESR: %08x LSR: %08x ELSR: %08x FELLSR: %08x\n",
getreg32(base + SAM_PIO_ESR_OFFSET), getreg32(base + SAM_PIO_LSR_OFFSET),
getreg32(base + SAM_PIO_ELSR_OFFSET), getreg32(base + SAM_PIO_FELLSR_OFFSET));
- lldbg(" FRLHSR: %08x LOCKSR: %08x WPMR: %08x WPSR: %08x\n",
+ llerr(" FRLHSR: %08x LOCKSR: %08x WPMR: %08x WPSR: %08x\n",
getreg32(base + SAM_PIO_FRLHSR_OFFSET), getreg32(base + SAM_PIO_LOCKSR_OFFSET),
getreg32(base + SAM_PIO_WPMR_OFFSET), getreg32(base + SAM_PIO_WPSR_OFFSET));
- lldbg(" PCMR: %08x PCIMR: %08x PCISR: %08x PCRHR: %08x\n",
+ llerr(" PCMR: %08x PCIMR: %08x PCISR: %08x PCRHR: %08x\n",
getreg32(base + SAM_PIO_PCMR_OFFSET), getreg32(base + SAM_PIO_PCIMR_OFFSET),
getreg32(base + SAM_PIO_PCISR_OFFSET), getreg32(base + SAM_PIO_PCRHR_OFFSET));
- lldbg("SCHMITT: %08x DRIVER:%08x\n",
+ llerr("SCHMITT: %08x DRIVER:%08x\n",
getreg32(base + SAM_PIO_SCHMITT_OFFSET), getreg32(base + SAM_PIO_DRIVER_OFFSET));
- lldbg(" KER: %08x KRCR: %08x KDR: %08x KIMR: %08x\n",
+ llerr(" KER: %08x KRCR: %08x KDR: %08x KIMR: %08x\n",
getreg32(base + SAM_PIO_KER_OFFSET), getreg32(base + SAM_PIO_KRCR_OFFSET),
getreg32(base + SAM_PIO_KDR_OFFSET), getreg32(base + SAM_PIO_KIMR_OFFSET));
- lldbg(" KSR: %08x KKPR: %08x KKRR: %08x\n",
+ llerr(" KSR: %08x KKPR: %08x KKRR: %08x\n",
getreg32(base + SAM_PIO_KSR_OFFSET), getreg32(base + SAM_PIO_KKPR_OFFSET),
getreg32(base + SAM_PIO_KKRR_OFFSET));
- lldbg(" PCMR: %08x PCIMR: %08x PCISR: %08x PCRHR: %08x\n",
+ llerr(" PCMR: %08x PCIMR: %08x PCISR: %08x PCRHR: %08x\n",
getreg32(base + SAM_PIO_PCMR_OFFSET), getreg32(base + SAM_PIO_PCIMR_OFFSET),
getreg32(base + SAM_PIO_PCISR_OFFSET), getreg32(base + SAM_PIO_PCRHR_OFFSET));
leave_critical_section(flags);
diff --git a/arch/arm/src/samv7/sam_hsmci.c b/arch/arm/src/samv7/sam_hsmci.c
index 89d16b37928882b6ca1639d970f18ba3dbc79a7f..8c487a75fd9e28696806bf2d2b14cb141831a31d 100644
--- a/arch/arm/src/samv7/sam_hsmci.c
+++ b/arch/arm/src/samv7/sam_hsmci.c
@@ -98,7 +98,7 @@
# error "This driver requires CONFIG_SDIO_BLOCKSETUP"
#endif
-#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_VERBOSE)
+#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_INFO)
# undef CONFIG_SAMV7_HSMCI_CMDDEBUG
# undef CONFIG_SAMV7_HSMCI_XFRDEBUG
#endif
@@ -653,7 +653,7 @@ static bool sam_checkreg(struct sam_dev_s *priv, bool wr, uint32_t value,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -686,7 +686,7 @@ static inline uint32_t sam_getreg(struct sam_dev_s *priv, unsigned int offset)
#ifdef CONFIG_SAMV7_HSMCI_REGDEBUG
if (sam_checkreg(priv, false, value, address))
{
- lldbg("%08x->%08x\n", address, value);
+ llerr("%08x->%08x\n", address, value);
}
#endif
@@ -709,7 +709,7 @@ static inline void sam_putreg(struct sam_dev_s *priv, uint32_t value,
#ifdef CONFIG_SAMV7_HSMCI_REGDEBUG
if (sam_checkreg(priv, true, value, address))
{
- lldbg("%08x<-%08x\n", address, value);
+ llerr("%08x<-%08x\n", address, value);
}
#endif
@@ -933,25 +933,25 @@ static void sam_hsmcisample(struct sam_dev_s *priv,
static void sam_hsmcidump(struct sam_dev_s *priv,
struct sam_hsmciregs_s *regs, const char *msg)
{
- fdbg("HSMCI Registers: %s\n", msg);
- fdbg(" MR[%08x]: %08x\n", priv->base + SAM_HSMCI_MR_OFFSET, regs->mr);
- fdbg(" DTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_DTOR_OFFSET, regs->dtor);
- fdbg(" SDCR[%08x]: %08x\n", priv->base + SAM_HSMCI_SDCR_OFFSET, regs->sdcr);
- fdbg(" ARGR[%08x]: %08x\n", priv->base + SAM_HSMCI_ARGR_OFFSET, regs->argr);
- fdbg(" BLKR[%08x]: %08x\n", priv->base + SAM_HSMCI_BLKR_OFFSET, regs->blkr);
- fdbg(" CSTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_CSTOR_OFFSET, regs->cstor);
+ ferr("HSMCI Registers: %s\n", msg);
+ ferr(" MR[%08x]: %08x\n", priv->base + SAM_HSMCI_MR_OFFSET, regs->mr);
+ ferr(" DTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_DTOR_OFFSET, regs->dtor);
+ ferr(" SDCR[%08x]: %08x\n", priv->base + SAM_HSMCI_SDCR_OFFSET, regs->sdcr);
+ ferr(" ARGR[%08x]: %08x\n", priv->base + SAM_HSMCI_ARGR_OFFSET, regs->argr);
+ ferr(" BLKR[%08x]: %08x\n", priv->base + SAM_HSMCI_BLKR_OFFSET, regs->blkr);
+ ferr(" CSTOR[%08x]: %08x\n", priv->base + SAM_HSMCI_CSTOR_OFFSET, regs->cstor);
#if 0 /* Reading these can cause loss of response data */
- fdbg(" RSPR0[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR0_OFFSET, regs->rsp0);
- fdbg(" RSPR1[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR1_OFFSET, regs->rsp1);
- fdbg(" RSPR2[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR2_OFFSET, regs->rsp2);
- fdbg(" RSPR3[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR3_OFFSET, regs->rsp3);
-#endif
- fdbg(" SR[%08x]: %08x\n", priv->base + SAM_HSMCI_SR_OFFSET, regs->sr);
- fdbg(" IMR[%08x]: %08x\n", priv->base + SAM_HSMCI_IMR_OFFSET, regs->imr);
- fdbg(" DMA[%08x]: %08x\n", priv->base + SAM_HSMCI_DMA_OFFSET, regs->dma);
- fdbg(" CFG[%08x]: %08x\n", priv->base + SAM_HSMCI_CFG_OFFSET, regs->cfg);
- fdbg(" WPMR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPMR_OFFSET, regs->wpmr);
- fdbg(" WPSR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPSR_OFFSET, regs->wpsr);
+ ferr(" RSPR0[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR0_OFFSET, regs->rsp0);
+ ferr(" RSPR1[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR1_OFFSET, regs->rsp1);
+ ferr(" RSPR2[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR2_OFFSET, regs->rsp2);
+ ferr(" RSPR3[%08x]: %08x\n", priv->base + SAM_HSMCI_RSPR3_OFFSET, regs->rsp3);
+#endif
+ ferr(" SR[%08x]: %08x\n", priv->base + SAM_HSMCI_SR_OFFSET, regs->sr);
+ ferr(" IMR[%08x]: %08x\n", priv->base + SAM_HSMCI_IMR_OFFSET, regs->imr);
+ ferr(" DMA[%08x]: %08x\n", priv->base + SAM_HSMCI_DMA_OFFSET, regs->dma);
+ ferr(" CFG[%08x]: %08x\n", priv->base + SAM_HSMCI_CFG_OFFSET, regs->cfg);
+ ferr(" WPMR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPMR_OFFSET, regs->wpmr);
+ ferr(" WPSR[%08x]: %08x\n", priv->base + SAM_HSMCI_WPSR_OFFSET, regs->wpsr);
}
#endif
@@ -1025,7 +1025,7 @@ static void sam_xfrdumpone(struct sam_dev_s *priv, int index,
}
else
{
- fdbg("%s: Not collected\n", msg);
+ ferr("%s: Not collected\n", msg);
}
}
#endif
@@ -1169,7 +1169,7 @@ static void sam_dmacallback(DMA_HANDLE handle, void *arg, int result)
if (result < 0)
{
wkupevent = (result == -ETIMEDOUT ? SDIOWAIT_TIMEOUT : SDIOWAIT_ERROR);
- flldbg("ERROR: DMA failed: result=%d wkupevent=%04x\n", result, wkupevent);
+ fllerr("ERROR: DMA failed: result=%d wkupevent=%04x\n", result, wkupevent);
/* sam_endtransfer will terminate the transfer and wait up the waiting
* client in this case.
@@ -1269,7 +1269,7 @@ static void sam_eventtimeout(int argc, uint32_t arg)
/* Yes.. wake up any waiting threads */
sam_endwait(priv, SDIOWAIT_TIMEOUT);
- flldbg("ERROR: Timeout\n");
+ fllerr("ERROR: Timeout\n");
}
}
@@ -1469,7 +1469,7 @@ static int sam_hsmci_interrupt(struct sam_dev_s *priv)
{
/* Yes.. Was it some kind of timeout error? */
- flldbg("ERROR: enabled: %08x pending: %08x\n", enabled, pending);
+ fllerr("ERROR: enabled: %08x pending: %08x\n", enabled, pending);
if ((pending & HSMCI_DATA_TIMEOUT_ERRORS) != 0)
{
/* Yes.. Terminate with a timeout. */
@@ -1590,7 +1590,7 @@ static int sam_hsmci_interrupt(struct sam_dev_s *priv)
{
/* Yes.. Was the error some kind of timeout? */
- fllvdbg("ERROR: events: %08x SR: %08x\n",
+ fllinfo("ERROR: events: %08x SR: %08x\n",
priv->cmdrmask, enabled);
if ((pending & HSMCI_RESPONSE_TIMEOUT_ERRORS) != 0)
@@ -2056,7 +2056,7 @@ static int sam_sendcmd(FAR struct sdio_dev_s *dev,
/* Write the fully decorated command to CMDR */
- fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+ finfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
sam_putreg(priv, regval, SAM_HSMCI_CMDR_OFFSET);
sam_cmdsample1(priv, SAMPLENDX_AFTER_CMDR);
return OK;
@@ -2239,7 +2239,7 @@ static int sam_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer,
{
/* Some fatal error has occurred */
- fdbg("ERROR: sr %08x\n", sr);
+ ferr("ERROR: sr %08x\n", sr);
return -EIO;
}
else if ((sr & HSMCI_INT_TXRDY) != 0)
@@ -2419,7 +2419,7 @@ static int sam_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
{
/* Yes.. Was the error some kind of timeout? */
- fdbg("ERROR: cmd: %08x events: %08x SR: %08x\n",
+ ferr("ERROR: cmd: %08x events: %08x SR: %08x\n",
cmd, priv->cmdrmask, sr);
if ((pending & HSMCI_RESPONSE_TIMEOUT_ERRORS) != 0)
@@ -2449,7 +2449,7 @@ static int sam_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
}
else if (--timeout <= 0)
{
- fdbg("ERROR: Timeout cmd: %08x events: %08x SR: %08x\n",
+ ferr("ERROR: Timeout cmd: %08x events: %08x SR: %08x\n",
cmd, priv->cmdrmask, sr);
priv->wkupevent = SDIOWAIT_TIMEOUT;
@@ -2521,10 +2521,10 @@ static int sam_recvshort(FAR struct sdio_dev_s *dev,
* 0 1 End bit
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!rshort)
{
- fdbg("ERROR: rshort=NULL\n");
+ ferr("ERROR: rshort=NULL\n");
ret = -EINVAL;
}
@@ -2536,7 +2536,7 @@ static int sam_recvshort(FAR struct sdio_dev_s *dev,
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2582,12 +2582,12 @@ static int sam_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
* 0 1 End bit
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Check that R1 is the correct response to this command */
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2597,7 +2597,7 @@ static int sam_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
if ((priv->wkupevent & SDIOWAIT_TIMEOUT) != 0)
{
- fdbg("ERROR: timeout\n");
+ ferr("ERROR: timeout\n");
ret = -EINVAL;
}
@@ -2605,7 +2605,7 @@ static int sam_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
else if ((priv->wkupevent & SDIOWAIT_ERROR) != 0)
{
- fdbg("ERROR: Other error\n");
+ ferr("ERROR: Other error\n");
ret = -EIO;
}
@@ -2781,7 +2781,7 @@ static sdio_eventset_t sam_eventwait(FAR struct sdio_dev_s *dev,
1, (uint32_t)priv);
if (ret != OK)
{
- fdbg("ERROR: wd_start failed: %d\n", ret);
+ ferr("ERROR: wd_start failed: %d\n", ret);
}
}
@@ -2847,7 +2847,7 @@ static void sam_callbackenable(FAR struct sdio_dev_s *dev,
{
struct sam_dev_s *priv = (struct sam_dev_s *)dev;
- fvdbg("eventset: %02x\n", eventset);
+ finfo("eventset: %02x\n", eventset);
DEBUGASSERT(priv != NULL);
priv->cbevents = eventset;
@@ -2883,7 +2883,7 @@ static int sam_registercallback(FAR struct sdio_dev_s *dev,
/* Disable callbacks and register this callback and is argument */
- fvdbg("Register %p(%p)\n", callback, arg);
+ finfo("Register %p(%p)\n", callback, arg);
DEBUGASSERT(priv != NULL);
priv->cbevents = 0;
@@ -3158,7 +3158,7 @@ static void sam_callback(void *arg)
/* Is a callback registered? */
DEBUGASSERT(priv != NULL);
- fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
+ finfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
flags = enter_critical_section();
@@ -3213,17 +3213,17 @@ static void sam_callback(void *arg)
{
/* NOTE: Currently, work_cancel only returns success */
- fdbg("ERROR: Failed to cancel work: %d\n", ret);
+ ferr("ERROR: Failed to cancel work: %d\n", ret);
}
- fllvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
+ fllinfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
ret = work_queue(LPWORK, &priv->cbwork, (worker_t)priv->callback,
priv->cbarg, 0);
if (ret < 0)
{
/* NOTE: Currently, work_queue only returns success */
- fdbg("ERROR: Failed to schedule work: %d\n", ret);
+ ferr("ERROR: Failed to schedule work: %d\n", ret);
}
}
@@ -3261,7 +3261,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
* for now, an* HSMCI peripheral does correspond to a slot.
*/
- fvdbg("slotno: %d\n", slotno);
+ finfo("slotno: %d\n", slotno);
#ifdef CONFIG_SAMV7_HSMCI0
if (slotno == 0)
@@ -3344,7 +3344,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
return NULL;
}
- fvdbg("priv: %p base: %08x hsmci: %d pid: %d\n",
+ finfo("priv: %p base: %08x hsmci: %d pid: %d\n",
priv, priv->base, priv->hsmci, pid);
/* Initialize the HSMCI slot structure */
@@ -3414,7 +3414,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
priv->cdstatus &= ~SDIO_STATUS_PRESENT;
}
- fllvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
+ fllinfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
/* Perform any requested callback if the status has changed */
@@ -3459,7 +3459,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
}
- fvdbg("cdstatus: %02x\n", priv->cdstatus);
+ finfo("cdstatus: %02x\n", priv->cdstatus);
leave_critical_section(flags);
}
diff --git a/arch/arm/src/samv7/sam_irq.c b/arch/arm/src/samv7/sam_irq.c
index 963b87db1daec5e15a714b763fb355068426c2e1..dc5b013f61e56f6ca7c19102838f9af44fc863c9 100644
--- a/arch/arm/src/samv7/sam_irq.c
+++ b/arch/arm/src/samv7/sam_irq.c
@@ -114,40 +114,40 @@ static void sam_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" INTCTRL: %08x VECTAB: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+ llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
- lldbg(" IRQ ENABLE: %08x %08x %08x\n",
+ llerr(" IRQ ENABLE: %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
- lldbg(" SYSH_PRIO: %08x %08x %08x\n",
+ llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
#if SAM_IRQ_NEXTINT > 15
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 31
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 47
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
#endif
#if SAM_IRQ_NEXTINT > 63
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
#endif
@@ -161,7 +161,7 @@ static void sam_dumpnvic(const char *msg, int irq)
#endif
/****************************************************************************
- * Name: sam_nmi, sam_busfault, sam_usagefault, sam_pendsv, sam_dbgmonitor,
+ * Name: sam_nmi, sam_busfault, sam_usagefault, sam_pendsv, sam_errmonitor,
* sam_pendsv, sam_reserved
*
* Description:
@@ -171,11 +171,11 @@ static void sam_dumpnvic(const char *msg, int irq)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int sam_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -183,7 +183,7 @@ static int sam_nmi(int irq, FAR void *context)
static int sam_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
+ err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -191,7 +191,7 @@ static int sam_busfault(int irq, FAR void *context)
static int sam_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
+ err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -199,15 +199,15 @@ static int sam_usagefault(int irq, FAR void *context)
static int sam_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
-static int sam_dbgmonitor(int irq, FAR void *context)
+static int sam_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Debug Monitor received\n");
+ err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@@ -215,7 +215,7 @@ static int sam_dbgmonitor(int irq, FAR void *context)
static int sam_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -456,7 +456,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(SAM_IRQ_NMI, sam_nmi);
#ifndef CONFIG_ARM_MPU
irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
@@ -464,7 +464,7 @@ void up_irqinitialize(void)
irq_attach(SAM_IRQ_BUSFAULT, sam_busfault);
irq_attach(SAM_IRQ_USAGEFAULT, sam_usagefault);
irq_attach(SAM_IRQ_PENDSV, sam_pendsv);
- irq_attach(SAM_IRQ_DBGMONITOR, sam_dbgmonitor);
+ irq_attach(SAM_IRQ_DBGMONITOR, sam_errmonitor);
irq_attach(SAM_IRQ_RESERVED, sam_reserved);
#endif
diff --git a/arch/arm/src/samv7/sam_mcan.c b/arch/arm/src/samv7/sam_mcan.c
index f7b9e31592bdf56f037e069d7448d6b42ea05b80..d02a094bdf2e85810bd6a8b16780f6769ba5bc9d 100644
--- a/arch/arm/src/samv7/sam_mcan.c
+++ b/arch/arm/src/samv7/sam_mcan.c
@@ -789,28 +789,28 @@
/* Debug ********************************************************************/
/* Debug configurations that may be enabled just for testing MCAN */
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_CAN)
+#if !defined(CONFIG_DEBUG_FEATURES) || !defined(CONFIG_DEBUG_CAN)
# undef CONFIG_SAMV7_MCAN_REGDEBUG
#endif
#ifdef CONFIG_DEBUG_CAN
-# define candbg dbg
-# define canvdbg vdbg
-# define canlldbg lldbg
-# define canllvdbg llvdbg
+# define canerr err
+# define caninfo info
+# define canllerr llerr
+# define canllinfo llinfo
# ifdef CONFIG_SAMV7_MCAN_REGDEBUG
-# define canregdbg lldbg
+# define canregerr llerr
# else
-# define canregdbg(x...)
+# define canregerr(x...)
# endif
#else
-# define candbg(x...)
-# define canvdbg(x...)
-# define canlldbg(x...)
-# define canllvdbg(x...)
-# define canregdbg(x...)
+# define canerr(x...)
+# define caninfo(x...)
+# define canllerr(x...)
+# define canllinfo(x...)
+# define canregerr(x...)
#endif
/****************************************************************************
@@ -1209,7 +1209,7 @@ static uint32_t mcan_getreg(FAR struct sam_mcan_s *priv, int offset)
{
if (priv->count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return regval;
@@ -1226,7 +1226,7 @@ static uint32_t mcan_getreg(FAR struct sam_mcan_s *priv, int offset)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", priv->count - 3);
+ llerr("[repeats %d more times]\n", priv->count - 3);
}
/* Save the new address, value, and count */
@@ -1238,7 +1238,7 @@ static uint32_t mcan_getreg(FAR struct sam_mcan_s *priv, int offset)
/* Show the register value read */
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
return regval;
}
@@ -1275,7 +1275,7 @@ static void mcan_putreg(FAR struct sam_mcan_s *priv, int offset, uint32_t regval
/* Show the register value being written */
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
/* Write the value */
@@ -1310,70 +1310,70 @@ static void mcan_dumpregs(FAR struct sam_mcan_s *priv, FAR const char *msg)
{
FAR const struct sam_config_s *config = priv->config;
- lldbg("MCAN%d Registers: %s\n", config->port, msg);
- lldbg(" Base: %08x\n", config->base);
+ llerr("MCAN%d Registers: %s\n", config->port, msg);
+ llerr(" Base: %08x\n", config->base);
- lldbg(" CUST: %08x FBTP: %08x TEST: %08x RWD: %08x\n",
+ llerr(" CUST: %08x FBTP: %08x TEST: %08x RWD: %08x\n",
getreg32(config->base + SAM_MCAN_CUST_OFFSET),
getreg32(config->base + SAM_MCAN_FBTP_OFFSET),
getreg32(config->base + SAM_MCAN_TEST_OFFSET),
getreg32(config->base + SAM_MCAN_RWD_OFFSET));
- lldbg(" CCCR: %08x BTP: %08x TSCC: %08x TSCV: %08x\n",
+ llerr(" CCCR: %08x BTP: %08x TSCC: %08x TSCV: %08x\n",
getreg32(config->base + SAM_MCAN_CCCR_OFFSET),
getreg32(config->base + SAM_MCAN_BTP_OFFSET),
getreg32(config->base + SAM_MCAN_TSCC_OFFSET),
getreg32(config->base + SAM_MCAN_TSCV_OFFSET));
- lldbg(" TOCC: %08x TOCV: %08x ECR: %08x PSR: %08x\n",
+ llerr(" TOCC: %08x TOCV: %08x ECR: %08x PSR: %08x\n",
getreg32(config->base + SAM_MCAN_TOCC_OFFSET),
getreg32(config->base + SAM_MCAN_TOCV_OFFSET),
getreg32(config->base + SAM_MCAN_ECR_OFFSET),
getreg32(config->base + SAM_MCAN_PSR_OFFSET));
- lldbg(" IR: %08x IE: %08x ILS: %08x ILE: %08x\n",
+ llerr(" IR: %08x IE: %08x ILS: %08x ILE: %08x\n",
getreg32(config->base + SAM_MCAN_IR_OFFSET),
getreg32(config->base + SAM_MCAN_IE_OFFSET),
getreg32(config->base + SAM_MCAN_ILS_OFFSET),
getreg32(config->base + SAM_MCAN_ILE_OFFSET));
- lldbg(" GFC: %08x SIDFC: %08x XIDFC: %08x XIDAM: %08x\n",
+ llerr(" GFC: %08x SIDFC: %08x XIDFC: %08x XIDAM: %08x\n",
getreg32(config->base + SAM_MCAN_GFC_OFFSET),
getreg32(config->base + SAM_MCAN_SIDFC_OFFSET),
getreg32(config->base + SAM_MCAN_XIDFC_OFFSET),
getreg32(config->base + SAM_MCAN_XIDAM_OFFSET));
- lldbg(" HPMS: %08x NDAT1: %08x NDAT2: %08x RXF0C: %08x\n",
+ llerr(" HPMS: %08x NDAT1: %08x NDAT2: %08x RXF0C: %08x\n",
getreg32(config->base + SAM_MCAN_HPMS_OFFSET),
getreg32(config->base + SAM_MCAN_NDAT1_OFFSET),
getreg32(config->base + SAM_MCAN_NDAT2_OFFSET),
getreg32(config->base + SAM_MCAN_RXF0C_OFFSET));
- lldbg(" RXF0S: %08x FXF0A: %08x RXBC: %08x RXF1C: %08x\n",
+ llerr(" RXF0S: %08x FXF0A: %08x RXBC: %08x RXF1C: %08x\n",
getreg32(config->base + SAM_MCAN_RXF0S_OFFSET),
getreg32(config->base + SAM_MCAN_RXF0A_OFFSET),
getreg32(config->base + SAM_MCAN_RXBC_OFFSET),
getreg32(config->base + SAM_MCAN_RXF1C_OFFSET));
- lldbg(" RXF1S: %08x FXF1A: %08x RXESC: %08x TXBC: %08x\n",
+ llerr(" RXF1S: %08x FXF1A: %08x RXESC: %08x TXBC: %08x\n",
getreg32(config->base + SAM_MCAN_RXF1S_OFFSET),
getreg32(config->base + SAM_MCAN_RXF1A_OFFSET),
getreg32(config->base + SAM_MCAN_RXESC_OFFSET),
getreg32(config->base + SAM_MCAN_TXBC_OFFSET));
- lldbg(" TXFQS: %08x TXESC: %08x TXBRP: %08x TXBAR: %08x\n",
+ llerr(" TXFQS: %08x TXESC: %08x TXBRP: %08x TXBAR: %08x\n",
getreg32(config->base + SAM_MCAN_TXFQS_OFFSET),
getreg32(config->base + SAM_MCAN_TXESC_OFFSET),
getreg32(config->base + SAM_MCAN_TXBRP_OFFSET),
getreg32(config->base + SAM_MCAN_TXBAR_OFFSET));
- lldbg(" TXBCR: %08x TXBTO: %08x TXBCF: %08x TXBTIE: %08x\n",
+ llerr(" TXBCR: %08x TXBTO: %08x TXBCF: %08x TXBTIE: %08x\n",
getreg32(config->base + SAM_MCAN_TXBCR_OFFSET),
getreg32(config->base + SAM_MCAN_TXBTO_OFFSET),
getreg32(config->base + SAM_MCAN_TXBCF_OFFSET),
getreg32(config->base + SAM_MCAN_TXBTIE_OFFSET));
- lldbg("TXBCIE: %08x TXEFC: %08x TXEFS: %08x TXEFA: %08x\n",
+ llerr("TXBCIE: %08x TXEFC: %08x TXEFS: %08x TXEFA: %08x\n",
getreg32(config->base + SAM_MCAN_TXBCIE_OFFSET),
getreg32(config->base + SAM_MCAN_TXEFC_OFFSET),
getreg32(config->base + SAM_MCAN_TXEFS_OFFSET),
@@ -1502,7 +1502,7 @@ static void mcan_buffer_reserve(FAR struct sam_mcan_s *priv)
if (sval > 0)
{
- candbg("ERROR: TX FIFOQ full but txfsem is %d\n", sval);
+ canerr("ERROR: TX FIFOQ full but txfsem is %d\n", sval);
sem_reset(&priv->txfsem, 0);
}
}
@@ -1520,7 +1520,7 @@ static void mcan_buffer_reserve(FAR struct sam_mcan_s *priv)
else if (sval <= 0)
{
- candbg("ERROR: TX FIFOQ not full but txfsem is %d\n", sval);
+ canerr("ERROR: TX FIFOQ not full but txfsem is %d\n", sval);
/* Less than zero means that another thread is waiting */
@@ -1551,7 +1551,7 @@ static void mcan_buffer_reserve(FAR struct sam_mcan_s *priv)
if (tffl > priv->config->ntxfifoq)
{
- candbg("ERROR: TX FIFO reports %d but max is %d\n",
+ canerr("ERROR: TX FIFO reports %d but max is %d\n",
tffl, priv->config->ntxfifoq);
tffl = priv->config->ntxfifoq;
}
@@ -1564,7 +1564,7 @@ static void mcan_buffer_reserve(FAR struct sam_mcan_s *priv)
if (sval != tffl)
{
- candbg("ERROR: TX FIFO reports %d but txfsem is %d\n", tffl, sval);
+ canerr("ERROR: TX FIFO reports %d but txfsem is %d\n", tffl, sval);
/* Reset the semaphore count to the Tx FIFO free level. */
@@ -1620,7 +1620,7 @@ static void mcan_buffer_release(FAR struct sam_mcan_s *priv)
}
else
{
- candbg("ERROR: txfsem would increment beyond %d\n",
+ canerr("ERROR: txfsem would increment beyond %d\n",
priv->config->ntxfifoq);
}
}
@@ -2151,7 +2151,7 @@ static void mcan_reset(FAR struct can_dev_s *dev)
config = priv->config;
DEBUGASSERT(config);
- canllvdbg("MCAN%d\n", config->port);
+ canllinfo("MCAN%d\n", config->port);
UNUSED(config);
/* Get exclusive access to the MCAN peripheral */
@@ -2208,7 +2208,7 @@ static int mcan_setup(FAR struct can_dev_s *dev)
config = priv->config;
DEBUGASSERT(config);
- canllvdbg("MCAN%d pid: %d\n", config->port, config->pid);
+ canllinfo("MCAN%d pid: %d\n", config->port, config->pid);
/* Get exclusive access to the MCAN peripheral */
@@ -2219,7 +2219,7 @@ static int mcan_setup(FAR struct can_dev_s *dev)
ret = mcan_hw_initialize(priv);
if (ret < 0)
{
- canlldbg("MCAN%d H/W initialization failed: %d\n", config->port, ret);
+ canllerr("MCAN%d H/W initialization failed: %d\n", config->port, ret);
return ret;
}
@@ -2230,7 +2230,7 @@ static int mcan_setup(FAR struct can_dev_s *dev)
ret = irq_attach(config->irq0, config->handler);
if (ret < 0)
{
- canlldbg("Failed to attach MCAN%d line 0 IRQ (%d)",
+ canllerr("Failed to attach MCAN%d line 0 IRQ (%d)",
config->port, config->irq0);
return ret;
}
@@ -2238,7 +2238,7 @@ static int mcan_setup(FAR struct can_dev_s *dev)
ret = irq_attach(config->irq1, config->handler);
if (ret < 0)
{
- canlldbg("Failed to attach MCAN%d line 1 IRQ (%d)",
+ canllerr("Failed to attach MCAN%d line 1 IRQ (%d)",
config->port, config->irq1);
return ret;
}
@@ -2285,7 +2285,7 @@ static void mcan_shutdown(FAR struct can_dev_s *dev)
config = priv->config;
DEBUGASSERT(config);
- canllvdbg("MCAN%d\n", config->port);
+ canllinfo("MCAN%d\n", config->port);
/* Get exclusive access to the MCAN peripheral */
@@ -2334,7 +2334,7 @@ static void mcan_rxint(FAR struct can_dev_s *dev, bool enable)
DEBUGASSERT(priv && priv->config);
- canllvdbg("MCAN%d enable: %d\n", priv->config->port, enable);
+ canllinfo("MCAN%d enable: %d\n", priv->config->port, enable);
/* Enable/disable the receive interrupts */
@@ -2376,7 +2376,7 @@ static void mcan_txint(FAR struct can_dev_s *dev, bool enable)
DEBUGASSERT(priv && priv->config);
- canllvdbg("MCAN%d enable: %d\n", priv->config->port, enable);
+ canllinfo("MCAN%d enable: %d\n", priv->config->port, enable);
/* Enable/disable the receive interrupts */
@@ -2415,7 +2415,7 @@ static int mcan_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
FAR struct sam_mcan_s *priv;
int ret = -ENOTTY;
- canvdbg("cmd=%04x arg=%lu\n", cmd, arg);
+ caninfo("cmd=%04x arg=%lu\n", cmd, arg);
DEBUGASSERT(dev && dev->cd_priv);
priv = dev->cd_priv;
@@ -2612,7 +2612,7 @@ static int mcan_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
/* Unsupported/unrecognized command */
default:
- candbg("ERROR: Unrecognized command: %04x\n", cmd);
+ canerr("ERROR: Unrecognized command: %04x\n", cmd);
break;
}
@@ -2683,8 +2683,8 @@ static int mcan_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
DEBUGASSERT(priv && priv->config);
config = priv->config;
- canllvdbg("MCAN%d\n", config->port);
- canllvdbg("MCAN%d ID: %d DLC: %d\n",
+ canllinfo("MCAN%d\n", config->port);
+ canllinfo("MCAN%d ID: %d DLC: %d\n",
config->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
/* That that FIFO elements were configured.
@@ -2756,7 +2756,7 @@ static int mcan_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
}
txbuffer[0] = regval;
- canregdbg("T0: %08x\n", regval);
+ canregerr("T0: %08x\n", regval);
/* Format word T1:
* Data Length Code (DLC) - Value from message structure
@@ -2765,7 +2765,7 @@ static int mcan_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
*/
txbuffer[1] = BUFFER_R1_DLC(msg->cm_hdr.ch_dlc);
- canregdbg("T1: %08x\n", txbuffer[1]);
+ canregerr("T1: %08x\n", txbuffer[1]);
/* Followed by the amount of data corresponding to the DLC (T2..) */
@@ -2829,7 +2829,7 @@ static bool mcan_txready(FAR struct can_dev_s *dev)
FAR struct sam_mcan_s *priv = dev->cd_priv;
uint32_t regval;
bool notfull;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
int sval;
#endif
@@ -2846,7 +2846,7 @@ static bool mcan_txready(FAR struct can_dev_s *dev)
regval = mcan_getreg(priv, SAM_MCAN_TXFQS_OFFSET);
notfull = ((regval & MCAN_TXFQS_TFQF) == 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* As a sanity check, the txfsem should also track the number of elements
* the TX FIFO/queue. Make sure that they are consistent.
*/
@@ -3155,7 +3155,7 @@ static void mcan_error(FAR struct can_dev_s *dev, uint32_t status,
ret = can_receive(dev, &hdr, data);
if (ret < 0)
{
- canlldbg("ERROR: can_receive failed: %d\n", ret);
+ canllerr("ERROR: can_receive failed: %d\n", ret);
}
}
}
@@ -3194,7 +3194,7 @@ static void mcan_receive(FAR struct can_dev_s *dev, FAR uint32_t *rxbuffer,
/* Work R0 contains the CAN ID */
regval = *rxbuffer++;
- canregdbg("R0: %08x\n", regval);
+ canregerr("R0: %08x\n", regval);
#ifdef CONFIG_CAN_ERRORS
hdr.ch_error = 0;
@@ -3240,7 +3240,7 @@ static void mcan_receive(FAR struct can_dev_s *dev, FAR uint32_t *rxbuffer,
/* Word R1 contains the DLC and timestamp */
regval = *rxbuffer++;
- canregdbg("R1: %08x\n", regval);
+ canregerr("R1: %08x\n", regval);
hdr.ch_dlc = (regval & BUFFER_R1_DLC_MASK) >> BUFFER_R1_DLC_SHIFT;
@@ -3249,7 +3249,7 @@ static void mcan_receive(FAR struct can_dev_s *dev, FAR uint32_t *rxbuffer,
ret = can_receive(dev, &hdr, (FAR uint8_t *)rxbuffer);
if (ret < 0)
{
- canlldbg("ERROR: can_receive failed: %d\n", ret);
+ canllerr("ERROR: can_receive failed: %d\n", ret);
}
}
@@ -3302,7 +3302,7 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
if ((pending & MCAN_CMNERR_INTS) != 0)
{
- canlldbg("ERROR: Common %08x\n", pending & MCAN_CMNERR_INTS);
+ canllerr("ERROR: Common %08x\n", pending & MCAN_CMNERR_INTS);
/* Clear the error indications */
@@ -3313,7 +3313,7 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
if ((pending & MCAN_TXERR_INTS) != 0)
{
- canlldbg("ERROR: TX %08x\n", pending & MCAN_TXERR_INTS);
+ canllerr("ERROR: TX %08x\n", pending & MCAN_TXERR_INTS);
/* Clear the error indications */
@@ -3334,7 +3334,7 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
if ((pending & MCAN_RXERR_INTS) != 0)
{
- canlldbg("ERROR: RX %08x\n", pending & MCAN_RXERR_INTS);
+ canllerr("ERROR: RX %08x\n", pending & MCAN_RXERR_INTS);
/* Clear the error indications */
@@ -3355,7 +3355,7 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
{
/* All (old) errors cleared */
- canlldbg("ERROR: CLEARED\n");
+ canllerr("ERROR: CLEARED\n");
mcan_error(dev, 0, priv->olderrors);
@@ -3480,7 +3480,7 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
if ((regval & MCAN_RXF0S_RF0L) != 0)
{
- canlldbg("ERROR: Message lost: %08x\n", regval);
+ canllerr("ERROR: Message lost: %08x\n", regval);
}
else
{
@@ -3514,7 +3514,7 @@ static void mcan_interrupt(FAR struct can_dev_s *dev)
if ((regval & MCAN_RXF0S_RF0L) != 0)
{
- canlldbg("ERROR: Message lost: %08x\n", regval);
+ canllerr("ERROR: Message lost: %08x\n", regval);
}
else
{
@@ -3608,7 +3608,7 @@ static int mcan_hw_initialize(struct sam_mcan_s *priv)
uint32_t cntr;
uint32_t cmr;
- canllvdbg("MCAN%d\n", config->port);
+ canllinfo("MCAN%d\n", config->port);
/* Configure MCAN pins */
@@ -3883,7 +3883,7 @@ FAR struct can_dev_s *sam_mcan_initialize(int port)
FAR const struct sam_config_s *config;
uint32_t regval;
- canvdbg("MCAN%d\n", port);
+ caninfo("MCAN%d\n", port);
/* Select PCK5 clock source and pre-scaler value. Both MCAN controllers
* use PCK5 to derive bit rate.
@@ -3935,7 +3935,7 @@ FAR struct can_dev_s *sam_mcan_initialize(int port)
else
#endif
{
- candbg("ERROR: Unsupported port %d\n", port);
+ canerr("ERROR: Unsupported port %d\n", port);
return NULL;
}
diff --git a/arch/arm/src/samv7/sam_oneshot.c b/arch/arm/src/samv7/sam_oneshot.c
index 76c4ee1a41b418c310ba3df047ba2413c29f9b3a..4400c57d9331b20c81870464b5f41d76603d70f1 100644
--- a/arch/arm/src/samv7/sam_oneshot.c
+++ b/arch/arm/src/samv7/sam_oneshot.c
@@ -109,7 +109,7 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
oneshot_handler_t oneshot_handler;
void *oneshot_arg;
- tcllvdbg("Expired...\n");
+ tcllinfo("Expired...\n");
DEBUGASSERT(oneshot && oneshot->handler);
/* The clock was stopped, but not disabled when the RC match occurred.
@@ -166,7 +166,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
uint32_t cmr;
int ret;
- tcvdbg("chan=%d resolution=%d usec\n", chan, resolution);
+ tcinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(oneshot && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
@@ -178,11 +178,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
ret = sam_tc_clockselect(frequency, &cmr, &actual);
if (ret < 0)
{
- tcdbg("ERROR: sam_tc_clockselect failed: %d\n", ret);
+ tcerr("ERROR: sam_tc_clockselect failed: %d\n", ret);
return ret;
}
- tcvdbg("frequency=%lu, actual=%lu, cmr=%08lx\n",
+ tcinfo("frequency=%lu, actual=%lu, cmr=%08lx\n",
(unsigned long)frequency, (unsigned long)actual,
(unsigned long)cmr);
@@ -218,7 +218,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
oneshot->tch = sam_tc_allocate(chan, cmr);
if (!oneshot->tch)
{
- tcdbg("ERROR: Failed to allocate timer channel %d\n", chan);
+ tcerr("ERROR: Failed to allocate timer channel %d\n", chan);
return -EBUSY;
}
@@ -261,7 +261,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
uint64_t regval;
irqstate_t flags;
- tcvdbg("handler=%p arg=%p, ts=(%lu, %lu)\n",
+ tcinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
DEBUGASSERT(oneshot && handler && ts);
@@ -272,7 +272,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
{
/* Yes.. then cancel it */
- tcvdbg("Already running... cancelling\n");
+ tcinfo("Already running... cancelling\n");
(void)sam_oneshot_cancel(oneshot, freerun, NULL);
}
@@ -294,7 +294,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
regval = (usec * (uint64_t)sam_tc_divfreq(oneshot->tch)) / USEC_PER_SEC;
- tcvdbg("usec=%llu regval=%08llx\n", usec, regval);
+ tcinfo("usec=%llu regval=%08llx\n", usec, regval);
DEBUGASSERT(regval <= UINT16_MAX);
/* Set up to receive the callback when the interrupt occurs */
@@ -403,7 +403,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
* REVISIT: This does not appear to be the case.
*/
- tcvdbg("Cancelling...\n");
+ tcinfo("Cancelling...\n");
count = sam_tc_getcounter(oneshot->tch);
rc = sam_tc_getregister(oneshot->tch, TC_REGC);
@@ -439,7 +439,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
* oneshot timer.
*/
- tcvdbg("rc=%lu count=%lu usec=%lu\n",
+ tcinfo("rc=%lu count=%lu usec=%lu\n",
(unsigned long)rc, (unsigned long)count, (unsigned long)usec);
/* REVISIT: I am not certain why the timer counter value sometimes
@@ -484,7 +484,7 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
ts->tv_nsec = (unsigned long)nsec;
}
- tcvdbg("remaining (%lu, %lu)\n",
+ tcinfo("remaining (%lu, %lu)\n",
(unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
}
diff --git a/arch/arm/src/samv7/sam_pck.c b/arch/arm/src/samv7/sam_pck.c
index c4dc27d0295f051496b6ffe238810cfce2e636a4..ddfc7371fae8f6d7ee22ef1395982992f500ee87 100644
--- a/arch/arm/src/samv7/sam_pck.c
+++ b/arch/arm/src/samv7/sam_pck.c
@@ -128,7 +128,7 @@ uint32_t sam_pck_configure(enum pckid_e pckid, enum pckid_clksrc_e clksrc,
break;
default:
- dbg("ERROR: Unknown clock source\n");
+ err("ERROR: Unknown clock source\n");
return 0;
}
@@ -272,7 +272,7 @@ uint32_t sam_pck_frequency(enum pckid_e pckid)
break;
default:
- dbg("ERROR: Unknown clock source\n");
+ err("ERROR: Unknown clock source\n");
return 0;
}
diff --git a/arch/arm/src/samv7/sam_qspi.c b/arch/arm/src/samv7/sam_qspi.c
index e63a6ce22b16a6419c1e71181d49e465bb260caf..615894f93072462937fdec3252c6055d5cf10d95 100644
--- a/arch/arm/src/samv7/sam_qspi.c
+++ b/arch/arm/src/samv7/sam_qspi.c
@@ -138,31 +138,20 @@
#define IS_ALIGNED(n) (((uint32_t)(n) & ALIGN_MASK) == 0)
/* Debug *******************************************************************/
-/* Check if QSPI debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_SPI
-# undef CONFIG_SAMV7_QSPI_DMADEBUG
-# undef CONFIG_SAMV7_QSPI_REGDEBUG
-#endif
+/* Check if QSPI debug is enabled */
#ifndef CONFIG_DEBUG_DMA
# undef CONFIG_SAMV7_QSPI_DMADEBUG
#endif
#ifdef CONFIG_DEBUG_SPI
-# define qspidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define qspivdbg lldbg
-# else
-# define qspivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define qspidbg(x...)
-# define qspivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
#define DMA_INITIAL 0
@@ -243,7 +232,7 @@ static inline uint32_t qspi_getreg(struct sam_qspidev_s *priv,
static inline void qspi_putreg(struct sam_qspidev_s *priv, uint32_t value,
unsigned int offset);
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void qspi_dumpregs(struct sam_qspidev_s *priv, const char *msg);
#else
# define qspi_dumpregs(priv,msg)
@@ -395,7 +384,7 @@ static bool qspi_checkreg(struct sam_qspidev_s *priv, bool wr, uint32_t value,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -429,7 +418,7 @@ static inline uint32_t qspi_getreg(struct sam_qspidev_s *priv,
#ifdef CONFIG_SAMV7_QSPI_REGDEBUG
if (qspi_checkreg(priv, false, value, address))
{
- lldbg("%08x->%08x\n", address, value);
+ llerr("%08x->%08x\n", address, value);
}
#endif
@@ -452,7 +441,7 @@ static inline void qspi_putreg(struct sam_qspidev_s *priv, uint32_t value,
#ifdef CONFIG_SAMV7_QSPI_REGDEBUG
if (qspi_checkreg(priv, true, value, address))
{
- lldbg("%08x<-%08x\n", address, value);
+ llerr("%08x<-%08x\n", address, value);
}
#endif
@@ -474,21 +463,21 @@ static inline void qspi_putreg(struct sam_qspidev_s *priv, uint32_t value,
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void qspi_dumpregs(struct sam_qspidev_s *priv, const char *msg)
{
- qspivdbg("%s:\n", msg);
- qspivdbg(" MR:%08x SR:%08x IMR:%08x SCR:%08x\n",
+ qspiinfo("%s:\n", msg);
+ qspiinfo(" MR:%08x SR:%08x IMR:%08x SCR:%08x\n",
getreg32(priv->base + SAM_QSPI_MR_OFFSET),
getreg32(priv->base + SAM_QSPI_SR_OFFSET),
getreg32(priv->base + SAM_QSPI_IMR_OFFSET),
getreg32(priv->base + SAM_QSPI_SCR_OFFSET));
- qspivdbg(" IAR:%08x ICR:%08x IFR:%08x SMR:%08x\n",
+ qspiinfo(" IAR:%08x ICR:%08x IFR:%08x SMR:%08x\n",
getreg32(priv->base + SAM_QSPI_IAR_OFFSET),
getreg32(priv->base + SAM_QSPI_ICR_OFFSET),
getreg32(priv->base + SAM_QSPI_IFR_OFFSET),
getreg32(priv->base + SAM_QSPI_SMR_OFFSET));
- qspivdbg(" WPCR:%08x WPSR:%08x\n",
+ qspiinfo(" WPCR:%08x WPSR:%08x\n",
getreg32(priv->base + SAM_QSPI_WPCR_OFFSET),
getreg32(priv->base + SAM_QSPI_WPSR_OFFSET));
}
@@ -866,7 +855,7 @@ static int qspi_memory_dma(struct sam_qspidev_s *priv,
if (ret < 0)
{
- qspidbg("ERROR: DMA setup failed: %d\n", ret);
+ qspierr("ERROR: DMA setup failed: %d\n", ret);
return ret;
}
@@ -882,7 +871,7 @@ static int qspi_memory_dma(struct sam_qspidev_s *priv,
ret = sam_dmastart(priv->dmach, qspi_dma_callback, (void *)priv);
if (ret < 0)
{
- qspidbg("ERROR: sam_dmastart failed: %d\n", ret);
+ qspierr("ERROR: sam_dmastart failed: %d\n", ret);
return ret;
}
@@ -903,7 +892,7 @@ static int qspi_memory_dma(struct sam_qspidev_s *priv,
(wdentry_t)qspi_dma_timeout, 1, (uint32_t)priv);
if (ret != OK)
{
- qspidbg("ERROR: wd_start failed: %d\n", ret);
+ qspierr("ERROR: wd_start failed: %d\n", ret);
}
/* Wait for the DMA complete */
@@ -961,7 +950,7 @@ static int qspi_memory_dma(struct sam_qspidev_s *priv,
if (priv->result)
{
- qspidbg("ERROR: DMA failed with result: %d\n", priv->result);
+ qspierr("ERROR: DMA failed with result: %d\n", priv->result);
}
return priv->result;
@@ -1078,7 +1067,7 @@ static int qspi_lock(struct qspi_dev_s *dev, bool lock)
{
struct sam_qspidev_s *priv = (struct sam_qspidev_s *)dev;
- qspivdbg("lock=%d\n", lock);
+ qspiinfo("lock=%d\n", lock);
if (lock)
{
/* Take the semaphore (perhaps waiting) */
@@ -1128,7 +1117,7 @@ static uint32_t qspi_setfrequency(struct qspi_dev_s *dev, uint32_t frequency)
#endif
uint32_t regval;
- qspivdbg("frequency=%d\n", frequency);
+ qspiinfo("frequency=%d\n", frequency);
DEBUGASSERT(priv);
/* Check if the requested frequency is the same as the frequency selection */
@@ -1215,14 +1204,14 @@ static uint32_t qspi_setfrequency(struct qspi_dev_s *dev, uint32_t frequency)
/* Calculate the new actual frequency */
actual = SAM_QSPI_CLOCK / scbr;
- qspivdbg("SCBR=%d actual=%d\n", scbr, actual);
+ qspiinfo("SCBR=%d actual=%d\n", scbr, actual);
/* Save the frequency setting */
priv->frequency = frequency;
priv->actual = actual;
- qspivdbg("Frequency %d->%d\n", frequency, actual);
+ qspiinfo("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -1246,7 +1235,7 @@ static void qspi_setmode(struct qspi_dev_s *dev, enum qspi_mode_e mode)
struct sam_qspidev_s *priv = (struct sam_qspidev_s *)dev;
uint32_t regval;
- qspivdbg("mode=%d\n", mode);
+ qspiinfo("mode=%d\n", mode);
/* Has the mode changed? */
@@ -1288,7 +1277,7 @@ static void qspi_setmode(struct qspi_dev_s *dev, enum qspi_mode_e mode)
}
qspi_putreg(priv, regval, SAM_QSPI_SCR_OFFSET);
- qspivdbg("SCR=%08x\n", regval);
+ qspiinfo("SCR=%08x\n", regval);
/* Save the mode so that subsequent re-configurations will be faster */
@@ -1316,7 +1305,7 @@ static void qspi_setbits(struct qspi_dev_s *dev, int nbits)
struct sam_qspidev_s *priv = (struct sam_qspidev_s *)dev;
uint32_t regval;
- qspivdbg("nbits=%d\n", nbits);
+ qspiinfo("nbits=%d\n", nbits);
DEBUGASSERT(priv != NULL);
DEBUGASSERT(nbits >= SAM_QSPI_MINBITS && nbits <= SAM_QSPI_MAXBITS);
@@ -1331,7 +1320,7 @@ static void qspi_setbits(struct qspi_dev_s *dev, int nbits)
regval |= QSPI_MR_NBBITS(nbits);
qspi_putreg(priv, regval, SAM_QSPI_MR_OFFSET);
- qspivdbg("MR=%08x\n", regval);
+ qspiinfo("MR=%08x\n", regval);
/* Save the selection so the subsequence re-configurations will be faster */
@@ -1364,20 +1353,20 @@ static int qspi_command(struct qspi_dev_s *dev,
DEBUGASSERT(priv != NULL && cmdinfo != NULL);
#ifdef CONFIG_DEBUG_SPI
- qspivdbg("Transfer:\n");
- qspivdbg(" flags: %02x\n", cmdinfo->flags);
- qspivdbg(" cmd: %04x\n", cmdinfo->cmd);
+ qspiinfo("Transfer:\n");
+ qspiinfo(" flags: %02x\n", cmdinfo->flags);
+ qspiinfo(" cmd: %04x\n", cmdinfo->cmd);
if (QSPICMD_ISADDRESS(cmdinfo->flags))
{
- qspivdbg(" address/length: %08lx/%d\n",
+ qspiinfo(" address/length: %08lx/%d\n",
(unsigned long)cmdinfo->addr, cmdinfo->addrlen);
}
if (QSPICMD_ISDATA(cmdinfo->flags))
{
- qspivdbg(" %s Data:\n", QSPICMD_ISWRITE(cmdinfo->flags) ? "Write" : "Read");
- qspivdbg(" buffer/length: %p/%d\n", cmdinfo->buffer, cmdinfo->buflen);
+ qspiinfo(" %s Data:\n", QSPICMD_ISWRITE(cmdinfo->flags) ? "Write" : "Read");
+ qspiinfo(" buffer/length: %p/%d\n", cmdinfo->buffer, cmdinfo->buflen);
}
#endif
@@ -1572,13 +1561,13 @@ static int qspi_memory(struct qspi_dev_s *dev,
DEBUGASSERT(priv != NULL && meminfo != NULL);
- qspivdbg("Transfer:\n");
- qspivdbg(" flags: %02x\n", meminfo->flags);
- qspivdbg(" cmd: %04x\n", meminfo->cmd);
- qspivdbg(" address/length: %08lx/%d\n",
+ qspiinfo("Transfer:\n");
+ qspiinfo(" flags: %02x\n", meminfo->flags);
+ qspiinfo(" cmd: %04x\n", meminfo->cmd);
+ qspiinfo(" address/length: %08lx/%d\n",
(unsigned long)meminfo->addr, meminfo->addrlen);
- qspivdbg(" %s Data:\n", QSPIMEM_ISWRITE(meminfo->flags) ? "Write" : "Read");
- qspivdbg(" buffer/length: %p/%d\n", meminfo->buffer, meminfo->buflen);
+ qspiinfo(" %s Data:\n", QSPIMEM_ISWRITE(meminfo->flags) ? "Write" : "Read");
+ qspiinfo(" buffer/length: %p/%d\n", meminfo->buffer, meminfo->buflen);
#ifdef CONFIG_SAMV7_QSPI_DMA
/* Can we perform DMA? Should we perform DMA? */
@@ -1746,7 +1735,7 @@ struct qspi_dev_s *sam_qspi_initialize(int intf)
/* The supported SAM parts have only a single QSPI port */
- qspivdbg("intf: %d\n", intf);
+ qspiinfo("intf: %d\n", intf);
DEBUGASSERT(intf >= 0 && intf < SAMV7_NQSPI);
/* Select the QSPI interface */
@@ -1778,7 +1767,7 @@ struct qspi_dev_s *sam_qspi_initialize(int intf)
else
#endif
{
- qspidbg("ERROR: QSPI%d not supported\n", intf);
+ qspierr("ERROR: QSPI%d not supported\n", intf);
return NULL;
}
@@ -1801,7 +1790,7 @@ struct qspi_dev_s *sam_qspi_initialize(int intf)
priv->dmach = sam_dmachannel(0, 0);
if (!priv->dmach)
{
- qspidbg("ERROR: Failed to allocate the DMA channel\n");
+ qspierr("ERROR: Failed to allocate the DMA channel\n");
priv->candma = false;
}
}
@@ -1817,7 +1806,7 @@ struct qspi_dev_s *sam_qspi_initialize(int intf)
priv->dmadog = wd_create();
if (priv->dmadog == NULL)
{
- qspidbg("ERROR: Failed to create wdog\n");
+ qspierr("ERROR: Failed to create wdog\n");
goto errout_with_dmahandles;
}
#endif
@@ -1828,7 +1817,7 @@ struct qspi_dev_s *sam_qspi_initialize(int intf)
ret = irq_attach(priv->irq, priv->handler);
if (ret < 0)
{
- qspidbg("ERROR: Failed to attach irq %d\n", priv->irq);
+ qspierr("ERROR: Failed to attach irq %d\n", priv->irq);
goto errout_with_dmadog;
}
#endif
@@ -1840,7 +1829,7 @@ struct qspi_dev_s *sam_qspi_initialize(int intf)
ret = qspi_hw_initialize(priv);
if (ret < 0)
{
- qspidbg("ERROR: Failed to initialize QSPI hardware\n");
+ qspierr("ERROR: Failed to initialize QSPI hardware\n");
goto errout_with_irq;
}
diff --git a/arch/arm/src/samv7/sam_rswdt.c b/arch/arm/src/samv7/sam_rswdt.c
index 20ea3c2183402877cfabd7f1d8c22ebeb0481381..a176d22d9cae41c370f68d9ed3ad9dfd751c176c 100644
--- a/arch/arm/src/samv7/sam_rswdt.c
+++ b/arch/arm/src/samv7/sam_rswdt.c
@@ -82,16 +82,16 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the watchdog
- * driver. NOTE: that only lldbg types are used so that the output is
+ * driver. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_WATCHDOG
-# define wddbg lldbg
-# define wdvdbg llvdbg
+# define wderr llerr
+# define wdinfo llinfo
#else
-# define wddbg(x...)
-# define wdvdbg(x...)
+# define wderr(x...)
+# define wdinfo(x...)
#endif
/****************************************************************************
@@ -118,7 +118,7 @@ struct sam_lowerhalf_s
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_SAMV7_RSWDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMV7_RSWDT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t sam_getreg(uintptr_t regaddr);
static void sam_putreg(uint32_t regval, uintptr_t regaddr);
#else
@@ -178,7 +178,7 @@ static struct sam_lowerhalf_s g_wdtdev;
*
****************************************************************************/
-#if defined(CONFIG_SAMV7_RSWDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMV7_RSWDT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t sam_getreg(uintptr_t regaddr)
{
static uint32_t prevaddr = 0;
@@ -199,7 +199,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return regval;
@@ -216,7 +216,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -228,7 +228,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
/* Show the register value read */
- lldbg("%08x->%048\n", regaddr, regval);
+ llerr("%08x->%048\n", regaddr, regval);
return regval;
}
#endif
@@ -241,12 +241,12 @@ static uint32_t sam_getreg(uintptr_t regaddr)
*
****************************************************************************/
-#if defined(CONFIG_SAMV7_RSWDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMV7_RSWDT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void sam_putreg(uint32_t regval, uintptr_t regaddr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
/* Write the value */
@@ -315,7 +315,7 @@ static int sam_start(FAR struct watchdog_lowerhalf_s *lower)
* timer with the newly programmed mode parameters.
*/
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
return priv->started ? OK : -ENOSYS;
}
@@ -343,7 +343,7 @@ static int sam_stop(FAR struct watchdog_lowerhalf_s *lower)
* timer with the newly programmed mode parameters.
*/
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
return -ENOSYS;
}
@@ -366,7 +366,7 @@ static int sam_stop(FAR struct watchdog_lowerhalf_s *lower)
static int sam_keepalive(FAR struct watchdog_lowerhalf_s *lower)
{
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
/* Write RSWDT_CR_WDRSTT to the RSWDT CR regiser (along with the KEY value)
* will restart the watchdog timer.
@@ -397,7 +397,7 @@ static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower,
{
FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower;
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
DEBUGASSERT(priv);
/* Return the status bit */
@@ -426,10 +426,10 @@ static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower,
status->timeleft = 0;
- wdvdbg("Status :\n");
- wdvdbg(" flags : %08x\n", status->flags);
- wdvdbg(" timeout : %d\n", status->timeout);
- wdvdbg(" timeleft : %d\n", status->timeleft);
+ wdinfo("Status :\n");
+ wdinfo(" flags : %08x\n", status->flags);
+ wdinfo(" timeout : %d\n", status->timeout);
+ wdinfo(" timeleft : %d\n", status->timeleft);
return OK;
}
@@ -457,13 +457,13 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
uint32_t regval;
DEBUGASSERT(priv);
- wdvdbg("Entry: timeout=%d\n", timeout);
+ wdinfo("Entry: timeout=%d\n", timeout);
/* Can this timeout be represented? */
if (timeout < RSWDT_MINTIMEOUT || timeout >= RSWDT_MAXTIMEOUT)
{
- wddbg("Cannot represent timeout: %d < %d > %d\n",
+ wderr("Cannot represent timeout: %d < %d > %d\n",
RSWDT_MINTIMEOUT, timeout, RSWDT_MAXTIMEOUT);
return -ERANGE;
}
@@ -496,7 +496,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
priv->reload = reload;
- wdvdbg("reload=%d timout: %d->%d\n",
+ wdinfo("reload=%d timout: %d->%d\n",
reload, timeout, priv->timeout);
/* Set the RSWDT_MR according to calculated value
@@ -541,7 +541,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
priv->started = true;
- wdvdbg("Setup: CR: %08x MR: %08x SR: %08x\n",
+ wdinfo("Setup: CR: %08x MR: %08x SR: %08x\n",
sam_getreg(SAM_RSWDT_CR), sam_getreg(SAM_RSWDT_MR),
sam_getreg(SAM_RSWDT_SR));
@@ -574,7 +574,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
xcpt_t handler)
{
#ifndef CONFIG_SAMV7_RSWDT_INTERRUPT
- wddbg("ERROR: Not configured for this mode\n");
+ wderr("ERROR: Not configured for this mode\n");
return NULL;
#else
FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower;
@@ -582,7 +582,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
xcpt_t oldhandler;
DEBUGASSERT(priv);
- wdvdbg("Entry: handler=%p\n", handler);
+ wdinfo("Entry: handler=%p\n", handler);
/* Get the old handler return value */
@@ -636,7 +636,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
unsigned long arg)
{
- wdvdbg("cmd=%d arg=%ld\n", cmd, arg);
+ wdinfo("cmd=%d arg=%ld\n", cmd, arg);
/* No ioctls are supported */
@@ -667,7 +667,7 @@ int sam_rswdt_initialize(void)
{
FAR struct sam_lowerhalf_s *priv = &g_wdtdev;
- wdvdbg("Entry: CR: %08x MR: %08x SR: %08x\n",
+ wdinfo("Entry: CR: %08x MR: %08x SR: %08x\n",
sam_getreg(SAM_RSWDT_CR), sam_getreg(SAM_RSWDT_MR),
sam_getreg(SAM_RSWDT_SR));
diff --git a/arch/arm/src/samv7/sam_spi.c b/arch/arm/src/samv7/sam_spi.c
index 0d9f1ec32a114158e17c99b619a4323b251d4b2f..10ed7dd6aa01e6cbb4dd68829d8dab8c63372ffd 100644
--- a/arch/arm/src/samv7/sam_spi.c
+++ b/arch/arm/src/samv7/sam_spi.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/samv7/sam_spi.c
*
- * Copyright (C) 2015=2016 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt
* Diego Sanchez
*
@@ -120,31 +120,20 @@
#define DMA_TIMEOUT_TICKS MSEC2TICK(DMA_TIMEOUT_MS)
/* Debug *******************************************************************/
-/* Check if SPI debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_SPI
-# undef CONFIG_SAMV7_SPI_DMADEBUG
-# undef CONFIG_SAMV7_SPI_REGDEBUG
-#endif
+/* Check if SPI debug is enabled */
#ifndef CONFIG_DEBUG_DMA
# undef CONFIG_SAMV7_SPI_DMADEBUG
#endif
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
#define DMA_INITIAL 0
@@ -205,6 +194,7 @@ struct sam_spidev_s
sem_t spisem; /* Assures mutually exclusive access to SPI */
select_t select; /* SPI select call-out */
bool initialized; /* TRUE: Controller has been initialized */
+ bool escape_lastxfer; /* Dont set LASTXFER-Bit in the next transfer */
#ifdef CONFIG_SAMV7_SPI_DMA
uint8_t pid; /* SPI peripheral ID */
#endif
@@ -238,7 +228,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
unsigned int offset);
static inline struct sam_spidev_s *spi_device(struct sam_spics_s *spics);
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg);
#else
# define spi_dumpregs(spi,msg)
@@ -277,6 +267,12 @@ static int spi_lock(struct spi_dev_s *dev, bool lock);
static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
bool selected);
static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency);
+#ifdef CONFIG_SPI_CS_DELAY_CONTROL
+static int spi_setdelay(struct spi_dev_s *dev, uint32_t a, uint32_t b, uint32_t c);
+#endif
+#ifdef CONFIG_SPI_HWFEATURES
+static int spi_hwfeatures(struct spi_dev_s *dev, uint8_t features);
+#endif
static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode);
static void spi_setbits(struct spi_dev_s *dev, int nbits);
static uint16_t spi_send(struct spi_dev_s *dev, uint16_t ch);
@@ -324,10 +320,13 @@ static const struct spi_ops_s g_spi0ops =
.lock = spi_lock,
.select = spi_select,
.setfrequency = spi_setfrequency,
+#ifdef CONFIG_SPI_CS_DELAY_CONTROL
+ .setdelay = spi_setdelay,
+#endif
.setmode = spi_setmode,
.setbits = spi_setbits,
#ifdef CONFIG_SPI_HWFEATURES
- .hwfeatures = 0, /* Not supported */
+ .hwfeatures = spi_hwfeatures,
#endif
.status = sam_spi0status,
#ifdef CONFIG_SPI_CMDDATA
@@ -363,6 +362,9 @@ static const struct spi_ops_s g_spi1ops =
.lock = spi_lock,
.select = spi_select,
.setfrequency = spi_setfrequency,
+#ifdef CONFIG_SPI_CS_DELAY_CONTROL
+ .setdelay = spi_setdelay,
+#endif
.setmode = spi_setmode,
.setbits = spi_setbits,
.status = sam_spi1status,
@@ -436,7 +438,7 @@ static bool spi_checkreg(struct sam_spidev_s *spi, bool wr, uint32_t value,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", spi->ntimes);
+ llerr("...[Repeats %d times]...\n", spi->ntimes);
}
/* Save information about the new access */
@@ -470,7 +472,7 @@ static inline uint32_t spi_getreg(struct sam_spidev_s *spi,
#ifdef CONFIG_SAMV7_SPI_REGDEBUG
if (spi_checkreg(spi, false, value, address))
{
- lldbg("%08x->%08x\n", address, value);
+ llerr("%08x->%08x\n", address, value);
}
#endif
@@ -493,7 +495,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
#ifdef CONFIG_SAMV7_SPI_REGDEBUG
if (spi_checkreg(spi, true, value, address))
{
- lldbg("%08x<-%08x\n", address, value);
+ llerr("%08x<-%08x\n", address, value);
}
#endif
@@ -515,20 +517,20 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg)
{
- spivdbg("%s:\n", msg);
- spivdbg(" MR:%08x SR:%08x IMR:%08x\n",
+ spiinfo("%s:\n", msg);
+ spiinfo(" MR:%08x SR:%08x IMR:%08x\n",
getreg32(spi->base + SAM_SPI_MR_OFFSET),
getreg32(spi->base + SAM_SPI_SR_OFFSET),
getreg32(spi->base + SAM_SPI_IMR_OFFSET));
- spivdbg(" CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
+ spiinfo(" CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
getreg32(spi->base + SAM_SPI_CSR0_OFFSET),
getreg32(spi->base + SAM_SPI_CSR1_OFFSET),
getreg32(spi->base + SAM_SPI_CSR2_OFFSET),
getreg32(spi->base + SAM_SPI_CSR3_OFFSET));
- spivdbg(" WPCR:%08x WPSR:%08x\n",
+ spiinfo(" WPCR:%08x WPSR:%08x\n",
getreg32(spi->base + SAM_SPI_WPCR_OFFSET),
getreg32(spi->base + SAM_SPI_WPSR_OFFSET));
}
@@ -903,7 +905,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
struct sam_spics_s *spics = (struct sam_spics_s *)dev;
struct sam_spidev_s *spi = spi_device(spics);
- spivdbg("lock=%d\n", lock);
+ spiinfo("lock=%d\n", lock);
if (lock)
{
/* Take the semaphore (perhaps waiting) */
@@ -951,10 +953,10 @@ static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
/* Are we selecting or de-selecting the device? */
- spivdbg("selected=%d\n", selected);
+ spiinfo("selected=%d\n", selected);
if (selected)
{
- spivdbg("cs=%d\n", spics->cs);
+ spiinfo("cs=%d\n", spics->cs);
/* Before writing the TDR, the PCS field in the SPI_MR register must be set
* in order to select a slave.
@@ -962,7 +964,18 @@ static void spi_select(struct spi_dev_s *dev, enum spi_dev_e devid,
regval = spi_getreg(spi, SAM_SPI_MR_OFFSET);
regval &= ~SPI_MR_PCS_MASK;
+
+ /* SPI_VARSELECT means, that the ChipSelect for each device is set within
+ * the transferred data (SAM_SPI_TDR) instead inside the mode register
+ * (SAM_SPI_MR).
+ * In addition, the LASTXFER flag is also set within the transferred data
+ * (SAM_SPI_TDR) instead inside the control register (SAM_SPI_CR).
+ * (see spi_exchange)
+ */
+
+#ifndef CONFIG_SAMV7_SPI_VARSELECT
regval |= (spi_cs2pcs(spics) << SPI_MR_PCS_SHIFT);
+#endif
spi_putreg(spi, regval, SAM_SPI_MR_OFFSET);
}
@@ -1009,7 +1022,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
uint32_t regval;
unsigned int offset;
- spivdbg("cs=%d frequency=%d\n", spics->cs, frequency);
+ spiinfo("cs=%d frequency=%d\n", spics->cs, frequency);
/* Check if the requested frequency is the same as the frequency selection */
@@ -1027,9 +1040,9 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
scbr = SAM_SPI_CLOCK / frequency;
- if (scbr < 8)
+ if (scbr < 2)
{
- scbr = 8;
+ scbr = 2;
}
else if (scbr > 254)
{
@@ -1079,17 +1092,200 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
/* Calculate the new actual frequency */
actual = SAM_SPI_CLOCK / scbr;
- spivdbg("csr[offset=%02x]=%08x actual=%d\n", offset, regval, actual);
+ spiinfo("csr[offset=%02x]=%08x actual=%d\n", offset, regval, actual);
/* Save the frequency setting */
spics->frequency = frequency;
spics->actual = actual;
- spidbg("Frequency %d->%d\n", frequency, actual);
+ spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
+/****************************************************************************
+ * Name: spi_setdelay
+ *
+ * Description:
+ * Set the SPI Delays in nanoseconds. Optional.
+ *
+ * Input Parameters:
+ * dev - Device-specific state data
+ * startdelay - The delay between CS active and first CLK
+ * stopdelay - The delay between last CLK and CS inactive
+ * csdelay - The delay between CS inactive and CS active again
+ *
+ * Returned Value:
+ * Returns 0 if ok
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_CS_DELAY_CONTROL
+static int spi_setdelay(struct spi_dev_s *dev, uint32_t startdelay,
+ uint32_t stopdelay, uint32_t csdelay)
+{
+ struct sam_spics_s *spics = (struct sam_spics_s *)dev;
+ struct sam_spidev_s *spi = spi_device(spics);
+ uint64_t dlybs;
+ uint64_t dlybct;
+ uint64_t dlybcs;
+ uint32_t regval;
+ unsigned int offset;
+
+ spivdbg("cs=%d startdelay=%d\n", spics->cs, startdelay);
+ spivdbg("cs=%d stopdelay=%d\n", spics->cs, stopdelay);
+ spivdbg("cs=%d csdelay=%d\n", spics->cs, csdelay);
+
+ offset = (unsigned int)g_csroffset[spics->cs];
+
+ /* startdelay = DLYBS: Delay Before SPCK.
+ * This field defines the delay from NPCS valid to the first valid SPCK
+ * transition. When DLYBS equals zero, the NPCS valid to SPCK transition is
+ * 1/2 the SPCK clock period.
+ * Otherwise, the following equations determine the delay:
+ *
+ * Delay Before SPCK = DLYBS / SPI_CLK
+ *
+ * For a 2uS delay
+ *
+ * DLYBS = SPI_CLK * 0.000002 = SPI_CLK / 500000
+ *
+ * TODO: Check for boundaries!
+ */
+
+ dlybs = SAM_SPI_CLOCK;
+ dlybs *= startdelay;
+ dlybs /= 1000000000;
+ regval = spi_getreg(spi, offset);
+ regval &= ~SPI_CSR_DLYBS_MASK;
+ regval |= (uint32_t) dlybs << SPI_CSR_DLYBS_SHIFT;
+
+ /* stopdelay = DLYBCT: Delay Between Consecutive Transfers.
+ * This field defines the delay between two consecutive transfers with the
+ * same peripheral without removing the chip select. The delay is always
+ * inserted after each transfer and before removing the chip select if
+ * needed.
+ *
+ * Delay Between Consecutive Transfers = (32 x DLYBCT) / SPI_CLK
+ *
+ * For a 5uS delay:
+ *
+ * DLYBCT = SPI_CLK * 0.000005 / 32 = SPI_CLK / 200000 / 32
+ */
+
+ dlybct = SAM_SPI_CLOCK;
+ dlybct *= stopdelay;
+ dlybct /= 1000000000;
+ dlybct /= 32;
+ regval = spi_getreg(spi, offset);
+ regval &= ~SPI_CSR_DLYBCT_MASK;
+ regval |= (uint32_t) dlybct << SPI_CSR_DLYBCT_SHIFT;
+ spi_putreg(spi, regval, offset);
+
+ /* csdelay = DLYBCS: Delay Between Chip Selects.
+ * This field defines the delay between the inactivation and the activation
+ * of NPCS. The DLYBCS time guarantees non-overlapping chip selects and
+ * solves bus contentions in case of peripherals having long data float
+ * times. If DLYBCS is lower than 6, six peripheral clock periods are
+ * inserted by default.
+ *
+ * Delay Between Chip Selects = DLYBCS / SPI_CLK
+ *
+ * DLYBCS = SPI_CLK * Delay
+ */
+ dlybcs = SAM_SPI_CLOCK;
+ dlybcs *= csdelay;
+ dlybcs /= 1000000000;
+ regval = spi_getreg(spi, SAM_SPI_MR_OFFSET);
+ regval &= ~SPI_MR_DLYBCS_MASK;
+ regval |= dlybcs << SPI_MR_DLYBCS_SHIFT;
+ spi_putreg(spi, regval, SAM_SPI_MR_OFFSET);
+
+ return 0;
+}
+#endif
+
+/****************************************************************************
+ * Name: spi_hwfeatures
+ *
+ * Description:
+ * Use some super-special hardware Features. Optional.
+ *
+ * Input Parameters:
+ * dev - Device-specific state data
+ * features - Bitmask of the activated features
+ *
+ * Returned Value:
+ * Returns 0 if ok
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_HWFEATURES
+static int spi_hwfeatures(struct spi_dev_s *dev, uint8_t features)
+{
+ struct sam_spics_s *spics = (struct sam_spics_s *)dev;
+ struct sam_spidev_s *spi = spi_device(spics);
+ uint32_t regval;
+ unsigned int offset;
+
+ /* CS rises after every Transmission, also if we provide new data
+ * immediately.
+ */
+
+ if (features & HWFEAT_FORCE_CS_INACTIVE_AFTER_TRANSFER)
+ {
+ offset = (unsigned int)g_csroffset[spics->cs];
+ regval = spi_getreg(spi, offset);
+ regval |= SPI_CSR_CSNAAT; /* Chip Select Not Active After Transfer */
+ regval &= ~SPI_CSR_CSAAT; /* Chip Select Active After Transfer */
+ spi_putreg(spi, regval, offset);
+ }
+ else
+ {
+ offset = (unsigned int)g_csroffset[spics->cs];
+ regval = spi_getreg(spi, offset);
+ regval &= ~SPI_CSR_CSNAAT; /* Chip Select Not Active After Transfer */
+ spi_putreg(spi, regval, offset);
+ }
+
+ /* CS does not rise automatically after a transmission, also if the spi runs
+ * out of data (for a long time)
+ */
+
+ if ((features & HWFEAT_FORCE_CS_ACTIVE_AFTER_TRANSFER) != 0)
+ {
+ offset = (unsigned int)g_csroffset[spics->cs];
+ regval = spi_getreg(spi, offset);
+ regval &= ~SPI_CSR_CSNAAT; /* Chip Select Not Active After Transfer */
+ regval |= SPI_CSR_CSAAT; /* Chip Select Active After Transfer */
+ spi_putreg(spi, regval, offset);
+ }
+ else
+ {
+ offset = (unsigned int)g_csroffset[spics->cs];
+ regval = spi_getreg(spi, offset);
+ regval &= ~SPI_CSR_CSAAT; /* Chip Select Not Active After Transfer */
+ spi_putreg(spi, regval, offset);
+ }
+
+ /* Do not set the LASTXFER-Bit at the last word of the next exchange,
+ * Flag is auto-resetting after the next LASTXFER condition.
+ * (see spi_exchange)
+ */
+
+ if ((features & HWFEAT_ESCAPE_LASTXFER) != 0)
+ {
+ spi->escape_lastxfer = true;
+ }
+ else
+ {
+ spi->escape_lastxfer = false;
+ }
+
+ return 0;
+}
+#endif
+
/****************************************************************************
* Name: spi_setmode
*
@@ -1112,7 +1308,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
uint32_t regval;
unsigned int offset;
- spivdbg("cs=%d mode=%d\n", spics->cs, mode);
+ spiinfo("cs=%d mode=%d\n", spics->cs, mode);
/* Has the mode changed? */
@@ -1155,7 +1351,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
}
spi_putreg(spi, regval, offset);
- spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+ spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
/* Save the mode so that subsequent re-configurations will be faster */
@@ -1185,7 +1381,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
uint32_t regval;
unsigned int offset;
- spivdbg("cs=%d nbits=%d\n", spics->cs, nbits);
+ spiinfo("cs=%d nbits=%d\n", spics->cs, nbits);
DEBUGASSERT(spics && nbits > 7 && nbits < 17);
/* Has the number of bits changed? */
@@ -1200,9 +1396,11 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
regval |= SPI_CSR_BITS(nbits);
spi_putreg(spi, regval, offset);
- spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+ spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
- /* Save the selection so the subsequence re-configurations will be faster */
+ /* Save the selection so the subsequence re-configurations will be
+ * faster.
+ */
spics->nbits = nbits;
}
@@ -1238,7 +1436,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd)
rxbyte = (uint8_t)0;
spi_exchange(dev, &txbyte, &rxbyte, 1);
- spivdbg("Sent %02x received %02x\n", txbyte, rxbyte);
+ spiinfo("Sent %02x received %02x\n", txbyte, rxbyte);
return (uint16_t)rxbyte;
}
@@ -1286,7 +1484,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
uint8_t *rxptr8;
uint8_t *txptr8;
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
/* Set up PCS bits */
@@ -1358,16 +1556,37 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
data = 0xffff;
}
+ /* SPI_VARSELECT means, that the ChipSelect for each device is set within
+ * the transferred data (SAM_SPI_TDR) instead inside the mode register
+ * (SAM_SPI_MR).
+ * In addition, the LASTXFER flag is also set within the transferred data
+ * (SAM_SPI_TDR) instead inside the control register (SAM_SPI_CR).
+ */
+
+#ifdef CONFIG_SAMV7_SPI_VARSELECT
/* Set the PCS field in the value written to the TDR */
data |= pcs;
/* Do we need to set the LASTXFER bit in the TDR value too? */
-#ifdef CONFIG_SPI_VARSELECT
if (nwords == 1)
{
- data |= SPI_TDR_LASTXFER;
+ if (spi->escape_lastxfer == false)
+ {
+ /* According the data sheet (SAME70 Rev. 2016-01) this LASTXFER
+ * bit has no effect without also setting CSAAT.
+ * (see HWFEAT_FORCE_CS_ACTIVE_AFTER_TRANSFER)
+ */
+
+ data |= SPI_TDR_LASTXFER;
+ }
+ else
+ {
+ /* the escaping should only prevent ONE last-xfer */
+
+ spi->escape_lastxfer = false;
+ }
}
#endif
@@ -1381,6 +1600,32 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
spi_putreg(spi, data, SAM_SPI_TDR_OFFSET);
+#ifndef CONFIG_SAMV7_SPI_VARSELECT
+ /* To de-assert the chip select line at the end of the transfer, the
+ * Last Transfer (LASTXFER) bit in SPI_CR must be set after writing the
+ * last data to transmit into SPI_TDR.
+ */
+
+ if (nwords == 1)
+ {
+ if (spi->escape_lastxfer == false)
+ {
+ /* According the datasheet (SAME70 Rev. 2016-01) this LASTXFER
+ * bit has no effect without also setting CSAAT.
+ * (see HWFEAT_FORCE_CS_ACTIVE_AFTER_TRANSFER)
+ */
+
+ spi_putreg(spi, SPI_CR_LASTXFER, SAM_SPI_CR_OFFSET);
+ }
+ else
+ {
+ /* the escaping should only prevent ONE last-xfer */
+
+ spi->escape_lastxfer = false;
+ }
+ }
+#endif
+
/* Wait for the read data to be available in the RDR.
* TODO: Data transfer rates would be improved using the RX FIFO
* (and also DMA)
@@ -1432,7 +1677,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
return;
}
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
spics = (struct sam_spics_s *)dev;
spi = spi_device(spics);
@@ -1549,7 +1794,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = sam_dmarxsetup(spics->rxdma, regaddr, memaddr, nwords);
if (ret < 0)
{
- dmadbg("ERROR: sam_dmarxsetup failed: %d\n", ret);
+ dmaerr("ERROR: sam_dmarxsetup failed: %d\n", ret);
return;
}
@@ -1563,7 +1808,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = sam_dmatxsetup(spics->txdma, regaddr, memaddr, nwords);
if (ret < 0)
{
- dmadbg("ERROR: sam_dmatxsetup failed: %d\n", ret);
+ dmaerr("ERROR: sam_dmatxsetup failed: %d\n", ret);
return;
}
@@ -1575,7 +1820,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = sam_dmastart(spics->rxdma, spi_rxcallback, (void *)spics);
if (ret < 0)
{
- dmadbg("ERROR: RX sam_dmastart failed: %d\n", ret);
+ dmaerr("ERROR: RX sam_dmastart failed: %d\n", ret);
return;
}
@@ -1584,7 +1829,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = sam_dmastart(spics->txdma, spi_txcallback, (void *)spics);
if (ret < 0)
{
- dmadbg("ERROR: RX sam_dmastart failed: %d\n", ret);
+ dmaerr("ERROR: RX sam_dmastart failed: %d\n", ret);
sam_dmastop(spics->rxdma);
return;
}
@@ -1606,7 +1851,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
(wdentry_t)spi_dmatimeout, 1, (uint32_t)spics);
if (ret != OK)
{
- spidbg("ERROR: wd_start failed: %d\n", ret);
+ spierr("ERROR: wd_start failed: %d\n", ret);
}
/* Wait for the DMA complete */
@@ -1657,7 +1902,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
if (spics->result)
{
- spidbg("ERROR: DMA failed with result: %d\n", spics->result);
+ spierr("ERROR: DMA failed with result: %d\n", spics->result);
}
}
#endif /* CONFIG_SAMV7_SPI_DMA */
@@ -1751,7 +1996,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
/* The support SAM parts have only a single SPI port */
- spivdbg("port: %d csno: %d spino: %d\n", port, csno, spino);
+ spiinfo("port: %d csno: %d spino: %d\n", port, csno, spino);
DEBUGASSERT(csno >= 0 && csno <= SAM_SPI_NCS);
#if defined(CONFIG_SAMV7_SPI0_MASTER) && defined(CONFIG_SAMV7_SPI1_MASTER)
@@ -1770,7 +2015,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
spics = (struct sam_spics_s *)zalloc(sizeof(struct sam_spics_s));
if (!spics)
{
- spidbg("ERROR: Failed to allocate a chip select structure\n");
+ spierr("ERROR: Failed to allocate a chip select structure\n");
return NULL;
}
@@ -1790,7 +2035,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
spics->rxdma = sam_dmachannel(0, 0);
if (!spics->rxdma)
{
- spidbg("ERROR: Failed to allocate the RX DMA channel\n");
+ spierr("ERROR: Failed to allocate the RX DMA channel\n");
spics->candma = false;
}
}
@@ -1800,7 +2045,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
spics->txdma = sam_dmachannel(0, 0);
if (!spics->txdma)
{
- spidbg("ERROR: Failed to allocate the TX DMA channel\n");
+ spierr("ERROR: Failed to allocate the TX DMA channel\n");
sam_dmafree(spics->rxdma);
spics->rxdma = NULL;
spics->candma = false;
@@ -1881,15 +2126,22 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
/* Configure the SPI mode register */
+ regval = SPI_MR_MSTR | SPI_MR_MODFDIS;
+
#if defined(CONFIG_SAMV7_SPI_CS_DECODING)
/* Enable Peripheral Chip Select Decoding? */
- spi_putreg(spi, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PCSDEC,
- SAM_SPI_MR_OFFSET);
-#else
- spi_putreg(spi, SPI_MR_MSTR | SPI_MR_MODFDIS, SAM_SPI_MR_OFFSET);
+ regval |= SPI_MR_PCSDEC;
#endif
+# ifdef CONFIG_SAMV7_SPI_VARSELECT
+ /* Enable Variable Peripheral Selection? */
+
+ regval |= SPI_MR_PS;
+#endif
+
+ spi_putreg(spi, regval, SAM_SPI_MR_OFFSET);
+
/* And enable the SPI */
spi_putreg(spi, SPI_CR_SPIEN, SAM_SPI_CR_OFFSET);
@@ -1905,6 +2157,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
*/
sem_init(&spi->spisem, 0, 1);
+ spi->escape_lastxfer = false;
spi->initialized = true;
#ifdef CONFIG_SAMV7_SPI_DMA
@@ -1934,7 +2187,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
spi_putreg(spi, regval, offset);
spics->nbits = 8;
- spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+ spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
return &spics->spidev;
}
diff --git a/arch/arm/src/samv7/sam_spi_slave.c b/arch/arm/src/samv7/sam_spi_slave.c
index a210541ce695f19126de993a8660928f42752629..fe8d1f6f4b06595a647763604a151758bce8942c 100644
--- a/arch/arm/src/samv7/sam_spi_slave.c
+++ b/arch/arm/src/samv7/sam_spi_slave.c
@@ -75,25 +75,16 @@
#endif
/* Debug *******************************************************************/
-/* Check if SPI debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_SPI
-#endif
+/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
/****************************************************************************
@@ -153,7 +144,7 @@ static uint32_t spi_getreg(struct sam_spidev_s *priv,
static void spi_putreg(struct sam_spidev_s *priv, uint32_t value,
unsigned int offset);
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void spi_dumpregs(struct sam_spidev_s *priv, const char *msg);
#else
# define spi_dumpregs(priv,msg)
@@ -270,7 +261,7 @@ static bool spi_checkreg(struct sam_spidev_s *priv, bool wr, uint32_t value,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -303,7 +294,7 @@ static uint32_t spi_getreg(struct sam_spidev_s *priv, unsigned int offset)
#ifdef CONFIG_SAMV7_SPI_REGDEBUG
if (spi_checkreg(priv, false, value, address))
{
- lldbg("%08x->%08x\n", address, value);
+ llerr("%08x->%08x\n", address, value);
}
#endif
@@ -326,7 +317,7 @@ static void spi_putreg(struct sam_spidev_s *priv, uint32_t value,
#ifdef CONFIG_SAMV7_SPI_REGDEBUG
if (spi_checkreg(priv, true, value, address))
{
- lldbg("%08x<-%08x\n", address, value);
+ llerr("%08x<-%08x\n", address, value);
}
#endif
@@ -348,20 +339,20 @@ static void spi_putreg(struct sam_spidev_s *priv, uint32_t value,
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void spi_dumpregs(struct sam_spidev_s *priv, const char *msg)
{
- spivdbg("%s:\n", msg);
- spivdbg(" MR:%08x SR:%08x IMR:%08x\n",
+ spiinfo("%s:\n", msg);
+ spiinfo(" MR:%08x SR:%08x IMR:%08x\n",
getreg32(priv->base + SAM_SPI_MR_OFFSET),
getreg32(priv->base + SAM_SPI_SR_OFFSET),
getreg32(priv->base + SAM_SPI_IMR_OFFSET));
- spivdbg(" CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
+ spiinfo(" CSR0:%08x CSR1:%08x CSR2:%08x CSR3:%08x\n",
getreg32(priv->base + SAM_SPI_CSR0_OFFSET),
getreg32(priv->base + SAM_SPI_CSR1_OFFSET),
getreg32(priv->base + SAM_SPI_CSR2_OFFSET),
getreg32(priv->base + SAM_SPI_CSR3_OFFSET));
- spivdbg(" WPCR:%08x WPSR:%08x\n",
+ spiinfo(" WPCR:%08x WPSR:%08x\n",
getreg32(priv->base + SAM_SPI_WPCR_OFFSET),
getreg32(priv->base + SAM_SPI_WPSR_OFFSET));
}
@@ -464,7 +455,7 @@ static int spi_interrupt(struct sam_spidev_s *priv)
{
/* If debug is enabled, report any overrun errors */
- spidbg("Error: Overrun (OVRES): %08x\n", pending);
+ spierr("Error: Overrun (OVRES): %08x\n", pending);
/* OVRES was cleared by the status read. */
}
@@ -531,7 +522,7 @@ static int spi_interrupt(struct sam_spidev_s *priv)
{
/* If debug is enabled, report any overrun errors */
- spidbg("Error: Underrun (UNDEX): %08x\n", pending);
+ spierr("Error: Underrun (UNDEX): %08x\n", pending);
/* UNDES was cleared by the status read. */
}
@@ -699,7 +690,7 @@ static void spi_setmode(struct sam_spidev_s *priv, enum spi_smode_e mode)
{
uint32_t regval;
- spivdbg("mode=%d\n", mode);
+ spiinfo("mode=%d\n", mode);
/* Has the mode changed? */
@@ -741,7 +732,7 @@ static void spi_setmode(struct sam_spidev_s *priv, enum spi_smode_e mode)
}
spi_putreg(priv, regval, SAM_SPI_CSR0_OFFSET);
- spivdbg("csr0=%08x\n", regval);
+ spiinfo("csr0=%08x\n", regval);
/* Save the mode so that subsequent re-configurations will be faster */
@@ -768,7 +759,7 @@ static void spi_setbits(struct sam_spidev_s *priv, int nbits)
{
uint32_t regval;
- spivdbg("nbits=%d\n", nbits);
+ spiinfo("nbits=%d\n", nbits);
DEBUGASSERT(priv && nbits > 7 && nbits < 17);
/* Has the number of bits changed? */
@@ -782,7 +773,7 @@ static void spi_setbits(struct sam_spidev_s *priv, int nbits)
regval |= SPI_CSR_BITS(nbits);
spi_putreg(priv, regval, SAM_SPI_CSR0_OFFSET);
- spivdbg("csr0=%08x\n", regval);
+ spiinfo("csr0=%08x\n", regval);
/* Save the selection so the subsequence re-configurations will be faster */
@@ -819,7 +810,7 @@ static void spi_bind(struct spi_sctrlr_s *sctrlr,
struct sam_spidev_s *priv = (struct sam_spidev_s *)sctrlr;
uint32_t regval;
- spivdbg("sdev=%p mode=%d nbits=%d\n", sdv, mode, nbits);
+ spiinfo("sdev=%p mode=%d nbits=%d\n", sdv, mode, nbits);
DEBUGASSERT(priv != NULL && priv->sdev == NULL && sdev != NULL);
@@ -921,7 +912,7 @@ static void spi_unbind(struct spi_sctrlr_s *sctrlr)
struct sam_spidev_s *priv = (struct sam_spidev_s *)sctrlr;
DEBUGASSERT(priv != NULL);
- spivdbg("Unbinding %p\n", priv->sdev);
+ spiinfo("Unbinding %p\n", priv->sdev);
DEBUGASSERT(priv->sdev != NULL);
@@ -978,7 +969,7 @@ static int spi_enqueue(struct spi_sctrlr_s *sctrlr, uint16_t data)
int next;
int ret;
- spivdbg("data=%04x\n", data);
+ spiinfo("data=%04x\n", data);
DEBUGASSERT(priv != NULL && priv->sdev != NULL);
/* Get exclusive access to the SPI device */
@@ -1095,7 +1086,7 @@ static void spi_qflush(struct spi_sctrlr_s *sctrlr)
struct sam_spidev_s *priv = (struct sam_spidev_s *)sctrlr;
irqstate_t flags;
- spivdbg("data=%04x\n", data);
+ spiinfo("data=%04x\n", data);
DEBUGASSERT(priv != NULL && priv->sdev != NULL);
@@ -1140,7 +1131,7 @@ struct spi_sctrlr_s *sam_spi_slave_initialize(int port)
/* The support SAM parts have only a single SPI port */
- spivdbg("port: %d spino: %d\n", port, spino);
+ spiinfo("port: %d spino: %d\n", port, spino);
#if defined(CONFIG_SAMV7_SPI0_SLAVE) && defined(CONFIG_SAMV7_SPI1_SLAVE)
DEBUGASSERT(spino >= 0 && spino <= 1);
@@ -1287,7 +1278,7 @@ struct spi_sctrlr_s *sam_spi_slave_initialize(int port)
spi_putreg(priv, regval, SAM_SPI_CSR0_OFFSET);
priv->nbits = 8;
- spivdbg("csr[offset=%02x]=%08x\n", offset, regval);
+ spiinfo("csr[offset=%02x]=%08x\n", offset, regval);
return &priv->sctrlr;
}
diff --git a/arch/arm/src/samv7/sam_ssc.c b/arch/arm/src/samv7/sam_ssc.c
index 107d120de7a35f462f369aacc0031033b2ad31e4..c8be8e850d8b208ab570135c6887d8269a82f8ab 100644
--- a/arch/arm/src/samv7/sam_ssc.c
+++ b/arch/arm/src/samv7/sam_ssc.c
@@ -366,14 +366,7 @@
#define DMA_TIMEOUT_TICKS MSEC2TICK(DMA_TIMEOUT_MS)
/* Debug *******************************************************************/
-/* Check if SSC debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_I2S
-#endif
+/* Check if SSC debug is enabled */
#ifndef CONFIG_DEBUG_I2S
# undef CONFIG_SAMV7_SSC_DMADEBUG
@@ -387,19 +380,19 @@
#endif
#ifdef CONFIG_DEBUG_I2S
-# define i2sdbg dbg
-# define i2slldbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define i2svdbg dbg
-# define i2sllvdbg lldbg
-# else
-# define i2svdbg(x...)
-# endif
+# define i2serr err
+# define i2sllerr llerr
+# define i2swarn warn
+# define i2sllwarn llwarn
+# define i2sinfo info
+# define i2sllinfo llinfo
#else
-# define i2sdbg(x...)
-# define i2slldbg(x...)
-# define i2svdbg(x...)
-# define i2sllvdbg(x...)
+# define i2serr(x...)
+# define i2sllerr(x...)
+# define i2swarn(x...)
+# define i2sllwarn(x...)
+# define i2sinfo(x...)
+# define i2sllinfo(x...)
#endif
#define DMA_INITIAL 0
@@ -449,7 +442,7 @@ struct sam_ssc_s
uintptr_t base; /* SSC controller register base address */
sem_t exclsem; /* Assures mutually exclusive acess to SSC */
uint8_t datalen; /* Data width (8, 16, or 32) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
uint8_t align; /* Log2 of data width (0, 1, or 3) */
#endif
uint8_t pid; /* Peripheral ID */
@@ -512,7 +505,7 @@ static inline void ssc_putreg(struct sam_ssc_s *priv, unsigned int offset,
static inline uintptr_t ssc_regaddr(struct sam_ssc_s *priv,
unsigned int offset);
-#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_INFO)
static void scc_dump_regs(struct sam_ssc_s *priv, const char *msg);
#else
# define scc_dump_regs(s,m)
@@ -697,7 +690,7 @@ static bool ssc_checkreg(struct sam_ssc_s *priv, bool wr, uint32_t regval,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->count);
+ llerr("...[Repeats %d times]...\n", priv->count);
}
/* Save information about the new access */
@@ -731,7 +724,7 @@ static inline uint32_t ssc_getreg(struct sam_ssc_s *priv,
#ifdef CONFIG_SAMV7_SSC_REGDEBUG
if (ssc_checkreg(priv, false, regval, regaddr))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -754,7 +747,7 @@ static inline void ssc_putreg(struct sam_ssc_s *priv, unsigned int offset,
#ifdef CONFIG_SAMV7_SSC_REGDEBUG
if (ssc_checkreg(priv, true, regval, regaddr))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -789,21 +782,21 @@ static inline uintptr_t ssc_regaddr(struct sam_ssc_s *priv, unsigned int offset)
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_I2S) && defined(CONFIG_DEBUG_INFO)
static void scc_dump_regs(struct sam_ssc_s *priv, const char *msg)
{
- i2svdbg("SSC%d: %s\n", priv->sscno, msg);
- i2svdbg(" CMR:%08x RCMR:%08x RFMR:%08x TCMR:%08x\n",
+ i2sinfo("SSC%d: %s\n", priv->sscno, msg);
+ i2sinfo(" CMR:%08x RCMR:%08x RFMR:%08x TCMR:%08x\n",
getreg32(priv->base + SAM_SSC_CMR_OFFSET),
getreg32(priv->base + SAM_SSC_RCMR_OFFSET),
getreg32(priv->base + SAM_SSC_RFMR_OFFSET),
getreg32(priv->base + SAM_SSC_TCMR_OFFSET));
- i2svdbg(" TFMR:%08x RC0R:%08x RC1R:%08x SR:%08x\n",
+ i2sinfo(" TFMR:%08x RC0R:%08x RC1R:%08x SR:%08x\n",
getreg32(priv->base + SAM_SSC_TFMR_OFFSET),
getreg32(priv->base + SAM_SSC_RC0R_OFFSET),
getreg32(priv->base + SAM_SSC_RC1R_OFFSET),
getreg32(priv->base + SAM_SSC_SR_OFFSET));
- i2svdbg(" IMR:%08x WPMR:%08x WPSR:%08x\n",
+ i2sinfo(" IMR:%08x WPMR:%08x WPSR:%08x\n",
getreg32(priv->base + SAM_SSC_IMR_OFFSET),
getreg32(priv->base + SAM_SSC_WPMR_OFFSET),
getreg32(priv->base + SAM_SSC_WPSR_OFFSET));
@@ -840,11 +833,11 @@ static void ssc_dump_queue(sq_queue_t *queue)
if (!apb)
{
- i2sllvdbg(" %p: No buffer\n", bfcontainer);
+ i2sllinfo(" %p: No buffer\n", bfcontainer);
}
else
{
- i2sllvdbg(" %p: buffer=%p nmaxbytes=%d nbytes=%d\n",
+ i2sllinfo(" %p: buffer=%p nmaxbytes=%d nbytes=%d\n",
bfcontainer, apb, apb->nmaxbytes, apb->nbytes);
}
}
@@ -855,12 +848,12 @@ static void ssc_dump_queues(struct sam_transport_s *xpt, const char *msg)
irqstate_t flags;
flags = enter_critical_section();
- i2sllvdbg("%s\n", msg);
- i2sllvdbg(" Pending:\n");
+ i2sllinfo("%s\n", msg);
+ i2sllinfo(" Pending:\n");
ssc_dump_queue(&xpt->pend);
- i2sllvdbg(" Active:\n");
+ i2sllinfo(" Active:\n");
ssc_dump_queue(&xpt->act);
- i2sllvdbg(" Done:\n");
+ i2sllinfo(" Done:\n");
ssc_dump_queue(&xpt->done);
leave_critical_section(flags);
}
@@ -1083,7 +1076,7 @@ static void ssc_dma_sampleinit(struct sam_ssc_s *priv,
#if defined(CONFIG_SAMV7_SSC_DMADEBUG) && defined(SSC_HAVE_RX)
static void ssc_rxdma_sampledone(struct sam_ssc_s *priv, int result)
{
- lldbg("result: %d\n", result);
+ llerr("result: %d\n", result);
/* Sample the final registers */
@@ -1148,7 +1141,7 @@ static void ssc_rxdma_sampledone(struct sam_ssc_s *priv, int result)
#if defined(CONFIG_SAMV7_SSC_DMADEBUG) && defined(SSC_HAVE_TX)
static void ssc_txdma_sampledone(struct sam_ssc_s *priv, int result)
{
- lldbg("result: %d\n", result);
+ llerr("result: %d\n", result);
/* Sample the final registers */
@@ -1371,7 +1364,7 @@ static int ssc_rxdma_setup(struct sam_ssc_s *priv)
if (ret < 0)
{
- i2slldbg("ERROR: wd_start failed: %d\n", errno);
+ i2sllerr("ERROR: wd_start failed: %d\n", errno);
}
}
@@ -1420,7 +1413,7 @@ static void ssc_rx_worker(void *arg)
* So we have to start the next DMA here.
*/
- i2svdbg("rx.act.head=%p rx.done.head=%p\n",
+ i2sinfo("rx.act.head=%p rx.done.head=%p\n",
priv->rx.act.head, priv->rx.done.head);
ssc_dump_rxqueues(priv, "RX worker start");
@@ -1559,7 +1552,7 @@ static void ssc_rx_schedule(struct sam_ssc_s *priv, int result)
ret = work_queue(HPWORK, &priv->rx.work, ssc_rx_worker, priv, 0);
if (ret != 0)
{
- i2slldbg("ERROR: Failed to queue RX work: %d\n", ret);
+ i2sllerr("ERROR: Failed to queue RX work: %d\n", ret);
}
}
}
@@ -1788,7 +1781,7 @@ static int ssc_txdma_setup(struct sam_ssc_s *priv)
if (ret < 0)
{
- i2slldbg("ERROR: wd_start failed: %d\n", errno);
+ i2sllerr("ERROR: wd_start failed: %d\n", errno);
}
}
@@ -1836,7 +1829,7 @@ static void ssc_tx_worker(void *arg)
* So we have to start the next DMA here.
*/
- i2svdbg("tx.act.head=%p tx.done.head=%p\n",
+ i2sinfo("tx.act.head=%p tx.done.head=%p\n",
priv->tx.act.head, priv->tx.done.head);
ssc_dump_txqueues(priv, "TX worker start");
@@ -1963,7 +1956,7 @@ static void ssc_tx_schedule(struct sam_ssc_s *priv, int result)
ret = work_queue(HPWORK, &priv->tx.work, ssc_tx_worker, priv, 0);
if (ret != 0)
{
- i2slldbg("ERROR: Failed to queue TX work: %d\n", ret);
+ i2sllerr("ERROR: Failed to queue TX work: %d\n", ret);
}
}
}
@@ -2036,25 +2029,25 @@ static int ssc_checkwidth(struct sam_ssc_s *priv, int bits)
switch (bits)
{
case 8:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
priv->align = 0;
#endif
break;
case 16:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
priv->align = 1;
#endif
break;
case 32:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
priv->align = 3;
#endif
break;
default:
- i2sdbg("ERROR: Unsupported or invalid data width: %d\n", bits);
+ i2serr("ERROR: Unsupported or invalid data width: %d\n", bits);
return (bits < 2 || bits > 32) ? -EINVAL : -ENOSYS;
}
@@ -2132,7 +2125,7 @@ static uint32_t ssc_rxdatawidth(struct i2s_dev_s *dev, int bits)
ret = ssc_checkwidth(priv, bits);
if (ret < 0)
{
- i2sdbg("ERROR: ssc_checkwidth failed: %d\n", ret);
+ i2serr("ERROR: ssc_checkwidth failed: %d\n", ret);
return 0;
}
@@ -2141,7 +2134,7 @@ static uint32_t ssc_rxdatawidth(struct i2s_dev_s *dev, int bits)
ret = ssc_dma_flags(priv, &dmaflags);
if (ret < 0)
{
- i2sdbg("ERROR: ssc_dma_flags failed: %d\n", ret);
+ i2serr("ERROR: ssc_dma_flags failed: %d\n", ret);
return 0;
}
@@ -2211,7 +2204,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
#endif
DEBUGASSERT(priv && apb && ((uintptr_t)apb->samp & priv->align) == 0);
- i2svdbg("apb=%p nmaxbytes=%d arg=%p timeout=%d\n",
+ i2sinfo("apb=%p nmaxbytes=%d arg=%p timeout=%d\n",
apb, apb->nmaxbytes, arg, timeout);
ssc_init_buffer(apb->samp, apb->nmaxbytes);
@@ -2230,7 +2223,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
if (!priv->rxenab)
{
- i2sdbg("ERROR: SSC%d has no receiver\n", priv->sscno);
+ i2serr("ERROR: SSC%d has no receiver\n", priv->sscno);
ret = -EAGAIN;
goto errout_with_exclsem;
}
@@ -2269,7 +2262,7 @@ errout_with_exclsem:
return ret;
#else
- i2sdbg("ERROR: SSC%d has no receiver\n", priv->sscno);
+ i2serr("ERROR: SSC%d has no receiver\n", priv->sscno);
UNUSED(priv);
return -ENOSYS;
#endif
@@ -2343,7 +2336,7 @@ static uint32_t ssc_txdatawidth(struct i2s_dev_s *dev, int bits)
ret = ssc_checkwidth(priv, bits);
if (ret < 0)
{
- i2sdbg("ERROR: ssc_checkwidth failed: %d\n", ret);
+ i2serr("ERROR: ssc_checkwidth failed: %d\n", ret);
return 0;
}
@@ -2352,7 +2345,7 @@ static uint32_t ssc_txdatawidth(struct i2s_dev_s *dev, int bits)
ret = ssc_dma_flags(priv, &dmaflags);
if (ret < 0)
{
- i2sdbg("ERROR: ssc_dma_flags failed: %d\n", ret);
+ i2serr("ERROR: ssc_dma_flags failed: %d\n", ret);
return 0;
}
@@ -2426,7 +2419,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
*/
DEBUGASSERT(priv && apb);
- i2svdbg("apb=%p nbytes=%d arg=%p timeout=%d\n",
+ i2sinfo("apb=%p nbytes=%d arg=%p timeout=%d\n",
apb, apb->nbytes - apb->curbyte, arg, timeout);
ssc_dump_buffer("Sending", &apb->samp[apb->curbyte],
@@ -2447,7 +2440,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
if (!priv->txenab)
{
- i2sdbg("ERROR: SSC%d has no transmitter\n", priv->sscno);
+ i2serr("ERROR: SSC%d has no transmitter\n", priv->sscno);
ret = -EAGAIN;
goto errout_with_exclsem;
}
@@ -2486,7 +2479,7 @@ errout_with_exclsem:
return ret;
#else
- i2sdbg("ERROR: SSC%d has no transmitter\n", priv->sscno);
+ i2serr("ERROR: SSC%d has no transmitter\n", priv->sscno);
UNUSED(priv);
return -ENOSYS;
#endif
@@ -2540,7 +2533,7 @@ static int ssc_rx_configure(struct sam_ssc_s *priv)
case SSC_CLKSRC_NONE: /* No clock */
default:
- i2sdbg("ERROR: No receiver clock\n");
+ i2serr("ERROR: No receiver clock\n");
return -EINVAL;
}
@@ -2561,7 +2554,7 @@ static int ssc_rx_configure(struct sam_ssc_s *priv)
break;
default:
- i2sdbg("ERROR: Invalid clock output selection\n");
+ i2serr("ERROR: Invalid clock output selection\n");
return -EINVAL;
}
@@ -2665,7 +2658,7 @@ static int ssc_tx_configure(struct sam_ssc_s *priv)
case SSC_CLKSRC_NONE: /* No clock */
default:
- i2sdbg("ERROR: No transmitter clock\n");
+ i2serr("ERROR: No transmitter clock\n");
return -EINVAL;
}
@@ -2686,7 +2679,7 @@ static int ssc_tx_configure(struct sam_ssc_s *priv)
break;
default:
- i2sdbg("ERROR: Invalid clock output selection\n");
+ i2serr("ERROR: Invalid clock output selection\n");
return -EINVAL;
}
@@ -2906,7 +2899,7 @@ static void ssc_clocking(struct sam_ssc_s *priv)
sam_enableperiph1(priv->pid);
- i2svdbg("PCSR1=%08x PCR=%08x CMR=%08x\n",
+ i2sinfo("PCSR1=%08x PCR=%08x CMR=%08x\n",
getreg32(SAM_PMC_PCSR1), regval,
ssc_getreg(priv, SAM_SSC_CMR_OFFSET));
}
@@ -2945,7 +2938,7 @@ static int ssc_dma_flags(struct sam_ssc_s *priv, uint32_t *dmaflags)
break;
default:
- i2sdbg("ERROR: Unsupported data width: %d\n", priv->datalen);
+ i2serr("ERROR: Unsupported data width: %d\n", priv->datalen);
return -ENOSYS;
}
@@ -2978,7 +2971,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
ret = ssc_dma_flags(priv, &dmaflags);
if (ret < 0)
{
- i2sdbg("ERROR: ssc_dma_flags failed: %d\n", ret);
+ i2serr("ERROR: ssc_dma_flags failed: %d\n", ret);
return ret;
}
@@ -2992,7 +2985,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
priv->rx.dma = sam_dmachannel(0, dmaflags);
if (!priv->rx.dma)
{
- i2sdbg("ERROR: Failed to allocate the RX DMA channel\n");
+ i2serr("ERROR: Failed to allocate the RX DMA channel\n");
goto errout;
}
@@ -3001,7 +2994,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
priv->rx.dog = wd_create();
if (!priv->rx.dog)
{
- i2sdbg("ERROR: Failed to create the RX DMA watchdog\n");
+ i2serr("ERROR: Failed to create the RX DMA watchdog\n");
goto errout;
}
}
@@ -3015,7 +3008,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
priv->tx.dma = sam_dmachannel(0, dmaflags);
if (!priv->tx.dma)
{
- i2sdbg("ERROR: Failed to allocate the TX DMA channel\n");
+ i2serr("ERROR: Failed to allocate the TX DMA channel\n");
goto errout;
}
@@ -3024,7 +3017,7 @@ static int ssc_dma_allocate(struct sam_ssc_s *priv)
priv->tx.dog = wd_create();
if (!priv->tx.dog)
{
- i2sdbg("ERROR: Failed to create the TX DMA watchdog\n");
+ i2serr("ERROR: Failed to create the TX DMA watchdog\n");
goto errout;
}
}
@@ -3231,7 +3224,7 @@ static void ssc0_configure(struct sam_ssc_s *priv)
priv->base = SAM_SSC0_BASE;
priv->datalen = CONFIG_SAMV7_SSC0_DATALEN;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
priv->align = SAMV7_SSC0_DATAMASK;
#endif
priv->pid = SAM_PID_SSC0;
@@ -3372,7 +3365,7 @@ static void ssc1_configure(struct sam_ssc_s *priv)
priv->base = SAM_SSC1_BASE;
priv->datalen = CONFIG_SAMV7_SSC1_DATALEN;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
priv->align = SAMV7_SSC1_DATAMASK;
#endif
priv->pid = SAM_PID_SSC1;
@@ -3405,7 +3398,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
/* The support SAM parts have only a single SSC port */
- i2svdbg("port: %d\n", port);
+ i2sinfo("port: %d\n", port);
/* Allocate a new state structure for this chip select. NOTE that there
* is no protection if the same chip select is used in two different
@@ -3415,7 +3408,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
priv = (struct sam_ssc_s *)zalloc(sizeof(struct sam_ssc_s));
if (!priv)
{
- i2sdbg("ERROR: Failed to allocate a chip select structure\n");
+ i2serr("ERROR: Failed to allocate a chip select structure\n");
return NULL;
}
@@ -3449,7 +3442,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
else
#endif /* CONFIG_SAMV7_SSC1 */
{
- i2sdbg("ERROR: Unsupported I2S port: %d\n", port);
+ i2serr("ERROR: Unsupported I2S port: %d\n", port);
goto errout_with_alloc;
}
@@ -3470,7 +3463,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
ret = ssc_rx_configure(priv);
if (ret < 0)
{
- i2sdbg("ERROR: Failed to configure the receiver: %d\n", ret);
+ i2serr("ERROR: Failed to configure the receiver: %d\n", ret);
goto errout_with_clocking;
}
@@ -3479,7 +3472,7 @@ struct i2s_dev_s *sam_ssc_initialize(int port)
ret = ssc_tx_configure(priv);
if (ret < 0)
{
- i2sdbg("ERROR: Failed to configure the transmitter: %d\n", ret);
+ i2serr("ERROR: Failed to configure the transmitter: %d\n", ret);
goto errout_with_clocking;
}
diff --git a/arch/arm/src/samv7/sam_tc.c b/arch/arm/src/samv7/sam_tc.c
index 03569857765ab3d2f74d711f04e53c02384a0940..50f2bad062ef22bbf881c594c745fe73effda8a1 100644
--- a/arch/arm/src/samv7/sam_tc.c
+++ b/arch/arm/src/samv7/sam_tc.c
@@ -643,17 +643,17 @@ static void sam_regdump(struct sam_chan_s *chan, const char *msg)
uintptr_t base;
base = tc->base;
- lldbg("TC%d [%08x]: %s\n", tc->tc, (int)base, msg);
- lldbg(" BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
+ llerr("TC%d [%08x]: %s\n", tc->tc, (int)base, msg);
+ llerr(" BMR: %08x QIMR: %08x QISR: %08x WPMR: %08x\n",
getreg32(base+SAM_TC_BMR_OFFSET), getreg32(base+SAM_TC_QIMR_OFFSET),
getreg32(base+SAM_TC_QISR_OFFSET), getreg32(base+SAM_TC_WPMR_OFFSET));
base = chan->base;
- lldbg("TC%d Channel %d [%08x]: %s\n", tc->tc, chan->chan, (int)base, msg);
- lldbg(" CMR: %08x SSMR: %08x RAB: %08x CV: %08x\n",
+ llerr("TC%d Channel %d [%08x]: %s\n", tc->tc, chan->chan, (int)base, msg);
+ llerr(" CMR: %08x SSMR: %08x RAB: %08x CV: %08x\n",
getreg32(base+SAM_TC_CMR_OFFSET), getreg32(base+SAM_TC_SMMR_OFFSET),
getreg32(base+SAM_TC_RAB_OFFSET), getreg32(base+SAM_TC_CV_OFFSET));
- lldbg(" RA: %08x RB: %08x RC: %08x IMR: %08x\n",
+ llerr(" RA: %08x RB: %08x RC: %08x IMR: %08x\n",
getreg32(base+SAM_TC_RA_OFFSET), getreg32(base+SAM_TC_RB_OFFSET),
getreg32(base+SAM_TC_RC_OFFSET), getreg32(base+SAM_TC_IMR_OFFSET));
}
@@ -698,7 +698,7 @@ static bool sam_checkreg(struct sam_tc_s *tc, bool wr, uint32_t regaddr,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", tc->ntimes);
+ llerr("...[Repeats %d times]...\n", tc->ntimes);
}
/* Save information about the new access */
@@ -733,7 +733,7 @@ static inline uint32_t sam_tc_getreg(struct sam_chan_s *chan,
#ifdef CONFIG_SAMV7_TC_REGDEBUG
if (sam_checkreg(tc, false, regaddr, regval))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -757,7 +757,7 @@ static inline void sam_tc_putreg(struct sam_chan_s *chan, uint32_t regval,
#ifdef CONFIG_SAMV7_TC_REGDEBUG
if (sam_checkreg(tc, true, regaddr, regval))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -781,7 +781,7 @@ static inline uint32_t sam_chan_getreg(struct sam_chan_s *chan,
#ifdef CONFIG_SAMV7_TC_REGDEBUG
if (sam_checkreg(chan->tc, false, regaddr, regval))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -804,7 +804,7 @@ static inline void sam_chan_putreg(struct sam_chan_s *chan, unsigned int offset,
#ifdef CONFIG_SAMV7_TC_REGDEBUG
if (sam_checkreg(chan->tc, true, regaddr, regval))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -841,7 +841,7 @@ static int sam_tc_interrupt(struct sam_tc_s *tc, struct sam_chan_s *chan)
imr = sam_chan_getreg(chan, SAM_TC_IMR_OFFSET);
pending = sr & imr;
- tcllvdbg("TC%d Channel %d: pending=%08lx\n",
+ tcllinfo("TC%d Channel %d: pending=%08lx\n",
tc->tc, chan->chan, (unsigned long)pending);
/* Are there any pending interrupts for this channel? */
@@ -1046,7 +1046,7 @@ static int sam_tc_mcksrc(uint32_t frequency, uint32_t *tcclks,
uint32_t fnext;
int ndx = 0;
- tcvdbg("frequency=%d\n", frequency);
+ tcinfo("frequency=%d\n", frequency);
/* Satisfy lower bound. That is, the value of the divider such that:
*
@@ -1066,7 +1066,7 @@ static int sam_tc_mcksrc(uint32_t frequency, uint32_t *tcclks,
{
/* If no divisor can be found, return -ERANGE */
- tcdbg("Lower bound search failed\n");
+ tcerr("Lower bound search failed\n");
return -ERANGE;
}
@@ -1169,7 +1169,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* Timer/counter is not invalid or not enabled */
- tcdbg("ERROR: Bad channel number: %d\n", channel);
+ tcerr("ERROR: Bad channel number: %d\n", channel);
return NULL;
}
@@ -1225,7 +1225,7 @@ static inline struct sam_chan_s *sam_tc_initialize(int channel)
{
/* Yes.. return a failure */
- tcdbg("Channel %d is in-use\n", channel);
+ tcerr("Channel %d is in-use\n", channel);
sam_givesem(tc);
return NULL;
}
@@ -1318,7 +1318,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
* access to the requested channel.
*/
- tcvdbg("channel=%d mode=%08x\n", channel, mode);
+ tcinfo("channel=%d mode=%08x\n", channel, mode);
chan = sam_tc_initialize(channel);
if (chan)
@@ -1344,7 +1344,7 @@ TC_HANDLE sam_tc_allocate(int channel, int mode)
/* Return an opaque reference to the channel */
- tcvdbg("Returning %p\n", chan);
+ tcinfo("Returning %p\n", chan);
return (TC_HANDLE)chan;
}
@@ -1366,7 +1366,7 @@ void sam_tc_free(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
- tcvdbg("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
+ tcinfo("Freeing %p channel=%d inuse=%d\n", chan, chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
/* Make sure that interrupts are detached and disabled and that the channel
@@ -1399,7 +1399,7 @@ void sam_tc_start(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
- tcvdbg("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
+ tcinfo("Starting channel %d inuse=%d\n", chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
/* Read the SR to clear any pending interrupts on this channel */
@@ -1431,7 +1431,7 @@ void sam_tc_stop(TC_HANDLE handle)
{
struct sam_chan_s *chan = (struct sam_chan_s *)handle;
- tcvdbg("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
+ tcinfo("Stopping channel %d inuse=%d\n", chan->chan, chan->inuse);
DEBUGASSERT(chan && chan->inuse);
sam_chan_putreg(chan, SAM_TC_CCR_OFFSET, TC_CCR_CLKDIS);
@@ -1538,7 +1538,7 @@ void sam_tc_setregister(TC_HANDLE handle, int regid, uint32_t regval)
DEBUGASSERT(chan && regid < TC_NREGISTERS);
- tcvdbg("Channel %d: Set register RC%d to %08lx\n",
+ tcinfo("Channel %d: Set register RC%d to %08lx\n",
chan->chan, regid, (unsigned long)regval);
sam_chan_putreg(chan, g_regoffset[regid], regval);
@@ -1717,7 +1717,7 @@ int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks,
if (actual)
{
- tcvdbg("return actual=%lu\n", (unsigned long)fselect);
+ tcinfo("return actual=%lu\n", (unsigned long)fselect);
*actual = pck6_actual;
}
@@ -1725,7 +1725,7 @@ int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks,
if (tcclks)
{
- tcvdbg("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS_PCK6);
+ tcinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS_PCK6);
*tcclks = TC_CMR_TCCLKS_PCK6;
}
@@ -1739,7 +1739,7 @@ int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks,
if (actual)
{
- tcvdbg("return actual=%lu\n", (unsigned long)mck_actual);
+ tcinfo("return actual=%lu\n", (unsigned long)mck_actual);
*actual = mck_actual;
}
@@ -1747,7 +1747,7 @@ int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks,
if (tcclks)
{
- tcvdbg("return tcclks=%08lx\n", (unsigned long)mck_tcclks);
+ tcinfo("return tcclks=%08lx\n", (unsigned long)mck_tcclks);
*tcclks = mck_tcclks;
}
diff --git a/arch/arm/src/samv7/sam_tc.h b/arch/arm/src/samv7/sam_tc.h
index 5dda45ece993f7e0f17d4b7ea323ee55b701c5b3..508b297f098035483968d20a488c546ffe25e706 100644
--- a/arch/arm/src/samv7/sam_tc.h
+++ b/arch/arm/src/samv7/sam_tc.h
@@ -75,7 +75,7 @@
/* Timer debug is enabled if any timer client is enabled */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_ANALOG
# undef CONFIG_SAMV7_TC_REGDEBUG
#endif
@@ -87,15 +87,15 @@
/* Timer/counter debug output */
#ifdef CONFIG_SAMV7_TC_DEBUG
-# define tcdbg dbg
-# define tcvdbg vdbg
-# define tclldbg lldbg
-# define tcllvdbg llvdbg
+# define tcerr err
+# define tcinfo info
+# define tcllerr llerr
+# define tcllinfo llinfo
#else
-# define tcdbg(x...)
-# define tcvdbg(x...)
-# define tclldbg(x...)
-# define tcllvdbg(x...)
+# define tcerr(x...)
+# define tcinfo(x...)
+# define tcllerr(x...)
+# define tcllinfo(x...)
#endif
/****************************************************************************
diff --git a/arch/arm/src/samv7/sam_tickless.c b/arch/arm/src/samv7/sam_tickless.c
index 3d1a7ad95ac40d32986c5593dfb1d1c37715ab9b..6b610642ea8ed1e4779fb0add5871d7559d27aaa 100644
--- a/arch/arm/src/samv7/sam_tickless.c
+++ b/arch/arm/src/samv7/sam_tickless.c
@@ -221,7 +221,7 @@ static struct sam_tickless_s g_tickless;
static void sam_oneshot_handler(void *arg)
{
- tcllvdbg("Expired...\n");
+ tcllinfo("Expired...\n");
sched_timer_expiration();
}
@@ -265,7 +265,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
- tclldbg("ERROR: sam_oneshot_initialize failed\n");
+ tcllerr("ERROR: sam_oneshot_initialize failed\n");
PANIC();
}
@@ -278,7 +278,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
- tclldbg("ERROR: sam_freerun_initialize failed\n");
+ tcllerr("ERROR: sam_freerun_initialize failed\n");
PANIC();
}
diff --git a/arch/arm/src/samv7/sam_trng.c b/arch/arm/src/samv7/sam_trng.c
index 3a76b924e1fac122c4a213f013aabdaaabe02729..7dc29a77d83626b591250ddb5f8f2ceba56eb710 100644
--- a/arch/arm/src/samv7/sam_trng.c
+++ b/arch/arm/src/samv7/sam_trng.c
@@ -244,7 +244,7 @@ static ssize_t sam_read(struct file *filep, char *buffer, size_t buflen)
ssize_t retval;
int ret;
- fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+ finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
/* Get exclusive access to the TRNG harware */
@@ -284,7 +284,7 @@ static ssize_t sam_read(struct file *filep, char *buffer, size_t buflen)
{
ret = sem_wait(&g_trngdev.waitsem);
- fvdbg("Awakened: nsamples=%d maxsamples=%d ret=%d\n",
+ finfo("Awakened: nsamples=%d maxsamples=%d ret=%d\n",
g_trngdev.nsamples, g_trngdev.maxsamples, ret);
if (ret < 0)
@@ -321,7 +321,7 @@ errout:
sem_post(&g_trngdev.exclsem);
- fvdbg("Return %d\n", (int)retval);
+ finfo("Return %d\n", (int)retval);
return retval;
}
@@ -347,7 +347,7 @@ void up_rnginitialize(void)
{
int ret;
- fvdbg("Initializing TRNG hardware\n");
+ finfo("Initializing TRNG hardware\n");
/* Initialize the device structure */
@@ -363,7 +363,7 @@ void up_rnginitialize(void)
if (irq_attach(SAM_IRQ_TRNG, sam_interrupt))
{
- fdbg("ERROR: Failed to attach to IRQ%d\n", SAM_IRQ_TRNG);
+ ferr("ERROR: Failed to attach to IRQ%d\n", SAM_IRQ_TRNG);
return;
}
@@ -380,7 +380,7 @@ void up_rnginitialize(void)
ret = register_driver("/dev/random", &g_trngops, 0644, NULL);
if (ret < 0)
{
- fdbg("ERROR: Failed to register /dev/random\n");
+ ferr("ERROR: Failed to register /dev/random\n");
return;
}
diff --git a/arch/arm/src/samv7/sam_twihs.c b/arch/arm/src/samv7/sam_twihs.c
index fa5a8b2a525665ec7b354eb8b56781c3f66c5e2b..67f989d842ab7d60aa624b67e16836e3855bd8e2 100644
--- a/arch/arm/src/samv7/sam_twihs.c
+++ b/arch/arm/src/samv7/sam_twihs.c
@@ -99,7 +99,7 @@
* to transfer on byte. So these define a "long" timeout.
*/
-#if defined(CONFIG_DEBUG_I2C) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_I2C) && defined(CONFIG_DEBUG_INFO)
# define TWIHS_TIMEOUT_MSPB (50) /* 50 msec/byte */
#else
# define TWIHS_TIMEOUT_MSPB (5) /* 5 msec/byte */
@@ -121,18 +121,18 @@
#define MKI2C_OUTPUT(p) (((p) & (PIO_PORT_MASK | PIO_PIN_MASK)) | I2C_OUTPUT)
/* Debug ***********************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
+/* CONFIG_DEBUG_I2C + CONFIG_DEBUG_FEATURES enables general I2C debug output. */
#ifdef CONFIG_DEBUG_I2C
-# define i2cdbg dbg
-# define i2cvdbg vdbg
-# define i2clldbg lldbg
-# define i2cllvdbg llvdbg
+# define i2cerr err
+# define i2cinfo info
+# define i2cllerr llerr
+# define i2cllinfo llinfo
#else
-# define i2cdbg(x...)
-# define i2cvdbg(x...)
-# define i2clldbg(x...)
-# define i2cllvdbg(x...)
+# define i2cerr(x...)
+# define i2cinfo(x...)
+# define i2cllerr(x...)
+# define i2cllinfo(x...)
#endif
/****************************************************************************
@@ -364,7 +364,7 @@ static bool twi_checkreg(struct twi_dev_s *priv, bool wr, uint32_t value,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -396,7 +396,7 @@ static uint32_t twi_getabs(struct twi_dev_s *priv, uintptr_t address)
if (twi_checkreg(priv, false, value, address))
{
- lldbg("%08x->%08x\n", address, value);
+ llerr("%08x->%08x\n", address, value);
}
return value;
@@ -417,7 +417,7 @@ static void twi_putabs(struct twi_dev_s *priv, uintptr_t address,
{
if (twi_checkreg(priv, true, value, address))
{
- lldbg("%08x<-%08x\n", address, value);
+ llerr("%08x<-%08x\n", address, value);
}
putreg32(value, address);
@@ -494,9 +494,9 @@ static int twi_wait(struct twi_dev_s *priv, unsigned int size)
do
{
- i2cvdbg("TWIHS%d Waiting...\n", priv->attr->twi);
+ i2cinfo("TWIHS%d Waiting...\n", priv->attr->twi);
twi_takesem(&priv->waitsem);
- i2cvdbg("TWIHS%d Awakened with result: %d\n",
+ i2cinfo("TWIHS%d Awakened with result: %d\n",
priv->attr->twi, priv->result);
}
while (priv->result == -EBUSY);
@@ -554,7 +554,7 @@ static int twi_interrupt(struct twi_dev_s *priv)
imr = twi_getrel(priv, SAM_TWIHS_IMR_OFFSET);
pending = sr & imr;
- i2cllvdbg("TWIHS%d pending: %08x\n", priv->attr->twi, pending);
+ i2cllinfo("TWIHS%d pending: %08x\n", priv->attr->twi, pending);
/* Byte received */
@@ -627,7 +627,7 @@ static int twi_interrupt(struct twi_dev_s *priv)
{
/* Wake up the thread with an I/O error indication */
- i2clldbg("ERROR: TWIHS%d pending: %08x\n", priv->attr->twi, pending);
+ i2cllerr("ERROR: TWIHS%d pending: %08x\n", priv->attr->twi, pending);
twi_wakeup(priv, -EIO);
}
@@ -750,7 +750,7 @@ static void twi_timeout(int argc, uint32_t arg, ...)
{
struct twi_dev_s *priv = (struct twi_dev_s *)arg;
- i2clldbg("ERROR: TWIHS%d Timeout!\n", priv->attr->twi);
+ i2cllerr("ERROR: TWIHS%d Timeout!\n", priv->attr->twi);
twi_wakeup(priv, -ETIMEDOUT);
}
@@ -871,7 +871,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
int ret;
DEBUGASSERT(dev != NULL && msgs != NULL && count > 0);
- i2cvdbg("TWIHS%d count: %d\n", priv->attr->twi, count);
+ i2cinfo("TWIHS%d count: %d\n", priv->attr->twi, count);
/* Calculate the total transfer size so that we can calculate a reasonable
* timeout value.
@@ -917,7 +917,7 @@ static int twi_transfer(FAR struct i2c_master_s *dev,
ret = twi_wait(priv, size);
if (ret < 0)
{
- i2cdbg("ERROR: Transfer failed: %d\n", ret);
+ i2cerr("ERROR: Transfer failed: %d\n", ret);
}
leave_critical_section(flags);
@@ -1157,7 +1157,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency)
uint32_t regval;
uint32_t mck;
- i2cvdbg("TWIHS%d Initializing\n", priv->attr->twi);
+ i2cinfo("TWIHS%d Initializing\n", priv->attr->twi);
/* Configure PIO pins */
@@ -1258,7 +1258,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
irqstate_t flags;
int ret;
- i2cvdbg("Initializing TWIHS%d\n", bus);
+ i2cinfo("Initializing TWIHS%d\n", bus);
#ifdef CONFIG_SAMV7_TWIHS0
if (bus == 0)
@@ -1303,7 +1303,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
else
#endif
{
- i2cdbg("ERROR: Unsupported bus: TWIHS%d\n", bus);
+ i2cerr("ERROR: Unsupported bus: TWIHS%d\n", bus);
return NULL;
}
@@ -1320,7 +1320,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
priv->timeout = wd_create();
if (priv->timeout == NULL)
{
- idbg("ERROR: Failed to allocate a timer\n");
+ ierr("ERROR: Failed to allocate a timer\n");
goto errout_with_irq;
}
@@ -1329,7 +1329,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
ret = irq_attach(priv->attr->irq, priv->attr->handler);
if (ret < 0)
{
- idbg("ERROR: Failed to attach irq %d\n", priv->attr->irq);
+ ierr("ERROR: Failed to attach irq %d\n", priv->attr->irq);
goto errout_with_wdog;
}
@@ -1374,7 +1374,7 @@ int sam_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
struct twi_dev_s *priv = (struct twi_dev_s *) dev;
irqstate_t flags;
- i2cvdbg("TWIHS%d Un-initializing\n", priv->attr->twi);
+ i2cinfo("TWIHS%d Un-initializing\n", priv->attr->twi);
/* Disable TWIHS interrupts */
diff --git a/arch/arm/src/samv7/sam_usbdevhs.c b/arch/arm/src/samv7/sam_usbdevhs.c
index de6872e92ee45eae79663d37cd3e4e4d391a5154..8c8cde272a97049e8e6d5a08f6551de4099f67c2 100644
--- a/arch/arm/src/samv7/sam_usbdevhs.c
+++ b/arch/arm/src/samv7/sam_usbdevhs.c
@@ -112,7 +112,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_SAMV7_USBHS_REGDEBUG
#endif
@@ -743,7 +743,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
#ifdef CONFIG_SAMV7_USBHS_REGDEBUG
static void sam_printreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
{
- lldbg("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
+ llerr("%p%s%08x\n", regaddr, iswrite ? "<-" : "->", regval);
}
#endif
@@ -794,7 +794,7 @@ static void sam_checkreg(uintptr_t regaddr, uint32_t regval, bool iswrite)
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ llerr("[repeats %d more times]\n", count);
}
}
@@ -869,36 +869,36 @@ static inline void sam_putreg(uint32_t regval, uint32_t regaddr)
* Name: sam_dumpep
****************************************************************************/
-#if defined(CONFIG_SAMV7_USBHS_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMV7_USBHS_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void sam_dumpep(struct sam_usbdev_s *priv, int epno)
{
/* Global Registers */
- lldbg("Global Register:\n");
- lldbg(" CTRL: %08x\n", sam_getreg(SAM_USBHS_DEVCTRL));
- lldbg(" ISR: %08x\n", sam_getreg(SAM_USBHS_DEVISR));
- lldbg(" IMR: %08x\n", sam_getreg(SAM_USBHS_DEVIMR));
- lldbg(" EPT: %08x\n", sam_getreg(SAM_USBHS_DEVEPT));
- lldbg(" FNUM: %08x\n", sam_getreg(SAM_USBHS_DEVFNUM));
+ llerr("Global Register:\n");
+ llerr(" CTRL: %08x\n", sam_getreg(SAM_USBHS_DEVCTRL));
+ llerr(" ISR: %08x\n", sam_getreg(SAM_USBHS_DEVISR));
+ llerr(" IMR: %08x\n", sam_getreg(SAM_USBHS_DEVIMR));
+ llerr(" EPT: %08x\n", sam_getreg(SAM_USBHS_DEVEPT));
+ llerr(" FNUM: %08x\n", sam_getreg(SAM_USBHS_DEVFNUM));
/* Endpoint registers */
- lldbg("Endpoint %d Register:\n", epno);
- lldbg(" CFG: %08x\n", sam_getreg(SAM_USBHS_DEVEPTCFG(epno)));
- lldbg(" ISR: %08x\n", sam_getreg(SAM_USBHS_DEVEPTISR(epno)));
- lldbg(" IMR: %08x\n", sam_getreg(SAM_USBHS_DEVEPTIMR(epno)));
+ llerr("Endpoint %d Register:\n", epno);
+ llerr(" CFG: %08x\n", sam_getreg(SAM_USBHS_DEVEPTCFG(epno)));
+ llerr(" ISR: %08x\n", sam_getreg(SAM_USBHS_DEVEPTISR(epno)));
+ llerr(" IMR: %08x\n", sam_getreg(SAM_USBHS_DEVEPTIMR(epno)));
- lldbg("DMA %d Register:\n", epno);
+ llerr("DMA %d Register:\n", epno);
if ((SAM_EPSET_DMA & SAM_EP_BIT(epno)) != 0)
{
- lldbg(" NXTDSC: %08x\n", sam_getreg(SAM_USBHS_DEVDMANXTDSC(epno)));
- lldbg(" ADDRESS: %08x\n", sam_getreg(SAM_USBHS_DEVDMAADDR(epno)));
- lldbg(" CONTROL: %08x\n", sam_getreg(SAM_USBHS_DEVDMACTRL(epno)));
- lldbg(" STATUS: %08x\n", sam_getreg(SAM_USBHS_DEVDMASTA(epno)));
+ llerr(" NXTDSC: %08x\n", sam_getreg(SAM_USBHS_DEVDMANXTDSC(epno)));
+ llerr(" ADDRESS: %08x\n", sam_getreg(SAM_USBHS_DEVDMAADDR(epno)));
+ llerr(" CONTROL: %08x\n", sam_getreg(SAM_USBHS_DEVDMACTRL(epno)));
+ llerr(" STATUS: %08x\n", sam_getreg(SAM_USBHS_DEVDMASTA(epno)));
}
else
{
- lldbg(" None\n");
+ llerr(" None\n");
}
}
#endif
@@ -1412,7 +1412,7 @@ static int sam_req_write(struct sam_usbdev_s *priv, struct sam_ep_s *privep)
return -ENOENT;
}
- ullvdbg("epno=%d req=%p: len=%d xfrd=%d inflight=%d zlpneeded=%d\n",
+ ullinfo("epno=%d req=%p: len=%d xfrd=%d inflight=%d zlpneeded=%d\n",
epno, privreq, privreq->req.len, privreq->req.xfrd,
privreq->inflight, privep->zlpneeded);
@@ -1647,7 +1647,7 @@ static int sam_req_read(struct sam_usbdev_s *priv, struct sam_ep_s *privep,
return -ENOENT;
}
- ullvdbg("EP%d: len=%d xfrd=%d\n",
+ ullinfo("EP%d: len=%d xfrd=%d\n",
epno, privreq->req.len, privreq->req.xfrd);
/* Ignore any attempt to receive a zero length packet */
@@ -1982,7 +1982,7 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
index.w = GETUINT16(priv->ctrl.index);
len.w = GETUINT16(priv->ctrl.len);
- ullvdbg("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
/* Dispatch any non-standard requests */
@@ -2146,7 +2146,7 @@ static void sam_ep0_setup(struct sam_usbdev_s *priv)
{
/* Special case recipient=device test mode */
- ullvdbg("test mode: %d\n", index.w);
+ ullinfo("test mode: %d\n", index.w);
}
else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
{
@@ -3489,7 +3489,7 @@ static int sam_ep_configure_internal(struct sam_ep_s *privep,
uint8_t nbtrans;
bool dirin;
- uvdbg("len: %02x type: %02x addr: %02x attr: %02x "
+ uinfo("len: %02x type: %02x addr: %02x attr: %02x "
"maxpacketsize: %02x %02x interval: %02x\n",
desc->len, desc->type, desc->addr, desc->attr,
desc->mxpacketsize[0], desc->mxpacketsize[1],
@@ -3730,7 +3730,7 @@ static int sam_ep_configure(struct usbdev_ep_s *ep,
/* Verify parameters. Endpoint 0 is not available at this interface */
-#if defined(CONFIG_DEBUG) || defined(CONFIG_USBDEV_TRACE)
+#if defined(CONFIG_DEBUG_FEATURES) || defined(CONFIG_USBDEV_TRACE)
uint8_t epno = USB_EPNO(desc->addr);
usbtrace(TRACE_EPCONFIGURE, (uint16_t)epno);
@@ -3909,7 +3909,7 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
if (privep->stalled)
{
sam_req_abort(privep, privreq, -EBUSY);
- ulldbg("ERROR: stalled\n");
+ ullerr("ERROR: stalled\n");
ret = -EPERM;
}
else
@@ -4692,7 +4692,7 @@ static void sam_sw_setup(struct sam_usbdev_s *priv)
kmm_memalign(16, CONFIG_SAMV7_USBDEVHS_NDTDS * sizeof(struct sam_dtd_s));
if (!priv->dtdpool)
{
- udbg("ERROR: Failed to allocate the DMA transfer descriptor pool\n");
+ uerr("ERROR: Failed to allocate the DMA transfer descriptor pool\n");
return NULL;
}
diff --git a/arch/arm/src/samv7/sam_wdt.c b/arch/arm/src/samv7/sam_wdt.c
index 8d638066820678e6a7bdff2ee2cf068502926975..e55405785c93298e09c8cd1b2f0751417947c458 100644
--- a/arch/arm/src/samv7/sam_wdt.c
+++ b/arch/arm/src/samv7/sam_wdt.c
@@ -82,16 +82,16 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the watchdog
- * driver. NOTE: that only lldbg types are used so that the output is
+ * driver. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_WATCHDOG
-# define wddbg lldbg
-# define wdvdbg llvdbg
+# define wderr llerr
+# define wdinfo llinfo
#else
-# define wddbg(x...)
-# define wdvdbg(x...)
+# define wderr(x...)
+# define wdinfo(x...)
#endif
/****************************************************************************
@@ -118,7 +118,7 @@ struct sam_lowerhalf_s
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_SAMV7_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMV7_WDT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t sam_getreg(uintptr_t regaddr);
static void sam_putreg(uint32_t regval, uintptr_t regaddr);
#else
@@ -178,7 +178,7 @@ static struct sam_lowerhalf_s g_wdtdev;
*
****************************************************************************/
-#if defined(CONFIG_SAMV7_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMV7_WDT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t sam_getreg(uintptr_t regaddr)
{
static uint32_t prevaddr = 0;
@@ -199,7 +199,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return regval;
@@ -216,7 +216,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -228,7 +228,7 @@ static uint32_t sam_getreg(uintptr_t regaddr)
/* Show the register value read */
- lldbg("%08x->%048\n", regaddr, regval);
+ llerr("%08x->%048\n", regaddr, regval);
return regval;
}
#endif
@@ -241,12 +241,12 @@ static uint32_t sam_getreg(uintptr_t regaddr)
*
****************************************************************************/
-#if defined(CONFIG_SAMV7_WDT_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_SAMV7_WDT_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void sam_putreg(uint32_t regval, uintptr_t regaddr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
/* Write the value */
@@ -315,7 +315,7 @@ static int sam_start(FAR struct watchdog_lowerhalf_s *lower)
* timer with the newly programmed mode parameters.
*/
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
return priv->started ? OK : -ENOSYS;
}
@@ -343,7 +343,7 @@ static int sam_stop(FAR struct watchdog_lowerhalf_s *lower)
* timer with the newly programmed mode parameters.
*/
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
return -ENOSYS;
}
@@ -366,7 +366,7 @@ static int sam_stop(FAR struct watchdog_lowerhalf_s *lower)
static int sam_keepalive(FAR struct watchdog_lowerhalf_s *lower)
{
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
/* Write WDT_CR_WDRSTT to the WDT CR regiser (along with the KEY value)
* will restart the watchdog timer.
@@ -397,7 +397,7 @@ static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower,
{
FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower;
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
DEBUGASSERT(priv);
/* Return the status bit */
@@ -426,10 +426,10 @@ static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower,
status->timeleft = 0;
- wdvdbg("Status :\n");
- wdvdbg(" flags : %08x\n", status->flags);
- wdvdbg(" timeout : %d\n", status->timeout);
- wdvdbg(" timeleft : %d\n", status->timeleft);
+ wdinfo("Status :\n");
+ wdinfo(" flags : %08x\n", status->flags);
+ wdinfo(" timeout : %d\n", status->timeout);
+ wdinfo(" timeleft : %d\n", status->timeleft);
return OK;
}
@@ -457,13 +457,13 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
uint32_t regval;
DEBUGASSERT(priv);
- wdvdbg("Entry: timeout=%d\n", timeout);
+ wdinfo("Entry: timeout=%d\n", timeout);
/* Can this timeout be represented? */
if (timeout < WDT_MINTIMEOUT || timeout >= WDT_MAXTIMEOUT)
{
- wddbg("Cannot represent timeout: %d < %d > %d\n",
+ wderr("Cannot represent timeout: %d < %d > %d\n",
WDT_MINTIMEOUT, timeout, WDT_MAXTIMEOUT);
return -ERANGE;
}
@@ -496,7 +496,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
priv->reload = reload;
- wdvdbg("reload=%d timout: %d->%d\n",
+ wdinfo("reload=%d timout: %d->%d\n",
reload, timeout, priv->timeout);
/* Set the WDT_MR according to calculated value
@@ -541,7 +541,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower,
priv->started = true;
- wdvdbg("Setup: CR: %08x MR: %08x SR: %08x\n",
+ wdinfo("Setup: CR: %08x MR: %08x SR: %08x\n",
sam_getreg(SAM_WDT_CR), sam_getreg(SAM_WDT_MR),
sam_getreg(SAM_WDT_SR));
@@ -574,7 +574,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
xcpt_t handler)
{
#ifndef CONFIG_SAMV7_WDT_INTERRUPT
- wddbg("ERROR: Not configured for this mode\n");
+ wderr("ERROR: Not configured for this mode\n");
return NULL;
#else
FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower;
@@ -582,7 +582,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
xcpt_t oldhandler;
DEBUGASSERT(priv);
- wdvdbg("Entry: handler=%p\n", handler);
+ wdinfo("Entry: handler=%p\n", handler);
/* Get the old handler return value */
@@ -636,7 +636,7 @@ static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower,
static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
unsigned long arg)
{
- wdvdbg("cmd=%d arg=%ld\n", cmd, arg);
+ wdinfo("cmd=%d arg=%ld\n", cmd, arg);
/* No ioctls are supported */
@@ -667,7 +667,7 @@ int sam_wdt_initialize(void)
{
FAR struct sam_lowerhalf_s *priv = &g_wdtdev;
- wdvdbg("Entry: CR: %08x MR: %08x SR: %08x\n",
+ wdinfo("Entry: CR: %08x MR: %08x SR: %08x\n",
sam_getreg(SAM_WDT_CR), sam_getreg(SAM_WDT_MR),
sam_getreg(SAM_WDT_SR));
diff --git a/arch/arm/src/samv7/sam_xdmac.c b/arch/arm/src/samv7/sam_xdmac.c
index 886de898fe428b8a2bdabe852861a2d887931cd0..2666457a40a6c2ac902423cec3c7e228579a672c 100644
--- a/arch/arm/src/samv7/sam_xdmac.c
+++ b/arch/arm/src/samv7/sam_xdmac.c
@@ -551,7 +551,7 @@ static uint8_t sam_channel(uint8_t pid, const struct sam_pidmap_s *table,
}
}
- dmadbg("No channel found for pid %d\n", pid);
+ dmaerr("No channel found for pid %d\n", pid);
DEBUGPANIC();
return 0x3f;
}
@@ -1020,7 +1020,7 @@ sam_allocdesc(struct sam_xdmach_s *xdmach, struct chnext_view1_s *prev,
* Obviously setting it to zero would break that usage.
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (csa != 0)
#endif
{
@@ -1340,7 +1340,7 @@ static inline int sam_single(struct sam_xdmach_s *xdmach)
static inline int sam_multiple(struct sam_xdmach_s *xdmach)
{
struct sam_xdmac_s *xdmac = sam_controller(xdmach);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_ASSERTIONS
struct chnext_view1_s *llhead = xdmach->llhead;
#endif
uintptr_t paddr;
@@ -1542,7 +1542,7 @@ static int sam_xdmac_interrupt(int irq, void *context)
{
/* Yes... Terminate the transfer with an error? */
- dmalldbg("ERROR: DMA failed: %08x\n", chpending);
+ dmallerr("ERROR: DMA failed: %08x\n", chpending);
sam_dmaterminate(xdmach, -EIO);
}
@@ -1559,7 +1559,7 @@ static int sam_xdmac_interrupt(int irq, void *context)
else
{
- dmalldbg("ERROR: Unexpected interrupt: %08x\n", chpending);
+ dmallerr("ERROR: Unexpected interrupt: %08x\n", chpending);
DEBUGPANIC();
}
@@ -1616,7 +1616,7 @@ void sam_dmainitialize(struct sam_xdmac_s *xdmac)
void weak_function up_dmainitialize(void)
{
- dmallvdbg("Initialize XDMAC\n");
+ dmallinfo("Initialize XDMAC\n");
/* Enable peripheral clock */
@@ -1697,12 +1697,12 @@ DMA_HANDLE sam_dmachannel(uint8_t dmacno, uint32_t chflags)
if (xdmach)
{
- dmavdbg("XDMAC%d CH%d: chflags: %08x returning xdmach: %p\n",
+ dmainfo("XDMAC%d CH%d: chflags: %08x returning xdmach: %p\n",
(int)dmacno, xdmach->chan, (int)chflags, xdmach);
}
else
{
- dmadbg("ERROR: Failed allocate XDMAC%d channel\n", (int)dmacno);
+ dmaerr("ERROR: Failed allocate XDMAC%d channel\n", (int)dmacno);
}
return (DMA_HANDLE)xdmach;
@@ -1731,7 +1731,7 @@ void sam_dmaconfig(DMA_HANDLE handle, uint32_t chflags)
/* Set the new DMA channel flags. */
xdmach->flags = chflags;
- dmavdbg("XDMAC CH%d: chflags: %08x\n", xdmach->chan, (int)chflags);
+ dmainfo("XDMAC CH%d: chflags: %08x\n", xdmach->chan, (int)chflags);
}
/****************************************************************************
@@ -1752,7 +1752,7 @@ void sam_dmafree(DMA_HANDLE handle)
struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
struct sam_xdmac_s *xdmac;
- dmavdbg("xdmach: %p\n", xdmach);
+ dmainfo("xdmach: %p\n", xdmach);
DEBUGASSERT((xdmach != NULL) && (xdmach->inuse));
xdmac = sam_controller(xdmach);
@@ -1790,10 +1790,10 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
size_t remaining;
int ret = OK;
- dmavdbg("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+ dmainfo("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
xdmach, (int)paddr, (int)maddr, (int)nbytes);
DEBUGASSERT(xdmach);
- dmavdbg("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
+ dmainfo("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
/* The maximum transfer size in bytes depends upon the maximum number of
* transfers and the number of bytes per transfer.
@@ -1869,10 +1869,10 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
size_t remaining;
int ret = OK;
- dmavdbg("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
+ dmainfo("xdmach: %p paddr: %08x maddr: %08x nbytes: %d\n",
xdmach, (int)paddr, (int)maddr, (int)nbytes);
DEBUGASSERT(xdmach);
- dmavdbg("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
+ dmainfo("llhead: %p lltail: %p\n", xdmach->llhead, xdmach->lltail);
/* The maximum transfer size in bytes depends upon the maximum number of
* transfers and the number of bytes per transfer.
@@ -1944,7 +1944,7 @@ int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
int ret = -EINVAL;
- dmavdbg("xdmach: %p callback: %p arg: %p\n", xdmach, callback, arg);
+ dmainfo("xdmach: %p callback: %p arg: %p\n", xdmach, callback, arg);
DEBUGASSERT(xdmach != NULL);
/* Verify that the DMA has been setup (i.e., at least one entry in the
@@ -1998,7 +1998,7 @@ void sam_dmastop(DMA_HANDLE handle)
struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
irqstate_t flags;
- dmavdbg("xdmach: %p\n", xdmach);
+ dmainfo("xdmach: %p\n", xdmach);
DEBUGASSERT(xdmach != NULL);
flags = enter_critical_section();
@@ -2076,28 +2076,28 @@ void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
{
struct sam_xdmach_s *xdmach = (struct sam_xdmach_s *)handle;
- dmadbg("%s\n", msg);
- dmadbg(" DMA Global Registers:\n");
- dmadbg(" GTYPE[%08x]: %08x\n", SAM_XDMAC_GTYPE, regs->gtype);
- dmadbg(" GCFG[%08x]: %08x\n", SAM_XDMAC_GCFG, regs->gcfg);
- dmadbg(" GWAC[%08x]: %08x\n", SAM_XDMAC_GWAC, regs->gwac);
- dmadbg(" GIM[%08x]: %08x\n", SAM_XDMAC_GIM, regs->gim);
- dmadbg(" GS[%08x]: %08x\n", SAM_XDMAC_GS, regs->gs);
- dmadbg(" GRS[%08x]: %08x\n", SAM_XDMAC_GRS, regs->grs);
- dmadbg(" GWS[%08x]: %08x\n", SAM_XDMAC_GWS, regs->gws);
- dmadbg(" GSWS[%08x]: %08x\n", SAM_XDMAC_GSWS, regs->gsws);
- dmadbg(" DMA Channel Registers:\n");
- dmadbg(" CIM[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIM_OFFSET, regs->cim);
- dmadbg(" CSA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSA_OFFSET, regs->csa);
- dmadbg(" CDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDA_OFFSET, regs->cda);
- dmadbg(" CNDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDA_OFFSET, regs->cnda);
- dmadbg(" CNDC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDC_OFFSET, regs->cndc);
- dmadbg(" CUBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CUBC_OFFSET, regs->cubc);
- dmadbg(" CBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CBC_OFFSET, regs->cbc);
- dmadbg(" CC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CC_OFFSET, regs->cc);
- dmadbg(" CDSMSP[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDSMSP_OFFSET, regs->cdsmsp);
- dmadbg(" CSUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSUS_OFFSET, regs->csus);
- dmadbg(" CDUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDUS_OFFSET, regs->cdus);
+ dmaerr("%s\n", msg);
+ dmaerr(" DMA Global Registers:\n");
+ dmaerr(" GTYPE[%08x]: %08x\n", SAM_XDMAC_GTYPE, regs->gtype);
+ dmaerr(" GCFG[%08x]: %08x\n", SAM_XDMAC_GCFG, regs->gcfg);
+ dmaerr(" GWAC[%08x]: %08x\n", SAM_XDMAC_GWAC, regs->gwac);
+ dmaerr(" GIM[%08x]: %08x\n", SAM_XDMAC_GIM, regs->gim);
+ dmaerr(" GS[%08x]: %08x\n", SAM_XDMAC_GS, regs->gs);
+ dmaerr(" GRS[%08x]: %08x\n", SAM_XDMAC_GRS, regs->grs);
+ dmaerr(" GWS[%08x]: %08x\n", SAM_XDMAC_GWS, regs->gws);
+ dmaerr(" GSWS[%08x]: %08x\n", SAM_XDMAC_GSWS, regs->gsws);
+ dmaerr(" DMA Channel Registers:\n");
+ dmaerr(" CIM[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIM_OFFSET, regs->cim);
+ dmaerr(" CSA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSA_OFFSET, regs->csa);
+ dmaerr(" CDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDA_OFFSET, regs->cda);
+ dmaerr(" CNDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDA_OFFSET, regs->cnda);
+ dmaerr(" CNDC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CNDC_OFFSET, regs->cndc);
+ dmaerr(" CUBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CUBC_OFFSET, regs->cubc);
+ dmaerr(" CBC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CBC_OFFSET, regs->cbc);
+ dmaerr(" CC[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CC_OFFSET, regs->cc);
+ dmaerr(" CDSMSP[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDSMSP_OFFSET, regs->cdsmsp);
+ dmaerr(" CSUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSUS_OFFSET, regs->csus);
+ dmaerr(" CDUS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDUS_OFFSET, regs->cdus);
}
#endif /* CONFIG_DEBUG_DMA */
#endif /* CONFIG_SAMV7_XDMAC */
diff --git a/arch/arm/src/samv7/sam_xdmac.h b/arch/arm/src/samv7/sam_xdmac.h
index fe98581d08b7ecad25863eafbd2a630f483b7456..775591f94a56d5323925ec7f50962ce795eb2eab 100644
--- a/arch/arm/src/samv7/sam_xdmac.h
+++ b/arch/arm/src/samv7/sam_xdmac.h
@@ -52,7 +52,7 @@
/* Configuration ********************************************************************/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_DMA
#endif
diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig
index a9b89773eade9476a4f4b568433f6f6f86de6919..c1e277fc2bf4974ce06b2db30f05b2561fd219a9 100644
--- a/arch/arm/src/stm32/Kconfig
+++ b/arch/arm/src/stm32/Kconfig
@@ -6215,9 +6215,9 @@ endchoice
config STM32_ETHMAC_REGDEBUG
bool "Register-Level Debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
- Enable very low-level register access debug. Depends on DEBUG.
+ Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES.
endmenu
endif
@@ -6307,14 +6307,14 @@ config STM32_USBHOST_REGDEBUG
default n
depends on USBHOST && (STM32_OTGFS || STM32_OTGHS)
---help---
- Enable very low-level register access debug. Depends on DEBUG.
+ Enable very low-level register access debug.
config STM32_USBHOST_PKTDUMP
bool "Packet Dump Debug"
default n
depends on USBHOST && (STM32_OTGFS || STM32_OTGHS)
---help---
- Dump all incoming and outgoing USB packets. Depends on DEBUG.
+ Dump all incoming and outgoing USB packets.
endmenu
diff --git a/arch/arm/src/stm32/Make.defs b/arch/arm/src/stm32/Make.defs
index 0b691c270d2e05c79b67bd1eda98ddf83e99adf8..1a3355d24d446ddf1b0e7e5c0d3c096207cdc355 100644
--- a/arch/arm/src/stm32/Make.defs
+++ b/arch/arm/src/stm32/Make.defs
@@ -247,7 +247,7 @@ ifeq ($(CONFIG_STM32_WWDG),y)
CHIP_CSRCS += stm32_wwdg.c
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
CHIP_CSRCS += stm32_dumpgpio.c
endif
diff --git a/arch/arm/src/stm32/stm32.h b/arch/arm/src/stm32/stm32.h
index 7ae058ee053d99f8d73bf6201329a167b62869cb..f52fa2cb4aa699ede2a8bb0d92d13999f77cfcd2 100644
--- a/arch/arm/src/stm32/stm32.h
+++ b/arch/arm/src/stm32/stm32.h
@@ -56,10 +56,10 @@
/* Additional Configuration *********************************************************/
/* Custom debug settings used in the STM32 port. These are managed by STM32-specific
* logic and not the common logic in include/debug.h. NOTE: Some of these also
- * depend on CONFIG_DEBUG_VERBOSE
+ * depend on CONFIG_DEBUG_INFO
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_DMA
# undef CONFIG_DEBUG_RTC
# undef CONFIG_DEBUG_I2C
diff --git a/arch/arm/src/stm32/stm32_adc.c b/arch/arm/src/stm32/stm32_adc.c
index 5e34110fc91b13b159fe610450bc56d934d0b7c5..d730923a2231f8fad3d49d110539ce1e9b505556 100644
--- a/arch/arm/src/stm32/stm32_adc.c
+++ b/arch/arm/src/stm32/stm32_adc.c
@@ -748,22 +748,22 @@ static void tim_modifyreg(FAR struct stm32_dev_s *priv, int offset,
#ifdef ADC_HAVE_TIMER
static void tim_dumpregs(FAR struct stm32_dev_s *priv, FAR const char *msg)
{
- avdbg("%s:\n", msg);
- avdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
+ ainfo("%s:\n", msg);
+ ainfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
tim_getreg(priv, STM32_GTIM_CR1_OFFSET),
tim_getreg(priv, STM32_GTIM_CR2_OFFSET),
tim_getreg(priv, STM32_GTIM_SMCR_OFFSET),
tim_getreg(priv, STM32_GTIM_DIER_OFFSET));
- avdbg(" SR: %04x EGR: 0000 CCMR1: %04x CCMR2: %04x\n",
+ ainfo(" SR: %04x EGR: 0000 CCMR1: %04x CCMR2: %04x\n",
tim_getreg(priv, STM32_GTIM_SR_OFFSET),
tim_getreg(priv, STM32_GTIM_CCMR1_OFFSET),
tim_getreg(priv, STM32_GTIM_CCMR2_OFFSET));
- avdbg(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
+ ainfo(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
tim_getreg(priv, STM32_GTIM_CCER_OFFSET),
tim_getreg(priv, STM32_GTIM_CNT_OFFSET),
tim_getreg(priv, STM32_GTIM_PSC_OFFSET),
tim_getreg(priv, STM32_GTIM_ARR_OFFSET));
- avdbg(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
+ ainfo(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
tim_getreg(priv, STM32_GTIM_CCR1_OFFSET),
tim_getreg(priv, STM32_GTIM_CCR2_OFFSET),
tim_getreg(priv, STM32_GTIM_CCR3_OFFSET),
@@ -771,7 +771,7 @@ static void tim_dumpregs(FAR struct stm32_dev_s *priv, FAR const char *msg)
#ifndef CONFIG_STM32_STM32L15XX
if (priv->tbase == STM32_TIM1_BASE || priv->tbase == STM32_TIM8_BASE)
{
- avdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
+ ainfo(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
tim_getreg(priv, STM32_ATIM_RCR_OFFSET),
tim_getreg(priv, STM32_ATIM_BDTR_OFFSET),
tim_getreg(priv, STM32_ATIM_DCR_OFFSET),
@@ -779,7 +779,7 @@ static void tim_dumpregs(FAR struct stm32_dev_s *priv, FAR const char *msg)
}
else
{
- avdbg(" DCR: %04x DMAR: %04x\n",
+ ainfo(" DCR: %04x DMAR: %04x\n",
tim_getreg(priv, STM32_GTIM_DCR_OFFSET),
tim_getreg(priv, STM32_GTIM_DMAR_OFFSET));
}
@@ -804,7 +804,7 @@ static void tim_dumpregs(FAR struct stm32_dev_s *priv, FAR const char *msg)
#ifdef ADC_HAVE_TIMER
static void adc_timstart(FAR struct stm32_dev_s *priv, bool enable)
{
- avdbg("enable: %d\n", enable ? 1 : 0);
+ ainfo("enable: %d\n", enable ? 1 : 0);
if (enable)
{
@@ -873,7 +873,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
* position.
*/
- avdbg("Initializing timers extsel = 0x%08x\n", priv->extsel);
+ ainfo("Initializing timers extsel = 0x%08x\n", priv->extsel);
adc_modifyreg(priv, STM32_ADC_EXTREG_OFFSET,
ADC_EXTREG_EXTEN_MASK | ADC_EXTREG_EXTSEL_MASK,
@@ -906,7 +906,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
if (prescaler < 1)
{
- adbg("WARNING: Prescaler underflowed.\n");
+ aerr("WARNING: Prescaler underflowed.\n");
prescaler = 1;
}
@@ -914,7 +914,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
else if (prescaler > 65536)
{
- adbg("WARNING: Prescaler overflowed.\n");
+ aerr("WARNING: Prescaler overflowed.\n");
prescaler = 65536;
}
@@ -923,12 +923,12 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
reload = timclk / priv->freq;
if (reload < 1)
{
- adbg("WARNING: Reload value underflowed.\n");
+ aerr("WARNING: Reload value underflowed.\n");
reload = 1;
}
else if (reload > 65535)
{
- adbg("WARNING: Reload value overflowed.\n");
+ aerr("WARNING: Reload value overflowed.\n");
reload = 65535;
}
@@ -1070,7 +1070,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
break;
default:
- adbg("No such trigger: %d\n", priv->trigger);
+ aerr("No such trigger: %d\n", priv->trigger);
return -EINVAL;
}
@@ -1205,7 +1205,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
#if defined(CONFIG_STM32_STM32F10XX)
static void adc_startconv(FAR struct stm32_dev_s *priv, bool enable)
{
- avdbg("enable: %d\n", enable ? 1 : 0);
+ ainfo("enable: %d\n", enable ? 1 : 0);
if (!enable)
{
@@ -1227,7 +1227,7 @@ static void adc_startconv(FAR struct stm32_dev_s *priv, bool enable)
{
uint32_t regval;
- avdbg("enable: %d\n", enable ? 1 : 0);
+ ainfo("enable: %d\n", enable ? 1 : 0);
if (enable)
{
@@ -1256,7 +1256,7 @@ static void adc_startconv(FAR struct stm32_dev_s *priv, bool enable)
#else
static void adc_startconv(FAR struct stm32_dev_s *priv, bool enable)
{
- avdbg("enable: %d\n", enable ? 1 : 0);
+ ainfo("enable: %d\n", enable ? 1 : 0);
if (enable)
{
@@ -1364,7 +1364,7 @@ static void adc_power_down_idle(FAR struct stm32_dev_s *priv, bool pdi_high)
{
uint32_t regval;
- avdbg("PDI: %d\n", pdi_high ? 1 : 0);
+ ainfo("PDI: %d\n", pdi_high ? 1 : 0);
regval = adc_getreg(priv, STM32_ADC_CR1_OFFSET);
@@ -1405,7 +1405,7 @@ static void adc_power_down_delay(FAR struct stm32_dev_s *priv, bool pdd_high)
{
uint32_t regval;
- avdbg("PDD: %d\n", pdd_high ? 1 : 0);
+ ainfo("PDD: %d\n", pdd_high ? 1 : 0);
regval = adc_getreg(priv, STM32_ADC_CR1_OFFSET);
@@ -1445,7 +1445,7 @@ static void adc_power_down_delay(FAR struct stm32_dev_s *priv, bool pdd_high)
static void adc_dels_after_conversion(FAR struct stm32_dev_s *priv,
uint32_t delay)
{
- avdbg("Delay selected: 0x%08x\n", delay);
+ ainfo("Delay selected: 0x%08x\n", delay);
adc_modifyreg(priv, STM32_ADC_CR2_OFFSET, ADC_CR2_DELS_MASK, delay);
}
@@ -1471,7 +1471,7 @@ static void adc_dels_after_conversion(FAR struct stm32_dev_s *priv,
static void adc_select_ch_bank(FAR struct stm32_dev_s *priv,
bool chb_selected)
{
- avdbg("Bank of channels selected: %c\n", chb_selected ? 'B' : 'A');
+ ainfo("Bank of channels selected: %c\n", chb_selected ? 'B' : 'A');
if (chb_selected)
{
@@ -1505,7 +1505,7 @@ static void adc_enable(FAR struct stm32_dev_s *priv, bool enable)
{
uint32_t regval;
- avdbg("enable: %d\n", enable ? 1 : 0);
+ ainfo("enable: %d\n", enable ? 1 : 0);
regval = adc_getreg(priv, STM32_ADC_CR_OFFSET);
@@ -1543,7 +1543,7 @@ static void adc_enable(FAR struct stm32_dev_s *priv, bool enable)
bool enabled = false;
#endif
- avdbg("enable: %d\n", enable ? 1 : 0);
+ ainfo("enable: %d\n", enable ? 1 : 0);
if (!enabled && enable)
{
@@ -1717,7 +1717,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
int ret;
#endif
- allvdbg("intf: %d\n", priv->intf);
+ allinfo("intf: %d\n", priv->intf);
flags = enter_critical_section();
#if defined(CONFIG_STM32_STM32L15XX) && \
@@ -2002,7 +2002,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
ret = adc_timinit(priv);
if (ret < 0)
{
- adbg("adc_timinit failed: %d\n", ret);
+ aerr("adc_timinit failed: %d\n", ret);
}
}
#ifndef CONFIG_ADC_NO_STARTUP_CONV
@@ -2018,26 +2018,26 @@ static void adc_reset(FAR struct adc_dev_s *dev)
leave_critical_section(flags);
#ifdef CONFIG_STM32_STM32F30XX
- avdbg("ISR: 0x%08x CR: 0x%08x CFGR: 0x%08x\n",
+ ainfo("ISR: 0x%08x CR: 0x%08x CFGR: 0x%08x\n",
adc_getreg(priv, STM32_ADC_ISR_OFFSET),
adc_getreg(priv, STM32_ADC_CR_OFFSET),
adc_getreg(priv, STM32_ADC_CFGR_OFFSET));
#else
- avdbg("SR: 0x%08x CR1: 0x%08x CR2: 0x%08x\n",
+ ainfo("SR: 0x%08x CR1: 0x%08x CR2: 0x%08x\n",
adc_getreg(priv, STM32_ADC_SR_OFFSET),
adc_getreg(priv, STM32_ADC_CR1_OFFSET),
adc_getreg(priv, STM32_ADC_CR2_OFFSET));
#endif
- avdbg("SQR1: 0x%08x SQR2: 0x%08x SQR3: 0x%08x\n",
+ ainfo("SQR1: 0x%08x SQR2: 0x%08x SQR3: 0x%08x\n",
adc_getreg(priv, STM32_ADC_SQR1_OFFSET),
adc_getreg(priv, STM32_ADC_SQR2_OFFSET),
adc_getreg(priv, STM32_ADC_SQR3_OFFSET));
#if defined(CONFIG_STM32_STM32F30XX)
- avdbg("SQR4: 0x%08x\n", adc_getreg(priv, STM32_ADC_SQR4_OFFSET));
+ ainfo("SQR4: 0x%08x\n", adc_getreg(priv, STM32_ADC_SQR4_OFFSET));
#elif defined(CONFIG_STM32_STM32L15XX)
- avdbg("SQR4: 0x%08x SQR5: 0x%08x\n",
+ ainfo("SQR4: 0x%08x SQR5: 0x%08x\n",
adc_getreg(priv, STM32_ADC_SQR4_OFFSET)
adc_getreg(priv, STM32_ADC_SQR5_OFFSET));
#endif
@@ -2045,16 +2045,16 @@ static void adc_reset(FAR struct adc_dev_s *dev)
#if defined(CONFIG_STM32_STM32F30XX)
if (priv->base == STM32_ADC1_BASE || priv->base == STM32_ADC2_BASE)
{
- avdbg("CCR: 0x%08x\n", getreg32(STM32_ADC12_CCR));
+ ainfo("CCR: 0x%08x\n", getreg32(STM32_ADC12_CCR));
}
else
{
- avdbg("CCR: 0x%08x\n", getreg32(STM32_ADC34_CCR));
+ ainfo("CCR: 0x%08x\n", getreg32(STM32_ADC34_CCR));
}
#elif defined(CONFIG_STM32_STM32F20XX) || \
defined(CONFIG_STM32_STM32F40XX) || \
defined(CONFIG_STM32_STM32L15XX)
- avdbg("CCR: 0x%08x\n", getreg32(STM32_ADC_CCR));
+ ainfo("CCR: 0x%08x\n", getreg32(STM32_ADC_CCR));
#endif
}
@@ -2107,7 +2107,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
ret = irq_attach(priv->irq, priv->isr);
if (ret < 0)
{
- avdbg("irq_attach failed: %d\n", ret);
+ ainfo("irq_attach failed: %d\n", ret);
return ret;
}
@@ -2117,7 +2117,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
/* Enable the ADC interrupt */
- avdbg("Enable the ADC interrupt: irq=%d\n", priv->irq);
+ ainfo("Enable the ADC interrupt: irq=%d\n", priv->irq);
up_enable_irq(priv->irq);
return ret;
@@ -2172,7 +2172,7 @@ static void adc_rxint(FAR struct adc_dev_s *dev, bool enable)
{
FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
- avdbg("intf: %d enable: %d\n", priv->intf, enable ? 1 : 0);
+ ainfo("intf: %d enable: %d\n", priv->intf, enable ? 1 : 0);
if (enable)
{
@@ -2219,7 +2219,7 @@ static void adc_ioc_enable_tvref_register(FAR struct adc_dev_s *dev,
stm32_modifyreg32(STM32_ADC_CCR, ADC_CCR_TSVREFE, 0);
}
- avdbg("STM32_ADC_CCR value: 0x%08x\n", getreg32(STM32_ADC_CCR));
+ ainfo("STM32_ADC_CCR value: 0x%08x\n", getreg32(STM32_ADC_CCR));
}
#endif
@@ -2263,7 +2263,7 @@ static int adc_ioc_change_sleep_between_opers(FAR struct adc_dev_s *dev,
break;
default:
- avdbg("unknown cmd: %d\n", cmd);
+ ainfo("unknown cmd: %d\n", cmd);
break;
}
@@ -2436,7 +2436,7 @@ static int adc_ioc_change_ints(FAR struct adc_dev_s *dev, int cmd, bool arg)
break;
default:
- avdbg("unknown cmd: %d\n", cmd);
+ ainfo("unknown cmd: %d\n", cmd);
break;
}
@@ -2680,7 +2680,7 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
#endif /* CONFIG_STM32_STM32L15XX */
default:
- adbg("ERROR: Unknown cmd: %d\n", cmd);
+ aerr("ERROR: Unknown cmd: %d\n", cmd);
ret = -ENOTTY;
break;
}
@@ -2718,12 +2718,12 @@ static int adc_interrupt(FAR struct adc_dev_s *dev)
if ((regval & ADC_ISR_AWD) != 0)
{
- alldbg("WARNING: Analog Watchdog, Value converted out of range!\n");
+ allerr("WARNING: Analog Watchdog, Value converted out of range!\n");
}
if ((regval & ADC_ISR_OVR) != 0)
{
- alldbg("WARNING: Overrun has occurred!\n");
+ allerr("WARNING: Overrun has occurred!\n");
}
/* EOC: End of conversion */
@@ -2983,36 +2983,36 @@ struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist,
FAR struct adc_dev_s *dev;
FAR struct stm32_dev_s *priv;
- avdbg("intf: %d cchannels: %d\n", intf, cchannels);
+ ainfo("intf: %d cchannels: %d\n", intf, cchannels);
switch (intf)
{
#ifdef CONFIG_STM32_ADC1
case 1:
- avdbg("ADC1 selected\n");
+ ainfo("ADC1 selected\n");
dev = &g_adcdev1;
break;
#endif
#ifdef CONFIG_STM32_ADC2
case 2:
- avdbg("ADC2 selected\n");
+ ainfo("ADC2 selected\n");
dev = &g_adcdev2;
break;
#endif
#ifdef CONFIG_STM32_ADC3
case 3:
- avdbg("ADC3 selected\n");
+ ainfo("ADC3 selected\n");
dev = &g_adcdev3;
break;
#endif
#ifdef CONFIG_STM32_ADC4
case 4:
- avdbg("ADC4 selected\n");
+ ainfo("ADC4 selected\n");
dev = &g_adcdev4;
break;
#endif
default:
- adbg("No ADC interface defined\n");
+ aerr("No ADC interface defined\n");
return NULL;
}
diff --git a/arch/arm/src/stm32/stm32_allocateheap.c b/arch/arm/src/stm32/stm32_allocateheap.c
index 8a844b6d22d21f7fc357f921d2bbd202ef0ade2c..02ba165a13e8de4fdf3961df2a49046e20cb5920 100644
--- a/arch/arm/src/stm32/stm32_allocateheap.c
+++ b/arch/arm/src/stm32/stm32_allocateheap.c
@@ -41,6 +41,7 @@
#include
#include
+#include
#include
#include
diff --git a/arch/arm/src/stm32/stm32_bbsram.c b/arch/arm/src/stm32/stm32_bbsram.c
index 507f5a4d4a22b5e136fd1f3b7b1f5980b9da843d..0266f6beddba5860989cf9b15b3876eeaef3b173 100644
--- a/arch/arm/src/stm32/stm32_bbsram.c
+++ b/arch/arm/src/stm32/stm32_bbsram.c
@@ -183,14 +183,14 @@ static void stm32_bbsram_rd(void)
static void stm32_bbsram_dump(FAR struct bbsramfh_s *bbf, char *op)
{
BBSRAM_DEBUG_READ();
- lldbg("%s:\n", op);
- lldbg(" File Address:0x%8x\n", bbf);
- lldbg(" crc:0x%8x\n", bbf->crc);
- lldbg(" fileno:%d\n", (int) bbf->fileno);
- lldbg(" dirty:%d\n", (int) bbf->dirty);
- lldbg(" length:%d\n", (int) bbf->len);
- lldbg(" time:%ld:%ld\n", bbf->lastwrite.tv_sec, bbf->lastwrite.tv_nsec);
- lldbg(" data: 0x%2x 0x%2x 0x%2x 0x%2x 0x%2x\n",
+ llerr("%s:\n", op);
+ llerr(" File Address:0x%8x\n", bbf);
+ llerr(" crc:0x%8x\n", bbf->crc);
+ llerr(" fileno:%d\n", (int) bbf->fileno);
+ llerr(" dirty:%d\n", (int) bbf->dirty);
+ llerr(" length:%d\n", (int) bbf->len);
+ llerr(" time:%ld:%ld\n", bbf->lastwrite.tv_sec, bbf->lastwrite.tv_nsec);
+ llerr(" data: 0x%2x 0x%2x 0x%2x 0x%2x 0x%2x\n",
bbf->data[0], bbf->data[1], bbf->data[2], bbf->data[3], bbf->data[4]);
}
#endif
diff --git a/arch/arm/src/stm32/stm32_can.c b/arch/arm/src/stm32/stm32_can.c
index 8cb61decf14778fad1de5dd64b0803defa42196a..34c326cfe81cbc138d18fc135571ead4cf1fed0f 100644
--- a/arch/arm/src/stm32/stm32_can.c
+++ b/arch/arm/src/stm32/stm32_can.c
@@ -85,18 +85,18 @@
/* Non-standard debug that may be enabled just for testing CAN */
#ifdef CONFIG_DEBUG_CAN
-# define candbg dbg
-# define canvdbg vdbg
-# define canlldbg lldbg
-# define canllvdbg llvdbg
+# define canerr err
+# define caninfo info
+# define canllerr llerr
+# define canllinfo llinfo
#else
-# define candbg(x...)
-# define canvdbg(x...)
-# define canlldbg(x...)
-# define canllvdbg(x...)
+# define canerr(x...)
+# define caninfo(x...)
+# define canllerr(x...)
+# define canllinfo(x...)
#endif
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_CAN)
+#if !defined(CONFIG_DEBUG_FEATURES) || !defined(CONFIG_DEBUG_CAN)
# undef CONFIG_CAN_REGDEBUG
#endif
@@ -270,7 +270,7 @@ static uint32_t can_vgetreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -287,7 +287,7 @@ static uint32_t can_vgetreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -299,7 +299,7 @@ static uint32_t can_vgetreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
@@ -349,7 +349,7 @@ static void can_vputreg(uint32_t addr, uint32_t value)
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, value);
+ llerr("%08x<-%08x\n", addr, value);
/* Write the value */
@@ -402,25 +402,25 @@ static void can_dumpctrlregs(FAR struct stm32_can_s *priv,
{
if (msg)
{
- canlldbg("Control Registers: %s\n", msg);
+ canllerr("Control Registers: %s\n", msg);
}
else
{
- canlldbg("Control Registers:\n");
+ canllerr("Control Registers:\n");
}
/* CAN control and status registers */
- lldbg(" MCR: %08x MSR: %08x TSR: %08x\n",
+ llerr(" MCR: %08x MSR: %08x TSR: %08x\n",
getreg32(priv->base + STM32_CAN_MCR_OFFSET),
getreg32(priv->base + STM32_CAN_MSR_OFFSET),
getreg32(priv->base + STM32_CAN_TSR_OFFSET));
- lldbg(" RF0R: %08x RF1R: %08x\n",
+ llerr(" RF0R: %08x RF1R: %08x\n",
getreg32(priv->base + STM32_CAN_RF0R_OFFSET),
getreg32(priv->base + STM32_CAN_RF1R_OFFSET));
- lldbg(" IER: %08x ESR: %08x BTR: %08x\n",
+ llerr(" IER: %08x ESR: %08x BTR: %08x\n",
getreg32(priv->base + STM32_CAN_IER_OFFSET),
getreg32(priv->base + STM32_CAN_ESR_OFFSET),
getreg32(priv->base + STM32_CAN_BTR_OFFSET));
@@ -447,40 +447,40 @@ static void can_dumpmbregs(FAR struct stm32_can_s *priv,
{
if (msg)
{
- canlldbg("Mailbox Registers: %s\n", msg);
+ canllerr("Mailbox Registers: %s\n", msg);
}
else
{
- canlldbg("Mailbox Registers:\n");
+ canllerr("Mailbox Registers:\n");
}
/* CAN mailbox registers (3 TX and 2 RX) */
- lldbg(" TI0R: %08x TDT0R: %08x TDL0R: %08x TDH0R: %08x\n",
+ llerr(" TI0R: %08x TDT0R: %08x TDL0R: %08x TDH0R: %08x\n",
getreg32(priv->base + STM32_CAN_TI0R_OFFSET),
getreg32(priv->base + STM32_CAN_TDT0R_OFFSET),
getreg32(priv->base + STM32_CAN_TDL0R_OFFSET),
getreg32(priv->base + STM32_CAN_TDH0R_OFFSET));
- lldbg(" TI1R: %08x TDT1R: %08x TDL1R: %08x TDH1R: %08x\n",
+ llerr(" TI1R: %08x TDT1R: %08x TDL1R: %08x TDH1R: %08x\n",
getreg32(priv->base + STM32_CAN_TI1R_OFFSET),
getreg32(priv->base + STM32_CAN_TDT1R_OFFSET),
getreg32(priv->base + STM32_CAN_TDL1R_OFFSET),
getreg32(priv->base + STM32_CAN_TDH1R_OFFSET));
- lldbg(" TI2R: %08x TDT2R: %08x TDL2R: %08x TDH2R: %08x\n",
+ llerr(" TI2R: %08x TDT2R: %08x TDL2R: %08x TDH2R: %08x\n",
getreg32(priv->base + STM32_CAN_TI2R_OFFSET),
getreg32(priv->base + STM32_CAN_TDT2R_OFFSET),
getreg32(priv->base + STM32_CAN_TDL2R_OFFSET),
getreg32(priv->base + STM32_CAN_TDH2R_OFFSET));
- lldbg(" RI0R: %08x RDT0R: %08x RDL0R: %08x RDH0R: %08x\n",
+ llerr(" RI0R: %08x RDT0R: %08x RDL0R: %08x RDH0R: %08x\n",
getreg32(priv->base + STM32_CAN_RI0R_OFFSET),
getreg32(priv->base + STM32_CAN_RDT0R_OFFSET),
getreg32(priv->base + STM32_CAN_RDL0R_OFFSET),
getreg32(priv->base + STM32_CAN_RDH0R_OFFSET));
- lldbg(" RI1R: %08x RDT1R: %08x RDL1R: %08x RDH1R: %08x\n",
+ llerr(" RI1R: %08x RDT1R: %08x RDL1R: %08x RDH1R: %08x\n",
getreg32(priv->base + STM32_CAN_RI1R_OFFSET),
getreg32(priv->base + STM32_CAN_RDT1R_OFFSET),
getreg32(priv->base + STM32_CAN_RDL1R_OFFSET),
@@ -510,14 +510,14 @@ static void can_dumpfiltregs(FAR struct stm32_can_s *priv,
if (msg)
{
- canlldbg("Filter Registers: %s\n", msg);
+ canllerr("Filter Registers: %s\n", msg);
}
else
{
- canlldbg("Filter Registers:\n");
+ canllerr("Filter Registers:\n");
}
- lldbg(" FMR: %08x FM1R: %08x FS1R: %08x FFA1R: %08x FA1R: %08x\n",
+ llerr(" FMR: %08x FM1R: %08x FS1R: %08x FFA1R: %08x FA1R: %08x\n",
getreg32(priv->base + STM32_CAN_FMR_OFFSET),
getreg32(priv->base + STM32_CAN_FM1R_OFFSET),
getreg32(priv->base + STM32_CAN_FS1R_OFFSET),
@@ -526,7 +526,7 @@ static void can_dumpfiltregs(FAR struct stm32_can_s *priv,
for (i = 0; i < CAN_NFILTERS; i++)
{
- lldbg(" F%dR1: %08x F%dR2: %08x\n",
+ llerr(" F%dR1: %08x F%dR2: %08x\n",
i, getreg32(priv->base + STM32_CAN_FIR_OFFSET(i, 1)),
i, getreg32(priv->base + STM32_CAN_FIR_OFFSET(i, 2)));
}
@@ -555,7 +555,7 @@ static void can_reset(FAR struct can_dev_s *dev)
uint32_t regbit = 0;
irqstate_t flags;
- canllvdbg("CAN%d\n", priv->port);
+ canllinfo("CAN%d\n", priv->port);
/* Get the bits in the AHB1RSTR register needed to reset this CAN device */
@@ -574,7 +574,7 @@ static void can_reset(FAR struct can_dev_s *dev)
else
#endif
{
- canlldbg("Unsupported port %d\n", priv->port);
+ canllerr("Unsupported port %d\n", priv->port);
return;
}
@@ -617,7 +617,7 @@ static int can_setup(FAR struct can_dev_s *dev)
FAR struct stm32_can_s *priv = dev->cd_priv;
int ret;
- canllvdbg("CAN%d RX0 irq: %d RX1 irq: %d TX irq: %d\n",
+ canllinfo("CAN%d RX0 irq: %d RX1 irq: %d TX irq: %d\n",
priv->port, priv->canrx[0], priv->canrx[1], priv->cantx);
/* CAN cell initialization */
@@ -625,7 +625,7 @@ static int can_setup(FAR struct can_dev_s *dev)
ret = can_cellinit(priv);
if (ret < 0)
{
- canlldbg("CAN%d cell initialization failed: %d\n", priv->port, ret);
+ canllerr("CAN%d cell initialization failed: %d\n", priv->port, ret);
return ret;
}
@@ -637,7 +637,7 @@ static int can_setup(FAR struct can_dev_s *dev)
ret = can_filterinit(priv);
if (ret < 0)
{
- canlldbg("CAN%d filter initialization failed: %d\n", priv->port, ret);
+ canllerr("CAN%d filter initialization failed: %d\n", priv->port, ret);
return ret;
}
can_dumpfiltregs(priv, "After filter initialization");
@@ -649,7 +649,7 @@ static int can_setup(FAR struct can_dev_s *dev)
ret = irq_attach(priv->canrx[0], can_rx0interrupt);
if (ret < 0)
{
- canlldbg("Failed to attach CAN%d RX0 IRQ (%d)",
+ canllerr("Failed to attach CAN%d RX0 IRQ (%d)",
priv->port, priv->canrx[0]);
return ret;
}
@@ -657,7 +657,7 @@ static int can_setup(FAR struct can_dev_s *dev)
ret = irq_attach(priv->canrx[1], can_rx1interrupt);
if (ret < 0)
{
- canlldbg("Failed to attach CAN%d RX1 IRQ (%d)",
+ canllerr("Failed to attach CAN%d RX1 IRQ (%d)",
priv->port, priv->canrx[1]);
return ret;
}
@@ -665,7 +665,7 @@ static int can_setup(FAR struct can_dev_s *dev)
ret = irq_attach(priv->cantx, can_txinterrupt);
if (ret < 0)
{
- canlldbg("Failed to attach CAN%d TX IRQ (%d)",
+ canllerr("Failed to attach CAN%d TX IRQ (%d)",
priv->port, priv->cantx);
return ret;
}
@@ -700,7 +700,7 @@ static void can_shutdown(FAR struct can_dev_s *dev)
{
FAR struct stm32_can_s *priv = dev->cd_priv;
- canllvdbg("CAN%d\n", priv->port);
+ canllinfo("CAN%d\n", priv->port);
/* Disable the RX FIFO 0/1 and TX interrupts */
@@ -738,7 +738,7 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
FAR struct stm32_can_s *priv = dev->cd_priv;
uint32_t regval;
- canllvdbg("CAN%d enable: %d\n", priv->port, enable);
+ canllinfo("CAN%d enable: %d\n", priv->port, enable);
/* Enable/disable the FIFO 0/1 message pending interrupt */
@@ -773,7 +773,7 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
FAR struct stm32_can_s *priv = dev->cd_priv;
uint32_t regval;
- canllvdbg("CAN%d enable: %d\n", priv->port, enable);
+ canllinfo("CAN%d enable: %d\n", priv->port, enable);
/* Support only disabling the transmit mailbox interrupt */
@@ -858,7 +858,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
int dlc;
int txmb;
- canllvdbg("CAN%d ID: %d DLC: %d\n",
+ canllinfo("CAN%d ID: %d DLC: %d\n",
priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
/* Select one empty transmit mailbox */
@@ -878,7 +878,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
}
else
{
- canlldbg("ERROR: No available mailbox\n");
+ canllerr("ERROR: No available mailbox\n");
return -EBUSY;
}
@@ -1011,7 +1011,7 @@ static bool can_txready(FAR struct can_dev_s *dev)
/* Return true if any mailbox is available */
regval = can_getreg(priv, STM32_CAN_TSR_OFFSET);
- canllvdbg("CAN%d TSR: %08x\n", priv->port, regval);
+ canllinfo("CAN%d TSR: %08x\n", priv->port, regval);
return (regval & CAN_ALL_MAILBOXES) != 0;
}
@@ -1042,7 +1042,7 @@ static bool can_txempty(FAR struct can_dev_s *dev)
/* Return true if all mailboxes are available */
regval = can_getreg(priv, STM32_CAN_TSR_OFFSET);
- canllvdbg("CAN%d TSR: %08x\n", priv->port, regval);
+ canllinfo("CAN%d TSR: %08x\n", priv->port, regval);
return (regval & CAN_ALL_MAILBOXES) == CAN_ALL_MAILBOXES;
}
@@ -1099,7 +1099,7 @@ static int can_rxinterrupt(int irq, FAR void *context, int rxmb)
npending = (regval & CAN_RFR_FMP_MASK) >> CAN_RFR_FMP_SHIFT;
if (npending < 1)
{
- canlldbg("WARNING: No messages pending\n");
+ canllerr("WARNING: No messages pending\n");
return OK;
}
@@ -1130,7 +1130,7 @@ static int can_rxinterrupt(int irq, FAR void *context, int rxmb)
#else
if ((regval & CAN_RIR_IDE) != 0)
{
- canlldbg("ERROR: Received message with extended identifier. Dropped\n");
+ canllerr("ERROR: Received message with extended identifier. Dropped\n");
ret = -ENOSYS;
goto errout;
}
@@ -1394,7 +1394,7 @@ static int can_bittiming(FAR struct stm32_can_s *priv)
uint32_t ts1;
uint32_t ts2;
- canllvdbg("CAN%d PCLK1: %d baud: %d\n",
+ canllinfo("CAN%d PCLK1: %d baud: %d\n",
priv->port, STM32_PCLK1_FREQUENCY, priv->baud);
/* Try to get CAN_BIT_QUANTA quanta in one bit_time.
@@ -1447,7 +1447,7 @@ static int can_bittiming(FAR struct stm32_can_s *priv)
DEBUGASSERT(brp >= 1 && brp <= CAN_BTR_BRP_MAX);
}
- canllvdbg("TS1: %d TS2: %d BRP: %d\n", ts1, ts2, brp);
+ canllinfo("TS1: %d TS2: %d BRP: %d\n", ts1, ts2, brp);
/* Configure bit timing. This also does the following, less obvious
* things. Unless loopback mode is enabled, it:
@@ -1490,7 +1490,7 @@ static int can_cellinit(FAR struct stm32_can_s *priv)
uint32_t regval;
int ret;
- canllvdbg("CAN%d\n", priv->port);
+ canllinfo("CAN%d\n", priv->port);
/* Exit from sleep mode */
@@ -1520,7 +1520,7 @@ static int can_cellinit(FAR struct stm32_can_s *priv)
if (timeout < 1)
{
- canlldbg("ERROR: Timed out waiting to enter initialization mode\n");
+ canllerr("ERROR: Timed out waiting to enter initialization mode\n");
return -ETIMEDOUT;
}
@@ -1544,7 +1544,7 @@ static int can_cellinit(FAR struct stm32_can_s *priv)
ret = can_bittiming(priv);
if (ret < 0)
{
- canlldbg("ERROR: Failed to set bit timing: %d\n", ret);
+ canllerr("ERROR: Failed to set bit timing: %d\n", ret);
return ret;
}
@@ -1571,7 +1571,7 @@ static int can_cellinit(FAR struct stm32_can_s *priv)
if (timeout < 1)
{
- canlldbg("ERROR: Timed out waiting to exit initialization mode: %08x\n",
+ canllerr("ERROR: Timed out waiting to exit initialization mode: %08x\n",
regval);
return -ETIMEDOUT;
}
@@ -1616,7 +1616,7 @@ static int can_filterinit(FAR struct stm32_can_s *priv)
uint32_t regval;
uint32_t bitmask;
- canllvdbg("CAN%d filter: %d\n", priv->port, priv->filter);
+ canllinfo("CAN%d filter: %d\n", priv->port, priv->filter);
/* Get the bitmask associated with the filter used by this CAN block */
@@ -1706,7 +1706,7 @@ FAR struct can_dev_s *stm32_caninitialize(int port)
{
FAR struct can_dev_s *dev = NULL;
- canvdbg("CAN%d\n", port);
+ caninfo("CAN%d\n", port);
/* NOTE: Peripherical clocking for CAN1 and/or CAN2 was already provided
* by stm32_clockconfig() early in the reset sequence.
@@ -1745,7 +1745,7 @@ FAR struct can_dev_s *stm32_caninitialize(int port)
else
#endif
{
- candbg("ERROR: Unsupported port %d\n", port);
+ canerr("ERROR: Unsupported port %d\n", port);
return NULL;
}
diff --git a/arch/arm/src/stm32/stm32_dac.c b/arch/arm/src/stm32/stm32_dac.c
index 4c1a985c322822afe043bb476c10210e123fb92c..a2cfcea92ff738c188f4ede0ae33fe937d4ed603 100644
--- a/arch/arm/src/stm32/stm32_dac.c
+++ b/arch/arm/src/stm32/stm32_dac.c
@@ -852,7 +852,7 @@ static int dac_timinit(FAR struct stm32_chan_s *chan)
break;
#endif
default:
- adbg("Could not enable timer\n");
+ aerr("Could not enable timer\n");
break;
}
@@ -1016,7 +1016,7 @@ static int dac_chaninit(FAR struct stm32_chan_s *chan)
chan->dma = stm32_dmachannel(chan->dmachan);
if (!chan->dma)
{
- adbg("Failed to allocate a DMA channel\n");
+ aerr("Failed to allocate a DMA channel\n");
return -EBUSY;
}
@@ -1025,7 +1025,7 @@ static int dac_chaninit(FAR struct stm32_chan_s *chan)
ret = dac_timinit(chan);
if (ret < 0)
{
- adbg("Failed to initialize the DMA timer: %d\n", ret);
+ aerr("Failed to initialize the DMA timer: %d\n", ret);
return ret;
}
}
@@ -1114,7 +1114,7 @@ FAR struct dac_dev_s *stm32_dacinitialize(int intf)
#ifdef CONFIG_STM32_DAC1
if (intf == 1)
{
- avdbg("DAC1 Selected\n");
+ ainfo("DAC1 Selected\n");
dev = &g_dac1dev;
}
else
@@ -1122,13 +1122,13 @@ FAR struct dac_dev_s *stm32_dacinitialize(int intf)
#ifdef CONFIG_STM32_DAC2
if (intf == 2)
{
- avdbg("DAC2 Selected\n");
+ ainfo("DAC2 Selected\n");
dev = &g_dac2dev;
}
else
#endif
{
- adbg("No such DAC interface: %d\n", intf);
+ aerr("No such DAC interface: %d\n", intf);
errno = ENODEV;
return NULL;
}
@@ -1138,7 +1138,7 @@ FAR struct dac_dev_s *stm32_dacinitialize(int intf)
ret = dac_blockinit();
if (ret < 0)
{
- adbg("Failed to initialize the DAC block: %d\n", ret);
+ aerr("Failed to initialize the DAC block: %d\n", ret);
errno = -ret;
return NULL;
}
@@ -1149,7 +1149,7 @@ FAR struct dac_dev_s *stm32_dacinitialize(int intf)
ret = dac_chaninit(chan);
if (ret < 0)
{
- adbg("Failed to initialize DAC channel %d: %d\n", intf, ret);
+ aerr("Failed to initialize DAC channel %d: %d\n", intf, ret);
errno = -ret;
return NULL;
}
diff --git a/arch/arm/src/stm32/stm32_dma.h b/arch/arm/src/stm32/stm32_dma.h
index b2f968fe1f7c0e6110b1d60cf43f342c17d14d0a..d26428c35bbc758d714345ed998aff76f7614a51 100644
--- a/arch/arm/src/stm32/stm32_dma.h
+++ b/arch/arm/src/stm32/stm32_dma.h
@@ -104,7 +104,7 @@ typedef FAR void *DMA_HANDLE;
typedef void (*dma_callback_t)(DMA_HANDLE handle, uint8_t status, void *arg);
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
#if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || \
defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
struct stm32_dmaregs_s
@@ -299,7 +299,7 @@ bool stm32_dmacapable(uintptr_t maddr, uint32_t count, uint32_t ccr);
*
****************************************************************************/
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs);
#else
# define stm32_dmasample(handle,regs)
@@ -316,7 +316,7 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs);
*
****************************************************************************/
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
const char *msg);
#else
diff --git a/arch/arm/src/stm32/stm32_dma2d.c b/arch/arm/src/stm32/stm32_dma2d.c
index e951e8916dbeb36546b098a793d07b564ab5af4b..06325fe28dedc5d32148e468408ba8325fdffcc3 100644
--- a/arch/arm/src/stm32/stm32_dma2d.c
+++ b/arch/arm/src/stm32/stm32_dma2d.c
@@ -137,11 +137,11 @@
/* Debug option */
#ifdef CONFIG_STM32_DMA2D_REGDEBUG
-# define regdbg dbg
-# define regvdbg vdbg
+# define regerr err
+# define reginfo info
#else
-# define regdbg(x...)
-# define regvdbg(x...)
+# define regerr(x...)
+# define reginfo(x...)
#endif
/* check clut support */
@@ -408,7 +408,7 @@ static void stm32_dma2d_control(uint32_t setbits, uint32_t clrbits)
{
uint32_t cr;
- gvdbg("setbits=%08x, clrbits=%08x\n", setbits, clrbits);
+ ginfo("setbits=%08x, clrbits=%08x\n", setbits, clrbits);
cr = getreg32(STM32_DMA2D_CR);
cr &= ~clrbits;
@@ -429,7 +429,7 @@ static int stm32_dma2dirq(int irq, void *context)
uint32_t regval = getreg32(STM32_DMA2D_ISR);
FAR struct stm32_interrupt_s *priv = &g_interrupt;
- regvdbg("irq = %d, regval = %08x\n", irq, regval);
+ reginfo("irq = %d, regval = %08x\n", irq, regval);
if (regval & DMA2D_ISR_TCIF)
{
@@ -469,7 +469,7 @@ static int stm32_dma2dirq(int irq, void *context)
if (ret != OK)
{
- dbg("sem_post() failed\n");
+ err("sem_post() failed\n");
return ret;
}
}
@@ -512,7 +512,7 @@ static int stm32_dma2d_waitforirq(void)
if (ret != OK)
{
- dbg("sem_wait() failed\n");
+ err("sem_wait() failed\n");
return ret;
}
}
@@ -558,9 +558,9 @@ static int stm32_dma2d_loadclut(uintptr_t pfcreg)
regval = getreg32(pfcreg);
regval |= DMA2D_xGPFCCR_START;
- regvdbg("set regval=%08x\n", regval);
+ reginfo("set regval=%08x\n", regval);
putreg32(regval, pfcreg);
- regvdbg("configured regval=%08x\n", getreg32(pfcreg));
+ reginfo("configured regval=%08x\n", getreg32(pfcreg));
}
leave_critical_section(flags);
@@ -632,7 +632,7 @@ static uint32_t stm32_dma2d_memaddress(FAR const struct stm32_dma2d_s *layer,
offset = xpos * DMA2D_PF_BYPP(layer->pinfo.bpp) + layer->pinfo.stride * ypos;
- gvdbg("%p\n", ((uint32_t) pinfo->fbmem) + offset);
+ ginfo("%p\n", ((uint32_t) pinfo->fbmem) + offset);
return ((uint32_t) pinfo->fbmem) + offset;
}
@@ -655,7 +655,7 @@ static fb_coord_t stm32_dma2d_lineoffset(FAR const struct stm32_dma2d_s *layer,
{
/* offset at the end of each line in the context to the area layer */
- gvdbg("%d\n", layer->vinfo.xres - area->xres);
+ ginfo("%d\n", layer->vinfo.xres - area->xres);
return layer->vinfo.xres - area->xres;
}
@@ -677,7 +677,7 @@ static fb_coord_t stm32_dma2d_lineoffset(FAR const struct stm32_dma2d_s *layer,
static int stm32_dma2d_pixelformat(uint8_t fmt, uint8_t *fmtmap)
{
- gvdbg("fmt=%d, fmtmap=%p\n", fmt, fmtmap);
+ ginfo("fmt=%d, fmtmap=%p\n", fmt, fmtmap);
/* Map to the controller known format
*
@@ -711,7 +711,7 @@ static int stm32_dma2d_pixelformat(uint8_t fmt, uint8_t *fmtmap)
break;
#endif
default:
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@@ -736,7 +736,7 @@ static int stm32_dma2d_pixelformat(uint8_t fmt, uint8_t *fmtmap)
static int stm32_dma2d_bpp(uint8_t fmt, uint8_t *bpp)
{
- gvdbg("fmt=%d, bpp=%p\n", fmt, bpp);
+ ginfo("fmt=%d, bpp=%p\n", fmt, bpp);
switch (fmt)
{
@@ -756,7 +756,7 @@ static int stm32_dma2d_bpp(uint8_t fmt, uint8_t *bpp)
break;
#endif
default:
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@@ -937,7 +937,7 @@ static void stm32_dma2d_linit(FAR struct stm32_dma2d_s *layer,
{
FAR struct dma2d_layer_s *priv = &layer->dma2d;
- gvdbg("layer=%p, lid=%d, fmt=%02x\n", layer, lid, fmt);
+ ginfo("layer=%p, lid=%d, fmt=%02x\n", layer, lid, fmt);
/* initialize the layer interface */
@@ -985,7 +985,7 @@ static void stm32_dma2d_lfifo(FAR const struct stm32_dma2d_s *layer, int lid,
fb_coord_t xpos, fb_coord_t ypos,
FAR const struct ltdc_area_s *area)
{
- gvdbg("layer=%p, lid=%d, xpos=%d, ypos=%d, area=%p\n",
+ ginfo("layer=%p, lid=%d, xpos=%d, ypos=%d, area=%p\n",
layer, lid, xpos, ypos, area);
putreg32(stm32_dma2d_memaddress(layer, xpos, ypos), stm32_mar_layer_t[lid]);
@@ -1006,7 +1006,7 @@ static void stm32_dma2d_lfifo(FAR const struct stm32_dma2d_s *layer, int lid,
static void stm32_dma2d_lcolor(FAR const struct stm32_dma2d_s *layer,
int lid, uint32_t color)
{
- gvdbg("layer=%p, lid=%d, color=%08x\n", layer, lid, color);
+ ginfo("layer=%p, lid=%d, color=%08x\n", layer, lid, color);
putreg32(color, stm32_color_layer_t[lid]);
}
@@ -1027,7 +1027,7 @@ static void stm32_dma2d_llnr(FAR struct stm32_dma2d_s *layer,
{
uint32_t nlrreg;
- gvdbg("pixel per line: %d, number of lines: %d\n", area->xres, area->yres);
+ ginfo("pixel per line: %d, number of lines: %d\n", area->xres, area->yres);
nlrreg = getreg32(STM32_DMA2D_NLR);
nlrreg = (DMA2D_NLR_PL(area->xres) | DMA2D_NLR_NL(area->yres));
@@ -1047,7 +1047,7 @@ static void stm32_dma2d_llnr(FAR struct stm32_dma2d_s *layer,
static int stm32_dma2d_loutpfc(FAR const struct stm32_dma2d_s *layer)
{
- gvdbg("layer=%p\n", layer);
+ ginfo("layer=%p\n", layer);
/* CLUT format isn't supported by the dma2d controller */
@@ -1055,7 +1055,7 @@ static int stm32_dma2d_loutpfc(FAR const struct stm32_dma2d_s *layer)
{
/* Destination layer doesn't support CLUT output */
- gdbg("ERROR: Returning ENOSYS, "
+ gerr("ERROR: Returning ENOSYS, "
"output to layer with CLUT format not supported.\n");
return -ENOSYS;
}
@@ -1083,7 +1083,7 @@ static void stm32_dma2d_lpfc(FAR const struct stm32_dma2d_s *layer,
{
uint32_t pfccrreg;
- gvdbg("layer=%p, lid=%d, blendmode=%08x\n", layer, lid, blendmode);
+ ginfo("layer=%p, lid=%d, blendmode=%08x\n", layer, lid, blendmode);
/* Set color format */
@@ -1172,7 +1172,7 @@ static int stm32_dma2dgetvideoinfo(FAR struct dma2d_layer_s *layer,
{
FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
- gvdbg("layer=%p, vinfo=%p\n", layer, vinfo);
+ ginfo("layer=%p, vinfo=%p\n", layer, vinfo);
if (stm32_dma2d_lvalidate(priv) && vinfo)
{
@@ -1183,7 +1183,7 @@ static int stm32_dma2dgetvideoinfo(FAR struct dma2d_layer_s *layer,
return OK;
}
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
return -ENOSYS;
}
@@ -1209,7 +1209,7 @@ static int stm32_dma2dgetplaneinfo(FAR struct dma2d_layer_s *layer, int planeno,
{
FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
- gvdbg("layer=%p, planeno=%d, pinfo=%p\n", layer, planeno, pinfo);
+ ginfo("layer=%p, planeno=%d, pinfo=%p\n", layer, planeno, pinfo);
if (stm32_dma2d_lvalidate(priv) && pinfo && planeno == 0)
{
@@ -1220,7 +1220,7 @@ static int stm32_dma2dgetplaneinfo(FAR struct dma2d_layer_s *layer, int planeno,
return OK;
}
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@@ -1244,7 +1244,7 @@ static int stm32_dma2dgetlid(FAR struct dma2d_layer_s *layer, int *lid)
{
FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
- gvdbg("layer=%p, lid=%p\n", layer, lid);
+ ginfo("layer=%p, lid=%p\n", layer, lid);
if (stm32_dma2d_lvalidate(priv) && lid)
{
@@ -1254,7 +1254,7 @@ static int stm32_dma2dgetlid(FAR struct dma2d_layer_s *layer, int *lid)
return OK;
}
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@@ -1282,7 +1282,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
int ret;
FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
- gvdbg("layer=%p, cmap=%p\n", layer, cmap);
+ ginfo("layer=%p, cmap=%p\n", layer, cmap);
if (stm32_dma2d_lvalidate(priv) && cmap)
{
@@ -1320,13 +1320,13 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
if (priv->fmt != DMA2D_PF_L8)
{
- gdbg("Error: CLUT is not supported for the pixel format: %d\n",
+ gerr("Error: CLUT is not supported for the pixel format: %d\n",
priv->vinfo.fmt);
ret = -EINVAL;
}
else if (cmap->first >= STM32_DMA2D_NCLUT)
{
- gdbg("Error: only %d color table entries supported\n",
+ gerr("Error: only %d color table entries supported\n",
STM32_DMA2D_NCLUT);
ret = -EINVAL;
}
@@ -1349,7 +1349,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
clut888[offset + 1] = cmap->green[n];
clut888[offset + 2] = cmap->red[n];
- regvdbg("n=%d, red=%02x, green=%02x, blue=%02x\n", n,
+ reginfo("n=%d, red=%02x, green=%02x, blue=%02x\n", n,
clut888[offset], clut888[offset + 1],
clut888[offset + 2]);
#else
@@ -1358,7 +1358,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
(uint32_t)DMA2D_CLUT_GREEN(cmap->green[n]) |
(uint32_t)DMA2D_CLUT_BLUE(cmap->blue[n]);
- regvdbg("n=%d, alpha=%02x, red=%02x, green=%02x, blue=%02x\n", n,
+ reginfo("n=%d, alpha=%02x, red=%02x, green=%02x, blue=%02x\n", n,
DMA2D_CLUT_ALPHA(cmap->alpha[n]),
DMA2D_CLUT_RED(cmap->red[n]),
DMA2D_CLUT_GREEN(cmap->green[n]),
@@ -1374,7 +1374,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
return ret;
}
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@@ -1401,7 +1401,7 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer,
int ret;
FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
- gvdbg("layer=%p, cmap=%p\n", layer, cmap);
+ ginfo("layer=%p, cmap=%p\n", layer, cmap);
if (stm32_dma2d_lvalidate(priv) && cmap)
{
@@ -1409,13 +1409,13 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer,
if (priv->fmt != DMA2D_PF_L8)
{
- gdbg("Error: CLUT is not supported for the pixel format: %d\n",
+ gerr("Error: CLUT is not supported for the pixel format: %d\n",
priv->vinfo.fmt);
ret = -EINVAL;
}
else if (cmap->first >= STM32_DMA2D_NCLUT)
{
- gdbg("Error: only %d color table entries supported\n",
+ gerr("Error: only %d color table entries supported\n",
STM32_DMA2D_NCLUT);
ret = -EINVAL;
}
@@ -1438,7 +1438,7 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer,
cmap->green[n] = clut888[offset + 1];
cmap->red[n] = clut888[offset + 2];
- regvdbg("n=%d, red=%02x, green=%02x, blue=%02x\n", n,
+ reginfo("n=%d, red=%02x, green=%02x, blue=%02x\n", n,
clut888[offset], clut888[offset + 1],
clut888[offset + 2]);
#else
@@ -1447,7 +1447,7 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer,
cmap->green[n] = (uint8_t)DMA2D_CMAP_GREEN(clut[n]);
cmap->blue[n] = (uint8_t)DMA2D_CMAP_BLUE(clut[n]);
- regvdbg("n=%d, alpha=%02x, red=%02x, green=%02x, blue=%02x\n", n,
+ reginfo("n=%d, alpha=%02x, red=%02x, green=%02x, blue=%02x\n", n,
DMA2D_CMAP_ALPHA(clut[n]), DMA2D_CMAP_RED(clut[n]),
DMA2D_CMAP_GREEN(clut[n]), DMA2D_CMAP_BLUE(clut[n]));
#endif
@@ -1461,7 +1461,7 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer,
return ret;
}
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
#endif
@@ -1491,7 +1491,7 @@ static int stm32_dma2dsetalpha(FAR struct dma2d_layer_s *layer, uint8_t alpha)
{
FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
- gvdbg("layer=%p, alpha=%02x\n", layer, alpha);
+ ginfo("layer=%p, alpha=%02x\n", layer, alpha);
if (stm32_dma2d_lvalidate(priv))
{
@@ -1502,7 +1502,7 @@ static int stm32_dma2dsetalpha(FAR struct dma2d_layer_s *layer, uint8_t alpha)
return OK;
}
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@@ -1526,7 +1526,7 @@ static int stm32_dma2dgetalpha(FAR struct dma2d_layer_s *layer, uint8_t *alpha)
{
FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
- gvdbg("layer=%p, alpha=%p\n", layer, alpha);
+ ginfo("layer=%p, alpha=%p\n", layer, alpha);
if (stm32_dma2d_lvalidate(priv))
{
@@ -1537,7 +1537,7 @@ static int stm32_dma2dgetalpha(FAR struct dma2d_layer_s *layer, uint8_t *alpha)
return OK;
}
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@@ -1577,7 +1577,7 @@ static int stm32_dma2dsetblendmode(FAR struct dma2d_layer_s *layer,
{
FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
- gvdbg("layer=%p, mode=%08x\n", layer, mode);
+ ginfo("layer=%p, mode=%08x\n", layer, mode);
if (stm32_dma2d_lvalidate(priv))
{
@@ -1588,7 +1588,7 @@ static int stm32_dma2dsetblendmode(FAR struct dma2d_layer_s *layer,
return OK;
}
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@@ -1613,7 +1613,7 @@ static int stm32_dma2dgetblendmode(FAR struct dma2d_layer_s *layer,
{
FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
- gvdbg("layer=%p, mode=%p\n", layer, mode);
+ ginfo("layer=%p, mode=%p\n", layer, mode);
if (stm32_dma2d_lvalidate(priv) && mode)
{
@@ -1624,7 +1624,7 @@ static int stm32_dma2dgetblendmode(FAR struct dma2d_layer_s *layer,
return OK;
}
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@@ -1661,7 +1661,7 @@ static int stm32_dma2dblit(FAR struct dma2d_layer_s *dest,
FAR struct stm32_dma2d_s * destlayer = (FAR struct stm32_dma2d_s *)dest;
FAR struct stm32_dma2d_s * srclayer = (FAR struct stm32_dma2d_s *)src;
- gvdbg("dest=%p, destxpos=%d, destypos=%d, src=%p, srcarea=%p\n",
+ ginfo("dest=%p, destxpos=%d, destypos=%d, src=%p, srcarea=%p\n",
dest, destxpos, destypos, src, srcarea);
if (stm32_dma2d_lvalidatesize(destlayer, destxpos, destypos, srcarea) &&
@@ -1718,7 +1718,7 @@ static int stm32_dma2dblit(FAR struct dma2d_layer_s *dest,
if (ret != OK)
{
ret = -ECANCELED;
- gdbg("ERROR: Returning ECANCELED\n");
+ gerr("ERROR: Returning ECANCELED\n");
}
}
@@ -1727,7 +1727,7 @@ static int stm32_dma2dblit(FAR struct dma2d_layer_s *dest,
else
{
ret = -EINVAL;
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
}
return ret;
@@ -1772,7 +1772,7 @@ static int stm32_dma2dblend(FAR struct dma2d_layer_s *dest,
FAR struct stm32_dma2d_s * forelayer = (FAR struct stm32_dma2d_s *)fore;
FAR struct stm32_dma2d_s * backlayer = (FAR struct stm32_dma2d_s *)back;
- gvdbg("dest=%p, destxpos=%d, destypos=%d, "
+ ginfo("dest=%p, destxpos=%d, destypos=%d, "
"fore=%p, forexpos=%d, foreypos=%d, "
"back=%p, backarea=%p\n",
dest, destxpos, destypos, fore, forexpos, foreypos, back, backarea);
@@ -1832,7 +1832,7 @@ static int stm32_dma2dblend(FAR struct dma2d_layer_s *dest,
if (ret != OK)
{
ret = -ECANCELED;
- gdbg("ERROR: Returning ECANCELED\n");
+ gerr("ERROR: Returning ECANCELED\n");
}
}
@@ -1841,7 +1841,7 @@ static int stm32_dma2dblend(FAR struct dma2d_layer_s *dest,
else
{
ret = -EINVAL;
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
}
return ret;
@@ -1874,7 +1874,7 @@ static int stm32_dma2dfillarea(FAR struct dma2d_layer_s *layer,
int ret;
FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer;
- gvdbg("layer=%p, area=%p, color=%08x\n", layer, area, color);
+ ginfo("layer=%p, area=%p, color=%08x\n", layer, area, color);
if (stm32_dma2d_lvalidatesize(priv, area->xpos, area->ypos, area))
{
@@ -1912,7 +1912,7 @@ static int stm32_dma2dfillarea(FAR struct dma2d_layer_s *layer,
if (ret != OK)
{
ret = -ECANCELED;
- gdbg("ERROR: Returning ECANCELED\n");
+ gerr("ERROR: Returning ECANCELED\n");
}
}
@@ -1921,7 +1921,7 @@ static int stm32_dma2dfillarea(FAR struct dma2d_layer_s *layer,
else
{
ret = -EINVAL;
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
}
return ret;
@@ -1954,7 +1954,7 @@ FAR struct dma2d_layer_s * up_dma2dgetlayer(int lid)
return &priv->dma2d;
}
- gdbg("ERROR: EINVAL, Unknown layer identifier\n");
+ gerr("ERROR: EINVAL, Unknown layer identifier\n");
errno = EINVAL;
return NULL;
}
@@ -1989,7 +1989,7 @@ FAR struct dma2d_layer_s *up_dma2dcreatelayer(fb_coord_t width,
uint8_t bpp = 0;
FAR struct stm32_dma2d_s *layer = NULL;
- gvdbg("width=%d, height=%d, fmt=%02x \n", width, height, fmt);
+ ginfo("width=%d, height=%d, fmt=%02x \n", width, height, fmt);
/* Validate if pixel format supported */
@@ -2069,19 +2069,19 @@ FAR struct dma2d_layer_s *up_dma2dcreatelayer(fb_coord_t width,
/* free the layer struture */
kmm_free(layer);
- gdbg("ERROR: ENOMEM, Unable to allocate layer buffer\n");
+ gerr("ERROR: ENOMEM, Unable to allocate layer buffer\n");
errno = ENOMEM;
}
}
else
{
- gdbg("ERROR: ENOMEM, unable to allocate layer structure\n");
+ gerr("ERROR: ENOMEM, unable to allocate layer structure\n");
errno = ENOMEM;
}
}
else
{
- gdbg("ERROR: EINVAL, no free layer available\n");
+ gerr("ERROR: EINVAL, no free layer available\n");
errno = EINVAL;
}
@@ -2148,7 +2148,7 @@ int up_dma2dremovelayer(FAR struct dma2d_layer_s *layer)
int up_dma2dinitialize(void)
{
- dbg("Initialize DMA2D driver\n");
+ err("Initialize DMA2D driver\n");
if (g_initialized == false)
{
@@ -2265,14 +2265,14 @@ FAR struct dma2d_layer_s * stm32_dma2dinitltdc(FAR struct stm32_ltdc_s *layer)
uint8_t fmt = 0;
FAR struct stm32_ltdc_dma2d_s *priv;
- gvdbg("layer=%p\n", layer);
+ ginfo("layer=%p\n", layer);
DEBUGASSERT(layer && layer->lid >= 0 && layer->lid < DMA2D_SHADOW_LAYER);
ret = stm32_dma2d_pixelformat(layer->vinfo.fmt, &fmt);
if (ret != OK)
{
- dbg("Returning -EINVAL, unsupported pixel format: %d\n",
+ err("Returning -EINVAL, unsupported pixel format: %d\n",
layer->vinfo.fmt);
errno = -EINVAL;
return NULL;
diff --git a/arch/arm/src/stm32/stm32_dumpgpio.c b/arch/arm/src/stm32/stm32_dumpgpio.c
index 77d49ffa084d67a2ce431536d5ca47d79883e39d..5de501f033cd092b5649246859ce550595af15a5 100644
--- a/arch/arm/src/stm32/stm32_dumpgpio.c
+++ b/arch/arm/src/stm32/stm32_dumpgpio.c
@@ -39,6 +39,11 @@
#include
+/* Output debug info even if debug output is not selected. */
+
+#undef CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_INFO 1
+
#include
#include
@@ -49,14 +54,13 @@
#include "stm32_gpio.h"
#include "stm32_rcc.h"
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/****************************************************************************
* Private Data
****************************************************************************/
/* Port letters for prettier debug output */
-#ifdef CONFIG_DEBUG
static const char g_portchar[STM32_NGPIO_PORTS] =
{
#if STM32_NGPIO_PORTS > 11
@@ -87,15 +91,6 @@ static const char g_portchar[STM32_NGPIO_PORTS] =
# error "Bad number of GPIOs"
#endif
};
-#endif
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
/****************************************************************************
* Public Functions
@@ -125,111 +120,107 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg)
flags = enter_critical_section();
#if defined(CONFIG_STM32_STM32F10XX)
-
- lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
- g_portchar[port], pinset, base, msg);
+ llinfo("GPIO%c pinset: %08x base: %08x -- %s\n",
+ g_portchar[port], pinset, base, msg);
if ((getreg32(STM32_RCC_APB2ENR) & RCC_APB2ENR_IOPEN(port)) != 0)
{
- lldbg(" CR: %08x %08x IDR: %04x ODR: %04x LCKR: %04x\n",
- getreg32(base + STM32_GPIO_CRH_OFFSET),
- getreg32(base + STM32_GPIO_CRL_OFFSET),
- getreg32(base + STM32_GPIO_IDR_OFFSET),
- getreg32(base + STM32_GPIO_ODR_OFFSET),
- getreg32(base + STM32_GPIO_LCKR_OFFSET));
- lldbg(" EVCR: %02x MAPR: %08x CR: %04x %04x %04x %04x\n",
- getreg32(STM32_AFIO_EVCR), getreg32(STM32_AFIO_MAPR),
- getreg32(STM32_AFIO_EXTICR1),
- getreg32(STM32_AFIO_EXTICR2),
- getreg32(STM32_AFIO_EXTICR3),
- getreg32(STM32_AFIO_EXTICR4));
+ llinfo(" CR: %08x %08x IDR: %04x ODR: %04x LCKR: %04x\n",
+ getreg32(base + STM32_GPIO_CRH_OFFSET),
+ getreg32(base + STM32_GPIO_CRL_OFFSET),
+ getreg32(base + STM32_GPIO_IDR_OFFSET),
+ getreg32(base + STM32_GPIO_ODR_OFFSET),
+ getreg32(base + STM32_GPIO_LCKR_OFFSET));
+ llinfo(" EVCR: %02x MAPR: %08x CR: %04x %04x %04x %04x\n",
+ getreg32(STM32_AFIO_EVCR), getreg32(STM32_AFIO_MAPR),
+ getreg32(STM32_AFIO_EXTICR1),
+ getreg32(STM32_AFIO_EXTICR2),
+ getreg32(STM32_AFIO_EXTICR3),
+ getreg32(STM32_AFIO_EXTICR4));
}
else
{
- lldbg(" GPIO%c not enabled: APB2ENR: %08x\n",
+ llinfo(" GPIO%c not enabled: APB2ENR: %08x\n",
g_portchar[port], getreg32(STM32_RCC_APB2ENR));
}
#elif defined(CONFIG_STM32_STM32L15XX)
-
DEBUGASSERT(port < STM32_NGPIO_PORTS);
- lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
- g_portchar[port], pinset, base, msg);
+ llinfo("GPIO%c pinset: %08x base: %08x -- %s\n",
+ g_portchar[port], pinset, base, msg);
if ((getreg32(STM32_RCC_AHBENR) & RCC_AHBENR_GPIOEN(port)) != 0)
{
- lldbg(" MODE: %08x OTYPE: %04x OSPEED: %08x PUPDR: %08x\n",
- getreg32(base + STM32_GPIO_MODER_OFFSET),
- getreg32(base + STM32_GPIO_OTYPER_OFFSET),
- getreg32(base + STM32_GPIO_OSPEED_OFFSET),
- getreg32(base + STM32_GPIO_PUPDR_OFFSET));
- lldbg(" IDR: %04x ODR: %04x BSRR: %08x LCKR: %04x\n",
- getreg32(base + STM32_GPIO_IDR_OFFSET),
- getreg32(base + STM32_GPIO_ODR_OFFSET),
- getreg32(base + STM32_GPIO_BSRR_OFFSET),
- getreg32(base + STM32_GPIO_LCKR_OFFSET));
- lldbg(" AFRH: %08x AFRL: %08x\n",
- getreg32(base + STM32_GPIO_AFRH_OFFSET),
- getreg32(base + STM32_GPIO_AFRL_OFFSET));
+ llinfo(" MODE: %08x OTYPE: %04x OSPEED: %08x PUPDR: %08x\n",
+ getreg32(base + STM32_GPIO_MODER_OFFSET),
+ getreg32(base + STM32_GPIO_OTYPER_OFFSET),
+ getreg32(base + STM32_GPIO_OSPEED_OFFSET),
+ getreg32(base + STM32_GPIO_PUPDR_OFFSET));
+ llinfo(" IDR: %04x ODR: %04x BSRR: %08x LCKR: %04x\n",
+ getreg32(base + STM32_GPIO_IDR_OFFSET),
+ getreg32(base + STM32_GPIO_ODR_OFFSET),
+ getreg32(base + STM32_GPIO_BSRR_OFFSET),
+ getreg32(base + STM32_GPIO_LCKR_OFFSET));
+ llinfo(" AFRH: %08x AFRL: %08x\n",
+ getreg32(base + STM32_GPIO_AFRH_OFFSET),
+ getreg32(base + STM32_GPIO_AFRL_OFFSET));
}
else
{
- lldbg(" GPIO%c not enabled: AHBENR: %08x\n",
- g_portchar[port], getreg32(STM32_RCC_AHBENR));
+ llinfo(" GPIO%c not enabled: AHBENR: %08x\n",
+ g_portchar[port], getreg32(STM32_RCC_AHBENR));
}
#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
-
DEBUGASSERT(port < STM32_NGPIO_PORTS);
- lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
- g_portchar[port], pinset, base, msg);
+ llinfo("GPIO%c pinset: %08x base: %08x -- %s\n",
+ g_portchar[port], pinset, base, msg);
/* GPIOs are always enabled */
- lldbg(" MODE: %08x OTYPE: %04x OSPEED: %08x PUPDR: %08x\n",
- getreg32(base + STM32_GPIO_MODER_OFFSET),
- getreg32(base + STM32_GPIO_OTYPER_OFFSET),
- getreg32(base + STM32_GPIO_OSPEED_OFFSET),
- getreg32(base + STM32_GPIO_PUPDR_OFFSET));
- lldbg(" IDR: %04x ODR: %04x BSRR: %08x LCKR: %04x\n",
- getreg32(base + STM32_GPIO_IDR_OFFSET),
- getreg32(base + STM32_GPIO_ODR_OFFSET),
- getreg32(base + STM32_GPIO_BSRR_OFFSET),
- getreg32(base + STM32_GPIO_LCKR_OFFSET));
- lldbg(" AFRH: %08x AFRL: %08x BRR: %04x\n",
- getreg32(base + STM32_GPIO_AFRH_OFFSET),
- getreg32(base + STM32_GPIO_AFRL_OFFSET),
- getreg32(base + STM32_GPIO_BRR_OFFSET));
+ llinfo(" MODE: %08x OTYPE: %04x OSPEED: %08x PUPDR: %08x\n",
+ getreg32(base + STM32_GPIO_MODER_OFFSET),
+ getreg32(base + STM32_GPIO_OTYPER_OFFSET),
+ getreg32(base + STM32_GPIO_OSPEED_OFFSET),
+ getreg32(base + STM32_GPIO_PUPDR_OFFSET));
+ llinfo(" IDR: %04x ODR: %04x BSRR: %08x LCKR: %04x\n",
+ getreg32(base + STM32_GPIO_IDR_OFFSET),
+ getreg32(base + STM32_GPIO_ODR_OFFSET),
+ getreg32(base + STM32_GPIO_BSRR_OFFSET),
+ getreg32(base + STM32_GPIO_LCKR_OFFSET));
+ llinfo(" AFRH: %08x AFRL: %08x BRR: %04x\n",
+ getreg32(base + STM32_GPIO_AFRH_OFFSET),
+ getreg32(base + STM32_GPIO_AFRL_OFFSET),
+ getreg32(base + STM32_GPIO_BRR_OFFSET));
#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
-
DEBUGASSERT(port < STM32_NGPIO_PORTS);
- lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
- g_portchar[port], pinset, base, msg);
+ llinfo("GPIO%c pinset: %08x base: %08x -- %s\n",
+ g_portchar[port], pinset, base, msg);
if ((getreg32(STM32_RCC_AHB1ENR) & RCC_AHB1ENR_GPIOEN(port)) != 0)
{
- lldbg(" MODE: %08x OTYPE: %04x OSPEED: %08x PUPDR: %08x\n",
- getreg32(base + STM32_GPIO_MODER_OFFSET),
- getreg32(base + STM32_GPIO_OTYPER_OFFSET),
- getreg32(base + STM32_GPIO_OSPEED_OFFSET),
- getreg32(base + STM32_GPIO_PUPDR_OFFSET));
- lldbg(" IDR: %04x ODR: %04x BSRR: %08x LCKR: %04x\n",
- getreg32(base + STM32_GPIO_IDR_OFFSET),
- getreg32(base + STM32_GPIO_ODR_OFFSET),
- getreg32(base + STM32_GPIO_BSRR_OFFSET),
- getreg32(base + STM32_GPIO_LCKR_OFFSET));
- lldbg(" AFRH: %08x AFRL: %08x\n",
- getreg32(base + STM32_GPIO_AFRH_OFFSET),
- getreg32(base + STM32_GPIO_AFRL_OFFSET));
+ llinfo(" MODE: %08x OTYPE: %04x OSPEED: %08x PUPDR: %08x\n",
+ getreg32(base + STM32_GPIO_MODER_OFFSET),
+ getreg32(base + STM32_GPIO_OTYPER_OFFSET),
+ getreg32(base + STM32_GPIO_OSPEED_OFFSET),
+ getreg32(base + STM32_GPIO_PUPDR_OFFSET));
+ llinfo(" IDR: %04x ODR: %04x BSRR: %08x LCKR: %04x\n",
+ getreg32(base + STM32_GPIO_IDR_OFFSET),
+ getreg32(base + STM32_GPIO_ODR_OFFSET),
+ getreg32(base + STM32_GPIO_BSRR_OFFSET),
+ getreg32(base + STM32_GPIO_LCKR_OFFSET));
+ llinfo(" AFRH: %08x AFRL: %08x\n",
+ getreg32(base + STM32_GPIO_AFRH_OFFSET),
+ getreg32(base + STM32_GPIO_AFRL_OFFSET));
}
else
{
- lldbg(" GPIO%c not enabled: AHB1ENR: %08x\n",
- g_portchar[port], getreg32(STM32_RCC_AHB1ENR));
+ llinfo(" GPIO%c not enabled: AHB1ENR: %08x\n",
+ g_portchar[port], getreg32(STM32_RCC_AHB1ENR));
}
#else
# error "Unsupported STM32 chip"
@@ -238,4 +229,4 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg)
return OK;
}
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/arch/arm/src/stm32/stm32_eth.c b/arch/arm/src/stm32/stm32_eth.c
index c7a4abc044cdbc5a61243b292e2a09308fca92f5..e2708372ba754119d860404765fc50821edc6d2f 100644
--- a/arch/arm/src/stm32/stm32_eth.c
+++ b/arch/arm/src/stm32/stm32_eth.c
@@ -240,7 +240,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_STM32_ETHMAC_REGDEBUG
#endif
@@ -622,7 +622,7 @@ static struct stm32_ethmac_s g_stm32ethmac[STM32_NETHERNET];
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t stm32_getreg(uint32_t addr);
static void stm32_putreg(uint32_t val, uint32_t addr);
static void stm32_checksetup(void);
@@ -748,7 +748,7 @@ static int stm32_ethconfig(FAR struct stm32_ethmac_s *priv);
*
****************************************************************************/
-#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t stm32_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -769,7 +769,7 @@ static uint32_t stm32_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -786,7 +786,7 @@ static uint32_t stm32_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -798,7 +798,7 @@ static uint32_t stm32_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@@ -820,12 +820,12 @@ static uint32_t stm32_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void stm32_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, val);
+ llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@@ -847,7 +847,7 @@ static void stm32_putreg(uint32_t val, uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void stm32_checksetup(void)
{
}
@@ -1012,7 +1012,7 @@ static int stm32_transmit(FAR struct stm32_ethmac_s *priv)
txdesc = priv->txhead;
txfirst = txdesc;
- nllvdbg("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
+ nllinfo("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
priv->dev.d_len, priv->dev.d_buf, txdesc, txdesc->tdes0);
DEBUGASSERT(txdesc && (txdesc->tdes0 & ETH_TDES0_OWN) == 0);
@@ -1029,7 +1029,7 @@ static int stm32_transmit(FAR struct stm32_ethmac_s *priv)
bufcount = (priv->dev.d_len + (CONFIG_STM32_ETH_BUFSIZE-1)) / CONFIG_STM32_ETH_BUFSIZE;
lastsize = priv->dev.d_len - (bufcount - 1) * CONFIG_STM32_ETH_BUFSIZE;
- nllvdbg("bufcount: %d lastsize: %d\n", bufcount, lastsize);
+ nllinfo("bufcount: %d lastsize: %d\n", bufcount, lastsize);
/* Set the first segment bit in the first TX descriptor */
@@ -1139,7 +1139,7 @@ static int stm32_transmit(FAR struct stm32_ethmac_s *priv)
priv->inflight++;
- nllvdbg("txhead: %p txtail: %p inflight: %d\n",
+ nllinfo("txhead: %p txtail: %p inflight: %d\n",
priv->txhead, priv->txtail, priv->inflight);
/* If all TX descriptors are in-flight, then we have to disable receive interrupts
@@ -1438,7 +1438,7 @@ static void stm32_freesegment(FAR struct stm32_ethmac_s *priv,
struct eth_rxdesc_s *rxdesc;
int i;
- nllvdbg("rxfirst: %p segments: %d\n", rxfirst, segments);
+ nllinfo("rxfirst: %p segments: %d\n", rxfirst, segments);
/* Set OWN bit in RX descriptors. This gives the buffers back to DMA */
@@ -1496,7 +1496,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
uint8_t *buffer;
int i;
- nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+ nllinfo("rxhead: %p rxcurr: %p segments: %d\n",
priv->rxhead, priv->rxcurr, priv->segments);
/* Check if there are free buffers. We cannot receive new frames in this
@@ -1505,7 +1505,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
if (!stm32_isfreebuffer(priv))
{
- nlldbg("No free buffers\n");
+ nllerr("No free buffers\n");
return -ENOMEM;
}
@@ -1562,7 +1562,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
rxcurr = priv->rxcurr;
}
- nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+ nllinfo("rxhead: %p rxcurr: %p segments: %d\n",
priv->rxhead, priv->rxcurr, priv->segments);
/* Check if any errors are reported in the frame */
@@ -1601,7 +1601,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
priv->rxhead = (struct eth_rxdesc_s *)rxdesc->rdes3;
stm32_freesegment(priv, rxcurr, priv->segments);
- nllvdbg("rxhead: %p d_buf: %p d_len: %d\n",
+ nllinfo("rxhead: %p d_buf: %p d_len: %d\n",
priv->rxhead, dev->d_buf, dev->d_len);
return OK;
@@ -1612,7 +1612,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
* scanning logic, and continue scanning with the next frame.
*/
- nlldbg("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
+ nllerr("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
stm32_freesegment(priv, rxcurr, priv->segments);
}
}
@@ -1628,7 +1628,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv)
priv->rxhead = rxdesc;
- nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+ nllinfo("rxhead: %p rxcurr: %p segments: %d\n",
priv->rxhead, priv->rxcurr, priv->segments);
return -EAGAIN;
@@ -1673,7 +1673,7 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv)
if (dev->d_len > CONFIG_NET_ETH_MTU)
{
- nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+ nllerr("DROPPED: Too big: %d\n", dev->d_len);
/* Free dropped packet buffer */
@@ -1698,7 +1698,7 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
/* Handle ARP on input then give the IPv4 packet to the network
* layer
@@ -1738,7 +1738,7 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
/* Give the IPv6 packet to the network layer */
@@ -1775,7 +1775,7 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv)
#ifdef CONFIG_NET_ARP
if (BUF->type == htons(ETHTYPE_ARP))
{
- nllvdbg("ARP frame\n");
+ nllinfo("ARP frame\n");
/* Handle ARP packet */
@@ -1793,7 +1793,7 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv)
else
#endif
{
- nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+ nllerr("DROPPED: Unknown type: %04x\n", BUF->type);
}
/* We are finished with the RX buffer. NOTE: If the buffer is
@@ -1834,7 +1834,7 @@ static void stm32_freeframe(FAR struct stm32_ethmac_s *priv)
struct eth_txdesc_s *txdesc;
int i;
- nllvdbg("txhead: %p txtail: %p inflight: %d\n",
+ nllinfo("txhead: %p txtail: %p inflight: %d\n",
priv->txhead, priv->txtail, priv->inflight);
/* Scan for "in-flight" descriptors owned by the CPU */
@@ -1850,7 +1850,7 @@ static void stm32_freeframe(FAR struct stm32_ethmac_s *priv)
* TX descriptors.
*/
- nllvdbg("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
+ nllinfo("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
txdesc, txdesc->tdes0, txdesc->tdes2, txdesc->tdes3);
DEBUGASSERT(txdesc->tdes2 != 0);
@@ -1903,7 +1903,7 @@ static void stm32_freeframe(FAR struct stm32_ethmac_s *priv)
priv->txtail = txdesc;
- nllvdbg("txhead: %p txtail: %p inflight: %d\n",
+ nllinfo("txhead: %p txtail: %p inflight: %d\n",
priv->txhead, priv->txtail, priv->inflight);
}
}
@@ -2042,7 +2042,7 @@ static inline void stm32_interrupt_process(FAR struct stm32_ethmac_s *priv)
{
/* Just let the user know what happened */
- nlldbg("Abormal event(s): %08x\n", dmasr);
+ nllerr("Abormal event(s): %08x\n", dmasr);
/* Clear all pending abnormal events */
@@ -2246,7 +2246,7 @@ static void stm32_txtimeout_expiry(int argc, uint32_t arg, ...)
{
FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)arg;
- nlldbg("Timeout!\n");
+ nllerr("Timeout!\n");
#ifdef CONFIG_NET_NOINTS
/* Disable further Ethernet interrupts. This will prevent some race
@@ -2447,12 +2447,12 @@ static int stm32_ifup(struct net_driver_s *dev)
int ret;
#ifdef CONFIG_NET_IPv4
- ndbg("Bringing up: %d.%d.%d.%d\n",
+ nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
#endif
#ifdef CONFIG_NET_IPv6
- ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+ nerr("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
@@ -2500,7 +2500,7 @@ static int stm32_ifdown(struct net_driver_s *dev)
FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)dev->d_private;
irqstate_t flags;
- ndbg("Taking the network down\n");
+ nerr("Taking the network down\n");
/* Disable the Ethernet interrupt */
@@ -2545,7 +2545,7 @@ static int stm32_ifdown(struct net_driver_s *dev)
static inline void stm32_txavail_process(FAR struct stm32_ethmac_s *priv)
{
- nvdbg("ifup: %d\n", priv->ifup);
+ ninfo("ifup: %d\n", priv->ifup);
/* Ignore the notification if the interface is not yet up */
@@ -2712,7 +2712,7 @@ static int stm32_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
uint32_t temp;
uint32_t registeraddress;
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Add the MAC address to the hardware multicast hash table */
@@ -2769,7 +2769,7 @@ static int stm32_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
uint32_t temp;
uint32_t registeraddress;
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Remove the MAC address to the hardware multicast hash table */
@@ -3129,7 +3129,7 @@ static int stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *val
}
}
- ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
+ nerr("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
phydevaddr, phyregaddr);
return -ETIMEDOUT;
@@ -3188,7 +3188,7 @@ static int stm32_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t val
}
}
- ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
+ nerr("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
phydevaddr, phyregaddr, value);
return -ETIMEDOUT;
@@ -3225,7 +3225,7 @@ static inline int stm32_dm9161(FAR struct stm32_ethmac_s *priv)
ret = stm32_phyread(CONFIG_STM32_PHYADDR, MII_PHYID1, &phyval);
if (ret < 0)
{
- ndbg("Failed to read the PHY ID1: %d\n", ret);
+ nerr("Failed to read the PHY ID1: %d\n", ret);
return ret;
}
@@ -3236,14 +3236,14 @@ static inline int stm32_dm9161(FAR struct stm32_ethmac_s *priv)
up_systemreset();
}
- nvdbg("PHY ID1: 0x%04X\n", phyval);
+ ninfo("PHY ID1: 0x%04X\n", phyval);
/* Now check the "DAVICOM Specified Configuration Register (DSCR)", Register 16 */
ret = stm32_phyread(CONFIG_STM32_PHYADDR, 16, &phyval);
if (ret < 0)
{
- ndbg("Failed to read the PHY Register 0x10: %d\n", ret);
+ nerr("Failed to read the PHY Register 0x10: %d\n", ret);
return ret;
}
@@ -3300,7 +3300,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
ret = stm32_phywrite(CONFIG_STM32_PHYADDR, MII_MCR, MII_MCR_RESET);
if (ret < 0)
{
- ndbg("Failed to reset the PHY: %d\n", ret);
+ nerr("Failed to reset the PHY: %d\n", ret);
return ret;
}
up_mdelay(PHY_RESET_DELAY);
@@ -3311,7 +3311,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
ret = stm32_phy_boardinitialize(0);
if (ret < 0)
{
- ndbg("Failed to initialize the PHY: %d\n", ret);
+ nerr("Failed to initialize the PHY: %d\n", ret);
return ret;
}
#endif
@@ -3336,7 +3336,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
ret = stm32_phyread(CONFIG_STM32_PHYADDR, MII_MSR, &phyval);
if (ret < 0)
{
- ndbg("Failed to read the PHY MSR: %d\n", ret);
+ nerr("Failed to read the PHY MSR: %d\n", ret);
return ret;
}
else if ((phyval & MII_MSR_LINKSTATUS) != 0)
@@ -3347,7 +3347,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
if (timeout >= PHY_RETRY_TIMEOUT)
{
- ndbg("Timed out waiting for link status: %04x\n", phyval);
+ nerr("Timed out waiting for link status: %04x\n", phyval);
return -ETIMEDOUT;
}
@@ -3356,7 +3356,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
ret = stm32_phywrite(CONFIG_STM32_PHYADDR, MII_MCR, MII_MCR_ANENABLE);
if (ret < 0)
{
- ndbg("Failed to enable auto-negotiation: %d\n", ret);
+ nerr("Failed to enable auto-negotiation: %d\n", ret);
return ret;
}
@@ -3367,7 +3367,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
ret = stm32_phyread(CONFIG_STM32_PHYADDR, MII_MSR, &phyval);
if (ret < 0)
{
- ndbg("Failed to read the PHY MSR: %d\n", ret);
+ nerr("Failed to read the PHY MSR: %d\n", ret);
return ret;
}
else if ((phyval & MII_MSR_ANEGCOMPLETE) != 0)
@@ -3378,7 +3378,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
if (timeout >= PHY_RETRY_TIMEOUT)
{
- ndbg("Timed out waiting for auto-negotiation\n");
+ nerr("Timed out waiting for auto-negotiation\n");
return -ETIMEDOUT;
}
@@ -3387,13 +3387,13 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
ret = stm32_phyread(CONFIG_STM32_PHYADDR, CONFIG_STM32_PHYSR, &phyval);
if (ret < 0)
{
- ndbg("Failed to read PHY status register\n");
+ nerr("Failed to read PHY status register\n");
return ret;
}
/* Remember the selected speed and duplex modes */
- nvdbg("PHYSR[%d]: %04x\n", CONFIG_STM32_PHYSR, phyval);
+ ninfo("PHYSR[%d]: %04x\n", CONFIG_STM32_PHYSR, phyval);
/* Different PHYs present speed and mode information in different ways. IF
* This CONFIG_STM32_PHYSR_ALTCONFIG is selected, this indicates that the PHY
@@ -3457,7 +3457,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
ret = stm32_phywrite(CONFIG_STM32_PHYADDR, MII_MCR, phyval);
if (ret < 0)
{
- ndbg("Failed to write the PHY MCR: %d\n", ret);
+ nerr("Failed to write the PHY MCR: %d\n", ret);
return ret;
}
up_mdelay(PHY_CONFIG_DELAY);
@@ -3472,7 +3472,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv)
#endif
#endif
- ndbg("Duplex: %s Speed: %d MBps\n",
+ nerr("Duplex: %s Speed: %d MBps\n",
priv->fduplex ? "FULL" : "HALF",
priv->mbps100 ? 100 : 10);
@@ -3853,7 +3853,7 @@ static void stm32_macaddress(FAR struct stm32_ethmac_s *priv)
FAR struct net_driver_s *dev = &priv->dev;
uint32_t regval;
- nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
@@ -3921,7 +3921,7 @@ static void stm32_ipv6multicast(FAR struct stm32_ethmac_s *priv)
mac[4] = tmp16 & 0xff;
mac[5] = tmp16 >> 8;
- nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
(void)stm32_addmac(dev, mac);
@@ -4059,12 +4059,12 @@ static int stm32_ethconfig(FAR struct stm32_ethmac_s *priv)
/* Reset the Ethernet block */
- nllvdbg("Reset the Ethernet block\n");
+ nllinfo("Reset the Ethernet block\n");
stm32_ethreset(priv);
/* Initialize the PHY */
- nllvdbg("Initialize the PHY\n");
+ nllinfo("Initialize the PHY\n");
ret = stm32_phyinit(priv);
if (ret < 0)
{
@@ -4073,7 +4073,7 @@ static int stm32_ethconfig(FAR struct stm32_ethmac_s *priv)
/* Initialize the MAC and DMA */
- nllvdbg("Initialize the MAC and DMA\n");
+ nllinfo("Initialize the MAC and DMA\n");
ret = stm32_macconfig(priv);
if (ret < 0)
{
@@ -4094,7 +4094,7 @@ static int stm32_ethconfig(FAR struct stm32_ethmac_s *priv)
/* Enable normal MAC operation */
- nllvdbg("Enable normal operation\n");
+ nllinfo("Enable normal operation\n");
return stm32_macenable(priv);
}
@@ -4130,7 +4130,7 @@ int stm32_ethinitialize(int intf)
{
struct stm32_ethmac_s *priv;
- nvdbg("intf: %d\n", intf);
+ ninfo("intf: %d\n", intf);
/* Get the interface structure associated with this interface number. */
diff --git a/arch/arm/src/stm32/stm32_gpio.h b/arch/arm/src/stm32/stm32_gpio.h
index c1790eaaaa3f8693950edbbb1a1cc68a89bb273a..34b49bf0d6da1d2dc9e2f5b31f167de6ca18114d 100644
--- a/arch/arm/src/stm32/stm32_gpio.h
+++ b/arch/arm/src/stm32/stm32_gpio.h
@@ -510,7 +510,7 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
*
************************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
int stm32_dumpgpio(uint32_t pinset, const char *msg);
#else
# define stm32_dumpgpio(p,m)
diff --git a/arch/arm/src/stm32/stm32_i2c.c b/arch/arm/src/stm32/stm32_i2c.c
index 6d06098b018b18db0785a0004d8677ac3ce499ee..0b81465f4ae7e98277a17668963df54292e4efb1 100644
--- a/arch/arm/src/stm32/stm32_i2c.c
+++ b/arch/arm/src/stm32/stm32_i2c.c
@@ -162,14 +162,14 @@
#define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
/* Debug ****************************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
+/* CONFIG_DEBUG_I2C + CONFIG_DEBUG_FEATURES enables general I2C debug output. */
#ifdef CONFIG_DEBUG_I2C
-# define i2cdbg dbg
-# define i2cvdbg vdbg
+# define i2cerr err
+# define i2cinfo info
#else
-# define i2cdbg(x...)
-# define i2cvdbg(x...)
+# define i2cerr(x...)
+# define i2cinfo(x...)
#endif
/* I2C event trace logic. NOTE: trace uses the internal, non-standard, low-level
@@ -693,7 +693,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
- i2cvdbg("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
+ i2cinfo("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
priv->intstate, (long)elapsed, (long)timeout, priv->status);
/* Set the interrupt state back to IDLE */
@@ -766,7 +766,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
* still pending.
*/
- i2cvdbg("Timeout with CR1: %04x SR1: %04x\n", cr1, sr1);
+ i2cinfo("Timeout with CR1: %04x SR1: %04x\n", cr1, sr1);
}
/************************************************************************************
@@ -859,7 +859,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t statu
if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
{
- i2cdbg("Trace table overflow\n");
+ i2cerr("Trace table overflow\n");
return;
}
@@ -900,7 +900,7 @@ static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
{
- i2cdbg("Trace table overflow\n");
+ i2cerr("Trace table overflow\n");
return;
}
@@ -1695,7 +1695,7 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
status = stm32_i2c_getstatus(priv);
ret = -ETIMEDOUT;
- i2cdbg("Timed out: CR1: 0x%04x status: 0x%08x\n",
+ i2cerr("Timed out: CR1: 0x%04x status: 0x%08x\n",
stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET), status);
/* "Note: When the STOP, START or PEC bit is set, the software must
diff --git a/arch/arm/src/stm32/stm32_i2c_alt.c b/arch/arm/src/stm32/stm32_i2c_alt.c
index da50a9c263508f6aa96817462596fe2e88ba2c7b..4ea697320a141e0b5e75f486e5afe4de2e7ec42b 100644
--- a/arch/arm/src/stm32/stm32_i2c_alt.c
+++ b/arch/arm/src/stm32/stm32_i2c_alt.c
@@ -169,14 +169,14 @@
#define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
/* Debug ****************************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
+/* CONFIG_DEBUG_I2C + CONFIG_DEBUG_FEATURES enables general I2C debug output. */
#ifdef CONFIG_DEBUG_I2C
-# define i2cdbg dbg
-# define i2cvdbg vdbg
+# define i2cerr err
+# define i2cinfo info
#else
-# define i2cdbg(x...)
-# define i2cvdbg(x...)
+# define i2cerr(x...)
+# define i2cinfo(x...)
#endif
/* I2C event trace logic. NOTE: trace uses the internal, non-standard, low-level
@@ -701,7 +701,7 @@ static int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
- i2cvdbg("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
+ i2cinfo("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
priv->intstate, (long)elapsed, (long)timeout, priv->status);
/* Set the interrupt state back to IDLE */
@@ -774,7 +774,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
* still pending.
*/
- i2cvdbg("Timeout with CR1: %04x SR1: %04x\n", cr1, sr1);
+ i2cinfo("Timeout with CR1: %04x SR1: %04x\n", cr1, sr1);
}
/************************************************************************************
@@ -867,7 +867,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint16_t statu
if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
{
- i2cdbg("Trace table overflow\n");
+ i2cerr("Trace table overflow\n");
return;
}
@@ -908,7 +908,7 @@ static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
{
- i2cdbg("Trace table overflow\n");
+ i2cerr("Trace table overflow\n");
return;
}
@@ -1208,7 +1208,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
{
uint32_t status;
- i2cvdbg("I2C ISR called\n");
+ i2cinfo("I2C ISR called\n");
/* Get state of the I2C controller (register SR1 only)
*
@@ -1252,7 +1252,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
if (priv->dcnt == -1 && priv->msgc > 0)
{
- i2cvdbg("Switch to new message\n");
+ i2cinfo("Switch to new message\n");
/* Get current message to process data and copy to private structure */
@@ -1261,7 +1261,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
priv->total_msg_len = priv->msgv->length; /* Set total msg length */
priv->flags = priv->msgv->flags; /* Copy flags to private struct */
- i2cvdbg("Current flags %i\n", priv->flags);
+ i2cinfo("Current flags %i\n", priv->flags);
/* Decrease counter to indicate the number of messages left to process */
@@ -1314,7 +1314,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
{
/* Start bit is set */
- i2cvdbg("Entering address handling, status = %i\n", status);
+ i2cinfo("Entering address handling, status = %i\n", status);
/* Check for empty message (for robustness) */
@@ -1326,7 +1326,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
if (priv->total_msg_len == 1 && (priv->flags & I2C_M_READ))
{
- i2cvdbg("short read N=1: setting NACK\n");
+ i2cinfo("short read N=1: setting NACK\n");
/* Set POS bit to zero (can be up from a previous 2 byte receive) */
@@ -1339,7 +1339,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
}
else if (priv->total_msg_len == 2 && (priv->flags & I2C_M_READ))
{
- i2cvdbg("short read N=2: setting POS and ACK bits\n");
+ i2cinfo("short read N=2: setting POS and ACK bits\n");
stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, 0, I2C_CR1_POS);
stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, 0, I2C_CR1_ACK);
@@ -1349,7 +1349,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
{
/* Enable ACK after address byte */
- i2cvdbg("setting ACK\n");
+ i2cinfo("setting ACK\n");
/* Set POS bit to zero (can be up from a previous 2 byte receive) */
@@ -1369,7 +1369,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
(priv->flags & I2C_M_TEN) ?
0 :((priv->msgv->addr << 1) | (priv->flags & I2C_M_READ)));
- i2cvdbg("Address sent. Addr=%#02x Write/Read bit=%i\n",
+ i2cinfo("Address sent. Addr=%#02x Write/Read bit=%i\n",
priv->msgv->addr, (priv->flags & I2C_M_READ));
/* Flag that address has just been sent */
@@ -1382,7 +1382,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
{
/* TODO: untested!! */
- i2cdbg(" An empty message has been detected, ignoring and passing to next message.\n");
+ i2cerr(" An empty message has been detected, ignoring and passing to next message.\n");
/* Trace event */
@@ -1428,15 +1428,15 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
else if ((status & I2C_SR1_ADDR) == 0 && priv->check_addr_ACK)
{
- i2cvdbg("Invalid Address. Setting stop bit and clearing message\n");
- i2cvdbg("status %i\n", status);
+ i2cinfo("Invalid Address. Setting stop bit and clearing message\n");
+ i2cinfo("status %i\n", status);
/* Set condition to terminate msg chain transmission as address is invalid. */
priv->dcnt = -1;
priv->msgc = 0;
- i2cvdbg("dcnt %i , msgc %i\n", priv->dcnt, priv->msgc);
+ i2cinfo("dcnt %i , msgc %i\n", priv->dcnt, priv->msgc);
/* Reset flag to check for valid address */
@@ -1482,8 +1482,8 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
stm32_i2c_modifyreg(priv, STM32_I2C_CR2_OFFSET, 0, I2C_CR2_ITBUFEN);
stm32_i2c_sendstop(priv);
- i2cvdbg("Address ACKed beginning data reception\n");
- i2cvdbg("short read N=1: programming stop bit\n");
+ i2cinfo("Address ACKed beginning data reception\n");
+ i2cinfo("short read N=1: programming stop bit\n");
priv->dcnt--;
/* Trace */
@@ -1498,8 +1498,8 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
stm32_i2c_modifyreg(priv, STM32_I2C_CR1_OFFSET, I2C_CR1_ACK, 0);
- i2cvdbg("Address ACKed beginning data reception\n");
- i2cvdbg("short read N=2: programming NACK\n");
+ i2cinfo("Address ACKed beginning data reception\n");
+ i2cinfo("short read N=2: programming NACK\n");
/* Trace */
@@ -1507,7 +1507,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
}
else
{
- i2cvdbg("Address ACKed beginning data reception\n");
+ i2cinfo("Address ACKed beginning data reception\n");
/* Trace */
@@ -1530,7 +1530,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
* transmit the next byte.
*/
- i2cvdbg("Entering write mode dcnt = %i msgc = %i\n",
+ i2cinfo("Entering write mode dcnt = %i msgc = %i\n",
priv->dcnt, priv->msgc);
/* Clear ADDR flag by reading SR2 and adding it to status */
@@ -1567,12 +1567,12 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
/* If last message send stop bit */
stm32_i2c_sendstop(priv);
- i2cvdbg("Stop sent dcnt = %i msgc = %i\n", priv->dcnt, priv->msgc);
+ i2cinfo("Stop sent dcnt = %i msgc = %i\n", priv->dcnt, priv->msgc);
/* Decrease counter to get to next message */
priv->dcnt--;
- i2cvdbg("dcnt %i\n", priv->dcnt);
+ i2cinfo("dcnt %i\n", priv->dcnt);
stm32_i2c_traceevent(priv, I2CEVENT_WRITE_STOP, priv->dcnt);
}
@@ -1586,13 +1586,13 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
{
stm32_i2c_sendstart(priv);
- i2cvdbg("Restart detected!\n");
- i2cvdbg("Nextflag %i\n", priv->msgv[0].flags);
+ i2cinfo("Restart detected!\n");
+ i2cinfo("Nextflag %i\n", priv->msgv[0].flags);
/* Decrease counter to get to next message */
priv->dcnt--;
- i2cvdbg("dcnt %i\n", priv->dcnt);
+ i2cinfo("dcnt %i\n", priv->dcnt);
stm32_i2c_traceevent(priv, I2CEVENT_WRITE_RESTART, priv->dcnt);
}
@@ -1609,14 +1609,14 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
}
else
{
- i2cdbg("Write mode: next message has an unrecognized flag.\n");
+ i2cerr("Write mode: next message has an unrecognized flag.\n");
stm32_i2c_traceevent(priv, I2CEVENT_WRITE_FLAG_ERROR, priv->msgv->flags);
}
}
else
{
- i2cdbg("Write mode error.\n");
+ i2cerr("Write mode error.\n");
stm32_i2c_traceevent(priv, I2CEVENT_WRITE_ERROR, 0);
}
}
@@ -1654,7 +1654,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
* (RXNE is set) then the driver can read from the data register.
*/
- i2cvdbg("Entering read mode dcnt = %i msgc = %i, status %i\n",
+ i2cinfo("Entering read mode dcnt = %i msgc = %i, status %i\n",
priv->dcnt, priv->msgc, status);
/* Implementation of method 2 for receiving data following
@@ -1665,7 +1665,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
if (priv->dcnt == 0 && priv->total_msg_len == 1)
{
- i2cvdbg("short read N=1: Read data from data register(DR)\n");
+ i2cinfo("short read N=1: Read data from data register(DR)\n");
*priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
priv->dcnt--;
@@ -1676,12 +1676,12 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
else if (priv->dcnt == 2 && priv->total_msg_len == 2 && !(status & I2C_SR1_BTF))
{
- i2cvdbg("short read N=2: DR full, SR empty. Waiting for more bytes.\n");
+ i2cinfo("short read N=2: DR full, SR empty. Waiting for more bytes.\n");
stm32_i2c_traceevent(priv, I2CEVENT_READ_SR_EMPTY, 0);
}
else if (priv->dcnt == 2 && priv->total_msg_len == 2 && (status & I2C_SR1_BTF))
{
- i2cvdbg("short read N=2: DR and SR full setting stop bit and reading twice\n");
+ i2cinfo("short read N=2: DR and SR full setting stop bit and reading twice\n");
stm32_i2c_sendstop(priv);
*priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
@@ -1708,7 +1708,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
* this should be able to handle it).
*/
- i2cvdbg("DR full, SR empty. Waiting for more bytes.\n");
+ i2cinfo("DR full, SR empty. Waiting for more bytes.\n");
stm32_i2c_traceevent(priv, I2CEVENT_READ_SR_EMPTY, 0);
}
else if (priv->dcnt >= 4 && priv->total_msg_len >= 3 && (status & I2C_SR1_BTF))
@@ -1717,7 +1717,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
* RXNE(receive buffer not empty) flag.
*/
- i2cvdbg("Read data from data register(DR)\n");
+ i2cinfo("Read data from data register(DR)\n");
*priv->ptr++ = stm32_i2c_getreg(priv, STM32_I2C_DR_OFFSET);
/* Decrease current message length */
@@ -1732,8 +1732,8 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
* This coincides with EV7_2 in the reference manual.
*/
- i2cvdbg("Program NACK\n");
- i2cvdbg("Read data from data register(DR) dcnt=3\n");
+ i2cinfo("Program NACK\n");
+ i2cinfo("Read data from data register(DR) dcnt=3\n");
stm32_i2c_traceevent(priv, I2CEVENT_READ_3, priv->dcnt);
@@ -1753,10 +1753,10 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
}
else if (priv->dcnt == 2 && (status & I2C_SR1_BTF) && priv->total_msg_len >= 3)
{
- i2cvdbg("Program stop\n");
- i2cvdbg("Read data from data register(DR) dcnt=2\n");
- i2cvdbg("Read data from data register(SR) dcnt=1\n");
- i2cvdbg("Setting condition to stop ISR dcnt = -1\n");
+ i2cinfo("Program stop\n");
+ i2cinfo("Read data from data register(DR) dcnt=2\n");
+ i2cinfo("Read data from data register(SR) dcnt=1\n");
+ i2cinfo("Setting condition to stop ISR dcnt = -1\n");
stm32_i2c_traceevent(priv, I2CEVENT_READ_3, priv->dcnt);
@@ -1783,8 +1783,8 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
else
{
- i2cdbg("I2C read mode no correct state detected\n");
- i2cdbg(" state %i, dcnt=%i\n", status, priv->dcnt);
+ i2cerr("I2C read mode no correct state detected\n");
+ i2cerr(" state %i, dcnt=%i\n", status, priv->dcnt);
/* set condition to terminate ISR and wake waiting thread */
@@ -1809,7 +1809,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
/* Read rest of the state */
status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16);
- i2cdbg("Empty call to ISR: Stopping ISR\n");
+ i2cerr("Empty call to ISR: Stopping ISR\n");
stm32_i2c_traceevent(priv, I2CEVENT_ISR_EMPTY_CALL, 0);
}
@@ -1833,8 +1833,8 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16);
- i2cdbg(" No correct state detected(start bit, read or write) \n");
- i2cdbg(" state %i\n", status);
+ i2cerr(" No correct state detected(start bit, read or write) \n");
+ i2cerr(" state %i\n", status);
/* set condition to terminate ISR and wake waiting thread */
@@ -1853,7 +1853,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
if (priv->dcnt == -1 && priv->msgc == 0)
{
- i2cvdbg("Shutting down I2C ISR\n");
+ i2cinfo("Shutting down I2C ISR\n");
stm32_i2c_traceevent(priv, I2CEVENT_ISR_SHUTDOWN, 0);
@@ -2126,7 +2126,7 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
status = stm32_i2c_getstatus(priv);
ret = -ETIMEDOUT;
- i2cdbg("Timed out: CR1: 0x%04x status: 0x%08x\n",
+ i2cerr("Timed out: CR1: 0x%04x status: 0x%08x\n",
stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET), status);
/* "Note: When the STOP, START or PEC bit is set, the software must
@@ -2156,7 +2156,7 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
* Note: this commentary is found in both places.
*
*/
- i2cdbg("Check if the address was valid\n");
+ i2cerr("Check if the address was valid\n");
stm32_i2c_sendstop(priv);
#endif
/* Clear busy flag in case of timeout */
diff --git a/arch/arm/src/stm32/stm32_idle.c b/arch/arm/src/stm32/stm32_idle.c
index 0786f2ac99cb917bc10c9f6d7ee70a9545effb6f..64e08a1b047781ddc254cd91a4328f1a0c9838f0 100644
--- a/arch/arm/src/stm32/stm32_idle.c
+++ b/arch/arm/src/stm32/stm32_idle.c
@@ -101,7 +101,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */
- llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+ llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */
diff --git a/arch/arm/src/stm32/stm32_irq.c b/arch/arm/src/stm32/stm32_irq.c
index e6a347c00ac3e26e11c2571e81b2bd308a08769e..8b6f57db6ab34bebf188b0ca9604fb1c9c142a30 100644
--- a/arch/arm/src/stm32/stm32_irq.c
+++ b/arch/arm/src/stm32/stm32_irq.c
@@ -113,33 +113,33 @@ static void stm32_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" INTCTRL: %08x VECTAB: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+ llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
- lldbg(" IRQ ENABLE: %08x %08x %08x\n",
+ llerr(" IRQ ENABLE: %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
- lldbg(" SYSH_PRIO: %08x %08x %08x\n",
+ llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
- lldbg(" %08x\n",
+ llerr(" %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY));
leave_critical_section(flags);
}
@@ -149,7 +149,7 @@ static void stm32_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: stm32_nmi, stm32_busfault, stm32_usagefault, stm32_pendsv,
- * stm32_dbgmonitor, stm32_pendsv, stm32_reserved
+ * stm32_errmonitor, stm32_pendsv, stm32_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@@ -158,11 +158,11 @@ static void stm32_dumpnvic(const char *msg, int irq)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int stm32_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -170,7 +170,7 @@ static int stm32_nmi(int irq, FAR void *context)
static int stm32_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
+ err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -178,7 +178,7 @@ static int stm32_busfault(int irq, FAR void *context)
static int stm32_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
+ err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -186,15 +186,15 @@ static int stm32_usagefault(int irq, FAR void *context)
static int stm32_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
-static int stm32_dbgmonitor(int irq, FAR void *context)
+static int stm32_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Debug Monitor received\n");
+ err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@@ -202,7 +202,7 @@ static int stm32_dbgmonitor(int irq, FAR void *context)
static int stm32_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -408,7 +408,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(STM32_IRQ_NMI, stm32_nmi);
#ifndef CONFIG_ARM_MPU
irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
@@ -416,7 +416,7 @@ void up_irqinitialize(void)
irq_attach(STM32_IRQ_BUSFAULT, stm32_busfault);
irq_attach(STM32_IRQ_USAGEFAULT, stm32_usagefault);
irq_attach(STM32_IRQ_PENDSV, stm32_pendsv);
- irq_attach(STM32_IRQ_DBGMONITOR, stm32_dbgmonitor);
+ irq_attach(STM32_IRQ_DBGMONITOR, stm32_errmonitor);
irq_attach(STM32_IRQ_RESERVED, stm32_reserved);
#endif
diff --git a/arch/arm/src/stm32/stm32_iwdg.c b/arch/arm/src/stm32/stm32_iwdg.c
index 80d45be7292a4a8e9c111f6dd5ac49da2f786690..cc38922ff583e4c6b09118832edce5ff5ed4a067 100644
--- a/arch/arm/src/stm32/stm32_iwdg.c
+++ b/arch/arm/src/stm32/stm32_iwdg.c
@@ -107,16 +107,16 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the watchdog
- * driver. NOTE: that only lldbg types are used so that the output is
+ * driver. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_WATCHDOG
-# define wddbg lldbg
-# define wdvdbg llvdbg
+# define wderr llerr
+# define wdinfo llinfo
#else
-# define wddbg(x...)
-# define wdvdbg(x...)
+# define wderr(x...)
+# define wdinfo(x...)
#endif
/****************************************************************************
@@ -143,7 +143,7 @@ struct stm32_lowerhalf_s
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint16_t stm32_getreg(uint32_t addr);
static void stm32_putreg(uint16_t val, uint32_t addr);
#else
@@ -195,7 +195,7 @@ static struct stm32_lowerhalf_s g_wdgdev;
*
****************************************************************************/
-#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint16_t stm32_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -216,7 +216,7 @@ static uint16_t stm32_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -233,7 +233,7 @@ static uint16_t stm32_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -245,7 +245,7 @@ static uint16_t stm32_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%04x\n", addr, val);
+ llerr("%08x->%04x\n", addr, val);
return val;
}
#endif
@@ -258,12 +258,12 @@ static uint16_t stm32_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void stm32_putreg(uint16_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%04x\n", addr, val);
+ llerr("%08x<-%04x\n", addr, val);
/* Write the value */
@@ -339,7 +339,7 @@ static int stm32_start(FAR struct watchdog_lowerhalf_s *lower)
FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
irqstate_t flags;
- wdvdbg("Entry: started=%d\n");
+ wdinfo("Entry: started=%d\n");
DEBUGASSERT(priv);
/* Have we already been started? */
@@ -394,7 +394,7 @@ static int stm32_stop(FAR struct watchdog_lowerhalf_s *lower)
{
/* There is no way to disable the IDWG timer once it has been started */
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
return -ENOSYS;
}
@@ -420,7 +420,7 @@ static int stm32_keepalive(FAR struct watchdog_lowerhalf_s *lower)
FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
irqstate_t flags;
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
/* Reload the IWDG timer */
@@ -455,7 +455,7 @@ static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower,
uint32_t ticks;
uint32_t elapsed;
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
DEBUGASSERT(priv);
/* Return the status bit */
@@ -484,10 +484,10 @@ static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower,
status->timeleft = priv->timeout - elapsed;
- wdvdbg("Status :\n");
- wdvdbg(" flags : %08x\n", status->flags);
- wdvdbg(" timeout : %d\n", status->timeout);
- wdvdbg(" timeleft : %d\n", status->timeleft);
+ wdinfo("Status :\n");
+ wdinfo(" flags : %08x\n", status->flags);
+ wdinfo(" timeout : %d\n", status->timeout);
+ wdinfo(" timeleft : %d\n", status->timeleft);
return OK;
}
@@ -516,14 +516,14 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
int prescaler;
int shift;
- wdvdbg("Entry: timeout=%d\n", timeout);
+ wdinfo("Entry: timeout=%d\n", timeout);
DEBUGASSERT(priv);
/* Can this timeout be represented? */
if (timeout < 1 || timeout > IWDG_MAXTIMEOUT)
{
- wddbg("Cannot represent timeout=%d > %d\n",
+ wderr("Cannot represent timeout=%d > %d\n",
timeout, IWDG_MAXTIMEOUT);
return -ERANGE;
}
@@ -536,7 +536,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
#ifdef CONFIG_STM32_IWDG_ONETIMESETUP
if (priv->started)
{
- wddbg("Timer is already started\n");
+ wderr("Timer is already started\n");
return -EBUSY;
}
#endif
@@ -631,7 +631,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
}
#endif
- wdvdbg("prescaler=%d fiwdg=%d reload=%d\n", prescaler, fiwdg, reload);
+ wdinfo("prescaler=%d fiwdg=%d reload=%d\n", prescaler, fiwdg, reload);
return OK;
}
@@ -662,7 +662,7 @@ void stm32_iwdginitialize(FAR const char *devpath, uint32_t lsifreq)
{
FAR struct stm32_lowerhalf_s *priv = &g_wdgdev;
- wdvdbg("Entry: devpath=%s lsifreq=%d\n", devpath, lsifreq);
+ wdinfo("Entry: devpath=%s lsifreq=%d\n", devpath, lsifreq);
/* NOTE we assume that clocking to the IWDG has already been provided by
* the RCC initialization logic.
@@ -682,7 +682,7 @@ void stm32_iwdginitialize(FAR const char *devpath, uint32_t lsifreq)
*/
stm32_rcc_enablelsi();
- wdvdbg("RCC CSR: %08x\n", getreg32(STM32_RCC_CSR));
+ wdinfo("RCC CSR: %08x\n", getreg32(STM32_RCC_CSR));
/* Select an arbitrary initial timeout value. But don't start the watchdog
* yet. NOTE: If the "Hardware watchdog" feature is enabled through the
diff --git a/arch/arm/src/stm32/stm32_ltdc.c b/arch/arm/src/stm32/stm32_ltdc.c
index 8ae8e890fdb99fe1fedfeb73f20c874e4f30b6f2..9ad25dfeed98c9c506787798a53319ca8c54a19b 100644
--- a/arch/arm/src/stm32/stm32_ltdc.c
+++ b/arch/arm/src/stm32/stm32_ltdc.c
@@ -283,11 +283,11 @@
/* Debug option */
#ifdef CONFIG_STM32_LTDC_REGDEBUG
-# define regdbg dbg
-# define regvdbg vdbg
+# define regerr err
+# define reginfo info
#else
-# define regdbg(x...)
-# define regvdbg(x...)
+# define regerr(x...)
+# define reginfo(x...)
#endif
/* Preallocated LTDC framebuffers */
@@ -942,13 +942,13 @@ static void stm32_ltdc_gpioconfig(void)
{
int i;
- gvdbg("Configuring pins\n");
+ ginfo("Configuring pins\n");
/* Configure each pin */
for (i = 0; i < STM32_LTDC_NPINCONFIGS; i++)
{
- regvdbg("set gpio%d = %08x\n", i, g_ltdcpins[i]);
+ reginfo("set gpio%d = %08x\n", i, g_ltdcpins[i]);
stm32_configgpio(g_ltdcpins[i]);
}
}
@@ -972,51 +972,51 @@ static void stm32_ltdc_periphconfig(void)
/* Configure APB2 LTDC clock external */
- regvdbg("configured RCC_APB2ENR=%08x\n", getreg32(STM32_RCC_APB2ENR));
+ reginfo("configured RCC_APB2ENR=%08x\n", getreg32(STM32_RCC_APB2ENR));
/* Configure the SAI PLL external to provide the LCD_CLK */
- regvdbg("configured RCC_PLLSAI=%08x\n", getreg32(STM32_RCC_PLLSAICFGR));
+ reginfo("configured RCC_PLLSAI=%08x\n", getreg32(STM32_RCC_PLLSAICFGR));
/* Configure dedicated clock external */
- regvdbg("configured RCC_DCKCFGR=%08x\n", getreg32(STM32_RCC_DCKCFGR));
+ reginfo("configured RCC_DCKCFGR=%08x\n", getreg32(STM32_RCC_DCKCFGR));
/* Configure LTDC_SSCR */
regval = (STM32_LTDC_SSCR_VSH | STM32_LTDC_SSCR_HSW);
- regvdbg("set LTDC_SSCR=%08x\n", regval);
+ reginfo("set LTDC_SSCR=%08x\n", regval);
putreg32(regval, STM32_LTDC_SSCR);
- regvdbg("configured LTDC_SSCR=%08x\n", getreg32(STM32_LTDC_SSCR));
+ reginfo("configured LTDC_SSCR=%08x\n", getreg32(STM32_LTDC_SSCR));
/* Configure LTDC_BPCR */
regval = (STM32_LTDC_BPCR_AVBP | STM32_LTDC_BPCR_AHBP);
- regvdbg("set LTDC_BPCR=%08x\n", regval);
+ reginfo("set LTDC_BPCR=%08x\n", regval);
putreg32(regval, STM32_LTDC_BPCR);
- regvdbg("configured LTDC_BPCR=%08x\n", getreg32(STM32_LTDC_BPCR));
+ reginfo("configured LTDC_BPCR=%08x\n", getreg32(STM32_LTDC_BPCR));
/* Configure LTDC_AWCR */
regval = (STM32_LTDC_AWCR_AAH | STM32_LTDC_AWCR_AAW);
- regvdbg("set LTDC_AWCR=%08x\n", regval);
+ reginfo("set LTDC_AWCR=%08x\n", regval);
putreg32(regval, STM32_LTDC_AWCR);
- regvdbg("configured LTDC_AWCR=%08x\n", getreg32(STM32_LTDC_AWCR));
+ reginfo("configured LTDC_AWCR=%08x\n", getreg32(STM32_LTDC_AWCR));
/* Configure LTDC_TWCR */
regval = (STM32_LTDC_TWCR_TOTALH | STM32_LTDC_TWCR_TOTALW);
- regvdbg("set LTDC_TWCR=%08x\n", regval);
+ reginfo("set LTDC_TWCR=%08x\n", regval);
putreg32(regval, STM32_LTDC_TWCR);
- regvdbg("configured LTDC_TWCR=%08x\n", getreg32(STM32_LTDC_TWCR));
+ reginfo("configured LTDC_TWCR=%08x\n", getreg32(STM32_LTDC_TWCR));
/* Configure LTDC_GCR */
regval = (STM32_LTDC_GCR_PCPOL | STM32_LTDC_GCR_DEPOL
| STM32_LTDC_GCR_VSPOL | STM32_LTDC_GCR_HSPOL);
- regvdbg("set LTDC_GCR=%08x\n", regval);
+ reginfo("set LTDC_GCR=%08x\n", regval);
putreg32(regval, STM32_LTDC_GCR);
- regvdbg("configured LTDC_GCR=%08x\n", getreg32(STM32_LTDC_GCR));
+ reginfo("configured LTDC_GCR=%08x\n", getreg32(STM32_LTDC_GCR));
}
/****************************************************************************
@@ -1032,9 +1032,9 @@ static void stm32_ltdc_periphconfig(void)
static void stm32_ltdc_bgcolor(uint32_t rgb)
{
- regvdbg("set LTDC_BCCR=%08x\n", rgb);
+ reginfo("set LTDC_BCCR=%08x\n", rgb);
putreg32(rgb, STM32_LTDC_BCCR);
- regvdbg("configured LTDC_BCCR=%08x\n", getreg32(STM32_LTDC_BCCR));
+ reginfo("configured LTDC_BCCR=%08x\n", getreg32(STM32_LTDC_BCCR));
}
/****************************************************************************
@@ -1073,9 +1073,9 @@ static void stm32_ltdc_dither(bool enable,
LTDC_GCR_DGW(0) | LTDC_GCR_DBW(0));
regval |= (LTDC_GCR_DRW(red) | LTDC_GCR_DGW(green) | LTDC_GCR_DBW(blue));
- regvdbg("set LTDC_GCR=%08x\n", regval);
+ reginfo("set LTDC_GCR=%08x\n", regval);
putreg32(regval, STM32_LTDC_GCR);
- regvdbg("configured LTDC_GCR=%08x\n", getreg32(STM32_LTDC_GCR));
+ reginfo("configured LTDC_GCR=%08x\n", getreg32(STM32_LTDC_GCR));
}
/****************************************************************************
@@ -1090,9 +1090,9 @@ static void stm32_ltdc_linepos(void)
{
/* Configure LTDC_LIPCR */
- regvdbg("set LTDC_LIPCR=%08x\n", STM32_LTDC_LIPCR_LIPOS);
+ reginfo("set LTDC_LIPCR=%08x\n", STM32_LTDC_LIPCR_LIPOS);
putreg32(STM32_LTDC_LIPCR_LIPOS, STM32_LTDC_LIPCR);
- regvdbg("configured LTDC_LIPCR=%08x\n", getreg32(STM32_LTDC_LIPCR));
+ reginfo("configured LTDC_LIPCR=%08x\n", getreg32(STM32_LTDC_LIPCR));
}
/****************************************************************************
@@ -1114,9 +1114,9 @@ static void stm32_ltdc_irqctrl(uint32_t setirqs, uint32_t clrirqs)
regval = getreg32(STM32_LTDC_IER);
regval &= ~clrirqs;
regval |= setirqs;
- regvdbg("set LTDC_IER=%08x\n", regval);
+ reginfo("set LTDC_IER=%08x\n", regval);
putreg32(regval, STM32_LTDC_IER);
- regvdbg("configured LTDC_IER=%08x\n", getreg32(STM32_LTDC_IER));
+ reginfo("configured LTDC_IER=%08x\n", getreg32(STM32_LTDC_IER));
}
/****************************************************************************
@@ -1133,7 +1133,7 @@ static int stm32_ltdcirq(int irq, void *context)
uint32_t regval = getreg32(STM32_LTDC_ISR);
- regvdbg("irq = %d, regval = %08x\n", irq, regval);
+ reginfo("irq = %d, regval = %08x\n", irq, regval);
if (regval & LTDC_ISR_RRIF)
{
@@ -1155,7 +1155,7 @@ static int stm32_ltdcirq(int irq, void *context)
if (ret != OK)
{
- dbg("sem_post() failed\n");
+ err("sem_post() failed\n");
return ret;
}
}
@@ -1202,7 +1202,7 @@ static int stm32_ltdc_waitforirq(void)
if (ret != OK)
{
- dbg("sem_wait() failed\n");
+ err("sem_wait() failed\n");
}
}
@@ -1255,9 +1255,9 @@ static int stm32_ltdc_reload(uint8_t value, bool waitvblank)
* immediately reload is set.
*/
- regvdbg("set LTDC_SRCR=%08x\n", value);
+ reginfo("set LTDC_SRCR=%08x\n", value);
putreg32(value, STM32_LTDC_SRCR);
- regvdbg("configured LTDC_SRCR=%08x\n", getreg32(STM32_LTDC_SRCR));
+ reginfo("configured LTDC_SRCR=%08x\n", getreg32(STM32_LTDC_SRCR));
if (waitvblank & (value == LTDC_SRCR_VBR))
{
@@ -1354,7 +1354,7 @@ static void stm32_lcd_enable(bool enable)
uint32_t regval;
regval = getreg32(STM32_LTDC_GCR);
- regvdbg("get LTDC_GCR=%08x\n", regval);
+ reginfo("get LTDC_GCR=%08x\n", regval);
if (enable == true)
{
@@ -1365,9 +1365,9 @@ static void stm32_lcd_enable(bool enable)
regval &= ~LTDC_GCR_LTDCEN;
}
- regvdbg("set LTDC_GCR=%08x\n", regval);
+ reginfo("set LTDC_GCR=%08x\n", regval);
putreg32(regval, STM32_LTDC_GCR);
- regvdbg("configured LTDC_GCR=%08x\n", getreg32(STM32_LTDC_GCR));
+ reginfo("configured LTDC_GCR=%08x\n", getreg32(STM32_LTDC_GCR));
}
/****************************************************************************
@@ -1392,7 +1392,7 @@ static void stm32_ltdc_lclutenable(FAR struct stm32_layer_s *layer, bool enable)
uint32_t regval;
regval = getreg32(stm32_cr_layer_t[layer->state.lid]);
- regvdbg("get LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
+ reginfo("get LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
/* Disable the clut support during update the color table */
@@ -1405,7 +1405,7 @@ static void stm32_ltdc_lclutenable(FAR struct stm32_layer_s *layer, bool enable)
regval &= ~LTDC_LxCR_CLUTEN;
}
- regvdbg("set LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
+ reginfo("set LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
putreg32(regval, stm32_cr_layer_t[layer->state.lid]);
}
#endif
@@ -1519,7 +1519,7 @@ static int stm32_ltdc_lvalidatearea(FAR struct stm32_layer_s *layer,
(srcypos > ypos + yres - 1))
{
- gdbg("layer coordinates out of valid area: xpos = %d > %d, \
+ gerr("layer coordinates out of valid area: xpos = %d > %d, \
ypos = %d > %d, width = %d > %d, height = %d > %d, \
srcxpos = %d > %d, srcypos = %d > %d",
xpos, vinfo->xres - 1,
@@ -1529,7 +1529,7 @@ static int stm32_ltdc_lvalidatearea(FAR struct stm32_layer_s *layer,
srcxpos, xpos + xres - 1,
srcypos, ypos + yres - 1);
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -1615,7 +1615,7 @@ static void stm32_ltdc_larea(struct stm32_layer_s *layer)
FAR struct stm32_ltdc_s *priv = &layer->state;
FAR struct ltdc_area_s *area = &priv->area;
- regvdbg("xpos = %d, ypos = %d, xres = %d, yres = %d\n",
+ reginfo("xpos = %d, ypos = %d, xres = %d, yres = %d\n",
area->xpos, area->ypos, area->xres, area->yres);
lxpos = area->xpos + (STM32_LTDC_LxWHPCR_WHSTPOS + 1);
@@ -1633,9 +1633,9 @@ static void stm32_ltdc_larea(struct stm32_layer_s *layer)
/* Configure LxWHPCR / LxWVPCR register */
- regvdbg("set LTDC_L%dWHPCR=%08x\n", priv->lid + 1, whpcr);
+ reginfo("set LTDC_L%dWHPCR=%08x\n", priv->lid + 1, whpcr);
putreg32(whpcr, stm32_whpcr_layer_t[priv->lid]);
- regvdbg("set LTDC_L%dWVPCR=%08x\n", priv->lid + 1, wvpcr);
+ reginfo("set LTDC_L%dWVPCR=%08x\n", priv->lid + 1, wvpcr);
putreg32(wvpcr, stm32_wvpcr_layer_t[priv->lid]);
/* Configure framebuffer */
@@ -1664,7 +1664,7 @@ static void stm32_ltdc_lpixelformat(FAR struct stm32_layer_s *layer)
{
/* Configure PFCR register */
- regvdbg("set LTDC_L%dPFCR=%08x\n", layer->state.lid + 1,
+ reginfo("set LTDC_L%dPFCR=%08x\n", layer->state.lid + 1,
stm32_fmt_layer_t[layer->state.lid]);
putreg32(stm32_fmt_layer_t[layer->state.lid],
stm32_pfcr_layer_t[layer->state.lid]);
@@ -1698,7 +1698,7 @@ static inline void stm32_ltdc_lframebuffer(FAR struct stm32_layer_s *layer)
offset = priv->xpos * STM32_LTDC_Lx_BYPP(pinfo->bpp) +
pinfo->stride * priv->ypos;
- regvdbg("set LTDC_L%dCFBAR=%08x\n", priv->lid + 1, pinfo->fbmem + offset);
+ reginfo("set LTDC_L%dCFBAR=%08x\n", priv->lid + 1, pinfo->fbmem + offset);
putreg32((uint32_t)pinfo->fbmem + offset, stm32_cfbar_layer_t[priv->lid]);
/* Configure LxCFBLR register */
@@ -1708,12 +1708,12 @@ static inline void stm32_ltdc_lframebuffer(FAR struct stm32_layer_s *layer)
cfblr = LTDC_LxCFBLR_CFBP(pinfo->stride) |
LTDC_LxCFBLR_CFBLL(area->xres * STM32_LTDC_Lx_BYPP(pinfo->bpp) + 3);
- regvdbg("set LTDC_L%dCFBLR=%08x\n", priv->lid + 1, cfblr);
+ reginfo("set LTDC_L%dCFBLR=%08x\n", priv->lid + 1, cfblr);
putreg32(cfblr, stm32_cfblr_layer_t[priv->lid]);
/* Configure LxCFBLNR register */
- regvdbg("set LTDC_L%dCFBLNR=%08x\n", priv->lid + 1, area->yres);
+ reginfo("set LTDC_L%dCFBLNR=%08x\n", priv->lid + 1, area->yres);
putreg32(area->yres, stm32_cfblnr_layer_t[priv->lid]);
}
@@ -1733,7 +1733,7 @@ static inline void stm32_ltdc_lframebuffer(FAR struct stm32_layer_s *layer)
static void stm32_ltdc_lalpha(FAR struct stm32_layer_s *layer)
{
uint8_t opac = stm32_ltdc_lgetopac(layer);
- regvdbg("set LTDC_L%dCACR=%02x\n", layer->state.lid + 1, opac);
+ reginfo("set LTDC_L%dCACR=%02x\n", layer->state.lid + 1, opac);
putreg32(opac, stm32_cacr_layer_t[layer->state.lid]);
/* Clear the constant alpha operation flag */
@@ -1760,7 +1760,7 @@ static void stm32_ltdc_lalpha(FAR struct stm32_layer_s *layer)
static void stm32_ltdc_lblendmode(FAR struct stm32_layer_s *layer,
uint8_t bf1, uint8_t bf2)
{
- regvdbg("set LTDC_L%dBFCR=%08x\n", layer->state.lid + 1,
+ reginfo("set LTDC_L%dBFCR=%08x\n", layer->state.lid + 1,
(LTDC_LxBFCR_BF1(bf1) | LTDC_LxBFCR_BF2(bf2)));
putreg32((LTDC_LxBFCR_BF1(bf1) | LTDC_LxBFCR_BF2(bf2)),
stm32_bfcr_layer_t[layer->state.lid]);
@@ -1785,7 +1785,7 @@ static void stm32_ltdc_lblendmode(FAR struct stm32_layer_s *layer,
static void stm32_ltdc_lcolor(FAR struct stm32_layer_s *layer, uint32_t argb)
{
- regvdbg("set LTDC_L%dDCCR=%08x\n", layer->state.lid + 1, argb);
+ reginfo("set LTDC_L%dDCCR=%08x\n", layer->state.lid + 1, argb);
putreg32(argb, stm32_dccr_layer_t[layer->state.lid]);
/* Clear the color operation flag */
@@ -1816,7 +1816,7 @@ static void stm32_ltdc_lcolorkey(FAR struct stm32_layer_s *layer)
{
/* Set colorkey */
- regvdbg("set LTDC_L%dCKCR=%08x\n",
+ reginfo("set LTDC_L%dCKCR=%08x\n",
layer->state.lid + 1, layer->state.colorkey);
putreg32(layer->state.colorkey, stm32_ckcr_layer_t[layer->state.lid]);
@@ -1831,7 +1831,7 @@ static void stm32_ltdc_lcolorkey(FAR struct stm32_layer_s *layer)
regval &= ~LTDC_LxCR_COLKEN;
}
- regvdbg("set LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
+ reginfo("set LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
putreg32(regval, stm32_cr_layer_t[layer->state.lid]);
/* Clear the colorkey operation flag */
@@ -1903,7 +1903,7 @@ static void stm32_ltdc_lclut(FAR struct stm32_layer_s *layer,
#endif
- regvdbg("set LTDC_L%dCLUTWR = %08x, cmap->first = %d, cmap->len = %d\n",
+ reginfo("set LTDC_L%dCLUTWR = %08x, cmap->first = %d, cmap->len = %d\n",
layer->state.lid + 1, regval, cmap->first, cmap->len);
putreg32(regval, stm32_clutwr_layer_t[layer->state.lid]);
}
@@ -1950,7 +1950,7 @@ static void stm32_ltdc_lenable(FAR struct stm32_layer_s *layer)
regval &= ~LTDC_LxCR_LEN;
}
- regvdbg("set LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
+ reginfo("set LTDC_L%dCR=%08x\n", layer->state.lid + 1, regval);
putreg32(regval, stm32_cr_layer_t[layer->state.lid]);
/* Clear the enable operation flag */
@@ -1985,7 +1985,7 @@ static void stm32_ltdc_lclear(FAR struct stm32_layer_s *layer,
uint8_t *dest = (uint8_t *)priv->pinfo.fbmem;
int i;
- gvdbg("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
+ ginfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
priv->pinfo.bpp, color, dest, priv->pinfo.fblen);
for (i = 0; i < priv->pinfo.fblen; i += sizeof(uint8_t))
@@ -2003,7 +2003,7 @@ static void stm32_ltdc_lclear(FAR struct stm32_layer_s *layer,
uint16_t *dest = (uint16_t *)priv->pinfo.fbmem;
int i;
- gvdbg("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
+ ginfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
priv->pinfo.bpp, color, dest, priv->pinfo.fblen);
for (i = 0; i < priv->pinfo.fblen; i += sizeof(uint16_t))
@@ -2024,7 +2024,7 @@ static void stm32_ltdc_lclear(FAR struct stm32_layer_s *layer,
uint8_t b;
int i;
- gvdbg("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
+ ginfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
priv->pinfo.bpp, color, dest, priv->pinfo.fblen);
r = (uint8_t) color;
@@ -2048,7 +2048,7 @@ static void stm32_ltdc_lclear(FAR struct stm32_layer_s *layer,
uint32_t *dest = (uint32_t *)priv->pinfo.fbmem;
int i;
- gvdbg("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
+ ginfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n",
priv->pinfo.bpp, color, dest, priv->pinfo.fblen);
for (i = 0; i < priv->pinfo.fblen; i += sizeof(uint32_t))
@@ -2191,7 +2191,7 @@ static void stm32_ltdc_linit(int lid)
static int stm32_getvideoinfo(struct fb_vtable_s *vtable,
struct fb_videoinfo_s *vinfo)
{
- gvdbg("vtable=%p vinfo=%p\n", vtable, vinfo);
+ ginfo("vtable=%p vinfo=%p\n", vtable, vinfo);
if (vtable)
{
FAR struct ltdc_layer_s *ltdc;
@@ -2203,7 +2203,7 @@ static int stm32_getvideoinfo(struct fb_vtable_s *vtable,
return stm32_lgetvideoinfo(ltdc, vinfo);
}
- gdbg("ERROR: Returning EINVAL\n");
+ gerr("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@@ -2226,7 +2226,7 @@ static int stm32_getvideoinfo(struct fb_vtable_s *vtable,
static int stm32_getplaneinfo(struct fb_vtable_s *vtable, int planeno,
struct fb_planeinfo_s *pinfo)
{
- gvdbg("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
+ ginfo("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
if (vtable)
{
FAR struct ltdc_layer_s *ltdc;
@@ -2238,7 +2238,7 @@ static int stm32_getplaneinfo(struct fb_vtable_s *vtable, int planeno,
return stm32_lgetplaneinfo(ltdc, planeno, pinfo);
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -2315,7 +2315,7 @@ static int stm32_putcmap(struct fb_vtable_s *vtable,
static int stm32_lgetvideoinfo(struct ltdc_layer_s *layer,
struct fb_videoinfo_s *vinfo)
{
- gvdbg("layer=%p vinfo=%p\n", layer, vinfo);
+ ginfo("layer=%p vinfo=%p\n", layer, vinfo);
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
if (stm32_ltdc_lvalidate(priv))
@@ -2325,7 +2325,7 @@ static int stm32_lgetvideoinfo(struct ltdc_layer_s *layer,
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -2349,7 +2349,7 @@ static int stm32_lgetvideoinfo(struct ltdc_layer_s *layer,
static int stm32_lgetplaneinfo(struct ltdc_layer_s *layer, int planeno,
struct fb_planeinfo_s *pinfo)
{
- gvdbg("layer=%p planeno=%d pinfo=%p\n", layer, planeno, pinfo);
+ ginfo("layer=%p planeno=%d pinfo=%p\n", layer, planeno, pinfo);
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
if (stm32_ltdc_lvalidate(priv) && planeno == 0)
@@ -2358,7 +2358,7 @@ static int stm32_lgetplaneinfo(struct ltdc_layer_s *layer, int planeno,
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -2386,7 +2386,7 @@ static int stm32_setclut(struct ltdc_layer_s *layer,
{
int ret;
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
- gvdbg("layer=%p cmap=%p\n", layer, cmap);
+ ginfo("layer=%p cmap=%p\n", layer, cmap);
if (stm32_ltdc_lvalidate(priv) && cmap)
{
@@ -2394,13 +2394,13 @@ static int stm32_setclut(struct ltdc_layer_s *layer,
if (priv->state.vinfo.fmt != FB_FMT_RGB8)
{
- gdbg("Error: CLUT is not supported for the pixel format: %d\n",
+ gerr("Error: CLUT is not supported for the pixel format: %d\n",
priv->state.vinfo.fmt);
ret = -EINVAL;
}
else if (cmap->first >= STM32_LTDC_NCLUT)
{
- gdbg("Error: only %d color table entries supported\n",
+ gerr("Error: only %d color table entries supported\n",
STM32_LTDC_NCLUT);
ret = -EINVAL;
}
@@ -2418,7 +2418,7 @@ static int stm32_setclut(struct ltdc_layer_s *layer,
return ret;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -2444,7 +2444,7 @@ static int stm32_getclut(struct ltdc_layer_s *layer,
{
int ret;
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
- gvdbg("layer=%p cmap=%p\n", layer, cmap);
+ ginfo("layer=%p cmap=%p\n", layer, cmap);
if (priv == &LAYER_L1 || priv == &LAYER_L2)
{
@@ -2460,13 +2460,13 @@ static int stm32_getclut(struct ltdc_layer_s *layer,
#else
if (priv->state.vinfo.fmt != FB_FMT_RGB8)
{
- gdbg("Error: CLUT is not supported for the pixel format: %d\n",
+ gerr("Error: CLUT is not supported for the pixel format: %d\n",
priv->state.vinfo.fmt);
ret = -EINVAL;
}
else if (cmap->first >= STM32_LTDC_NCLUT)
{
- gdbg("Error: only %d color table entries supported\n",
+ gerr("Error: only %d color table entries supported\n",
STM32_LTDC_NCLUT);
ret = -EINVAL;
}
@@ -2489,7 +2489,7 @@ static int stm32_getclut(struct ltdc_layer_s *layer,
cmap->green[n] = clut888[offset + 1];
cmap->red[n] = clut888[offset + 2];
- regvdbg("n=%d, red=%02x, green=%02x, blue=%02x\n", n,
+ reginfo("n=%d, red=%02x, green=%02x, blue=%02x\n", n,
clut888[offset], clut888[offset + 1],
clut888[offset + 2]);
# else
@@ -2498,7 +2498,7 @@ static int stm32_getclut(struct ltdc_layer_s *layer,
cmap->green[n] = (uint8_t)LTDC_CMAP_GREEN(clut[n]);
cmap->blue[n] = (uint8_t)LTDC_CMAP_BLUE(clut[n]);
- regvdbg("n=%d, alpha=%02x, red=%02x, green=%02x, blue=%02x\n", n,
+ reginfo("n=%d, alpha=%02x, red=%02x, green=%02x, blue=%02x\n", n,
DMA2D_CMAP_ALPHA(clut[n]), DMA2D_CMAP_RED(clut[n]),
DMA2D_CMAP_GREEN(clut[n]), DMA2D_CMAP_BLUE(clut[n]));
# endif
@@ -2512,7 +2512,7 @@ static int stm32_getclut(struct ltdc_layer_s *layer,
return ret;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
#endif /* STM32_LAYER_CLUT_SIZE */
@@ -2542,7 +2542,7 @@ static int stm32_getlid(FAR struct ltdc_layer_s *layer, int *lid,
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
- gvdbg("flag = %08x\n", flag);
+ ginfo("flag = %08x\n", flag);
if (stm32_ltdc_lvalidate(priv))
{
@@ -2583,7 +2583,7 @@ static int stm32_getlid(FAR struct ltdc_layer_s *layer, int *lid,
#endif
default:
ret = EINVAL;
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
break;
}
@@ -2592,7 +2592,7 @@ static int stm32_getlid(FAR struct ltdc_layer_s *layer, int *lid,
return ret;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -2617,7 +2617,7 @@ static int stm32_getlid(FAR struct ltdc_layer_s *layer, int *lid,
static int stm32_setcolor(FAR struct ltdc_layer_s *layer, uint32_t argb)
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
- gvdbg("layer = %p, argb = %08x\n", layer, argb);
+ ginfo("layer = %p, argb = %08x\n", layer, argb);
if (stm32_ltdc_lvalidate(priv))
{
@@ -2629,7 +2629,7 @@ static int stm32_setcolor(FAR struct ltdc_layer_s *layer, uint32_t argb)
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -2652,7 +2652,7 @@ static int stm32_setcolor(FAR struct ltdc_layer_s *layer, uint32_t argb)
static int stm32_getcolor(FAR struct ltdc_layer_s *layer, uint32_t *argb)
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
- gvdbg("layer = %p, argb = %p\n", layer, argb);
+ ginfo("layer = %p, argb = %p\n", layer, argb);
if (stm32_ltdc_lvalidate(priv))
{
@@ -2663,7 +2663,7 @@ static int stm32_getcolor(FAR struct ltdc_layer_s *layer, uint32_t *argb)
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -2688,7 +2688,7 @@ static int stm32_getcolor(FAR struct ltdc_layer_s *layer, uint32_t *argb)
static int stm32_setcolorkey(FAR struct ltdc_layer_s *layer, uint32_t rgb)
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
- gvdbg("layer = %p, argb = %08x\n", layer, rgb);
+ ginfo("layer = %p, argb = %08x\n", layer, rgb);
if (stm32_ltdc_lvalidate(priv))
{
@@ -2700,7 +2700,7 @@ static int stm32_setcolorkey(FAR struct ltdc_layer_s *layer, uint32_t rgb)
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -2723,7 +2723,7 @@ static int stm32_setcolorkey(FAR struct ltdc_layer_s *layer, uint32_t rgb)
static int stm32_getcolorkey(FAR struct ltdc_layer_s *layer, uint32_t *rgb)
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
- gvdbg("layer = %p, argb = %p\n", layer, rgb);
+ ginfo("layer = %p, argb = %p\n", layer, rgb);
if (stm32_ltdc_lvalidate(priv))
{
@@ -2734,7 +2734,7 @@ static int stm32_getcolorkey(FAR struct ltdc_layer_s *layer, uint32_t *rgb)
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -2763,7 +2763,7 @@ static int stm32_getcolorkey(FAR struct ltdc_layer_s *layer, uint32_t *rgb)
static int stm32_setalpha(FAR struct ltdc_layer_s *layer, uint8_t alpha)
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
- gvdbg("layer = %p, alpha = %02x\n", layer, alpha);
+ ginfo("layer = %p, alpha = %02x\n", layer, alpha);
if (stm32_ltdc_lvalidate(priv))
{
@@ -2775,7 +2775,7 @@ static int stm32_setalpha(FAR struct ltdc_layer_s *layer, uint8_t alpha)
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -2798,7 +2798,7 @@ static int stm32_setalpha(FAR struct ltdc_layer_s *layer, uint8_t alpha)
static int stm32_getalpha(FAR struct ltdc_layer_s *layer, uint8_t *alpha)
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
- gvdbg("layer = %p, alpha = %p\n", layer, alpha);
+ ginfo("layer = %p, alpha = %p\n", layer, alpha);
if (stm32_ltdc_lvalidate(priv))
{
@@ -2809,7 +2809,7 @@ static int stm32_getalpha(FAR struct ltdc_layer_s *layer, uint8_t *alpha)
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -2857,7 +2857,7 @@ static int stm32_setblendmode(FAR struct ltdc_layer_s *layer, uint32_t mode)
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
uint32_t blendmode = mode;
- gvdbg("layer = %p, mode = %08x\n", layer, mode);
+ ginfo("layer = %p, mode = %08x\n", layer, mode);
if (stm32_ltdc_lvalidate(priv))
{
@@ -2926,7 +2926,7 @@ static int stm32_setblendmode(FAR struct ltdc_layer_s *layer, uint32_t mode)
}
if (blendmode)
{
- gdbg("Unknown blendmode %02x\n", blendmode);
+ gerr("Unknown blendmode %02x\n", blendmode);
ret = -EINVAL;
}
@@ -2942,7 +2942,7 @@ static int stm32_setblendmode(FAR struct ltdc_layer_s *layer, uint32_t mode)
return ret;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -2964,7 +2964,7 @@ static int stm32_setblendmode(FAR struct ltdc_layer_s *layer, uint32_t mode)
static int stm32_getblendmode(FAR struct ltdc_layer_s *layer, uint32_t *mode)
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
- gvdbg("layer = %p, mode = %p\n", layer, mode);
+ ginfo("layer = %p, mode = %p\n", layer, mode);
if (stm32_ltdc_lvalidate(priv))
{
@@ -2975,7 +2975,7 @@ static int stm32_getblendmode(FAR struct ltdc_layer_s *layer, uint32_t *mode)
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -3011,7 +3011,7 @@ static int stm32_setarea(FAR struct ltdc_layer_s *layer,
fb_coord_t srcypos)
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
- gvdbg("layer = %p, area = %p, srcxpos = %d, srcypos = %d\n",
+ ginfo("layer = %p, area = %p, srcxpos = %d, srcypos = %d\n",
layer, area, srcxpos, srcypos);
if (stm32_ltdc_lvalidate(priv))
@@ -3039,7 +3039,7 @@ static int stm32_setarea(FAR struct ltdc_layer_s *layer,
return ret;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -3066,7 +3066,7 @@ static int stm32_getarea(FAR struct ltdc_layer_s *layer,
fb_coord_t *srcxpos, fb_coord_t *srcypos)
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
- gvdbg("layer = %p, area = %p, srcxpos = %p, srcypos = %p\n",
+ ginfo("layer = %p, area = %p, srcxpos = %p, srcypos = %p\n",
layer, area, srcxpos, srcypos);
if (stm32_ltdc_lvalidate(priv))
@@ -3080,7 +3080,7 @@ static int stm32_getarea(FAR struct ltdc_layer_s *layer,
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -3131,7 +3131,7 @@ static int stm32_update(FAR struct ltdc_layer_s *layer, uint32_t mode)
FAR struct stm32_layer_s *inactive = &LAYER(!g_lactive);
#endif
- gvdbg("layer = %p, mode = %08x\n", layer, mode);
+ ginfo("layer = %p, mode = %08x\n", layer, mode);
if (stm32_ltdc_lvalidate(priv))
{
@@ -3156,7 +3156,7 @@ static int stm32_update(FAR struct ltdc_layer_s *layer, uint32_t mode)
if (stm32_ltdc_waitforirq() != OK)
{
- gdbg("Returning ECANCELED\n");
+ gerr("Returning ECANCELED\n");
return -ECANCELED;
}
@@ -3238,7 +3238,7 @@ static int stm32_update(FAR struct ltdc_layer_s *layer, uint32_t mode)
return OK;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -3272,7 +3272,7 @@ static int stm32_blit(FAR struct ltdc_layer_s *dest,
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)dest;
- gvdbg("dest = %p, destxpos = %d, destypos = %d, src = %p, srcarea = %p\n",
+ ginfo("dest = %p, destxpos = %d, destypos = %d, src = %p, srcarea = %p\n",
dest, destxpos, destypos, src, srcarea);
if (stm32_ltdc_lvalidate(priv))
@@ -3286,7 +3286,7 @@ static int stm32_blit(FAR struct ltdc_layer_s *dest,
return ret;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -3325,7 +3325,7 @@ static int stm32_blend(FAR struct ltdc_layer_s *dest,
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)dest;
- gvdbg("dest=%p, destxpos=%d, destypos=%d, "
+ ginfo("dest=%p, destxpos=%d, destypos=%d, "
"fore=%p, forexpos=%d foreypos=%d, "
"back=%p, backarea=%p\n",
dest, destxpos, destypos, fore, forexpos, foreypos, back, backarea);
@@ -3342,7 +3342,7 @@ static int stm32_blend(FAR struct ltdc_layer_s *dest,
return ret;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
@@ -3370,7 +3370,7 @@ static int stm32_fillarea(FAR struct ltdc_layer_s *layer,
uint32_t color)
{
FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer;
- gvdbg("layer = %p, area = %p, color = %08x\n", layer, area, color);
+ ginfo("layer = %p, area = %p, color = %08x\n", layer, area, color);
if (stm32_ltdc_lvalidate(priv))
{
@@ -3383,7 +3383,7 @@ static int stm32_fillarea(FAR struct ltdc_layer_s *layer,
return ret;
}
- gdbg("Returning EINVAL\n");
+ gerr("Returning EINVAL\n");
return -EINVAL;
}
#endif
@@ -3407,13 +3407,13 @@ static int stm32_fillarea(FAR struct ltdc_layer_s *layer,
FAR struct ltdc_layer_s *stm32_ltdcgetlayer(int lid)
{
- gvdbg("lid: %d\n", lid);
+ ginfo("lid: %d\n", lid);
if (lid == LTDC_LAYER_L1 || lid == LTDC_LAYER_L2)
{
return (FAR struct ltdc_layer_s *) &LAYER(lid);
}
- gdbg("EINVAL\n");
+ gerr("EINVAL\n");
errno = EINVAL;
return NULL;
}
@@ -3436,7 +3436,7 @@ int stm32_ltdcinitialize(void)
int ret;
#endif
- dbg("Initialize LTDC driver\n");
+ err("Initialize LTDC driver\n");
if (g_initialized == true)
{
@@ -3447,16 +3447,16 @@ int stm32_ltdcinitialize(void)
stm32_lcd_enable(false);
- gvdbg("Configuring the LCD controller\n");
+ ginfo("Configuring the LCD controller\n");
/* Configure LCD periphery */
- gvdbg("Configure lcd periphery\n");
+ ginfo("Configure lcd periphery\n");
stm32_ltdc_periphconfig();
/* Configure global ltdc register */
- gvdbg("Configure global register\n");
+ ginfo("Configure global register\n");
stm32_global_configure();
#ifdef CONFIG_STM32_DMA2D
@@ -3472,7 +3472,7 @@ int stm32_ltdcinitialize(void)
/* Initialize ltdc layer */
- gvdbg("Initialize ltdc layer\n");
+ ginfo("Initialize ltdc layer\n");
stm32_ltdc_linit(LTDC_LAYER_L1);
#ifdef CONFIG_STM32_LTDC_L2
stm32_ltdc_linit(LTDC_LAYER_L2);
@@ -3493,12 +3493,12 @@ int stm32_ltdcinitialize(void)
/* Reload shadow register */
- gvdbg("Reload shadow register\n");
+ ginfo("Reload shadow register\n");
stm32_ltdc_reload(LTDC_SRCR_IMR, false);
/* Turn the LCD on */
- gvdbg("Enabling the display\n");
+ ginfo("Enabling the display\n");
stm32_lcd_enable(true);
/* Set initialized state */
@@ -3524,7 +3524,7 @@ int stm32_ltdcinitialize(void)
struct fb_vtable_s *stm32_ltdcgetvplane(int vplane)
{
- gvdbg("vplane: %d\n", vplane);
+ ginfo("vplane: %d\n", vplane);
if (vplane == 0)
{
@@ -3600,6 +3600,6 @@ void stm32_backlight(bool blon)
{
/* Set default backlight level CONFIG_STM32_LTDC_DEFBACKLIGHT */
- gdbg("Not supported\n");
+ gerr("Not supported\n");
}
#endif
diff --git a/arch/arm/src/stm32/stm32_otgfsdev.c b/arch/arm/src/stm32/stm32_otgfsdev.c
index 81fb004fbce49ee81cbc050ead8cbdfba63fad59..8481142f88dad8cba6094e28a944271189481619 100644
--- a/arch/arm/src/stm32/stm32_otgfsdev.c
+++ b/arch/arm/src/stm32/stm32_otgfsdev.c
@@ -472,7 +472,7 @@ struct stm32_usbdev_s
/* Register operations ********************************************************/
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t stm32_getreg(uint32_t addr);
static void stm32_putreg(uint32_t val, uint32_t addr);
#else
@@ -792,7 +792,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
*
****************************************************************************/
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t stm32_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -813,7 +813,7 @@ static uint32_t stm32_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -830,7 +830,7 @@ static uint32_t stm32_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -842,7 +842,7 @@ static uint32_t stm32_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@@ -855,12 +855,12 @@ static uint32_t stm32_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void stm32_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, val);
+ llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@@ -1218,7 +1218,7 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv,
return;
}
- ullvdbg("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
+ ullinfo("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
privep->epphy, privreq, privreq->req.len,
privreq->req.xfrd, privep->zlp);
@@ -1484,7 +1484,7 @@ static void stm32_epout_complete(FAR struct stm32_usbdev_s *priv,
return;
}
- ullvdbg("EP%d: len=%d xfrd=%d\n",
+ ullinfo("EP%d: len=%d xfrd=%d\n",
privep->epphy, privreq->req.len, privreq->req.xfrd);
/* Return the completed read request to the class driver and mark the state
@@ -1519,7 +1519,7 @@ static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt)
DEBUGASSERT(privep && privep->ep.priv);
priv = (FAR struct stm32_usbdev_s *)privep->ep.priv;
- ullvdbg("EP0: bcnt=%d\n", bcnt);
+ ullinfo("EP0: bcnt=%d\n", bcnt);
usbtrace(TRACE_READ(EP0), bcnt);
/* Verify that an OUT SETUP request as received before this data was
@@ -1612,7 +1612,7 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt)
return;
}
- ullvdbg("EP%d: len=%d xfrd=%d\n", privep->epphy, privreq->req.len, privreq->req.xfrd);
+ ullinfo("EP%d: len=%d xfrd=%d\n", privep->epphy, privreq->req.len, privreq->req.xfrd);
usbtrace(TRACE_READ(privep->epphy), bcnt);
/* Get the number of bytes to transfer from the RxFIFO */
@@ -1696,7 +1696,7 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv,
return;
}
- ullvdbg("EP%d: len=%d\n", privep->epphy, privreq->req.len);
+ ullinfo("EP%d: len=%d\n", privep->epphy, privreq->req.len);
/* Ignore any attempt to receive a zero length packet (this really
* should not happen.
@@ -2490,7 +2490,7 @@ static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv)
ctrlreq.index = GETUINT16(priv->ctrlreq.index);
ctrlreq.len = GETUINT16(priv->ctrlreq.len);
- ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, ctrlreq.len);
/* Check for a standard request */
@@ -2625,7 +2625,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv)
if ((daint & 1) != 0)
{
regval = stm32_getreg(STM32_OTGFS_DOEPINT(epno));
- ulldbg("DOEPINT(%d) = %08x\n", epno, regval);
+ ullerr("DOEPINT(%d) = %08x\n", epno, regval);
stm32_putreg(0xFF, STM32_OTGFS_DOEPINT(epno));
}
@@ -2855,7 +2855,7 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv)
{
if ((daint & 1) != 0)
{
- ulldbg("DIEPINT(%d) = %08x\n",
+ ullerr("DIEPINT(%d) = %08x\n",
epno, stm32_getreg(STM32_OTGFS_DIEPINT(epno)));
stm32_putreg(0xFF, STM32_OTGFS_DIEPINT(epno));
}
@@ -3801,7 +3801,7 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
break;
default:
- udbg("Unsupported maxpacket: %d\n", maxpacket);
+ uerr("Unsupported maxpacket: %d\n", maxpacket);
return -EINVAL;
}
}
@@ -3896,7 +3896,7 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
break;
default:
- udbg("Unsupported maxpacket: %d\n", maxpacket);
+ uerr("Unsupported maxpacket: %d\n", maxpacket);
return -EINVAL;
}
}
@@ -4185,7 +4185,7 @@ static int stm32_ep_disable(FAR struct usbdev_ep_s *ep)
{
FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4225,7 +4225,7 @@ static FAR struct usbdev_req_s *stm32_ep_allocreq(FAR struct usbdev_ep_s *ep)
{
FAR struct stm32_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4258,7 +4258,7 @@ static void stm32_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
{
FAR struct stm32_req_s *privreq = (FAR struct stm32_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4330,11 +4330,11 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
/* Some sanity checking */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
- ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+ ullinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
@@ -4342,7 +4342,7 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
usbtrace(TRACE_EPSUBMIT, privep->epphy);
priv = privep->dev;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!priv->driver)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
@@ -4419,7 +4419,7 @@ static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4877,7 +4877,7 @@ static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -5447,7 +5447,7 @@ void up_usbinitialize(void)
ret = irq_attach(STM32_IRQ_OTGFS, stm32_usbinterrupt);
if (ret < 0)
{
- udbg("irq_attach failed\n", ret);
+ uerr("irq_attach failed\n", ret);
goto errout;
}
@@ -5560,7 +5560,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@@ -5631,7 +5631,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (driver != priv->driver)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/stm32/stm32_otgfshost.c b/arch/arm/src/stm32/stm32_otgfshost.c
index 81f6ded2697d4c576038b7bc699d319771118fb8..912919a940631e5123d8b3894c76b942f36fd220 100644
--- a/arch/arm/src/stm32/stm32_otgfshost.c
+++ b/arch/arm/src/stm32/stm32_otgfshost.c
@@ -93,9 +93,9 @@
* CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever
* want to do that?
* CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
- * debug. Depends on CONFIG_DEBUG.
+ * debug. Depends on CONFIG_DEBUG_FEATURES.
* CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
- * packets. Depends on CONFIG_DEBUG.
+ * packets. Depends on CONFIG_DEBUG_FEATURES.
*/
/* Pre-requisites (partial) */
@@ -128,9 +128,9 @@
# define CONFIG_STM32_OTGFS_DESCSIZE 128
#endif
-/* Register/packet debug depends on CONFIG_DEBUG */
+/* Register/packet debug depends on CONFIG_DEBUG_FEATURES */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_STM32_USBHOST_REGDEBUG
# undef CONFIG_STM32_USBHOST_PKTDUMP
#endif
@@ -506,7 +506,7 @@ static struct usbhost_connection_s g_usbconn =
#ifdef CONFIG_STM32_USBHOST_REGDEBUG
static void stm32_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
- lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+ llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@@ -556,7 +556,7 @@ static void stm32_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ llerr("[repeats %d more times]\n", count);
}
}
@@ -1284,7 +1284,7 @@ static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv,
ctrlep = (FAR struct stm32_ctrlinfo_s *)kmm_malloc(sizeof(struct stm32_ctrlinfo_s));
if (ctrlep == NULL)
{
- udbg("ERROR: Failed to allocate control endpoint container\n");
+ uerr("ERROR: Failed to allocate control endpoint container\n");
return -ENOMEM;
}
@@ -1294,7 +1294,7 @@ static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv,
hport->funcaddr, hport->speed, ctrlep);
if (ret < 0)
{
- udbg("ERROR: stm32_ctrlchan_alloc failed: %d\n", ret);
+ uerr("ERROR: stm32_ctrlchan_alloc failed: %d\n", ret);
kmm_free(ctrlep);
return ret;
}
@@ -1346,7 +1346,7 @@ static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv,
chidx = stm32_chan_alloc(priv);
if (chidx < 0)
{
- udbg("ERROR: Failed to allocate a host channel\n");
+ uerr("ERROR: Failed to allocate a host channel\n");
return -ENOMEM;
}
@@ -1856,7 +1856,7 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
ret = stm32_in_setup(priv, chidx);
if (ret < 0)
{
- udbg("ERROR: stm32_in_setup failed: %d\n", ret);
+ uerr("ERROR: stm32_in_setup failed: %d\n", ret);
return (ssize_t)ret;
}
@@ -1887,7 +1887,7 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
{
/* Break out and return the error */
- udbg("ERROR: stm32_chan_wait failed: %d\n", ret);
+ uerr("ERROR: stm32_chan_wait failed: %d\n", ret);
return (ssize_t)ret;
}
}
@@ -1932,13 +1932,13 @@ static void stm32_in_next(FAR struct stm32_usbhost_s *priv,
return;
}
- udbg("ERROR: stm32_in_setup failed: %d\n", ret);
+ uerr("ERROR: stm32_in_setup failed: %d\n", ret);
result = ret;
}
/* The transfer is complete, with or without an error */
- uvdbg("Transfer complete: %d\n", result);
+ uinfo("Transfer complete: %d\n", result);
/* Extract the callback information */
@@ -1990,7 +1990,7 @@ static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
ret = stm32_chan_asynchsetup(priv, chan, callback, arg);
if (ret < 0)
{
- udbg("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
+ uerr("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
return ret;
}
@@ -1999,7 +1999,7 @@ static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
ret = stm32_in_setup(priv, chidx);
if (ret < 0)
{
- udbg("ERROR: stm32_in_setup failed: %d\n", ret);
+ uerr("ERROR: stm32_in_setup failed: %d\n", ret);
}
/* And return with the transfer pending */
@@ -2125,7 +2125,7 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
ret = stm32_out_setup(priv, chidx);
if (ret < 0)
{
- udbg("ERROR: stm32_out_setup failed: %d\n", ret);
+ uerr("ERROR: stm32_out_setup failed: %d\n", ret);
return (ssize_t)ret;
}
@@ -2153,7 +2153,7 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
{
/* Break out and return the error */
- udbg("ERROR: stm32_chan_wait failed: %d\n", ret);
+ uerr("ERROR: stm32_chan_wait failed: %d\n", ret);
return (ssize_t)ret;
}
@@ -2218,13 +2218,13 @@ static void stm32_out_next(FAR struct stm32_usbhost_s *priv,
return;
}
- udbg("ERROR: stm32_out_setup failed: %d\n", ret);
+ uerr("ERROR: stm32_out_setup failed: %d\n", ret);
result = ret;
}
/* The transfer is complete, with or without an error */
- uvdbg("Transfer complete: %d\n", result);
+ uinfo("Transfer complete: %d\n", result);
/* Extract the callback information */
@@ -2276,7 +2276,7 @@ static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
ret = stm32_chan_asynchsetup(priv, chan, callback, arg);
if (ret < 0)
{
- udbg("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
+ uerr("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
return ret;
}
@@ -2285,7 +2285,7 @@ static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
ret = stm32_out_setup(priv, chidx);
if (ret < 0)
{
- udbg("ERROR: stm32_out_setup failed: %d\n", ret);
+ uerr("ERROR: stm32_out_setup failed: %d\n", ret);
}
/* And return with the transfer pending */
@@ -2370,7 +2370,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv,
/* AND the two to get the set of enabled, pending HC interrupts */
pending &= regval;
- ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+ ullinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
/* Check for a pending ACK response received/transmitted (ACK) interrupt */
@@ -2631,7 +2631,7 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv,
/* AND the two to get the set of enabled, pending HC interrupts */
pending &= regval;
- ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+ ullinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
/* Check for a pending ACK response received/transmitted (ACK) interrupt */
@@ -2949,7 +2949,7 @@ static inline void stm32_gint_rxflvlisr(FAR struct stm32_usbhost_s *priv)
/* Read and pop the next status from the Rx FIFO */
grxsts = stm32_getreg(STM32_OTGFS_GRXSTSP);
- ullvdbg("GRXSTS: %08x\n", grxsts);
+ ullinfo("GRXSTS: %08x\n", grxsts);
/* Isolate the channel number/index in the status word */
@@ -3102,7 +3102,7 @@ static inline void stm32_gint_nptxfeisr(FAR struct stm32_usbhost_s *priv)
/* Write the next group of packets into the Tx FIFO */
- ullvdbg("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+ ullinfo("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
@@ -3190,7 +3190,7 @@ static inline void stm32_gint_ptxfeisr(FAR struct stm32_usbhost_s *priv)
/* Write the next group of packets into the Tx FIFO */
- ullvdbg("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+ ullinfo("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
@@ -3760,7 +3760,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
- uvdbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
+ uinfo("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
}
@@ -3777,7 +3777,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
- uvdbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
+ uinfo("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
}
#endif
@@ -3865,7 +3865,7 @@ static int stm32_rh_enumerate(FAR struct stm32_usbhost_s *priv,
ret = stm32_ctrlchan_alloc(priv, 0, 0, priv->rhport.hport.speed, &priv->ep0);
if (ret < 0)
{
- udbg("ERROR: Failed to allocate a control endpoint: %d\n", ret);
+ uerr("ERROR: Failed to allocate a control endpoint: %d\n", ret);
}
return ret;
@@ -3897,7 +3897,7 @@ static int stm32_enumerate(FAR struct usbhost_connection_s *conn,
/* Then let the common usbhost_enumerate do the real enumeration. */
- uvdbg("Enumerate the device\n");
+ uinfo("Enumerate the device\n");
priv->smstate = SMSTATE_ENUM;
ret = usbhost_enumerate(hport, &hport->devclass);
@@ -3911,7 +3911,7 @@ static int stm32_enumerate(FAR struct usbhost_connection_s *conn,
{
/* Return to the disconnected state */
- udbg("ERROR: Enumeration failed: %d\n", ret);
+ uerr("ERROR: Enumeration failed: %d\n", ret);
stm32_gint_disconnected(priv);
}
@@ -4312,7 +4312,7 @@ static int stm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
usbhost_vtrace2(OTGFS_VTRACE2_CTRLIN, req->type, req->req);
- uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+ uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
req->type, req->req, req->value[1], req->value[0],
req->index[1], req->index[0], req->len[1], req->len[0]);
@@ -4397,7 +4397,7 @@ static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
usbhost_vtrace2(OTGFS_VTRACE2_CTRLOUT, req->type, req->req);
- uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+ uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
req->type, req->req, req->value[1], req->value[0],
req->index[1], req->index[0], req->len[1], req->len[0]);
@@ -4515,7 +4515,7 @@ static ssize_t stm32_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep
unsigned int chidx = (unsigned int)ep;
ssize_t nbytes;
- uvdbg("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
+ uinfo("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
DEBUGASSERT(priv && buffer && chidx < STM32_MAX_TX_FIFOS && buflen > 0);
@@ -4582,7 +4582,7 @@ static int stm32_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
unsigned int chidx = (unsigned int)ep;
int ret;
- uvdbg("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
+ uinfo("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
DEBUGASSERT(priv && buffer && chidx < STM32_MAX_TX_FIFOS && buflen > 0);
@@ -4632,7 +4632,7 @@ static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
unsigned int chidx = (unsigned int)ep;
irqstate_t flags;
- uvdbg("chidx: %u: %d\n", chidx);
+ uinfo("chidx: %u: %d\n", chidx);
DEBUGASSERT(priv && chidx < STM32_MAX_TX_FIFOS);
chan = &priv->chan[chidx];
@@ -4727,7 +4727,7 @@ static int stm32_connect(FAR struct usbhost_driver_s *drvr,
/* Set the connected/disconnected flag */
hport->connected = connected;
- ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+ ullinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
/* Report the connection event */
diff --git a/arch/arm/src/stm32/stm32_otghsdev.c b/arch/arm/src/stm32/stm32_otghsdev.c
index 07e9f0af1ca694661d14f28d6947f6dde2ce3628..64b53eec4cd252810ca0f7d9cb71b4efc0983082 100644
--- a/arch/arm/src/stm32/stm32_otghsdev.c
+++ b/arch/arm/src/stm32/stm32_otghsdev.c
@@ -472,7 +472,7 @@ struct stm32_usbdev_s
/* Register operations ********************************************************/
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t stm32_getreg(uint32_t addr);
static void stm32_putreg(uint32_t val, uint32_t addr);
#else
@@ -792,7 +792,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
*
****************************************************************************/
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t stm32_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -813,7 +813,7 @@ static uint32_t stm32_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -830,7 +830,7 @@ static uint32_t stm32_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -842,7 +842,7 @@ static uint32_t stm32_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@@ -855,12 +855,12 @@ static uint32_t stm32_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void stm32_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, val);
+ llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@@ -1218,7 +1218,7 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv,
return;
}
- ullvdbg("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
+ ullinfo("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
privep->epphy, privreq, privreq->req.len,
privreq->req.xfrd, privep->zlp);
@@ -1484,7 +1484,7 @@ static void stm32_epout_complete(FAR struct stm32_usbdev_s *priv,
return;
}
- ullvdbg("EP%d: len=%d xfrd=%d\n",
+ ullinfo("EP%d: len=%d xfrd=%d\n",
privep->epphy, privreq->req.len, privreq->req.xfrd);
/* Return the completed read request to the class driver and mark the state
@@ -1519,7 +1519,7 @@ static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt)
DEBUGASSERT(privep && privep->ep.priv);
priv = (FAR struct stm32_usbdev_s *)privep->ep.priv;
- ullvdbg("EP0: bcnt=%d\n", bcnt);
+ ullinfo("EP0: bcnt=%d\n", bcnt);
usbtrace(TRACE_READ(EP0), bcnt);
/* Verify that an OUT SETUP request as received before this data was
@@ -1612,7 +1612,7 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt)
return;
}
- ullvdbg("EP%d: len=%d xfrd=%d\n", privep->epphy, privreq->req.len, privreq->req.xfrd);
+ ullinfo("EP%d: len=%d xfrd=%d\n", privep->epphy, privreq->req.len, privreq->req.xfrd);
usbtrace(TRACE_READ(privep->epphy), bcnt);
/* Get the number of bytes to transfer from the RxFIFO */
@@ -1696,7 +1696,7 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv,
return;
}
- ullvdbg("EP%d: len=%d\n", privep->epphy, privreq->req.len);
+ ullinfo("EP%d: len=%d\n", privep->epphy, privreq->req.len);
/* Ignore any attempt to receive a zero length packet (this really
* should not happen.
@@ -2490,7 +2490,7 @@ static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv)
ctrlreq.index = GETUINT16(priv->ctrlreq.index);
ctrlreq.len = GETUINT16(priv->ctrlreq.len);
- ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, ctrlreq.len);
/* Check for a standard request */
@@ -2625,7 +2625,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv)
if ((daint & 1) != 0)
{
regval = stm32_getreg(STM32_OTGHS_DOEPINT(epno));
- ulldbg("DOEPINT(%d) = %08x\n", epno, regval);
+ ullerr("DOEPINT(%d) = %08x\n", epno, regval);
stm32_putreg(0xFF, STM32_OTGHS_DOEPINT(epno));
}
@@ -2855,7 +2855,7 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv)
{
if ((daint & 1) != 0)
{
- ulldbg("DIEPINT(%d) = %08x\n",
+ ullerr("DIEPINT(%d) = %08x\n",
epno, stm32_getreg(STM32_OTGHS_DIEPINT(epno)));
stm32_putreg(0xFF, STM32_OTGHS_DIEPINT(epno));
}
@@ -3801,7 +3801,7 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
break;
default:
- udbg("Unsupported maxpacket: %d\n", maxpacket);
+ uerr("Unsupported maxpacket: %d\n", maxpacket);
return -EINVAL;
}
}
@@ -3896,7 +3896,7 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
break;
default:
- udbg("Unsupported maxpacket: %d\n", maxpacket);
+ uerr("Unsupported maxpacket: %d\n", maxpacket);
return -EINVAL;
}
}
@@ -4185,7 +4185,7 @@ static int stm32_ep_disable(FAR struct usbdev_ep_s *ep)
{
FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4225,7 +4225,7 @@ static FAR struct usbdev_req_s *stm32_ep_allocreq(FAR struct usbdev_ep_s *ep)
{
FAR struct stm32_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4258,7 +4258,7 @@ static void stm32_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
{
FAR struct stm32_req_s *privreq = (FAR struct stm32_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4330,11 +4330,11 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
/* Some sanity checking */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
- ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+ ullinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
@@ -4342,7 +4342,7 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
usbtrace(TRACE_EPSUBMIT, privep->epphy);
priv = privep->dev;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!priv->driver)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
@@ -4419,7 +4419,7 @@ static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -4877,7 +4877,7 @@ static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -5436,7 +5436,7 @@ void up_usbinitialize(void)
ret = irq_attach(STM32_IRQ_OTGHS, stm32_usbinterrupt);
if (ret < 0)
{
- udbg("irq_attach failed\n", ret);
+ uerr("irq_attach failed\n", ret);
goto errout;
}
@@ -5549,7 +5549,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@@ -5620,7 +5620,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (driver != priv->driver)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/stm32/stm32_otghshost.c b/arch/arm/src/stm32/stm32_otghshost.c
index 4c6252a0291e9d5b05404c052bbaca26b15e2862..b93e185c9610152f785eecb796183cfe09b17bfb 100644
--- a/arch/arm/src/stm32/stm32_otghshost.c
+++ b/arch/arm/src/stm32/stm32_otghshost.c
@@ -93,9 +93,9 @@
* CONFIG_STM32_OTGHS_SOFINTR - Enable SOF interrupts. Why would you ever
* want to do that?
* CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
- * debug. Depends on CONFIG_DEBUG.
+ * debug. Depends on CONFIG_DEBUG_FEATURES.
* CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
- * packets. Depends on CONFIG_DEBUG.
+ * packets. Depends on CONFIG_DEBUG_FEATURES.
*/
/* Pre-requisites (partial) */
@@ -128,9 +128,9 @@
# define CONFIG_STM32_OTGHS_DESCSIZE 128
#endif
-/* Register/packet debug depends on CONFIG_DEBUG */
+/* Register/packet debug depends on CONFIG_DEBUG_FEATURES */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_STM32_USBHOST_REGDEBUG
# undef CONFIG_STM32_USBHOST_PKTDUMP
#endif
@@ -506,7 +506,7 @@ static struct usbhost_connection_s g_usbconn =
#ifdef CONFIG_STM32_USBHOST_REGDEBUG
static void stm32_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
- lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+ llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@@ -556,7 +556,7 @@ static void stm32_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ llerr("[repeats %d more times]\n", count);
}
}
@@ -1284,7 +1284,7 @@ static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv,
ctrlep = (FAR struct stm32_ctrlinfo_s *)kmm_malloc(sizeof(struct stm32_ctrlinfo_s));
if (ctrlep == NULL)
{
- udbg("ERROR: Failed to allocate control endpoint container\n");
+ uerr("ERROR: Failed to allocate control endpoint container\n");
return -ENOMEM;
}
@@ -1294,7 +1294,7 @@ static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv,
hport->funcaddr, hport->speed, ctrlep);
if (ret < 0)
{
- udbg("ERROR: stm32_ctrlchan_alloc failed: %d\n", ret);
+ uerr("ERROR: stm32_ctrlchan_alloc failed: %d\n", ret);
kmm_free(ctrlep);
return ret;
}
@@ -1346,7 +1346,7 @@ static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv,
chidx = stm32_chan_alloc(priv);
if (chidx < 0)
{
- udbg("ERROR: Failed to allocate a host channel\n");
+ uerr("ERROR: Failed to allocate a host channel\n");
return -ENOMEM;
}
@@ -1856,7 +1856,7 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
ret = stm32_in_setup(priv, chidx);
if (ret < 0)
{
- udbg("ERROR: stm32_in_setup failed: %d\n", ret);
+ uerr("ERROR: stm32_in_setup failed: %d\n", ret);
return (ssize_t)ret;
}
@@ -1887,7 +1887,7 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
{
/* Break out and return the error */
- udbg("ERROR: stm32_chan_wait failed: %d\n", ret);
+ uerr("ERROR: stm32_chan_wait failed: %d\n", ret);
return (ssize_t)ret;
}
}
@@ -1932,13 +1932,13 @@ static void stm32_in_next(FAR struct stm32_usbhost_s *priv,
return;
}
- udbg("ERROR: stm32_in_setup failed: %d\n", ret);
+ uerr("ERROR: stm32_in_setup failed: %d\n", ret);
result = ret;
}
/* The transfer is complete, with or without an error */
- uvdbg("Transfer complete: %d\n", result);
+ uinfo("Transfer complete: %d\n", result);
/* Extract the callback information */
@@ -1990,7 +1990,7 @@ static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
ret = stm32_chan_asynchsetup(priv, chan, callback, arg);
if (ret < 0)
{
- udbg("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
+ uerr("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
return ret;
}
@@ -1999,7 +1999,7 @@ static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
ret = stm32_in_setup(priv, chidx);
if (ret < 0)
{
- udbg("ERROR: stm32_in_setup failed: %d\n", ret);
+ uerr("ERROR: stm32_in_setup failed: %d\n", ret);
}
/* And return with the transfer pending */
@@ -2125,7 +2125,7 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
ret = stm32_out_setup(priv, chidx);
if (ret < 0)
{
- udbg("ERROR: stm32_out_setup failed: %d\n", ret);
+ uerr("ERROR: stm32_out_setup failed: %d\n", ret);
return (ssize_t)ret;
}
@@ -2153,7 +2153,7 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx,
{
/* Break out and return the error */
- udbg("ERROR: stm32_chan_wait failed: %d\n", ret);
+ uerr("ERROR: stm32_chan_wait failed: %d\n", ret);
return (ssize_t)ret;
}
@@ -2218,13 +2218,13 @@ static void stm32_out_next(FAR struct stm32_usbhost_s *priv,
return;
}
- udbg("ERROR: stm32_out_setup failed: %d\n", ret);
+ uerr("ERROR: stm32_out_setup failed: %d\n", ret);
result = ret;
}
/* The transfer is complete, with or without an error */
- uvdbg("Transfer complete: %d\n", result);
+ uinfo("Transfer complete: %d\n", result);
/* Extract the callback information */
@@ -2276,7 +2276,7 @@ static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
ret = stm32_chan_asynchsetup(priv, chan, callback, arg);
if (ret < 0)
{
- udbg("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
+ uerr("ERROR: stm32_chan_asynchsetup failed: %d\n", ret);
return ret;
}
@@ -2285,7 +2285,7 @@ static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx,
ret = stm32_out_setup(priv, chidx);
if (ret < 0)
{
- udbg("ERROR: stm32_out_setup failed: %d\n", ret);
+ uerr("ERROR: stm32_out_setup failed: %d\n", ret);
}
/* And return with the transfer pending */
@@ -2370,7 +2370,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv,
/* AND the two to get the set of enabled, pending HC interrupts */
pending &= regval;
- ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+ ullinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
/* Check for a pending ACK response received/transmitted (ACK) interrupt */
@@ -2631,7 +2631,7 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv,
/* AND the two to get the set of enabled, pending HC interrupts */
pending &= regval;
- ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
+ ullinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
/* Check for a pending ACK response received/transmitted (ACK) interrupt */
@@ -2949,7 +2949,7 @@ static inline void stm32_gint_rxflvlisr(FAR struct stm32_usbhost_s *priv)
/* Read and pop the next status from the Rx FIFO */
grxsts = stm32_getreg(STM32_OTGHS_GRXSTSP);
- ullvdbg("GRXSTS: %08x\n", grxsts);
+ ullinfo("GRXSTS: %08x\n", grxsts);
/* Isolate the channel number/index in the status word */
@@ -3102,7 +3102,7 @@ static inline void stm32_gint_nptxfeisr(FAR struct stm32_usbhost_s *priv)
/* Write the next group of packets into the Tx FIFO */
- ullvdbg("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %dwrsize: %d\n",
+ ullinfo("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %dwrsize: %d\n",
regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
@@ -3190,7 +3190,7 @@ static inline void stm32_gint_ptxfeisr(FAR struct stm32_usbhost_s *priv)
/* Write the next group of packets into the Tx FIFO */
- ullvdbg("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
+ ullinfo("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
@@ -3760,7 +3760,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
- uvdbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
+ uinfo("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
}
@@ -3777,7 +3777,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
- uvdbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
+ uinfo("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
}
#endif
@@ -3865,7 +3865,7 @@ static int stm32_rh_enumerate(FAR struct stm32_usbhost_s *priv,
ret = stm32_ctrlchan_alloc(priv, 0, 0, priv->rhport.hport.speed, &priv->ep0);
if (ret < 0)
{
- udbg("ERROR: Failed to allocate a control endpoint: %d\n", ret);
+ uerr("ERROR: Failed to allocate a control endpoint: %d\n", ret);
}
return ret;
@@ -3897,7 +3897,7 @@ static int stm32_enumerate(FAR struct usbhost_connection_s *conn,
/* Then let the common usbhost_enumerate do the real enumeration. */
- uvdbg("Enumerate the device\n");
+ uinfo("Enumerate the device\n");
priv->smstate = SMSTATE_ENUM;
ret = usbhost_enumerate(hport, &hport->devclass);
@@ -3911,7 +3911,7 @@ static int stm32_enumerate(FAR struct usbhost_connection_s *conn,
{
/* Return to the disconnected state */
- udbg("ERROR: Enumeration failed: %d\n", ret);
+ uerr("ERROR: Enumeration failed: %d\n", ret);
stm32_gint_disconnected(priv);
}
@@ -4312,7 +4312,7 @@ static int stm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
usbhost_vtrace2(OTGHS_VTRACE2_CTRLIN, req->type, req->req);
- uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+ uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
req->type, req->req, req->value[1], req->value[0],
req->index[1], req->index[0], req->len[1], req->len[0]);
@@ -4397,7 +4397,7 @@ static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
usbhost_vtrace2(OTGHS_VTRACE2_CTRLOUT, req->type, req->req);
- uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
+ uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
req->type, req->req, req->value[1], req->value[0],
req->index[1], req->index[0], req->len[1], req->len[0]);
@@ -4515,7 +4515,7 @@ static ssize_t stm32_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep
unsigned int chidx = (unsigned int)ep;
ssize_t nbytes;
- uvdbg("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
+ uinfo("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
DEBUGASSERT(priv && buffer && chidx < STM32_MAX_TX_FIFOS && buflen > 0);
@@ -4582,7 +4582,7 @@ static int stm32_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
unsigned int chidx = (unsigned int)ep;
int ret;
- uvdbg("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
+ uinfo("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
DEBUGASSERT(priv && buffer && chidx < STM32_MAX_TX_FIFOS && buflen > 0);
@@ -4632,7 +4632,7 @@ static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
unsigned int chidx = (unsigned int)ep;
irqstate_t flags;
- uvdbg("chidx: %u: %d\n", chidx);
+ uinfo("chidx: %u: %d\n", chidx);
DEBUGASSERT(priv && chidx < STM32_MAX_TX_FIFOS);
chan = &priv->chan[chidx];
@@ -4727,7 +4727,7 @@ static int stm32_connect(FAR struct usbhost_driver_s *drvr,
/* Set the connected/disconnected flag */
hport->connected = connected;
- ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
+ ullinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
/* Report the connection event */
diff --git a/arch/arm/src/stm32/stm32_procfs_ccm.c b/arch/arm/src/stm32/stm32_procfs_ccm.c
index 231f37dd9c4c7fe7c9108edf9d3e3cfd364f1089..51d1022146dce79d7246673ec378d5ee82dc5abd 100644
--- a/arch/arm/src/stm32/stm32_procfs_ccm.c
+++ b/arch/arm/src/stm32/stm32_procfs_ccm.c
@@ -142,7 +142,7 @@ static int ccm_open(FAR struct file *filep, FAR const char *relpath,
{
FAR struct ccm_file_s *priv;
- fvdbg("Open '%s'\n", relpath);
+ finfo("Open '%s'\n", relpath);
/* PROCFS is read-only. Any attempt to open with any kind of write
* access is not permitted.
@@ -152,7 +152,7 @@ static int ccm_open(FAR struct file *filep, FAR const char *relpath,
if ((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0)
{
- fdbg("ERROR: Only O_RDONLY supported\n");
+ ferr("ERROR: Only O_RDONLY supported\n");
return -EACCES;
}
@@ -160,7 +160,7 @@ static int ccm_open(FAR struct file *filep, FAR const char *relpath,
if (strcmp(relpath, "ccm") != 0)
{
- fdbg("ERROR: relpath is '%s'\n", relpath);
+ ferr("ERROR: relpath is '%s'\n", relpath);
return -ENOENT;
}
@@ -169,7 +169,7 @@ static int ccm_open(FAR struct file *filep, FAR const char *relpath,
priv = (FAR struct ccm_file_s *)kmm_zalloc(sizeof(struct ccm_file_s));
if (!priv)
{
- fdbg("ERROR: Failed to allocate file attributes\n");
+ ferr("ERROR: Failed to allocate file attributes\n");
return -ENOMEM;
}
@@ -214,7 +214,7 @@ static ssize_t ccm_read(FAR struct file *filep, FAR char *buffer,
struct mallinfo mem;
off_t offset = filep->f_pos;
- fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+ finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
/* Recover our private data from the struct file instance */
@@ -273,7 +273,7 @@ static int ccm_dup(FAR const struct file *oldp, FAR struct file *newp)
FAR struct ccm_file_s *oldpriv;
FAR struct ccm_file_s *newpriv;
- fvdbg("Dup %p->%p\n", oldp, newp);
+ finfo("Dup %p->%p\n", oldp, newp);
/* Recover our private data from the old struct file instance */
@@ -285,7 +285,7 @@ static int ccm_dup(FAR const struct file *oldp, FAR struct file *newp)
newpriv = (FAR struct ccm_file_s *)kmm_zalloc(sizeof(struct ccm_file_s));
if (!newpriv)
{
- fdbg("ERROR: Failed to allocate file attributes\n");
+ ferr("ERROR: Failed to allocate file attributes\n");
return -ENOMEM;
}
@@ -303,7 +303,7 @@ static int ccm_stat(const char *relpath, struct stat *buf)
{
if (strcmp(relpath, "ccm") != 0)
{
- fdbg("ERROR: relpath is '%s'\n", relpath);
+ ferr("ERROR: relpath is '%s'\n", relpath);
return -ENOENT;
}
diff --git a/arch/arm/src/stm32/stm32_pwm.c b/arch/arm/src/stm32/stm32_pwm.c
index a6f3a5749bf4a33e3190cd1b8e580f0a37167ffe..53e28f6ae10291ca67b8c7e569d0e7350745f089 100644
--- a/arch/arm/src/stm32/stm32_pwm.c
+++ b/arch/arm/src/stm32/stm32_pwm.c
@@ -117,27 +117,27 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing PWM */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_PWM
#endif
#ifdef CONFIG_DEBUG_PWM
-# define pwmdbg dbg
-# define pwmlldbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define pwmvdbg vdbg
-# define pwmllvdbg llvdbg
+# define pwmerr err
+# define pwmllerr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define pwminfo info
+# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
# else
-# define pwmvdbg(x...)
-# define pwmllvdbg(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
-# define pwmdbg(x...)
-# define pwmlldbg(x...)
-# define pwmvdbg(x...)
-# define pwmllvdbg(x...)
+# define pwmerr(x...)
+# define pwmllerr(x...)
+# define pwminfo(x...)
+# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
#endif
@@ -204,7 +204,7 @@ struct stm32_pwmtimer_s
static uint16_t pwm_getreg(struct stm32_pwmtimer_s *priv, int offset);
static void pwm_putreg(struct stm32_pwmtimer_s *priv, int offset, uint16_t value);
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg);
#else
# define pwm_dumpregs(priv,msg)
@@ -969,26 +969,26 @@ static void pwm_putreg(struct stm32_pwmtimer_s *priv, int offset, uint16_t value
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg)
{
- pwmvdbg("%s:\n", msg);
- pwmvdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
+ pwminfo("%s:\n", msg);
+ pwminfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
pwm_getreg(priv, STM32_GTIM_CR1_OFFSET),
pwm_getreg(priv, STM32_GTIM_CR2_OFFSET),
pwm_getreg(priv, STM32_GTIM_SMCR_OFFSET),
pwm_getreg(priv, STM32_GTIM_DIER_OFFSET));
- pwmvdbg(" SR: %04x EGR: %04x CCMR1: %04x CCMR2: %04x\n",
+ pwminfo(" SR: %04x EGR: %04x CCMR1: %04x CCMR2: %04x\n",
pwm_getreg(priv, STM32_GTIM_SR_OFFSET),
pwm_getreg(priv, STM32_GTIM_EGR_OFFSET),
pwm_getreg(priv, STM32_GTIM_CCMR1_OFFSET),
pwm_getreg(priv, STM32_GTIM_CCMR2_OFFSET));
- pwmvdbg(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
+ pwminfo(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
pwm_getreg(priv, STM32_GTIM_CCER_OFFSET),
pwm_getreg(priv, STM32_GTIM_CNT_OFFSET),
pwm_getreg(priv, STM32_GTIM_PSC_OFFSET),
pwm_getreg(priv, STM32_GTIM_ARR_OFFSET));
- pwmvdbg(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
+ pwminfo(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
pwm_getreg(priv, STM32_GTIM_CCR1_OFFSET),
pwm_getreg(priv, STM32_GTIM_CCR2_OFFSET),
pwm_getreg(priv, STM32_GTIM_CCR3_OFFSET),
@@ -996,7 +996,7 @@ static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg)
#if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM)
if (priv->timtype == TIMTYPE_ADVANCED)
{
- pwmvdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
+ pwminfo(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
pwm_getreg(priv, STM32_ATIM_RCR_OFFSET),
pwm_getreg(priv, STM32_ATIM_BDTR_OFFSET),
pwm_getreg(priv, STM32_ATIM_DCR_OFFSET),
@@ -1005,7 +1005,7 @@ static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg)
else
#endif
{
- pwmvdbg(" DCR: %04x DMAR: %04x\n",
+ pwminfo(" DCR: %04x DMAR: %04x\n",
pwm_getreg(priv, STM32_GTIM_DCR_OFFSET),
pwm_getreg(priv, STM32_GTIM_DMAR_OFFSET));
}
@@ -1068,14 +1068,14 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
DEBUGASSERT(priv != NULL && info != NULL);
#if defined(CONFIG_PWM_MULTICHAN)
- pwmvdbg("TIM%u frequency: %u\n",
+ pwminfo("TIM%u frequency: %u\n",
priv->timid, info->frequency);
#elif defined(CONFIG_PWM_PULSECOUNT)
- pwmvdbg("TIM%u channel: %u frequency: %u duty: %08x count: %u\n",
+ pwminfo("TIM%u channel: %u frequency: %u duty: %08x count: %u\n",
priv->timid, priv->channels[0].channel, info->frequency,
info->duty, info->count);
#else
- pwmvdbg("TIM%u channel: %u frequency: %u duty: %08x\n",
+ pwminfo("TIM%u channel: %u frequency: %u duty: %08x\n",
priv->timid, priv->channels[0].channel, info->frequency, info->duty);
#endif
@@ -1146,7 +1146,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
reload = 65535;
}
- pwmvdbg("TIM%u PCLK: %u frequency: %u TIMCLK: %u prescaler: %u reload: %u\n",
+ pwminfo("TIM%u PCLK: %u frequency: %u TIMCLK: %u prescaler: %u reload: %u\n",
priv->timid, priv->pclk, info->frequency, timclk, prescaler, reload);
/* Set up the timer CR1 register:
@@ -1209,7 +1209,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
break;
default:
- pwmdbg("No such timer mode: %u\n", (unsigned int)priv->mode);
+ pwmerr("No such timer mode: %u\n", (unsigned int)priv->mode);
return -EINVAL;
}
}
@@ -1336,7 +1336,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
if (j >= PWM_NCHANNELS)
{
- pwmdbg("No such channel: %u\n", channel);
+ pwmerr("No such channel: %u\n", channel);
return -EINVAL;
}
#else
@@ -1352,7 +1352,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
ccr = b16toi(duty * reload + b16HALF);
- pwmvdbg("ccr: %u\n", ccr);
+ pwminfo("ccr: %u\n", ccr);
switch (mode)
{
@@ -1387,7 +1387,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
#endif
default:
- pwmdbg("No such mode: %u\n", (unsigned int)mode);
+ pwmerr("No such mode: %u\n", (unsigned int)mode);
return -EINVAL;
}
@@ -1494,7 +1494,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
break;
default:
- pwmdbg("No such channel: %u\n", channel);
+ pwmerr("No such channel: %u\n", channel);
return -EINVAL;
}
}
@@ -1667,7 +1667,7 @@ static int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel,
DEBUGASSERT(priv != NULL);
- pwmvdbg("TIM%u channel: %u duty: %08x\n",
+ pwminfo("TIM%u channel: %u duty: %08x\n",
priv->timid, channel, duty);
#ifndef CONFIG_PWM_MULTICHAN
@@ -1686,7 +1686,7 @@ static int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel,
ccr = b16toi(duty * reload + b16HALF);
- pwmvdbg("ccr: %u\n", ccr);
+ pwminfo("ccr: %u\n", ccr);
switch (channel)
{
@@ -1707,7 +1707,7 @@ static int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel,
break;
default:
- pwmdbg("No such channel: %u\n", channel);
+ pwmerr("No such channel: %u\n", channel);
return -EINVAL;
}
@@ -1795,7 +1795,7 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv)
/* Now all of the time critical stuff is done so we can do some debug output */
- pwmllvdbg("Update interrupt SR: %04x prev: %u curr: %u count: %u\n",
+ pwmllinfo("Update interrupt SR: %04x prev: %u curr: %u count: %u\n",
regval, priv->prev, priv->curr, priv->count);
return OK;
@@ -2030,7 +2030,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
uint32_t pincfg;
int i;
- pwmvdbg("TIM%u\n", priv->timid);
+ pwminfo("TIM%u\n", priv->timid);
pwm_dumpregs(priv, "Initially");
/* Enable APB1/2 clocking for timer. */
@@ -2047,7 +2047,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
continue;
}
- pwmvdbg("pincfg: %08x\n", pincfg);
+ pwminfo("pincfg: %08x\n", pincfg);
stm32_configgpio(pincfg);
pwm_dumpgpio(pincfg, "PWM setup");
@@ -2078,7 +2078,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
uint32_t pincfg;
int i;
- pwmvdbg("TIM%u\n", priv->timid);
+ pwminfo("TIM%u\n", priv->timid);
/* Make sure that the output has been stopped */
@@ -2098,7 +2098,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
continue;
}
- pwmvdbg("pincfg: %08x\n", pincfg);
+ pwminfo("pincfg: %08x\n", pincfg);
pincfg &= (GPIO_PORT_MASK | GPIO_PIN_MASK);
@@ -2149,7 +2149,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
if (priv->timtype != TIMTYPE_ADVANCED)
{
- pwmdbg("ERROR: TIM%u cannot support pulse count: %u\n",
+ pwmerr("ERROR: TIM%u cannot support pulse count: %u\n",
priv->timid, info->count);
return -EPERM;
}
@@ -2233,7 +2233,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
uint32_t regval;
irqstate_t flags;
- pwmvdbg("TIM%u\n", priv->timid);
+ pwminfo("TIM%u\n", priv->timid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@@ -2360,7 +2360,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
putreg32(regval, regaddr);
leave_critical_section(flags);
- pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+ pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
pwm_dumpregs(priv, "After stop");
return OK;
}
@@ -2388,7 +2388,7 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg
/* There are no platform-specific ioctl commands */
- pwmvdbg("TIM%u\n", priv->timid);
+ pwminfo("TIM%u\n", priv->timid);
#endif
return -ENOTTY;
}
@@ -2418,7 +2418,7 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer)
{
FAR struct stm32_pwmtimer_s *lower;
- pwmvdbg("TIM%u\n", timer);
+ pwminfo("TIM%u\n", timer);
switch (timer)
{
@@ -2527,7 +2527,7 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer)
#endif
default:
- pwmdbg("No such timer configured\n");
+ pwmerr("No such timer configured\n");
return NULL;
}
diff --git a/arch/arm/src/stm32/stm32_qencoder.c b/arch/arm/src/stm32/stm32_qencoder.c
index 5cec5e0874d2fdac8bb23999a7173059e3197853..584ea46a47aace0a6405d5a9c7e4ac40ea0faf13 100644
--- a/arch/arm/src/stm32/stm32_qencoder.c
+++ b/arch/arm/src/stm32/stm32_qencoder.c
@@ -247,12 +247,12 @@
/* Debug ****************************************************************************/
/* Non-standard debug that may be enabled just for testing the quadrature encoder */
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_SENSORS
#endif
#ifdef CONFIG_DEBUG_SENSORS
-# ifdef CONFIG_DEBUG_VERBOSE
+# ifdef CONFIG_DEBUG_INFO
# define qe_dumpgpio(p,m) stm32_dumpgpio(p,m)
# else
# define qe_dumpgpio(p,m)
@@ -317,7 +317,7 @@ static void stm32_putreg16(FAR struct stm32_lowerhalf_s *priv, int offset, uint1
static uint32_t stm32_getreg32(FAR struct stm32_lowerhalf_s *priv, int offset);
static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset, uint32_t value);
-#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_INFO)
static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *msg);
#else
# define stm32_dumpregs(priv,msg)
@@ -631,26 +631,26 @@ static void stm32_putreg32(FAR struct stm32_lowerhalf_s *priv, int offset, uint3
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SENSORS) && defined(CONFIG_DEBUG_INFO)
static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *msg)
{
- snvdbg("%s:\n", msg);
- snvdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
+ sninfo("%s:\n", msg);
+ sninfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
stm32_getreg16(priv, STM32_GTIM_CR1_OFFSET),
stm32_getreg16(priv, STM32_GTIM_CR2_OFFSET),
stm32_getreg16(priv, STM32_GTIM_SMCR_OFFSET),
stm32_getreg16(priv, STM32_GTIM_DIER_OFFSET));
- snvdbg(" SR: %04x EGR: %04x CCMR1: %04x CCMR2: %04x\n",
+ sninfo(" SR: %04x EGR: %04x CCMR1: %04x CCMR2: %04x\n",
stm32_getreg16(priv, STM32_GTIM_SR_OFFSET),
stm32_getreg16(priv, STM32_GTIM_EGR_OFFSET),
stm32_getreg16(priv, STM32_GTIM_CCMR1_OFFSET),
stm32_getreg16(priv, STM32_GTIM_CCMR2_OFFSET));
- snvdbg(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
+ sninfo(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
stm32_getreg16(priv, STM32_GTIM_CCER_OFFSET),
stm32_getreg16(priv, STM32_GTIM_CNT_OFFSET),
stm32_getreg16(priv, STM32_GTIM_PSC_OFFSET),
stm32_getreg16(priv, STM32_GTIM_ARR_OFFSET));
- snvdbg(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
+ sninfo(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
stm32_getreg16(priv, STM32_GTIM_CCR1_OFFSET),
stm32_getreg16(priv, STM32_GTIM_CCR2_OFFSET),
stm32_getreg16(priv, STM32_GTIM_CCR3_OFFSET),
@@ -658,7 +658,7 @@ static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *m
#if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM8_QE)
if (priv->config->timid == 1 || priv->config->timid == 8)
{
- snvdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
+ sninfo(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
stm32_getreg16(priv, STM32_ATIM_RCR_OFFSET),
stm32_getreg16(priv, STM32_ATIM_BDTR_OFFSET),
stm32_getreg16(priv, STM32_ATIM_DCR_OFFSET),
@@ -667,7 +667,7 @@ static void stm32_dumpregs(FAR struct stm32_lowerhalf_s *priv, FAR const char *m
else
#endif
{
- snvdbg(" DCR: %04x DMAR: %04x\n",
+ sninfo(" DCR: %04x DMAR: %04x\n",
stm32_getreg16(priv, STM32_GTIM_DCR_OFFSET),
stm32_getreg16(priv, STM32_GTIM_DMAR_OFFSET));
}
@@ -1125,7 +1125,7 @@ static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower)
putreg32(regval, regaddr);
leave_critical_section(flags);
- snvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
+ sninfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
stm32_dumpregs(priv, "After stop");
/* Put the TI1 GPIO pin back to its default state */
@@ -1203,7 +1203,7 @@ static int stm32_reset(FAR struct qe_lowerhalf_s *lower)
#ifdef HAVE_16BIT_TIMERS
irqstate_t flags;
- snvdbg("Resetting position to zero\n");
+ sninfo("Resetting position to zero\n");
DEBUGASSERT(lower && priv->inuse);
/* Reset the timer and the counter. Interrupts are disabled to make this atomic
@@ -1215,7 +1215,7 @@ static int stm32_reset(FAR struct qe_lowerhalf_s *lower)
priv->position = 0;
leave_critical_section(flags);
#else
- snvdbg("Resetting position to zero\n");
+ sninfo("Resetting position to zero\n");
DEBUGASSERT(lower && priv->inuse);
/* Reset the counter to zero */
@@ -1270,7 +1270,7 @@ int stm32_qeinitialize(FAR const char *devpath, int tim)
priv = stm32_tim2lower(tim);
if (!priv)
{
- sndbg("TIM%d support not configured\n", tim);
+ snerr("TIM%d support not configured\n", tim);
return -ENXIO;
}
@@ -1278,7 +1278,7 @@ int stm32_qeinitialize(FAR const char *devpath, int tim)
if (priv->inuse)
{
- sndbg("TIM%d is in-used\n", tim);
+ snerr("TIM%d is in-used\n", tim);
return -EBUSY;
}
@@ -1287,7 +1287,7 @@ int stm32_qeinitialize(FAR const char *devpath, int tim)
ret = qe_register(devpath, (FAR struct qe_lowerhalf_s *)priv);
if (ret < 0)
{
- sndbg("qe_register failed: %d\n", ret);
+ snerr("qe_register failed: %d\n", ret);
return ret;
}
diff --git a/arch/arm/src/stm32/stm32_rng.c b/arch/arm/src/stm32/stm32_rng.c
index 5726f43ef9c83dd3b0e10dd886e92ae40518e369..11477eb8933f319a5d8b97f71c8723d8543d0011 100644
--- a/arch/arm/src/stm32/stm32_rng.c
+++ b/arch/arm/src/stm32/stm32_rng.c
@@ -102,7 +102,7 @@ static int stm32_rnginitialize()
{
uint32_t regval;
- vdbg("Initializing RNG\n");
+ info("Initializing RNG\n");
memset(&g_rngdev, 0, sizeof(struct rng_dev_s));
@@ -112,7 +112,7 @@ static int stm32_rnginitialize()
{
/* We could not attach the ISR to the interrupt */
- vdbg("Could not attach IRQ.\n");
+ info("Could not attach IRQ.\n");
return -EAGAIN;
}
diff --git a/arch/arm/src/stm32/stm32_rtcc.c b/arch/arm/src/stm32/stm32_rtcc.c
index 7d403ba50415f10e1c1081030fabb645b5558372..7a55f9c46e6fa1e8fcf001fab229f2ec6bd0489c 100644
--- a/arch/arm/src/stm32/stm32_rtcc.c
+++ b/arch/arm/src/stm32/stm32_rtcc.c
@@ -76,7 +76,7 @@
# error "CONFIG_STM32_PWR must selected to use this driver"
#endif
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_RTC
#endif
@@ -126,15 +126,15 @@
/* Debug ****************************************************************************/
#ifdef CONFIG_DEBUG_RTC
-# define rtcdbg dbg
-# define rtcvdbg vdbg
-# define rtclldbg lldbg
-# define rtcllvdbg llvdbg
+# define rtcerr err
+# define rtcinfo info
+# define rtcllerr llerr
+# define rtcllinfo llinfo
#else
-# define rtcdbg(x...)
-# define rtcvdbg(x...)
-# define rtclldbg(x...)
-# define rtcllvdbg(x...)
+# define rtcerr(x...)
+# define rtcinfo(x...)
+# define rtcllerr(x...)
+# define rtcllinfo(x...)
#endif
/************************************************************************************
@@ -179,27 +179,27 @@ volatile bool g_rtc_enabled = false;
#ifdef CONFIG_DEBUG_RTC
static void rtc_dumpregs(FAR const char *msg)
{
- rtclldbg("%s:\n", msg);
- rtclldbg(" TR: %08x\n", getreg32(STM32_RTC_TR));
- rtclldbg(" DR: %08x\n", getreg32(STM32_RTC_DR));
- rtclldbg(" CR: %08x\n", getreg32(STM32_RTC_CR));
- rtclldbg(" ISR: %08x\n", getreg32(STM32_RTC_ISR));
- rtclldbg(" PRER: %08x\n", getreg32(STM32_RTC_PRER));
- rtclldbg(" WUTR: %08x\n", getreg32(STM32_RTC_WUTR));
+ rtcllerr("%s:\n", msg);
+ rtcllerr(" TR: %08x\n", getreg32(STM32_RTC_TR));
+ rtcllerr(" DR: %08x\n", getreg32(STM32_RTC_DR));
+ rtcllerr(" CR: %08x\n", getreg32(STM32_RTC_CR));
+ rtcllerr(" ISR: %08x\n", getreg32(STM32_RTC_ISR));
+ rtcllerr(" PRER: %08x\n", getreg32(STM32_RTC_PRER));
+ rtcllerr(" WUTR: %08x\n", getreg32(STM32_RTC_WUTR));
#ifndef CONFIG_STM32_STM32F30XX
- rtclldbg(" CALIBR: %08x\n", getreg32(STM32_RTC_CALIBR));
+ rtcllerr(" CALIBR: %08x\n", getreg32(STM32_RTC_CALIBR));
#endif
- rtclldbg(" ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR));
- rtclldbg(" ALRMBR: %08x\n", getreg32(STM32_RTC_ALRMBR));
- rtclldbg(" SHIFTR: %08x\n", getreg32(STM32_RTC_SHIFTR));
- rtclldbg(" TSTR: %08x\n", getreg32(STM32_RTC_TSTR));
- rtclldbg(" TSDR: %08x\n", getreg32(STM32_RTC_TSDR));
- rtclldbg(" TSSSR: %08x\n", getreg32(STM32_RTC_TSSSR));
- rtclldbg(" CALR: %08x\n", getreg32(STM32_RTC_CALR));
- rtclldbg(" TAFCR: %08x\n", getreg32(STM32_RTC_TAFCR));
- rtclldbg("ALRMASSR: %08x\n", getreg32(STM32_RTC_ALRMASSR));
- rtclldbg("ALRMBSSR: %08x\n", getreg32(STM32_RTC_ALRMBSSR));
- rtclldbg("MAGICREG: %08x\n", getreg32(RTC_MAGIC_REG));
+ rtcllerr(" ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR));
+ rtcllerr(" ALRMBR: %08x\n", getreg32(STM32_RTC_ALRMBR));
+ rtcllerr(" SHIFTR: %08x\n", getreg32(STM32_RTC_SHIFTR));
+ rtcllerr(" TSTR: %08x\n", getreg32(STM32_RTC_TSTR));
+ rtcllerr(" TSDR: %08x\n", getreg32(STM32_RTC_TSDR));
+ rtcllerr(" TSSSR: %08x\n", getreg32(STM32_RTC_TSSSR));
+ rtcllerr(" CALR: %08x\n", getreg32(STM32_RTC_CALR));
+ rtcllerr(" TAFCR: %08x\n", getreg32(STM32_RTC_TAFCR));
+ rtcllerr("ALRMASSR: %08x\n", getreg32(STM32_RTC_ALRMASSR));
+ rtcllerr("ALRMBSSR: %08x\n", getreg32(STM32_RTC_ALRMBSSR));
+ rtcllerr("MAGICREG: %08x\n", getreg32(RTC_MAGIC_REG));
}
#else
# define rtc_dumpregs(msg)
@@ -222,13 +222,13 @@ static void rtc_dumpregs(FAR const char *msg)
#ifdef CONFIG_DEBUG_RTC
static void rtc_dumptime(FAR struct tm *tp, FAR const char *msg)
{
- rtclldbg("%s:\n", msg);
- rtclldbg(" tm_sec: %08x\n", tp->tm_sec);
- rtclldbg(" tm_min: %08x\n", tp->tm_min);
- rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
- rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
- rtclldbg(" tm_mon: %08x\n", tp->tm_mon);
- rtclldbg(" tm_year: %08x\n", tp->tm_year);
+ rtcllerr("%s:\n", msg);
+ rtcllerr(" tm_sec: %08x\n", tp->tm_sec);
+ rtcllerr(" tm_min: %08x\n", tp->tm_min);
+ rtcllerr(" tm_hour: %08x\n", tp->tm_hour);
+ rtcllerr(" tm_mday: %08x\n", tp->tm_mday);
+ rtcllerr(" tm_mon: %08x\n", tp->tm_mon);
+ rtcllerr(" tm_year: %08x\n", tp->tm_year);
}
#else
# define rtc_dumptime(tp, msg)
@@ -733,13 +733,13 @@ int up_rtc_initialize(void)
{
case OK:
{
- rtclldbg("rtc_syncwait() okay\n");
+ rtcllerr("rtc_syncwait() okay\n");
break;
}
default:
{
- rtclldbg("rtc_syncwait() failed (%d)\n", ret);
+ rtcllerr("rtc_syncwait() failed (%d)\n", ret);
break;
}
}
@@ -753,7 +753,7 @@ int up_rtc_initialize(void)
if (regval != RTC_MAGIC)
{
- rtclldbg("Do setup\n");
+ rtcllerr("Do setup\n");
/* Perform the one-time setup of the LSE clocking to the RTC */
@@ -771,7 +771,7 @@ int up_rtc_initialize(void)
}
else
{
- rtclldbg("Do resume\n");
+ rtcllerr("Do resume\n");
/* RTC already set-up, just resume normal operation */
@@ -787,7 +787,7 @@ int up_rtc_initialize(void)
if (ret != OK && nretry > 0)
{
- rtclldbg("setup/resume ran %d times and failed with %d\n",
+ rtcllerr("setup/resume ran %d times and failed with %d\n",
nretry, ret);
return -ETIMEDOUT;
}
diff --git a/arch/arm/src/stm32/stm32_sdio.c b/arch/arm/src/stm32/stm32_sdio.c
index b9bea99351fb203f29aae8544a454fcc3434a7fa..7fdf1c6caefb12d1df84bb7433821845e89e800a 100644
--- a/arch/arm/src/stm32/stm32_sdio.c
+++ b/arch/arm/src/stm32/stm32_sdio.c
@@ -95,7 +95,7 @@
* CONFIG_SDM_DMAPRIO - SDIO DMA priority. This can be selecte if
* CONFIG_SDIO_DMA is enabled.
* CONFIG_SDIO_XFRDEBUG - Enables some very low-level debug output
- * This also requires CONFIG_DEBUG_FS and CONFIG_DEBUG_VERBOSE
+ * This also requires CONFIG_DEBUG_FS and CONFIG_DEBUG_INFO
*/
#if defined(CONFIG_SDIO_DMA) && !defined(CONFIG_STM32_DMA2)
@@ -139,7 +139,7 @@
# undef CONFIG_SDIO_DMAPRIO
#endif
-#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG)
+#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_FEATURES)
# undef CONFIG_SDIO_XFRDEBUG
#endif
@@ -345,7 +345,7 @@ struct stm32_sdioregs_s
struct stm32_sampleregs_s
{
struct stm32_sdioregs_s sdio;
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_SDIO_DMA)
struct stm32_dmaregs_s dma;
#endif
};
@@ -596,7 +596,7 @@ static inline void stm32_setclkcr(uint32_t clkcr)
regval |= clkcr;
putreg32(regval, STM32_SDIO_CLKCR);
- fvdbg("CLKCR: %08x PWR: %08x\n",
+ finfo("CLKCR: %08x PWR: %08x\n",
getreg32(STM32_SDIO_CLKCR), getreg32(STM32_SDIO_POWER));
}
@@ -789,12 +789,14 @@ static void stm32_sdiosample(struct stm32_sdioregs_s *regs)
static void stm32_sample(struct stm32_dev_s *priv, int index)
{
struct stm32_sampleregs_s *regs = &g_sampleregs[index];
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_SDIO_DMA)
if (priv->dmamode)
{
stm32_dmasample(priv->dma, ®s->dma);
}
#endif
+
stm32_sdiosample(®s->sdio);
}
#endif
@@ -810,16 +812,16 @@ static void stm32_sample(struct stm32_dev_s *priv, int index)
#ifdef CONFIG_SDIO_XFRDEBUG
static void stm32_sdiodump(struct stm32_sdioregs_s *regs, const char *msg)
{
- fdbg("SDIO Registers: %s\n", msg);
- fdbg(" POWER[%08x]: %08x\n", STM32_SDIO_POWER, regs->power);
- fdbg(" CLKCR[%08x]: %08x\n", STM32_SDIO_CLKCR, regs->clkcr);
- fdbg(" DCTRL[%08x]: %08x\n", STM32_SDIO_DCTRL, regs->dctrl);
- fdbg(" DTIMER[%08x]: %08x\n", STM32_SDIO_DTIMER, regs->dtimer);
- fdbg(" DLEN[%08x]: %08x\n", STM32_SDIO_DLEN, regs->dlen);
- fdbg(" DCOUNT[%08x]: %08x\n", STM32_SDIO_DCOUNT, regs->dcount);
- fdbg(" STA[%08x]: %08x\n", STM32_SDIO_STA, regs->sta);
- fdbg(" MASK[%08x]: %08x\n", STM32_SDIO_MASK, regs->mask);
- fdbg("FIFOCNT[%08x]: %08x\n", STM32_SDIO_FIFOCNT, regs->fifocnt);
+ ferr("SDIO Registers: %s\n", msg);
+ ferr(" POWER[%08x]: %08x\n", STM32_SDIO_POWER, regs->power);
+ ferr(" CLKCR[%08x]: %08x\n", STM32_SDIO_CLKCR, regs->clkcr);
+ ferr(" DCTRL[%08x]: %08x\n", STM32_SDIO_DCTRL, regs->dctrl);
+ ferr(" DTIMER[%08x]: %08x\n", STM32_SDIO_DTIMER, regs->dtimer);
+ ferr(" DLEN[%08x]: %08x\n", STM32_SDIO_DLEN, regs->dlen);
+ ferr(" DCOUNT[%08x]: %08x\n", STM32_SDIO_DCOUNT, regs->dcount);
+ ferr(" STA[%08x]: %08x\n", STM32_SDIO_STA, regs->sta);
+ ferr(" MASK[%08x]: %08x\n", STM32_SDIO_MASK, regs->mask);
+ ferr("FIFOCNT[%08x]: %08x\n", STM32_SDIO_FIFOCNT, regs->fifocnt);
}
#endif
@@ -835,12 +837,13 @@ static void stm32_sdiodump(struct stm32_sdioregs_s *regs, const char *msg)
static void stm32_dumpsample(struct stm32_dev_s *priv,
struct stm32_sampleregs_s *regs, const char *msg)
{
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_SDIO_DMA)
if (priv->dmamode)
{
stm32_dmadump(priv->dma, ®s->dma, msg);
}
#endif
+
stm32_sdiodump(®s->sdio, msg);
}
#endif
@@ -857,15 +860,18 @@ static void stm32_dumpsample(struct stm32_dev_s *priv,
static void stm32_dumpsamples(struct stm32_dev_s *priv)
{
stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_BEFORE_SETUP], "Before setup");
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_SDIO_DMA)
if (priv->dmamode)
{
stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_BEFORE_ENABLE], "Before DMA enable");
}
#endif
+
stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_AFTER_SETUP], "After setup");
stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_END_TRANSFER], "End of transfer");
-#if defined(CONFIG_DEBUG_DMA) && defined(CONFIG_SDIO_DMA)
+
+#if defined(CONFIG_DEBUG_DMA_INFO) && defined(CONFIG_SDIO_DMA)
if (priv->dmamode)
{
stm32_dumpsample(priv, &g_sampleregs[SAMPLENDX_DMA_CALLBACK], "DMA Callback");
@@ -901,7 +907,7 @@ static void stm32_dmacallback(DMA_HANDLE handle, uint8_t status, void *arg)
if ((status & DMA_STATUS_ERROR) != 0)
{
- flldbg("DMA error %02x, remaining: %d\n", status, priv->remaining);
+ fllerr("DMA error %02x, remaining: %d\n", status, priv->remaining);
result = SDIOWAIT_ERROR;
}
else
@@ -1166,7 +1172,7 @@ static void stm32_eventtimeout(int argc, uint32_t arg)
/* Yes.. wake up any waiting threads */
stm32_endwait(priv, SDIOWAIT_TIMEOUT);
- flldbg("Timeout: remaining: %d\n", priv->remaining);
+ fllerr("Timeout: remaining: %d\n", priv->remaining);
}
}
@@ -1406,7 +1412,7 @@ static int stm32_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
- flldbg("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
+ fllerr("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining);
stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@@ -1416,7 +1422,7 @@ static int stm32_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
- flldbg("ERROR: Data timeout, remaining: %d\n", priv->remaining);
+ fllerr("ERROR: Data timeout, remaining: %d\n", priv->remaining);
stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT);
}
@@ -1426,7 +1432,7 @@ static int stm32_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
- flldbg("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining);
+ fllerr("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining);
stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@@ -1436,7 +1442,7 @@ static int stm32_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
- flldbg("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining);
+ fllerr("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining);
stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
@@ -1446,7 +1452,7 @@ static int stm32_interrupt(int irq, void *context)
{
/* Terminate the transfer with an error */
- flldbg("ERROR: Start bit, remaining: %d\n", priv->remaining);
+ fllerr("ERROR: Start bit, remaining: %d\n", priv->remaining);
stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
}
}
@@ -1582,7 +1588,7 @@ static void stm32_reset(FAR struct sdio_dev_s *dev)
stm32_setpwrctrl(SDIO_POWER_PWRCTRL_ON);
leave_critical_section(flags);
- fvdbg("CLCKR: %08x POWER: %08x\n",
+ finfo("CLCKR: %08x POWER: %08x\n",
getreg32(STM32_SDIO_CLKCR), getreg32(STM32_SDIO_POWER));
}
@@ -1795,7 +1801,7 @@ static int stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t arg)
cmdidx = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT;
regval |= cmdidx | SDIO_CMD_CPSMEN;
- fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
+ finfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
/* Write the SDIO CMD */
@@ -2025,7 +2031,7 @@ static int stm32_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
{
if (--timeout <= 0)
{
- fdbg("ERROR: Timeout cmd: %08x events: %08x STA: %08x\n",
+ ferr("ERROR: Timeout cmd: %08x events: %08x STA: %08x\n",
cmd, events, getreg32(STM32_SDIO_STA));
return -ETIMEDOUT;
@@ -2060,7 +2066,7 @@ static int stm32_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *rshort)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
uint32_t respcmd;
#endif
uint32_t regval;
@@ -2089,10 +2095,10 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!rshort)
{
- fdbg("ERROR: rshort=NULL\n");
+ ferr("ERROR: rshort=NULL\n");
ret = -EINVAL;
}
@@ -2102,7 +2108,7 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R1B_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R6_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2113,15 +2119,15 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
regval = getreg32(STM32_SDIO_STA);
if ((regval & SDIO_STA_CTIMEOUT) != 0)
{
- fdbg("ERROR: Command timeout: %08x\n", regval);
+ ferr("ERROR: Command timeout: %08x\n", regval);
ret = -ETIMEDOUT;
}
else if ((regval & SDIO_STA_CCRCFAIL) != 0)
{
- fdbg("ERROR: CRC failure: %08x\n", regval);
+ ferr("ERROR: CRC failure: %08x\n", regval);
ret = -EIO;
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
else
{
/* Check response received is of desired command */
@@ -2129,7 +2135,7 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
respcmd = getreg32(STM32_SDIO_RESPCMD);
if ((uint8_t)(respcmd & SDIO_RESPCMD_MASK) != (cmd & MMCSD_CMDIDX_MASK))
{
- fdbg("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd);
+ ferr("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd);
ret = -EINVAL;
}
}
@@ -2157,12 +2163,12 @@ static int stm32_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo
* 0 1 End bit
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Check that R1 is the correct response to this command */
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2173,12 +2179,12 @@ static int stm32_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo
regval = getreg32(STM32_SDIO_STA);
if (regval & SDIO_STA_CTIMEOUT)
{
- fdbg("ERROR: Timeout STA: %08x\n", regval);
+ ferr("ERROR: Timeout STA: %08x\n", regval);
ret = -ETIMEDOUT;
}
else if (regval & SDIO_STA_CCRCFAIL)
{
- fdbg("ERROR: CRC fail STA: %08x\n", regval);
+ ferr("ERROR: CRC fail STA: %08x\n", regval);
ret = -EIO;
}
}
@@ -2212,11 +2218,11 @@ static int stm32_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *r
/* Check that this is the correct response to this command */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
{
- fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
+ ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@@ -2229,7 +2235,7 @@ static int stm32_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *r
regval = getreg32(STM32_SDIO_STA);
if (regval & SDIO_STA_CTIMEOUT)
{
- fdbg("ERROR: Timeout STA: %08x\n", regval);
+ ferr("ERROR: Timeout STA: %08x\n", regval);
ret = -ETIMEDOUT;
}
}
@@ -2384,7 +2390,7 @@ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev,
1, (uint32_t)priv);
if (ret != OK)
{
- fdbg("ERROR: wd_start failed: %d\n", ret);
+ ferr("ERROR: wd_start failed: %d\n", ret);
}
}
@@ -2471,7 +2477,7 @@ static void stm32_callbackenable(FAR struct sdio_dev_s *dev,
{
struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
- fvdbg("eventset: %02x\n", eventset);
+ finfo("eventset: %02x\n", eventset);
DEBUGASSERT(priv != NULL);
priv->cbevents = eventset;
@@ -2507,7 +2513,7 @@ static int stm32_registercallback(FAR struct sdio_dev_s *dev,
/* Disable callbacks and register this callback and is argument */
- fvdbg("Register %p(%p)\n", callback, arg);
+ finfo("Register %p(%p)\n", callback, arg);
DEBUGASSERT(priv != NULL);
priv->cbevents = 0;
@@ -2743,7 +2749,7 @@ static void stm32_callback(void *arg)
/* Is a callback registered? */
DEBUGASSERT(priv != NULL);
- fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
+ finfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
if (priv->callback)
@@ -2788,14 +2794,14 @@ static void stm32_callback(void *arg)
{
/* Yes.. queue it */
- fvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
+ finfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
(void)work_queue(HPWORK, &priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0);
}
else
{
/* No.. then just call the callback here */
- fvdbg("Callback to %p(%p)\n", priv->callback, priv->cbarg);
+ finfo("Callback to %p(%p)\n", priv->callback, priv->cbarg);
priv->callback(priv->cbarg);
}
}
@@ -2925,7 +2931,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
leave_critical_section(flags);
- fvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
+ finfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
/* Perform any requested callback if the status has changed */
@@ -2967,7 +2973,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
{
priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
}
- fvdbg("cdstatus: %02x\n", priv->cdstatus);
+ finfo("cdstatus: %02x\n", priv->cdstatus);
leave_critical_section(flags);
}
#endif /* CONFIG_STM32_SDIO */
diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c
index eed9ea9845b58d849bee1db75454ebed984b1e52..d67444414519d5c9a439806cde68d9ead2d7e86c 100644
--- a/arch/arm/src/stm32/stm32_spi.c
+++ b/arch/arm/src/stm32/stm32_spi.c
@@ -157,23 +157,16 @@
/* Debug ****************************************************************************/
-/* Check if (non-standard) SPI debug is enabled */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_SPI
-#endif
+/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
/************************************************************************************
@@ -1052,7 +1045,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
* faster.
*/
- spivdbg("Frequency %d->%d\n", frequency, actual);
+ spiinfo("Frequency %d->%d\n", frequency, actual);
priv->frequency = frequency;
priv->actual = actual;
@@ -1082,7 +1075,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
uint16_t setbits;
uint16_t clrbits;
- spivdbg("mode=%d\n", mode);
+ spiinfo("mode=%d\n", mode);
/* Has the mode changed? */
@@ -1147,7 +1140,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
uint16_t setbits;
uint16_t clrbits;
- spivdbg("nbits=%d\n", nbits);
+ spiinfo("nbits=%d\n", nbits);
/* Has the number of bits changed? */
@@ -1222,7 +1215,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
regval = spi_getreg(priv, STM32_SPI_SR_OFFSET);
- spivdbg("Sent: %04x Return: %04x Status: %02x\n", wd, ret, regval);
+ spiinfo("Sent: %04x Return: %04x Status: %02x\n", wd, ret, regval);
UNUSED(regval);
return ret;
@@ -1260,7 +1253,7 @@ static void spi_exchange_nodma(FAR struct spi_dev_s *dev, FAR const void *txbuff
FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
DEBUGASSERT(priv && priv->spibase);
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
/* 8- or 16-bit mode? */
@@ -1373,7 +1366,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
static uint16_t rxdummy = 0xffff;
static const uint16_t txdummy = 0xffff;
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
DEBUGASSERT(priv && priv->spibase);
/* Setup DMAs */
@@ -1416,7 +1409,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
#ifndef CONFIG_SPI_EXCHANGE
static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, size_t nwords)
{
- spivdbg("txbuffer=%p nwords=%d\n", txbuffer, nwords);
+ spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
return spi_exchange(dev, txbuffer, NULL, nwords);
}
#endif
@@ -1443,7 +1436,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, si
#ifndef CONFIG_SPI_EXCHANGE
static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, size_t nwords)
{
- spivdbg("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
+ spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
return spi_exchange(dev, NULL, rxbuffer, nwords);
}
#endif
@@ -1692,7 +1685,7 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus)
else
#endif
{
- spidbg("ERROR: Unsupbused SPI bus: %d\n", bus);
+ spierr("ERROR: Unsupbused SPI bus: %d\n", bus);
return NULL;
}
diff --git a/arch/arm/src/stm32/stm32_start.c b/arch/arm/src/stm32/stm32_start.c
index 8e58e862a9ed94ad48523be4c9cf8cbfa5ca0b96..480d5f58b46811e4bbd7320e0854c75bb7894d88 100644
--- a/arch/arm/src/stm32/stm32_start.c
+++ b/arch/arm/src/stm32/stm32_start.c
@@ -81,7 +81,7 @@ static void go_os_start(void *pv, unsigned int nbytes)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# define showprogress(c) up_lowputc(c)
#else
# define showprogress(c)
diff --git a/arch/arm/src/stm32/stm32_usbdev.c b/arch/arm/src/stm32/stm32_usbdev.c
index 27f75be899a0c0deba68a77eb30a55a2c33e37cb..b219a93e6c245a62a8a0bc1658f6a1d8c47bb1da 100644
--- a/arch/arm/src/stm32/stm32_usbdev.c
+++ b/arch/arm/src/stm32/stm32_usbdev.c
@@ -103,7 +103,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_STM32_USBDEV_REGDEBUG
#endif
@@ -388,7 +388,7 @@ struct stm32_usbdev_s
/* Register operations ******************************************************/
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint16_t stm32_getreg(uint32_t addr);
static void stm32_putreg(uint16_t val, uint32_t addr);
static void stm32_checksetup(void);
@@ -652,7 +652,7 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
* Name: stm32_getreg
****************************************************************************/
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint16_t stm32_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -673,7 +673,7 @@ static uint16_t stm32_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
}
@@ -689,7 +689,7 @@ static uint16_t stm32_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -701,7 +701,7 @@ static uint16_t stm32_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%04x\n", addr, val);
+ llerr("%08x->%04x\n", addr, val);
return val;
}
#endif
@@ -710,12 +710,12 @@ static uint16_t stm32_getreg(uint32_t addr)
* Name: stm32_putreg
****************************************************************************/
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void stm32_putreg(uint16_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%04x\n", addr, val);
+ llerr("%08x<-%04x\n", addr, val);
/* Write the value */
@@ -727,42 +727,42 @@ static void stm32_putreg(uint16_t val, uint32_t addr)
* Name: stm32_dumpep
****************************************************************************/
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void stm32_dumpep(int epno)
{
uint32_t addr;
/* Common registers */
- lldbg("CNTR: %04x\n", getreg16(STM32_USB_CNTR));
- lldbg("ISTR: %04x\n", getreg16(STM32_USB_ISTR));
- lldbg("FNR: %04x\n", getreg16(STM32_USB_FNR));
- lldbg("DADDR: %04x\n", getreg16(STM32_USB_DADDR));
- lldbg("BTABLE: %04x\n", getreg16(STM32_USB_BTABLE));
+ llerr("CNTR: %04x\n", getreg16(STM32_USB_CNTR));
+ llerr("ISTR: %04x\n", getreg16(STM32_USB_ISTR));
+ llerr("FNR: %04x\n", getreg16(STM32_USB_FNR));
+ llerr("DADDR: %04x\n", getreg16(STM32_USB_DADDR));
+ llerr("BTABLE: %04x\n", getreg16(STM32_USB_BTABLE));
/* Endpoint register */
addr = STM32_USB_EPR(epno);
- lldbg("EPR%d: [%08x] %04x\n", epno, addr, getreg16(addr));
+ llerr("EPR%d: [%08x] %04x\n", epno, addr, getreg16(addr));
/* Endpoint descriptor */
addr = STM32_USB_BTABLE_ADDR(epno, 0);
- lldbg("DESC: %08x\n", addr);
+ llerr("DESC: %08x\n", addr);
/* Endpoint buffer descriptor */
addr = STM32_USB_ADDR_TX(epno);
- lldbg(" TX ADDR: [%08x] %04x\n", addr, getreg16(addr));
+ llerr(" TX ADDR: [%08x] %04x\n", addr, getreg16(addr));
addr = STM32_USB_COUNT_TX(epno);
- lldbg(" COUNT: [%08x] %04x\n", addr, getreg16(addr));
+ llerr(" COUNT: [%08x] %04x\n", addr, getreg16(addr));
addr = STM32_USB_ADDR_RX(epno);
- lldbg(" RX ADDR: [%08x] %04x\n", addr, getreg16(addr));
+ llerr(" RX ADDR: [%08x] %04x\n", addr, getreg16(addr));
addr = STM32_USB_COUNT_RX(epno);
- lldbg(" COUNT: [%08x] %04x\n", addr, getreg16(addr));
+ llerr(" COUNT: [%08x] %04x\n", addr, getreg16(addr));
}
#endif
@@ -770,19 +770,19 @@ static void stm32_dumpep(int epno)
* Name: stm32_checksetup
****************************************************************************/
-#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void stm32_checksetup(void)
{
uint32_t cfgr = getreg32(STM32_RCC_CFGR);
uint32_t apb1rstr = getreg32(STM32_RCC_APB1RSTR);
uint32_t apb1enr = getreg32(STM32_RCC_APB1ENR);
- lldbg("CFGR: %08x APB1RSTR: %08x APB1ENR: %08x\n", cfgr, apb1rstr, apb1enr);
+ llerr("CFGR: %08x APB1RSTR: %08x APB1ENR: %08x\n", cfgr, apb1rstr, apb1enr);
if ((apb1rstr & RCC_APB1RSTR_USBRST) != 0 ||
(apb1enr & RCC_APB1ENR_USBEN) == 0)
{
- lldbg("ERROR: USB is NOT setup correctly\n");
+ llerr("ERROR: USB is NOT setup correctly\n");
}
}
#endif
@@ -1367,7 +1367,7 @@ static int stm32_wrrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *prive
}
epno = USB_EPNO(privep->ep.eplog);
- ullvdbg("epno=%d req=%p: len=%d xfrd=%d nullpkt=%d\n",
+ ullinfo("epno=%d req=%p: len=%d xfrd=%d nullpkt=%d\n",
epno, privreq, privreq->req.len, privreq->req.xfrd, privep->txnullpkt);
UNUSED(epno);
@@ -1458,7 +1458,7 @@ static inline int stm32_ep0_rdrequest(struct stm32_usbdev_s *priv)
pmalen = stm32_geteprxcount(EP0);
- ullvdbg("EP0: pmalen=%d\n", pmalen);
+ ullinfo("EP0: pmalen=%d\n", pmalen);
usbtrace(TRACE_READ(EP0), pmalen);
/* Read the data into our special buffer for SETUP data */
@@ -1510,7 +1510,7 @@ static int stm32_rdrequest(struct stm32_usbdev_s *priv, struct stm32_ep_s *prive
return -ENOENT;
}
- ullvdbg("EP%d: len=%d xfrd=%d\n", epno, privreq->req.len, privreq->req.xfrd);
+ ullinfo("EP%d: len=%d xfrd=%d\n", epno, privreq->req.len, privreq->req.xfrd);
/* Ignore any attempt to receive a zero length packet */
@@ -1768,7 +1768,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv)
index.w = GETUINT16(priv->ctrl.index);
len.w = GETUINT16(priv->ctrl.len);
- ullvdbg("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
/* Is this an setup with OUT and data of length > 0 */
@@ -1959,7 +1959,7 @@ static void stm32_ep0setup(struct stm32_usbdev_s *priv)
{
/* Special case recipient=device test mode */
- ullvdbg("test mode: %d\n", index.w);
+ ullinfo("test mode: %d\n", index.w);
}
else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_ENDPOINT)
{
@@ -2840,11 +2840,11 @@ static int stm32_epconfigure(struct usbdev_ep_s *ep,
uint16_t maxpacket;
uint8_t epno;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !desc)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
- ulldbg("ERROR: ep=%p desc=%p\n");
+ ullerr("ERROR: ep=%p desc=%p\n");
return -EINVAL;
}
#endif
@@ -2936,11 +2936,11 @@ static int stm32_epdisable(struct usbdev_ep_s *ep)
irqstate_t flags;
uint8_t epno;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
- ulldbg("ERROR: ep=%p\n", ep);
+ ullerr("ERROR: ep=%p\n", ep);
return -EINVAL;
}
#endif
@@ -2971,7 +2971,7 @@ static struct usbdev_req_s *stm32_epallocreq(struct usbdev_ep_s *ep)
{
struct stm32_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -2999,7 +2999,7 @@ static void stm32_epfreereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
{
struct stm32_req_s *privreq = (struct stm32_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3024,11 +3024,11 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
uint8_t epno;
int ret = OK;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
- ulldbg("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+ ullerr("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
@@ -3036,11 +3036,11 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
usbtrace(TRACE_EPSUBMIT, USB_EPNO(ep->eplog));
priv = privep->dev;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!priv->driver)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
- ulldbg("ERROR: driver=%p\n", priv->driver);
+ ullerr("ERROR: driver=%p\n", priv->driver);
return -ESHUTDOWN;
}
#endif
@@ -3057,7 +3057,7 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
if (privep->stalled)
{
stm32_abortrequest(privep, privreq, -EBUSY);
- ulldbg("ERROR: stalled\n");
+ ullerr("ERROR: stalled\n");
ret = -EBUSY;
}
@@ -3136,7 +3136,7 @@ static int stm32_epcancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
struct stm32_ep_s *privep = (struct stm32_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3163,7 +3163,7 @@ static int stm32_epstall(struct usbdev_ep_s *ep, bool resume)
uint16_t status;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3305,7 +3305,7 @@ static struct usbdev_ep_s *stm32_allocep(struct usbdev_s *dev, uint8_t epno,
int bufno;
usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3379,7 +3379,7 @@ static void stm32_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep)
struct stm32_usbdev_s *priv;
struct stm32_ep_s *privep;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev || !ep)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3410,7 +3410,7 @@ static int stm32_getframe(struct usbdev_s *dev)
{
uint16_t fnr;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3435,7 +3435,7 @@ static int stm32_wakeup(struct usbdev_s *dev)
irqstate_t flags;
usbtrace(TRACE_DEVWAKEUP, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3473,7 +3473,7 @@ static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
@@ -3834,7 +3834,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@@ -3912,7 +3912,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (driver != priv->driver)
{
usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/arm/src/stm32/stm32_usbhost.h b/arch/arm/src/stm32/stm32_usbhost.h
index 2a6a7335446fe83bcd1ecd59f0952667f3cc6fed..7c036a8fa614babbc9c93ba3fa0f7e101e45029f 100644
--- a/arch/arm/src/stm32/stm32_usbhost.h
+++ b/arch/arm/src/stm32/stm32_usbhost.h
@@ -236,7 +236,7 @@ enum usbhost_trace1codes_e
* want to do that?
*
* CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
- * debug. Depends on CONFIG_DEBUG.
+ * debug. Depends on CONFIG_DEBUG_FEATURES.
*/
/************************************************************************************
diff --git a/arch/arm/src/stm32/stm32_wwdg.c b/arch/arm/src/stm32/stm32_wwdg.c
index 5cab6ce92b6db5030869ce6ef0cb5e6010fcb4ec..28a1bd8201741e79970ec6dc5bf903a9db3a4959 100644
--- a/arch/arm/src/stm32/stm32_wwdg.c
+++ b/arch/arm/src/stm32/stm32_wwdg.c
@@ -83,16 +83,16 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the watchdog
- * driver. NOTE: that only lldbg types are used so that the output is
+ * driver. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_WATCHDOG
-# define wddbg lldbg
-# define wdvdbg llvdbg
+# define wderr llerr
+# define wdinfo llinfo
#else
-# define wddbg(x...)
-# define wdvdbg(x...)
+# define wderr(x...)
+# define wdinfo(x...)
#endif
/****************************************************************************
@@ -119,7 +119,7 @@ struct stm32_lowerhalf_s
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_STM32_WWDG_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_WWDG_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint16_t stm32_getreg(uint32_t addr);
static void stm32_putreg(uint16_t val, uint32_t addr);
#else
@@ -179,7 +179,7 @@ static struct stm32_lowerhalf_s g_wdgdev;
*
****************************************************************************/
-#if defined(CONFIG_STM32_WWDG_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_WWDG_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint16_t stm32_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -200,7 +200,7 @@ static uint16_t stm32_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -217,7 +217,7 @@ static uint16_t stm32_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -229,7 +229,7 @@ static uint16_t stm32_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%04x\n", addr, val);
+ llerr("%08x->%04x\n", addr, val);
return val;
}
#endif
@@ -242,12 +242,12 @@ static uint16_t stm32_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_STM32_WWDG_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32_WWDG_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void stm32_putreg(uint16_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%04x\n", addr, val);
+ llerr("%08x<-%04x\n", addr, val);
/* Write the value */
@@ -348,7 +348,7 @@ static int stm32_start(FAR struct watchdog_lowerhalf_s *lower)
{
FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
DEBUGASSERT(priv);
/* The watchdog is always disabled after a reset. It is enabled by setting
@@ -383,7 +383,7 @@ static int stm32_stop(FAR struct watchdog_lowerhalf_s *lower)
* except by a reset.
*/
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
return -ENOSYS;
}
@@ -414,7 +414,7 @@ static int stm32_keepalive(FAR struct watchdog_lowerhalf_s *lower)
{
FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
DEBUGASSERT(priv);
/* Write to T[6:0] bits to configure the counter value, no need to do
@@ -448,7 +448,7 @@ static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower,
uint32_t elapsed;
uint16_t reload;
- wdvdbg("Entry\n");
+ wdinfo("Entry\n");
DEBUGASSERT(priv);
/* Return the status bit */
@@ -474,10 +474,10 @@ static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower,
elapsed = priv->reload - reload;
status->timeleft = (priv->timeout * elapsed) / (priv->reload + 1);
- wdvdbg("Status :\n");
- wdvdbg(" flags : %08x\n", status->flags);
- wdvdbg(" timeout : %d\n", status->timeout);
- wdvdbg(" timeleft : %d\n", status->flags);
+ wdinfo("Status :\n");
+ wdinfo(" flags : %08x\n", status->flags);
+ wdinfo(" timeout : %d\n", status->timeout);
+ wdinfo(" timeleft : %d\n", status->flags);
return OK;
}
@@ -507,13 +507,13 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
int wdgtb;
DEBUGASSERT(priv);
- wdvdbg("Entry: timeout=%d\n", timeout);
+ wdinfo("Entry: timeout=%d\n", timeout);
/* Can this timeout be represented? */
if (timeout < 1 || timeout > WWDG_MAXTIMEOUT)
{
- wddbg("Cannot represent timeout=%d > %d\n",
+ wderr("Cannot represent timeout=%d > %d\n",
timeout, WWDG_MAXTIMEOUT);
return -ERANGE;
}
@@ -562,7 +562,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
*/
#if 0
- wdvdbg("wdgtb=%d fwwdg=%d reload=%d timout=%d\n",
+ wdinfo("wdgtb=%d fwwdg=%d reload=%d timout=%d\n",
wdgtb, fwwdg, reload, 1000 * (reload + 1) / fwwdg);
#endif
if (reload <= WWDG_CR_T_MAX || wdgtb == 3)
@@ -595,7 +595,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
priv->fwwdg = fwwdg;
priv->reload = reload;
- wdvdbg("wdgtb=%d fwwdg=%d reload=%d timout=%d\n",
+ wdinfo("wdgtb=%d fwwdg=%d reload=%d timout=%d\n",
wdgtb, fwwdg, reload, priv->timeout);
/* Set WDGTB[1:0] bits according to calculated value */
@@ -644,7 +644,7 @@ static xcpt_t stm32_capture(FAR struct watchdog_lowerhalf_s *lower,
uint16_t regval;
DEBUGASSERT(priv);
- wdvdbg("Entry: handler=%p\n", handler);
+ wdinfo("Entry: handler=%p\n", handler);
/* Get the old handler return value */
@@ -708,7 +708,7 @@ static int stm32_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
int ret = -ENOTTY;
DEBUGASSERT(priv);
- wdvdbg("Entry: cmd=%d arg=%ld\n", cmd, arg);
+ wdinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
/* WDIOC_MINTIME: Set the minimum ping time. If two keepalive ioctls
* are received within this time, a reset event will be generated.
@@ -761,7 +761,7 @@ void stm32_wwdginitialize(FAR const char *devpath)
{
FAR struct stm32_lowerhalf_s *priv = &g_wdgdev;
- wdvdbg("Entry: devpath=%s\n", devpath);
+ wdinfo("Entry: devpath=%s\n", devpath);
/* NOTE we assume that clocking to the IWDG has already been provided by
* the RCC initialization logic.
diff --git a/arch/arm/src/stm32/stm32f10xxx_dma.c b/arch/arm/src/stm32/stm32f10xxx_dma.c
index a452e65eb8a889f6b6a4dd8c463c0c29b4ff5f63..8a7782773e268a1b025fffcd5c2d7b68cad76a24 100644
--- a/arch/arm/src/stm32/stm32f10xxx_dma.c
+++ b/arch/arm/src/stm32/stm32f10xxx_dma.c
@@ -707,7 +707,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
{
struct stm32_dma_s *dmach = (struct stm32_dma_s *)handle;
@@ -734,19 +734,19 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
const char *msg)
{
struct stm32_dma_s *dmach = (struct stm32_dma_s *)handle;
uint32_t dmabase = DMA_BASE(dmach->base);
- dmadbg("DMA Registers: %s\n", msg);
- dmadbg(" ISRC[%08x]: %08x\n", dmabase + STM32_DMA_ISR_OFFSET, regs->isr);
- dmadbg(" CCR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CCR_OFFSET, regs->ccr);
- dmadbg(" CNDTR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CNDTR_OFFSET, regs->cndtr);
- dmadbg(" CPAR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CPAR_OFFSET, regs->cpar);
- dmadbg(" CMAR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CMAR_OFFSET, regs->cmar);
+ dmainfo("DMA Registers: %s\n", msg);
+ dmainfo(" ISRC[%08x]: %08x\n", dmabase + STM32_DMA_ISR_OFFSET, regs->isr);
+ dmainfo(" CCR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CCR_OFFSET, regs->ccr);
+ dmainfo(" CNDTR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CNDTR_OFFSET, regs->cndtr);
+ dmainfo(" CPAR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CPAR_OFFSET, regs->cpar);
+ dmainfo(" CMAR[%08x]: %08x\n", dmach->base + STM32_DMACHAN_CMAR_OFFSET, regs->cmar);
}
#endif
diff --git a/arch/arm/src/stm32/stm32f20xxx_dma.c b/arch/arm/src/stm32/stm32f20xxx_dma.c
index 39c40f59f65115ae6cb37b36d1bbfc04359eb0a0..335a9cd0096fe1581a7182d58ccbbb31af2fa3ee 100644
--- a/arch/arm/src/stm32/stm32f20xxx_dma.c
+++ b/arch/arm/src/stm32/stm32f20xxx_dma.c
@@ -606,7 +606,7 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
uint32_t regoffset;
uint32_t regval;
- dmadbg("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n",
+ dmaerr("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n",
paddr, maddr, ntransfers, scr);
/* "If the stream is enabled, disable it by resetting the EN bit in the
@@ -973,7 +973,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
{
struct stm32_dma_s *dmast = (struct stm32_dma_s *)handle;
@@ -1003,22 +1003,22 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
const char *msg)
{
struct stm32_dma_s *dmast = (struct stm32_dma_s *)handle;
uint32_t dmabase = DMA_BASE(dmast->base);
- dmadbg("DMA Registers: %s\n", msg);
- dmadbg(" LISR[%08x]: %08x\n", dmabase + STM32_DMA_LISR_OFFSET, regs->lisr);
- dmadbg(" HISR[%08x]: %08x\n", dmabase + STM32_DMA_HISR_OFFSET, regs->hisr);
- dmadbg(" SCR[%08x]: %08x\n", dmast->base + STM32_DMA_SCR_OFFSET, regs->scr);
- dmadbg(" SNDTR[%08x]: %08x\n", dmast->base + STM32_DMA_SNDTR_OFFSET, regs->sndtr);
- dmadbg(" SPAR[%08x]: %08x\n", dmast->base + STM32_DMA_SPAR_OFFSET, regs->spar);
- dmadbg(" SM0AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM0AR_OFFSET, regs->sm0ar);
- dmadbg(" SM1AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM1AR_OFFSET, regs->sm1ar);
- dmadbg(" SFCR[%08x]: %08x\n", dmast->base + STM32_DMA_SFCR_OFFSET, regs->sfcr);
+ dmainfo("DMA Registers: %s\n", msg);
+ dmainfo(" LISR[%08x]: %08x\n", dmabase + STM32_DMA_LISR_OFFSET, regs->lisr);
+ dmainfo(" HISR[%08x]: %08x\n", dmabase + STM32_DMA_HISR_OFFSET, regs->hisr);
+ dmainfo(" SCR[%08x]: %08x\n", dmast->base + STM32_DMA_SCR_OFFSET, regs->scr);
+ dmainfo(" SNDTR[%08x]: %08x\n", dmast->base + STM32_DMA_SNDTR_OFFSET, regs->sndtr);
+ dmainfo(" SPAR[%08x]: %08x\n", dmast->base + STM32_DMA_SPAR_OFFSET, regs->spar);
+ dmainfo(" SM0AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM0AR_OFFSET, regs->sm0ar);
+ dmainfo(" SM1AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM1AR_OFFSET, regs->sm1ar);
+ dmainfo(" SFCR[%08x]: %08x\n", dmast->base + STM32_DMA_SFCR_OFFSET, regs->sfcr);
}
#endif
diff --git a/arch/arm/src/stm32/stm32f30xxx_i2c.c b/arch/arm/src/stm32/stm32f30xxx_i2c.c
index 15b0cb63bb4f65700ac46def29585f5e6d011aaf..5f989bf0cdffbce9c5526e399bd97a12c228ae5c 100644
--- a/arch/arm/src/stm32/stm32f30xxx_i2c.c
+++ b/arch/arm/src/stm32/stm32f30xxx_i2c.c
@@ -154,14 +154,14 @@
#define STATUS_BUSY(status) (status & I2C_ISR_BUSY)
/* Debug ****************************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
+/* CONFIG_DEBUG_I2C + CONFIG_DEBUG_FEATURES enables general I2C debug output. */
#ifdef CONFIG_DEBUG_I2C
-# define i2cdbg dbg
-# define i2cvdbg vdbg
+# define i2cerr err
+# define i2cinfo info
#else
-# define i2cdbg(x...)
-# define i2cvdbg(x...)
+# define i2cerr(x...)
+# define i2cinfo(x...)
#endif
/* I2C event trace logic. NOTE: trace uses the internal, non-standard, low-level
@@ -727,7 +727,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
- i2cvdbg("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
+ i2cinfo("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
priv->intstate, (long)elapsed, (long)timeout, priv->status);
/* Set the interrupt state back to IDLE */
@@ -881,7 +881,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
* still pending.
*/
- i2cvdbg("Timeout with CR: %04x SR: %04x\n", cr, sr);
+ i2cinfo("Timeout with CR: %04x SR: %04x\n", cr, sr);
}
/************************************************************************************
@@ -975,7 +975,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv,
if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
{
- i2cdbg("Trace table overflow\n");
+ i2cerr("Trace table overflow\n");
return;
}
@@ -1016,7 +1016,7 @@ static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
{
- i2cdbg("Trace table overflow\n");
+ i2cerr("Trace table overflow\n");
return;
}
@@ -1709,7 +1709,7 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
status = stm32_i2c_getstatus(priv);
ret = -ETIMEDOUT;
- i2cdbg("Timed out: CR1: %04x status: %08x\n",
+ i2cerr("Timed out: CR1: %04x status: %08x\n",
stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET), status);
/* "Note: When the STOP, START or PEC bit is set, the software must
diff --git a/arch/arm/src/stm32/stm32f40xxx_dma.c b/arch/arm/src/stm32/stm32f40xxx_dma.c
index 41d243685957832fc2581aa9c62c13174fb33e07..8aae23d833f3efac1ff0606b1b60bb0865e0344b 100644
--- a/arch/arm/src/stm32/stm32f40xxx_dma.c
+++ b/arch/arm/src/stm32/stm32f40xxx_dma.c
@@ -605,7 +605,7 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
uint32_t regoffset;
uint32_t regval;
- dmadbg("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n",
+ dmaerr("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n",
paddr, maddr, ntransfers, scr);
#ifdef CONFIG_STM32_DMACAPABLE
@@ -869,7 +869,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
uint32_t transfer_size, burst_length;
uint32_t mend;
- dmavdbg("stm32_dmacapable: 0x%08x/%u 0x%08x\n", maddr, count, ccr);
+ dmainfo("stm32_dmacapable: 0x%08x/%u 0x%08x\n", maddr, count, ccr);
/* Verify that the address conforms to the memory transfer size.
* Transfers to/from memory performed by the DMA controller are
@@ -899,13 +899,13 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
break;
default:
- dmavdbg("stm32_dmacapable: bad transfer size in CCR\n");
+ dmainfo("stm32_dmacapable: bad transfer size in CCR\n");
return false;
}
if ((maddr & (transfer_size - 1)) != 0)
{
- dmavdbg("stm32_dmacapable: transfer unaligned\n");
+ dmainfo("stm32_dmacapable: transfer unaligned\n");
return false;
}
@@ -937,13 +937,13 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
break;
default:
- dmavdbg("stm32_dmacapable: bad burst size in CCR\n");
+ dmainfo("stm32_dmacapable: bad burst size in CCR\n");
return false;
}
if ((maddr & (burst_length - 1)) != 0)
{
- dmavdbg("stm32_dmacapable: burst crosses 1KiB\n");
+ dmainfo("stm32_dmacapable: burst crosses 1KiB\n");
return false;
}
}
@@ -952,7 +952,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
if ((maddr & STM32_REGION_MASK) != (mend & STM32_REGION_MASK))
{
- dmavdbg("stm32_dmacapable: transfer crosses memory region\n");
+ dmainfo("stm32_dmacapable: transfer crosses memory region\n");
return false;
}
@@ -973,7 +973,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
if (maddr >= STM32_CCMRAM_BASE &&
(maddr - STM32_CCMRAM_BASE) < 65536)
{
- dmavdbg("stm32_dmacapable: transfer targets CCMRAM\n");
+ dmainfo("stm32_dmacapable: transfer targets CCMRAM\n");
return false;
}
break;
@@ -981,11 +981,11 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
default:
/* Everything else is unsupported by DMA */
- dmavdbg("stm32_dmacapable: transfer targets unknown/unsupported region\n");
+ dmainfo("stm32_dmacapable: transfer targets unknown/unsupported region\n");
return false;
}
- dmavdbg("stm32_dmacapable: transfer OK\n");
+ dmainfo("stm32_dmacapable: transfer OK\n");
return true;
}
#endif
@@ -1001,7 +1001,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
{
struct stm32_dma_s *dmast = (struct stm32_dma_s *)handle;
@@ -1031,22 +1031,22 @@ void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG_DMA
+#ifdef CONFIG_DEBUG_DMA_INFO
void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
const char *msg)
{
struct stm32_dma_s *dmast = (struct stm32_dma_s *)handle;
uint32_t dmabase = DMA_BASE(dmast->base);
- dmadbg("DMA Registers: %s\n", msg);
- dmadbg(" LISR[%08x]: %08x\n", dmabase + STM32_DMA_LISR_OFFSET, regs->lisr);
- dmadbg(" HISR[%08x]: %08x\n", dmabase + STM32_DMA_HISR_OFFSET, regs->hisr);
- dmadbg(" SCR[%08x]: %08x\n", dmast->base + STM32_DMA_SCR_OFFSET, regs->scr);
- dmadbg(" SNDTR[%08x]: %08x\n", dmast->base + STM32_DMA_SNDTR_OFFSET, regs->sndtr);
- dmadbg(" SPAR[%08x]: %08x\n", dmast->base + STM32_DMA_SPAR_OFFSET, regs->spar);
- dmadbg(" SM0AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM0AR_OFFSET, regs->sm0ar);
- dmadbg(" SM1AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM1AR_OFFSET, regs->sm1ar);
- dmadbg(" SFCR[%08x]: %08x\n", dmast->base + STM32_DMA_SFCR_OFFSET, regs->sfcr);
+ dmainfo("DMA Registers: %s\n", msg);
+ dmainfo(" LISR[%08x]: %08x\n", dmabase + STM32_DMA_LISR_OFFSET, regs->lisr);
+ dmainfo(" HISR[%08x]: %08x\n", dmabase + STM32_DMA_HISR_OFFSET, regs->hisr);
+ dmainfo(" SCR[%08x]: %08x\n", dmast->base + STM32_DMA_SCR_OFFSET, regs->scr);
+ dmainfo(" SNDTR[%08x]: %08x\n", dmast->base + STM32_DMA_SNDTR_OFFSET, regs->sndtr);
+ dmainfo(" SPAR[%08x]: %08x\n", dmast->base + STM32_DMA_SPAR_OFFSET, regs->spar);
+ dmainfo(" SM0AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM0AR_OFFSET, regs->sm0ar);
+ dmainfo(" SM1AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM1AR_OFFSET, regs->sm1ar);
+ dmainfo(" SFCR[%08x]: %08x\n", dmast->base + STM32_DMA_SFCR_OFFSET, regs->sfcr);
}
#endif
diff --git a/arch/arm/src/stm32/stm32f40xxx_rtcc.c b/arch/arm/src/stm32/stm32f40xxx_rtcc.c
index d89134fd462a24725c3ff4be0b8a2b876c01c75f..4600ce97faa8fd814193d0152ae8717b14fef754 100644
--- a/arch/arm/src/stm32/stm32f40xxx_rtcc.c
+++ b/arch/arm/src/stm32/stm32f40xxx_rtcc.c
@@ -81,7 +81,7 @@
# error "CONFIG_STM32_PWR must selected to use this driver"
#endif
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_RTC
#endif
@@ -134,15 +134,15 @@
/* Debug ****************************************************************************/
#ifdef CONFIG_DEBUG_RTC
-# define rtcdbg dbg
-# define rtcvdbg vdbg
-# define rtclldbg lldbg
-# define rtcllvdbg llvdbg
+# define rtcerr err
+# define rtcinfo info
+# define rtcllerr llerr
+# define rtcllinfo llinfo
#else
-# define rtcdbg(x...)
-# define rtcvdbg(x...)
-# define rtclldbg(x...)
-# define rtcllvdbg(x...)
+# define rtcerr(x...)
+# define rtcinfo(x...)
+# define rtcllerr(x...)
+# define rtcllinfo(x...)
#endif
/************************************************************************************
@@ -213,31 +213,31 @@ static void rtc_dumpregs(FAR const char *msg)
{
int rtc_state;
- rtclldbg("%s:\n", msg);
- rtclldbg(" TR: %08x\n", getreg32(STM32_RTC_TR));
- rtclldbg(" DR: %08x\n", getreg32(STM32_RTC_DR));
- rtclldbg(" CR: %08x\n", getreg32(STM32_RTC_CR));
- rtclldbg(" ISR: %08x\n", getreg32(STM32_RTC_ISR));
- rtclldbg(" PRER: %08x\n", getreg32(STM32_RTC_PRER));
- rtclldbg(" WUTR: %08x\n", getreg32(STM32_RTC_WUTR));
- rtclldbg(" ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR));
- rtclldbg(" ALRMBR: %08x\n", getreg32(STM32_RTC_ALRMBR));
- rtclldbg(" SHIFTR: %08x\n", getreg32(STM32_RTC_SHIFTR));
- rtclldbg(" TSTR: %08x\n", getreg32(STM32_RTC_TSTR));
- rtclldbg(" TSDR: %08x\n", getreg32(STM32_RTC_TSDR));
- rtclldbg(" TSSSR: %08x\n", getreg32(STM32_RTC_TSSSR));
- rtclldbg(" CALR: %08x\n", getreg32(STM32_RTC_CALR));
- rtclldbg(" TAFCR: %08x\n", getreg32(STM32_RTC_TAFCR));
- rtclldbg("ALRMASSR: %08x\n", getreg32(STM32_RTC_ALRMASSR));
- rtclldbg("ALRMBSSR: %08x\n", getreg32(STM32_RTC_ALRMBSSR));
- rtclldbg("MAGICREG: %08x\n", getreg32(RTC_MAGIC_REG));
+ rtcllerr("%s:\n", msg);
+ rtcllerr(" TR: %08x\n", getreg32(STM32_RTC_TR));
+ rtcllerr(" DR: %08x\n", getreg32(STM32_RTC_DR));
+ rtcllerr(" CR: %08x\n", getreg32(STM32_RTC_CR));
+ rtcllerr(" ISR: %08x\n", getreg32(STM32_RTC_ISR));
+ rtcllerr(" PRER: %08x\n", getreg32(STM32_RTC_PRER));
+ rtcllerr(" WUTR: %08x\n", getreg32(STM32_RTC_WUTR));
+ rtcllerr(" ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR));
+ rtcllerr(" ALRMBR: %08x\n", getreg32(STM32_RTC_ALRMBR));
+ rtcllerr(" SHIFTR: %08x\n", getreg32(STM32_RTC_SHIFTR));
+ rtcllerr(" TSTR: %08x\n", getreg32(STM32_RTC_TSTR));
+ rtcllerr(" TSDR: %08x\n", getreg32(STM32_RTC_TSDR));
+ rtcllerr(" TSSSR: %08x\n", getreg32(STM32_RTC_TSSSR));
+ rtcllerr(" CALR: %08x\n", getreg32(STM32_RTC_CALR));
+ rtcllerr(" TAFCR: %08x\n", getreg32(STM32_RTC_TAFCR));
+ rtcllerr("ALRMASSR: %08x\n", getreg32(STM32_RTC_ALRMASSR));
+ rtcllerr("ALRMBSSR: %08x\n", getreg32(STM32_RTC_ALRMBSSR));
+ rtcllerr("MAGICREG: %08x\n", getreg32(RTC_MAGIC_REG));
rtc_state =
((getreg32(STM32_EXTI_RTSR) & EXTI_RTC_ALARM) ? 0x1000 : 0) |
((getreg32(STM32_EXTI_FTSR) & EXTI_RTC_ALARM) ? 0x0100 : 0) |
((getreg32(STM32_EXTI_IMR) & EXTI_RTC_ALARM) ? 0x0010 : 0) |
((getreg32(STM32_EXTI_EMR) & EXTI_RTC_ALARM) ? 0x0001 : 0);
- rtclldbg("EXTI (RTSR FTSR ISR EVT): %01x\n",rtc_state);
+ rtcllerr("EXTI (RTSR FTSR ISR EVT): %01x\n",rtc_state);
}
#else
# define rtc_dumpregs(msg)
@@ -260,13 +260,13 @@ static void rtc_dumpregs(FAR const char *msg)
#ifdef CONFIG_DEBUG_RTC
static void rtc_dumptime(FAR const struct tm *tp, FAR const char *msg)
{
- rtclldbg("%s:\n", msg);
- rtclldbg(" tm_sec: %08x\n", tp->tm_sec);
- rtclldbg(" tm_min: %08x\n", tp->tm_min);
- rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
- rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
- rtclldbg(" tm_mon: %08x\n", tp->tm_mon);
- rtclldbg(" tm_year: %08x\n", tp->tm_year);
+ rtcllerr("%s:\n", msg);
+ rtcllerr(" tm_sec: %08x\n", tp->tm_sec);
+ rtcllerr(" tm_min: %08x\n", tp->tm_min);
+ rtcllerr(" tm_hour: %08x\n", tp->tm_hour);
+ rtcllerr(" tm_mday: %08x\n", tp->tm_mday);
+ rtcllerr(" tm_mon: %08x\n", tp->tm_mon);
+ rtcllerr(" tm_year: %08x\n", tp->tm_year);
}
#else
# define rtc_dumptime(tp, msg)
@@ -792,7 +792,7 @@ static int rtchw_set_alrmar(rtc_alarmreg_t alarmreg)
/* Set the RTC Alarm register */
putreg32(alarmreg, STM32_RTC_ALRMAR);
- rtcvdbg(" TR: %08x ALRMAR: %08x\n",
+ rtcinfo(" TR: %08x ALRMAR: %08x\n",
getreg32(STM32_RTC_TR), getreg32(STM32_RTC_ALRMAR));
/* Enable RTC alarm */
@@ -829,7 +829,7 @@ static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg)
/* Set the RTC Alarm register */
putreg32(alarmreg, STM32_RTC_ALRMBR);
- rtcvdbg(" TR: %08x ALRMBR: %08x\n",
+ rtcinfo(" TR: %08x ALRMBR: %08x\n",
getreg32(STM32_RTC_TR), getreg32(STM32_RTC_ALRMBR));
/* Enable RTC alarm B */
@@ -989,13 +989,13 @@ int up_rtc_initialize(void)
{
case OK:
{
- rtclldbg("rtc_syncwait() okay\n");
+ rtcllerr("rtc_syncwait() okay\n");
break;
}
default:
{
- rtclldbg("rtc_syncwait() failed (%d)\n", ret);
+ rtcllerr("rtc_syncwait() failed (%d)\n", ret);
break;
}
}
@@ -1009,7 +1009,7 @@ int up_rtc_initialize(void)
if (regval != RTC_MAGIC)
{
- rtclldbg("Do setup\n");
+ rtcllerr("Do setup\n");
/* Perform the one-time setup of the LSE clocking to the RTC */
@@ -1027,7 +1027,7 @@ int up_rtc_initialize(void)
}
else
{
- rtclldbg("Do resume\n");
+ rtcllerr("Do resume\n");
/* RTC already set-up, just resume normal operation */
@@ -1043,7 +1043,7 @@ int up_rtc_initialize(void)
if (ret != OK && nretry > 0)
{
- rtclldbg("setup/resume ran %d times and failed with %d\n",
+ rtcllerr("setup/resume ran %d times and failed with %d\n",
nretry, ret);
return -ETIMEDOUT;
}
@@ -1409,7 +1409,7 @@ int stm32_rtc_setalarm(FAR struct alm_setalarm_s *alminfo)
#endif
default:
- rtcvdbg("ERROR: Invalid ALARM%d\n", alminfo->as_id);
+ rtcinfo("ERROR: Invalid ALARM%d\n", alminfo->as_id);
break;
}
@@ -1507,7 +1507,7 @@ int stm32_rtc_cancelalarm(enum alm_id_e alarmid)
#endif
default:
- rtcvdbg("ERROR: Invalid ALARM%d\n", alarmid);
+ rtcinfo("ERROR: Invalid ALARM%d\n", alarmid);
break;
}
diff --git a/arch/arm/src/stm32f7/Kconfig b/arch/arm/src/stm32f7/Kconfig
index e77c028ec050d5f711b57f3148b82be2e8c18bf1..72a6935112fb34ecb33b56c2900ee578f57b974a 100644
--- a/arch/arm/src/stm32f7/Kconfig
+++ b/arch/arm/src/stm32f7/Kconfig
@@ -470,10 +470,6 @@ config ARCH_CHIP_STM32F779AI
endchoice # STM32 F7 Chip Selection
-config STM32F7_STM32F74XX
- bool
- default n
-
config STM32F7_STM32F74XX
bool
default n
@@ -486,42 +482,6 @@ config STM32F7_STM32F76XX
bool
default n
-config STM32F7_STM32F76XX
- bool
- default n
-
-config STM32F7_STM32F76XX
- bool
- default n
-
-config STM32F7_STM32F76XX
- bool
- default n
-
-config STM32F7_STM32F76XX
- bool
- default n
-
-config STM32F7_STM32F76XX
- bool
- default n
-
-config STM32F7_STM32F77XX
- bool
- default n
-
-config STM32F7_STM32F77XX
- bool
- default n
-
-config STM32F7_STM32F77XX
- bool
- default n
-
-config STM32F7_STM32F77XX
- bool
- default n
-
config STM32F7_STM32F77XX
bool
default n
@@ -1653,6 +1613,25 @@ config STM32F7_SERIALBRK_BSDCOMPAT
endmenu # U[S]ART Configuration
+menu "SPI Configuration"
+ depends on STM32F7_SPI
+
+config STM32F7_SPI_INTERRUPTS
+ bool "Interrupt driver SPI"
+ default n
+ ---help---
+ Select to enable interrupt driven SPI support. Non-interrupt-driven,
+ poll-waiting is recommended if the interrupt rate would be to high in
+ the interrupt driven case.
+
+config STM32F7_SPI_DMA
+ bool "SPI DMA"
+ default n
+ ---help---
+ Use DMA to improve SPI transfer performance. Cannot be used with STM32F7_SPI_INTERRUPT.
+
+endmenu # "SPI Configuration"
+
config STM32F7_CUSTOM_CLOCKCONFIG
bool "Custom clock configuration"
default n
@@ -1668,6 +1647,18 @@ config STM32F7_DTCM_PROCFS
will provide statistics about DTCM memory use similar to what you
would get from mallinfo() for the user heap.
+config STM32F7_DMACAPABLE
+ bool "Workaround non-DMA capable memory"
+ depends on ARCH_DMA
+ default y if !STM32_CCMEXCLUDE
+ default n if STM32_CCMEXCLUDE
+ ---help---
+ This option enables the DMA interface stm32_dmacapable that can be
+ used to check if it is possible to do DMA from the selected address.
+ Drivers then may use this information to determine if they should
+ attempt the DMA or fall back to a different transfer method.
+
+
if STM32F7_ETHMAC
menu "Ethernet MAC configuration"
@@ -1856,9 +1847,9 @@ endchoice
config STM32F7_ETHMAC_REGDEBUG
bool "Register-Level Debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
- Enable very low-level register access debug. Depends on DEBUG.
+ Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES.
endmenu
endif # STM32F7_ETHMAC
diff --git a/arch/arm/src/stm32f7/Make.defs b/arch/arm/src/stm32f7/Make.defs
index 7a905829615d2c1265bc0331a882993179c33ddb..844ca4cb3b611986ae39b2c706ef5629bf5d6113 100644
--- a/arch/arm/src/stm32f7/Make.defs
+++ b/arch/arm/src/stm32f7/Make.defs
@@ -149,10 +149,14 @@ CHIP_CSRCS += stm32_exti_alarm.c
endif
endif
+ifeq ($(CONFIG_STM32F7_SPI),y)
+CHIP_CSRCS += stm32_spi.c
+endif
+
ifeq ($(CONFIG_STM32F7_ETHMAC),y)
CHIP_CSRCS += stm32_ethernet.c
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
CHIP_CSRCS += stm32_dumpgpio.c
endif
diff --git a/arch/arm/src/stm32f7/chip.h b/arch/arm/src/stm32f7/chip.h
index b5cf98dae03d89d62630affe03e02e01d7e22da1..f9839c631615249e96e861df7cbc20c0c6f1b4c1 100644
--- a/arch/arm/src/stm32f7/chip.h
+++ b/arch/arm/src/stm32f7/chip.h
@@ -48,6 +48,7 @@
#include
#include
+#include "chip/stm32_pinmap.h"
#include "chip/stm32_memorymap.h"
#include "chip/stm32_pinmap.h"
diff --git a/arch/arm/src/stm32f7/chip/stm32_spi.h b/arch/arm/src/stm32f7/chip/stm32_spi.h
index c6a8d8cd3abead3a77dc820e21edf8476ef0ec35..dbd4d7301e3a77bf46c3950250597a3f43ff0aaa 100644
--- a/arch/arm/src/stm32f7/chip/stm32_spi.h
+++ b/arch/arm/src/stm32f7/chip/stm32_spi.h
@@ -1,8 +1,9 @@
/************************************************************************************
* arch/arm/src/stm32f7/chip/stm32_spi.h
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt
+ * Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ * Authors: Gregory Nutt
+ * David Sidrane
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -33,8 +34,8 @@
*
************************************************************************************/
-#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32_SPI_H
-#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32_SPI_H
+#ifndef __ARCH_ARM_STC_STM32F7_CHIP_STM32_SPI_H
+#define __ARCH_ARM_STC_STM32F7_CHIP_STM32_SPI_H
/************************************************************************************
* Included Files
@@ -43,10 +44,215 @@
#include
#include "chip.h"
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Maximum allowed speed as per data sheet for all SPIs (both pclk1 and pclk2)*/
+
#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
-# include "chip/stm32f74xx75xx_spi.h"
-#else
-# error "Unsupported STM32 F7 part"
+# define STM32_SPI_CLK_MAX 50000000UL
+#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
+# define STM32_SPI_CLK_MAX 54000000UL
+#endif
+
+/* Register Offsets *****************************************************************/
+
+#define STM32_SPI_CR1_OFFSET 0x0000 /* SPI Control Register 1 (16-bit) */
+#define STM32_SPI_CR2_OFFSET 0x0004 /* SPI control register 2 (16-bit) */
+#define STM32_SPI_SR_OFFSET 0x0008 /* SPI status register (16-bit) */
+#define STM32_SPI_DR_OFFSET 0x000c /* SPI data register (16-bit) */
+#define STM32_SPI_CRCPR_OFFSET 0x0010 /* SPI CRC polynomial register (16-bit) */
+#define STM32_SPI_RXCRCR_OFFSET 0x0014 /* SPI Rx CRC register (16-bit) */
+#define STM32_SPI_TXCRCR_OFFSET 0x0018 /* SPI Tx CRC register (16-bit) */
+#define STM32_SPI_I2SCFGR_OFFSET 0x001c /* I2S configuration register */
+#define STM32_SPI_I2SPR_OFFSET 0x0020 /* I2S prescaler register */
+
+/* Register Addresses ***************************************************************/
+
+#if STM32F7_NSPI > 0
+# define STM32_SPI1_CR1 (STM32_SPI1_BASE+STM32_SPI_CR1_OFFSET)
+# define STM32_SPI1_CR2 (STM32_SPI1_BASE+STM32_SPI_CR2_OFFSET)
+# define STM32_SPI1_SR (STM32_SPI1_BASE+STM32_SPI_SR_OFFSET)
+# define STM32_SPI1_DR (STM32_SPI1_BASE+STM32_SPI_DR_OFFSET)
+# define STM32_SPI1_CRCPR (STM32_SPI1_BASE+STM32_SPI_CRCPR_OFFSET)
+# define STM32_SPI1_RXCRCR (STM32_SPI1_BASE+STM32_SPI_RXCRCR_OFFSET)
+# define STM32_SPI1_TXCRCR (STM32_SPI1_BASE+STM32_SPI_TXCRCR_OFFSET)
+#endif
+
+#if STM32F7_NSPI > 1
+# define STM32_SPI2_CR1 (STM32_SPI2_BASE+STM32_SPI_CR1_OFFSET)
+# define STM32_SPI2_CR2 (STM32_SPI2_BASE+STM32_SPI_CR2_OFFSET)
+# define STM32_SPI2_SR (STM32_SPI2_BASE+STM32_SPI_SR_OFFSET)
+# define STM32_SPI2_DR (STM32_SPI2_BASE+STM32_SPI_DR_OFFSET)
+# define STM32_SPI2_CRCPR (STM32_SPI2_BASE+STM32_SPI_CRCPR_OFFSET)
+# define STM32_SPI2_RXCRCR (STM32_SPI2_BASE+STM32_SPI_RXCRCR_OFFSET)
+# define STM32_SPI2_TXCRCR (STM32_SPI2_BASE+STM32_SPI_TXCRCR_OFFSET)
+# define STM32_SPI2_I2SCFGR (STM32_SPI2_BASE+STM32_SPI_I2SCFGR_OFFSET)
+# define STM32_SPI2_I2SPR (STM32_SPI2_BASE+STM32_SPI_I2SPR_OFFSET)
+#endif
+
+#if STM32F7_NSPI > 2
+# define STM32_SPI3_CR1 (STM32_SPI3_BASE+STM32_SPI_CR1_OFFSET)
+# define STM32_SPI3_CR2 (STM32_SPI3_BASE+STM32_SPI_CR2_OFFSET)
+# define STM32_SPI3_SR (STM32_SPI3_BASE+STM32_SPI_SR_OFFSET)
+# define STM32_SPI3_DR (STM32_SPI3_BASE+STM32_SPI_DR_OFFSET)
+# define STM32_SPI3_CRCPR (STM32_SPI3_BASE+STM32_SPI_CRCPR_OFFSET)
+# define STM32_SPI3_RXCRCR (STM32_SPI3_BASE+STM32_SPI_RXCRCR_OFFSET)
+# define STM32_SPI3_TXCRCR (STM32_SPI3_BASE+STM32_SPI_TXCRCR_OFFSET)
+# define STM32_SPI3_I2SCFGR (STM32_SPI3_BASE+STM32_SPI_I2SCFGR_OFFSET)
+# define STM32_SPI3_I2SPR (STM32_SPI3_BASE+STM32_SPI_I2SPR_OFFSET)
+#endif
+
+#if STM32F7_NSPI > 3
+# define STM32_SPI4_CR1 (STM32_SPI4_BASE+STM32_SPI_CR1_OFFSET)
+# define STM32_SPI4_CR2 (STM32_SPI4_BASE+STM32_SPI_CR2_OFFSET)
+# define STM32_SPI4_SR (STM32_SPI4_BASE+STM32_SPI_SR_OFFSET)
+# define STM32_SPI4_DR (STM32_SPI4_BASE+STM32_SPI_DR_OFFSET)
+# define STM32_SPI4_CRCPR (STM32_SPI4_BASE+STM32_SPI_CRCPR_OFFSET)
+# define STM32_SPI4_RXCRCR (STM32_SPI4_BASE+STM32_SPI_RXCRCR_OFFSET)
+# define STM32_SPI4_TXCRCR (STM32_SPI4_BASE+STM32_SPI_TXCRCR_OFFSET)
+# define STM32_SPI4_I2SCFGR (STM32_SPI4_BASE+STM32_SPI_I2SCFGR_OFFSET)
+# define STM32_SPI4_I2SPR (STM32_SPI4_BASE+STM32_SPI_I2SPR_OFFSET)
#endif
-#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_SPI_H */
+#if STM32F7_NSPI > 4
+# define STM32_SPI5_CR1 (STM32_SPI5_BASE+STM32_SPI_CR1_OFFSET)
+# define STM32_SPI5_CR2 (STM32_SPI5_BASE+STM32_SPI_CR2_OFFSET)
+# define STM32_SPI5_SR (STM32_SPI5_BASE+STM32_SPI_SR_OFFSET)
+# define STM32_SPI5_DR (STM32_SPI5_BASE+STM32_SPI_DR_OFFSET)
+# define STM32_SPI5_CRCPR (STM32_SPI5_BASE+STM32_SPI_CRCPR_OFFSET)
+# define STM32_SPI5_RXCRCR (STM32_SPI5_BASE+STM32_SPI_RXCRCR_OFFSET)
+# define STM32_SPI5_TXCRCR (STM32_SPI5_BASE+STM32_SPI_TXCRCR_OFFSET)
+# define STM32_SPI5_I2SCFGR (STM32_SPI5_BASE+STM32_SPI_I2SCFGR_OFFSET)
+# define STM32_SPI5_I2SPR (STM32_SPI5_BASE+STM32_SPI_I2SPR_OFFSET)
+#endif
+
+#if STM32F7_NSPI > 5
+# define STM32_SPI6_CR1 (STM32_SPI6_BASE+STM32_SPI_CR1_OFFSET)
+# define STM32_SPI6_CR2 (STM32_SPI6_BASE+STM32_SPI_CR2_OFFSET)
+# define STM32_SPI6_SR (STM32_SPI6_BASE+STM32_SPI_SR_OFFSET)
+# define STM32_SPI6_DR (STM32_SPI6_BASE+STM32_SPI_DR_OFFSET)
+# define STM32_SPI6_CRCPR (STM32_SPI6_BASE+STM32_SPI_CRCPR_OFFSET)
+# define STM32_SPI6_RXCRCR (STM32_SPI6_BASE+STM32_SPI_RXCRCR_OFFSET)
+# define STM32_SPI6_TXCRCR (STM32_SPI6_BASE+STM32_SPI_TXCRCR_OFFSET)
+# define STM32_SPI6_I2SCFGR (STM32_SPI6_BASE+STM32_SPI_I2SCFGR_OFFSET)
+# define STM32_SPI6_I2SPR (STM32_SPI6_BASE+STM32_SPI_I2SPR_OFFSET)
+#endif
+
+/* Register Bitfield Definitions ****************************************************/
+
+/* SPI Control Register 1 */
+
+#define SPI_CR1_CPHA (1 << 0) /* Bit 0: Clock Phase */
+#define SPI_CR1_CPOL (1 << 1) /* Bit 1: Clock Polarity */
+#define SPI_CR1_MSTR (1 << 2) /* Bit 2: Master Selection */
+#define SPI_CR1_BR_SHIFT (3) /* Bits 5:3 Baud Rate Control */
+#define SPI_CR1_BR_MASK (7 << SPI_CR1_BR_SHIFT)
+# define SPI_CR1_FPCLCKd2 (0 << SPI_CR1_BR_SHIFT) /* 000: fPCLK/2 */
+# define SPI_CR1_FPCLCKd4 (1 << SPI_CR1_BR_SHIFT) /* 001: fPCLK/4 */
+# define SPI_CR1_FPCLCKd8 (2 << SPI_CR1_BR_SHIFT) /* 010: fPCLK/8 */
+# define SPI_CR1_FPCLCKd16 (3 << SPI_CR1_BR_SHIFT) /* 011: fPCLK/16 */
+# define SPI_CR1_FPCLCKd32 (4 << SPI_CR1_BR_SHIFT) /* 100: fPCLK/32 */
+# define SPI_CR1_FPCLCKd64 (5 << SPI_CR1_BR_SHIFT) /* 101: fPCLK/64 */
+# define SPI_CR1_FPCLCKd128 (6 << SPI_CR1_BR_SHIFT) /* 110: fPCLK/128 */
+# define SPI_CR1_FPCLCKd256 (7 << SPI_CR1_BR_SHIFT) /* 111: fPCLK/256 */
+#define SPI_CR1_SPE (1 << 6) /* Bit 6: SPI Enable */
+#define SPI_CR1_LSBFIRST (1 << 7) /* Bit 7: Frame Format */
+#define SPI_CR1_SSI (1 << 8) /* Bit 8: Internal slave select */
+#define SPI_CR1_SSM (1 << 9) /* Bit 9: Software slave management */
+#define SPI_CR1_RXONLY (1 << 10) /* Bit 10: Receive only */
+#define SPI_CR1_CRCL (1 << 11) /* Bit 11: CRC length */
+#define SPI_CR1_CRCNEXT (1 << 12) /* Bit 12: Transmit CRC next */
+#define SPI_CR1_CRCEN (1 << 13) /* Bit 13: Hardware CRC calculation enable */
+#define SPI_CR1_BIDIOE (1 << 14) /* Bit 14: Output enable in bidirectional mode */
+#define SPI_CR1_BIDIMODE (1 << 15) /* Bit 15: Bidirectional data mode enable */
+
+/* SPI Control Register 2 */
+
+#define SPI_CR2_RXDMAEN (1 << 0) /* Bit 0: Rx Buffer DMA Enable */
+#define SPI_CR2_TXDMAEN (1 << 1) /* Bit 1: Tx Buffer DMA Enable */
+#define SPI_CR2_SSOE (1 << 2) /* Bit 2: SS Output Enable */
+#define SPI_CR2_NSSP (1 << 3) /* Bit 3 NSSP: NSS pulse management */
+#define SPI_CR2_FRF (1 << 4) /* Bit 4: Frame format */
+#define SPI_CR2_ERRIE (1 << 5) /* Bit 5: Error interrupt enable */
+#define SPI_CR2_RXNEIE (1 << 6) /* Bit 6: RX buffer not empty interrupt enable */
+#define SPI_CR2_TXEIE (1 << 7) /* Bit 7: Tx buffer empty interrupt enable */
+#define SPI_CR2_DS_SHIFT (8) /* Bits 8-11: Data size */
+#define SPI_CR2_DS_MASK (0xf << SPI_CR2_DS_SHIFT)
+# define SPI_CR2_DS_VAL(bits) (((bits)-1) << SPI_CR2_DS_SHIFT)
+# define SPI_CR2_DS_4BIT SPI_CR2_DS_VAL(4)
+# define SPI_CR2_DS_5BIT SPI_CR2_DS_VAL(5)
+# define SPI_CR2_DS_6BIT SPI_CR2_DS_VAL(6)
+# define SPI_CR2_DS_7BIT SPI_CR2_DS_VAL(7)
+# define SPI_CR2_DS_8BIT SPI_CR2_DS_VAL(8)
+# define SPI_CR2_DS_9BIT SPI_CR2_DS_VAL(9)
+# define SPI_CR2_DS_10BIT SPI_CR2_DS_VAL(10)
+# define SPI_CR2_DS_11BIT SPI_CR2_DS_VAL(11)
+# define SPI_CR2_DS_12BIT SPI_CR2_DS_VAL(12)
+# define SPI_CR2_DS_13BIT SPI_CR2_DS_VAL(13)
+# define SPI_CR2_DS_14BIT SPI_CR2_DS_VAL(14)
+# define SPI_CR2_DS_15BIT SPI_CR2_DS_VAL(15)
+# define SPI_CR2_DS_16BIT SPI_CR2_DS_VAL(16)
+#define SPI_CR2_FRXTH (1 << 12) /* Bit 12: FIFO reception threshold */
+#define SPI_CR2_LDMARX (1 << 13) /* Bit 13: Last DMA transfer for receptione */
+#define SPI_CR2_LDMATX (1 << 14) /* Bit 14: Last DMA transfer for transmission */
+
+/* SPI status register */
+
+#define SPI_SR_RXNE (1 << 0) /* Bit 0: Receive buffer not empty */
+#define SPI_SR_TXE (1 << 1) /* Bit 1: Transmit buffer empty */
+#define SPI_SR_CHSIDE (1 << 2) /* Bit 2: Channel side (i2s) */
+#define SPI_SR_UDR (1 << 3) /* Bit 3: Underrun flag (i2s) */
+#define SPI_SR_CRCERR (1 << 4) /* Bit 4: CRC error flag */
+#define SPI_SR_MODF (1 << 5) /* Bit 5: Mode fault */
+#define SPI_SR_OVR (1 << 6) /* Bit 6: Overrun flag */
+#define SPI_SR_BSY (1 << 7) /* Bit 7: Busy flag */
+#define SPI_SR_FRE (1 << 8) /* Bit 8: Frame format error */
+#define SPI_SR_FRLVL_SHIFT (9) /* Bits 9-10: FIFO reception level */
+#define SPI_SR_FRLVL_MASK (0x3 << SPI_SR_FRLVL_SHIFT)
+# define SPI_SR_FRLVL_EMPTY (0 << SPI_SR_FRLVL_SHIFT) /* FIFO empty */
+# define SPI_SR_FRLVL_QUARTER (1 << SPI_SR_FRLVL_SHIFT) /* 1/4 FIFO */
+# define SPI_SR_FRLVL_HALF (2 << SPI_SR_FRLVL_SHIFT) /* 1/2 FIFO */
+# define SPI_SR_FRLVL_FULL (3 << SPI_SR_FRLVL_SHIFT) /* FIFO full */
+#define SPI_SR_FTLVL_SHIFT (11) /* Bits 11-12: FIFO transmission level */
+#define SPI_SR_FTLVL_MASK (0x3 << SPI_SR_FTLVL_SHIFT)
+# define SPI_SR_FTLVL_EMPTY (0 << SPI_SR_FTLVL_SHIFT) /* FIFO empty */
+# define SPI_SR_FTLVL_QUARTER (1 << SPI_SR_FTLVL_SHIFT) /* 1/4 FIFO */
+# define SPI_SR_FTLVL_HALF (2 << SPI_SR_FTLVL_SHIFT) /* 1/2 FIFO */
+# define SPI_SR_FTLVL_FULL (3 << SPI_SR_FTLVL_SHIFT) /* FIFO full */
+
+/* I2S configuration register */
+
+#define SPI_I2SCFGR_CHLEN (1 << 0) /* Bit 0: Channel length (number of bits per audio channel) */
+#define SPI_I2SCFGR_DATLEN_SHIFT (1) /* Bit 1-2: Data length to be transferred */
+#define SPI_I2SCFGR_DATLEN_MASK (3 << SPI_I2SCFGR_DATLEN_SHIFT)
+# define SPI_I2SCFGR_DATLEN_16BIT (0 << SPI_I2SCFGR_DATLEN_SHIFT) /* 00: 16-bit data length */
+# define SPI_I2SCFGR_DATLEN_8BIT (1 << SPI_I2SCFGR_DATLEN_SHIFT) /* 01: 24-bit data length */
+# define SPI_I2SCFGR_DATLEN_32BIT (2 << SPI_I2SCFGR_DATLEN_SHIFT) /* 10: 32-bit data length */
+#define SPI_I2SCFGR_CKPOL (1 << 3) /* Bit 3: Steady state clock polarity */
+#define SPI_I2SCFGR_I2SSTD_SHIFT (4) /* Bit 4-5: I2S standard selection */
+#define SPI_I2SCFGR_I2SSTD_MASK (3 << SPI_I2SCFGR_I2SSTD_SHIFT)
+# define SPI_I2SCFGR_I2SSTD_PHILLIPS (00 << SPI_I2SCFGR_I2SSTD_SHIFT) /* 00: I2S Phillips standard. */
+# define SPI_I2SCFGR_I2SSTD_MSB (1 << SPI_I2SCFGR_I2SSTD_SHIFT) /* 01: MSB justified standard (left justified) */
+# define SPI_I2SCFGR_I2SSTD_LSB (2 << SPI_I2SCFGR_I2SSTD_SHIFT) /* 10: LSB justified standard (right justified) */
+# define SPI_I2SCFGR_I2SSTD_PCM (3 << SPI_I2SCFGR_I2SSTD_SHIFT) /* 11: PCM standard */
+#define SPI_I2SCFGR_PCMSYNC (1 << 7) /* Bit 7: PCM frame synchronization */
+#define SPI_I2SCFGR_I2SCFG_SHIFT (8) /* Bit 8-9: I2S configuration mode */
+#define SPI_I2SCFGR_I2SCFG_MASK (3 << SPI_I2SCFGR_I2SCFG_SHIFT)
+# define SPI_I2SCFGR_I2SCFG_STX (0 << SPI_I2SCFGR_I2SCFG_SHIFT) /* 00: Slave - transmit */
+# define SPI_I2SCFGR_I2SCFG_SRX (1 << SPI_I2SCFGR_I2SCFG_SHIFT) /* 01: Slave - receive */
+# define SPI_I2SCFGR_I2SCFG_MTX (2 << SPI_I2SCFGR_I2SCFG_SHIFT) /* 10: Master - transmit */
+# define SPI_I2SCFGR_I2SCFG_MRX (3 << SPI_I2SCFGR_I2SCFG_SHIFT) /* 11: Master - receive */
+#define SPI_I2SCFGR_I2SE (1 << 10) /* Bit 10: I2S Enable */
+#define SPI_I2SCFGR_I2SMOD (1 << 11) /* Bit 11: I2S mode selection */
+#define SPI_I2SCFGR_ASTRTEN (1 << 12) /* Bit 12: Asynchronous start enable */
+
+/* I2S prescaler register */
+
+#define SPI_I2SPR_I2SDIV_SHIFT (0) /* Bit 0-7: I2S Linear prescaler */
+#define SPI_I2SPR_I2SDIV_MASK (0xff << SPI_I2SPR_I2SDIV_SHIFT)
+#define SPI_I2SPR_ODD (1 << 8) /* Bit 8: Odd factor for the prescaler */
+#define SPI_I2SPR_MCKOE (1 << 9) /* Bit 9: Master clock output enable */
+
+#endif /* __ARCH_ARM_STC_STM32F7_CHIP_STM32_SPI_H */
diff --git a/arch/arm/src/stm32f7/stm32_dma.c b/arch/arm/src/stm32f7/stm32_dma.c
index eab3412fbeed53a945f155367b44121cadd1607a..cddacbc1157d8399d7438b80593335f6a82128ca 100644
--- a/arch/arm/src/stm32f7/stm32_dma.c
+++ b/arch/arm/src/stm32f7/stm32_dma.c
@@ -606,7 +606,7 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
uint32_t regoffset;
uint32_t regval;
- dmadbg("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n",
+ dmaerr("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n",
paddr, maddr, ntransfers, scr);
#ifdef CONFIG_STM32_DMACAPABLE
@@ -871,7 +871,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
uint32_t transfer_size, burst_length;
uint32_t mend;
- dmavdbg("stm32_dmacapable: 0x%08x/%u 0x%08x\n", maddr, count, ccr);
+ dmainfo("stm32_dmacapable: 0x%08x/%u 0x%08x\n", maddr, count, ccr);
/* Verify that the address conforms to the memory transfer size.
* Transfers to/from memory performed by the DMA controller are
@@ -901,13 +901,13 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
break;
default:
- dmavdbg("stm32_dmacapable: bad transfer size in CCR\n");
+ dmainfo("stm32_dmacapable: bad transfer size in CCR\n");
return false;
}
if ((maddr & (transfer_size - 1)) != 0)
{
- dmavdbg("stm32_dmacapable: transfer unaligned\n");
+ dmainfo("stm32_dmacapable: transfer unaligned\n");
return false;
}
@@ -939,13 +939,13 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
break;
default:
- dmavdbg("stm32_dmacapable: bad burst size in CCR\n");
+ dmainfo("stm32_dmacapable: bad burst size in CCR\n");
return false;
}
if ((maddr & (burst_length - 1)) != 0)
{
- dmavdbg("stm32_dmacapable: burst crosses 1KiB\n");
+ dmainfo("stm32_dmacapable: burst crosses 1KiB\n");
return false;
}
}
@@ -954,7 +954,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
if ((maddr & STM32_REGION_MASK) != (mend & STM32_REGION_MASK))
{
- dmavdbg("stm32_dmacapable: transfer crosses memory region\n");
+ dmainfo("stm32_dmacapable: transfer crosses memory region\n");
return false;
}
@@ -975,7 +975,7 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
if (maddr >= STM32_CCMRAM_BASE &&
(maddr - STM32_CCMRAM_BASE) < 65536)
{
- dmavdbg("stm32_dmacapable: transfer targets CCMRAM\n");
+ dmainfo("stm32_dmacapable: transfer targets CCMRAM\n");
return false;
}
break;
@@ -983,11 +983,11 @@ bool stm32_dmacapable(uint32_t maddr, uint32_t count, uint32_t ccr)
default:
/* Everything else is unsupported by DMA */
- dmavdbg("stm32_dmacapable: transfer targets unknown/unsupported region\n");
+ dmainfo("stm32_dmacapable: transfer targets unknown/unsupported region\n");
return false;
}
- dmavdbg("stm32_dmacapable: transfer OK\n");
+ dmainfo("stm32_dmacapable: transfer OK\n");
return true;
}
#endif
@@ -1040,15 +1040,15 @@ void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
struct stm32_dma_s *dmast = (struct stm32_dma_s *)handle;
uint32_t dmabase = DMA_BASE(dmast->base);
- dmadbg("DMA Registers: %s\n", msg);
- dmadbg(" LISR[%08x]: %08x\n", dmabase + STM32_DMA_LISR_OFFSET, regs->lisr);
- dmadbg(" HISR[%08x]: %08x\n", dmabase + STM32_DMA_HISR_OFFSET, regs->hisr);
- dmadbg(" SCR[%08x]: %08x\n", dmast->base + STM32_DMA_SCR_OFFSET, regs->scr);
- dmadbg(" SNDTR[%08x]: %08x\n", dmast->base + STM32_DMA_SNDTR_OFFSET, regs->sndtr);
- dmadbg(" SPAR[%08x]: %08x\n", dmast->base + STM32_DMA_SPAR_OFFSET, regs->spar);
- dmadbg(" SM0AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM0AR_OFFSET, regs->sm0ar);
- dmadbg(" SM1AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM1AR_OFFSET, regs->sm1ar);
- dmadbg(" SFCR[%08x]: %08x\n", dmast->base + STM32_DMA_SFCR_OFFSET, regs->sfcr);
+ dmaerr("DMA Registers: %s\n", msg);
+ dmaerr(" LISR[%08x]: %08x\n", dmabase + STM32_DMA_LISR_OFFSET, regs->lisr);
+ dmaerr(" HISR[%08x]: %08x\n", dmabase + STM32_DMA_HISR_OFFSET, regs->hisr);
+ dmaerr(" SCR[%08x]: %08x\n", dmast->base + STM32_DMA_SCR_OFFSET, regs->scr);
+ dmaerr(" SNDTR[%08x]: %08x\n", dmast->base + STM32_DMA_SNDTR_OFFSET, regs->sndtr);
+ dmaerr(" SPAR[%08x]: %08x\n", dmast->base + STM32_DMA_SPAR_OFFSET, regs->spar);
+ dmaerr(" SM0AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM0AR_OFFSET, regs->sm0ar);
+ dmaerr(" SM1AR[%08x]: %08x\n", dmast->base + STM32_DMA_SM1AR_OFFSET, regs->sm1ar);
+ dmaerr(" SFCR[%08x]: %08x\n", dmast->base + STM32_DMA_SFCR_OFFSET, regs->sfcr);
}
#endif
diff --git a/arch/arm/src/stm32f7/stm32_dumpgpio.c b/arch/arm/src/stm32f7/stm32_dumpgpio.c
index 24429b01e2045a3b28ca6223a989a9b823098135..a826720bbc4232f1758605ef4b48cb23bcd0ba07 100644
--- a/arch/arm/src/stm32f7/stm32_dumpgpio.c
+++ b/arch/arm/src/stm32f7/stm32_dumpgpio.c
@@ -51,7 +51,7 @@
#include "stm32_gpio.h"
#include "stm32_rcc.h"
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Content of this file requires verification before it is used with other
* families
@@ -65,7 +65,7 @@
****************************************************************************/
/* Port letters for prettier debug output */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static const char g_portchar[STM32F7_NGPIO] =
{
#if STM32F7_NGPIO > 11
@@ -127,27 +127,27 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg)
DEBUGASSERT(port < STM32F7_NGPIO);
- lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
+ llerr("GPIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg);
if ((getreg32(STM32_RCC_AHB1ENR) & RCC_AHB1ENR_GPIOEN(port)) != 0)
{
- lldbg(" MODE: %08x OTYPE: %04x OSPEED: %08x PUPDR: %08x\n",
+ llerr(" MODE: %08x OTYPE: %04x OSPEED: %08x PUPDR: %08x\n",
getreg32(base + STM32_GPIO_MODER_OFFSET),
getreg32(base + STM32_GPIO_OTYPER_OFFSET),
getreg32(base + STM32_GPIO_OSPEED_OFFSET),
getreg32(base + STM32_GPIO_PUPDR_OFFSET));
- lldbg(" IDR: %04x ODR: %04x LCKR: %05x\n",
+ llerr(" IDR: %04x ODR: %04x LCKR: %05x\n",
getreg32(base + STM32_GPIO_IDR_OFFSET),
getreg32(base + STM32_GPIO_ODR_OFFSET),
getreg32(base + STM32_GPIO_LCKR_OFFSET));
- lldbg(" AFRH: %08x AFRL: %08x\n",
+ llerr(" AFRH: %08x AFRL: %08x\n",
getreg32(base + STM32_GPIO_AFRH_OFFSET),
getreg32(base + STM32_GPIO_AFRL_OFFSET));
}
else
{
- lldbg(" GPIO%c not enabled: AHB1ENR: %08x\n",
+ llerr(" GPIO%c not enabled: AHB1ENR: %08x\n",
g_portchar[port], getreg32(STM32_RCC_AHB1ENR));
}
@@ -156,4 +156,4 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg)
}
#endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
diff --git a/arch/arm/src/stm32f7/stm32_ethernet.c b/arch/arm/src/stm32f7/stm32_ethernet.c
index 4e6664ade1b2d401cbf3cc4ad43d43d4c3d25f23..4845e564d57a16103257360df53efed34d046250 100644
--- a/arch/arm/src/stm32f7/stm32_ethernet.c
+++ b/arch/arm/src/stm32f7/stm32_ethernet.c
@@ -263,7 +263,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_STM32F7_ETHMAC_REGDEBUG
#endif
@@ -664,7 +664,7 @@ static struct stm32_ethmac_s g_stm32ethmac[STM32F7_NETHERNET];
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_STM32F7_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32F7_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t stm32_getreg(uint32_t addr);
static void stm32_putreg(uint32_t val, uint32_t addr);
static void stm32_checksetup(void);
@@ -795,7 +795,7 @@ static int stm32_ethconfig(struct stm32_ethmac_s *priv);
*
****************************************************************************/
-#if defined(CONFIG_STM32F7_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32F7_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t stm32_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -816,7 +816,7 @@ static uint32_t stm32_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -833,7 +833,7 @@ static uint32_t stm32_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -845,7 +845,7 @@ static uint32_t stm32_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@@ -867,12 +867,12 @@ static uint32_t stm32_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_STM32F7_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32F7_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void stm32_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, val);
+ llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@@ -894,7 +894,7 @@ static void stm32_putreg(uint32_t val, uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_STM32F7_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_STM32F7_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void stm32_checksetup(void)
{
}
@@ -1060,7 +1060,7 @@ static int stm32_transmit(struct stm32_ethmac_s *priv)
txdesc = priv->txhead;
txfirst = txdesc;
- nllvdbg("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
+ nllinfo("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
priv->dev.d_len, priv->dev.d_buf, txdesc, txdesc->tdes0);
DEBUGASSERT(txdesc && (txdesc->tdes0 & ETH_TDES0_OWN) == 0);
@@ -1082,7 +1082,7 @@ static int stm32_transmit(struct stm32_ethmac_s *priv)
bufcount = (priv->dev.d_len + (ALIGNED_BUFSIZE-1)) / ALIGNED_BUFSIZE;
lastsize = priv->dev.d_len - (bufcount - 1) * ALIGNED_BUFSIZE;
- nllvdbg("bufcount: %d lastsize: %d\n", bufcount, lastsize);
+ nllinfo("bufcount: %d lastsize: %d\n", bufcount, lastsize);
/* Set the first segment bit in the first TX descriptor */
@@ -1209,7 +1209,7 @@ static int stm32_transmit(struct stm32_ethmac_s *priv)
priv->inflight++;
- nllvdbg("txhead: %p txtail: %p inflight: %d\n",
+ nllinfo("txhead: %p txtail: %p inflight: %d\n",
priv->txhead, priv->txtail, priv->inflight);
/* If all TX descriptors are in-flight, then we have to disable receive interrupts
@@ -1508,7 +1508,7 @@ static void stm32_freesegment(struct stm32_ethmac_s *priv,
struct eth_rxdesc_s *rxdesc;
int i;
- nllvdbg("rxfirst: %p segments: %d\n", rxfirst, segments);
+ nllinfo("rxfirst: %p segments: %d\n", rxfirst, segments);
/* Give the freed RX buffers back to the Ethernet MAC to be refilled */
@@ -1580,7 +1580,7 @@ static int stm32_recvframe(struct stm32_ethmac_s *priv)
uint8_t *buffer;
int i;
- nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+ nllinfo("rxhead: %p rxcurr: %p segments: %d\n",
priv->rxhead, priv->rxcurr, priv->segments);
/* Check if there are free buffers. We cannot receive new frames in this
@@ -1589,7 +1589,7 @@ static int stm32_recvframe(struct stm32_ethmac_s *priv)
if (!stm32_isfreebuffer(priv))
{
- nlldbg("No free buffers\n");
+ nllerr("No free buffers\n");
return -ENOMEM;
}
@@ -1652,7 +1652,7 @@ static int stm32_recvframe(struct stm32_ethmac_s *priv)
rxcurr = priv->rxcurr;
}
- nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+ nllinfo("rxhead: %p rxcurr: %p segments: %d\n",
priv->rxhead, priv->rxcurr, priv->segments);
/* Check if any errors are reported in the frame */
@@ -1705,7 +1705,7 @@ static int stm32_recvframe(struct stm32_ethmac_s *priv)
arch_invalidate_dcache((uintptr_t)dev->d_buf,
(uintptr_t)dev->d_buf + dev->d_len);
- nllvdbg("rxhead: %p d_buf: %p d_len: %d\n",
+ nllinfo("rxhead: %p d_buf: %p d_len: %d\n",
priv->rxhead, dev->d_buf, dev->d_len);
/* Return success */
@@ -1718,7 +1718,7 @@ static int stm32_recvframe(struct stm32_ethmac_s *priv)
* scanning logic, and continue scanning with the next frame.
*/
- nlldbg("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
+ nllerr("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
stm32_freesegment(priv, rxcurr, priv->segments);
}
}
@@ -1739,7 +1739,7 @@ static int stm32_recvframe(struct stm32_ethmac_s *priv)
priv->rxhead = rxdesc;
- nllvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+ nllinfo("rxhead: %p rxcurr: %p segments: %d\n",
priv->rxhead, priv->rxcurr, priv->segments);
return -EAGAIN;
@@ -1784,7 +1784,7 @@ static void stm32_receive(struct stm32_ethmac_s *priv)
if (dev->d_len > CONFIG_NET_ETH_MTU)
{
- nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+ nllerr("DROPPED: Too big: %d\n", dev->d_len);
continue;
}
@@ -1799,7 +1799,7 @@ static void stm32_receive(struct stm32_ethmac_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
/* Handle ARP on input then give the IPv4 packet to the network
* layer
@@ -1839,7 +1839,7 @@ static void stm32_receive(struct stm32_ethmac_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
/* Give the IPv6 packet to the network layer */
@@ -1876,7 +1876,7 @@ static void stm32_receive(struct stm32_ethmac_s *priv)
#ifdef CONFIG_NET_ARP
if (BUF->type == htons(ETHTYPE_ARP))
{
- nllvdbg("ARP frame\n");
+ nllinfo("ARP frame\n");
/* Handle ARP packet */
@@ -1894,7 +1894,7 @@ static void stm32_receive(struct stm32_ethmac_s *priv)
else
#endif
{
- nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+ nllerr("DROPPED: Unknown type: %04x\n", BUF->type);
}
/* We are finished with the RX buffer. NOTE: If the buffer is
@@ -1935,7 +1935,7 @@ static void stm32_freeframe(struct stm32_ethmac_s *priv)
struct eth_txdesc_s *txdesc;
int i;
- nllvdbg("txhead: %p txtail: %p inflight: %d\n",
+ nllinfo("txhead: %p txtail: %p inflight: %d\n",
priv->txhead, priv->txtail, priv->inflight);
/* Scan for "in-flight" descriptors owned by the CPU */
@@ -1956,7 +1956,7 @@ static void stm32_freeframe(struct stm32_ethmac_s *priv)
* TX descriptors.
*/
- nllvdbg("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
+ nllinfo("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
txdesc, txdesc->tdes0, txdesc->tdes2, txdesc->tdes3);
DEBUGASSERT(txdesc->tdes2 != 0);
@@ -2021,7 +2021,7 @@ static void stm32_freeframe(struct stm32_ethmac_s *priv)
priv->txtail = txdesc;
- nllvdbg("txhead: %p txtail: %p inflight: %d\n",
+ nllinfo("txhead: %p txtail: %p inflight: %d\n",
priv->txhead, priv->txtail, priv->inflight);
}
}
@@ -2158,7 +2158,7 @@ static inline void stm32_interrupt_process(struct stm32_ethmac_s *priv)
{
/* Just let the user know what happened */
- nlldbg("Abormal event(s): %08x\n", dmasr);
+ nllerr("Abormal event(s): %08x\n", dmasr);
/* Clear all pending abnormal events */
@@ -2362,7 +2362,7 @@ static void stm32_txtimeout_expiry(int argc, uint32_t arg, ...)
{
struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)arg;
- nlldbg("Timeout!\n");
+ nllerr("Timeout!\n");
#ifdef CONFIG_NET_NOINTS
/* Disable further Ethernet interrupts. This will prevent some race
@@ -2563,12 +2563,12 @@ static int stm32_ifup(struct net_driver_s *dev)
int ret;
#ifdef CONFIG_NET_IPv4
- nvdbg("Bringing up: %d.%d.%d.%d\n",
+ ninfo("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
#endif
#ifdef CONFIG_NET_IPv6
- nvdbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+ ninfo("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
@@ -2616,7 +2616,7 @@ static int stm32_ifdown(struct net_driver_s *dev)
struct stm32_ethmac_s *priv = (struct stm32_ethmac_s *)dev->d_private;
irqstate_t flags;
- nvdbg("Taking the network down\n");
+ ninfo("Taking the network down\n");
/* Disable the Ethernet interrupt */
@@ -2661,7 +2661,7 @@ static int stm32_ifdown(struct net_driver_s *dev)
static inline void stm32_txavail_process(struct stm32_ethmac_s *priv)
{
- nvdbg("ifup: %d\n", priv->ifup);
+ ninfo("ifup: %d\n", priv->ifup);
/* Ignore the notification if the interface is not yet up */
@@ -2829,7 +2829,7 @@ static int stm32_addmac(struct net_driver_s *dev, const uint8_t *mac)
uint32_t temp;
uint32_t registeraddress;
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Add the MAC address to the hardware multicast hash table */
@@ -2886,7 +2886,7 @@ static int stm32_rmmac(struct net_driver_s *dev, const uint8_t *mac)
uint32_t temp;
uint32_t registeraddress;
- nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Remove the MAC address to the hardware multicast hash table */
@@ -3267,7 +3267,7 @@ static int stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *val
}
}
- nvdbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
+ ninfo("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
phydevaddr, phyregaddr);
return -ETIMEDOUT;
@@ -3326,7 +3326,7 @@ static int stm32_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t val
}
}
- nvdbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
+ ninfo("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
phydevaddr, phyregaddr, value);
return -ETIMEDOUT;
@@ -3363,7 +3363,7 @@ static inline int stm32_dm9161(struct stm32_ethmac_s *priv)
ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, MII_PHYID1, &phyval);
if (ret < 0)
{
- ndbg("ERROR: Failed to read the PHY ID1: %d\n", ret);
+ nerr("ERROR: Failed to read the PHY ID1: %d\n", ret);
return ret;
}
@@ -3374,14 +3374,14 @@ static inline int stm32_dm9161(struct stm32_ethmac_s *priv)
up_systemreset();
}
- nvdbg("PHY ID1: 0x%04X\n", phyval);
+ ninfo("PHY ID1: 0x%04X\n", phyval);
/* Now check the "DAVICOM Specified Configuration Register (DSCR)", Register 16 */
ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, 16, &phyval);
if (ret < 0)
{
- ndbg("ERROR: Failed to read the PHY Register 0x10: %d\n", ret);
+ nerr("ERROR: Failed to read the PHY Register 0x10: %d\n", ret);
return ret;
}
@@ -3438,7 +3438,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
ret = stm32_phywrite(CONFIG_STM32F7_PHYADDR, MII_MCR, MII_MCR_RESET);
if (ret < 0)
{
- ndbg("ERROR: Failed to reset the PHY: %d\n", ret);
+ nerr("ERROR: Failed to reset the PHY: %d\n", ret);
return ret;
}
up_mdelay(PHY_RESET_DELAY);
@@ -3449,7 +3449,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
ret = stm32_phy_boardinitialize(0);
if (ret < 0)
{
- ndbg("ERROR: Failed to initialize the PHY: %d\n", ret);
+ nerr("ERROR: Failed to initialize the PHY: %d\n", ret);
return ret;
}
#endif
@@ -3474,7 +3474,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, MII_MSR, &phyval);
if (ret < 0)
{
- ndbg("ERROR: Failed to read the PHY MSR: %d\n", ret);
+ nerr("ERROR: Failed to read the PHY MSR: %d\n", ret);
return ret;
}
else if ((phyval & MII_MSR_LINKSTATUS) != 0)
@@ -3485,7 +3485,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
if (timeout >= PHY_RETRY_TIMEOUT)
{
- ndbg("ERROR: Timed out waiting for link status: %04x\n", phyval);
+ nerr("ERROR: Timed out waiting for link status: %04x\n", phyval);
return -ETIMEDOUT;
}
@@ -3494,7 +3494,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
ret = stm32_phywrite(CONFIG_STM32F7_PHYADDR, MII_MCR, MII_MCR_ANENABLE);
if (ret < 0)
{
- ndbg("ERROR: Failed to enable auto-negotiation: %d\n", ret);
+ nerr("ERROR: Failed to enable auto-negotiation: %d\n", ret);
return ret;
}
@@ -3505,7 +3505,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, MII_MSR, &phyval);
if (ret < 0)
{
- ndbg("ERROR: Failed to read the PHY MSR: %d\n", ret);
+ nerr("ERROR: Failed to read the PHY MSR: %d\n", ret);
return ret;
}
else if ((phyval & MII_MSR_ANEGCOMPLETE) != 0)
@@ -3516,7 +3516,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
if (timeout >= PHY_RETRY_TIMEOUT)
{
- ndbg("ERROR: Timed out waiting for auto-negotiation\n");
+ nerr("ERROR: Timed out waiting for auto-negotiation\n");
return -ETIMEDOUT;
}
@@ -3525,13 +3525,13 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
ret = stm32_phyread(CONFIG_STM32F7_PHYADDR, CONFIG_STM32F7_PHYSR, &phyval);
if (ret < 0)
{
- ndbg("ERROR: Failed to read PHY status register\n");
+ nerr("ERROR: Failed to read PHY status register\n");
return ret;
}
/* Remember the selected speed and duplex modes */
- nvdbg("PHYSR[%d]: %04x\n", CONFIG_STM32F7_PHYSR, phyval);
+ ninfo("PHYSR[%d]: %04x\n", CONFIG_STM32F7_PHYSR, phyval);
/* Different PHYs present speed and mode information in different ways. IF
* This CONFIG_STM32F7_PHYSR_ALTCONFIG is selected, this indicates that the PHY
@@ -3543,7 +3543,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
switch (phyval & CONFIG_STM32F7_PHYSR_ALTMODE)
{
default:
- ndbg("ERROR: Unrecognized PHY status setting\n");
+ nerr("ERROR: Unrecognized PHY status setting\n");
case CONFIG_STM32F7_PHYSR_10HD:
priv->fduplex = 0;
@@ -3597,7 +3597,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
ret = stm32_phywrite(CONFIG_STM32F7_PHYADDR, MII_MCR, phyval);
if (ret < 0)
{
- ndbg("ERROR: Failed to write the PHY MCR: %d\n", ret);
+ nerr("ERROR: Failed to write the PHY MCR: %d\n", ret);
return ret;
}
@@ -3613,7 +3613,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
#endif
#endif
- nvdbg("Duplex: %s Speed: %d MBps\n",
+ ninfo("Duplex: %s Speed: %d MBps\n",
priv->fduplex ? "FULL" : "HALF",
priv->mbps100 ? 100 : 10);
@@ -3973,7 +3973,7 @@ static void stm32_macaddress(struct stm32_ethmac_s *priv)
struct net_driver_s *dev = &priv->dev;
uint32_t regval;
- nllvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ nllinfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
@@ -4041,7 +4041,7 @@ static void stm32_ipv6multicast(struct stm32_ethmac_s *priv)
mac[4] = tmp16 & 0xff;
mac[5] = tmp16 >> 8;
- nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
(void)stm32_addmac(dev, mac);
@@ -4179,12 +4179,12 @@ static int stm32_ethconfig(struct stm32_ethmac_s *priv)
/* Reset the Ethernet block */
- nllvdbg("Reset the Ethernet block\n");
+ nllinfo("Reset the Ethernet block\n");
stm32_ethreset(priv);
/* Initialize the PHY */
- nllvdbg("Initialize the PHY\n");
+ nllinfo("Initialize the PHY\n");
ret = stm32_phyinit(priv);
if (ret < 0)
{
@@ -4193,7 +4193,7 @@ static int stm32_ethconfig(struct stm32_ethmac_s *priv)
/* Initialize the MAC and DMA */
- nllvdbg("Initialize the MAC and DMA\n");
+ nllinfo("Initialize the MAC and DMA\n");
ret = stm32_macconfig(priv);
if (ret < 0)
{
@@ -4217,7 +4217,7 @@ static int stm32_ethconfig(struct stm32_ethmac_s *priv)
/* Enable normal MAC operation */
- nllvdbg("Enable normal operation\n");
+ nllinfo("Enable normal operation\n");
return stm32_macenable(priv);
}
@@ -4253,7 +4253,7 @@ int stm32_ethinitialize(int intf)
{
struct stm32_ethmac_s *priv;
- nvdbg("intf: %d\n", intf);
+ ninfo("intf: %d\n", intf);
/* Get the interface structure associated with this interface number. */
diff --git a/arch/arm/src/stm32f7/stm32_gpio.h b/arch/arm/src/stm32f7/stm32_gpio.h
index 7fff5e249984d0598908d038e8d1c72e1f29a77f..e08aac39f779ded5679af4211d71f09f36df143e 100644
--- a/arch/arm/src/stm32f7/stm32_gpio.h
+++ b/arch/arm/src/stm32f7/stm32_gpio.h
@@ -345,7 +345,7 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
*
************************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
int stm32_dumpgpio(uint32_t pinset, const char *msg);
#else
# define stm32_dumpgpio(p,m)
diff --git a/arch/arm/src/stm32f7/stm32_i2c.c b/arch/arm/src/stm32f7/stm32_i2c.c
index 71f39690c4707d0f7569b9c436759dc0969186ab..e1e3c97a925c32ce116f5cf9829588ddb43c0f22 100644
--- a/arch/arm/src/stm32f7/stm32_i2c.c
+++ b/arch/arm/src/stm32f7/stm32_i2c.c
@@ -290,11 +290,11 @@
/* I2C Debugging */
#ifdef CONFIG_DEBUG_I2C
-# define i2cdbg dbg
-# define i2cvdbg vdbg
+# define i2cerr err
+# define i2cinfo info
#else
-# define i2cdbg(x...)
-# define i2cvdbg(x...)
+# define i2cerr(x...)
+# define i2cinfo(x...)
#endif
/* I2C event tracing
@@ -859,7 +859,7 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
- i2cvdbg("intstate: %d elapsed: %d threshold: %d status: 0x%08x\n",
+ i2cinfo("intstate: %d elapsed: %d threshold: %d status: 0x%08x\n",
priv->intstate, elapsed, timeout, priv->status);
/* Set the interrupt state back to IDLE */
@@ -1010,7 +1010,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
* still pending.
*/
- i2cvdbg("Timeout with CR: %04x SR: %04x\n", cr, sr);
+ i2cinfo("Timeout with CR: %04x SR: %04x\n", cr, sr);
}
/************************************************************************************
@@ -1104,7 +1104,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv,
if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
{
- i2cdbg("Trace table overflow\n");
+ i2cerr("Trace table overflow\n");
return;
}
@@ -1145,7 +1145,7 @@ static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
{
- i2cdbg("Trace table overflow\n");
+ i2cerr("Trace table overflow\n");
return;
}
@@ -1372,11 +1372,11 @@ static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv)
*/
if ((priv->flags & I2C_M_NORESTART) || priv->dcnt > 255) {
- i2cdbg("RELOAD enabled: dcnt = %i msgc = %i\n",
+ i2cerr("RELOAD enabled: dcnt = %i msgc = %i\n",
priv->dcnt, priv->msgc);
stm32_i2c_enable_reload(priv);
} else {
- i2cdbg("RELOAD disable: dcnt = %i msgc = %i\n",
+ i2cerr("RELOAD disable: dcnt = %i msgc = %i\n",
priv->dcnt, priv->msgc);
stm32_i2c_disable_reload(priv);
}
@@ -1415,7 +1415,7 @@ static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv)
* START condition using the address and transfer direction data entered.
*/
- i2cdbg("Sending START: dcnt=%i msgc=%i flags=0x%04x\n",
+ i2cerr("Sending START: dcnt=%i msgc=%i flags=0x%04x\n",
priv->dcnt, priv->msgc, priv->flags);
stm32_i2c_modifyreg32(priv, STM32F7_I2C_CR2_OFFSET, 0, I2C_CR2_START);
@@ -1435,7 +1435,7 @@ static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv)
static inline void stm32_i2c_sendstop(FAR struct stm32_i2c_priv_s *priv)
{
- i2cdbg("Sending STOP\n");
+ i2cerr("Sending STOP\n");
stm32_i2c_traceevent(priv, I2CEVENT_WRITE_STOP, 0);
stm32_i2c_modifyreg32(priv, STM32F7_I2C_CR2_OFFSET, 0, I2C_CR2_STOP);
@@ -1494,7 +1494,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
status = stm32_i2c_getreg32(priv, STM32F7_I2C_ISR_OFFSET);
- i2cvdbg("ENTER: status = 0x%08x\n", status);
+ i2cinfo("ENTER: status = 0x%08x\n", status);
/* Update private version of the state */
@@ -1544,7 +1544,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
/* NACK received on first (address) byte: address is invalid */
- i2cvdbg("NACK: Address invalid: dcnt=%i msgc=%i status=0x%08x\n",
+ i2cinfo("NACK: Address invalid: dcnt=%i msgc=%i status=0x%08x\n",
priv->dcnt, priv->msgc, status);
stm32_i2c_traceevent(priv, I2CEVENT_ADDRESS_NACKED, priv->msgv->addr);
@@ -1553,7 +1553,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
{
/* NACK received on regular byte */
- i2cvdbg("NACK: NACK received: dcnt=%i msgc=%i status=0x%08x\n",
+ i2cinfo("NACK: NACK received: dcnt=%i msgc=%i status=0x%08x\n",
priv->dcnt, priv->msgc, status);
stm32_i2c_traceevent(priv, I2CEVENT_ADDRESS_NACKED, priv->msgv->addr);
@@ -1610,7 +1610,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
/* TXIS interrupt occurred, address valid, ready to transmit */
stm32_i2c_traceevent(priv, I2CEVENT_WRITE, 0);
- i2cvdbg("TXIS: ENTER dcnt = %i msgc = %i status 0x%08x\n",
+ i2cinfo("TXIS: ENTER dcnt = %i msgc = %i status 0x%08x\n",
priv->dcnt, priv->msgc, status);
/* The first event after the address byte is sent will be either TXIS
@@ -1621,7 +1621,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
if (priv->astart == true)
{
- i2cvdbg("TXIS: Address Valid\n");
+ i2cinfo("TXIS: Address Valid\n");
stm32_i2c_traceevent(priv, I2CEVENT_ADDRESS_ACKED, priv->msgv->addr);
priv->astart = false;
}
@@ -1634,7 +1634,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
/* Prepare to transmit the current byte */
stm32_i2c_traceevent(priv, I2CEVENT_WRITE_TO_DR, priv->dcnt);
- i2cvdbg("TXIS: Write Data 0x%02x\n", *priv->ptr);
+ i2cinfo("TXIS: Write Data 0x%02x\n", *priv->ptr);
/* Decrement byte counter */
@@ -1670,13 +1670,13 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
{
/* Unsupported state */
- i2cdbg("TXIS: UNSUPPORTED STATE DETECTED, dcnt=%i, status 0x%08x\n",
+ i2cerr("TXIS: UNSUPPORTED STATE DETECTED, dcnt=%i, status 0x%08x\n",
priv->dcnt, status);
stm32_i2c_traceevent(priv, I2CEVENT_WRITE_ERROR, 0);
}
- i2cvdbg("TXIS: EXIT dcnt = %i msgc = %i status 0x%08x\n",
+ i2cinfo("TXIS: EXIT dcnt = %i msgc = %i status 0x%08x\n",
priv->dcnt, priv->msgc, status);
}
@@ -1719,7 +1719,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
*/
stm32_i2c_traceevent(priv, I2CEVENT_READ, 0);
- i2cvdbg("RXNE: ENTER dcnt = %i msgc = %i status 0x%08x\n",
+ i2cinfo("RXNE: ENTER dcnt = %i msgc = %i status 0x%08x\n",
priv->dcnt, priv->msgc, status);
/* If more bytes in the current message */
@@ -1740,7 +1740,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
*priv->ptr = stm32_i2c_getreg(priv, STM32F7_I2C_RXDR_OFFSET);
- i2cvdbg("RXNE: Read Data 0x%02x\n", *priv->ptr);
+ i2cinfo("RXNE: Read Data 0x%02x\n", *priv->ptr);
/* Advance buffer to the next byte in the message */
@@ -1762,7 +1762,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
stm32_i2c_traceevent(priv, I2CEVENT_READ_ERROR, 0);
status = stm32_i2c_getreg(priv, STM32F7_I2C_ISR_OFFSET);
- i2cdbg("RXNE: UNSUPPORTED STATE DETECTED, dcnt=%i, status 0x%08x\n",
+ i2cerr("RXNE: UNSUPPORTED STATE DETECTED, dcnt=%i, status 0x%08x\n",
priv->dcnt, status);
/* Set signals that will terminate ISR and wake waiting thread */
@@ -1772,7 +1772,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
}
- i2cvdbg("RXNE: EXIT dcnt = %i msgc = %i status 0x%08x\n",
+ i2cinfo("RXNE: EXIT dcnt = %i msgc = %i status 0x%08x\n",
priv->dcnt, priv->msgc, status);
}
@@ -1807,7 +1807,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
else if ((status & I2C_ISR_TC) != 0)
{
- i2cvdbg("TC: ENTER dcnt = %i msgc = %i status 0x%08x\n",
+ i2cinfo("TC: ENTER dcnt = %i msgc = %i status 0x%08x\n",
priv->dcnt, priv->msgc, status);
/* Prior message has been sent successfully */
@@ -1818,7 +1818,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
if (priv->msgc > 0) {
- i2cvdbg("TC: RESTART: dcnt=%i, msgc=%i\n",
+ i2cinfo("TC: RESTART: dcnt=%i, msgc=%i\n",
priv->dcnt, priv->msgc);
stm32_i2c_traceevent(priv, I2CEVENT_TC_NO_RESTART, priv->msgc);
@@ -1845,7 +1845,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
* issue a STOP and exit.
*/
- i2cvdbg("TC: STOP: dcnt=%i msgc=%i\n",
+ i2cinfo("TC: STOP: dcnt=%i msgc=%i\n",
priv->dcnt, priv->msgc);
stm32_i2c_traceevent(priv, I2CEVENT_STOP, priv->dcnt);
@@ -1858,7 +1858,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
}
- i2cvdbg("TC: EXIT dcnt = %i msgc = %i status 0x%08x\n",
+ i2cinfo("TC: EXIT dcnt = %i msgc = %i status 0x%08x\n",
priv->dcnt, priv->msgc, status);
}
@@ -1901,7 +1901,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
else if ((status & I2C_ISR_TCR) != 0)
{
- i2cvdbg("TCR: ENTER dcnt = %i msgc = %i status 0x%08x\n",
+ i2cinfo("TCR: ENTER dcnt = %i msgc = %i status 0x%08x\n",
priv->dcnt, priv->msgc, status);
/* If no more bytes in the current message to transfer */
@@ -1926,7 +1926,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
* TC event fires next time */
if (priv->msgc == 0) {
- i2cvdbg("TCR: DISABLE RELOAD: dcnt = %i msgc = %i\n",
+ i2cinfo("TCR: DISABLE RELOAD: dcnt = %i msgc = %i\n",
priv->dcnt, priv->msgc);
stm32_i2c_disable_reload(priv);
@@ -1934,7 +1934,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
/* Update NBYTES with length of current message */
- i2cvdbg("TCR: NEXT MSG dcnt = %i msgc = %i\n",
+ i2cinfo("TCR: NEXT MSG dcnt = %i msgc = %i\n",
priv->dcnt, priv->msgc);
stm32_i2c_set_bytes_to_transfer(priv, priv->dcnt);
@@ -1948,7 +1948,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
if (priv->dcnt > 255) {
- i2cvdbg("TCR: ENABLE RELOAD: NBYTES = 255 dcnt = %i msgc = %i\n",
+ i2cinfo("TCR: ENABLE RELOAD: NBYTES = 255 dcnt = %i msgc = %i\n",
priv->dcnt, priv->msgc);
/* More than 255 bytes to transfer so the RELOAD bit is
@@ -1977,7 +1977,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
* next message or send a STOP condition and exit the ISR.
*/
- i2cvdbg("TCR: DISABLE RELOAD: NBYTES = dcnt = %i msgc = %i\n",
+ i2cinfo("TCR: DISABLE RELOAD: NBYTES = dcnt = %i msgc = %i\n",
priv->dcnt, priv->msgc);
stm32_i2c_disable_reload(priv);
@@ -1986,7 +1986,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
}
- i2cvdbg("TCR: EXIT dcnt = %i msgc = %i status 0x%08x\n",
+ i2cinfo("TCR: EXIT dcnt = %i msgc = %i status 0x%08x\n",
priv->dcnt, priv->msgc, status);
}
}
@@ -2000,7 +2000,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
else if (priv->dcnt == -1 && priv->msgc == 0)
{
status = stm32_i2c_getreg(priv, STM32F7_I2C_ISR_OFFSET);
- i2cdbg("EMPTY CALL: Stopping ISR: status 0x%08x\n", status);
+ i2cerr("EMPTY CALL: Stopping ISR: status 0x%08x\n", status);
stm32_i2c_traceevent(priv, I2CEVENT_ISR_EMPTY_CALL, 0);
}
@@ -2023,7 +2023,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
status = stm32_i2c_getreg(priv, STM32F7_I2C_ISR_OFFSET);
- i2cdbg("INVALID STATE DETECTED, status 0x%08x\n", status);
+ i2cerr("INVALID STATE DETECTED, status 0x%08x\n", status);
/* set condition to terminate ISR and wake waiting thread */
@@ -2044,7 +2044,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
if (priv->dcnt == -1 && priv->msgc == 0)
{
- i2cvdbg("MSG: Shutting down I2C ISR\n");
+ i2cinfo("MSG: Shutting down I2C ISR\n");
stm32_i2c_traceevent(priv, I2CEVENT_ISR_SHUTDOWN, 0);
@@ -2084,7 +2084,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
}
status = stm32_i2c_getreg32(priv, STM32F7_I2C_ISR_OFFSET);
- i2cvdbg("EXIT: status = 0x%08x\n", status);
+ i2cinfo("EXIT: status = 0x%08x\n", status);
return OK;
}
@@ -2331,16 +2331,16 @@ static int stm32_i2c_process(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
/* Connection timed out */
errval = ETIMEDOUT;
- i2cdbg("Waitdone timed out: CR1: 0x%08x CR2: 0x%08x status: 0x%08x\n",
+ i2cerr("Waitdone timed out: CR1: 0x%08x CR2: 0x%08x status: 0x%08x\n",
cr1, cr2,status);
}
else
{
- i2cdbg("Waitdone success: CR1: 0x%08x CR2: 0x%08x status: 0x%08x\n",
+ i2cerr("Waitdone success: CR1: 0x%08x CR2: 0x%08x status: 0x%08x\n",
cr1, cr2,status );
}
- i2cdbg("priv->status: 0x%08x\n", priv->status);
+ i2cerr("priv->status: 0x%08x\n", priv->status);
/* Check for error status conditions */
@@ -2358,7 +2358,7 @@ static int stm32_i2c_process(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
{
/* Bus Error, ignore it because of errata (revision A,Z) */
- i2cdbg("I2C: Bus Error\n");
+ i2cerr("I2C: Bus Error\n");
/* errval = EIO; */
}
@@ -2366,7 +2366,7 @@ static int stm32_i2c_process(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
{
/* Arbitration Lost (master mode) */
- i2cdbg("I2C: Arbitration Lost\n");
+ i2cerr("I2C: Arbitration Lost\n");
errval = EAGAIN;
}
@@ -2374,21 +2374,21 @@ static int stm32_i2c_process(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
{
/* Overrun/Underrun */
- i2cdbg("I2C: Overrun/Underrun\n");
+ i2cerr("I2C: Overrun/Underrun\n");
errval = EIO;
}
else if (status & I2C_INT_PECERR)
{
/* PEC Error in reception (SMBus Only) */
- i2cdbg("I2C: PEC Error\n");
+ i2cerr("I2C: PEC Error\n");
errval = EPROTO;
}
else if (status & I2C_INT_TIMEOUT)
{
/* Timeout or Tlow Error (SMBus Only) */
- i2cdbg("I2C: Timeout / Tlow Error\n");
+ i2cerr("I2C: Timeout / Tlow Error\n");
errval = ETIME;
}
else if (status & I2C_INT_NACK)
@@ -2397,12 +2397,12 @@ static int stm32_i2c_process(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
if (priv->astart == TRUE)
{
- i2cdbg("I2C: Address NACK\n");
+ i2cerr("I2C: Address NACK\n");
errval = EADDRNOTAVAIL;
}
else
{
- i2cdbg("I2C: Data NACK\n");
+ i2cerr("I2C: Data NACK\n");
errval = ECOMM;
}
}
@@ -2410,7 +2410,7 @@ static int stm32_i2c_process(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
{
/* Unrecognized error */
- i2cdbg("I2C: Unrecognized Error");
+ i2cerr("I2C: Unrecognized Error");
errval = EINTR;
}
}
@@ -2442,7 +2442,7 @@ static int stm32_i2c_process(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
{
if((clock_systimer() - start) > timeout)
{
- i2cdbg("I2C: Bus busy");
+ i2cerr("I2C: Bus busy");
errval = EBUSY;
break;
}
diff --git a/arch/arm/src/stm32f7/stm32_irq.c b/arch/arm/src/stm32f7/stm32_irq.c
index a52e3e56d934e02eb24a8b92f79d32bb1960e1b4..7a541270de135bc7454e1e29ef4b7b4b615889b0 100644
--- a/arch/arm/src/stm32f7/stm32_irq.c
+++ b/arch/arm/src/stm32f7/stm32_irq.c
@@ -116,50 +116,50 @@ static void stm32_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" INTCTRL: %08x VECTAB: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+ llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
- lldbg(" IRQ ENABLE: %08x %08x %08x\n",
+ llerr(" IRQ ENABLE: %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
- lldbg(" SYSH_PRIO: %08x %08x %08x\n",
+ llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
#if NR_INTERRUPTS > 15
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
#endif
#if NR_INTERRUPTS > 31
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
#endif
#if NR_INTERRUPTS > 47
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
#endif
#if NR_INTERRUPTS > 63
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
#endif
#if NR_INTERRUPTS > 79
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
#endif
#if NR_INTERRUPTS > 95
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
#endif
@@ -173,7 +173,7 @@ static void stm32_dumpnvic(const char *msg, int irq)
#endif
/****************************************************************************
- * Name: stm32_nmi, stm32_busfault, stm32_usagefault, stm32_pendsv, stm32_dbgmonitor,
+ * Name: stm32_nmi, stm32_busfault, stm32_usagefault, stm32_pendsv, stm32_errmonitor,
* stm32_pendsv, stm32_reserved
*
* Description:
@@ -183,11 +183,11 @@ static void stm32_dumpnvic(const char *msg, int irq)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int stm32_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -195,7 +195,7 @@ static int stm32_nmi(int irq, FAR void *context)
static int stm32_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
+ err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -203,7 +203,7 @@ static int stm32_busfault(int irq, FAR void *context)
static int stm32_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
+ err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -211,15 +211,15 @@ static int stm32_usagefault(int irq, FAR void *context)
static int stm32_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
-static int stm32_dbgmonitor(int irq, FAR void *context)
+static int stm32_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Debug Monitor received\n");
+ err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@@ -227,7 +227,7 @@ static int stm32_dbgmonitor(int irq, FAR void *context)
static int stm32_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -490,7 +490,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(STM32_IRQ_NMI, stm32_nmi);
#ifndef CONFIG_ARM_MPU
irq_attach(STM32_IRQ_MEMFAULT, up_memfault);
@@ -498,7 +498,7 @@ void up_irqinitialize(void)
irq_attach(STM32_IRQ_BUSFAULT, stm32_busfault);
irq_attach(STM32_IRQ_USAGEFAULT, stm32_usagefault);
irq_attach(STM32_IRQ_PENDSV, stm32_pendsv);
- irq_attach(STM32_IRQ_DBGMONITOR, stm32_dbgmonitor);
+ irq_attach(STM32_IRQ_DBGMONITOR, stm32_errmonitor);
irq_attach(STM32_IRQ_RESERVED, stm32_reserved);
#endif
diff --git a/arch/arm/src/stm32f7/stm32_procfs_dtcm.c b/arch/arm/src/stm32f7/stm32_procfs_dtcm.c
index af6f467fef5cba94bea1fc75d50833e4a0249b80..30c54f2387dd8e35ac507b0394b1069e6c6ff7b3 100644
--- a/arch/arm/src/stm32f7/stm32_procfs_dtcm.c
+++ b/arch/arm/src/stm32f7/stm32_procfs_dtcm.c
@@ -147,7 +147,7 @@ static int dtcm_open(FAR struct file *filep, FAR const char *relpath,
{
FAR struct dtcm_file_s *priv;
- fvdbg("Open '%s'\n", relpath);
+ finfo("Open '%s'\n", relpath);
/* PROCFS is read-only. Any attempt to open with any kind of write
* access is not permitted.
@@ -157,7 +157,7 @@ static int dtcm_open(FAR struct file *filep, FAR const char *relpath,
if ((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0)
{
- fdbg("ERROR: Only O_RDONLY supported\n");
+ ferr("ERROR: Only O_RDONLY supported\n");
return -EACCES;
}
@@ -165,7 +165,7 @@ static int dtcm_open(FAR struct file *filep, FAR const char *relpath,
if (strcmp(relpath, "dtcm") != 0)
{
- fdbg("ERROR: relpath is '%s'\n", relpath);
+ ferr("ERROR: relpath is '%s'\n", relpath);
return -ENOENT;
}
@@ -174,7 +174,7 @@ static int dtcm_open(FAR struct file *filep, FAR const char *relpath,
priv = (FAR struct dtcm_file_s *)kmm_zalloc(sizeof(struct dtcm_file_s));
if (!priv)
{
- fdbg("ERROR: Failed to allocate file attributes\n");
+ ferr("ERROR: Failed to allocate file attributes\n");
return -ENOMEM;
}
@@ -219,7 +219,7 @@ static ssize_t dtcm_read(FAR struct file *filep, FAR char *buffer,
struct mallinfo mem;
off_t offset = filep->f_pos;
- fvdbg("buffer=%p buflen=%d\n", buffer, (int)buflen);
+ finfo("buffer=%p buflen=%d\n", buffer, (int)buflen);
/* Recover our private data from the struct file instance */
@@ -278,7 +278,7 @@ static int dtcm_dup(FAR const struct file *oldp, FAR struct file *newp)
FAR struct dtcm_file_s *oldpriv;
FAR struct dtcm_file_s *newpriv;
- fvdbg("Dup %p->%p\n", oldp, newp);
+ finfo("Dup %p->%p\n", oldp, newp);
/* Recover our private data from the old struct file instance */
@@ -290,7 +290,7 @@ static int dtcm_dup(FAR const struct file *oldp, FAR struct file *newp)
newpriv = (FAR struct dtcm_file_s *)kmm_zalloc(sizeof(struct dtcm_file_s));
if (!newpriv)
{
- fdbg("ERROR: Failed to allocate file attributes\n");
+ ferr("ERROR: Failed to allocate file attributes\n");
return -ENOMEM;
}
@@ -308,7 +308,7 @@ static int dtcm_stat(const char *relpath, struct stat *buf)
{
if (strcmp(relpath, "dtcm") != 0)
{
- fdbg("ERROR: relpath is '%s'\n", relpath);
+ ferr("ERROR: relpath is '%s'\n", relpath);
return -ENOENT;
}
diff --git a/arch/arm/src/stm32f7/stm32_spi.c b/arch/arm/src/stm32f7/stm32_spi.c
index 587f4bdfb573b302e2eabbe8cb5069fa4a9fb35d..2a442daa94d00ccea62ce2e4ff33ecc68bfcda9e 100644
--- a/arch/arm/src/stm32f7/stm32_spi.c
+++ b/arch/arm/src/stm32f7/stm32_spi.c
@@ -1,8 +1,9 @@
/************************************************************************************
* arm/arm/src/stm32f7/stm32_spi.c
*
- * Copyright (C) 2009-2013, 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt
+ * Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ * Authors: Gregory Nutt
+ * David Sidrane
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -34,8 +35,8 @@
************************************************************************************/
/************************************************************************************
- * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
- * provided by board-specific logic. They are implementations of the select
+ * The external functions, stm32_spi1/2/3/4/5/6select and stm32_spi1/2/3/4/5/6status
+ * must be * provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
* are provided by common STM32 logic. To use this common SPI logic on your
@@ -43,9 +44,10 @@
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
- * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
- * board-specific logic. These functions will perform chip selection and
- * status operations using GPIOs in the way your board is configured.
+ * 2. Provide stm32_spi1/2/3/4/5/6select() and stm32_spi1/2/3/4/5/6status()
+ * functions in your board-specific logic. These functions will perform chip
+ * selection and status operations using GPIOs in the way your board is
+ * configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level application
* initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to bind the
@@ -53,13 +55,7 @@
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
- ****************************************************c********************************/
-
-/* This driver is ported from the stm32 one, which only supports 8 and 16 bits
- * transfers. The STM32F7 family supports frame size from 4 to 16 bits, but we do not
- * support that yet. For the moment, we replace uses of the CR1_DFF bit with a check
- * of the CR2_DS[0..3] bits. If the value is SPI_CR2_DS_16BIT it means 16 bits, else 8 bits.
- */
+ ****************************************************c*******************************/
/************************************************************************************
* Included Files
@@ -87,11 +83,10 @@
#include "stm32_gpio.h"
#include "stm32_dma.h"
#include "stm32_spi.h"
-#include "chip/stm32_pinmap.h"
#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \
defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
- defined(CONFIG_STM32F7_SPI5) || defined(CONFIG_STM32F7_SPI6)
+ defined(CONFIG_STM32F7_SPI5) || defined(CONFIG_STM32F7_SPI6)
/************************************************************************************
* Pre-processor Definitions
@@ -114,48 +109,44 @@
#ifdef CONFIG_STM32F7_SPI_DMA
+# error "SPI DMA not yet supported"
+
# if defined(CONFIG_SPI_DMAPRIO)
# define SPI_DMA_PRIO CONFIG_SPI_DMAPRIO
+# elif defined(DMA_SCR_PRIMED)
+# define SPI_DMA_PRIO DMA_SCR_PRIMED
# else
-# define SPI_DMA_PRIO DMA_CCR_PRIMED
+# error "Unknown STM32 DMA"
# endif
-# if (SPI_DMA_PRIO & ~DMA_CCR_PL_MASK) != 0
+#if (SPI_DMA_PRIO & ~DMA_SCR_PL_MASK) != 0
# error "Illegal value for CONFIG_SPI_DMAPRIO"
-# endif
-
#endif
-/* DMA channel configuration */
-#define SPI_RXDMA16_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC )
-#define SPI_RXDMA8_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC )
-#define SPI_RXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_16BITS )
-#define SPI_RXDMA8NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS )
-#define SPI_TXDMA16_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC|DMA_CCR_DIR)
-#define SPI_TXDMA8_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC|DMA_CCR_DIR)
-#define SPI_TXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_16BITS |DMA_CCR_DIR)
-#define SPI_TXDMA8NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_DIR)
+/* DMA channel configuration */
+# define SPI_RXDMA16_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_16BITS|DMA_SCR_PSIZE_16BITS|DMA_SCR_MINC|DMA_SCR_DIR_P2M)
+# define SPI_RXDMA8_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_8BITS |DMA_SCR_MINC|DMA_SCR_DIR_P2M)
+# define SPI_RXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_16BITS |DMA_SCR_DIR_P2M)
+# define SPI_RXDMA8NULL_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_8BITS |DMA_SCR_DIR_P2M)
+# define SPI_TXDMA16_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_16BITS|DMA_SCR_PSIZE_16BITS|DMA_SCR_MINC|DMA_SCR_DIR_M2P)
+# define SPI_TXDMA8_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_8BITS |DMA_SCR_MINC|DMA_SCR_DIR_M2P)
+# define SPI_TXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_16BITS |DMA_SCR_DIR_M2P)
+# define SPI_TXDMA8NULL_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_8BITS |DMA_SCR_DIR_M2P)
+#endif
/* Debug ****************************************************************************/
-/* Check if (non-standard) SPI debug is enabled */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_SPI
-#endif
+/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
/************************************************************************************
@@ -173,8 +164,8 @@ struct stm32_spidev_s
#ifdef CONFIG_STM32F7_SPI_DMA
volatile uint8_t rxresult; /* Result of the RX DMA */
volatile uint8_t txresult; /* Result of the RX DMA */
- uint16_t rxch; /* The RX DMA channel number */
- uint16_t txch; /* The TX DMA channel number */
+ uint8_t rxch; /* The RX DMA channel number */
+ uint8_t txch; /* The TX DMA channel number */
DMA_HANDLE rxdma; /* DMA channel handle for RX transfers */
DMA_HANDLE txdma; /* DMA channel handle for TX transfers */
sem_t rxsem; /* Wait for RX DMA to complete */
@@ -185,7 +176,7 @@ struct stm32_spidev_s
sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */
- int8_t nbits; /* Width of word in bits (8 or 16) */
+ int8_t nbits; /* Width of word in bits */
uint8_t mode; /* Mode 0,1,2,3 */
};
@@ -200,7 +191,7 @@ static inline void spi_putreg(FAR struct stm32_spidev_s *priv, uint8_t offset,
uint16_t value);
static inline uint16_t spi_readword(FAR struct stm32_spidev_s *priv);
static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t byte);
-static inline bool spi_16bitmode(FAR struct stm32_spidev_s *priv);
+static inline bool spi_9to16bitmode(FAR struct stm32_spidev_s *priv);
/* DMA support */
@@ -244,7 +235,7 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv);
************************************************************************************/
#ifdef CONFIG_STM32F7_SPI1
-static const struct spi_ops_s g_spi1ops =
+static const struct spi_ops_s g_sp1iops =
{
.lock = spi_lock,
.select = stm32_spi1select,
@@ -274,14 +265,13 @@ static const struct spi_ops_s g_spi1ops =
static struct stm32_spidev_s g_spi1dev =
{
- .spidev = { &g_spi1ops },
+ .spidev = { &g_sp1iops },
.spibase = STM32_SPI1_BASE,
.spiclock = STM32_PCLK2_FREQUENCY,
#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
.spiirq = STM32_IRQ_SPI1,
#endif
#ifdef CONFIG_STM32F7_SPI_DMA
- /* lines must be configured in board.h */
.rxch = DMACHAN_SPI1_RX,
.txch = DMACHAN_SPI1_TX,
#endif
@@ -289,7 +279,7 @@ static struct stm32_spidev_s g_spi1dev =
#endif
#ifdef CONFIG_STM32F7_SPI2
-static const struct spi_ops_s g_spi2ops =
+static const struct spi_ops_s g_sp2iops =
{
.lock = spi_lock,
.select = stm32_spi2select,
@@ -316,7 +306,7 @@ static const struct spi_ops_s g_spi2ops =
static struct stm32_spidev_s g_spi2dev =
{
- .spidev = { &g_spi2ops },
+ .spidev = { &g_sp2iops },
.spibase = STM32_SPI2_BASE,
.spiclock = STM32_PCLK1_FREQUENCY,
#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
@@ -330,7 +320,7 @@ static struct stm32_spidev_s g_spi2dev =
#endif
#ifdef CONFIG_STM32F7_SPI3
-static const struct spi_ops_s g_spi3ops =
+static const struct spi_ops_s g_sp3iops =
{
.lock = spi_lock,
.select = stm32_spi3select,
@@ -357,7 +347,7 @@ static const struct spi_ops_s g_spi3ops =
static struct stm32_spidev_s g_spi3dev =
{
- .spidev = { &g_spi3ops },
+ .spidev = { &g_sp3iops },
.spibase = STM32_SPI3_BASE,
.spiclock = STM32_PCLK1_FREQUENCY,
#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
@@ -371,16 +361,13 @@ static struct stm32_spidev_s g_spi3dev =
#endif
#ifdef CONFIG_STM32F7_SPI4
-static const struct spi_ops_s g_spi4ops =
+static const struct spi_ops_s g_sp4iops =
{
.lock = spi_lock,
.select = stm32_spi4select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
.setbits = spi_setbits,
-#ifdef CONFIG_SPI_HWFEATURES
- .hwfeatures = 0, /* Not supported */
-#endif
.status = stm32_spi4status,
#ifdef CONFIG_SPI_CMDDATA
.cmddata = stm32_spi4cmddata,
@@ -393,22 +380,21 @@ static const struct spi_ops_s g_spi4ops =
.recvblock = spi_recvblock,
#endif
#ifdef CONFIG_SPI_CALLBACK
- .registercallback = stm32_spi4register, /* Provided externally */
+ .registercallback = stm32_spi4register, /* provided externally */
#else
- .registercallback = 0, /* Not implemented */
+ .registercallback = 0, /* not implemented */
#endif
};
static struct stm32_spidev_s g_spi4dev =
{
- .spidev = { &g_spi4ops },
+ .spidev = { &g_sp4iops },
.spibase = STM32_SPI4_BASE,
.spiclock = STM32_PCLK2_FREQUENCY,
#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
.spiirq = STM32_IRQ_SPI4,
#endif
#ifdef CONFIG_STM32F7_SPI_DMA
- /* lines must be configured in board.h */
.rxch = DMACHAN_SPI4_RX,
.txch = DMACHAN_SPI4_TX,
#endif
@@ -416,16 +402,13 @@ static struct stm32_spidev_s g_spi4dev =
#endif
#ifdef CONFIG_STM32F7_SPI5
-static const struct spi_ops_s g_spi5ops =
+static const struct spi_ops_s g_sp5iops =
{
.lock = spi_lock,
.select = stm32_spi5select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
.setbits = spi_setbits,
-#ifdef CONFIG_SPI_HWFEATURES
- .hwfeatures = 0, /* Not supported */
-#endif
.status = stm32_spi5status,
#ifdef CONFIG_SPI_CMDDATA
.cmddata = stm32_spi5cmddata,
@@ -438,22 +421,21 @@ static const struct spi_ops_s g_spi5ops =
.recvblock = spi_recvblock,
#endif
#ifdef CONFIG_SPI_CALLBACK
- .registercallback = stm32_spi5register, /* Provided externally */
+ .registercallback = stm32_spi5register, /* provided externally */
#else
- .registercallback = 0, /* Not implemented */
+ .registercallback = 0, /* not implemented */
#endif
};
static struct stm32_spidev_s g_spi5dev =
{
- .spidev = { &g_spi5ops },
+ .spidev = { &g_sp5iops },
.spibase = STM32_SPI5_BASE,
.spiclock = STM32_PCLK2_FREQUENCY,
#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
.spiirq = STM32_IRQ_SPI5,
#endif
#ifdef CONFIG_STM32F7_SPI_DMA
- /* lines must be configured in board.h */
.rxch = DMACHAN_SPI5_RX,
.txch = DMACHAN_SPI5_TX,
#endif
@@ -461,19 +443,16 @@ static struct stm32_spidev_s g_spi5dev =
#endif
#ifdef CONFIG_STM32F7_SPI6
-static const struct spi_ops_s g_spi6ops =
+static const struct spi_ops_s g_sp6iops =
{
.lock = spi_lock,
.select = stm32_spi6select,
.setfrequency = spi_setfrequency,
.setmode = spi_setmode,
.setbits = spi_setbits,
-#ifdef CONFIG_SPI_HWFEATURES
- .hwfeatures = 0, /* Not supported */
-#endif
.status = stm32_spi6status,
#ifdef CONFIG_SPI_CMDDATA
- .cmddata = stm32_spi6cmddata,
+ .cmddata = stm32_spi3cmddata,
#endif
.send = spi_send,
#ifdef CONFIG_SPI_EXCHANGE
@@ -483,39 +462,33 @@ static const struct spi_ops_s g_spi6ops =
.recvblock = spi_recvblock,
#endif
#ifdef CONFIG_SPI_CALLBACK
- .registercallback = stm32_spi6register, /* Provided externally */
+ .registercallback = stm32_spi6register, /* provided externally */
#else
- .registercallback = 0, /* Not implemented */
+ .registercallback = 0, /* not implemented */
#endif
};
static struct stm32_spidev_s g_spi6dev =
{
- .spidev = { &g_spi6ops },
+ .spidev = { &g_sp6iops },
.spibase = STM32_SPI6_BASE,
.spiclock = STM32_PCLK2_FREQUENCY,
#ifdef CONFIG_STM32F7_SPI_INTERRUPTS
.spiirq = STM32_IRQ_SPI6,
#endif
#ifdef CONFIG_STM32F7_SPI_DMA
- /* lines must be configured in board.h */
.rxch = DMACHAN_SPI6_RX,
.txch = DMACHAN_SPI6_TX,
#endif
};
#endif
-
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
- * Name: spi_getreg
+ * Name: spi_getreg8
*
* Description:
* Get the contents of the SPI register at offset
@@ -525,39 +498,36 @@ static struct stm32_spidev_s g_spi6dev =
* offset - offset to the register of interest
*
* Returned Value:
- * The contents of the 16-bit register
+ * The contents of the 8-bit register
*
************************************************************************************/
-static inline uint16_t spi_getreg(FAR struct stm32_spidev_s *priv, uint8_t offset)
+static inline uint8_t spi_getreg8(FAR struct stm32_spidev_s *priv, uint8_t offset)
{
- return getreg16(priv->spibase + offset);
+ return getreg8(priv->spibase + offset);
}
/************************************************************************************
- * Name: spi_putreg
+ * Name: spi_putreg8
*
* Description:
- * Write a 16-bit value to the SPI register at offset
+ * Write a 8-bit value to the SPI register at offset
*
* Input Parameters:
* priv - private SPI device structure
* offset - offset to the register of interest
- * value - the 16-bit value to be written
- *
- * Returned Value:
- * The contents of the 16-bit register
+ * value - the 8-bit value to be written
*
************************************************************************************/
-static inline void spi_putreg(FAR struct stm32_spidev_s *priv, uint8_t offset,
- uint16_t value)
+static inline void spi_putreg8(FAR struct stm32_spidev_s *priv, uint8_t offset,
+ uint8_t value)
{
- putreg16(value, priv->spibase + offset);
+ putreg8(value, priv->spibase + offset);
}
/************************************************************************************
- * Name: spi_getreg8
+ * Name: spi_getreg
*
* Description:
* Get the contents of the SPI register at offset
@@ -567,45 +537,48 @@ static inline void spi_putreg(FAR struct stm32_spidev_s *priv, uint8_t offset,
* offset - offset to the register of interest
*
* Returned Value:
- * The contents of the 8-bit register
+ * The contents of the 16-bit register
*
************************************************************************************/
-static inline uint8_t spi_getreg8(FAR struct stm32_spidev_s *priv, uint8_t offset)
+static inline uint16_t spi_getreg(FAR struct stm32_spidev_s *priv, uint8_t offset)
{
- return getreg8(priv->spibase + offset);
+ return getreg16(priv->spibase + offset);
}
/************************************************************************************
- * Name: spi_putreg8
+ * Name: spi_putreg
*
* Description:
- * Write a 8-bit value to the SPI register at offset
+ * Write a 16-bit value to the SPI register at offset
*
* Input Parameters:
* priv - private SPI device structure
* offset - offset to the register of interest
- * value - the 8-bit value to be written
+ * value - the 16-bit value to be written
+ *
+ * Returned Value:
+ * The contents of the 16-bit register
*
************************************************************************************/
-static inline void spi_putreg8(FAR struct stm32_spidev_s *priv, uint8_t offset,
- uint8_t value)
+static inline void spi_putreg(FAR struct stm32_spidev_s *priv, uint8_t offset,
+ uint16_t value)
{
- putreg8(value, priv->spibase + offset);
+ putreg16(value, priv->spibase + offset);
}
/************************************************************************************
* Name: spi_readword
*
* Description:
- * Read one word (TWO bytes!) from SPI
+ * Read one byte from SPI
*
* Input Parameters:
* priv - Device-specific state data
*
* Returned Value:
- * Word as read
+ * Byte as read
*
************************************************************************************/
@@ -613,62 +586,62 @@ static inline uint16_t spi_readword(FAR struct stm32_spidev_s *priv)
{
/* Wait until the receive buffer is not empty */
- while ((spi_getreg(priv, STM32F7_SPI_SR_OFFSET) & SPI_SR_RXNE) == 0);
+ while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_RXNE) == 0);
/* Then return the received byte */
- return spi_getreg(priv, STM32F7_SPI_DR_OFFSET);
+ return spi_getreg(priv, STM32_SPI_DR_OFFSET);
}
/************************************************************************************
- * Name: spi_readbyte
+ * Name: spi_writeword
*
* Description:
- * Read one byte from SPI
+ * Write one byte to SPI
*
* Input Parameters:
* priv - Device-specific state data
+ * byte - Byte to send
*
* Returned Value:
- * Byte as read
+ * None
*
************************************************************************************/
-static inline uint8_t spi_readbyte(FAR struct stm32_spidev_s *priv)
+static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t word)
{
- /* Wait until the receive buffer is not empty */
+ /* Wait until the transmit buffer is empty */
- while ((spi_getreg(priv, STM32F7_SPI_SR_OFFSET) & SPI_SR_RXNE) == 0);
+ while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_TXE) == 0);
- /* Then return the received byte */
+ /* Then send the byte */
- return spi_getreg8(priv, STM32F7_SPI_DR_OFFSET);
+ spi_putreg(priv, STM32_SPI_DR_OFFSET, word);
}
/************************************************************************************
- * Name: spi_writeword
+ * Name: spi_readbyte
*
* Description:
- * Write one 16-bit frame to the SPI FIFO
+ * Read one byte from SPI
*
* Input Parameters:
* priv - Device-specific state data
- * byte - Word to send
*
* Returned Value:
- * None
+ * Byte as read
*
************************************************************************************/
-static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t word)
+static inline uint8_t spi_readbyte(FAR struct stm32_spidev_s *priv)
{
- /* Wait until the transmit buffer is empty */
+ /* Wait until the receive buffer is not empty */
- while ((spi_getreg(priv, STM32F7_SPI_SR_OFFSET) & SPI_SR_TXE) == 0);
+ while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_RXNE) == 0);
- /* Then send the byte */
+ /* Then return the received byte */
- spi_putreg(priv, STM32F7_SPI_DR_OFFSET, word);
+ return spi_getreg8(priv, STM32_SPI_DR_OFFSET);
}
/************************************************************************************
@@ -690,49 +663,34 @@ static inline void spi_writebyte(FAR struct stm32_spidev_s *priv, uint8_t byte)
{
/* Wait until the transmit buffer is empty */
- while ((spi_getreg(priv, STM32F7_SPI_SR_OFFSET) & SPI_SR_TXE) == 0);
+ while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_TXE) == 0);
/* Then send the byte */
- spi_putreg8(priv, STM32F7_SPI_DR_OFFSET, byte);
+ spi_putreg8(priv, STM32_SPI_DR_OFFSET, byte);
}
/************************************************************************************
- * Name: spi_16bitmode
+ * Name: spi_9to16bitmode
*
* Description:
- * Check if the SPI is operating in 16-bit mode
+ * Check if the SPI is operating in more then 8 bit mode
*
* Input Parameters:
* priv - Device-specific state data
*
* Returned Value:
- * true: 16-bit mode, false: 8-bit mode
+ * true: >8 bit mode-bit mode, false: <= 8-bit mode
*
************************************************************************************/
-static inline bool spi_16bitmode(FAR struct stm32_spidev_s *priv)
+static inline bool spi_9to16bitmode(FAR struct stm32_spidev_s *priv)
{
- uint8_t bits = priv->nbits;
-
- /* Get the real number of bits */
-
- if (bits < 0)
- {
- bits = -bits;
- }
-
- return (bits > 8);
-
- /* Should we read the hardware regs? seems to be equivalent ~~ sebastien lorquet
- * (20160413)
- */
-
-// return ((spi_getreg(priv, STM32F7_SPI_CR2_OFFSET) & SPI_CR2_DS_MASK) == SPI_CR2_DS_16BIT);
+ return ((spi_getreg(priv, STM32_SPI_CR2_OFFSET) & SPI_CR2_DS_9BIT) == SPI_CR2_DS_9BIT);
}
/************************************************************************************
- * Name: spi_dmarxwaitw
+ * Name: spi_dmarxwait
*
* Description:
* Wait for DMA to complete.
@@ -867,7 +825,7 @@ static void spi_dmarxsetup(FAR struct stm32_spidev_s *priv, FAR void *rxbuffer,
{
/* 8- or 16-bit mode? */
- if (spi_16bitmode(priv))
+ if (spi_9to16bitmode(priv))
{
/* 16-bit mode -- is there a buffer to receive data in? */
@@ -898,7 +856,7 @@ static void spi_dmarxsetup(FAR struct stm32_spidev_s *priv, FAR void *rxbuffer,
/* Configure the RX DMA */
- stm32_dmasetup(priv->rxdma, priv->spibase + STM32F7_SPI_DR_OFFSET,
+ stm32_dmasetup(priv->rxdma, priv->spibase + STM32_SPI_DR_OFFSET,
(uint32_t)rxbuffer, nwords, priv->rxccr);
}
#endif
@@ -917,7 +875,7 @@ static void spi_dmatxsetup(FAR struct stm32_spidev_s *priv, FAR const void *txbu
{
/* 8- or 16-bit mode? */
- if (spi_16bitmode(priv))
+ if (spi_9to16bitmode(priv))
{
/* 16-bit mode -- is there a buffer to transfer data from? */
@@ -948,7 +906,7 @@ static void spi_dmatxsetup(FAR struct stm32_spidev_s *priv, FAR const void *txbu
/* Setup the TX DMA */
- stm32_dmasetup(priv->txdma, priv->spibase + STM32F7_SPI_DR_OFFSET,
+ stm32_dmasetup(priv->txdma, priv->spibase + STM32_SPI_DR_OFFSET,
(uint32_t)txbuffer, nwords, priv->txccr);
}
#endif
@@ -986,10 +944,10 @@ static inline void spi_dmatxstart(FAR struct stm32_spidev_s *priv)
#endif
/************************************************************************************
- * Name: spi_modifycr
+ * Name: spi_modifycr1
*
* Description:
- * Clear and set bits in the CR1 or CR2 register
+ * Clear and set bits in the CR1 register
*
* Input Parameters:
* priv - Device-specific state data
@@ -1001,14 +959,40 @@ static inline void spi_dmatxstart(FAR struct stm32_spidev_s *priv)
*
************************************************************************************/
-static void spi_modifycr(uint32_t addr, FAR struct stm32_spidev_s *priv, uint16_t setbits, uint16_t clrbits)
+static void spi_modifycr1(FAR struct stm32_spidev_s *priv, uint16_t setbits,
+ uint16_t clrbits)
{
- uint16_t cr;
+ uint16_t cr1;
+ cr1 = spi_getreg(priv, STM32_SPI_CR1_OFFSET);
+ cr1 &= ~clrbits;
+ cr1 |= setbits;
+ spi_putreg(priv, STM32_SPI_CR1_OFFSET, cr1);
+}
+
+/************************************************************************************
+ * Name: spi_modifycr2
+ *
+ * Description:
+ * Clear and set bits in the CR2 register
+ *
+ * Input Parameters:
+ * priv - Device-specific state data
+ * clrbits - The bits to clear
+ * setbits - The bits to set
+ *
+ * Returned Value:
+ * None
+ *
+ ************************************************************************************/
- cr = spi_getreg(priv, addr);
- cr &= ~clrbits;
- cr |= setbits;
- spi_putreg(priv, addr, cr);
+static void spi_modifycr2(FAR struct stm32_spidev_s *priv, uint16_t setbits,
+ uint16_t clrbits)
+{
+ uint16_t cr2;
+ cr2 = spi_getreg(priv, STM32_SPI_CR2_OFFSET);
+ cr2 &= ~clrbits;
+ cr2 |= setbits;
+ spi_putreg(priv, STM32_SPI_CR2_OFFSET, cr2);
}
/************************************************************************************
@@ -1053,6 +1037,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
(void)sem_post(&priv->exclsem);
}
+
return OK;
}
@@ -1077,11 +1062,11 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
uint16_t setbits;
uint32_t actual;
- /* Limit to max possible (if STM32F7_SPI_CLK_MAX is defined in board.h) */
+ /* Limit to max possible (if STM32_SPI_CLK_MAX is defined in board.h) */
- if (frequency > STM32F7_SPI_CLK_MAX)
+ if (frequency > STM32_SPI_CLK_MAX)
{
- frequency = STM32F7_SPI_CLK_MAX;
+ frequency = STM32_SPI_CLK_MAX;
}
/* Has the frequency changed? */
@@ -1147,15 +1132,15 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
actual = priv->spiclock >> 8;
}
- spi_modifycr(STM32F7_SPI_CR1_OFFSET, priv, 0, SPI_CR1_SPE);
- spi_modifycr(STM32F7_SPI_CR1_OFFSET, priv, setbits, SPI_CR1_BR_MASK);
- spi_modifycr(STM32F7_SPI_CR1_OFFSET, priv, SPI_CR1_SPE, 0);
+ spi_modifycr1(priv, 0, SPI_CR1_SPE);
+ spi_modifycr1(priv, setbits, SPI_CR1_BR_MASK);
+ spi_modifycr1(priv, SPI_CR1_SPE, 0);
/* Save the frequency selection so that subsequent reconfigurations will be
* faster.
*/
- spivdbg("Frequency %d->%d\n", frequency, actual);
+ spiinfo("Frequency %d->%d\n", frequency, actual);
priv->frequency = frequency;
priv->actual = actual;
@@ -1185,7 +1170,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
uint16_t setbits;
uint16_t clrbits;
- spivdbg("mode=%d\n", mode);
+ spiinfo("mode=%d\n", mode);
/* Has the mode changed? */
@@ -1219,13 +1204,13 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
return;
}
- spi_modifycr(STM32F7_SPI_CR1_OFFSET, priv, 0, SPI_CR1_SPE);
- spi_modifycr(STM32F7_SPI_CR1_OFFSET, priv, setbits, clrbits);
- spi_modifycr(STM32F7_SPI_CR1_OFFSET, priv, SPI_CR1_SPE, 0);
+ spi_modifycr1(priv, 0, SPI_CR1_SPE);
+ spi_modifycr1(priv, setbits, clrbits);
+ spi_modifycr1(priv, SPI_CR1_SPE, 0);
- /* Save the mode so that subsequent re-configurations will be faster */
+ /* Save the mode so that subsequent re-configurations will be faster */
- priv->mode = mode;
+ priv->mode = mode;
}
}
@@ -1233,12 +1218,11 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
* Name: spi_setbits
*
* Description:
- * Set the number of bits per word. With STM32F7, this is not restricted to 8 or 16,
- * but can be any value between 4 and 16.
+ * Set the number of bits per word.
*
* Input Parameters:
* dev - Device-specific state data
- * nbits - The number of bits requested, negative value means LSB first.
+ * nbits - The number of bits requested
*
* Returned Value:
* None
@@ -1248,11 +1232,13 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
{
FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
- uint16_t setbits1, setbits2;
- uint16_t clrbits1, clrbits2;
+ uint16_t setbitscr1;
+ uint16_t clrbitscr1;
+ uint16_t setbitscr2;
+ uint16_t clrbitscr2;
int savbits = nbits;
- spivdbg("nbits=%d\n", nbits);
+ spiinfo("nbits=%d\n", nbits);
/* Has the number of bits changed? */
@@ -1263,14 +1249,14 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
if (nbits < 0)
{
- setbits1 = SPI_CR1_LSBFIRST;
- clrbits1 = 0;
+ setbitscr1 = SPI_CR1_LSBFIRST;
+ clrbitscr1 = 0;
nbits = -nbits;
}
else
{
- setbits1 = 0;
- clrbits1 = SPI_CR1_LSBFIRST;
+ setbitscr1 = 0;
+ clrbitscr1 = SPI_CR1_LSBFIRST;
}
/* Set the number of bits (valid range 4-16) */
@@ -1280,8 +1266,8 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
return;
}
- clrbits2 = SPI_CR2_DS_MASK;
- setbits2 = SPI_CR2_DS_VAL(nbits);
+ clrbitscr2 = SPI_CR2_DS_MASK;
+ setbitscr2 = SPI_CR2_DS_VAL(nbits);
/* If nbits is <=8, then we are in byte mode and FRXTH shall be set
* (else, transaction will not complete).
@@ -1289,17 +1275,17 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
if (nbits < 9)
{
- setbits2 |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 1 byte */
+ setbitscr2 |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 1 byte */
}
else
{
- clrbits2 |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 2 bytes */
+ clrbitscr2 |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 2 bytes */
}
- spi_modifycr(STM32F7_SPI_CR1_OFFSET, priv, 0, SPI_CR1_SPE);
- spi_modifycr(STM32F7_SPI_CR1_OFFSET, priv, setbits1, clrbits1);
- spi_modifycr(STM32F7_SPI_CR2_OFFSET, priv, setbits2, clrbits2);
- spi_modifycr(STM32F7_SPI_CR1_OFFSET, priv, SPI_CR1_SPE, 0);
+ spi_modifycr1(priv, 0, SPI_CR1_SPE);
+ spi_modifycr1(priv, setbitscr1, clrbitscr1);
+ spi_modifycr2(priv, setbitscr2, clrbitscr2);
+ spi_modifycr1(priv, SPI_CR1_SPE, 0);
/* Save the selection so the subsequence re-configurations will be faster */
@@ -1332,11 +1318,11 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
DEBUGASSERT(priv && priv->spibase);
/* According to the number of bits, access data register as word or byte
- * This is absolutely required because of packing. With <=8 bit frames,
+ * This is absolutely required because of packing. With nbits <=8 bit frames,
* two bytes are received by a 16-bit read of the data register!
*/
- if (spi_16bitmode(priv))
+ if (spi_9to16bitmode(priv))
{
spi_writeword(priv, wd);
ret = spi_readword(priv);
@@ -1351,15 +1337,15 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
* flags).
*/
- regval = spi_getreg(priv, STM32F7_SPI_SR_OFFSET);
+ regval = spi_getreg(priv, STM32_SPI_SR_OFFSET);
- if (spi_16bitmode(priv))
+ if (spi_9to16bitmode(priv))
{
- spivdbg("Sent: %04x Return: %04x Status: %02x\n", wd, ret, regval);
+ spiinfo("Sent: %04x Return: %04x Status: %02x\n", wd, ret, regval);
}
else
{
- spivdbg("Sent: %02x Return: %02x Status: %02x\n", wd, ret, regval);
+ spiinfo("Sent: %02x Return: %02x Status: %02x\n", wd, ret, regval);
}
UNUSED(regval);
@@ -1398,11 +1384,11 @@ static void spi_exchange_nodma(FAR struct spi_dev_s *dev, FAR const void *txbuff
FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
DEBUGASSERT(priv && priv->spibase);
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
/* 8- or 16-bit mode? */
- if (spi_16bitmode(priv))
+ if (spi_9to16bitmode(priv))
{
/* 16-bit mode */
@@ -1511,7 +1497,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
static uint16_t rxdummy = 0xffff;
static const uint16_t txdummy = 0xffff;
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
DEBUGASSERT(priv && priv->spibase);
/* Setup DMAs */
@@ -1554,7 +1540,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
#ifndef CONFIG_SPI_EXCHANGE
static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, size_t nwords)
{
- spivdbg("txbuffer=%p nwords=%d\n", txbuffer, nwords);
+ spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
return spi_exchange(dev, txbuffer, NULL, nwords);
}
#endif
@@ -1581,7 +1567,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, si
#ifndef CONFIG_SPI_EXCHANGE
static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, size_t nwords)
{
- spivdbg("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
+ spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
return spi_exchange(dev, NULL, rxbuffer, nwords);
}
#endif
@@ -1617,11 +1603,11 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv)
clrbits = SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_BR_MASK | SPI_CR1_LSBFIRST |
SPI_CR1_RXONLY | SPI_CR1_BIDIOE | SPI_CR1_BIDIMODE;
setbits = SPI_CR1_MSTR | SPI_CR1_SSI | SPI_CR1_SSM;
- spi_modifycr(STM32F7_SPI_CR1_OFFSET, priv, setbits, clrbits);
+ spi_modifycr1(priv, setbits, clrbits);
clrbits = SPI_CR2_DS_MASK;
setbits = SPI_CR2_DS_8BIT | SPI_CR2_FRXTH; /* FRXTH must be high in 8-bit mode */
- spi_modifycr(STM32F7_SPI_CR2_OFFSET, priv, setbits, clrbits);
+ spi_modifycr2(priv, setbits, clrbits);
priv->frequency = 0;
priv->nbits = 8;
@@ -1633,15 +1619,15 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv)
/* CRCPOLY configuration */
- spi_putreg(priv, STM32F7_SPI_CRCPR_OFFSET, 7);
+ spi_putreg(priv, STM32_SPI_CRCPR_OFFSET, 7);
/* Initialize the SPI semaphore that enforces mutually exclusive access */
sem_init(&priv->exclsem, 0, 1);
-#ifdef CONFIG_STM32F7_SPI_DMA
/* Initialize the SPI semaphores that is used to wait for DMA completion */
+#ifdef CONFIG_STM32F7_SPI_DMA
sem_init(&priv->rxsem, 0, 0);
sem_init(&priv->txsem, 0, 0);
@@ -1657,12 +1643,12 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv)
priv->txdma = stm32_dmachannel(priv->txch);
DEBUGASSERT(priv->rxdma && priv->txdma);
- spi_putreg(priv, STM32F7_SPI_CR2_OFFSET, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN);
+ spi_putreg(priv, STM32_SPI_CR2_OFFSET, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN);
#endif
/* Enable spi */
- spi_modifycr(STM32F7_SPI_CR1_OFFSET, priv, SPI_CR1_SPE, 0);
+ spi_modifycr1(priv, SPI_CR1_SPE, 0);
}
/************************************************************************************
@@ -1698,7 +1684,7 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus)
/* Only configure if the bus is not already configured */
- if ((spi_getreg(priv, STM32F7_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
+ if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
{
/* Configure SPI1 pins: SCK, MISO, and MOSI */
@@ -1722,7 +1708,7 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus)
/* Only configure if the bus is not already configured */
- if ((spi_getreg(priv, STM32F7_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
+ if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
{
/* Configure SPI2 pins: SCK, MISO, and MOSI */
@@ -1746,7 +1732,7 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus)
/* Only configure if the bus is not already configured */
- if ((spi_getreg(priv, STM32F7_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
+ if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
{
/* Configure SPI3 pins: SCK, MISO, and MOSI */
@@ -1770,7 +1756,7 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus)
/* Only configure if the bus is not already configured */
- if ((spi_getreg(priv, STM32F7_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
+ if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
{
/* Configure SPI4 pins: SCK, MISO, and MOSI */
@@ -1794,7 +1780,7 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus)
/* Only configure if the bus is not already configured */
- if ((spi_getreg(priv, STM32F7_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
+ if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
{
/* Configure SPI5 pins: SCK, MISO, and MOSI */
@@ -1818,7 +1804,7 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus)
/* Only configure if the bus is not already configured */
- if ((spi_getreg(priv, STM32F7_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
+ if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0)
{
/* Configure SPI6 pins: SCK, MISO, and MOSI */
@@ -1834,7 +1820,7 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus)
else
#endif
{
- spidbg("ERROR: Unsupbused SPI bus: %d\n", bus);
+ spierr("ERROR: Unsupported SPI bus: %d\n", bus);
return NULL;
}
@@ -1842,5 +1828,5 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus)
return (FAR struct spi_dev_s *)priv;
}
-#endif /* CONFIG_STM32F7_SPI1 || CONFIG_STM32F7_SPI2 || CONFIG_STM32F7_SPI3 || CONFIG_STM32F7_SPI4 || CONFIG_STM32F7_SPI5 || CONFIG_STM32F7_SPI6 */
-
+#endif /* CONFIG_STM32F7_SPI1 || CONFIG_STM32F7_SPI2 || CONFIG_STM32F7_SPI3 || \
+ * CONFIG_STM32F7_SPI4 || CONFIG_STM32F7_SPI5 || CONFIG_STM32F7_SPI6 */
diff --git a/arch/arm/src/stm32f7/stm32_spi.h b/arch/arm/src/stm32f7/stm32_spi.h
index 4e3bd6fe1f2ae991f7dac20827f00808b0f7dfb2..2a2aa91881a21d1b75745b184b924ec355054247 100644
--- a/arch/arm/src/stm32f7/stm32_spi.h
+++ b/arch/arm/src/stm32f7/stm32_spi.h
@@ -1,8 +1,9 @@
/************************************************************************************
* arch/arm/src/stm32f7/stm32_spi.h
*
- * Copyright (C) 2009, 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt
+ * Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ * Authors: Gregory Nutt
+ * David Sidrane
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -42,11 +43,13 @@
#include
+#include
+
#include "chip.h"
#include "chip/stm32_spi.h"
/************************************************************************************
- * Pre-processor Definitions
+ * Public Functions
************************************************************************************/
#ifndef __ASSEMBLY__
@@ -60,16 +63,8 @@ extern "C"
#define EXTERN extern
#endif
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
-struct spi_dev_s;
-enum spi_dev_e;
-
-/************************************************************************************
- * Public Functions
- ************************************************************************************/
+struct spi_dev_s; /* Forward reference */
+enum spi_dev_e; /* Forward reference */
/************************************************************************************
* Name: stm32_spibus_initialize
diff --git a/arch/arm/src/stm32l4/Kconfig b/arch/arm/src/stm32l4/Kconfig
index eccd8469bfb32013e27552e180cecd77848ace48..6bc1cc992094e9eb91a578ca926d44711055c50c 100644
--- a/arch/arm/src/stm32l4/Kconfig
+++ b/arch/arm/src/stm32l4/Kconfig
@@ -333,7 +333,7 @@ config STM32L4_QSPI_DMATHRESHOLD
config STM32L4_QSPI_DMADEBUG
bool "QSPI DMA transfer debug"
- depends on STM32L4_QSPI_DMA && DEBUG && DEBUG_DMA
+ depends on STM32L4_QSPI_DMA && DEBUG_FEATURES && DEBUG_DMA
default n
---help---
Enable special debug instrumentation to analyze QSPI DMA data transfers.
@@ -343,11 +343,11 @@ config STM32L4_QSPI_DMADEBUG
config STM32L4_QSPI_REGDEBUG
bool "QSPI Register level debug"
- depends on DEBUG
+ depends on DEBUG_FEATURES
default n
---help---
Output detailed register-level QSPI device debug information.
- Requires also DEBUG.
+ Requires also CONFIG_DEBUG_FEATURES.
endif
diff --git a/arch/arm/src/stm32l4/Make.defs b/arch/arm/src/stm32l4/Make.defs
index d7b602efe472dd1630e38aaa04ef78018c1ace4e..a1acddd1bad0cb766babf45f207d7e9f325a5f18 100644
--- a/arch/arm/src/stm32l4/Make.defs
+++ b/arch/arm/src/stm32l4/Make.defs
@@ -150,7 +150,7 @@ CHIP_CSRCS += stm32l4_rtcc.c
endif
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
CHIP_CSRCS += stm32l4_dumpgpio.c
endif
diff --git a/arch/arm/src/stm32l4/stm32l4.h b/arch/arm/src/stm32l4/stm32l4.h
index c78865577d2c10811dbfa3abdbd60e9ee38b75d6..1b0973e891d381efa07dec8dfd5dbccada89ccd5 100644
--- a/arch/arm/src/stm32l4/stm32l4.h
+++ b/arch/arm/src/stm32l4/stm32l4.h
@@ -56,10 +56,10 @@
/* Additional Configuration *********************************************************/
/* Custom debug settings used in the STM32L4 port. These are managed by
* STM32L4-specific logic and not the common logic in include/debug.h.
- * NOTE: Some of these also depend on CONFIG_DEBUG_VERBOSE
+ * NOTE: Some of these also depend on CONFIG_DEBUG_INFO
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_DMA
# undef CONFIG_DEBUG_RTC
# undef CONFIG_DEBUG_I2C
diff --git a/arch/arm/src/stm32l4/stm32l4_can.c b/arch/arm/src/stm32l4/stm32l4_can.c
index 81efb677d2c3b91d138c75436d183f93e7c3d97d..5a23b36cbf9093569148d6891d7a71d97e29e386 100644
--- a/arch/arm/src/stm32l4/stm32l4_can.c
+++ b/arch/arm/src/stm32l4/stm32l4_can.c
@@ -86,18 +86,18 @@
/* Non-standard debug that may be enabled just for testing CAN */
#ifdef CONFIG_DEBUG_CAN
-# define candbg dbg
-# define canvdbg vdbg
-# define canlldbg lldbg
-# define canllvdbg llvdbg
+# define canerr err
+# define caninfo info
+# define canllerr llerr
+# define canllinfo llinfo
#else
-# define candbg(x...)
-# define canvdbg(x...)
-# define canlldbg(x...)
-# define canllvdbg(x...)
+# define canerr(x...)
+# define caninfo(x...)
+# define canllerr(x...)
+# define canllinfo(x...)
#endif
-#if !defined(CONFIG_DEBUG) || !defined(CONFIG_DEBUG_CAN)
+#if !defined(CONFIG_DEBUG_FEATURES) || !defined(CONFIG_DEBUG_CAN)
# undef CONFIG_CAN_REGDEBUG
#endif
@@ -237,7 +237,7 @@ static uint32_t can_vgetreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -254,7 +254,7 @@ static uint32_t can_vgetreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -266,7 +266,7 @@ static uint32_t can_vgetreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
@@ -315,7 +315,7 @@ static void can_vputreg(uint32_t addr, uint32_t value)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, value);
+ llerr("%08x<-%08x\n", addr, value);
/* Write the value */
@@ -363,25 +363,25 @@ static void can_dumpctrlregs(struct stm32l4_can_s *priv, FAR const char *msg)
{
if (msg)
{
- canlldbg("Control Registers: %s\n", msg);
+ canllerr("Control Registers: %s\n", msg);
}
else
{
- canlldbg("Control Registers:\n");
+ canllerr("Control Registers:\n");
}
/* CAN control and status registers */
- lldbg(" MCR: %08x MSR: %08x TSR: %08x\n",
+ llerr(" MCR: %08x MSR: %08x TSR: %08x\n",
getreg32(priv->base + STM32L4_CAN_MCR_OFFSET),
getreg32(priv->base + STM32L4_CAN_MSR_OFFSET),
getreg32(priv->base + STM32L4_CAN_TSR_OFFSET));
- lldbg(" RF0R: %08x RF1R: %08x\n",
+ llerr(" RF0R: %08x RF1R: %08x\n",
getreg32(priv->base + STM32L4_CAN_RF0R_OFFSET),
getreg32(priv->base + STM32L4_CAN_RF1R_OFFSET));
- lldbg(" IER: %08x ESR: %08x BTR: %08x\n",
+ llerr(" IER: %08x ESR: %08x BTR: %08x\n",
getreg32(priv->base + STM32L4_CAN_IER_OFFSET),
getreg32(priv->base + STM32L4_CAN_ESR_OFFSET),
getreg32(priv->base + STM32L4_CAN_BTR_OFFSET));
@@ -407,40 +407,40 @@ static void can_dumpmbregs(struct stm32l4_can_s *priv, FAR const char *msg)
{
if (msg)
{
- canlldbg("Mailbox Registers: %s\n", msg);
+ canllerr("Mailbox Registers: %s\n", msg);
}
else
{
- canlldbg("Mailbox Registers:\n");
+ canllerr("Mailbox Registers:\n");
}
/* CAN mailbox registers (3 TX and 2 RX) */
- lldbg(" TI0R: %08x TDT0R: %08x TDL0R: %08x TDH0R: %08x\n",
+ llerr(" TI0R: %08x TDT0R: %08x TDL0R: %08x TDH0R: %08x\n",
getreg32(priv->base + STM32L4_CAN_TI0R_OFFSET),
getreg32(priv->base + STM32L4_CAN_TDT0R_OFFSET),
getreg32(priv->base + STM32L4_CAN_TDL0R_OFFSET),
getreg32(priv->base + STM32L4_CAN_TDH0R_OFFSET));
- lldbg(" TI1R: %08x TDT1R: %08x TDL1R: %08x TDH1R: %08x\n",
+ llerr(" TI1R: %08x TDT1R: %08x TDL1R: %08x TDH1R: %08x\n",
getreg32(priv->base + STM32L4_CAN_TI1R_OFFSET),
getreg32(priv->base + STM32L4_CAN_TDT1R_OFFSET),
getreg32(priv->base + STM32L4_CAN_TDL1R_OFFSET),
getreg32(priv->base + STM32L4_CAN_TDH1R_OFFSET));
- lldbg(" TI2R: %08x TDT2R: %08x TDL2R: %08x TDH2R: %08x\n",
+ llerr(" TI2R: %08x TDT2R: %08x TDL2R: %08x TDH2R: %08x\n",
getreg32(priv->base + STM32L4_CAN_TI2R_OFFSET),
getreg32(priv->base + STM32L4_CAN_TDT2R_OFFSET),
getreg32(priv->base + STM32L4_CAN_TDL2R_OFFSET),
getreg32(priv->base + STM32L4_CAN_TDH2R_OFFSET));
- lldbg(" RI0R: %08x RDT0R: %08x RDL0R: %08x RDH0R: %08x\n",
+ llerr(" RI0R: %08x RDT0R: %08x RDL0R: %08x RDH0R: %08x\n",
getreg32(priv->base + STM32L4_CAN_RI0R_OFFSET),
getreg32(priv->base + STM32L4_CAN_RDT0R_OFFSET),
getreg32(priv->base + STM32L4_CAN_RDL0R_OFFSET),
getreg32(priv->base + STM32L4_CAN_RDH0R_OFFSET));
- lldbg(" RI1R: %08x RDT1R: %08x RDL1R: %08x RDH1R: %08x\n",
+ llerr(" RI1R: %08x RDT1R: %08x RDL1R: %08x RDH1R: %08x\n",
getreg32(priv->base + STM32L4_CAN_RI1R_OFFSET),
getreg32(priv->base + STM32L4_CAN_RDT1R_OFFSET),
getreg32(priv->base + STM32L4_CAN_RDL1R_OFFSET),
@@ -469,14 +469,14 @@ static void can_dumpfiltregs(struct stm32l4_can_s *priv, FAR const char *msg)
if (msg)
{
- canlldbg("Filter Registers: %s\n", msg);
+ canllerr("Filter Registers: %s\n", msg);
}
else
{
- canlldbg("Filter Registers:\n");
+ canllerr("Filter Registers:\n");
}
- lldbg(" FMR: %08x FM1R: %08x FS1R: %08x FFA1R: %08x FA1R: %08x\n",
+ llerr(" FMR: %08x FM1R: %08x FS1R: %08x FFA1R: %08x FA1R: %08x\n",
getreg32(priv->base + STM32L4_CAN_FMR_OFFSET),
getreg32(priv->base + STM32L4_CAN_FM1R_OFFSET),
getreg32(priv->base + STM32L4_CAN_FS1R_OFFSET),
@@ -485,7 +485,7 @@ static void can_dumpfiltregs(struct stm32l4_can_s *priv, FAR const char *msg)
for (i = 0; i < CAN_NFILTERS; i++)
{
- lldbg(" F%dR1: %08x F%dR2: %08x\n",
+ llerr(" F%dR1: %08x F%dR2: %08x\n",
i, getreg32(priv->base + STM32L4_CAN_FIR_OFFSET(i, 1)),
i, getreg32(priv->base + STM32L4_CAN_FIR_OFFSET(i, 2)));
}
@@ -514,7 +514,7 @@ static void can_reset(FAR struct can_dev_s *dev)
uint32_t regbit = 0;
irqstate_t flags;
- canllvdbg("CAN%d\n", priv->port);
+ canllinfo("CAN%d\n", priv->port);
/* Get the bits in the AHB1RSTR1 register needed to reset this CAN device */
@@ -526,7 +526,7 @@ static void can_reset(FAR struct can_dev_s *dev)
else
#endif
{
- canlldbg("Unsupported port %d\n", priv->port);
+ canllerr("Unsupported port %d\n", priv->port);
return;
}
@@ -569,14 +569,14 @@ static int can_setup(FAR struct can_dev_s *dev)
FAR struct stm32l4_can_s *priv = dev->cd_priv;
int ret;
- canllvdbg("CAN%d RX0 irq: %d TX irq: %d\n", priv->port, priv->canrx0, priv->cantx);
+ canllinfo("CAN%d RX0 irq: %d TX irq: %d\n", priv->port, priv->canrx0, priv->cantx);
/* CAN cell initialization */
ret = can_cellinit(priv);
if (ret < 0)
{
- canlldbg("CAN%d cell initialization failed: %d\n", priv->port, ret);
+ canllerr("CAN%d cell initialization failed: %d\n", priv->port, ret);
return ret;
}
@@ -588,7 +588,7 @@ static int can_setup(FAR struct can_dev_s *dev)
ret = can_filterinit(priv);
if (ret < 0)
{
- canlldbg("CAN%d filter initialization failed: %d\n", priv->port, ret);
+ canllerr("CAN%d filter initialization failed: %d\n", priv->port, ret);
return ret;
}
@@ -599,14 +599,14 @@ static int can_setup(FAR struct can_dev_s *dev)
ret = irq_attach(priv->canrx0, can_rx0interrupt);
if (ret < 0)
{
- canlldbg("Failed to attach CAN%d RX0 IRQ (%d)", priv->port, priv->canrx0);
+ canllerr("Failed to attach CAN%d RX0 IRQ (%d)", priv->port, priv->canrx0);
return ret;
}
ret = irq_attach(priv->cantx, can_txinterrupt);
if (ret < 0)
{
- canlldbg("Failed to attach CAN%d TX IRQ (%d)", priv->port, priv->cantx);
+ canllerr("Failed to attach CAN%d TX IRQ (%d)", priv->port, priv->cantx);
return ret;
}
@@ -639,7 +639,7 @@ static void can_shutdown(FAR struct can_dev_s *dev)
{
FAR struct stm32l4_can_s *priv = dev->cd_priv;
- canllvdbg("CAN%d\n", priv->port);
+ canllinfo("CAN%d\n", priv->port);
/* Disable the RX FIFO 0 and TX interrupts */
@@ -675,7 +675,7 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
FAR struct stm32l4_can_s *priv = dev->cd_priv;
uint32_t regval;
- canllvdbg("CAN%d enable: %d\n", priv->port, enable);
+ canllinfo("CAN%d enable: %d\n", priv->port, enable);
/* Enable/disable the FIFO 0 message pending interrupt */
@@ -711,7 +711,7 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
FAR struct stm32l4_can_s *priv = dev->cd_priv;
uint32_t regval;
- canllvdbg("CAN%d enable: %d\n", priv->port, enable);
+ canllinfo("CAN%d enable: %d\n", priv->port, enable);
/* Support only disabling the transmit mailbox interrupt */
@@ -796,7 +796,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
int dlc;
int txmb;
- canllvdbg("CAN%d ID: %d DLC: %d\n", priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
+ canllinfo("CAN%d ID: %d DLC: %d\n", priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
/* Select one empty transmit mailbox */
@@ -815,7 +815,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
}
else
{
- canlldbg("ERROR: No available mailbox\n");
+ canllerr("ERROR: No available mailbox\n");
return -EBUSY;
}
@@ -949,7 +949,7 @@ static bool can_txready(FAR struct can_dev_s *dev)
/* Return true if any mailbox is available */
regval = can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
- canllvdbg("CAN%d TSR: %08x\n", priv->port, regval);
+ canllinfo("CAN%d TSR: %08x\n", priv->port, regval);
if ((regval & CAN_ALL_MAILBOXES) != 0)
{
@@ -985,7 +985,7 @@ static bool can_txempty(FAR struct can_dev_s *dev)
/* Return true if all mailboxes are available */
regval = can_getreg(priv, STM32L4_CAN_TSR_OFFSET);
- canllvdbg("CAN%d TSR: %08x\n", priv->port, regval);
+ canllinfo("CAN%d TSR: %08x\n", priv->port, regval);
if ((regval & CAN_ALL_MAILBOXES) == CAN_ALL_MAILBOXES)
{
@@ -1029,7 +1029,7 @@ static int can_rx0interrupt(int irq, void *context)
npending = (regval & CAN_RFR_FMP_MASK) >> CAN_RFR_FMP_SHIFT;
if (npending < 1)
{
- canlldbg("WARNING: No messages pending\n");
+ canllerr("WARNING: No messages pending\n");
return OK;
}
@@ -1053,7 +1053,7 @@ static int can_rx0interrupt(int irq, void *context)
#else
if ((regval & CAN_RIR_IDE) != 0)
{
- canlldbg("ERROR: Received message with extended identifier. Dropped\n");
+ canllerr("ERROR: Received message with extended identifier. Dropped\n");
ret = -ENOSYS;
goto errout;
}
@@ -1260,7 +1260,7 @@ static int can_bittiming(struct stm32l4_can_s *priv)
uint32_t ts1;
uint32_t ts2;
- canllvdbg("CAN%d PCLK1: %d baud: %d\n",
+ canllinfo("CAN%d PCLK1: %d baud: %d\n",
priv->port, STM32L4_PCLK1_FREQUENCY, priv->baud);
/* Try to get CAN_BIT_QUANTA quanta in one bit_time.
@@ -1314,7 +1314,7 @@ static int can_bittiming(struct stm32l4_can_s *priv)
DEBUGASSERT(brp >= 1 && brp <= CAN_BTR_BRP_MAX);
}
- canllvdbg("TS1: %d TS2: %d BRP: %d\n", ts1, ts2, brp);
+ canllinfo("TS1: %d TS2: %d BRP: %d\n", ts1, ts2, brp);
/* Configure bit timing. This also does the following, less obvious
* things. Unless loopback mode is enabled, it:
@@ -1357,7 +1357,7 @@ static int can_cellinit(struct stm32l4_can_s *priv)
uint32_t regval;
int ret;
- canllvdbg("CAN%d\n", priv->port);
+ canllinfo("CAN%d\n", priv->port);
/* Exit from sleep mode */
@@ -1392,7 +1392,7 @@ static int can_cellinit(struct stm32l4_can_s *priv)
if (timeout < 1)
{
- canlldbg("ERROR: Timed out waiting to enter initialization mode\n");
+ canllerr("ERROR: Timed out waiting to enter initialization mode\n");
return -ETIMEDOUT;
}
@@ -1415,7 +1415,7 @@ static int can_cellinit(struct stm32l4_can_s *priv)
ret = can_bittiming(priv);
if (ret < 0)
{
- canlldbg("ERROR: Failed to set bit timing: %d\n", ret);
+ canllerr("ERROR: Failed to set bit timing: %d\n", ret);
return ret;
}
@@ -1442,7 +1442,7 @@ static int can_cellinit(struct stm32l4_can_s *priv)
if (timeout < 1)
{
- canlldbg("ERROR: Timed out waiting to exit initialization mode: %08x\n", regval);
+ canllerr("ERROR: Timed out waiting to exit initialization mode: %08x\n", regval);
return -ETIMEDOUT;
}
@@ -1486,7 +1486,7 @@ static int can_filterinit(struct stm32l4_can_s *priv)
uint32_t regval;
uint32_t bitmask;
- canllvdbg("CAN%d filter: %d\n", priv->port, priv->filter);
+ canllinfo("CAN%d filter: %d\n", priv->port, priv->filter);
/* Get the bitmask associated with the filter used by this CAN block */
@@ -1565,7 +1565,7 @@ FAR struct can_dev_s *stm32l4_caninitialize(int port)
{
struct can_dev_s *dev = NULL;
- canvdbg("CAN%d\n", port);
+ caninfo("CAN%d\n", port);
/* NOTE: Peripherical clocking for CAN1 and/or CAN2 was already provided
* by stm32l4_clockconfig() early in the reset sequence.
@@ -1588,7 +1588,7 @@ FAR struct can_dev_s *stm32l4_caninitialize(int port)
else
#endif
{
- candbg("ERROR: Unsupported port %d\n", port);
+ canerr("ERROR: Unsupported port %d\n", port);
return NULL;
}
diff --git a/arch/arm/src/stm32l4/stm32l4_gpio.h b/arch/arm/src/stm32l4/stm32l4_gpio.h
index 185af4810fb0739ca3b612488e25f883c94bbf68..49f8c95fa5d97b32451c09add95b43e7c0f648cc 100644
--- a/arch/arm/src/stm32l4/stm32l4_gpio.h
+++ b/arch/arm/src/stm32l4/stm32l4_gpio.h
@@ -350,7 +350,7 @@ xcpt_t stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
*
************************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
int stm32l4_dumpgpio(uint32_t pinset, const char *msg);
#else
# define stm32l4_dumpgpio(p,m)
diff --git a/arch/arm/src/stm32l4/stm32l4_i2c.c b/arch/arm/src/stm32l4/stm32l4_i2c.c
index 452b125e36140d76081d964a4b59fafb251c9aeb..49088d947be7f0479d924efa420dc0e78da0d4cb 100644
--- a/arch/arm/src/stm32l4/stm32l4_i2c.c
+++ b/arch/arm/src/stm32l4/stm32l4_i2c.c
@@ -146,14 +146,14 @@
#define STATUS_BUSY(status) (status & I2C_ISR_BUSY)
/* Debug ****************************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
+/* CONFIG_DEBUG_I2C + CONFIG_DEBUG_FEATURES enables general I2C debug output. */
#ifdef CONFIG_DEBUG_I2C
-# define i2cdbg dbg
-# define i2cvdbg vdbg
+# define i2cerr err
+# define i2cinfo info
#else
-# define i2cdbg(x...)
-# define i2cvdbg(x...)
+# define i2cerr(x...)
+# define i2cinfo(x...)
#endif
/* I2C event trace logic. NOTE: trace uses the internal, non-standard, low-level
@@ -671,7 +671,7 @@ static inline int stm32l4_i2c_sem_waitdone(FAR struct stm32l4_i2c_priv_s *priv)
while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
- i2cvdbg("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
+ i2cinfo("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
priv->intstate, (long)elapsed, (long)timeout, priv->status);
/* Set the interrupt state back to IDLE */
@@ -825,7 +825,7 @@ static inline void stm32l4_i2c_sem_waitstop(FAR struct stm32l4_i2c_priv_s *priv)
* still pending.
*/
- i2cvdbg("Timeout with CR: %04x SR: %04x\n", cr, sr);
+ i2cinfo("Timeout with CR: %04x SR: %04x\n", cr, sr);
}
/************************************************************************************
@@ -919,7 +919,7 @@ static void stm32l4_i2c_tracenew(FAR struct stm32l4_i2c_priv_s *priv,
if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
{
- i2cdbg("Trace table overflow\n");
+ i2cerr("Trace table overflow\n");
return;
}
@@ -960,7 +960,7 @@ static void stm32l4_i2c_traceevent(FAR struct stm32l4_i2c_priv_s *priv,
if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
{
- i2cdbg("Trace table overflow\n");
+ i2cerr("Trace table overflow\n");
return;
}
@@ -1731,7 +1731,7 @@ static int stm32l4_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg
status = stm32l4_i2c_getstatus(priv);
ret = -ETIMEDOUT;
- i2cdbg("Timed out: CR1: %08x status: %08x\n",
+ i2cerr("Timed out: CR1: %08x status: %08x\n",
stm32l4_i2c_getreg32(priv, STM32L4_I2C_CR1_OFFSET), status);
/* "Note: When the STOP, START or PEC bit is set, the software must
diff --git a/arch/arm/src/stm32l4/stm32l4_idle.c b/arch/arm/src/stm32l4/stm32l4_idle.c
index 7cf0734c22d1b88ca12b91ce3bb62b75b4139aa1..00cceb1470765a5eebdb6a950e8d40a57a6d76ea 100644
--- a/arch/arm/src/stm32l4/stm32l4_idle.c
+++ b/arch/arm/src/stm32l4/stm32l4_idle.c
@@ -101,7 +101,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */
- llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
+ llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */
diff --git a/arch/arm/src/stm32l4/stm32l4_irq.c b/arch/arm/src/stm32l4/stm32l4_irq.c
index e0e963c66df118d575182ab6d4f51e361a7a64ea..93903c8924e4df2a1905081b06f513a867516b2f 100644
--- a/arch/arm/src/stm32l4/stm32l4_irq.c
+++ b/arch/arm/src/stm32l4/stm32l4_irq.c
@@ -112,33 +112,33 @@ static void stm32l4_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" INTCTRL: %08x VECTAB: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+ llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
- lldbg(" IRQ ENABLE: %08x %08x %08x\n",
+ llerr(" IRQ ENABLE: %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
- lldbg(" SYSH_PRIO: %08x %08x %08x\n",
+ llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
- lldbg(" %08x\n",
+ llerr(" %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY));
leave_critical_section(flags);
}
@@ -148,7 +148,7 @@ static void stm32l4_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: stm32l4_nmi, stm32l4_busfault, stm32l4_usagefault, stm32l4_pendsv,
- * stm32l4_dbgmonitor, stm32l4_pendsv, stm32l4_reserved
+ * stm32l4_errmonitor, stm32l4_pendsv, stm32l4_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@@ -157,11 +157,11 @@ static void stm32l4_dumpnvic(const char *msg, int irq)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int stm32l4_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -169,7 +169,7 @@ static int stm32l4_nmi(int irq, FAR void *context)
static int stm32l4_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
+ err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -177,7 +177,7 @@ static int stm32l4_busfault(int irq, FAR void *context)
static int stm32l4_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
+ err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -185,15 +185,15 @@ static int stm32l4_usagefault(int irq, FAR void *context)
static int stm32l4_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
-static int stm32l4_dbgmonitor(int irq, FAR void *context)
+static int stm32l4_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Debug Monitor received\n");
+ err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@@ -201,7 +201,7 @@ static int stm32l4_dbgmonitor(int irq, FAR void *context)
static int stm32l4_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -403,7 +403,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(STM32L4_IRQ_NMI, stm32l4_nmi);
#ifndef CONFIG_ARM_MPU
irq_attach(STM32L4_IRQ_MEMFAULT, up_memfault);
@@ -411,7 +411,7 @@ void up_irqinitialize(void)
irq_attach(STM32L4_IRQ_BUSFAULT, stm32l4_busfault);
irq_attach(STM32L4_IRQ_USAGEFAULT, stm32l4_usagefault);
irq_attach(STM32L4_IRQ_PENDSV, stm32l4_pendsv);
- irq_attach(STM32L4_IRQ_DBGMONITOR, stm32l4_dbgmonitor);
+ irq_attach(STM32L4_IRQ_DBGMONITOR, stm32l4_errmonitor);
irq_attach(STM32L4_IRQ_RESERVED, stm32l4_reserved);
#endif
diff --git a/arch/arm/src/stm32l4/stm32l4_qspi.c b/arch/arm/src/stm32l4/stm32l4_qspi.c
index 57aa85dac0522c3b406c537b29111579df663bdb..c5863cc5deff1ed368500494e27859d9af6b1602 100644
--- a/arch/arm/src/stm32l4/stm32l4_qspi.c
+++ b/arch/arm/src/stm32l4/stm32l4_qspi.c
@@ -85,31 +85,20 @@
#define IS_ALIGNED(n) (((uint32_t)(n) & ALIGN_MASK) == 0)
/* Debug *******************************************************************/
-/* Check if QSPI debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_SPI
-# undef CONFIG_STM32L4_QSPI_DMADEBUG
-# undef CONFIG_STM32L4_QSPI_REGDEBUG
-#endif
+/* Check if QSPI debug is enabled */
#ifndef CONFIG_DEBUG_DMA
# undef CONFIG_STM32L4_QSPI_DMADEBUG
#endif
#ifdef CONFIG_DEBUG_SPI
-# define qspidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define qspivdbg lldbg
-# else
-# define qspivdbg(x...)
-# endif
+# define qspierr llerr
+# define qspiwarn llwarn
+# define qspiinfo llinfo
#else
-# define qspidbg(x...)
-# define qspivdbg(x...)
+# define qspierr(x...)
+# define qspiwarn(x...)
+# define qspiinfo(x...)
#endif
#define DMA_INITIAL 0
@@ -286,7 +275,7 @@ static inline uint32_t qspi_getreg(struct stm32l4_qspidev_s *priv,
static inline void qspi_putreg(struct stm32l4_qspidev_s *priv, uint32_t value,
unsigned int offset);
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg);
#else
# define qspi_dumpregs(priv,msg)
@@ -426,7 +415,7 @@ static bool qspi_checkreg(struct stm32l4_qspidev_s *priv, bool wr, uint32_t valu
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -460,7 +449,7 @@ static inline uint32_t qspi_getreg(struct stm32l4_qspidev_s *priv,
#ifdef CONFIG_STM32L4_QSPI_REGDEBUG
if (qspi_checkreg(priv, false, value, address))
{
- lldbg("%08x->%08x\n", address, value);
+ llerr("%08x->%08x\n", address, value);
}
#endif
@@ -483,7 +472,7 @@ static inline void qspi_putreg(struct stm32l4_qspidev_s *priv, uint32_t value,
#ifdef CONFIG_STM32L4_QSPI_REGDEBUG
if (qspi_checkreg(priv, true, value, address))
{
- lldbg("%08x<-%08x\n", address, value);
+ llerr("%08x<-%08x\n", address, value);
}
#endif
@@ -505,11 +494,11 @@ static inline void qspi_putreg(struct stm32l4_qspidev_s *priv, uint32_t value,
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
{
uint32_t regval;
- qspivdbg("%s:\n", msg);
+ qspiinfo("%s:\n", msg);
#if 0
/* this extra verbose output may be helpful in some cases; you'll need
@@ -517,8 +506,8 @@ static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
*/
regval = getreg32(priv->base + STM32L4_QUADSPI_CR_OFFSET); /* Control Register */
- qspivdbg("CR:%08x\n",regval);
- qspivdbg(" EN:%1d ABORT:%1d DMAEN:%1d TCEN:%1d SSHIFT:%1d\n"
+ qspiinfo("CR:%08x\n",regval);
+ qspiinfo(" EN:%1d ABORT:%1d DMAEN:%1d TCEN:%1d SSHIFT:%1d\n"
" FTHRES: %d\n"
" TEIE:%1d TCIE:%1d FTIE:%1d SMIE:%1d TOIE:%1d APMS:%1d PMM:%1d\n"
" PRESCALER: %d\n",
@@ -539,16 +528,16 @@ static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
);
regval = getreg32(priv->base + STM32L4_QUADSPI_DCR_OFFSET); /* Device Configuration Register */
- qspivdbg("DCR:%08x\n",regval);
- qspivdbg(" CKMODE:%1d CSHT:%d FSIZE:%d\n",
+ qspiinfo("DCR:%08x\n",regval);
+ qspiinfo(" CKMODE:%1d CSHT:%d FSIZE:%d\n",
(regval&QSPI_DCR_CKMODE)?1:0,
(regval&QSPI_DCR_CSHT_MASK)>>QSPI_DCR_CSHT_SHIFT,
(regval&QSPI_DCR_FSIZE_MASK)>>QSPI_DCR_FSIZE_SHIFT
);
regval = getreg32(priv->base + STM32L4_QUADSPI_CCR_OFFSET); /* Communication Configuration Register */
- qspivdbg("CCR:%08x\n",regval);
- qspivdbg(" INST:%02x IMODE:%d ADMODE:%d ADSIZE:%d ABMODE:%d\n"
+ qspiinfo("CCR:%08x\n",regval);
+ qspiinfo(" INST:%02x IMODE:%d ADMODE:%d ADSIZE:%d ABMODE:%d\n"
" ABSIZE:%d DCYC:%d DMODE:%d FMODE:%d\n"
" SIOO:%1d DDRM:%1d\n",
(regval&QSPI_CCR_INSTRUCTION_MASK)>>QSPI_CCR_INSTRUCTION_SHIFT,
@@ -565,8 +554,8 @@ static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
);
regval = getreg32(priv->base + STM32L4_QUADSPI_SR_OFFSET); /* Status Register */
- qspivdbg("SR:%08x\n",regval);
- qspivdbg(" TEF:%1d TCF:%1d FTF:%1d SMF:%1d TOF:%1d BUSY:%1d FLEVEL:%d\n",
+ qspiinfo("SR:%08x\n",regval);
+ qspiinfo(" TEF:%1d TCF:%1d FTF:%1d SMF:%1d TOF:%1d BUSY:%1d FLEVEL:%d\n",
(regval&QSPI_SR_TEF)?1:0,
(regval&QSPI_SR_TCF)?1:0,
(regval&QSPI_SR_FTF)?1:0,
@@ -577,17 +566,17 @@ static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
);
#else
- qspivdbg(" CR:%08x DCR:%08x CCR:%08x SR:%08x\n",
+ qspiinfo(" CR:%08x DCR:%08x CCR:%08x SR:%08x\n",
getreg32(priv->base + STM32L4_QUADSPI_CR_OFFSET), /* Control Register */
getreg32(priv->base + STM32L4_QUADSPI_DCR_OFFSET), /* Device Configuration Register */
getreg32(priv->base + STM32L4_QUADSPI_CCR_OFFSET), /* Communication Configuration Register */
getreg32(priv->base + STM32L4_QUADSPI_SR_OFFSET)); /* Status Register */
- qspivdbg(" DLR:%08x ABR:%08x PSMKR:%08x PSMAR:%08x\n",
+ qspiinfo(" DLR:%08x ABR:%08x PSMKR:%08x PSMAR:%08x\n",
getreg32(priv->base + STM32L4_QUADSPI_DLR_OFFSET), /* Data Length Register */
getreg32(priv->base + STM32L4_QUADSPI_ABR_OFFSET), /* Alternate Bytes Register */
getreg32(priv->base + STM32L4_QUADSPI_PSMKR_OFFSET), /* Polling Status mask Register */
getreg32(priv->base + STM32L4_QUADSPI_PSMAR_OFFSET)); /* Polling Status match Register */
- qspivdbg(" PIR:%08x LPTR:%08x\n",
+ qspiinfo(" PIR:%08x LPTR:%08x\n",
getreg32(priv->base + STM32L4_QUADSPI_PIR_OFFSET), /* Polling Interval Register */
getreg32(priv->base + STM32L4_QUADSPI_LPTR_OFFSET)); /* Low-Power Timeout Register */
(void)regval;
@@ -599,25 +588,25 @@ static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
static void qspi_dumpgpioconfig(const char *msg)
{
uint32_t regval;
- qspivdbg("%s:\n", msg);
+ qspiinfo("%s:\n", msg);
regval = getreg32(STM32L4_GPIOE_MODER);
- qspivdbg("E_MODER:%08x\n",regval);
+ qspiinfo("E_MODER:%08x\n",regval);
regval = getreg32(STM32L4_GPIOE_OTYPER);
- qspivdbg("E_OTYPER:%08x\n",regval);
+ qspiinfo("E_OTYPER:%08x\n",regval);
regval = getreg32(STM32L4_GPIOE_OSPEED);
- qspivdbg("E_OSPEED:%08x\n",regval);
+ qspiinfo("E_OSPEED:%08x\n",regval);
regval = getreg32(STM32L4_GPIOE_PUPDR);
- qspivdbg("E_PUPDR:%08x\n",regval);
+ qspiinfo("E_PUPDR:%08x\n",regval);
regval = getreg32(STM32L4_GPIOE_AFRL);
- qspivdbg("E_AFRL:%08x\n",regval);
+ qspiinfo("E_AFRL:%08x\n",regval);
regval = getreg32(STM32L4_GPIOE_AFRH);
- qspivdbg("E_AFRH:%08x\n",regval);
+ qspiinfo("E_AFRH:%08x\n",regval);
}
#endif
@@ -729,20 +718,20 @@ static int qspi_setupxctnfromcmd(struct qspi_xctnspec_s *xctn,
DEBUGASSERT(xctn != NULL && cmdinfo != NULL);
#ifdef CONFIG_DEBUG_SPI
- qspivdbg("Transfer:\n");
- qspivdbg(" flags: %02x\n", cmdinfo->flags);
- qspivdbg(" cmd: %04x\n", cmdinfo->cmd);
+ qspiinfo("Transfer:\n");
+ qspiinfo(" flags: %02x\n", cmdinfo->flags);
+ qspiinfo(" cmd: %04x\n", cmdinfo->cmd);
if (QSPICMD_ISADDRESS(cmdinfo->flags))
{
- qspivdbg(" address/length: %08lx/%d\n",
+ qspiinfo(" address/length: %08lx/%d\n",
(unsigned long)cmdinfo->addr, cmdinfo->addrlen);
}
if (QSPICMD_ISDATA(cmdinfo->flags))
{
- qspivdbg(" %s Data:\n", QSPICMD_ISWRITE(cmdinfo->flags) ? "Write" : "Read");
- qspivdbg(" buffer/length: %p/%d\n", cmdinfo->buffer, cmdinfo->buflen);
+ qspiinfo(" %s Data:\n", QSPICMD_ISWRITE(cmdinfo->flags) ? "Write" : "Read");
+ qspiinfo(" buffer/length: %p/%d\n", cmdinfo->buffer, cmdinfo->buflen);
}
#endif
@@ -853,13 +842,13 @@ static int qspi_setupxctnfrommem(struct qspi_xctnspec_s *xctn,
DEBUGASSERT(xctn != NULL && meminfo != NULL);
#ifdef CONFIG_DEBUG_SPI
- qspivdbg("Transfer:\n");
- qspivdbg(" flags: %02x\n", meminfo->flags);
- qspivdbg(" cmd: %04x\n", meminfo->cmd);
- qspivdbg(" address/length: %08lx/%d\n",
+ qspiinfo("Transfer:\n");
+ qspiinfo(" flags: %02x\n", meminfo->flags);
+ qspiinfo(" cmd: %04x\n", meminfo->cmd);
+ qspiinfo(" address/length: %08lx/%d\n",
(unsigned long)meminfo->addr, meminfo->addrlen);
- qspivdbg(" %s Data:\n", QSPIMEM_ISWRITE(meminfo->flags) ? "Write" : "Read");
- qspivdbg(" buffer/length: %p/%d\n", meminfo->buffer, meminfo->buflen);
+ qspiinfo(" %s Data:\n", QSPIMEM_ISWRITE(meminfo->flags) ? "Write" : "Read");
+ qspiinfo(" buffer/length: %p/%d\n", meminfo->buffer, meminfo->buflen);
#endif
DEBUGASSERT(meminfo->cmd < 256);
@@ -1472,7 +1461,7 @@ static int qspi_memory_dma(struct stm32l4_qspidev_s *priv,
(wdentry_t)qspi_dma_timeout, 1, (uint32_t)priv);
if (ret != OK)
{
- qspidbg("ERROR: wd_start failed: %d\n", ret);
+ qspierr("ERROR: wd_start failed: %d\n", ret);
}
/* Wait for the DMA complete */
@@ -1535,7 +1524,7 @@ static int qspi_memory_dma(struct stm32l4_qspidev_s *priv,
if (priv->result)
{
- qspidbg("ERROR: DMA failed with result: %d\n", priv->result);
+ qspierr("ERROR: DMA failed with result: %d\n", priv->result);
}
return priv->result;
@@ -1705,7 +1694,7 @@ static int qspi_lock(struct qspi_dev_s *dev, bool lock)
{
struct stm32l4_qspidev_s *priv = (struct stm32l4_qspidev_s *)dev;
- qspivdbg("lock=%d\n", lock);
+ qspiinfo("lock=%d\n", lock);
if (lock)
{
/* Take the semaphore (perhaps waiting) */
@@ -1758,7 +1747,7 @@ static uint32_t qspi_setfrequency(struct qspi_dev_s *dev, uint32_t frequency)
return 0;
}
- qspivdbg("frequency=%d\n", frequency);
+ qspiinfo("frequency=%d\n", frequency);
DEBUGASSERT(priv);
/* Wait till BUSY flag reset */
@@ -1810,14 +1799,14 @@ static uint32_t qspi_setfrequency(struct qspi_dev_s *dev, uint32_t frequency)
/* Calculate the new actual frequency */
actual = STL32L4_QSPI_CLOCK / prescaler;
- qspivdbg("prescaler=%d actual=%d\n", prescaler, actual);
+ qspiinfo("prescaler=%d actual=%d\n", prescaler, actual);
/* Save the frequency setting */
priv->frequency = frequency;
priv->actual = actual;
- qspivdbg("Frequency %d->%d\n", frequency, actual);
+ qspiinfo("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -1850,7 +1839,7 @@ static void qspi_setmode(struct qspi_dev_s *dev, enum qspi_mode_e mode)
return;
}
- qspivdbg("mode=%d\n", mode);
+ qspiinfo("mode=%d\n", mode);
/* Has the mode changed? */
@@ -1880,14 +1869,14 @@ static void qspi_setmode(struct qspi_dev_s *dev, enum qspi_mode_e mode)
case QSPIDEV_MODE1: /* CPOL=0; CPHA=1 */
case QSPIDEV_MODE2: /* CPOL=1; CPHA=0 */
- qspivdbg("unsupported mode=%d\n", mode);
+ qspiinfo("unsupported mode=%d\n", mode);
default:
DEBUGASSERT(FALSE);
return;
}
qspi_putreg(priv, regval, STM32L4_QUADSPI_DCR);
- qspivdbg("DCR=%08x\n", regval);
+ qspiinfo("DCR=%08x\n", regval);
/* Save the mode so that subsequent re-configurations will be faster */
@@ -1917,7 +1906,7 @@ static void qspi_setbits(struct qspi_dev_s *dev, int nbits)
if (8 != nbits)
{
- qspivdbg("unsupported nbits=%d\n", nbits);
+ qspiinfo("unsupported nbits=%d\n", nbits);
DEBUGASSERT(FALSE);
}
}
@@ -2456,7 +2445,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
/* The STM32L4 has only a single QSPI port */
- qspivdbg("intf: %d\n", intf);
+ qspiinfo("intf: %d\n", intf);
DEBUGASSERT(intf == 0);
/* Select the QSPI interface */
@@ -2497,7 +2486,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
}
else
{
- qspidbg("ERROR: QSPI%d not supported\n", intf);
+ qspierr("ERROR: QSPI%d not supported\n", intf);
return NULL;
}
@@ -2520,7 +2509,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
priv->dmach = stm32l4_dmachannel(DMACHAN_QUADSPI);
if (!priv->dmach)
{
- qspidbg("ERROR: Failed to allocate the DMA channel\n");
+ qspierr("ERROR: Failed to allocate the DMA channel\n");
priv->candma = false;
}
}
@@ -2536,7 +2525,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
priv->dmadog = wd_create();
if (priv->dmadog == NULL)
{
- qspidbg("ERROR: Failed to create wdog\n");
+ qspierr("ERROR: Failed to create wdog\n");
goto errout_with_dmahandles;
}
#endif
@@ -2547,7 +2536,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
ret = irq_attach(priv->irq, priv->handler);
if (ret < 0)
{
- qspidbg("ERROR: Failed to attach irq %d\n", priv->irq);
+ qspierr("ERROR: Failed to attach irq %d\n", priv->irq);
goto errout_with_dmadog;
}
@@ -2564,7 +2553,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
ret = qspi_hw_initialize(priv);
if (ret < 0)
{
- qspidbg("ERROR: Failed to initialize QSPI hardware\n");
+ qspierr("ERROR: Failed to initialize QSPI hardware\n");
goto errout_with_irq;
}
diff --git a/arch/arm/src/stm32l4/stm32l4_rng.c b/arch/arm/src/stm32l4/stm32l4_rng.c
index b82c42fdc20a96b8dfdd3563c15f21a1d3ac9611..2a27348bee963435451ea762a7037b14ae892042 100644
--- a/arch/arm/src/stm32l4/stm32l4_rng.c
+++ b/arch/arm/src/stm32l4/stm32l4_rng.c
@@ -107,7 +107,7 @@ static const struct file_operations g_rngops =
static int stm32l4_rnginitialize(void)
{
- vdbg("Initializing RNG\n");
+ info("Initializing RNG\n");
memset(&g_rngdev, 0, sizeof(struct rng_dev_s));
@@ -117,7 +117,7 @@ static int stm32l4_rnginitialize(void)
{
/* We could not attach the ISR to the interrupt */
- vdbg("Could not attach IRQ.\n");
+ info("Could not attach IRQ.\n");
return -EAGAIN;
}
diff --git a/arch/arm/src/stm32l4/stm32l4_rtcc.c b/arch/arm/src/stm32l4/stm32l4_rtcc.c
index eab4fa45e8103d08423db232406fbdfd3f48cc92..d2d055fcbdb7333836eee85c9043ad863951c752 100644
--- a/arch/arm/src/stm32l4/stm32l4_rtcc.c
+++ b/arch/arm/src/stm32l4/stm32l4_rtcc.c
@@ -83,7 +83,7 @@
# error "CONFIG_STM32L4_PWR must selected to use this driver"
#endif
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_RTC
#endif
@@ -119,15 +119,15 @@
/* Debug ****************************************************************************/
#ifdef CONFIG_DEBUG_RTC
-# define rtcdbg dbg
-# define rtcvdbg vdbg
-# define rtclldbg lldbg
-# define rtcllvdbg llvdbg
+# define rtcerr err
+# define rtcinfo info
+# define rtcllerr llerr
+# define rtcllinfo llinfo
#else
-# define rtcdbg(x...)
-# define rtcvdbg(x...)
-# define rtclldbg(x...)
-# define rtcllvdbg(x...)
+# define rtcerr(x...)
+# define rtcinfo(x...)
+# define rtcllerr(x...)
+# define rtcllinfo(x...)
#endif
/************************************************************************************
@@ -194,24 +194,24 @@ static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg);
#ifdef CONFIG_DEBUG_RTC
static void rtc_dumpregs(FAR const char *msg)
{
- rtclldbg("%s:\n", msg);
- rtclldbg(" TR: %08x\n", getreg32(STM32L4_RTC_TR));
- rtclldbg(" DR: %08x\n", getreg32(STM32L4_RTC_DR));
- rtclldbg(" CR: %08x\n", getreg32(STM32L4_RTC_CR));
- rtclldbg(" ISR: %08x\n", getreg32(STM32L4_RTC_ISR));
- rtclldbg(" PRER: %08x\n", getreg32(STM32L4_RTC_PRER));
- rtclldbg(" WUTR: %08x\n", getreg32(STM32L4_RTC_WUTR));
+ rtcllerr("%s:\n", msg);
+ rtcllerr(" TR: %08x\n", getreg32(STM32L4_RTC_TR));
+ rtcllerr(" DR: %08x\n", getreg32(STM32L4_RTC_DR));
+ rtcllerr(" CR: %08x\n", getreg32(STM32L4_RTC_CR));
+ rtcllerr(" ISR: %08x\n", getreg32(STM32L4_RTC_ISR));
+ rtcllerr(" PRER: %08x\n", getreg32(STM32L4_RTC_PRER));
+ rtcllerr(" WUTR: %08x\n", getreg32(STM32L4_RTC_WUTR));
- rtclldbg(" ALRMAR: %08x\n", getreg32(STM32L4_RTC_ALRMAR));
- rtclldbg(" ALRMBR: %08x\n", getreg32(STM32L4_RTC_ALRMBR));
- rtclldbg(" SHIFTR: %08x\n", getreg32(STM32L4_RTC_SHIFTR));
- rtclldbg(" TSTR: %08x\n", getreg32(STM32L4_RTC_TSTR));
- rtclldbg(" TSDR: %08x\n", getreg32(STM32L4_RTC_TSDR));
- rtclldbg(" TSSSR: %08x\n", getreg32(STM32L4_RTC_TSSSR));
- rtclldbg(" CALR: %08x\n", getreg32(STM32L4_RTC_CALR));
- rtclldbg(" TAMPCR: %08x\n", getreg32(STM32L4_RTC_TAMPCR));
- rtclldbg("ALRMASSR: %08x\n", getreg32(STM32L4_RTC_ALRMASSR));
- rtclldbg("ALRMBSSR: %08x\n", getreg32(STM32L4_RTC_ALRMBSSR));
+ rtcllerr(" ALRMAR: %08x\n", getreg32(STM32L4_RTC_ALRMAR));
+ rtcllerr(" ALRMBR: %08x\n", getreg32(STM32L4_RTC_ALRMBR));
+ rtcllerr(" SHIFTR: %08x\n", getreg32(STM32L4_RTC_SHIFTR));
+ rtcllerr(" TSTR: %08x\n", getreg32(STM32L4_RTC_TSTR));
+ rtcllerr(" TSDR: %08x\n", getreg32(STM32L4_RTC_TSDR));
+ rtcllerr(" TSSSR: %08x\n", getreg32(STM32L4_RTC_TSSSR));
+ rtcllerr(" CALR: %08x\n", getreg32(STM32L4_RTC_CALR));
+ rtcllerr(" TAMPCR: %08x\n", getreg32(STM32L4_RTC_TAMPCR));
+ rtcllerr("ALRMASSR: %08x\n", getreg32(STM32L4_RTC_ALRMASSR));
+ rtcllerr("ALRMBSSR: %08x\n", getreg32(STM32L4_RTC_ALRMBSSR));
}
#else
# define rtc_dumpregs(msg)
@@ -234,16 +234,16 @@ static void rtc_dumpregs(FAR const char *msg)
#ifdef CONFIG_DEBUG_RTC
static void rtc_dumptime(FAR const struct tm *tp, FAR const char *msg)
{
- rtclldbg("%s:\n", msg);
+ rtcllerr("%s:\n", msg);
#if 0
- rtclldbg(" tm_sec: %08x\n", tp->tm_sec);
- rtclldbg(" tm_min: %08x\n", tp->tm_min);
- rtclldbg(" tm_hour: %08x\n", tp->tm_hour);
- rtclldbg(" tm_mday: %08x\n", tp->tm_mday);
- rtclldbg(" tm_mon: %08x\n", tp->tm_mon);
- rtclldbg(" tm_year: %08x\n", tp->tm_year);
+ rtcllerr(" tm_sec: %08x\n", tp->tm_sec);
+ rtcllerr(" tm_min: %08x\n", tp->tm_min);
+ rtcllerr(" tm_hour: %08x\n", tp->tm_hour);
+ rtcllerr(" tm_mday: %08x\n", tp->tm_mday);
+ rtcllerr(" tm_mon: %08x\n", tp->tm_mon);
+ rtcllerr(" tm_year: %08x\n", tp->tm_year);
#else
- rtclldbg(" tm: %04d-%02d-%02d %02d:%02d:%02d\n",
+ rtcllerr(" tm: %04d-%02d-%02d %02d:%02d:%02d\n",
tp->tm_year+1900, tp->tm_mon+1, tp->tm_mday,
tp->tm_hour, tp->tm_min, tp->tm_sec);
#endif
@@ -750,7 +750,7 @@ static int rtchw_set_alrmar(rtc_alarmreg_t alarmreg)
putreg32(alarmreg, STM32L4_RTC_ALRMAR);
putreg32(0, STM32L4_RTC_ALRMASSR);
- rtcvdbg(" TR: %08x ALRMAR: %08x\n",
+ rtcinfo(" TR: %08x ALRMAR: %08x\n",
getreg32(STM32L4_RTC_TR), getreg32(STM32L4_RTC_ALRMAR));
/* Enable RTC alarm A */
@@ -796,7 +796,7 @@ static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg)
putreg32(alarmreg, STM32L4_RTC_ALRMBR);
putreg32(0, STM32L4_RTC_ALRMBSSR);
- rtcvdbg(" TR: %08x ALRMBR: %08x\n",
+ rtcinfo(" TR: %08x ALRMBR: %08x\n",
getreg32(STM32L4_RTC_TR), getreg32(STM32L4_RTC_ALRMBR));
/* Enable RTC alarm B */
@@ -1309,7 +1309,7 @@ int stm32l4_rtc_setalarm(FAR struct alm_setalarm_s *alminfo)
break;
default:
- rtcvdbg("ERROR: Invalid ALARM%d\n", alminfo->as_id);
+ rtcinfo("ERROR: Invalid ALARM%d\n", alminfo->as_id);
break;
}
@@ -1409,7 +1409,7 @@ int stm32l4_rtc_cancelalarm(enum alm_id_e alarmid)
break;
default:
- rtcvdbg("ERROR: Invalid ALARM%d\n", alarmid);
+ rtcinfo("ERROR: Invalid ALARM%d\n", alarmid);
break;
}
diff --git a/arch/arm/src/stm32l4/stm32l4_spi.c b/arch/arm/src/stm32l4/stm32l4_spi.c
index b6907d5955bf64440470175d6bcee956d893506c..d64e7d5ccfdafcc7ec3a3408716ab4cca33a6dff 100644
--- a/arch/arm/src/stm32l4/stm32l4_spi.c
+++ b/arch/arm/src/stm32l4/stm32l4_spi.c
@@ -136,25 +136,17 @@
#define SPI_TXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_16BITS |DMA_CCR_DIR)
#define SPI_TXDMA8NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_DIR)
-
/* Debug ****************************************************************************/
-/* Check if (non-standard) SPI debug is enabled */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_SPI
-#endif
+/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
/************************************************************************************
@@ -1020,7 +1012,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
* faster.
*/
- spivdbg("Frequency %d->%d\n", frequency, actual);
+ spiinfo("Frequency %d->%d\n", frequency, actual);
priv->frequency = frequency;
priv->actual = actual;
@@ -1050,7 +1042,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
uint16_t setbits;
uint16_t clrbits;
- spivdbg("mode=%d\n", mode);
+ spiinfo("mode=%d\n", mode);
/* Has the mode changed? */
@@ -1117,7 +1109,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
uint16_t clrbits1, clrbits2;
int savbits = nbits;
- spivdbg("nbits=%d\n", nbits);
+ spiinfo("nbits=%d\n", nbits);
/* Has the number of bits changed? */
@@ -1220,11 +1212,11 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
if (spi_16bitmode(priv))
{
- spivdbg("Sent: %04x Return: %04x Status: %02x\n", wd, ret, regval);
+ spiinfo("Sent: %04x Return: %04x Status: %02x\n", wd, ret, regval);
}
else
{
- spivdbg("Sent: %02x Return: %02x Status: %02x\n", wd, ret, regval);
+ spiinfo("Sent: %02x Return: %02x Status: %02x\n", wd, ret, regval);
}
UNUSED(regval);
@@ -1263,7 +1255,7 @@ static void spi_exchange_nodma(FAR struct spi_dev_s *dev, FAR const void *txbuff
FAR struct stm32l4_spidev_s *priv = (FAR struct stm32l4_spidev_s *)dev;
DEBUGASSERT(priv && priv->spibase);
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
/* 8- or 16-bit mode? */
@@ -1376,7 +1368,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
static uint16_t rxdummy = 0xffff;
static const uint16_t txdummy = 0xffff;
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
DEBUGASSERT(priv && priv->spibase);
/* Setup DMAs */
@@ -1419,7 +1411,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
#ifndef CONFIG_SPI_EXCHANGE
static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, size_t nwords)
{
- spivdbg("txbuffer=%p nwords=%d\n", txbuffer, nwords);
+ spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
return spi_exchange(dev, txbuffer, NULL, nwords);
}
#endif
@@ -1446,7 +1438,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, si
#ifndef CONFIG_SPI_EXCHANGE
static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, size_t nwords)
{
- spivdbg("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
+ spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
return spi_exchange(dev, NULL, rxbuffer, nwords);
}
#endif
@@ -1627,7 +1619,7 @@ FAR struct spi_dev_s *stm32l4_spibus_initialize(int bus)
else
#endif
{
- spidbg("ERROR: Unsupbused SPI bus: %d\n", bus);
+ spierr("ERROR: Unsupbused SPI bus: %d\n", bus);
return NULL;
}
diff --git a/arch/arm/src/stm32l4/stm32l4_start.c b/arch/arm/src/stm32l4/stm32l4_start.c
index 6209cde5418671e0ef56e5dbba093496c1bb43fd..1c391851b4bb4bfb91aa9f647a94c179dda371d7 100644
--- a/arch/arm/src/stm32l4/stm32l4_start.c
+++ b/arch/arm/src/stm32l4/stm32l4_start.c
@@ -120,7 +120,7 @@ static void go_os_start(void *pv, unsigned int nbytes)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# define showprogress(c) up_lowputc(c)
#else
# define showprogress(c)
diff --git a/arch/arm/src/stm32l4/stm32l4x6xx_dma.c b/arch/arm/src/stm32l4/stm32l4x6xx_dma.c
index eb91e3a7547f819e081465c99ab6f2cd33f8a21d..e854d32261fa930344f47949d400d726594304db 100644
--- a/arch/arm/src/stm32l4/stm32l4x6xx_dma.c
+++ b/arch/arm/src/stm32l4/stm32l4x6xx_dma.c
@@ -762,13 +762,13 @@ void stm32l4_dmadump(DMA_HANDLE handle, const struct stm32l4_dmaregs_s *regs,
struct stm32l4_dma_s *dmach = (struct stm32l4_dma_s *)handle;
uint32_t dmabase = DMA_BASE(dmach->base);
- dmadbg("DMA Registers: %s\n", msg);
- dmadbg(" ISR[%08x]: %08x\n", dmabase + STM32L4_DMA_ISR_OFFSET, regs->isr);
- dmadbg(" CSELR[%08x]: %08x\n", dmabase + STM32L4_DMA_CSELR_OFFSET, regs->cselr);
- dmadbg(" CCR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CCR_OFFSET, regs->ccr);
- dmadbg(" CNDTR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CNDTR_OFFSET, regs->cndtr);
- dmadbg(" CPAR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CPAR_OFFSET, regs->cpar);
- dmadbg(" CMAR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CMAR_OFFSET, regs->cmar);
+ dmaerr("DMA Registers: %s\n", msg);
+ dmaerr(" ISR[%08x]: %08x\n", dmabase + STM32L4_DMA_ISR_OFFSET, regs->isr);
+ dmaerr(" CSELR[%08x]: %08x\n", dmabase + STM32L4_DMA_CSELR_OFFSET, regs->cselr);
+ dmaerr(" CCR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CCR_OFFSET, regs->ccr);
+ dmaerr(" CNDTR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CNDTR_OFFSET, regs->cndtr);
+ dmaerr(" CPAR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CPAR_OFFSET, regs->cpar);
+ dmaerr(" CMAR[%08x]: %08x\n", dmach->base + STM32L4_DMACHAN_CMAR_OFFSET, regs->cmar);
}
#endif
diff --git a/arch/arm/src/str71x/str71x_decodeirq.c b/arch/arm/src/str71x/str71x_decodeirq.c
index c908ae9e3a10110eb97cdf37f4b2db391325ac4f..bdf8015e9122cdd2a3f9ba372bbfe9e09408c93d 100644
--- a/arch/arm/src/str71x/str71x_decodeirq.c
+++ b/arch/arm/src/str71x/str71x_decodeirq.c
@@ -132,7 +132,7 @@ void up_decodeirq(uint32_t *regs)
CURRENT_REGS = savestate;
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
else
{
PANIC(); /* Normally never happens */
diff --git a/arch/arm/src/str71x/str71x_head.S b/arch/arm/src/str71x/str71x_head.S
index 6a299e8911bb182a95247a80e5447fbc2f9e077a..c35715e02d21e5010ca74a170e2a5b8803573420 100644
--- a/arch/arm/src/str71x/str71x_head.S
+++ b/arch/arm/src/str71x/str71x_head.S
@@ -67,7 +67,7 @@
#ifdef CONFIG_ARCH_LEDS
.globl board_autoled_initialize /* Boot LED setup */
#endif
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.globl up_lowputc /* Low-level debug output */
#endif
.globl os_start /* NuttX entry point */
@@ -86,7 +86,7 @@
*****************************************************************************/
.macro showprogress, code
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
mov r0, #\code
bl up_lowputc
#endif
diff --git a/arch/arm/src/tiva/Kconfig b/arch/arm/src/tiva/Kconfig
index 20be1413092ef246f9b924e31c8a3e535fa4f4ef..5cda5b394d44171fefb75bda09e9d328ad40651d 100644
--- a/arch/arm/src/tiva/Kconfig
+++ b/arch/arm/src/tiva/Kconfig
@@ -783,7 +783,7 @@ config TIVA_I2C_HIGHSPEED
config TIVA_I2C_REGDEBUG
bool "Register level debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
Enables extremely detailed register access debug output.
@@ -840,7 +840,7 @@ endif # TIVA_TIMER_16BIT
config TIVA_TIMER_REGDEBUG
bool "Register level debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
Enables extremely detailed register access debug output.
@@ -853,7 +853,7 @@ menu "ADC Configuration"
config TIVA_ADC_REGDEBUG
bool "Register level debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
Enables extremely detailed register access debug output.
@@ -1103,9 +1103,9 @@ config TIVA_EMAC_HWCHECKSUM
config TIVA_ETHERNET_REGDEBUG
bool "Register-Level Debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
---help---
- Enable very low-level register access debug. Depends on DEBUG.
+ Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES.
endmenu # Tiva Ethernet Configuration
diff --git a/arch/arm/src/tiva/chip/tm4c129_syscontrol.h b/arch/arm/src/tiva/chip/tm4c129_syscontrol.h
index 5a4886ec6ccddbd8616bc30cda29bd6b2404ae19..928be38e95adaec1f6447b1c172098ca25060e9b 100644
--- a/arch/arm/src/tiva/chip/tm4c129_syscontrol.h
+++ b/arch/arm/src/tiva/chip/tm4c129_syscontrol.h
@@ -254,7 +254,7 @@
#define TIVA_SYSCON_UNIQUEID2_OFFSET 0x0f28 /* Unique ID 2 */
#define TIVA_SYSCON_UNIQUEID3_OFFSET 0x0f2c /* Unique ID 3 */
-/*( CCM System Control Registers (CCM Control Offset) */
+/* CCM System Control Registers (CCM Control Offset) */
#define TIVA_SYSCON_CCMCGREQ_OFFSET 0x0204 /* Cryptographic Modules Clock Gating Request */
diff --git a/arch/arm/src/tiva/lm3s_ethernet.c b/arch/arm/src/tiva/lm3s_ethernet.c
index 0acaeb3c07b5c8a4cd44baa95b97601df7696ace..bc22d7439d9af1c958906df413bddbefdec901a4 100644
--- a/arch/arm/src/tiva/lm3s_ethernet.c
+++ b/arch/arm/src/tiva/lm3s_ethernet.c
@@ -333,7 +333,7 @@ static void tiva_ethreset(struct tiva_driver_s *priv)
regval = getreg32(TIVA_SYSCON_RCGC2);
regval |= (SYSCON_RCGC2_EMAC0 | SYSCON_RCGC2_EPHY0);
putreg32(regval, TIVA_SYSCON_RCGC2);
- nllvdbg("RCGC2: %08x\n", regval);
+ nllinfo("RCGC2: %08x\n", regval);
/* Put the Ethernet controller into the reset state */
@@ -349,7 +349,7 @@ static void tiva_ethreset(struct tiva_driver_s *priv)
regval &= ~(SYSCON_SRCR2_EMAC0 | SYSCON_SRCR2_EPHY0);
putreg32(regval, TIVA_SYSCON_SRCR2);
- nllvdbg("SRCR2: %08x\n", regval);
+ nllinfo("SRCR2: %08x\n", regval);
/* Wait just a bit, again. If we touch the ethernet too soon, we may busfault. */
@@ -495,7 +495,7 @@ static int tiva_transmit(struct tiva_driver_s *priv)
*/
pktlen = priv->ld_dev.d_len;
- nllvdbg("Sending packet, pktlen: %d\n", pktlen);
+ nllinfo("Sending packet, pktlen: %d\n", pktlen);
DEBUGASSERT(pktlen > ETH_HDRLEN);
dbuf = priv->ld_dev.d_buf;
@@ -584,7 +584,7 @@ static int tiva_txpoll(struct net_driver_s *dev)
* the field d_len is set to a value > 0.
*/
- nllvdbg("Poll result: d_len=%d\n", priv->ld_dev.d_len);
+ nllinfo("Poll result: d_len=%d\n", priv->ld_dev.d_len);
if (priv->ld_dev.d_len > 0)
{
DEBUGASSERT((tiva_ethin(priv, TIVA_MAC_TR_OFFSET) & MAC_TR_NEWTX) == 0);
@@ -672,7 +672,7 @@ static void tiva_receive(struct tiva_driver_s *priv)
regval = tiva_ethin(priv, TIVA_MAC_DATA_OFFSET);
pktlen = (int)(regval & 0x0000ffff);
- nllvdbg("Receiving packet, pktlen: %d\n", pktlen);
+ nllinfo("Receiving packet, pktlen: %d\n", pktlen);
/* Check if the pktlen is valid. It should be large enough to hold
* an Ethernet header and small enough to fit entirely in the I/O
@@ -686,7 +686,7 @@ static void tiva_receive(struct tiva_driver_s *priv)
/* We will have to drop this packet */
- nlldbg("Bad packet size dropped (%d)\n", pktlen);
+ nllerr("Bad packet size dropped (%d)\n", pktlen);
NETDEV_RXERRORS(&priv->ld_dev);
/* The number of bytes and words left to read is pktlen - 4 (including,
@@ -770,7 +770,7 @@ static void tiva_receive(struct tiva_driver_s *priv)
#ifdef CONFIG_NET_IPv4
if (ETHBUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
NETDEV_RXIPV4(&priv->ld_dev);
/* Handle ARP on input then give the IPv4 packet to the network
@@ -811,7 +811,7 @@ static void tiva_receive(struct tiva_driver_s *priv)
#ifdef CONFIG_NET_IPv6
if (ETHBUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
NETDEV_RXIPV6(&priv->ld_dev);
/* Give the IPv6 packet to the network layer */
@@ -850,7 +850,7 @@ static void tiva_receive(struct tiva_driver_s *priv)
#ifdef CONFIG_NET_ARP
if (ETHBUF->type == htons(ETHTYPE_ARP))
{
- nllvdbg("ARP packet received (%02x)\n", ETHBUF->type);
+ nllinfo("ARP packet received (%02x)\n", ETHBUF->type);
NETDEV_RXARP(&priv->ld_dev);
arp_arpin(&priv->ld_dev);
@@ -867,7 +867,7 @@ static void tiva_receive(struct tiva_driver_s *priv)
else
#endif
{
- nlldbg("Unsupported packet type dropped (%02x)\n", htons(ETHBUF->type));
+ nllerr("Unsupported packet type dropped (%02x)\n", htons(ETHBUF->type));
NETDEV_RXDROPPED(&priv->ld_dev);
}
}
@@ -1024,7 +1024,7 @@ static void tiva_txtimeout(int argc, uint32_t arg, ...)
/* Increment statistics */
- nlldbg("Tx timeout\n");
+ nllerr("Tx timeout\n");
NETDEV_TXTIMEOUTS(&priv->ld_dev);
/* Then reset the hardware */
@@ -1104,7 +1104,7 @@ static int tiva_ifup(struct net_driver_s *dev)
uint32_t div;
uint16_t phyreg;
- nlldbg("Bringing up: %d.%d.%d.%d\n",
+ nllerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
@@ -1125,7 +1125,7 @@ static int tiva_ifup(struct net_driver_s *dev)
div = SYSCLK_FREQUENCY / 2 / TIVA_MAX_MDCCLK;
tiva_ethout(priv, TIVA_MAC_MDV_OFFSET, div);
- nllvdbg("MDV: %08x\n", div);
+ nllinfo("MDV: %08x\n", div);
/* Then configure the Ethernet Controller for normal operation
*
@@ -1137,7 +1137,7 @@ static int tiva_ifup(struct net_driver_s *dev)
regval &= ~TIVA_TCTCL_CLRBITS;
regval |= TIVA_TCTCL_SETBITS;
tiva_ethout(priv, TIVA_MAC_TCTL_OFFSET, regval);
- nllvdbg("TCTL: %08x\n", regval);
+ nllinfo("TCTL: %08x\n", regval);
/* Setup the receive control register (Disable multicast frames, disable
* promiscuous mode, disable bad CRC rejection).
@@ -1147,7 +1147,7 @@ static int tiva_ifup(struct net_driver_s *dev)
regval &= ~TIVA_RCTCL_CLRBITS;
regval |= TIVA_RCTCL_SETBITS;
tiva_ethout(priv, TIVA_MAC_RCTL_OFFSET, regval);
- nllvdbg("RCTL: %08x\n", regval);
+ nllinfo("RCTL: %08x\n", regval);
/* Setup the time stamp configuration register */
@@ -1159,7 +1159,7 @@ static int tiva_ifup(struct net_driver_s *dev)
regval &= ~(MAC_TS_EN);
#endif
tiva_ethout(priv, TIVA_MAC_TS_OFFSET, regval);
- nllvdbg("TS: %08x\n", regval);
+ nllinfo("TS: %08x\n", regval);
#endif
/* Wait for the link to come up. This following is not very conservative
@@ -1168,13 +1168,13 @@ static int tiva_ifup(struct net_driver_s *dev)
* set
*/
- nlldbg("Waiting for link\n");
+ nllerr("Waiting for link\n");
do
{
phyreg = tiva_phyread(priv, MII_MSR);
}
while ((phyreg & MII_MSR_LINKSTATUS) == 0);
- nlldbg("Link established\n");
+ nllerr("Link established\n");
/* Reset the receive FIFO */
@@ -1258,7 +1258,7 @@ static int tiva_ifdown(struct net_driver_s *dev)
irqstate_t flags;
uint32_t regval;
- nlldbg("Taking down: %d.%d.%d.%d\n",
+ nllerr("Taking down: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
@@ -1455,7 +1455,7 @@ static inline int tiva_ethinitialize(int intf)
/* Check if the Ethernet module is present */
- ndbg("Setting up eth%d\n", intf);
+ nerr("Setting up eth%d\n", intf);
#if TIVA_NETHCONTROLLERS > 1
# error "This debug check only works with one interface"
diff --git a/arch/arm/src/tiva/tiva_adc.h b/arch/arm/src/tiva/tiva_adc.h
index 693252ad35d219a3470530cd743652c107fe02c2..7f6edd4f9d8b741146a22623f2c3f6fe06c3d9d3 100644
--- a/arch/arm/src/tiva/tiva_adc.h
+++ b/arch/arm/src/tiva/tiva_adc.h
@@ -52,7 +52,7 @@
* Pre-processor Definitions
****************************************************************************/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_TIVA_ADC_REGDEBUG
#endif
diff --git a/arch/arm/src/tiva/tiva_adclib.c b/arch/arm/src/tiva/tiva_adclib.c
index 64fb93552d25b409a0af644faef10427edcd6489..8376e51cc8b1c22843ba0cba17135db257aa2fd8 100644
--- a/arch/arm/src/tiva/tiva_adclib.c
+++ b/arch/arm/src/tiva/tiva_adclib.c
@@ -209,7 +209,7 @@ void tiva_adc_one_time_init(uint32_t clock, uint8_t sample_rate)
static bool one_time_init = false;
#ifdef CONFIG_DEBUG_ANALOG
- avdbg("setting clock=%d MHz sample rate=%d\n",
+ ainfo("setting clock=%d MHz sample rate=%d\n",
clock, sample_rate);
#endif
@@ -219,7 +219,7 @@ void tiva_adc_one_time_init(uint32_t clock, uint8_t sample_rate)
if (one_time_init == false)
{
- avdbg("performing ADC one-time initialization...\n");
+ ainfo("performing ADC one-time initialization...\n");
/* set clock */
tiva_adc_clock(clock);
@@ -238,7 +238,7 @@ void tiva_adc_one_time_init(uint32_t clock, uint8_t sample_rate)
#ifdef CONFIG_DEBUG_ANALOG
else
{
- avdbg("one time initialization previously completed\n");
+ ainfo("one time initialization previously completed\n");
}
#endif
}
@@ -257,7 +257,7 @@ void tiva_adc_configure(struct tiva_adc_cfg_s *cfg)
uint8_t s;
uint8_t c;
- avdbg("configure ADC%d...\n", cfg->adc);
+ ainfo("configure ADC%d...\n", cfg->adc);
/* Configure each SSE */
@@ -270,7 +270,7 @@ void tiva_adc_configure(struct tiva_adc_cfg_s *cfg)
#ifdef CONFIG_DEBUG_ANALOG
else
{
- avdbg("ADC%d SSE%d has no configuration\n", cfg->adc, s);
+ ainfo("ADC%d SSE%d has no configuration\n", cfg->adc, s);
}
#endif
}
@@ -298,9 +298,9 @@ void tiva_adc_configure(struct tiva_adc_cfg_s *cfg)
void tiva_adc_sse_cfg(uint8_t adc, uint8_t sse,
struct tiva_adc_sse_cfg_s *ssecfg)
{
- avdbg("configure ADC%d SSE%d...\n", adc, sse);
+ ainfo("configure ADC%d SSE%d...\n", adc, sse);
#ifdef CONFIG_DEBUG_ANALOG
- avdbg("priority=%d trigger=%d...\n", ssecfg->priority, ssecfg->trigger);
+ ainfo("priority=%d trigger=%d...\n", ssecfg->priority, ssecfg->trigger);
#endif
uint8_t priority = ssecfg->priority;
@@ -327,7 +327,7 @@ void tiva_adc_sse_cfg(uint8_t adc, uint8_t sse,
void tiva_adc_step_cfg(struct tiva_adc_step_cfg_s *stepcfg)
{
#ifdef CONFIG_DEBUG_ANALOG
- avdbg(" shold=0x%02x flags=0x%02x ain=%d...\n",
+ ainfo(" shold=0x%02x flags=0x%02x ain=%d...\n",
stepcfg->shold, stepcfg->flags, stepcfg->ain);
#endif
@@ -341,7 +341,7 @@ void tiva_adc_step_cfg(struct tiva_adc_step_cfg_s *stepcfg)
uint8_t ain = stepcfg->ain;
uint32_t gpio = ain2gpio[stepcfg->ain];
- avdbg("configure ADC%d SSE%d STEP%d...\n", adc, sse, step);
+ ainfo("configure ADC%d SSE%d STEP%d...\n", adc, sse, step);
/* Configure the AIN GPIO for analog input if not flagged to be muxed to
* the internal temperature sensor
@@ -410,14 +410,14 @@ void tiva_adc_irq_attach(uint8_t adc, uint8_t sse, xcpt_t isr)
int irq = sse2irq[SSE_IDX(adc, sse)];
#ifdef CONFIG_DEBUG_ANALOG
- avdbg("assigning ISR=0x%p to ADC%d SSE%d IRQ=0x%02x...\n",
+ ainfo("assigning ISR=0x%p to ADC%d SSE%d IRQ=0x%02x...\n",
isr, adc, sse, irq);
#endif
ret = irq_attach(irq, isr);
if (ret < 0)
{
- adbg("ERROR: Failed to attach IRQ %d: %d\n", irq, ret);
+ aerr("ERROR: Failed to attach IRQ %d: %d\n", irq, ret);
return;
}
@@ -446,7 +446,7 @@ void tiva_adc_irq_detach(uint8_t adc, uint8_t sse)
ret = irq_detach(irq);
if (ret < 0)
{
- adbg("ERROR: Failed to detach IRQ %d: %d\n", irq, ret);
+ aerr("ERROR: Failed to detach IRQ %d: %d\n", irq, ret);
return;
}
}
@@ -682,7 +682,7 @@ uint32_t tiva_adc_int_status(uint8_t adc)
uint8_t tiva_adc_sse_enable(uint8_t adc, uint8_t sse, bool state)
{
- avdbg("ADC%d SSE%d=%01d\n", adc, sse, state);
+ ainfo("ADC%d SSE%d=%01d\n", adc, sse, state);
uintptr_t actssreg = TIVA_ADC_ACTSS(adc);
if (state == true)
@@ -867,7 +867,7 @@ uint8_t tiva_adc_sse_data(uint8_t adc, uint8_t sse, int32_t *buf)
ssfstatreg = getreg32(TIVA_ADC_BASE(adc) + TIVA_ADC_SSFSTAT(sse));
}
- avdbg("fifo=%d\n", fifo_count);
+ ainfo("fifo=%d\n", fifo_count);
return fifo_count;
}
@@ -1086,20 +1086,20 @@ void tiva_adc_dump_reg_cfg(uint8_t adc, uint8_t sse)
/* Dump register contents */
- avdbg("CC [0x%08x]=0x%08x\n", ccreg, cc);
- avdbg("PC [0x%08x]=0x%08x\n", pcreg, pc);
- avdbg("ACTSS [0x%08x]=0x%08x\n", actssreg, actss);
- avdbg("SSPRI [0x%08x]=0x%08x\n", ssprireg, sspri);
- avdbg("EMUX [0x%08x]=0x%08x\n", emuxreg, emux);
- avdbg("SSMUX [0x%08x]=0x%08x\n", ssmuxreg, ssmux);
+ ainfo("CC [0x%08x]=0x%08x\n", ccreg, cc);
+ ainfo("PC [0x%08x]=0x%08x\n", pcreg, pc);
+ ainfo("ACTSS [0x%08x]=0x%08x\n", actssreg, actss);
+ ainfo("SSPRI [0x%08x]=0x%08x\n", ssprireg, sspri);
+ ainfo("EMUX [0x%08x]=0x%08x\n", emuxreg, emux);
+ ainfo("SSMUX [0x%08x]=0x%08x\n", ssmuxreg, ssmux);
#ifdef CONFIG_ARCH_CHIP_TM4C129
- avdbg("SSEMUX [0x%08x]=0x%08x\n", ssemuxreg, ssemux);
+ ainfo("SSEMUX [0x%08x]=0x%08x\n", ssemuxreg, ssemux);
#endif
- avdbg("SSOP [0x%08x]=0x%08x\n", ssopreg, ssop);
+ ainfo("SSOP [0x%08x]=0x%08x\n", ssopreg, ssop);
#ifdef CONFIG_EXPERIMENTAL
- avdbg("SSTSH [0x%08x]=0x%08x\n", sstshreg, sstsh);
+ ainfo("SSTSH [0x%08x]=0x%08x\n", sstshreg, sstsh);
#endif
- avdbg("SSCTL [0x%08x]=0x%08x\n", ssctlreg, ssctl);
+ ainfo("SSCTL [0x%08x]=0x%08x\n", ssctlreg, ssctl);
}
#endif /* CONFIG_DEBUG_ANALOG */
diff --git a/arch/arm/src/tiva/tiva_adclow.c b/arch/arm/src/tiva/tiva_adclow.c
index 7a0b5509ce9b22f90f4b8704c3d9107428e3fd58..809cb65b3b9424b2cfc38cde4c1a78fa56b1e187 100644
--- a/arch/arm/src/tiva/tiva_adclow.c
+++ b/arch/arm/src/tiva/tiva_adclow.c
@@ -327,7 +327,7 @@ static int tiva_adc1_sse3_interrupt(int irq, void *context)
static void tiva_adc_irqinitialize(struct tiva_adc_cfg_s *cfg)
{
- avdbg("initialize irqs for ADC%d...\n", cfg->adc);
+ ainfo("initialize irqs for ADC%d...\n", cfg->adc);
#ifdef CONFIG_TIVA_ADC0
if (cfg->adc == 0)
@@ -411,7 +411,7 @@ static int tiva_adc_bind(FAR struct adc_dev_s *dev,
static void tiva_adc_reset(struct adc_dev_s *dev)
{
- avdbg("Resetting...\n");
+ ainfo("Resetting...\n");
struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
struct tiva_adc_sse_s *sse;
@@ -443,7 +443,7 @@ static void tiva_adc_reset(struct adc_dev_s *dev)
static int tiva_adc_setup(struct adc_dev_s *dev)
{
- avdbg("Setup\n");
+ ainfo("Setup\n");
struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
struct tiva_adc_sse_s *sse;
@@ -477,7 +477,7 @@ static int tiva_adc_setup(struct adc_dev_s *dev)
static void tiva_adc_shutdown(struct adc_dev_s *dev)
{
struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
- avdbg("Shutdown\n");
+ ainfo("Shutdown\n");
DEBUGASSERT(priv->ena);
@@ -512,7 +512,7 @@ static void tiva_adc_shutdown(struct adc_dev_s *dev)
static void tiva_adc_rxint(struct adc_dev_s *dev, bool enable)
{
- avdbg("RXINT=%d\n", enable);
+ ainfo("RXINT=%d\n", enable);
struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv;
struct tiva_adc_sse_s *sse;
@@ -552,7 +552,7 @@ static int tiva_adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg)
{
int ret = OK;
- avdbg("cmd=%d arg=%ld\n", cmd, arg);
+ ainfo("cmd=%d arg=%ld\n", cmd, arg);
switch (cmd)
{
@@ -686,7 +686,7 @@ static void tiva_adc_read(void *arg)
* and should cause a full system stop.
*/
- alldbg("PANIC!!! Invalid ADC device number given %d\n", sse->adc);
+ allerr("PANIC!!! Invalid ADC device number given %d\n", sse->adc);
PANIC();
return;
}
@@ -704,7 +704,7 @@ static void tiva_adc_read(void *arg)
priv->cb->au_receive(dev,
tiva_adc_get_ain(sse->adc, sse->num, i),
buf[i]);
- avdbg("AIN%d = 0x%04x\n",
+ ainfo("AIN%d = 0x%04x\n",
tiva_adc_get_ain(sse->adc, sse->num, i), buf[i]);
}
}
@@ -753,7 +753,7 @@ static void tiva_adc_interrupt(struct tiva_adc_sse_s *sse)
ret = work_queue(HPWORK, &sse->work, tiva_adc_read, sse, 0);
if (ret != 0)
{
- adbg("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
+ aerr("ERROR: Failed to queue work: %d ADC.SSE: %d.%d\n",
ret, sse->adc, sse->num);
}
}
@@ -832,9 +832,9 @@ static struct tiva_adc_s *tiva_adc_struct_init(struct tiva_adc_cfg_s *cfg)
}
tiva_adc_struct_init_error:
- avdbg("Invalid ADC device number: expected=%d actual=%d\n",
+ ainfo("Invalid ADC device number: expected=%d actual=%d\n",
0, cfg->adc);
- avdbg("ADC%d (CONFIG_TIVA_ADC%d) must be enabled in Kconfig first!",
+ ainfo("ADC%d (CONFIG_TIVA_ADC%d) must be enabled in Kconfig first!",
cfg->adc, cfg->adc);
return NULL;
@@ -872,14 +872,14 @@ int tiva_adc_initialize(const char *devpath, struct tiva_adc_cfg_s *cfg,
struct tiva_adc_s *adc;
int ret = 0;
- avdbg("initializing...\n");
+ ainfo("initializing...\n");
/* Initialize the private ADC device data structure */
adc = tiva_adc_struct_init(cfg);
if (adc == NULL)
{
- adbg("Invalid ADC device number: expected=%d actual=%d\n",
+ aerr("Invalid ADC device number: expected=%d actual=%d\n",
0, cfg->adc);
return -ENODEV;
}
@@ -888,7 +888,7 @@ int tiva_adc_initialize(const char *devpath, struct tiva_adc_cfg_s *cfg,
if (tiva_adc_enable(adc->devno, true) < 0)
{
- adbg("ERROR: failure to power ADC peripheral (devno=%d)\n",
+ aerr("ERROR: failure to power ADC peripheral (devno=%d)\n",
cfg->adc);
return ret;
}
@@ -912,20 +912,20 @@ int tiva_adc_initialize(const char *devpath, struct tiva_adc_cfg_s *cfg,
if (adc->dev == NULL)
{
- adbg("ERROR: Failed to get interface %s\n", devpath);
+ aerr("ERROR: Failed to get interface %s\n", devpath);
return -ENODEV;
}
- avdbg("adc_dev_s=0x%08x\n", adc->dev);
+ ainfo("adc_dev_s=0x%08x\n", adc->dev);
/* Register the ADC driver */
- avdbg("Register the ADC driver at %s\n", devpath);
+ ainfo("Register the ADC driver at %s\n", devpath);
ret = adc_register(devpath, adc->dev);
if (ret < 0)
{
- adbg("ERROR: Failed to register %s to character driver: %d\n",
+ aerr("ERROR: Failed to register %s to character driver: %d\n",
devpath, ret);
return ret;
}
@@ -943,7 +943,7 @@ int tiva_adc_initialize(const char *devpath, struct tiva_adc_cfg_s *cfg,
void tiva_adc_lock(FAR struct tiva_adc_s *priv, int sse)
{
- avdbg("Locking...\n");
+ ainfo("Locking...\n");
struct tiva_adc_sse_s *s = g_sses[SSE_IDX(priv->devno, sse)];
int ret;
@@ -964,7 +964,7 @@ void tiva_adc_lock(FAR struct tiva_adc_s *priv, int sse)
#ifdef CONFIG_DEBUG_ANALOG
if (loop_count % 1000)
{
- avdbg("loop=%d\n");
+ ainfo("loop=%d\n");
}
++loop_count;
#endif
@@ -982,7 +982,7 @@ void tiva_adc_lock(FAR struct tiva_adc_s *priv, int sse)
void tiva_adc_unlock(FAR struct tiva_adc_s *priv, int sse)
{
- avdbg("Unlocking\n");
+ ainfo("Unlocking\n");
struct tiva_adc_sse_s *s = g_sses[SSE_IDX(priv->devno, sse)];
sem_post(&s->exclsem);
}
@@ -1002,33 +1002,33 @@ void tiva_adc_unlock(FAR struct tiva_adc_s *priv, int sse)
static void tiva_adc_runtimeobj_ptrs(void)
{
# ifdef CONFIG_TIVA_ADC0
- avdbg("ADC0 [struct] [global value] [array value]\n");
- avdbg(" adc_dev_s dev0=0x%08x g_devs[0]=0x%08x\n",
+ ainfo("ADC0 [struct] [global value] [array value]\n");
+ ainfo(" adc_dev_s dev0=0x%08x g_devs[0]=0x%08x\n",
&dev0, g_devs[0]);
- avdbg(" tiva_adc_s adc0=0x%08x g_adcs[0]=0x%08x\n",
+ ainfo(" tiva_adc_s adc0=0x%08x g_adcs[0]=0x%08x\n",
&adc0, g_adcs[0]);
- avdbg(" tiva_adc_sse_s sse0=0x%08x g_sses[0,0]=0x%08x\n",
+ ainfo(" tiva_adc_sse_s sse0=0x%08x g_sses[0,0]=0x%08x\n",
&sse00, g_sses[SSE_IDX(0, 0)]);
- avdbg(" tiva_adc_sse_s sse1=0x%08x g_sses[0,1]=0x%08x\n",
+ ainfo(" tiva_adc_sse_s sse1=0x%08x g_sses[0,1]=0x%08x\n",
&sse01, g_sses[SSE_IDX(0, 1)]);
- avdbg(" tiva_adc_sse_s sse2=0x%08x g_sses[0,2]=0x%08x\n",
+ ainfo(" tiva_adc_sse_s sse2=0x%08x g_sses[0,2]=0x%08x\n",
&sse02, g_sses[SSE_IDX(0, 2)]);
- avdbg(" tiva_adc_sse_s sse3=0x%08x g_sses[0,3]=0x%08x\n",
+ ainfo(" tiva_adc_sse_s sse3=0x%08x g_sses[0,3]=0x%08x\n",
&sse03, g_sses[SSE_IDX(0, 3)]);
# endif
# ifdef CONFIG_TIVA_ADC1
- avdbg("ADC1 [struct] [global value] [array value]\n");
- avdbg(" adc_dev_s dev1=0x%08x g_devs[1]=0x%08x\n",
+ ainfo("ADC1 [struct] [global value] [array value]\n");
+ ainfo(" adc_dev_s dev1=0x%08x g_devs[1]=0x%08x\n",
&dev1, g_devs[1]);
- avdbg(" tiva_adc_s adc1=0x%08x g_adcs[1]=0x%08x\n",
+ ainfo(" tiva_adc_s adc1=0x%08x g_adcs[1]=0x%08x\n",
&adc1, g_adcs[1]);
- avdbg(" tiva_adc_sse_s sse0=0x%08x g_sses[1,0]=0x%08x\n",
+ ainfo(" tiva_adc_sse_s sse0=0x%08x g_sses[1,0]=0x%08x\n",
&sse10, g_sses[SSE_IDX(1, 0)]);
- avdbg(" tiva_adc_sse_s sse1=0x%08x g_sses[1,1]=0x%08x\n",
+ ainfo(" tiva_adc_sse_s sse1=0x%08x g_sses[1,1]=0x%08x\n",
&sse11, g_sses[SSE_IDX(1, 1)]);
- avdbg(" tiva_adc_sse_s sse2=0x%08x g_sses[1,2]=0x%08x\n",
+ ainfo(" tiva_adc_sse_s sse2=0x%08x g_sses[1,2]=0x%08x\n",
&sse12, g_sses[SSE_IDX(1, 2)]);
- avdbg(" tiva_adc_sse_s sse3=0x%08x g_sses[1,3]=0x%08x\n",
+ ainfo(" tiva_adc_sse_s sse3=0x%08x g_sses[1,3]=0x%08x\n",
&sse13, g_sses[SSE_IDX(1, 3)]);
# endif
}
@@ -1038,24 +1038,24 @@ static void tiva_adc_runtimeobj_vals(void)
struct tiva_adc_sse_s *sse;
uint8_t s;
# ifdef CONFIG_TIVA_ADC0
- avdbg("ADC0 [0x%08x] cfg=%d ena=%d devno=%d\n",
+ ainfo("ADC0 [0x%08x] cfg=%d ena=%d devno=%d\n",
&adc0, adc0.cfg, adc0.ena, adc0.devno);
for (s = 0; s < 4; ++s)
{
sse = g_sses[SSE_IDX(0, s)];
- avdbg("SSE%d [0x%08x] adc=%d cfg=%d ena=%d num=%d\n",
+ ainfo("SSE%d [0x%08x] adc=%d cfg=%d ena=%d num=%d\n",
s, sse, sse->adc, sse->cfg, sse->ena, sse->num);
}
# endif
# ifdef CONFIG_TIVA_ADC1
- avdbg("ADC1 [0x%08x] cfg=%d ena=%d devno=%d\n",
+ ainfo("ADC1 [0x%08x] cfg=%d ena=%d devno=%d\n",
&adc1, adc1.cfg, adc1.ena, adc1.devno);
for (s = 0; s < 4; ++s)
{
sse = g_sses[SSE_IDX(1, s)];
- avdbg("SSE%d [0x%08x] adc=%d cfg=%d ena=%d num=%d\n",
+ ainfo("SSE%d [0x%08x] adc=%d cfg=%d ena=%d num=%d\n",
s, sse, sse->adc, sse->cfg, sse->ena, sse->num);
}
# endif
@@ -1072,15 +1072,15 @@ static void tiva_adc_runtimeobj_vals(void)
static void tiva_adc_dump_dev(void)
{
# ifdef CONFIG_TIVA_ADC0
- avdbg("adc_ops_s g_adcops=0x%08x adc0.dev->ad_ops=0x%08x\n",
+ ainfo("adc_ops_s g_adcops=0x%08x adc0.dev->ad_ops=0x%08x\n",
&g_adcops, adc0.dev->ad_ops);
- avdbg("tiva_adc_s adc0=0x%08x adc0.dev->ad_priv=0x%08x\n",
+ ainfo("tiva_adc_s adc0=0x%08x adc0.dev->ad_priv=0x%08x\n",
&adc0, adc0.dev->ad_priv);
# endif
# ifdef CONFIG_TIVA_ADC1
- avdbg("adc_ops_s g_adcops=0x%08x adc1.dev->ad_ops=0x%08x\n",
+ ainfo("adc_ops_s g_adcops=0x%08x adc1.dev->ad_ops=0x%08x\n",
&g_adcops, adc1.dev->ad_ops);
- avdbg("tiva_adc_s adc1=0x%08x adc1.dev->ad_priv=0x%08x\n",
+ ainfo("tiva_adc_s adc1=0x%08x adc1.dev->ad_priv=0x%08x\n",
&adc1, adc1.dev->ad_priv);
# endif
}
diff --git a/arch/arm/src/tiva/tiva_dumpgpio.c b/arch/arm/src/tiva/tiva_dumpgpio.c
index 89ae3a462b2f6da0af322c9f0e6ca8661f3f1d77..dff948c376219d04cda2a969db00c62ec1756f87 100644
--- a/arch/arm/src/tiva/tiva_dumpgpio.c
+++ b/arch/arm/src/tiva/tiva_dumpgpio.c
@@ -39,6 +39,11 @@
#include
+/* Output debug info even if debug output is not selected. */
+
+#undef CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_INFO 1
+
#include
#include
#include
@@ -136,7 +141,7 @@ static inline uint8_t tiva_gpioport(int port)
int tiva_dumpgpio(uint32_t pinset, const char *msg)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irqstate_t flags;
unsigned int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
uintptr_t base;
@@ -163,13 +168,13 @@ int tiva_dumpgpio(uint32_t pinset, const char *msg)
enabled = ((rcgc2 & SYSCON_RCGC2_GPIO(port)) != 0);
#endif
- lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
+ llinfo("GPIO%c pinset: %08x base: %08x -- %s\n",
tiva_gpioport(port), pinset, base, msg);
#ifdef TIVA_SYSCON_RCGCGPIO
- lldbg("RCGCGPIO: %08x (%s)\n",
+ llinfo("RCGCGPIO: %08x (%s)\n",
rcgcgpio, enabled ? "enabled" : "disabled");
#else
- lldbg(" RCGC2: %08x (%s)\n",
+ llinfo(" RCGC2: %08x (%s)\n",
rcgc2, enabled ? "enabled" : "disabled");
#endif
@@ -177,21 +182,21 @@ int tiva_dumpgpio(uint32_t pinset, const char *msg)
if (enabled)
{
- lldbg(" AFSEL: %02x DEN: %02x DIR: %02x DATA: %02x\n",
- getreg32(base + TIVA_GPIO_AFSEL_OFFSET), getreg32(base + TIVA_GPIO_DEN_OFFSET),
- getreg32(base + TIVA_GPIO_DIR_OFFSET), getreg32(base + TIVA_GPIO_DATA_OFFSET + 0x3fc));
- lldbg(" IS: %02x IBE: %02x IEV: %02x IM: %02x RIS: %08x MIS: %08x\n",
- getreg32(base + TIVA_GPIO_IEV_OFFSET), getreg32(base + TIVA_GPIO_IM_OFFSET),
- getreg32(base + TIVA_GPIO_RIS_OFFSET), getreg32(base + TIVA_GPIO_MIS_OFFSET));
- lldbg(" 2MA: %02x 4MA: %02x 8MA: %02x ODR: %02x PUR %02x PDR: %02x SLR: %02x\n",
- getreg32(base + TIVA_GPIO_DR2R_OFFSET), getreg32(base + TIVA_GPIO_DR4R_OFFSET),
- getreg32(base + TIVA_GPIO_DR8R_OFFSET), getreg32(base + TIVA_GPIO_ODR_OFFSET),
- getreg32(base + TIVA_GPIO_PUR_OFFSET), getreg32(base + TIVA_GPIO_PDR_OFFSET),
- getreg32(base + TIVA_GPIO_SLR_OFFSET));
+ llinfo(" AFSEL: %02x DEN: %02x DIR: %02x DATA: %02x\n",
+ getreg32(base + TIVA_GPIO_AFSEL_OFFSET), getreg32(base + TIVA_GPIO_DEN_OFFSET),
+ getreg32(base + TIVA_GPIO_DIR_OFFSET), getreg32(base + TIVA_GPIO_DATA_OFFSET + 0x3fc));
+ llinfo(" IS: %02x IBE: %02x IEV: %02x IM: %02x RIS: %08x MIS: %08x\n",
+ getreg32(base + TIVA_GPIO_IEV_OFFSET), getreg32(base + TIVA_GPIO_IM_OFFSET),
+ getreg32(base + TIVA_GPIO_RIS_OFFSET), getreg32(base + TIVA_GPIO_MIS_OFFSET));
+ llinfo(" 2MA: %02x 4MA: %02x 8MA: %02x ODR: %02x PUR %02x PDR: %02x SLR: %02x\n",
+ getreg32(base + TIVA_GPIO_DR2R_OFFSET), getreg32(base + TIVA_GPIO_DR4R_OFFSET),
+ getreg32(base + TIVA_GPIO_DR8R_OFFSET), getreg32(base + TIVA_GPIO_ODR_OFFSET),
+ getreg32(base + TIVA_GPIO_PUR_OFFSET), getreg32(base + TIVA_GPIO_PDR_OFFSET),
+ getreg32(base + TIVA_GPIO_SLR_OFFSET));
}
leave_critical_section(flags);
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
return OK;
}
diff --git a/arch/arm/src/tiva/tiva_flash.c b/arch/arm/src/tiva/tiva_flash.c
index 0dd70dd1dcb313b8f5f51f831c2c48433a6545b1..c606b1888751734f5d9a616bcee6b0dc0ac4e753 100644
--- a/arch/arm/src/tiva/tiva_flash.c
+++ b/arch/arm/src/tiva/tiva_flash.c
@@ -146,7 +146,7 @@ static int tiva_erase(FAR struct mtd_dev_s *dev, off_t startblock,
{
pageaddr = TIVA_VIRTUAL_BASE + curpage * TIVA_FLASH_PAGESIZE;
- fvdbg("Erase page at %08x\n", pageaddr);
+ finfo("Erase page at %08x\n", pageaddr);
/* set page address */
diff --git a/arch/arm/src/tiva/tiva_gpio.c b/arch/arm/src/tiva/tiva_gpio.c
index 6ce03bdae5595b1022422df19220f9b7cf19c730..4acbc6076edbd66d42dc6ad690e947bf1171c99b 100644
--- a/arch/arm/src/tiva/tiva_gpio.c
+++ b/arch/arm/src/tiva/tiva_gpio.c
@@ -734,13 +734,13 @@ static inline void tiva_interrupt(uint32_t pinset)
#ifdef CONFIG_DEBUG_GPIO
uint32_t regval;
- gpiovdbg("reg expected actual: [interrupt type=%d]\n", inttype);
+ gpioinfo("reg expected actual: [interrupt type=%d]\n", inttype);
regval = (getreg32(base+TIVA_GPIO_IS_OFFSET) & pin) ? pin : 0;
- gpiovdbg("IS 0x%08x 0x%08x\n", isset, regval);
+ gpioinfo("IS 0x%08x 0x%08x\n", isset, regval);
regval = (getreg32(base+TIVA_GPIO_IBE_OFFSET) & pin) ? pin : 0;
- gpiovdbg("IBE 0x%08x 0x%08x\n", ibeset, regval);
+ gpioinfo("IBE 0x%08x 0x%08x\n", ibeset, regval);
regval = (getreg32(base+TIVA_GPIO_IEV_OFFSET) & pin) ? pin : 0;
- gpiovdbg("IEV 0x%08x 0x%08x\n", ievset, regval);
+ gpioinfo("IEV 0x%08x 0x%08x\n", ievset, regval);
#endif
}
#endif
@@ -988,14 +988,14 @@ void tiva_gpio_lockport(uint32_t pinset, bool lock)
if (lock)
{
#ifdef CONFIG_DEBUG_GPIO
- gpiovdbg(" locking port=%d pin=%d\n", port, pinno);
+ gpioinfo(" locking port=%d pin=%d\n", port, pinno);
#endif
modifyreg32(base + TIVA_GPIO_CR_OFFSET, pinmask, 0);
}
else
{
#ifdef CONFIG_DEBUG_GPIO
- gpiovdbg("unlocking port=%d pin=%d\n", port, pinno);
+ gpioinfo("unlocking port=%d pin=%d\n", port, pinno);
#endif
modifyreg32(base + TIVA_GPIO_CR_OFFSET, 0, pinmask);
}
diff --git a/arch/arm/src/tiva/tiva_gpio.h b/arch/arm/src/tiva/tiva_gpio.h
index 12b466042e35f3eac46e73555ba0f9bf045af50c..17f3957f0708f1c65f16252693e10fd6899c1d66 100644
--- a/arch/arm/src/tiva/tiva_gpio.h
+++ b/arch/arm/src/tiva/tiva_gpio.h
@@ -321,20 +321,20 @@
/* Debug ********************************************************************/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_GPIO
#endif
#ifdef CONFIG_DEBUG_GPIO
-# define gpiodbg(format, ...) dbg(format, ##__VA_ARGS__)
-# define gpiolldbg(format, ...) lldbg(format, ##__VA_ARGS__)
-# define gpiovdbg(format, ...) vdbg(format, ##__VA_ARGS__)
-# define gpiollvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
+# define gpioerr(format, ...) err(format, ##__VA_ARGS__)
+# define gpiollerr(format, ...) llerr(format, ##__VA_ARGS__)
+# define gpioinfo(format, ...) info(format, ##__VA_ARGS__)
+# define gpiollinfo(format, ...) llinfo(format, ##__VA_ARGS__)
#else
-# define gpiodbg(x...)
-# define gpiolldbg(x...)
-# define gpiovdbg(x...)
-# define gpiollvdbg(x...)
+# define gpioerr(x...)
+# define gpiollerr(x...)
+# define gpioinfo(x...)
+# define gpiollinfo(x...)
#endif
/****************************************************************************
diff --git a/arch/arm/src/tiva/tiva_gpioirq.c b/arch/arm/src/tiva/tiva_gpioirq.c
index 33b5fa0e3a66dd17f130373cfbfbeaa32e541740..8931988a9379344e87a530b873d49160d7e48bf9 100644
--- a/arch/arm/src/tiva/tiva_gpioirq.c
+++ b/arch/arm/src/tiva/tiva_gpioirq.c
@@ -293,7 +293,7 @@ static int tiva_gpioporthandler(uint8_t port, void *context)
uint8_t pin; /* Pin number */
tiva_gpioirqclear(port, 0xff);
- gpiollvdbg("mis=0b%08b\n", mis & 0xff);
+ gpiollinfo("mis=0b%08b\n", mis & 0xff);
/* Now process each IRQ pending in the MIS */
@@ -303,7 +303,7 @@ static int tiva_gpioporthandler(uint8_t port, void *context)
{
if (((mis >> pin) & 1) != 0)
{
- gpiollvdbg("port=%d pin=%d irq=%p index=%d\n",
+ gpiollinfo("port=%d pin=%d irq=%p index=%d\n",
port, pin,
g_gpioportirqvector[TIVA_GPIO_IRQ_IDX(port, pin)],
TIVA_GPIO_IRQ_IDX(port, pin));
@@ -560,7 +560,7 @@ int tiva_gpioirqinitialize(void)
g_gpioportirqvector[i] = irq_unexpected_isr;
}
- gpiovdbg("tiva_gpioirqinitialize isr=%d/%d irq_unexpected_isr=%p\n",
+ gpioinfo("tiva_gpioirqinitialize isr=%d/%d irq_unexpected_isr=%p\n",
i, TIVA_NIRQ_PINS, irq_unexpected_isr);
/* Then attach each GPIO interrupt handlers and enable corresponding GPIO
@@ -692,7 +692,7 @@ xcpt_t tiva_gpioirqattach(uint32_t pinset, xcpt_t isr)
* to the unexpected interrupt handler.
*/
- gpiovdbg("assign port=%d pin=%d function=%p to idx=%d\n",
+ gpioinfo("assign port=%d pin=%d function=%p to idx=%d\n",
port, pinno, isr, TIVA_GPIO_IRQ_IDX(port, pinno));
if (isr == NULL)
@@ -737,7 +737,7 @@ void tiva_gpioportirqattach(uint8_t port, xcpt_t isr)
* to the unexpected interrupt handler.
*/
- gpiovdbg("assign function=%p to port=%d\n", isr, port);
+ gpioinfo("assign function=%p to port=%d\n", isr, port);
if (isr == NULL)
{
diff --git a/arch/arm/src/tiva/tiva_i2c.c b/arch/arm/src/tiva/tiva_i2c.c
index 28450836f844a514bc7a39bc67376405dad16283..375f52ff4afb5570a8f9726aa619093dd644901a 100644
--- a/arch/arm/src/tiva/tiva_i2c.c
+++ b/arch/arm/src/tiva/tiva_i2c.c
@@ -119,17 +119,17 @@
#define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
/* Debug ****************************************************************************/
-/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
+/* CONFIG_DEBUG_I2C + CONFIG_DEBUG_FEATURES enables general I2C debug output. */
#ifdef CONFIG_DEBUG_I2C
-# define i2cdbg dbg
-# define i2cvdbg vdbg
+# define i2cerr err
+# define i2cinfo info
#else
-# define i2cdbg(x...)
-# define i2cvdbg(x...)
+# define i2cerr(x...)
+# define i2cinfo(x...)
#endif
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_TIVA_I2C_REGDEBUG
#endif
@@ -609,7 +609,7 @@ static bool tiva_i2c_checkreg(struct tiva_i2c_priv_s *priv, bool wr,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -642,7 +642,7 @@ static uint32_t tiva_i2c_getreg(struct tiva_i2c_priv_s *priv, unsigned int offse
if (tiva_i2c_checkreg(priv, false, regval, regaddr))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
return regval;
@@ -671,7 +671,7 @@ static void tiva_i2c_putreg(struct tiva_i2c_priv_s *priv, unsigned int offset,
if (tiva_i2c_checkreg(priv, true, regval, regaddr))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
putreg32(regval, regaddr);
@@ -865,7 +865,7 @@ static inline int tiva_i2c_sem_waitdone(struct tiva_i2c_priv_s *priv)
while (priv->intstate != INTSTATE_DONE && elapsed < timeout);
- i2cvdbg("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
+ i2cinfo("intstate: %d elapsed: %ld threshold: %ld status: %08x\n",
priv->intstate, (long)elapsed, (long)timeout, status);
/* Set the interrupt state back to IDLE */
@@ -968,7 +968,7 @@ static void tiva_i2c_tracenew(struct tiva_i2c_priv_s *priv, uint32_t status)
if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
{
- i2cdbg("I2C%d: ERROR: Trace table overflow\n", priv->config->devno);
+ i2cerr("I2C%d: ERROR: Trace table overflow\n", priv->config->devno);
return;
}
@@ -1017,7 +1017,7 @@ static void tiva_i2c_traceevent(struct tiva_i2c_priv_s *priv,
if (priv->tndx >= (CONFIG_I2C_NTRACE-1))
{
- i2cdbg("I2C%d: ERROR: Trace table overflow\n", priv->config->devno);
+ i2cerr("I2C%d: ERROR: Trace table overflow\n", priv->config->devno);
return;
}
@@ -1676,7 +1676,7 @@ static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency)
uint32_t regval;
int ret;
- i2cvdbg("I2C%d: refs=%d\n", config->devno, priv->refs);
+ i2cinfo("I2C%d: refs=%d\n", config->devno, priv->refs);
/* Enable power and clocking to the I2C peripheral.
*
@@ -1692,12 +1692,12 @@ static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency)
tiva_i2c_enablepwr(config->devno);
tiva_i2c_enableclk(config->devno);
- i2cvdbg("I2C%d: RCGI2C[%08x]=%08x\n",
+ i2cinfo("I2C%d: RCGI2C[%08x]=%08x\n",
config->devno, TIVA_SYSCON_RCGCI2C, getreg32(TIVA_SYSCON_RCGCI2C));
#else
modifyreg32(TIVA_SYSCON_RCGC1, 0, priv->rcgbit);
- i2cvdbg("I2C%d: RCGC1[%08x]=%08x\n",
+ i2cinfo("I2C%d: RCGC1[%08x]=%08x\n",
config->devno, TIVA_SYSCON_RCGC1, getreg32(TIVA_SYSCON_RCGC1));
#endif
@@ -1713,13 +1713,13 @@ static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency)
/* Configure pins */
- i2cvdbg("I2C%d: SCL=%08x SDA=%08x\n",
+ i2cinfo("I2C%d: SCL=%08x SDA=%08x\n",
config->devno, config->scl_pin, config->sda_pin);
ret = tiva_configgpio(config->scl_pin);
if (ret < 0)
{
- i2cvdbg("I2C%d: tiva_configgpio(%08x) failed: %d\n",
+ i2cinfo("I2C%d: tiva_configgpio(%08x) failed: %d\n",
config->scl_pin, ret);
return ret;
}
@@ -1727,7 +1727,7 @@ static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency)
ret = tiva_configgpio(config->sda_pin);
if (ret < 0)
{
- i2cvdbg("I2C%d: tiva_configgpio(%08x) failed: %d\n",
+ i2cinfo("I2C%d: tiva_configgpio(%08x) failed: %d\n",
config->sda_pin, ret);
tiva_configgpio(MKI2C_INPUT(config->scl_pin));
return ret;
@@ -1779,7 +1779,7 @@ static int tiva_i2c_uninitialize(struct tiva_i2c_priv_s *priv)
{
uint32_t regval;
- i2cvdbg("I2C%d: refs=%d\n", priv->config->devno, priv->refs);
+ i2cinfo("I2C%d: refs=%d\n", priv->config->devno, priv->refs);
/* Disable I2C */
@@ -1823,7 +1823,7 @@ static void tiva_i2c_setclock(struct tiva_i2c_priv_s *priv, uint32_t frequency)
uint32_t regval;
uint32_t tmp;
- i2cvdbg("I2C%d: frequency: %u\n", priv->config->devno, frequency);
+ i2cinfo("I2C%d: frequency: %u\n", priv->config->devno, frequency);
/* Has the I2C bus frequency changed? */
@@ -1876,7 +1876,7 @@ static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
int ret = OK;
DEBUGASSERT(priv && priv->config && msgv && msgc > 0);
- i2cvdbg("I2C%d: msgc=%d\n", priv->config->devno, msgc);
+ i2cinfo("I2C%d: msgc=%d\n", priv->config->devno, msgc);
tiva_i2c_sem_wait(priv); /* Ensure that address or flags don't change meanwhile */
@@ -1916,7 +1916,7 @@ static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
if (tiva_i2c_sem_waitdone(priv) < 0)
{
- i2cdbg("I2C%d: ERROR: Timed out\n", priv->config->devno);
+ i2cerr("I2C%d: ERROR: Timed out\n", priv->config->devno);
ret = -ETIMEDOUT;
}
#if 0 /* I2CM_CS_CLKTO */
@@ -1925,7 +1925,7 @@ static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
else if ((priv->mstatus & (I2CM_CS_ERROR | I2CM_CS_ARBLST)) != 0)
#endif
{
- i2cdbg("I2C%d: ERROR: I2C error status: %08x\n",
+ i2cerr("I2C%d: ERROR: I2C error status: %08x\n",
priv->config->devno, priv->mstatus);
if ((priv->mstatus & I2CM_CS_ARBLST) != 0)
@@ -1972,7 +1972,7 @@ static int tiva_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgv,
* other bits are valid.
*/
- i2cdbg("I2C%d: ERROR: I2C still busy: %08x\n",
+ i2cerr("I2C%d: ERROR: I2C still busy: %08x\n",
priv->config->devno, regval);
/* Reset and reinitialize the I2C hardware */
@@ -2027,7 +2027,7 @@ static int tiva_i2c_reset(FAR struct i2c_master_s * dev)
int ret = ERROR;
DEBUGASSERT(priv && priv->config);
- i2cvdbg("I2C%d:\n", priv->config->devno);
+ i2cinfo("I2C%d:\n", priv->config->devno);
/* Our caller must own a ref */
@@ -2144,7 +2144,7 @@ struct i2c_master_s *tiva_i2cbus_initialize(int port)
const struct tiva_i2c_config_s *config;
int flags;
- i2cvdbg("I2C%d: Initialize\n", port);
+ i2cinfo("I2C%d: Initialize\n", port);
/* Get I2C private structure */
@@ -2221,7 +2221,7 @@ struct i2c_master_s *tiva_i2cbus_initialize(int port)
#endif
default:
- i2cdbg("I2C%d: ERROR: Not supported\n", port);
+ i2cerr("I2C%d: ERROR: Not supported\n", port);
return NULL;
}
@@ -2267,7 +2267,7 @@ int tiva_i2cbus_uninitialize(struct i2c_master_s *dev)
DEBUGASSERT(priv && priv->config && priv->refs > 0);
- i2cvdbg("I2C%d: Uninitialize\n", priv->config->devno);
+ i2cinfo("I2C%d: Uninitialize\n", priv->config->devno);
/* Decrement reference count and check for underflow */
diff --git a/arch/arm/src/tiva/tiva_irq.c b/arch/arm/src/tiva/tiva_irq.c
index 67f8f1806020490de47f4c30dc6465fc90df2c0c..7e51ab03f81b7d0286e3fa6fe3f6b14a277694da 100644
--- a/arch/arm/src/tiva/tiva_irq.c
+++ b/arch/arm/src/tiva/tiva_irq.c
@@ -113,24 +113,24 @@ static void tiva_dumpnvic(const char *msg, int irq)
irqstate_t flags;
flags = enter_critical_section();
- lldbg("NVIC (%s, irq=%d):\n", msg, irq);
- lldbg(" INTCTRL: %08x VECTAB: %08x\n",
+ llerr("NVIC (%s, irq=%d):\n", msg, irq);
+ llerr(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
- lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
+ llerr(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
#if NR_VECTORS < 64
- lldbg(" IRQ ENABLE: %08x %08x\n",
+ llerr(" IRQ ENABLE: %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE));
#elif NR_VECTORS < 96
- lldbg(" IRQ ENABLE: %08x %08x %08x\n",
+ llerr(" IRQ ENABLE: %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE));
#elif NR_VECTORS < 128
- lldbg(" IRQ ENABLE: %08x %08x %08x %08x\n",
+ llerr(" IRQ ENABLE: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
#endif
@@ -138,40 +138,40 @@ static void tiva_dumpnvic(const char *msg, int irq)
# warning Missing output
#endif
- lldbg(" SYSH_PRIO: %08x %08x %08x\n",
+ llerr(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
- lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
+ llerr(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
#if NR_VECTORS > 47
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
#endif
#if NR_VECTORS > 63
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
#endif
#if NR_VECTORS > 79
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
#endif
#if NR_VECTORS > 95
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
#endif
#if NR_VECTORS > 111
- lldbg(" %08x %08x %08x %08x\n",
+ llerr(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY),
getreg32(NVIC_IRQ120_123_PRIORITY), getreg32(NVIC_IRQ124_127_PRIORITY));
#endif
@@ -186,7 +186,7 @@ static void tiva_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: tiva_nmi, tiva_busfault, tiva_usagefault, tiva_pendsv,
- * tiva_dbgmonitor, tiva_pendsv, tiva_reserved
+ * tiva_errmonitor, tiva_pendsv, tiva_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@@ -195,11 +195,11 @@ static void tiva_dumpnvic(const char *msg, int irq)
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
static int tiva_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! NMI received\n");
+ err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -207,7 +207,7 @@ static int tiva_nmi(int irq, FAR void *context)
static int tiva_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Bus fault recived\n");
+ err("PANIC!!! Bus fault recived\n");
PANIC();
return 0;
}
@@ -215,7 +215,7 @@ static int tiva_busfault(int irq, FAR void *context)
static int tiva_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Usage fault received\n");
+ err("PANIC!!! Usage fault received\n");
PANIC();
return 0;
}
@@ -223,15 +223,15 @@ static int tiva_usagefault(int irq, FAR void *context)
static int tiva_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! PendSV received\n");
+ err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
-static int tiva_dbgmonitor(int irq, FAR void *context)
+static int tiva_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Debug Monitor received\n");
+ err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@@ -239,7 +239,7 @@ static int tiva_dbgmonitor(int irq, FAR void *context)
static int tiva_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
- dbg("PANIC!!! Reserved interrupt\n");
+ err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -474,7 +474,7 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
irq_attach(TIVA_IRQ_NMI, tiva_nmi);
#ifndef CONFIG_ARM_MPU
irq_attach(TIVA_IRQ_MEMFAULT, up_memfault);
@@ -482,7 +482,7 @@ void up_irqinitialize(void)
irq_attach(TIVA_IRQ_BUSFAULT, tiva_busfault);
irq_attach(TIVA_IRQ_USAGEFAULT, tiva_usagefault);
irq_attach(TIVA_IRQ_PENDSV, tiva_pendsv);
- irq_attach(TIVA_IRQ_DBGMONITOR, tiva_dbgmonitor);
+ irq_attach(TIVA_IRQ_DBGMONITOR, tiva_errmonitor);
irq_attach(TIVA_IRQ_RESERVED, tiva_reserved);
#endif
diff --git a/arch/arm/src/tiva/tiva_serial.c b/arch/arm/src/tiva/tiva_serial.c
index fb9ea3ee61aac155eb38b15a7552bf1430f91808..e131fbd5d6bce55e723cd1cc17a45ed1c6d18913 100644
--- a/arch/arm/src/tiva/tiva_serial.c
+++ b/arch/arm/src/tiva/tiva_serial.c
@@ -109,13 +109,16 @@
# define UART4_ASSIGNED 1
#elif defined(CONFIG_UART5_SERIAL_CONSOLE)
# define CONSOLE_DEV g_uart5port /* UART5 is console */
-# define TTYS5_DEV g_uart5port /* UART5 is ttyS0 */
+# define TTYS0_DEV g_uart5port /* UART5 is ttyS0 */
+# define UART5_ASSIGNED 1
#elif defined(CONFIG_UART6_SERIAL_CONSOLE)
# define CONSOLE_DEV g_uart6port /* UART6 is console */
-# define TTYS5_DEV g_uart6port /* UART6 is ttyS0 */
+# define TTYS0_DEV g_uart6port /* UART6 is ttyS0 */
+# define UART6_ASSIGNED 1
#elif defined(CONFIG_UART7_SERIAL_CONSOLE)
# define CONSOLE_DEV g_uart7port /* UART7 is console */
-# define TTYS5_DEV g_uart7port /* UART7 is ttyS0 */
+# define TTYS0_DEV g_uart7port /* UART7 is ttyS0 */
+# define UART7_ASSIGNED 1
#else
# undef CONSOLE_DEV /* No console */
# if defined(CONFIG_TIVA_UART0)
diff --git a/arch/arm/src/tiva/tiva_ssi.c b/arch/arm/src/tiva/tiva_ssi.c
index 6870b9eb374b2a9ad3efd91c10817763e83c1fa0..db35b5350c818feb0d200d8f0713a26e404d59d8 100644
--- a/arch/arm/src/tiva/tiva_ssi.c
+++ b/arch/arm/src/tiva/tiva_ssi.c
@@ -66,18 +66,18 @@
* Pre-processor Definitions
****************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG with
- * CONFIG_DEBUG_VERBOSE too)
- */
-
-#undef SSI_DEBUG /* Define to enable debug */
+/* CONFIG_DEBUG_SPI enables debug output from this file */
-#ifdef SSI_DEBUG
-# define ssidbg lldbg
-# define ssivdbg llvdbg
+#ifdef CONFIG_DEBUG_SPI
+# define ssierr llerr
+# define ssiwarn llwarn
+# define ssiinfo llinfo
+# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
-# define ssidbg(x...)
-# define ssivdbg(x...)
+# define ssierr(x...)
+# define ssiwarn(x...)
+# define ssiinfo(x...)
+# define ssi_dumpgpio(m)
#endif
/* How many SSI modules does this chip support? The LM3S6918 supports 2 SSI
@@ -462,7 +462,7 @@ static uint32_t ssi_disable(struct tiva_ssidev_s *priv)
retval = ssi_getreg(priv, TIVA_SSI_CR1_OFFSET);
regval = (retval & ~SSI_CR1_SSE);
ssi_putreg(priv, TIVA_SSI_CR1_OFFSET, regval);
- ssivdbg("CR1: %08x\n", regval);
+ ssiinfo("CR1: %08x\n", regval);
return retval;
}
@@ -489,7 +489,7 @@ static void ssi_enable(struct tiva_ssidev_s *priv, uint32_t enable)
regval &= ~SSI_CR1_SSE;
regval |= (enable & SSI_CR1_SSE);
ssi_putreg(priv, TIVA_SSI_CR1_OFFSET, regval);
- ssivdbg("CR1: %08x\n", regval);
+ ssiinfo("CR1: %08x\n", regval);
}
/****************************************************************************
@@ -538,14 +538,14 @@ static void ssi_semtake(sem_t *sem)
static void ssi_txnull(struct tiva_ssidev_s *priv)
{
- ssivdbg("TX: ->0xffff\n");
+ ssiinfo("TX: ->0xffff\n");
ssi_putreg(priv, TIVA_SSI_DR_OFFSET, 0xffff);
}
static void ssi_txuint16(struct tiva_ssidev_s *priv)
{
uint16_t *ptr = (uint16_t *)priv->txbuffer;
- ssivdbg("TX: %p->%04x\n", ptr, *ptr);
+ ssiinfo("TX: %p->%04x\n", ptr, *ptr);
ssi_putreg(priv, TIVA_SSI_DR_OFFSET, (uint32_t)(*ptr++));
priv->txbuffer = (void *)ptr;
}
@@ -553,7 +553,7 @@ static void ssi_txuint16(struct tiva_ssidev_s *priv)
static void ssi_txuint8(struct tiva_ssidev_s *priv)
{
uint8_t *ptr = (uint8_t *)priv->txbuffer;
- ssivdbg("TX: %p->%02x\n", ptr, *ptr);
+ ssiinfo("TX: %p->%02x\n", ptr, *ptr);
ssi_putreg(priv, TIVA_SSI_DR_OFFSET, (uint32_t)(*ptr++));
priv->txbuffer = (void *)ptr;
}
@@ -577,9 +577,9 @@ static void ssi_txuint8(struct tiva_ssidev_s *priv)
static void ssi_rxnull(struct tiva_ssidev_s *priv)
{
-#if defined(SSI_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
uint32_t regval = ssi_getreg(priv, TIVA_SSI_DR_OFFSET);
- ssivdbg("RX: discard %04x\n", regval);
+ ssiinfo("RX: discard %04x\n", regval);
#else
(void)ssi_getreg(priv, TIVA_SSI_DR_OFFSET);
#endif
@@ -589,7 +589,7 @@ static void ssi_rxuint16(struct tiva_ssidev_s *priv)
{
uint16_t *ptr = (uint16_t *)priv->rxbuffer;
*ptr = (uint16_t)ssi_getreg(priv, TIVA_SSI_DR_OFFSET);
- ssivdbg("RX: %p<-%04x\n", ptr, *ptr);
+ ssiinfo("RX: %p<-%04x\n", ptr, *ptr);
priv->rxbuffer = (void *)(++ptr);
}
@@ -597,7 +597,7 @@ static void ssi_rxuint8(struct tiva_ssidev_s *priv)
{
uint8_t *ptr = (uint8_t *)priv->rxbuffer;
*ptr = (uint8_t)ssi_getreg(priv, TIVA_SSI_DR_OFFSET);
- ssivdbg("RX: %p<-%02x\n", ptr, *ptr);
+ ssiinfo("RX: %p<-%02x\n", ptr, *ptr);
priv->rxbuffer = (void *)(++ptr);
}
@@ -719,7 +719,7 @@ static int ssi_performtx(struct tiva_ssidev_s *priv)
* when the Tx FIFO is 1/2 full or less.
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
regval |= (SSI_IM_TX | SSI_RIS_ROR);
#else
regval |= SSI_IM_TX;
@@ -792,7 +792,7 @@ static inline void ssi_performrx(struct tiva_ssidev_s *priv)
* interrupt, probably an Rx timeout).
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
regval |= (SSI_IM_RX | SSI_IM_RT | SSI_IM_ROR);
#else
regval |= (SSI_IM_RX | SSI_IM_RT);
@@ -841,7 +841,7 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
#endif
int ntxd;
- ssidbg("txbuffer: %p rxbuffer: %p nwords: %d\n", txbuffer, rxbuffer, nwords);
+ ssierr("txbuffer: %p rxbuffer: %p nwords: %d\n", txbuffer, rxbuffer, nwords);
/* Set up to perform the transfer */
@@ -882,7 +882,7 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
#ifndef CONFIG_SSI_POLLWAIT
flags = enter_critical_section();
- ssivdbg("ntxwords: %d nrxwords: %d nwords: %d SR: %08x\n",
+ ssiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x\n",
priv->ntxwords, priv->nrxwords, priv->nwords,
ssi_getreg(priv, TIVA_SSI_SR_OFFSET));
@@ -896,7 +896,7 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
ssi_performrx(priv);
- ssivdbg("ntxwords: %d nrxwords: %d nwords: %d SR: %08x IM: %08x\n",
+ ssiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x IM: %08x\n",
priv->ntxwords, priv->nrxwords, priv->nwords,
ssi_getreg(priv, TIVA_SSI_SR_OFFSET),
ssi_getreg(priv, TIVA_SSI_IM_OFFSET));
@@ -906,14 +906,14 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
* with the transfer, so it should be safe with no timeout.
*/
- ssivdbg("Waiting for transfer complete\n");
+ ssiinfo("Waiting for transfer complete\n");
leave_critical_section(flags);
do
{
ssi_semtake(&priv->xfrsem);
}
while (priv->nrxwords < priv->nwords);
- ssidbg("Transfer complete\n");
+ ssierr("Transfer complete\n");
#else
/* Perform the transfer using polling logic. This will totally
@@ -1022,14 +1022,14 @@ static int ssi_interrupt(int irq, void *context)
/* Check for Rx FIFO overruns */
-#ifdef SSI_DEBUG
+#ifdef CONFIG_DEBUG_SPI
if ((regval & SSI_RIS_ROR) != 0)
{
- ssidbg("Rx FIFO Overrun!\n");
+ ssierr("Rx FIFO Overrun!\n");
}
#endif
- ssivdbg("ntxwords: %d nrxwords: %d nwords: %d SR: %08x\n",
+ ssiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x\n",
priv->ntxwords, priv->nrxwords, priv->nwords,
ssi_getreg(priv, TIVA_SSI_SR_OFFSET));
@@ -1041,7 +1041,7 @@ static int ssi_interrupt(int irq, void *context)
ssi_performrx(priv);
- ssivdbg("ntxwords: %d nrxwords: %d nwords: %d SR: %08x IM: %08x\n",
+ ssiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x IM: %08x\n",
priv->ntxwords, priv->nrxwords, priv->nwords,
ssi_getreg(priv, TIVA_SSI_SR_OFFSET),
ssi_getreg(priv, TIVA_SSI_IM_OFFSET));
@@ -1056,7 +1056,7 @@ static int ssi_interrupt(int irq, void *context)
/* Wake up the waiting thread */
- ssidbg("Transfer complete\n");
+ ssierr("Transfer complete\n");
ssi_semgive(&priv->xfrsem);
}
@@ -1137,7 +1137,7 @@ static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv,
uint32_t scr;
uint32_t actual;
- ssidbg("frequency: %d\n", frequency);
+ ssierr("frequency: %d\n", frequency);
DEBUGASSERT(frequency);
/* Has the frequency changed? */
@@ -1207,7 +1207,7 @@ static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv,
regval &= ~SSI_CR0_SCR_MASK;
regval |= (scr << SSI_CR0_SCR_SHIFT);
ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval);
- ssivdbg("CR0: %08x CPSR: %08x\n", regval, cpsdvsr);
+ ssiinfo("CR0: %08x CPSR: %08x\n", regval, cpsdvsr);
/* Calcluate the actual frequency */
@@ -1261,7 +1261,7 @@ static void ssi_setmodeinternal(struct tiva_ssidev_s *priv, enum spi_mode_e mode
uint32_t modebits;
uint32_t regval;
- ssidbg("mode: %d\n", mode);
+ ssierr("mode: %d\n", mode);
DEBUGASSERT(priv);
/* Has the number of bits per word changed? */
@@ -1298,7 +1298,7 @@ static void ssi_setmodeinternal(struct tiva_ssidev_s *priv, enum spi_mode_e mode
regval &= ~(SSI_CR0_FRF_MASK | SSI_CR0_SPH | SSI_CR0_SPO);
regval |= modebits;
ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval);
- ssivdbg("CR0: %08x\n", regval);
+ ssiinfo("CR0: %08x\n", regval);
/* Save the mode so that subsequent re-configuratins will be faster */
@@ -1340,7 +1340,7 @@ static void ssi_setbitsinternal(struct tiva_ssidev_s *priv, int nbits)
{
uint32_t regval;
- ssidbg("nbits: %d\n", nbits);
+ ssierr("nbits: %d\n", nbits);
DEBUGASSERT(priv);
if (nbits != priv->nbits && nbits >= 4 && nbits <= 16)
{
@@ -1348,7 +1348,7 @@ static void ssi_setbitsinternal(struct tiva_ssidev_s *priv, int nbits)
regval &= ~SSI_CR0_DSS_MASK;
regval |= ((nbits - 1) << SSI_CR0_DSS_SHIFT);
ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval);
- ssivdbg("CR0: %08x\n", regval);
+ ssiinfo("CR0: %08x\n", regval);
priv->nbits = nbits;
}
@@ -1507,7 +1507,7 @@ FAR struct spi_dev_s *tiva_ssibus_initialize(int port)
struct tiva_ssidev_s *priv;
irqstate_t flags;
- ssidbg("port: %d\n", port);
+ ssierr("port: %d\n", port);
/* Set up for the selected port */
diff --git a/arch/arm/src/tiva/tiva_start.c b/arch/arm/src/tiva/tiva_start.c
index 6ecc46223eb8f4c0a7beb824a31d3e79d7e3c868..db2abcc5ec72675dd4a85de8083dd0280ee6b306 100644
--- a/arch/arm/src/tiva/tiva_start.c
+++ b/arch/arm/src/tiva/tiva_start.c
@@ -78,7 +78,7 @@
*
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
# define showprogress(c) up_lowputc(c)
#else
# define showprogress(c)
diff --git a/arch/arm/src/tiva/tiva_timer.h b/arch/arm/src/tiva/tiva_timer.h
index 0f262bc73e24039ff52fef4c448a20ac77009f73..16dacb92bde7f798149b6b7619cc8a722c46394b 100644
--- a/arch/arm/src/tiva/tiva_timer.h
+++ b/arch/arm/src/tiva/tiva_timer.h
@@ -129,16 +129,16 @@
/* Debug ********************************************************************/
/* Non-standard debug that may be enabled just for testing the timer
- * driver. NOTE: that only lldbg types are used so that the output is
+ * driver. NOTE: that only llerr types are used so that the output is
* immediately available.
*/
#ifdef CONFIG_DEBUG_TIMER
-# define timdbg lldbg
-# define timvdbg llvdbg
+# define timerr llerr
+# define timinfo llinfo
#else
-# define timdbg(x...)
-# define timvdbg(x...)
+# define timerr(x...)
+# define timinfo(x...)
#endif
/****************************************************************************
diff --git a/arch/arm/src/tiva/tiva_timerlib.c b/arch/arm/src/tiva/tiva_timerlib.c
index fd6b5805db9d79ae20261d9fcf2c7828772e602c..8f91e391d9d7319043a1c08e0d26735a222fedbf 100644
--- a/arch/arm/src/tiva/tiva_timerlib.c
+++ b/arch/arm/src/tiva/tiva_timerlib.c
@@ -393,7 +393,7 @@ static bool tiva_timer_checkreg(struct tiva_gptmstate_s *priv, bool wr,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llerr("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -426,7 +426,7 @@ static uint32_t tiva_getreg(struct tiva_gptmstate_s *priv, unsigned int offset)
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
if (tiva_timer_checkreg(priv, false, regval, regaddr))
{
- lldbg("%08x->%08x\n", regaddr, regval);
+ llerr("%08x->%08x\n", regaddr, regval);
}
#endif
@@ -449,7 +449,7 @@ static void tiva_putreg(struct tiva_gptmstate_s *priv, unsigned int offset,
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
if (tiva_timer_checkreg(priv, true, regval, regaddr))
{
- lldbg("%08x<-%08x\n", regaddr, regval);
+ llerr("%08x<-%08x\n", regaddr, regval);
}
#endif
@@ -1776,7 +1776,7 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *config)
priv->clkin = ALTCLK_FREQUENCY;
#else
- timvdbg("tiva_gptm_configure: Error: alternate clock only available on TM4C129 devices\n");
+ timinfo("tiva_gptm_configure: Error: alternate clock only available on TM4C129 devices\n");
return (TIMER_HANDLE)NULL;
#endif /* CONFIG_ARCH_CHIP_TM4C129 */
}
@@ -2378,14 +2378,14 @@ void tiva_timer32_setinterval(TIMER_HANDLE handle, uint32_t interval)
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
/* Generate low-level debug output outside of the critical section */
- lldbg("%08x<-%08x\n", loadr, interval);
+ llerr("%08x<-%08x\n", loadr, interval);
if (toints)
{
# ifdef CONFIG_ARCH_CHIP_TM4C129
- lldbg("%08x->%08x\n", moder, modev1);
- lldbg("%08x<-%08x\n", moder, modev2);
+ llerr("%08x->%08x\n", moder, modev1);
+ llerr("%08x<-%08x\n", moder, modev2);
# endif /* CONFIG_ARCH_CHIP_TM4C129 */
- lldbg("%08x<-%08x\n", imrr, priv->imr);
+ llerr("%08x<-%08x\n", imrr, priv->imr);
}
#endif
}
@@ -2525,14 +2525,14 @@ void tiva_timer16_setinterval(TIMER_HANDLE handle, uint16_t interval, int tmndx)
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
/* Generate low-level debug output outside of the critical section */
- lldbg("%08x<-%08x\n", loadr, interval);
+ llerr("%08x<-%08x\n", loadr, interval);
if (toints)
{
#ifdef CONFIG_ARCH_CHIP_TM4C129
- lldbg("%08x->%08x\n", moder, modev1);
- lldbg("%08x<-%08x\n", moder, modev2);
+ llerr("%08x->%08x\n", moder, modev1);
+ llerr("%08x<-%08x\n", moder, modev2);
#endif
- lldbg("%08x<-%08x\n", imrr, priv->imr);
+ llerr("%08x<-%08x\n", imrr, priv->imr);
}
#endif
}
@@ -2564,7 +2564,7 @@ uint32_t tiva_timer32_remaining(TIMER_HANDLE handle)
uint32_t interval;
uint32_t remaining;
- timvdbg("Entry\n");
+ timinfo("Entry\n");
DEBUGASSERT(priv && priv->attr && priv->config &&
priv->config->mode != TIMER16_MODE);
@@ -2730,13 +2730,13 @@ void tiva_rtc_setalarm(TIMER_HANDLE handle, uint32_t delay)
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
/* Generate low-level debug output outside of the critical section */
- lldbg("%08x->%08x\n", base + TIVA_TIMER_TAR_OFFSET, counter);
- lldbg("%08x<-%08x\n", base + TIVA_TIMER_TAMATCHR_OFFSET, match);
+ llerr("%08x->%08x\n", base + TIVA_TIMER_TAR_OFFSET, counter);
+ llerr("%08x<-%08x\n", base + TIVA_TIMER_TAMATCHR_OFFSET, match);
#ifdef CONFIG_ARCH_CHIP_TM4C129
- lldbg("%08x->%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev);
- lldbg("%08x<-%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev | adcbits);
+ llerr("%08x->%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev);
+ llerr("%08x<-%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev | adcbits);
#endif /* CONFIG_ARCH_CHIP_TM4C129 */
- lldbg("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
+ llerr("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
#endif
}
#endif
@@ -2834,13 +2834,13 @@ void tiva_timer32_relmatch(TIMER_HANDLE handle, uint32_t relmatch)
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
/* Generate low-level debug output outside of the critical section */
- lldbg("%08x->%08x\n", base + TIVA_TIMER_TAR_OFFSET, counter);
- lldbg("%08x<-%08x\n", base + TIVA_TIMER_TAMATCHR_OFFSET, match);
+ llerr("%08x->%08x\n", base + TIVA_TIMER_TAR_OFFSET, counter);
+ llerr("%08x<-%08x\n", base + TIVA_TIMER_TAMATCHR_OFFSET, match);
#ifdef CONFIG_ARCH_CHIP_TM4C129
- lldbg("%08x->%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev);
- lldbg("%08x<-%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev | adcbits);
+ llerr("%08x->%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev);
+ llerr("%08x<-%08x\n", base + TIVA_TIMER_ADCEV_OFFSET, adcev | adcbits);
#endif /* CONFIG_ARCH_CHIP_TM4C129 */
- lldbg("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
+ llerr("%08x<-%08x\n", base + TIVA_TIMER_IMR_OFFSET, priv->imr);
#endif /* CONFIG_TIVA_TIMER_REGDEBUG */
}
@@ -3036,15 +3036,15 @@ void tiva_timer16_relmatch(TIMER_HANDLE handle, uint32_t relmatch, int tmndx)
#ifdef CONFIG_TIVA_TIMER_REGDEBUG
/* Generate low-level debug output outside of the critical section */
- lldbg("%08x->%08x\n", timerr, timerv);
- lldbg("%08x->%08x\n", prescr, prescv);
- lldbg("%08x<-%08x\n", matchr, matchv);
- lldbg("%08x<-%08x\n", prematchr, prematchv);
+ llerr("%08x->%08x\n", timerr, timerv);
+ llerr("%08x->%08x\n", prescr, prescv);
+ llerr("%08x<-%08x\n", matchr, matchv);
+ llerr("%08x<-%08x\n", prematchr, prematchv);
#ifdef CONFIG_ARCH_CHIP_TM4C129
- lldbg("%08x->%08x\n", adcevr, adcevv);
- lldbg("%08x<-%08x\n", adcevr, adcevv | adcbits);
+ llerr("%08x->%08x\n", adcevr, adcevv);
+ llerr("%08x<-%08x\n", adcevr, adcevv | adcbits);
#endif
- lldbg("%08x<-%08x\n", imr, priv->imr);
+ llerr("%08x<-%08x\n", imr, priv->imr);
#endif
}
#endif
diff --git a/arch/arm/src/tiva/tiva_timerlow32.c b/arch/arm/src/tiva/tiva_timerlow32.c
index ac3ac065f53531fae325d0b3ef5d7e2138be2c13..c96b8a45707db3a764c691b5014b470a33533340 100644
--- a/arch/arm/src/tiva/tiva_timerlow32.c
+++ b/arch/arm/src/tiva/tiva_timerlow32.c
@@ -200,7 +200,7 @@ static uint32_t tiva_ticks2usec(struct tiva_lowerhalf_s *priv, uint32_t ticks)
static void tiva_timeout(struct tiva_lowerhalf_s *priv, uint32_t timeout)
{
- timvdbg("Entry: timeout=%d\n", timeout);
+ timinfo("Entry: timeout=%d\n", timeout);
/* Save the desired timeout value */
@@ -215,7 +215,7 @@ static void tiva_timeout(struct tiva_lowerhalf_s *priv, uint32_t timeout)
timeout = tiva_ticks2usec(priv, priv->clkticks);
priv->adjustment = priv->timeout - timeout;
- timvdbg("clkin=%d clkticks=%d timeout=%d, adjustment=%d\n",
+ timinfo("clkin=%d clkticks=%d timeout=%d, adjustment=%d\n",
priv->clkin, priv->clkticks, priv->timeout, priv->adjustment);
}
@@ -237,7 +237,7 @@ static void tiva_timer_handler(TIMER_HANDLE handle, void *arg, uint32_t status)
{
struct tiva_lowerhalf_s *priv = (struct tiva_lowerhalf_s *)arg;
- timvdbg("Entry: status=%08x\n", status);
+ timinfo("Entry: status=%08x\n", status);
DEBUGASSERT(arg && status);
/* Check if the timeout interrupt is pending */
@@ -276,7 +276,7 @@ static void tiva_timer_handler(TIMER_HANDLE handle, void *arg, uint32_t status)
/* No handler or the handler returned false.. stop the timer */
tiva_timer32_stop(priv->handle);
- timvdbg("Stopped\n");
+ timinfo("Stopped\n");
}
}
}
@@ -300,7 +300,7 @@ static int tiva_start(struct timer_lowerhalf_s *lower)
{
struct tiva_lowerhalf_s *priv = (struct tiva_lowerhalf_s *)lower;
- timvdbg("Entry: started %d\n", priv->started);
+ timinfo("Entry: started %d\n", priv->started);
/* Has the timer already been started? */
@@ -337,7 +337,7 @@ static int tiva_stop(struct timer_lowerhalf_s *lower)
{
struct tiva_lowerhalf_s *priv = (struct tiva_lowerhalf_s *)lower;
- timvdbg("Entry: started %d\n", priv->started);
+ timinfo("Entry: started %d\n", priv->started);
/* Has the timer already been started? */
@@ -377,7 +377,7 @@ static int tiva_getstatus(struct timer_lowerhalf_s *lower,
struct tiva_lowerhalf_s *priv = (struct tiva_lowerhalf_s *)lower;
uint32_t remaining;
- timvdbg("Entry\n");
+ timinfo("Entry\n");
DEBUGASSERT(priv);
/* Return the status bit */
@@ -402,9 +402,9 @@ static int tiva_getstatus(struct timer_lowerhalf_s *lower,
remaining = tiva_timer32_remaining(priv->handle);
status->timeleft = tiva_ticks2usec(priv, remaining);
- timvdbg(" flags : %08x\n", status->flags);
- timvdbg(" timeout : %d\n", status->timeout);
- timvdbg(" timeleft : %d\n", status->timeleft);
+ timinfo(" flags : %08x\n", status->flags);
+ timinfo(" timeout : %d\n", status->timeout);
+ timinfo(" timeleft : %d\n", status->timeleft);
return OK;
}
@@ -435,7 +435,7 @@ static int tiva_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout)
return -EPERM;
}
- timvdbg("Entry: timeout=%d\n", timeout);
+ timinfo("Entry: timeout=%d\n", timeout);
/* Calculate the the new time settings */
@@ -476,7 +476,7 @@ static tccb_t tiva_sethandler(struct timer_lowerhalf_s *lower,
flags = enter_critical_section();
DEBUGASSERT(priv);
- timvdbg("Entry: handler=%p\n", handler);
+ timinfo("Entry: handler=%p\n", handler);
/* Get the old handler return value */
@@ -516,7 +516,7 @@ static int tiva_ioctl(struct timer_lowerhalf_s *lower, int cmd,
int ret = -ENOTTY;
DEBUGASSERT(priv);
- timvdbg("Entry: cmd=%d arg=%ld\n", cmd, arg);
+ timinfo("Entry: cmd=%d arg=%ld\n", cmd, arg);
return ret;
}
@@ -557,7 +557,7 @@ int tiva_timer_initialize(FAR const char *devpath,
void *drvr;
int ret;
- timvdbg("\n");
+ timinfo("\n");
DEBUGASSERT(devpath);
/* Allocate an instance of the lower half state structure */
@@ -565,7 +565,7 @@ int tiva_timer_initialize(FAR const char *devpath,
priv = (struct tiva_lowerhalf_s *)kmm_zalloc(sizeof(struct tiva_lowerhalf_s));
if (!priv)
{
- timdbg("ERROR: Failed to allocate driver structure\n");
+ timerr("ERROR: Failed to allocate driver structure\n");
return -ENOMEM;
}
@@ -577,7 +577,7 @@ int tiva_timer_initialize(FAR const char *devpath,
#else
if (config->cmn.alternate)
{
- timdbg("ERROR: Alternate clock unsupported on TM4C123 architecture\n");
+ timerr("ERROR: Alternate clock unsupported on TM4C123 architecture\n");
return -ENOMEM;
}
else
@@ -599,7 +599,7 @@ int tiva_timer_initialize(FAR const char *devpath,
priv->handle = tiva_gptm_configure((const struct tiva_gptmconfig_s *)&priv->config);
if (!priv->handle)
{
- timdbg("ERROR: Failed to create timer handle\n");
+ timerr("ERROR: Failed to create timer handle\n");
ret = -EINVAL;
goto errout_with_alloc;
}
diff --git a/arch/arm/src/tiva/tm4c_ethernet.c b/arch/arm/src/tiva/tm4c_ethernet.c
index eeb36a32ecc85140c7d93585d920113096d29f5e..56080a416e89b17561fffcbd182e9395f5d7f949 100644
--- a/arch/arm/src/tiva/tm4c_ethernet.c
+++ b/arch/arm/src/tiva/tm4c_ethernet.c
@@ -247,7 +247,7 @@
* enabled.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_TIVA_ETHERNET_REGDEBUG
#endif
@@ -667,7 +667,7 @@ static struct tiva_ethmac_s g_tiva_ethmac[TIVA_NETHCONTROLLERS];
****************************************************************************/
/* Register operations ******************************************************/
-#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t tiva_getreg(uint32_t addr);
static void tiva_putreg(uint32_t val, uint32_t addr);
static void tiva_checksetup(void);
@@ -787,7 +787,7 @@ static int tive_emac_configure(FAR struct tiva_ethmac_s *priv);
*
****************************************************************************/
-#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static uint32_t tiva_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
@@ -808,7 +808,7 @@ static uint32_t tiva_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ llerr("...\n");
}
return val;
@@ -825,7 +825,7 @@ static uint32_t tiva_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llerr("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -837,7 +837,7 @@ static uint32_t tiva_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, val);
+ llerr("%08x->%08x\n", addr, val);
return val;
}
#endif
@@ -859,12 +859,12 @@ static uint32_t tiva_getreg(uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void tiva_putreg(uint32_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, val);
+ llerr("%08x<-%08x\n", addr, val);
/* Write the value */
@@ -886,7 +886,7 @@ static void tiva_putreg(uint32_t val, uint32_t addr)
*
****************************************************************************/
-#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_TIVA_ETHERNET_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES)
static void tiva_checksetup(void)
{
}
@@ -1051,7 +1051,7 @@ static int tiva_transmit(FAR struct tiva_ethmac_s *priv)
txdesc = priv->txhead;
txfirst = txdesc;
- nvdbg("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
+ ninfo("d_len: %d d_buf: %p txhead: %p tdes0: %08x\n",
priv->dev.d_len, priv->dev.d_buf, txdesc, txdesc->tdes0);
DEBUGASSERT(txdesc && (txdesc->tdes0 & EMAC_TDES0_OWN) == 0);
@@ -1068,7 +1068,7 @@ static int tiva_transmit(FAR struct tiva_ethmac_s *priv)
bufcount = (priv->dev.d_len + (OPTIMAL_EMAC_BUFSIZE-1)) / OPTIMAL_EMAC_BUFSIZE;
lastsize = priv->dev.d_len - (bufcount - 1) * OPTIMAL_EMAC_BUFSIZE;
- nvdbg("bufcount: %d lastsize: %d\n", bufcount, lastsize);
+ ninfo("bufcount: %d lastsize: %d\n", bufcount, lastsize);
/* Set the first segment bit in the first TX descriptor */
@@ -1178,7 +1178,7 @@ static int tiva_transmit(FAR struct tiva_ethmac_s *priv)
priv->inflight++;
- nvdbg("txhead: %p txtail: %p inflight: %d\n",
+ ninfo("txhead: %p txtail: %p inflight: %d\n",
priv->txhead, priv->txtail, priv->inflight);
/* If all TX descriptors are in-flight, then we have to disable receive interrupts
@@ -1477,7 +1477,7 @@ static void tiva_freesegment(FAR struct tiva_ethmac_s *priv,
struct emac_rxdesc_s *rxdesc;
int i;
- nvdbg("rxfirst: %p segments: %d\n", rxfirst, segments);
+ ninfo("rxfirst: %p segments: %d\n", rxfirst, segments);
/* Set OWN bit in RX descriptors. This gives the buffers back to DMA */
@@ -1535,7 +1535,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv)
uint8_t *buffer;
int i;
- nvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+ ninfo("rxhead: %p rxcurr: %p segments: %d\n",
priv->rxhead, priv->rxcurr, priv->segments);
/* Check if there are free buffers. We cannot receive new frames in this
@@ -1544,7 +1544,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv)
if (!tiva_isfreebuffer(priv))
{
- nlldbg("No free buffers\n");
+ nllerr("No free buffers\n");
return -ENOMEM;
}
@@ -1601,7 +1601,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv)
rxcurr = priv->rxcurr;
}
- nvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+ ninfo("rxhead: %p rxcurr: %p segments: %d\n",
priv->rxhead, priv->rxcurr, priv->segments);
/* Check if any errors are reported in the frame */
@@ -1640,7 +1640,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv)
priv->rxhead = (struct emac_rxdesc_s *)rxdesc->rdes3;
tiva_freesegment(priv, rxcurr, priv->segments);
- nvdbg("rxhead: %p d_buf: %p d_len: %d\n",
+ ninfo("rxhead: %p d_buf: %p d_len: %d\n",
priv->rxhead, dev->d_buf, dev->d_len);
return OK;
@@ -1651,7 +1651,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv)
* scanning logic, and continue scanning with the next frame.
*/
- nlldbg("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
+ nllerr("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0);
tiva_freesegment(priv, rxcurr, priv->segments);
}
}
@@ -1667,7 +1667,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv)
priv->rxhead = rxdesc;
- nvdbg("rxhead: %p rxcurr: %p segments: %d\n",
+ ninfo("rxhead: %p rxcurr: %p segments: %d\n",
priv->rxhead, priv->rxcurr, priv->segments);
return -EAGAIN;
@@ -1712,7 +1712,7 @@ static void tiva_receive(FAR struct tiva_ethmac_s *priv)
if (dev->d_len > CONFIG_NET_ETH_MTU)
{
- nlldbg("DROPPED: Too big: %d\n", dev->d_len);
+ nllerr("DROPPED: Too big: %d\n", dev->d_len);
}
else
@@ -1721,7 +1721,7 @@ static void tiva_receive(FAR struct tiva_ethmac_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
/* Handle ARP on input then give the IPv4 packet to the network
* layer
@@ -1760,7 +1760,7 @@ static void tiva_receive(FAR struct tiva_ethmac_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("IPv6 frame\n");
+ nllinfo("IPv6 frame\n");
/* Give the IPv6 packet to the network layer */
@@ -1797,7 +1797,7 @@ static void tiva_receive(FAR struct tiva_ethmac_s *priv)
#ifdef CONFIG_NET_ARP
if (BUF->type == htons(ETHTYPE_ARP))
{
- nvdbg("ARP frame\n");
+ ninfo("ARP frame\n");
/* Handle ARP packet */
@@ -1815,7 +1815,7 @@ static void tiva_receive(FAR struct tiva_ethmac_s *priv)
else
#endif
{
- nlldbg("DROPPED: Unknown type: %04x\n", BUF->type);
+ nllerr("DROPPED: Unknown type: %04x\n", BUF->type);
}
/* We are finished with the RX buffer. NOTE: If the buffer is
@@ -1856,7 +1856,7 @@ static void tiva_freeframe(FAR struct tiva_ethmac_s *priv)
FAR struct emac_txdesc_s *txdesc;
int i;
- nvdbg("txhead: %p txtail: %p inflight: %d\n",
+ ninfo("txhead: %p txtail: %p inflight: %d\n",
priv->txhead, priv->txtail, priv->inflight);
/* Scan for "in-flight" descriptors owned by the CPU */
@@ -1872,7 +1872,7 @@ static void tiva_freeframe(FAR struct tiva_ethmac_s *priv)
* TX descriptors.
*/
- nvdbg("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
+ ninfo("txtail: %p tdes0: %08x tdes2: %08x tdes3: %08x\n",
txdesc, txdesc->tdes0, txdesc->tdes2, txdesc->tdes3);
DEBUGASSERT(txdesc->tdes2 != 0);
@@ -1925,7 +1925,7 @@ static void tiva_freeframe(FAR struct tiva_ethmac_s *priv)
priv->txtail = txdesc;
- nvdbg("txhead: %p txtail: %p inflight: %d\n",
+ ninfo("txhead: %p txtail: %p inflight: %d\n",
priv->txhead, priv->txtail, priv->inflight);
}
}
@@ -2067,7 +2067,7 @@ static inline void tiva_interrupt_process(FAR struct tiva_ethmac_s *priv)
{
/* Just let the user know what happened */
- nlldbg("Abnormal event(s): %08x\n", dmaris);
+ nllerr("Abnormal event(s): %08x\n", dmaris);
/* Clear all pending abnormal events */
@@ -2287,7 +2287,7 @@ static void tiva_txtimeout_expiry(int argc, uint32_t arg, ...)
{
FAR struct tiva_ethmac_s *priv = (FAR struct tiva_ethmac_s *)arg;
- nlldbg("Timeout!\n");
+ nllerr("Timeout!\n");
#ifdef CONFIG_NET_NOINTS
/* Disable further Ethernet interrupts. This will prevent some race
@@ -2488,12 +2488,12 @@ static int tiva_ifup(struct net_driver_s *dev)
int ret;
#ifdef CONFIG_NET_IPv4
- ndbg("Bringing up: %d.%d.%d.%d\n",
+ nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
#endif
#ifdef CONFIG_NET_IPv6
- ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+ nerr("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
@@ -2541,7 +2541,7 @@ static int tiva_ifdown(struct net_driver_s *dev)
FAR struct tiva_ethmac_s *priv = (FAR struct tiva_ethmac_s *)dev->d_private;
irqstate_t flags;
- nvdbg("Taking the network down\n");
+ ninfo("Taking the network down\n");
/* Disable the Ethernet interrupt */
@@ -2586,7 +2586,7 @@ static int tiva_ifdown(struct net_driver_s *dev)
static inline void tiva_txavail_process(FAR struct tiva_ethmac_s *priv)
{
- nvdbg("ifup: %d\n", priv->ifup);
+ ninfo("ifup: %d\n", priv->ifup);
/* Ignore the notification if the interface is not yet up */
@@ -2753,7 +2753,7 @@ static int tiva_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
uint32_t temp;
uint32_t registeraddress;
- nvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Add the MAC address to the hardware multicast hash table */
@@ -2810,7 +2810,7 @@ static int tiva_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
uint32_t temp;
uint32_t registeraddress;
- nvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Remove the MAC address to the hardware multicast hash table */
@@ -3236,7 +3236,7 @@ static int tiva_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *valu
}
}
- ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
+ nerr("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
phydevaddr, phyregaddr);
return -ETIMEDOUT;
@@ -3295,7 +3295,7 @@ static int tiva_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t valu
}
}
- ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
+ nerr("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
phydevaddr, phyregaddr, value);
return -ETIMEDOUT;
@@ -3343,7 +3343,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
ret = tiva_phywrite(CONFIG_TIVA_PHYADDR, MII_MCR, MII_MCR_RESET);
if (ret < 0)
{
- ndbg("Failed to reset the PHY: %d\n", ret);
+ nerr("Failed to reset the PHY: %d\n", ret);
return ret;
}
@@ -3359,7 +3359,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
ret = tiva_phyread(CONFIG_TIVA_PHYADDR, MII_MSR, &phyval);
if (ret < 0)
{
- ndbg("Failed to read the PHY MSR: %d\n", ret);
+ nerr("Failed to read the PHY MSR: %d\n", ret);
return ret;
}
else if ((phyval & MII_MSR_LINKSTATUS) != 0)
@@ -3370,7 +3370,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
if (timeout >= PHY_RETRY_TIMEOUT)
{
- ndbg("Timed out waiting for link status: %04x\n", phyval);
+ nerr("Timed out waiting for link status: %04x\n", phyval);
return -ETIMEDOUT;
}
@@ -3379,7 +3379,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
ret = tiva_phywrite(CONFIG_TIVA_PHYADDR, MII_MCR, MII_MCR_ANENABLE);
if (ret < 0)
{
- ndbg("Failed to enable auto-negotiation: %d\n", ret);
+ nerr("Failed to enable auto-negotiation: %d\n", ret);
return ret;
}
@@ -3390,7 +3390,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
ret = tiva_phyread(CONFIG_TIVA_PHYADDR, MII_MSR, &phyval);
if (ret < 0)
{
- ndbg("Failed to read the PHY MSR: %d\n", ret);
+ nerr("Failed to read the PHY MSR: %d\n", ret);
return ret;
}
else if ((phyval & MII_MSR_ANEGCOMPLETE) != 0)
@@ -3401,7 +3401,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
if (timeout >= PHY_RETRY_TIMEOUT)
{
- ndbg("Timed out waiting for auto-negotiation\n");
+ nerr("Timed out waiting for auto-negotiation\n");
return -ETIMEDOUT;
}
@@ -3410,13 +3410,13 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
ret = tiva_phyread(CONFIG_TIVA_PHYADDR, CONFIG_TIVA_PHYSR, &phyval);
if (ret < 0)
{
- ndbg("Failed to read PHY status register\n");
+ nerr("Failed to read PHY status register\n");
return ret;
}
/* Remember the selected speed and duplex modes */
- nvdbg("PHYSR[%d]: %04x\n", CONFIG_TIVA_PHYSR, phyval);
+ ninfo("PHYSR[%d]: %04x\n", CONFIG_TIVA_PHYSR, phyval);
/* Different PHYs present speed and mode information in different ways. IF
* This CONFIG_TIVA_PHYSR_ALTCONFIG is selected, this indicates that the PHY
@@ -3480,7 +3480,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
ret = tiva_phywrite(CONFIG_TIVA_PHYADDR, MII_MCR, phyval);
if (ret < 0)
{
- ndbg("Failed to write the PHY MCR: %d\n", ret);
+ nerr("Failed to write the PHY MCR: %d\n", ret);
return ret;
}
up_mdelay(PHY_CONFIG_DELAY);
@@ -3495,7 +3495,7 @@ static int tiva_phyinit(FAR struct tiva_ethmac_s *priv)
#endif
#endif
- ndbg("Duplex: %s Speed: %d MBps\n",
+ nerr("Duplex: %s Speed: %d MBps\n",
priv->fduplex ? "FULL" : "HALF",
priv->mbps100 ? 100 : 10);
@@ -3599,7 +3599,7 @@ static inline void tiva_phy_initialize(FAR struct tiva_ethmac_s *priv)
{
/* Enable the clock to the PHY module */
- nllvdbg("Enable EPHY clocking\n");
+ nllinfo("Enable EPHY clocking\n");
tiva_ephy_enableclk();
/* What until the PREPHY register indicates that the PHY is ready before
@@ -3611,7 +3611,7 @@ static inline void tiva_phy_initialize(FAR struct tiva_ethmac_s *priv)
/* Enable power to the Ethernet PHY */
- nllvdbg("Enable EPHY power\n");
+ nllinfo("Enable EPHY power\n");
tiva_ephy_enablepwr();
/* What until the PREPHY register indicates that the PHY registers are ready
@@ -3621,11 +3621,11 @@ static inline void tiva_phy_initialize(FAR struct tiva_ethmac_s *priv)
while (!tiva_ephy_periphrdy());
up_udelay(250);
- nllvdbg("RCGCEPHY: %08x PCEPHY: %08x PREPHY: %08x\n",
+ nllinfo("RCGCEPHY: %08x PCEPHY: %08x PREPHY: %08x\n",
getreg32(TIVA_SYSCON_RCGCEPHY),
getreg32(TIVA_SYSCON_PCEPHY),
getreg32(TIVA_SYSCON_PREPHY));
- nllvdbg("Configure PHY GPIOs\n");
+ nllinfo("Configure PHY GPIOs\n");
#ifdef CONFIG_TIVA_PHY_INTERNAL
/* Integrated PHY:
@@ -3931,7 +3931,7 @@ static void tiva_macaddress(FAR struct tiva_ethmac_s *priv)
FAR struct net_driver_s *dev = &priv->dev;
uint32_t regval;
- nvdbg("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_ifname,
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
@@ -3999,7 +3999,7 @@ static void tiva_ipv6multicast(FAR struct tiva_ethmac_s *priv)
mac[4] = tmp16 & 0xff;
mac[5] = tmp16 >> 8;
- nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
(void)tiva_addmac(dev, mac);
@@ -4129,12 +4129,12 @@ static int tive_emac_configure(FAR struct tiva_ethmac_s *priv)
/* Reset the Ethernet block */
- nvdbg("Reset the Ethernet block\n");
+ ninfo("Reset the Ethernet block\n");
tiva_ethreset(priv);
/* Initialize the PHY */
- nvdbg("Initialize the PHY\n");
+ ninfo("Initialize the PHY\n");
ret = tiva_phyinit(priv);
if (ret < 0)
{
@@ -4143,7 +4143,7 @@ static int tive_emac_configure(FAR struct tiva_ethmac_s *priv)
/* Initialize the MAC and DMA */
- nvdbg("Initialize the MAC and DMA\n");
+ ninfo("Initialize the MAC and DMA\n");
ret = tiva_macconfig(priv);
if (ret < 0)
{
@@ -4164,7 +4164,7 @@ static int tive_emac_configure(FAR struct tiva_ethmac_s *priv)
/* Enable normal MAC operation */
- nvdbg("Enable normal operation\n");
+ ninfo("Enable normal operation\n");
return tiva_macenable(priv);
}
@@ -4201,7 +4201,7 @@ int tiva_ethinitialize(int intf)
struct tiva_ethmac_s *priv;
uint32_t regval;
- nllvdbg("intf: %d\n", intf);
+ nllinfo("intf: %d\n", intf);
/* Get the interface structure associated with this interface number. */
@@ -4247,7 +4247,7 @@ int tiva_ethinitialize(int intf)
* bringing it a fully functional state.
*/
- nllvdbg("Enable EMAC clocking\n");
+ nllinfo("Enable EMAC clocking\n");
tiva_emac_enablepwr(); /* Ethernet MAC Power Control */
tiva_emac_enableclk(); /* Ethernet MAC Run Mode Clock Gating Control */
@@ -4260,7 +4260,7 @@ int tiva_ethinitialize(int intf)
/* Show all EMAC clocks */
- nllvdbg("RCGCEMAC: %08x PCEMAC: %08x PREMAC: %08x MOSCCTL: %08x\n",
+ nllinfo("RCGCEMAC: %08x PCEMAC: %08x PREMAC: %08x MOSCCTL: %08x\n",
getreg32(TIVA_SYSCON_RCGCEMAC),
getreg32(TIVA_SYSCON_PCEMAC),
getreg32(TIVA_SYSCON_PREMAC),
@@ -4309,7 +4309,7 @@ int tiva_ethinitialize(int intf)
/* Register the device with the OS so that socket IOCTLs can be performed */
- nllvdbg("Registering Ethernet device\n");
+ nllinfo("Registering Ethernet device\n");
return netdev_register(&priv->dev, NET_LL_ETHERNET);
}
@@ -4411,7 +4411,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler, phy_enable_t *enable)
xcpt_t oldhandler;
DEBUGASSERT(intf);
- nvdbg("%s: handler=%p\n", intf, handler);
+ ninfo("%s: handler=%p\n", intf, handler);
/* Get the interface structure associated with this interface. */
diff --git a/arch/arm/src/tms570/tms570_boot.c b/arch/arm/src/tms570/tms570_boot.c
index 66c92862f55d16a479219c50938fbefe7fb2833f..653825cce4eec077bfa98f566f5f20f523d48a55 100644
--- a/arch/arm/src/tms570/tms570_boot.c
+++ b/arch/arm/src/tms570/tms570_boot.c
@@ -122,7 +122,7 @@ static inline void tms570_event_export(void)
static inline void tms570_check_reset(void)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
uint32_t regval;
/* Read from the system exception status register to identify the cause of
diff --git a/arch/arm/src/tms570/tms570_esm.c b/arch/arm/src/tms570/tms570_esm.c
index a3259e4050f0c4e81a35ee641d85d714298d1c1c..58b761335d11c930c2d11a6203edc665f915c6f2 100644
--- a/arch/arm/src/tms570/tms570_esm.c
+++ b/arch/arm/src/tms570/tms570_esm.c
@@ -155,7 +155,7 @@ int tms570_esm_interrupt(int irq, void *context)
/* Crash -- possibly showing diagnostic debug information. */
- lldbg("ESM Interrupt. PC: %08x\n", CURRENT_REGS[REG_PC]);
+ llerr("ESM Interrupt. PC: %08x\n", CURRENT_REGS[REG_PC]);
PANIC();
return OK; /* To keep the compiler happy */
}
diff --git a/arch/arm/src/tms570/tms570_gio.c b/arch/arm/src/tms570/tms570_gio.c
index 159ee05e4faf863eb45c0a37b3219891316fc48b..2164207b120388a43a0ddc94b0135eefc771e6d0 100644
--- a/arch/arm/src/tms570/tms570_gio.c
+++ b/arch/arm/src/tms570/tms570_gio.c
@@ -296,7 +296,7 @@ int tms570_dumpgio(uint32_t pinset, const char *msg)
uintptr_t base;
unsigned int port;
- lldbg("GIO%c pinset: %08x base: %08x -- %s\n",
+ llerr("GIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg);
/* Get the base address associated with the GIO port */
@@ -310,19 +310,19 @@ int tms570_dumpgio(uint32_t pinset, const char *msg)
/* Show global GIO registers */
- lldbg(" GCR0: %08x INTDET: %08x POL: %08x ENA: %08x\n",
+ llerr(" GCR0: %08x INTDET: %08x POL: %08x ENA: %08x\n",
getreg32(TMS570_GIO_GCR0), getreg32(TMS570_GIO_INTDET),
getreg32(TMS570_GIO_POL), getreg32(TMS570_GIO_ENASET));
- lldbg(" LVL: %08x FLG: %08x EMU1: %08x EMU2: %08x\n",
+ llerr(" LVL: %08x FLG: %08x EMU1: %08x EMU2: %08x\n",
getreg32(TMS570_GIO_LVLSET), getreg32(TMS570_GIO_FLG),
getreg32(TMS570_GIO_EMU1), getreg32(TMS570_GIO_EMU2));
/* Port specific registers */
- lldbg(" DIR: %08x DIN: %08x DOUT: %08x PDR: %08x\n",
+ llerr(" DIR: %08x DIN: %08x DOUT: %08x PDR: %08x\n",
getreg32(base + TMS570_GIO_DIR_OFFSET), getreg32(base + TMS570_GIO_DIN_OFFSET),
getreg32(base + TMS570_GIO_DOUT_OFFSET), getreg32(base + TMS570_GIO_PDR_OFFSET));
- lldbg(" PULDIS: %08x PSL: %08x\n",
+ llerr(" PULDIS: %08x PSL: %08x\n",
getreg32(base + TMS570_GIO_PULDIS_OFFSET), getreg32(base + TMS570_GIO_PSL_OFFSET));
leave_critical_section(flags);
diff --git a/arch/avr/src/at32uc3/at32uc3_gpioirq.c b/arch/avr/src/at32uc3/at32uc3_gpioirq.c
index 231af1026d900316b52d77e78c2cd12bccd242e4..0972429bae2131302844f712d5b2fb6ff1dc477f 100644
--- a/arch/avr/src/at32uc3/at32uc3_gpioirq.c
+++ b/arch/avr/src/at32uc3/at32uc3_gpioirq.c
@@ -228,7 +228,7 @@ static void gpio_porthandler(uint32_t regbase, int irqbase, uint32_t irqset, voi
}
else
{
- lldbg("No handler: pin=%d ifr=%08x irqset=%08x",
+ llerr("ERROR: No handler: pin=%d ifr=%08x irqset=%08x",
pin, ifr, irqset);
}
}
@@ -247,8 +247,8 @@ static void gpio_porthandler(uint32_t regbase, int irqbase, uint32_t irqset, voi
putreg32(bit, regbase + AVR32_GPIO_IFRC_OFFSET);
ifr &= ~bit;
- lldbg("IRQ on unconfigured pin: pin=%d ifr=%08x irqset=%08x",
- pin, ifr, irqset);
+ llwarn("WARNING: IRQ on unconfigured pin: pin=%d ifr=%08x irqset=%08x",
+ pin, ifr, irqset);
}
}
}
diff --git a/arch/avr/src/at32uc3/at32uc3_irq.c b/arch/avr/src/at32uc3/at32uc3_irq.c
index 6df9cdf4a6ceb5ee9051a2b0f5bb56e84971e653..f6964b74042b46934881b28cc7f81e3a708d96b3 100644
--- a/arch/avr/src/at32uc3/at32uc3_irq.c
+++ b/arch/avr/src/at32uc3/at32uc3_irq.c
@@ -177,7 +177,7 @@ static int up_getgrp(unsigned int irq)
static int avr32_xcptn(int irq, FAR void *context)
{
(void)up_irq_save();
- lldbg("PANIC!!! Exception IRQ: %d\n", irq);
+ alert("PANIC!!! Exception IRQ: %d\n", irq);
PANIC();
return 0;
}
@@ -321,11 +321,11 @@ unsigned int avr32_intirqno(unsigned int level)
mask <<= 1;
}
- lldbg("Spurious interrupt: group=%d IRR=%08x\n", group, irr);
+ llerr("ERROR: Spurious interrupt: group=%d IRR=%08x\n", group, irr);
return -ENODEV;
}
- lldbg("Bad group: %d\n", group);
+ llerr("ERROR: Bad group: %d\n", group);
return AVR32_IRQ_BADVECTOR;
}
diff --git a/arch/avr/src/at90usb/at90usb_usbdev.c b/arch/avr/src/at90usb/at90usb_usbdev.c
index 7bfe6639b4cd435442038aba446fadb9796bdc37..63b7fe95cd85002bfa8f6f97fb409675ae9f6e06 100644
--- a/arch/avr/src/at90usb/at90usb_usbdev.c
+++ b/arch/avr/src/at90usb/at90usb_usbdev.c
@@ -1399,7 +1399,7 @@ static inline void avr_ep0setup(void)
index = GETUINT16(ctrl.index);
len = GETUINT16(ctrl.len);
- ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ctrl.type, ctrl.req, value, index, len);
/* Dispatch any non-standard requests */
@@ -1596,7 +1596,7 @@ static inline void avr_ep0setup(void)
#ifdef CONFIG_USBDEV_SELFPOWERED
if (value == USB_FEATURE_TESTMODE)
{
- ullvdbg("test mode: %d\n", index);
+ ullinfo("test mode: %d\n", index);
}
else if (value == USB_FEATURE_REMOTEWAKEUP)
{
@@ -2247,7 +2247,7 @@ static int avr_epdisable(FAR struct usbdev_ep_s *ep)
FAR struct avr_ep_s *privep = (FAR struct avr_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
@@ -2279,7 +2279,7 @@ static FAR struct usbdev_req_s *avr_epallocreq(FAR struct usbdev_ep_s *ep)
{
FAR struct avr_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
@@ -2312,7 +2312,7 @@ static void avr_epfreereq(FAR struct usbdev_ep_s *ep,
{
FAR struct avr_req_s *privreq = (FAR struct avr_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
@@ -2382,11 +2382,11 @@ static int avr_epsubmit(FAR struct usbdev_ep_s *ep,
irqstate_t flags;
int ret = OK;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
- ullvdbg("req=%p callback=%p buf=%p ep=%p\n",
+ ullinfo("req=%p callback=%p buf=%p ep=%p\n",
req, req->callback, req->buf, ep);
return -EINVAL;
}
@@ -2484,7 +2484,7 @@ static int avr_epcancel(FAR struct usbdev_ep_s *ep,
FAR struct avr_ep_s *privep = (FAR struct avr_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
@@ -2582,7 +2582,7 @@ static FAR struct usbdev_ep_s *avr_allocep(FAR struct usbdev_s *dev,
* requested 'logical' endpoint.
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (epno >= AVR_NENDPOINTS)
{
usbtrace(TRACE_DEVERROR(AVR_TRACEERR_BADEPNO), (uint16_t)epno);
@@ -2725,7 +2725,7 @@ static int avr_selfpowered(struct usbdev_s *dev, bool selfpowered)
{
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t) selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
@@ -2872,7 +2872,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@@ -2927,7 +2927,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
{
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (driver != g_usbdev.driver)
{
usbtrace(TRACE_DEVERROR(AVR_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/avr/src/avr/up_createstack.c b/arch/avr/src/avr/up_createstack.c
index c2dda4d271d97de33e06569c49afc78907867f2c..54efb1a3fb53f917fb55ac1b18116eda1d513715 100644
--- a/arch/avr/src/avr/up_createstack.c
+++ b/arch/avr/src/avr/up_createstack.c
@@ -122,12 +122,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Was the allocation successful? */
if (!tcb->stack_alloc_ptr)
{
- sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+ serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
}
#endif
}
diff --git a/arch/avr/src/avr/up_dumpstate.c b/arch/avr/src/avr/up_dumpstate.c
index a82b682d35366ea4c392d02cb05842f0404b2d95..9e406b6cab2eef56ed70277c4a43e3ff0ba4c174 100644
--- a/arch/avr/src/avr/up_dumpstate.c
+++ b/arch/avr/src/avr/up_dumpstate.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/avr/src/avr/up_dumpstate.c
*
- * Copyright (C) 2011, 2014 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011, 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
#include
-/* Output debug info -- even if debug is not selected. */
-
-#undef CONFIG_DEBUG
-#undef CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
#include
#include
#include
@@ -97,7 +90,7 @@ static void up_stackdump(uint16_t sp, uint16_t stack_base)
for (stack = sp & ~3; stack < stack_base; stack += 12)
{
uint8_t *ptr = (uint8_t *)stack;
- lldbg("%04x: %02x %02x %02x %02x %02x %02x %02x %02x"
+ alert("%04x: %02x %02x %02x %02x %02x %02x %02x %02x"
" %02x %02x %02x %02x\n",
stack,
ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7],
@@ -115,28 +108,28 @@ static inline void up_registerdump(void)
if (g_current_regs)
{
- lldbg("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
+ alert("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
0,
g_current_regs[REG_R0], g_current_regs[REG_R1],
g_current_regs[REG_R2], g_current_regs[REG_R3],
g_current_regs[REG_R4], g_current_regs[REG_R5],
g_current_regs[REG_R6], g_current_regs[REG_R7]);
- lldbg("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
+ alert("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
8,
g_current_regs[REG_R8], g_current_regs[REG_R9],
g_current_regs[REG_R10], g_current_regs[REG_R11],
g_current_regs[REG_R12], g_current_regs[REG_R13],
g_current_regs[REG_R14], g_current_regs[REG_R15]);
- lldbg("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
+ alert("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
16,
g_current_regs[REG_R16], g_current_regs[REG_R17],
g_current_regs[REG_R18], g_current_regs[REG_R19],
g_current_regs[REG_R20], g_current_regs[REG_R21],
g_current_regs[REG_R22], g_current_regs[REG_R23]);
- lldbg("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
+ alert("R%02d: %02x %02x %02x %02x %02x %02x %02x %02x\n",
24,
g_current_regs[REG_R24], g_current_regs[REG_R25],
g_current_regs[REG_R26], g_current_regs[REG_R27],
@@ -144,12 +137,12 @@ static inline void up_registerdump(void)
g_current_regs[REG_R30], g_current_regs[REG_R31]);
#if !defined(REG_PC2)
- lldbg("PC: %02x%02x SP: %02x%02x SREG: %02x\n",
+ alert("PC: %02x%02x SP: %02x%02x SREG: %02x\n",
g_current_regs[REG_PC0], g_current_regs[REG_PC1],
g_current_regs[REG_SPH], g_current_regs[REG_SPL],
g_current_regs[REG_SREG]);
#else
- lldbg("PC: %02x%02x%02x SP: %02x%02x SREG: %02x\n",
+ alert("PC: %02x%02x%02x SP: %02x%02x SREG: %02x\n",
g_current_regs[REG_PC0], g_current_regs[REG_PC1],
g_current_regs[REG_PC2], g_current_regs[REG_SPH],
g_current_regs[REG_SPL], g_current_regs[REG_SREG]);
@@ -197,12 +190,12 @@ void up_dumpstate(void)
/* Show interrupt stack info */
- lldbg("sp: %04x\n", sp);
- lldbg("IRQ stack:\n");
- lldbg(" base: %04x\n", istackbase);
- lldbg(" size: %04x\n", istacksize);
+ alert("sp: %04x\n", sp);
+ alert("IRQ stack:\n");
+ alert(" base: %04x\n", istackbase);
+ alert(" size: %04x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_intstack());
+ alert(" used: %08x\n", up_check_intstack());
#endif
/* Does the current stack pointer lie within the interrupt
@@ -224,14 +217,14 @@ void up_dumpstate(void)
if (g_current_regs)
{
sp = g_current_regs[REG_R13];
- lldbg("sp: %04x\n", sp);
+ alert("sp: %04x\n", sp);
}
- lldbg("User stack:\n");
- lldbg(" base: %04x\n", ustackbase);
- lldbg(" size: %04x\n", ustacksize);
+ alert("User stack:\n");
+ alert(" base: %04x\n", ustackbase);
+ alert(" size: %04x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_tcbstack(rtcb));
+ alert(" used: %08x\n", up_check_tcbstack(rtcb));
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@@ -243,11 +236,11 @@ void up_dumpstate(void)
up_stackdump(sp, ustackbase);
}
#else
- lldbg("sp: %04x\n", sp);
- lldbg("stack base: %04x\n", ustackbase);
- lldbg("stack size: %04x\n", ustacksize);
+ alert("sp: %04x\n", sp);
+ alert("stack base: %04x\n", ustackbase);
+ alert("stack size: %04x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
+ alert("stack used: %08x\n", up_check_tcbstack(rtcb));
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@@ -256,7 +249,7 @@ void up_dumpstate(void)
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
- lldbg("ERROR: Stack pointer is not within allocated stack\n");
+ alert("ERROR: Stack pointer is not within allocated stack\n");
}
else
{
diff --git a/arch/avr/src/avr/up_initialstate.c b/arch/avr/src/avr/up_initialstate.c
index 506b28c6200bd38c5d1f24de80c9c335aa461dd5..057054d437a3c64e7c920d7f72bc8f4f52eaf59c 100644
--- a/arch/avr/src/avr/up_initialstate.c
+++ b/arch/avr/src/avr/up_initialstate.c
@@ -50,18 +50,6 @@
#include "up_internal.h"
#include "up_arch.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/avr/src/avr/up_releasepending.c b/arch/avr/src/avr/up_releasepending.c
index 80789fee51dfeb8e2e91d9d1dd9f9fe4de6197db..2501d8340c4c529ac444444a904dd7d388239c98 100644
--- a/arch/avr/src/avr/up_releasepending.c
+++ b/arch/avr/src/avr/up_releasepending.c
@@ -66,7 +66,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
- slldbg("From TCB=%p\n", rtcb);
+ sllinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
diff --git a/arch/avr/src/avr/up_reprioritizertr.c b/arch/avr/src/avr/up_reprioritizertr.c
index 28978a19dabe78cf792553af78e9b0d011e22e9f..24fdd401cd619ebacde4d82679a455fe98b97e28 100644
--- a/arch/avr/src/avr/up_reprioritizertr.c
+++ b/arch/avr/src/avr/up_reprioritizertr.c
@@ -94,7 +94,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
- slldbg("TCB=%p PRI=%d\n", tcb, priority);
+ sllinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
diff --git a/arch/avr/src/avr/up_schedulesigaction.c b/arch/avr/src/avr/up_schedulesigaction.c
index 5c6cbf52eee68272e7d17d6c5cfce079a25f5705..16f7a3358709f4639760884ab0b2467be373321d 100644
--- a/arch/avr/src/avr/up_schedulesigaction.c
+++ b/arch/avr/src/avr/up_schedulesigaction.c
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+ sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -108,7 +108,8 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* being delivered to the currently executing task.
*/
- sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+ sinfo("rtcb=0x%p g_current_regs=0x%p\n",
+ this_task(), g_current_regs);
if (tcb == this_task())
{
diff --git a/arch/avr/src/avr/up_sigdeliver.c b/arch/avr/src/avr/up_sigdeliver.c
index e786cba00c6c8edeb9a5429f3324398af182a26a..c73460793e68599793ff2b10058166d115ebce7d 100644
--- a/arch/avr/src/avr/up_sigdeliver.c
+++ b/arch/avr/src/avr/up_sigdeliver.c
@@ -82,7 +82,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -117,7 +117,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/avr/src/avr/up_spi.c b/arch/avr/src/avr/up_spi.c
index 94de828c1582948d5aa832cf9818890c7dfae54c..29b236dcb067a28a5efe2fc9c272cdb793438df8 100644
--- a/arch/avr/src/avr/up_spi.c
+++ b/arch/avr/src/avr/up_spi.c
@@ -66,22 +66,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-# define spidbg lldbg
-# ifdef SPI_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+/* Enables debug output from this file */
+
+#ifdef CONFIG_DEBUG_SPI
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# undef SPI_VERBOSE
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
/****************************************************************************
@@ -269,7 +263,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
actual = priv->actual;
}
- spidbg("Frequency %d->%d\n", frequency, actual);
+ spiinfo("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -408,7 +402,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
{
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
- spidbg("nwords: %d\n", nwords);
+ spiinfo("nwords: %d\n", nwords);
while (nwords-- > 0)
{
(void)spi_send(dev, (uint16_t)*ptr++);
@@ -439,7 +433,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
{
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
- spidbg("nwords: %d\n", nwords);
+ spiinfo("nwords: %d\n", nwords);
while (nwords-- > 0)
{
*ptr++ = spi_send(dev, (uint16_t)0xff);
diff --git a/arch/avr/src/avr32/up_createstack.c b/arch/avr/src/avr32/up_createstack.c
index db76abc38d9d21f88a75ccb8d56c37c84d9c7d20..6bc17519bc26127bace92f63bb728a02f03f1971 100644
--- a/arch/avr/src/avr32/up_createstack.c
+++ b/arch/avr/src/avr32/up_createstack.c
@@ -140,12 +140,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Was the allocation successful? */
if (!tcb->stack_alloc_ptr)
{
- sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+ serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
}
#endif
}
diff --git a/arch/avr/src/avr32/up_dumpstate.c b/arch/avr/src/avr32/up_dumpstate.c
index 31daafdedb78ca8e40223dd46ced62291c453ba8..16a5406aa421685da9ae0220b03721430542d680 100644
--- a/arch/avr/src/avr32/up_dumpstate.c
+++ b/arch/avr/src/avr32/up_dumpstate.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/avr/src/avr32/up_dumpstate.c
*
- * Copyright (C) 2010-2011, 2014 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2010-2011, 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
#include
-/* Output debug info -- even if debug is not selected. */
-
-#undef CONFIG_DEBUG
-#undef CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
#include
#include
#include
@@ -93,7 +86,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
- lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@@ -109,21 +102,21 @@ static inline void up_registerdump(void)
if (g_current_regs)
{
- lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
0,
g_current_regs[REG_R0], g_current_regs[REG_R1],
g_current_regs[REG_R2], g_current_regs[REG_R3],
g_current_regs[REG_R4], g_current_regs[REG_R5],
g_current_regs[REG_R6], g_current_regs[REG_R7]);
- lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
8,
g_current_regs[REG_R8], g_current_regs[REG_R9],
g_current_regs[REG_R10], g_current_regs[REG_R11],
g_current_regs[REG_R12], g_current_regs[REG_R13],
g_current_regs[REG_R14], g_current_regs[REG_R15]);
- lldbg("SR: %08x\n", g_current_regs[REG_SR]);
+ alert("SR: %08x\n", g_current_regs[REG_SR]);
}
}
@@ -163,12 +156,12 @@ void up_dumpstate(void)
/* Show interrupt stack info */
- lldbg("sp: %08x\n", sp);
- lldbg("IRQ stack:\n");
- lldbg(" base: %08x\n", istackbase);
- lldbg(" size: %08x\n", istacksize);
+ alert("sp: %08x\n", sp);
+ alert("IRQ stack:\n");
+ alert(" base: %08x\n", istackbase);
+ alert(" size: %08x\n", istacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_intstack());
+ alert(" used: %08x\n", up_check_intstack());
#endif
/* Does the current stack pointer lie within the interrupt
@@ -190,14 +183,14 @@ void up_dumpstate(void)
if (g_current_regs)
{
sp = g_current_regs[REG_R13];
- lldbg("sp: %08x\n", sp);
+ alert("sp: %08x\n", sp);
}
- lldbg("User stack:\n");
- lldbg(" base: %08x\n", ustackbase);
- lldbg(" size: %08x\n", ustacksize);
+ alert("User stack:\n");
+ alert(" base: %08x\n", ustackbase);
+ alert(" size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg(" used: %08x\n", up_check_tcbstack(rtcb));
+ alert(" used: %08x\n", up_check_tcbstack(rtcb));
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@@ -209,11 +202,11 @@ void up_dumpstate(void)
up_stackdump(sp, ustackbase);
}
#else
- lldbg("sp: %08x\n", sp);
- lldbg("stack base: %08x\n", ustackbase);
- lldbg("stack size: %08x\n", ustacksize);
+ alert("sp: %08x\n", sp);
+ alert("stack base: %08x\n", ustackbase);
+ alert("stack size: %08x\n", ustacksize);
#ifdef CONFIG_STACK_COLORATION
- lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
+ alert("stack used: %08x\n", up_check_tcbstack(rtcb));
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@@ -222,7 +215,7 @@ void up_dumpstate(void)
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
- lldbg("ERROR: Stack pointer is not within allocated stack\n");
+ alert("ERROR: Stack pointer is not within allocated stack\n");
}
else
{
diff --git a/arch/avr/src/avr32/up_initialstate.c b/arch/avr/src/avr32/up_initialstate.c
index 821637423ae757dcaf60ca481c0650fac0d001a7..641d6278bda42cdf467bd0dcac79dc29644f51ac 100644
--- a/arch/avr/src/avr32/up_initialstate.c
+++ b/arch/avr/src/avr32/up_initialstate.c
@@ -85,7 +85,7 @@ void up_initial_state(struct tcb_s *tcb)
* all registers is a good debug helper, but should not be necessary.
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
memset(xcp, 0, sizeof(struct xcptcontext));
#else
/* No pending signal delivery */
diff --git a/arch/avr/src/avr32/up_releasepending.c b/arch/avr/src/avr32/up_releasepending.c
index aaae06b59e480c1318a9ee3d660bbdf943ca3274..29bc26dbf21aab1fa97f9f20502c2fa965e4a809 100644
--- a/arch/avr/src/avr32/up_releasepending.c
+++ b/arch/avr/src/avr32/up_releasepending.c
@@ -67,7 +67,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
- slldbg("From TCB=%p\n", rtcb);
+ sllinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
diff --git a/arch/avr/src/avr32/up_reprioritizertr.c b/arch/avr/src/avr32/up_reprioritizertr.c
index 88732c2b06e167907d86bd72cb128aaacea2632c..bf60353cf1fdf20d4509fa051f186e52f4007456 100644
--- a/arch/avr/src/avr32/up_reprioritizertr.c
+++ b/arch/avr/src/avr32/up_reprioritizertr.c
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
- slldbg("TCB=%p PRI=%d\n", tcb, priority);
+ sllinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
diff --git a/arch/avr/src/avr32/up_schedulesigaction.c b/arch/avr/src/avr32/up_schedulesigaction.c
index 838c1382c2d643fbc566a7710ad65d25d6e66d6f..4ec759448da6e248a926d89c3246a44ce0781cc2 100644
--- a/arch/avr/src/avr32/up_schedulesigaction.c
+++ b/arch/avr/src/avr32/up_schedulesigaction.c
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+ sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -108,7 +108,8 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* being delivered to the currently executing task.
*/
- sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+ sinfo("rtcb=0x%p g_current_regs=0x%p\n",
+ this_task(), g_current_regs);
if (tcb == this_task())
{
diff --git a/arch/avr/src/avr32/up_sigdeliver.c b/arch/avr/src/avr32/up_sigdeliver.c
index 883bec974204ca75e07f15a245fe76353354f9f7..811e4b031cbda97c689cd4d956b5507d644a4f68 100644
--- a/arch/avr/src/avr32/up_sigdeliver.c
+++ b/arch/avr/src/avr32/up_sigdeliver.c
@@ -86,7 +86,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -117,7 +117,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/avr/src/common/up_assert.c b/arch/avr/src/common/up_assert.c
index 8ea84f017bc3dd454a3984a328ee0b47f84e8847..dc6411081e45d73e4606f814475f63455f3db48c 100644
--- a/arch/avr/src/common/up_assert.c
+++ b/arch/avr/src/common/up_assert.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/avr/src/common/up_assert.c
*
- * Copyright (C) 2010-2011, 2013-2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2010-2011, 2013-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -75,23 +64,6 @@
# undef CONFIG_ARCH_USBDUMP
#endif
-/* The following is just intended to keep some ugliness out of the mainline
- * code. We are going to print the task name if:
- *
- * CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
- * (defined(CONFIG_DEBUG) || <-- And the debug is enabled (lldbg used)
- * defined(CONFIG_ARCH_STACKDUMP)) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-# define CONFIG_PRINT_TASKNAME 1
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -159,17 +131,17 @@ static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
void up_assert(const uint8_t *filename, int lineno)
{
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0
struct tcb_s *rtcb = this_task();
#endif
board_autoled_on(LED_ASSERTION);
-#ifdef CONFIG_PRINT_TASKNAME
- lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+ alert("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
- lldbg("Assertion failed at file:%s line: %d\n",
+ alert("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
diff --git a/arch/avr/src/common/up_exit.c b/arch/avr/src/common/up_exit.c
index 936a79d2331c7c58f54b5789ed2ef5c985e5cc27..73dd3bb353b5c67dd9a1bc89b475e44c8003ced0 100644
--- a/arch/avr/src/common/up_exit.c
+++ b/arch/avr/src/common/up_exit.c
@@ -66,7 +66,7 @@
*
****************************************************************************/
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
{
#if CONFIG_NFILE_DESCRIPTORS > 0
@@ -77,8 +77,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
int i;
#endif
- sdbg(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
- sdbg(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+ sinfo(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+ sinfo(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
#if CONFIG_NFILE_DESCRIPTORS > 0
filelist = tcb->group->tg_filelist;
@@ -87,8 +87,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
struct inode *inode = filelist->fl_files[i].f_inode;
if (inode)
{
- sdbg(" fd=%d refcount=%d\n",
- i, inode->i_crefs);
+ sinfo(" fd=%d refcount=%d\n",
+ i, inode->i_crefs);
}
}
#endif
@@ -101,11 +101,11 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
if (filep->fs_fd >= 0)
{
#if CONFIG_STDIO_BUFFER_SIZE > 0
- sdbg(" fd=%d nbytes=%d\n",
- filep->fs_fd,
- filep->fs_bufpos - filep->fs_bufstart);
+ sinfo(" fd=%d nbytes=%d\n",
+ filep->fs_fd,
+ filep->fs_bufpos - filep->fs_bufstart);
#else
- sdbg(" fd=%d\n", filep->fs_fd);
+ sinfo(" fd=%d\n", filep->fs_fd);
#endif
}
}
@@ -138,10 +138,10 @@ void _exit(int status)
(void)up_irq_save();
- slldbg("TCB=%p exiting\n", this_task());
+ sllinfo("TCB=%p exiting\n", this_task());
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
- slldbg("Other tasks:\n");
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
+ sllinfo("Other tasks:\n");
sched_foreach(_up_dumponexit, NULL);
#endif
diff --git a/arch/avr/src/common/up_initialize.c b/arch/avr/src/common/up_initialize.c
index 5c36cd08144fad14026b9f3e948f6587b3a54068..8f58cdcf6ee8d293707528000fc800548acd2ee1 100644
--- a/arch/avr/src/common/up_initialize.c
+++ b/arch/avr/src/common/up_initialize.c
@@ -120,18 +120,18 @@
*
****************************************************************************/
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
static void up_calibratedelay(void)
{
int i;
- lldbg("Beginning 100s delay\n");
+ llwarn("Beginning 100s delay\n");
for (i = 0; i < 100; i++)
{
up_mdelay(1000);
}
- lldbg("End 100s delay\n");
+ llwarn("End 100s delay\n");
}
#else
# define up_calibratedelay()
diff --git a/arch/hc/src/common/up_createstack.c b/arch/hc/src/common/up_createstack.c
index 9afb471e470f9a9f5402040bd2577edb26a496cd..f09b98a87a20ad4e710e60609c96a882c2b89e23 100644
--- a/arch/hc/src/common/up_createstack.c
+++ b/arch/hc/src/common/up_createstack.c
@@ -137,12 +137,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Was the allocation successful? */
if (!tcb->stack_alloc_ptr)
{
- sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+ serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
}
#endif
}
diff --git a/arch/hc/src/common/up_exit.c b/arch/hc/src/common/up_exit.c
index f80a4c3b0e00850c7de1f5c5d9a813d6c06f2f92..251e91cefc4e3c46b7ec3a65601995bc2fe97758 100644
--- a/arch/hc/src/common/up_exit.c
+++ b/arch/hc/src/common/up_exit.c
@@ -74,7 +74,7 @@
*
****************************************************************************/
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
{
#if CONFIG_NFILE_DESCRIPTORS > 0
@@ -85,8 +85,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
int i;
#endif
- sdbg(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
- sdbg(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+ sinfo(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+ sinfo(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
#if CONFIG_NFILE_DESCRIPTORS > 0
filelist = tcb->group->tg_filelist;
@@ -95,8 +95,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
struct inode *inode = filelist->fl_files[i].f_inode;
if (inode)
{
- sdbg(" fd=%d refcount=%d\n",
- i, inode->i_crefs);
+ sinfo(" fd=%d refcount=%d\n",
+ i, inode->i_crefs);
}
}
#endif
@@ -109,11 +109,11 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
if (filep->fs_fd >= 0)
{
#if CONFIG_STDIO_BUFFER_SIZE > 0
- sdbg(" fd=%d nbytes=%d\n",
- filep->fs_fd,
- filep->fs_bufpos - filep->fs_bufstart);
+ sinfo(" fd=%d nbytes=%d\n",
+ filep->fs_fd,
+ filep->fs_bufpos - filep->fs_bufstart);
#else
- sdbg(" fd=%d\n", filep->fs_fd);
+ sinfo(" fd=%d\n", filep->fs_fd);
#endif
}
}
@@ -146,10 +146,10 @@ void _exit(int status)
(void)up_irq_save();
- slldbg("TCB=%p exiting\n", this_task());
+ sllinfo("TCB=%p exiting\n", this_task());
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
- slldbg("Other tasks:\n");
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
+ sllinfo("Other tasks:\n");
sched_foreach(_up_dumponexit, NULL);
#endif
diff --git a/arch/hc/src/common/up_initialize.c b/arch/hc/src/common/up_initialize.c
index 30daa39ea29ba63289d2e6cdad8aa92006bd9507..a358d29e9bb89214843f4e6605be47ffef41e8f1 100644
--- a/arch/hc/src/common/up_initialize.c
+++ b/arch/hc/src/common/up_initialize.c
@@ -69,18 +69,18 @@
*
****************************************************************************/
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
static void up_calibratedelay(void)
{
int i;
- lldbg("Beginning 100s delay\n");
+ llwarn("Beginning 100s delay\n");
for (i = 0; i < 100; i++)
{
up_mdelay(1000);
}
- lldbg("End 100s delay\n");
+ llwarn("End 100s delay\n");
}
#else
# define up_calibratedelay()
diff --git a/arch/hc/src/common/up_releasepending.c b/arch/hc/src/common/up_releasepending.c
index d9a209c343765022ac61114163dd75ec94336fc8..5d237ac478fac83aafbdf0fef724b4ef8f2a546e 100644
--- a/arch/hc/src/common/up_releasepending.c
+++ b/arch/hc/src/common/up_releasepending.c
@@ -66,7 +66,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
- slldbg("From TCB=%p\n", rtcb);
+ sllinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
diff --git a/arch/hc/src/common/up_reprioritizertr.c b/arch/hc/src/common/up_reprioritizertr.c
index efdde667389c5d8490a1ed9e49dd33c2955e37cd..986b9ed3acf0e5d1db3195365a5b93dddb15842d 100644
--- a/arch/hc/src/common/up_reprioritizertr.c
+++ b/arch/hc/src/common/up_reprioritizertr.c
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
- slldbg("TCB=%p PRI=%d\n", tcb, priority);
+ sllinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
diff --git a/arch/hc/src/m9s12/m9s12_assert.c b/arch/hc/src/m9s12/m9s12_assert.c
index 1eab6eb4e340eb853404673bb306161d1494a1f7..1074adfb800920b3c0ac8cb98be2902a43754d84 100644
--- a/arch/hc/src/m9s12/m9s12_assert.c
+++ b/arch/hc/src/m9s12/m9s12_assert.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/hc/src/m9s12/m9s12_assert.c
*
- * Copyright (C) 2011-2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -75,23 +64,6 @@
# undef CONFIG_ARCH_USBDUMP
#endif
-/* The following is just intended to keep some ugliness out of the mainline
- * code. We are going to print the task name if:
- *
- * CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
- * (defined(CONFIG_DEBUG) || <-- And the debug is enabled (lldbg used)
- * defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-# define CONFIG_PRINT_TASKNAME 1
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -108,7 +80,7 @@ static void up_stackdump(uint16_t sp, uint16_t stack_base)
for (stack = sp; stack < stack_base; stack += 16)
{
uint8_t *ptr = (uint8_t*)stack;
- lldbg("%04x: %02x %02x %02x %02x %02x %02x %02x %02x"
+ alert("%04x: %02x %02x %02x %02x %02x %02x %02x %02x"
" %02x %02x %02x %02x %02x %02x %02x %02x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7],
ptr[8], ptr[9], ptr[10], ptr[11], ptr[12], ptr[13], ptr[14], ptr[15]);
@@ -129,11 +101,11 @@ static inline void up_registerdump(void)
if (g_current_regs)
{
- lldbg("A:%02x B:%02x X:%02x%02x Y:%02x%02x PC:%02x%02x CCR:%02x\n",
+ alert("A:%02x B:%02x X:%02x%02x Y:%02x%02x PC:%02x%02x CCR:%02x\n",
g_current_regs[REG_A], g_current_regs[REG_B], g_current_regs[REG_XH],
g_current_regs[REG_XL], g_current_regs[REG_YH], g_current_regs[REG_YL],
g_current_regs[REG_PCH], g_current_regs[REG_PCL], g_current_regs[REG_CCR]);
- lldbg("SP:%02x%02x FRAME:%02x%02x TMP:%02x%02x Z:%02x%02x XY:%02x\n",
+ alert("SP:%02x%02x FRAME:%02x%02x TMP:%02x%02x Z:%02x%02x XY:%02x\n",
g_current_regs[REG_SPH], g_current_regs[REG_SPL],
g_current_regs[REG_FRAMEH], g_current_regs[REG_FRAMEL],
g_current_regs[REG_TMPL], g_current_regs[REG_TMPH], g_current_regs[REG_ZL],
@@ -142,16 +114,16 @@ static inline void up_registerdump(void)
#if CONFIG_HCS12_MSOFTREGS > 2
# error "Need to save more registers"
#elif CONFIG_HCS12_MSOFTREGS == 2
- lldbg("SOFTREGS: %02x%02x :%02x%02x\n",
+ alert("SOFTREGS: %02x%02x :%02x%02x\n",
g_current_regs[REG_SOFTREG1], g_current_regs[REG_SOFTREG1+1],
g_current_regs[REG_SOFTREG2], g_current_regs[REG_SOFTREG2+1]);
#elif CONFIG_HCS12_MSOFTREGS == 1
- lldbg("SOFTREGS: %02x%02x\n", g_current_regs[REG_SOFTREG1],
+ alert("SOFTREGS: %02x%02x\n", g_current_regs[REG_SOFTREG1],
g_current_regs[REG_SOFTREG1+1]);
#endif
#ifndef CONFIG_HCS12_NONBANKED
- lldbg("PPAGE: %02x\n", g_current_regs[REG_PPAGE],);
+ alert("PPAGE: %02x\n", g_current_regs[REG_PPAGE],);
#endif
}
}
@@ -221,10 +193,10 @@ static void up_dumpstate(void)
/* Show interrupt stack info */
- lldbg("sp: %04x\n", sp);
- lldbg("IRQ stack:\n");
- lldbg(" base: %04x\n", istackbase);
- lldbg(" size: %04x\n", istacksize);
+ alert("sp: %04x\n", sp);
+ alert("IRQ stack:\n");
+ alert(" base: %04x\n", istackbase);
+ alert(" size: %04x\n", istacksize);
/* Does the current stack pointer lie within the interrupt
* stack?
@@ -241,18 +213,18 @@ static void up_dumpstate(void)
*/
sp = g_intstackbase;
- lldbg("sp: %04x\n", sp);
+ alert("sp: %04x\n", sp);
}
/* Show user stack info */
- lldbg("User stack:\n");
- lldbg(" base: %04x\n", ustackbase);
- lldbg(" size: %04x\n", ustacksize);
+ alert("User stack:\n");
+ alert(" base: %04x\n", ustackbase);
+ alert(" size: %04x\n", ustacksize);
#else
- lldbg("sp: %04x\n", sp);
- lldbg("stack base: %04x\n", ustackbase);
- lldbg("stack size: %04x\n", ustacksize);
+ alert("sp: %04x\n", sp);
+ alert("stack base: %04x\n", ustackbase);
+ alert("stack size: %04x\n", ustacksize);
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@@ -262,7 +234,7 @@ static void up_dumpstate(void)
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
- lldbg("ERROR: Stack pointer is not within allocated stack\n");
+ alert("ERROR: Stack pointer is not within allocated stack\n");
#endif
}
else
@@ -322,17 +294,17 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0
struct tcb_s *rtcb = this_task();
#endif
board_autoled_on(LED_ASSERTION);
-#ifdef CONFIG_PRINT_TASKNAME
- lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+ alert("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
- lldbg("Assertion failed at file:%s line: %d\n",
+ alert("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
diff --git a/arch/hc/src/m9s12/m9s12_dumpgpio.c b/arch/hc/src/m9s12/m9s12_dumpgpio.c
index db4261256ba2ca623b2a7dae76dab0dd62c7edcd..9a4ae61a657c2ed36169f00acd3121ceb05db756 100644
--- a/arch/hc/src/m9s12/m9s12_dumpgpio.c
+++ b/arch/hc/src/m9s12/m9s12_dumpgpio.c
@@ -1,8 +1,7 @@
/****************************************************************************
* arch/arm/src/m9s12/m9s12_dumpgpio.c
- * arch/arm/src/chip/m9s12_dumpgpio.c
*
- * Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -40,6 +39,13 @@
#include
+/* Output debug info -- even if debug is not selected. */
+
+#undef CONFIG_DEBUG_FEATURES
+#undef CONFIG_DEBUG_INFO
+#define CONFIG_DEBUG_FEATURES 1
+#define CONFIG_DEBUG_INFO 1
+
#include
#include
#include
@@ -166,39 +172,39 @@ static inline void hcs12_pimdump(uint8_t portndx)
if (portndx >= HCS12_PIM_NPORTS)
{
- lldbg(" Illegal PIM port index: %d\n", portndx);
+ llinfo(" Illegal PIM port index: %d\n", portndx);
return;
}
ptr = &piminfo[portndx];
- lldbg(" PIM Port%c:\n", ptr->name);
- lldbg(" IO:%02x INP:%02x DDR:%02x RDR:%02x\n",
- getreg8(ptr->base+HCS12_PIM_IO_OFFSET),
- getreg8(ptr->base+HCS12_PIM_INPUT_OFFSET),
- getreg8(ptr->base+HCS12_PIM_DDR_OFFSET),
- getreg8(ptr->base+HCS12_PIM_RDR_OFFSET));
+ llinfo(" PIM Port%c:\n", ptr->name);
+ llinfo(" IO:%02x INP:%02x DDR:%02x RDR:%02x\n",
+ getreg8(ptr->base+HCS12_PIM_IO_OFFSET),
+ getreg8(ptr->base+HCS12_PIM_INPUT_OFFSET),
+ getreg8(ptr->base+HCS12_PIM_DDR_OFFSET),
+ getreg8(ptr->base+HCS12_PIM_RDR_OFFSET));
switch (ptr->form)
{
case PIMPORT_FORM1:
- lldbg(" PER:%02x PS:%02x\n",
- getreg8(ptr->base+HCS12_PIM_PER_OFFSET),
- getreg8(ptr->base+HCS12_PIM_PS_OFFSET));
+ llinfo(" PER:%02x PS:%02x\n",
+ getreg8(ptr->base+HCS12_PIM_PER_OFFSET),
+ getreg8(ptr->base+HCS12_PIM_PS_OFFSET));
break;
case PIMPORT_FORM2:
- lldbg(" PER:%02x PS:%02x WOM:%02x\n",
- getreg8(ptr->base+HCS12_PIM_PER_OFFSET),
- getreg8(ptr->base+HCS12_PIM_PS_OFFSET),
- getreg8(ptr->base+HCS12_PIM_WOM_OFFSET));
+ llinfo(" PER:%02x PS:%02x WOM:%02x\n",
+ getreg8(ptr->base+HCS12_PIM_PER_OFFSET),
+ getreg8(ptr->base+HCS12_PIM_PS_OFFSET),
+ getreg8(ptr->base+HCS12_PIM_WOM_OFFSET));
break;
case PIMPORT_FORM3:
- lldbg(" PER:%02x PS:%02x IE:%02x IF:%02x\n",
- getreg8(ptr->base+HCS12_PIM_PER_OFFSET),
- getreg8(ptr->base+HCS12_PIM_PS_OFFSET),
- getreg8(ptr->base+HCS12_PIM_IE_OFFSET),
- getreg8(ptr->base+HCS12_PIM_IF_OFFSET));
+ llinfo(" PER:%02x PS:%02x IE:%02x IF:%02x\n",
+ getreg8(ptr->base+HCS12_PIM_PER_OFFSET),
+ getreg8(ptr->base+HCS12_PIM_PS_OFFSET),
+ getreg8(ptr->base+HCS12_PIM_IE_OFFSET),
+ getreg8(ptr->base+HCS12_PIM_IF_OFFSET));
break;
default:
@@ -220,30 +226,30 @@ static inline void hcs12_mebidump(uint8_t portndx)
if (portndx >= HCS12_MEBI_NPORTS)
{
- lldbg(" Illegal MEBI port index: %d\n", portndx);
+ llinfo(" Illegal MEBI port index: %d\n", portndx);
return;
}
ptr = &mebiinfo[portndx];
- lldbg(" MEBI Port%c:\n", ptr->name);
+ llinfo(" MEBI Port%c:\n", ptr->name);
switch (ptr->form)
{
case MEBIPORT_AB:
- lldbg(" DATA:%02x DDR:%02x\n",
+ llinfo(" DATA:%02x DDR:%02x\n",
getreg8(ptr->data), getreg8(ptr->ddr));
break;
case MEBIPORT_E:
- lldbg(" DATA:%02x DDR:%02x MODE:%02x PEAR:%02x\n",
- getreg8(ptr->data), getreg8(ptr->ddr),
- getreg8(HCS12_MEBI_MODE), getreg8(HCS12_MEBI_PEAR));
+ llinfo(" DATA:%02x DDR:%02x MODE:%02x PEAR:%02x\n",
+ getreg8(ptr->data), getreg8(ptr->ddr),
+ getreg8(HCS12_MEBI_MODE), getreg8(HCS12_MEBI_PEAR));
break;
case MEBIPORT_K:
- lldbg(" DATA:%02x DDR:%02x MODE:%02x\n",
- getreg8(ptr->data), getreg8(ptr->ddr),
- getreg8(HCS12_MEBI_MODE));
+ llinfo(" DATA:%02x DDR:%02x MODE:%02x\n",
+ getreg8(ptr->data), getreg8(ptr->ddr),
+ getreg8(HCS12_MEBI_MODE));
break;
default:
@@ -268,7 +274,7 @@ int hcs12_dumpgpio(uint16_t pinset, const char *msg)
uint8_t portndx = HCS12_PORTNDX(pinset);
irqstate_t flags = enter_critical_section();
- lldbg("pinset: %08x -- %s\n", pinset, msg);
+ llinfo("pinset: %08x -- %s\n", pinset, msg);
if (HCS12_PIMPORT(pinset))
{
@@ -284,4 +290,3 @@ int hcs12_dumpgpio(uint16_t pinset, const char *msg)
}
#endif /* CONFIG_DEBUG_GPIO */
-
diff --git a/arch/hc/src/m9s12/m9s12_ethernet.c b/arch/hc/src/m9s12/m9s12_ethernet.c
index ad3e1ef6b86d96165bdb3678c10708e4057868d0..1dd9c6b4fc360f3d1048058da2b76ee6435c27f9 100644
--- a/arch/hc/src/m9s12/m9s12_ethernet.c
+++ b/arch/hc/src/m9s12/m9s12_ethernet.c
@@ -294,7 +294,7 @@ static void emac_receive(FAR struct emac_driver_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
/* Handle ARP on input then give the IPv4 packet to the network
* layer
@@ -334,7 +334,7 @@ static void emac_receive(FAR struct emac_driver_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
/* Give the IPv6 packet to the network layer */
@@ -549,9 +549,9 @@ static int emac_ifup(struct net_driver_s *dev)
{
FAR struct emac_driver_s *priv = (FAR struct emac_driver_s *)dev->d_private;
- ndbg("Bringing up: %d.%d.%d.%d\n",
- dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
- (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
+ ninfo("Bringing up: %d.%d.%d.%d\n",
+ dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+ (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24 );
/* Initialize PHYs, the Ethernet interface, and setup up Ethernet interrupts */
diff --git a/arch/hc/src/m9s12/m9s12_gpio.c b/arch/hc/src/m9s12/m9s12_gpio.c
index 7d43f0a3d8a6fef99dc18f81e75648d6379315f6..0004bdf5de7af9886749dedee39b299c19911e3e 100644
--- a/arch/hc/src/m9s12/m9s12_gpio.c
+++ b/arch/hc/src/m9s12/m9s12_gpio.c
@@ -304,7 +304,7 @@ static inline void pim_configgpio(uint16_t cfgset, uint8_t portndx, uint8_t pin)
DEBUGASSERT(portndx < HCS12_PIM_NPORTS);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if ((cfgset & GPIO_INT_ENABLE) != 0)
{
/* Yes.. then it must not be tagged as an output */
diff --git a/arch/hc/src/m9s12/m9s12_start.S b/arch/hc/src/m9s12/m9s12_start.S
index 49d31b4e1dde018cda7dabf6c5d5e17904aa228b..3747967f5b76b447e213f4454897d411d3d2dd47 100644
--- a/arch/hc/src/m9s12/m9s12_start.S
+++ b/arch/hc/src/m9s12/m9s12_start.S
@@ -82,7 +82,7 @@
*/
.macro showprogress, code
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
ldab \code
#ifdef CONFIG_HCS12_SERIALMON
jsr #PutChar
diff --git a/arch/mips/src/common/up_createstack.c b/arch/mips/src/common/up_createstack.c
index 5540b8bc4f8fde821587e2e4d1d15a8545c0f9b1..69d5ff04869639cda3aa6e90a9ee77f871a2ef7a 100644
--- a/arch/mips/src/common/up_createstack.c
+++ b/arch/mips/src/common/up_createstack.c
@@ -158,12 +158,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Was the allocation successful? */
if (!tcb->stack_alloc_ptr)
{
- sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+ serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
}
#endif
}
diff --git a/arch/mips/src/common/up_exit.c b/arch/mips/src/common/up_exit.c
index 36a1d2b1704dafae3e1cc0d12bf9b07382d3795e..d26de05841f93d1d298ab239d8dd85aa619e8c8d 100644
--- a/arch/mips/src/common/up_exit.c
+++ b/arch/mips/src/common/up_exit.c
@@ -76,7 +76,7 @@
*
****************************************************************************/
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
{
#if CONFIG_NFILE_DESCRIPTORS > 0
@@ -87,8 +87,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
int i;
#endif
- sdbg(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
- sdbg(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+ sinfo(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+ sinfo(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
#if CONFIG_NFILE_DESCRIPTORS > 0
filelist = tcb->group->tg_filelist;
@@ -97,8 +97,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
struct inode *inode = filelist->fl_files[i].f_inode;
if (inode)
{
- sdbg(" fd=%d refcount=%d\n",
- i, inode->i_crefs);
+ sinfo(" fd=%d refcount=%d\n",
+ i, inode->i_crefs);
}
}
#endif
@@ -111,11 +111,11 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
if (filep->fs_fd >= 0)
{
#if CONFIG_STDIO_BUFFER_SIZE > 0
- sdbg(" fd=%d nbytes=%d\n",
- filep->fs_fd,
- filep->fs_bufpos - filep->fs_bufstart);
+ sinfo(" fd=%d nbytes=%d\n",
+ filep->fs_fd,
+ filep->fs_bufpos - filep->fs_bufstart);
#else
- sdbg(" fd=%d\n", filep->fs_fd);
+ sinfo(" fd=%d\n", filep->fs_fd);
#endif
}
}
@@ -148,10 +148,10 @@ void _exit(int status)
(void)up_irq_save();
- slldbg("TCB=%p exiting\n", this_task());
+ sllinfo("TCB=%p exiting\n", this_task());
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
- slldbg("Other tasks:\n");
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
+ sllinfo("Other tasks:\n");
sched_foreach(_up_dumponexit, NULL);
#endif
diff --git a/arch/mips/src/common/up_initialize.c b/arch/mips/src/common/up_initialize.c
index b7df229f2f04c9a6c52b3a38a6a1c8f8541fc5ca..252902026723cfd6c2a7ddc52343949e7c1d8a88 100644
--- a/arch/mips/src/common/up_initialize.c
+++ b/arch/mips/src/common/up_initialize.c
@@ -71,18 +71,18 @@
*
****************************************************************************/
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
static void up_calibratedelay(void)
{
int i;
- lldbg("Beginning 100s delay\n");
+ llwarn("Beginning 100s delay\n");
for (i = 0; i < 100; i++)
{
up_mdelay(1000);
}
- lldbg("End 100s delay\n");
+ llwarn("End 100s delay\n");
}
#else
# define up_calibratedelay()
diff --git a/arch/mips/src/mips32/up_assert.c b/arch/mips/src/mips32/up_assert.c
index 8b4ae3e50aba8d7164bc42bd96ee7f1fa44166ad..1f4ab15d6be4286f632bc650d1f753f4e47dc6ae 100644
--- a/arch/mips/src/mips32/up_assert.c
+++ b/arch/mips/src/mips32/up_assert.c
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -75,23 +64,6 @@
# undef CONFIG_ARCH_USBDUMP
#endif
-/* The following is just intended to keep some ugliness out of the mainline
- * code. We are going to print the task name if:
- *
- * CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
- * (defined(CONFIG_DEBUG) || <-- And the debug is enabled (lldbg used)
- * defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-# define CONFIG_PRINT_TASKNAME 1
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -159,17 +131,17 @@ static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
void up_assert(const uint8_t *filename, int lineno)
{
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0
struct tcb_s *rtcb = this_task();
#endif
board_autoled_on(LED_ASSERTION);
-#ifdef CONFIG_PRINT_TASKNAME
- lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+ alert("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
- lldbg("Assertion failed at file:%s line: %d\n",
+ alert("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
diff --git a/arch/mips/src/mips32/up_dumpstate.c b/arch/mips/src/mips32/up_dumpstate.c
index b56d7f2419b298e5a117b8b0cc3d6f713c4a5139..f5a2a8474d28a89094565c41caa90e3b3cfd18f7 100644
--- a/arch/mips/src/mips32/up_dumpstate.c
+++ b/arch/mips/src/mips32/up_dumpstate.c
@@ -39,13 +39,6 @@
#include
-/* Output debug info -- even if debug is not selected. */
-
-#undef CONFIG_DEBUG
-#undef CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
#include
#include
#include
@@ -61,14 +54,6 @@
#ifdef CONFIG_ARCH_STACKDUMP
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -101,7 +86,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
- lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@@ -117,27 +102,27 @@ static inline void up_registerdump(void)
if (g_current_regs)
{
- lldbg("MFLO:%08x MFHI:%08x EPC:%08x STATUS:%08x\n",
+ alert("MFLO:%08x MFHI:%08x EPC:%08x STATUS:%08x\n",
g_current_regs[REG_MFLO], g_current_regs[REG_MFHI], g_current_regs[REG_EPC],
g_current_regs[REG_STATUS]);
- lldbg("AT:%08x V0:%08x V1:%08x A0:%08x A1:%08x A2:%08x A3:%08x\n",
+ alert("AT:%08x V0:%08x V1:%08x A0:%08x A1:%08x A2:%08x A3:%08x\n",
g_current_regs[REG_AT], g_current_regs[REG_V0], g_current_regs[REG_V1],
g_current_regs[REG_A0], g_current_regs[REG_A1], g_current_regs[REG_A2],
g_current_regs[REG_A3]);
- lldbg("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x T7:%08x\n",
+ alert("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x T7:%08x\n",
g_current_regs[REG_T0], g_current_regs[REG_T1], g_current_regs[REG_T2],
g_current_regs[REG_T3], g_current_regs[REG_T4], g_current_regs[REG_T5],
g_current_regs[REG_T6], g_current_regs[REG_T7]);
- lldbg("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n",
+ alert("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n",
g_current_regs[REG_S0], g_current_regs[REG_S1], g_current_regs[REG_S2],
g_current_regs[REG_S3], g_current_regs[REG_S4], g_current_regs[REG_S5],
g_current_regs[REG_S6], g_current_regs[REG_S7]);
#ifdef MIPS32_SAVE_GP
- lldbg("T8:%08x T9:%08x GP:%08x SP:%08x FP:%08x RA:%08x\n",
+ alert("T8:%08x T9:%08x GP:%08x SP:%08x FP:%08x RA:%08x\n",
g_current_regs[REG_T8], g_current_regs[REG_T9], g_current_regs[REG_GP],
g_current_regs[REG_SP], g_current_regs[REG_FP], g_current_regs[REG_RA]);
#else
- lldbg("T8:%08x T9:%08x SP:%08x FP:%08x RA:%08x\n",
+ alert("T8:%08x T9:%08x SP:%08x FP:%08x RA:%08x\n",
g_current_regs[REG_T8], g_current_regs[REG_T9], g_current_regs[REG_SP],
g_current_regs[REG_FP], g_current_regs[REG_RA]);
#endif
@@ -184,10 +169,10 @@ void up_dumpstate(void)
/* Show interrupt stack info */
- lldbg("sp: %08x\n", sp);
- lldbg("IRQ stack:\n");
- lldbg(" base: %08x\n", istackbase);
- lldbg(" size: %08x\n", istacksize);
+ alert("sp: %08x\n", sp);
+ alert("IRQ stack:\n");
+ alert(" base: %08x\n", istackbase);
+ alert(" size: %08x\n", istacksize);
/* Does the current stack pointer lie within the interrupt
* stack?
@@ -204,18 +189,18 @@ void up_dumpstate(void)
*/
sp = g_intstackbase;
- lldbg("sp: %08x\n", sp);
+ alert("sp: %08x\n", sp);
}
/* Show user stack info */
- lldbg("User stack:\n");
- lldbg(" base: %08x\n", ustackbase);
- lldbg(" size: %08x\n", ustacksize);
+ alert("User stack:\n");
+ alert(" base: %08x\n", ustackbase);
+ alert(" size: %08x\n", ustacksize);
#else
- lldbg("sp: %08x\n", sp);
- lldbg("stack base: %08x\n", ustackbase);
- lldbg("stack size: %08x\n", ustacksize);
+ alert("sp: %08x\n", sp);
+ alert("stack base: %08x\n", ustackbase);
+ alert("stack size: %08x\n", ustacksize);
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@@ -225,7 +210,7 @@ void up_dumpstate(void)
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
- lldbg("ERROR: Stack pointer is not within allocated stack\n");
+ alert("ERROR: Stack pointer is not within allocated stack\n");
#endif
}
else
diff --git a/arch/mips/src/mips32/up_releasepending.c b/arch/mips/src/mips32/up_releasepending.c
index 0d4522ba8d8896c4ca9d7304b5074cf1063fa25e..862f81ed75bb691fb1c98ac0b657205b3aa83efe 100644
--- a/arch/mips/src/mips32/up_releasepending.c
+++ b/arch/mips/src/mips32/up_releasepending.c
@@ -69,7 +69,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
- slldbg("From TCB=%p\n", rtcb);
+ sllinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
diff --git a/arch/mips/src/mips32/up_reprioritizertr.c b/arch/mips/src/mips32/up_reprioritizertr.c
index 3365f8862e23d529c580e296abfe3b74c5b87429..7f80dd31fb8181442c56692ae928603a79672cc7 100644
--- a/arch/mips/src/mips32/up_reprioritizertr.c
+++ b/arch/mips/src/mips32/up_reprioritizertr.c
@@ -97,7 +97,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
- slldbg("TCB=%p PRI=%d\n", tcb, priority);
+ sllinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
diff --git a/arch/mips/src/mips32/up_schedulesigaction.c b/arch/mips/src/mips32/up_schedulesigaction.c
index 1c8612ffd9396f65996b06d3c750d395dfc12bf6..e44384c5aa5f993d908d46905465245344e476f4 100644
--- a/arch/mips/src/mips32/up_schedulesigaction.c
+++ b/arch/mips/src/mips32/up_schedulesigaction.c
@@ -95,7 +95,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
irqstate_t flags;
uint32_t status;
- sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+ sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -109,7 +109,8 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* being delivered to the currently executing task.
*/
- sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+ sinfo("rtcb=0x%p g_current_regs=0x%p\n",
+ this_task(), g_current_regs);
if (tcb == this_task())
{
@@ -163,7 +164,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
up_savestate(tcb->xcp.regs);
- svdbg("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
+ sinfo("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
tcb->xcp.saved_epc, tcb->xcp.saved_status,
g_current_regs[REG_EPC], g_current_regs[REG_STATUS]);
}
@@ -196,7 +197,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
status |= CP0_STATUS_IM_SWINTS;
tcb->xcp.regs[REG_STATUS] = status;
- svdbg("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
+ sinfo("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
tcb->xcp.saved_epc, tcb->xcp.saved_status,
tcb->xcp.regs[REG_EPC], tcb->xcp.regs[REG_STATUS]);
}
diff --git a/arch/mips/src/mips32/up_sigdeliver.c b/arch/mips/src/mips32/up_sigdeliver.c
index a841a941b812b54fd562a541c20d124e1248f868..bf8f8e170820e9635a1169fe5dc065952b2d6798 100644
--- a/arch/mips/src/mips32/up_sigdeliver.c
+++ b/arch/mips/src/mips32/up_sigdeliver.c
@@ -96,7 +96,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -127,7 +127,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- svdbg("Resuming EPC: %08x STATUS: %08x\n", regs[REG_EPC], regs[REG_STATUS]);
+ sinfo("Resuming EPC: %08x STATUS: %08x\n", regs[REG_EPC], regs[REG_STATUS]);
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/mips/src/mips32/up_swint0.c b/arch/mips/src/mips32/up_swint0.c
index 1d335b179241a209162fd9d5f65c2146c223067c..720aaa3bce91a19db5d7e377a769cfbded366e66 100644
--- a/arch/mips/src/mips32/up_swint0.c
+++ b/arch/mips/src/mips32/up_swint0.c
@@ -61,23 +61,19 @@
/* Debug output from this file may interfere with context switching! To get
* debug output you must enabled the following in your NuttX configuration:
*
- * CONFIG_DEBUG and CONFIG_DEBUG_SYSCALL
+ * CONFIG_DEBUG_FEATURES and CONFIG_DEBUG_SYSCALL
*/
#ifdef CONFIG_DEBUG_SYSCALL
-# define swidbg(format, ...) lldbg(format, ##__VA_ARGS__)
+# define swierr(format, ...) llerr(format, ##__VA_ARGS__)
+# define swiwarn(format, ...) llwarn(format, ##__VA_ARGS__)
+# define swiinfo(format, ...) llinfo(format, ##__VA_ARGS__)
#else
-# define swidbg(x...)
+# define swierr(x...)
+# define swiwarn(x...)
+# define swiinfo(x...)
#endif
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -89,25 +85,25 @@
#ifdef CONFIG_DEBUG_SYSCALL
static void up_registerdump(const uint32_t *regs)
{
- swidbg("MFLO:%08x MFHI:%08x EPC:%08x STATUS:%08x\n",
- regs[REG_MFLO], regs[REG_MFHI], regs[REG_EPC], regs[REG_STATUS]);
- swidbg("AT:%08x V0:%08x V1:%08x A0:%08x A1:%08x A2:%08x A3:%08x\n",
- regs[REG_AT], regs[REG_V0], regs[REG_V1], regs[REG_A0],
- regs[REG_A1], regs[REG_A2], regs[REG_A3]);
- swidbg("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x T7:%08x\n",
- regs[REG_T0], regs[REG_T1], regs[REG_T2], regs[REG_T3],
- regs[REG_T4], regs[REG_T5], regs[REG_T6], regs[REG_T7]);
- swidbg("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n",
- regs[REG_S0], regs[REG_S1], regs[REG_S2], regs[REG_S3],
- regs[REG_S4], regs[REG_S5], regs[REG_S6], regs[REG_S7]);
+ swiinfo("MFLO:%08x MFHI:%08x EPC:%08x STATUS:%08x\n",
+ regs[REG_MFLO], regs[REG_MFHI], regs[REG_EPC], regs[REG_STATUS]);
+ swiinfo("AT:%08x V0:%08x V1:%08x A0:%08x A1:%08x A2:%08x A3:%08x\n",
+ regs[REG_AT], regs[REG_V0], regs[REG_V1], regs[REG_A0],
+ regs[REG_A1], regs[REG_A2], regs[REG_A3]);
+ swiinfo("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x T7:%08x\n",
+ regs[REG_T0], regs[REG_T1], regs[REG_T2], regs[REG_T3],
+ regs[REG_T4], regs[REG_T5], regs[REG_T6], regs[REG_T7]);
+ swiinfo("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n",
+ regs[REG_S0], regs[REG_S1], regs[REG_S2], regs[REG_S3],
+ regs[REG_S4], regs[REG_S5], regs[REG_S6], regs[REG_S7]);
#ifdef MIPS32_SAVE_GP
- swidbg("T8:%08x T9:%08x GP:%08x SP:%08x FP:%08x RA:%08x\n",
- regs[REG_T8], regs[REG_T9], regs[REG_GP], regs[REG_SP],
- regs[REG_FP], regs[REG_RA]);
+ swiinfo("T8:%08x T9:%08x GP:%08x SP:%08x FP:%08x RA:%08x\n",
+ regs[REG_T8], regs[REG_T9], regs[REG_GP], regs[REG_SP],
+ regs[REG_FP], regs[REG_RA]);
#else
- swidbg("T8:%08x T9:%08x SP:%08x FP:%08x RA:%08x\n",
- regs[REG_T8], regs[REG_T9], regs[REG_SP], regs[REG_FP],
- regs[REG_RA]);
+ swiinfo("T8:%08x T9:%08x SP:%08x FP:%08x RA:%08x\n",
+ regs[REG_T8], regs[REG_T9], regs[REG_SP], regs[REG_FP],
+ regs[REG_RA]);
#endif
}
#else
@@ -168,7 +164,7 @@ int up_swint0(int irq, FAR void *context)
*/
#ifdef CONFIG_DEBUG_SYSCALL
- swidbg("Entry: regs: %p cmd: %d\n", regs, regs[REG_R4]);
+ swiinfo("Entry: regs: %p cmd: %d\n", regs, regs[REG_R4]);
up_registerdump(regs);
#endif
@@ -289,7 +285,7 @@ int up_swint0(int irq, FAR void *context)
g_current_regs[REG_R0] -= CONFIG_SYS_RESERVED;
#else
- slldbg("ERROR: Bad SYS call: %d\n", regs[REG_A0]);
+ sllerr("ERROR: Bad SYS call: %d\n", regs[REG_A0]);
#endif
}
break;
@@ -300,12 +296,12 @@ int up_swint0(int irq, FAR void *context)
#ifdef CONFIG_DEBUG_SYSCALL
if (regs != g_current_regs)
{
- swidbg("SWInt Return: Context switch!\n");
+ swiinfo("SWInt Return: Context switch!\n");
up_registerdump((const uint32_t *)g_current_regs);
}
else
{
- swidbg("SWInt Return: %d\n", regs[REG_V0]);
+ swiinfo("SWInt Return: %d\n", regs[REG_V0]);
}
#endif
diff --git a/arch/mips/src/mips32/up_vfork.c b/arch/mips/src/mips32/up_vfork.c
index dda54ae1799ccceb613dcdbbb787e45463d04edf..06b79f7bb13743527e02a91b7ccaa3378aa338e6 100644
--- a/arch/mips/src/mips32/up_vfork.c
+++ b/arch/mips/src/mips32/up_vfork.c
@@ -123,26 +123,26 @@ pid_t up_vfork(const struct vfork_s *context)
uint32_t stackutil;
int ret;
- svdbg("s0:%08x s1:%08x s2:%08x s3:%08x s4:%08x\n",
+ sinfo("s0:%08x s1:%08x s2:%08x s3:%08x s4:%08x\n",
context->s0, context->s1, context->s2, context->s3, context->s4);
#ifdef CONFIG_MIPS32_FRAMEPOINTER
- svdbg("s5:%08x s6:%08x s7:%08x\n",
+ sinfo("s5:%08x s6:%08x s7:%08x\n",
context->s5, context->s6, context->s7);
#ifdef MIPS32_SAVE_GP
- svdbg("fp:%08x sp:%08x ra:%08x gp:%08x\n",
+ sinfo("fp:%08x sp:%08x ra:%08x gp:%08x\n",
context->fp, context->sp, context->ra, context->gp);
#else
- svdbg("fp:%08x sp:%08x ra:%08x\n",
+ sinfo("fp:%08x sp:%08x ra:%08x\n",
context->fp context->sp, context->ra);
#endif
#else
- svdbg("s5:%08x s6:%08x s7:%08x s8:%08x\n",
+ sinfo("s5:%08x s6:%08x s7:%08x s8:%08x\n",
context->s5, context->s6, context->s7, context->s8);
#ifdef MIPS32_SAVE_GP
- svdbg("sp:%08x ra:%08x gp:%08x\n",
+ sinfo("sp:%08x ra:%08x gp:%08x\n",
context->sp, context->ra, context->gp);
#else
- svdbg("sp:%08x ra:%08x\n",
+ sinfo("sp:%08x ra:%08x\n",
context->sp, context->ra);
#endif
#endif
@@ -152,11 +152,11 @@ pid_t up_vfork(const struct vfork_s *context)
child = task_vforksetup((start_t)context->ra);
if (!child)
{
- sdbg("task_vforksetup failed\n");
+ sinfo("task_vforksetup failed\n");
return (pid_t)ERROR;
}
- svdbg("Parent=%p Child=%p\n", parent, child);
+ sinfo("Parent=%p Child=%p\n", parent, child);
/* Get the size of the parent task's stack. Due to alignment operations,
* the adjusted stack size may be smaller than the stack size originally
@@ -171,7 +171,7 @@ pid_t up_vfork(const struct vfork_s *context)
parent->flags & TCB_FLAG_TTYPE_MASK);
if (ret != OK)
{
- sdbg("up_create_stack failed: %d\n", ret);
+ serr("ERROR: up_create_stack failed: %d\n", ret);
task_vforkabort(child, -ret);
return (pid_t)ERROR;
}
@@ -185,7 +185,7 @@ pid_t up_vfork(const struct vfork_s *context)
DEBUGASSERT((uint32_t)parent->adj_stack_ptr > context->sp);
stackutil = (uint32_t)parent->adj_stack_ptr - context->sp;
- svdbg("stacksize:%d stackutil:%d\n", stacksize, stackutil);
+ sinfo("stacksize:%d stackutil:%d\n", stacksize, stackutil);
/* Make some feeble effort to perserve the stack contents. This is
* feeble because the stack surely contains invalid pointers and other
@@ -211,14 +211,14 @@ pid_t up_vfork(const struct vfork_s *context)
newfp = context->fp;
}
- svdbg("Old stack base:%08x SP:%08x FP:%08x\n",
+ sinfo("Old stack base:%08x SP:%08x FP:%08x\n",
parent->adj_stack_ptr, context->sp, context->fp);
- svdbg("New stack base:%08x SP:%08x FP:%08x\n",
+ sinfo("New stack base:%08x SP:%08x FP:%08x\n",
child->cmn.adj_stack_ptr, newsp, newfp);
#else
- svdbg("Old stack base:%08x SP:%08x\n",
+ sinfo("Old stack base:%08x SP:%08x\n",
parent->adj_stack_ptr, context->sp);
- svdbg("New stack base:%08x SP:%08x\n",
+ sinfo("New stack base:%08x SP:%08x\n",
child->cmn.adj_stack_ptr, newsp);
#endif
diff --git a/arch/mips/src/pic32mx/Kconfig b/arch/mips/src/pic32mx/Kconfig
index 3da65ead3598a6c60683627b169b5379b85e1635..366c50fdf5e888a975c145c5f1804ba5c8127c45 100644
--- a/arch/mips/src/pic32mx/Kconfig
+++ b/arch/mips/src/pic32mx/Kconfig
@@ -1034,11 +1034,11 @@ config PIC32MX_SPI_ENHBUF
config PIC32MX_SPI_REGDEBUG
bool "SPI Register level debug"
- depends on DEBUG
+ depends on DEBUG_INFO
default n
---help---
Output detailed register-level SPI device debug information.
- Requires also DEBUG.
+ Requires also CONFIG_DEBUG_FEATURES.
endmenu # SPI Driver Configuration
@@ -1097,9 +1097,9 @@ config NET_WOL
config NET_REGDEBUG
bool "Register level debug"
default n
- depends on PIC32MX_ETHERNET && DEBUG
+ depends on PIC32MX_ETHERNET && DEBUG_NET_INFO
---help---
- Enabled low level register debug. Also needs DEBUG.
+ Enabled low level register debug. Also needs CONFIG_DEBUG_FEATURES.
config NET_HASH
bool "Hash"
diff --git a/arch/mips/src/pic32mx/pic32mx-ethernet.c b/arch/mips/src/pic32mx/pic32mx-ethernet.c
index 4c11f5c66083d73b8972549dd63c85627e3d8a9d..47cb807acf8c7dde5c5de29f0f4bd88f51719dca 100644
--- a/arch/mips/src/pic32mx/pic32mx-ethernet.c
+++ b/arch/mips/src/pic32mx/pic32mx-ethernet.c
@@ -141,20 +141,11 @@
#define PIC32MX_NBUFFERS (CONFIG_NET_NRXDESC + CONFIG_NET_NTXDESC + 1)
/* Debug Configuration *****************************************************/
-/* Register/Descriptor debug -- can only happen of CONFIG_DEBUG is selected.
- * This will probably generate much more output than you care to see.
- */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_NET_REGDEBUG
-# undef CONFIG_NET_DESCDEBUG
-#endif
-
/* CONFIG_NET_DUMPPACKET will dump the contents of each packet to the
* console.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_NET_DUMPPACKET
#endif
@@ -447,7 +438,7 @@ static void pic32mx_ethreset(struct pic32mx_driver_s *priv);
#ifdef CONFIG_NET_REGDEBUG
static void pic32mx_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
- lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+ nllinfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@@ -497,7 +488,7 @@ static void pic32mx_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ nllinfo("[repeats %d more times]\n", count);
}
}
@@ -576,12 +567,12 @@ static void pic32mx_putreg(uint32_t val, uint32_t addr)
#ifdef CONFIG_NET_DESCDEBUG
static void pic32mx_dumptxdesc(struct pic32mx_txdesc_s *txdesc, const char *msg)
{
- lldbg("TX Descriptor [%p]: %s\n", txdesc, msg);
- lldbg(" status: %08x\n", txdesc->status);
- lldbg(" address: %08x [%08x]\n", txdesc->address, VIRT_ADDR(txdesc->address));
- lldbg(" tsv1: %08x\n", txdesc->tsv1);
- lldbg(" tsv2: %08x\n", txdesc->tsv2);
- lldbg(" nexted: %08x [%08x]\n", txdesc->nexted, VIRT_ADDR(txdesc->nexted));
+ nllinfo("TX Descriptor [%p]: %s\n", txdesc, msg);
+ nllinfo(" status: %08x\n", txdesc->status);
+ nllinfo(" address: %08x [%08x]\n", txdesc->address, VIRT_ADDR(txdesc->address));
+ nllinfo(" tsv1: %08x\n", txdesc->tsv1);
+ nllinfo(" tsv2: %08x\n", txdesc->tsv2);
+ nllinfo(" nexted: %08x [%08x]\n", txdesc->nexted, VIRT_ADDR(txdesc->nexted));
}
#endif
@@ -603,12 +594,12 @@ static void pic32mx_dumptxdesc(struct pic32mx_txdesc_s *txdesc, const char *msg)
#ifdef CONFIG_NET_DESCDEBUG
static void pic32mx_dumprxdesc(struct pic32mx_rxdesc_s *rxdesc, const char *msg)
{
- lldbg("RX Descriptor [%p]: %s\n", rxdesc, msg);
- lldbg(" status: %08x\n", rxdesc->status);
- lldbg(" address: %08x [%08x]\n", rxdesc->address, VIRT_ADDR(rxdesc->address));
- lldbg(" rsv1: %08x\n", rxdesc->rsv1);
- lldbg(" rsv2: %08x\n", rxdesc->rsv2);
- lldbg(" nexted: %08x [%08x]\n", rxdesc->nexted, VIRT_ADDR(rxdesc->nexted));
+ nllinfo("RX Descriptor [%p]: %s\n", rxdesc, msg);
+ nllinfo(" status: %08x\n", rxdesc->status);
+ nllinfo(" address: %08x [%08x]\n", rxdesc->address, VIRT_ADDR(rxdesc->address));
+ nllinfo(" rsv1: %08x\n", rxdesc->rsv1);
+ nllinfo(" rsv2: %08x\n", rxdesc->rsv2);
+ nllinfo(" nexted: %08x [%08x]\n", rxdesc->nexted, VIRT_ADDR(rxdesc->nexted));
}
#endif
@@ -1366,7 +1357,8 @@ static void pic32mx_rxdone(struct pic32mx_driver_s *priv)
if ((rxdesc->rsv2 & RXDESC_RSV2_OK) == 0)
{
- nlldbg("ERROR. rsv1: %08x rsv2: %08x\n", rxdesc->rsv1, rxdesc->rsv2);
+ nllerr("ERROR. rsv1: %08x rsv2: %08x\n",
+ rxdesc->rsv1, rxdesc->rsv2);
NETDEV_RXERRORS(&priv->pd_dev);
pic32mx_rxreturn(rxdesc);
}
@@ -1379,7 +1371,7 @@ static void pic32mx_rxdone(struct pic32mx_driver_s *priv)
else if (priv->pd_dev.d_len > CONFIG_NET_ETH_MTU)
{
- nlldbg("Too big. packet length: %d rxdesc: %08x\n",
+ nllerr("ERROR: Too big. packet length: %d rxdesc: %08x\n",
priv->pd_dev.d_len, rxdesc->status);
NETDEV_RXERRORS(&priv->pd_dev);
pic32mx_rxreturn(rxdesc);
@@ -1390,7 +1382,8 @@ static void pic32mx_rxdone(struct pic32mx_driver_s *priv)
else if ((rxdesc->status & (RXDESC_STATUS_EOP | RXDESC_STATUS_SOP)) !=
(RXDESC_STATUS_EOP | RXDESC_STATUS_SOP))
{
- nlldbg("Fragment. packet length: %d rxdesc: %08x\n", priv->pd_dev.d_len, rxdesc->status);
+ nllerr("ERROR: Fragment. packet length: %d rxdesc: %08x\n",
+ priv->pd_dev.d_len, rxdesc->status);
NETDEV_RXFRAGMENTS(&priv->pd_dev);
pic32mx_rxreturn(rxdesc);
}
@@ -1428,7 +1421,7 @@ static void pic32mx_rxdone(struct pic32mx_driver_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
NETDEV_RXIPV4(&priv->pd_dev);
/* Handle ARP on input then give the IPv4 packet to the network
@@ -1470,7 +1463,7 @@ static void pic32mx_rxdone(struct pic32mx_driver_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
NETDEV_RXIPV6(&priv->pd_dev);
/* Give the IPv6 packet to the network layer */
@@ -1529,7 +1522,8 @@ static void pic32mx_rxdone(struct pic32mx_driver_s *priv)
{
/* Unrecognized... drop it. */
- nlldbg("Unrecognized packet type dropped: %04x\n", ntohs(BUF->type));
+ nllerr("ERROR: Unrecognized packet type dropped: %04x\n",
+ ntohs(BUF->type));
NETDEV_RXDROPPED(&priv->pd_dev);
}
@@ -1691,7 +1685,7 @@ static int pic32mx_interrupt(int irq, void *context)
if ((status & ETH_INT_RXOVFLW) != 0)
{
- nlldbg("RX Overrun. status: %08x\n", status);
+ nllerr("ERROR: RX Overrun. status: %08x\n", status);
NETDEV_RXERRORS(&priv->pd_dev);
}
@@ -1702,7 +1696,7 @@ static int pic32mx_interrupt(int irq, void *context)
if ((status & ETH_INT_RXBUFNA) != 0)
{
- nlldbg("RX buffer descriptor overrun. status: %08x\n", status);
+ nllerr("ERROR: RX buffer descriptor overrun. status: %08x\n", status);
NETDEV_RXERRORS(&priv->pd_dev);
}
@@ -1713,7 +1707,7 @@ static int pic32mx_interrupt(int irq, void *context)
if ((status & ETH_INT_RXBUSE) != 0)
{
- nlldbg("RX BVCI bus error. status: %08x\n", status);
+ nllerr("ERROR: RX BVCI bus error. status: %08x\n", status);
NETDEV_RXERRORS(&priv->pd_dev);
}
@@ -1756,7 +1750,7 @@ static int pic32mx_interrupt(int irq, void *context)
if ((status & ETH_INT_TXABORT) != 0)
{
- nlldbg("TX abort. status: %08x\n", status);
+ nllerr("ERROR: TX abort. status: %08x\n", status);
NETDEV_TXERRORS(&priv->pd_dev);
}
@@ -1767,7 +1761,7 @@ static int pic32mx_interrupt(int irq, void *context)
if ((status & ETH_INT_TXBUSE) != 0)
{
- nlldbg("TX BVCI bus error. status: %08x\n", status);
+ nllerr("ERROR: TX BVCI bus error. status: %08x\n", status);
NETDEV_TXERRORS(&priv->pd_dev);
}
@@ -1921,9 +1915,9 @@ static int pic32mx_ifup(struct net_driver_s *dev)
uint32_t regval;
int ret;
- ndbg("Bringing up: %d.%d.%d.%d\n",
- dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
- (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+ ninfo("Bringing up: %d.%d.%d.%d\n",
+ dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+ (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
/* Reset the Ethernet controller (again) */
@@ -2011,7 +2005,7 @@ static int pic32mx_ifup(struct net_driver_s *dev)
ret = pic32mx_phyinit(priv);
if (ret != 0)
{
- ndbg("pic32mx_phyinit failed: %d\n", ret);
+ nerr("ERROR: pic32mx_phyinit failed: %d\n", ret);
return ret;
}
@@ -2373,14 +2367,14 @@ static int pic32mx_rmmac(struct net_driver_s *dev, const uint8_t *mac)
#if defined(CONFIG_NET_REGDEBUG) && defined(PIC32MX_HAVE_PHY)
static void pic32mx_showmii(uint8_t phyaddr, const char *msg)
{
- dbg("PHY " PIC32MX_PHYNAME ": %s\n", msg);
- dbg(" MCR: %04x\n", pic32mx_phyread(phyaddr, MII_MCR));
- dbg(" MSR: %04x\n", pic32mx_phyread(phyaddr, MII_MSR));
- dbg(" ADVERTISE: %04x\n", pic32mx_phyread(phyaddr, MII_ADVERTISE));
- dbg(" LPA: %04x\n", pic32mx_phyread(phyaddr, MII_LPA));
- dbg(" EXPANSION: %04x\n", pic32mx_phyread(phyaddr, MII_EXPANSION));
+ nllinfo("PHY " PIC32MX_PHYNAME ": %s\n", msg);
+ nllinfo(" MCR: %04x\n", pic32mx_phyread(phyaddr, MII_MCR));
+ nllinfo(" MSR: %04x\n", pic32mx_phyread(phyaddr, MII_MSR));
+ nllinfo(" ADVERTISE: %04x\n", pic32mx_phyread(phyaddr, MII_ADVERTISE));
+ nllinfo(" LPA: %04x\n", pic32mx_phyread(phyaddr, MII_LPA));
+ nllinfo(" EXPANSION: %04x\n", pic32mx_phyread(phyaddr, MII_EXPANSION));
#ifdef CONFIG_ETH0_PHY_KS8721
- dbg(" 10BTCR: %04x\n", pic32mx_phyread(phyaddr, MII_KS8721_10BTCR));
+ nllinfo(" 10BTCR: %04x\n", pic32mx_phyread(phyaddr, MII_KS8721_10BTCR));
#endif
}
#endif
@@ -2543,7 +2537,7 @@ static inline int pic32mx_phyreset(uint8_t phyaddr)
}
}
- ndbg("Reset failed. MCR: %04x\n", phyreg);
+ nerr("ERROR: Reset failed. MCR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@@ -2590,7 +2584,7 @@ static inline int pic32mx_phyautoneg(uint8_t phyaddr)
}
}
- ndbg("Auto-negotiation failed. MSR: %04x\n", phyreg);
+ nerr("ERROR: Auto-negotiation failed. MSR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@@ -2669,7 +2663,7 @@ static int pic32mx_phymode(uint8_t phyaddr, uint8_t mode)
#endif
}
- ndbg("Link failed. MSR: %04x\n", phyreg);
+ nerr("ERROR: Link failed. MSR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@@ -2738,7 +2732,7 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
ret = pic32mx_phyreset(phyaddr);
if (ret < 0)
{
- ndbg("Failed to reset PHY at address %d\n", phyaddr);
+ nerr("ERROR: Failed to reset PHY at address %d\n", phyaddr);
continue;
}
@@ -2751,12 +2745,12 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
*/
phyreg = (unsigned int)pic32mx_phyread(phyaddr, MII_PHYID1);
- nvdbg("Addr: %d PHY ID1: %04x\n", phyaddr, phyreg);
+ ninfo("Addr: %d PHY ID1: %04x\n", phyaddr, phyreg);
if (phyreg == PIC32MX_PHYID1)
{
phyreg = pic32mx_phyread(phyaddr, MII_PHYID2);
- nvdbg("Addr: %d PHY ID2: %04x\n", phyaddr, phyreg);
+ ninfo("Addr: %d PHY ID2: %04x\n", phyaddr, phyreg);
if (phyreg == PIC32MX_PHYID2)
{
@@ -2771,10 +2765,10 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
{
/* Failed to find PHY at any location */
- ndbg("No PHY detected\n");
+ nerr("ERROR: No PHY detected\n");
return -ENODEV;
}
- nvdbg("phyaddr: %d\n", phyaddr);
+ ninfo("phyaddr: %d\n", phyaddr);
/* Save the discovered PHY device address */
@@ -2875,7 +2869,7 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
priv->pd_mode = PIC32MX_100BASET_FD;
break;
default:
- ndbg("Unrecognized mode: %04x\n", phyreg);
+ nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
#elif defined(CONFIG_ETH0_PHY_DP83848C)
@@ -2898,7 +2892,7 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
priv->pd_mode = PIC32MX_10BASET_FD;
break;
default:
- ndbg("Unrecognized mode: %04x\n", phyreg);
+ nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
#elif defined(CONFIG_ETH0_PHY_LAN8720)
@@ -2943,7 +2937,7 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
}
else
{
- ndbg("Unrecognized mode: %04x\n", phyreg);
+ nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
}
@@ -2951,9 +2945,9 @@ static inline int pic32mx_phyinit(struct pic32mx_driver_s *priv)
# warning "PHY Unknown: speed and duplex are bogus"
#endif
- ndbg("%dBase-T %s duplex\n",
- (priv->pd_mode & PIC32MX_SPEED_MASK) == PIC32MX_SPEED_100 ? 100 : 10,
- (priv->pd_mode & PIC32MX_DUPLEX_MASK) == PIC32MX_DUPLEX_FULL ?"full" : "half");
+ ninfo("%dBase-T %s duplex\n",
+ (priv->pd_mode & PIC32MX_SPEED_MASK) == PIC32MX_SPEED_100 ? 100 : 10,
+ (priv->pd_mode & PIC32MX_DUPLEX_MASK) == PIC32MX_DUPLEX_FULL ?"full" : "half");
/* Disable auto-configuration. Set the fixed speed/duplex mode.
* (probably more than little redundant).
diff --git a/arch/mips/src/pic32mx/pic32mx-exception.c b/arch/mips/src/pic32mx/pic32mx-exception.c
index b5a058f3a6f4da1b0cb36e7e36e3ba0a21f8a828..7ff728db319a5b4b3cd105cf1b736634da6167de 100644
--- a/arch/mips/src/pic32mx/pic32mx-exception.c
+++ b/arch/mips/src/pic32mx/pic32mx-exception.c
@@ -55,22 +55,6 @@
#include "pic32mx-int.h"
#include "pic32mx.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -85,7 +69,7 @@
uint32_t *pic32mx_exception(uint32_t *regs)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
uint32_t cause;
uint32_t epc;
#endif
@@ -96,98 +80,98 @@ uint32_t *pic32mx_exception(uint32_t *regs)
board_autoled_on(LED_INIRQ);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Get the cause of the exception from the CAUSE register */
asm volatile("\tmfc0 %0,$13,0\n" : "=r"(cause));
asm volatile("\tmfc0 %0,$14,0\n" : "=r"(epc));
-#ifdef CONFIG_DEBUG_VERBOSE
+#ifdef CONFIG_DEBUG_INFO
switch (cause & CP0_CAUSE_EXCCODE_MASK)
{
case CP0_CAUSE_EXCCODE_INT: /* Interrupt */
- llvdbg("EXCEPTION: Interrupt"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Interrupt"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_TLBL: /* TLB exception (load or instruction fetch) */
- llvdbg("EXCEPTION: TLB exception (load or instruction fetch)"
- " CAUSE: %08x EPC:%08x\n", cause, epc);
+ alert("EXCEPTION: TLB exception (load or instruction fetch)"
+ " CAUSE: %08x EPC:%08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_TLBS: /* TLB exception (store) */
- llvdbg("EXCEPTION: TLB exception (store)"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: TLB exception (store)"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_ADEL: /* Address error exception (load or instruction fetch) */
- llvdbg("EXCEPTION: Address error exception (load or instruction fetch)"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Address error exception (load or instruction fetch)"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_ADES: /* Address error exception (store) */
- llvdbg("EXCEPTION: Address error exception (store)"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Address error exception (store)"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_IBE: /* Bus error exception (instruction fetch) */
- llvdbg("EXCEPTION: Bus error exception (instruction fetch)"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Bus error exception (instruction fetch)"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_DBE: /* Bus error exception (data reference: load or store) */
- llvdbg("EXCEPTION: Bus error exception (data reference: load or store)"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Bus error exception (data reference: load or store)"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_SYS: /* Syscall exception */
- llvdbg("EXCEPTION: Syscall exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Syscall exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_BP: /* Breakpoint exception */
- llvdbg("EXCEPTION: Breakpoint exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Breakpoint exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_RI: /* Reserved instruction exception */
- llvdbg("EXCEPTION: Reserved instruction exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Reserved instruction exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_CPU: /* Coprocessor Unusable exception */
- llvdbg("EXCEPTION: Coprocessor Unusable exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Coprocessor Unusable exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_OV: /* Arithmetic Overflow exception */
- llvdbg("EXCEPTION: Arithmetic Overflow exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Arithmetic Overflow exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_TR: /* Trap exception */
- llvdbg("EXCEPTION: Trap exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Trap exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_FPE: /* Floating point exception */
- llvdbg("EXCEPTION: Floating point exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Floating point exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_C2E: /* Precise Coprocessor 2 exceptions */
- llvdbg("EXCEPTION: Precise Coprocessor 2 exceptions"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Precise Coprocessor 2 exceptions"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_MDMX: /* MDMX Unusable (MIPS64) */
- llvdbg("EXCEPTION: MDMX Unusable (MIPS64)"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: MDMX Unusable (MIPS64)"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_WATCH: /* WatchHi/WatchLo address */
- llvdbg("EXCEPTION: WatchHi/WatchLo address"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: WatchHi/WatchLo address"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_MCHECK: /* Machine check */
- llvdbg("EXCEPTION: Machine check"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Machine check"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_CACHEERR: /* Cache error */
- llvdbg("EXCEPTION: Cache error"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Cache error"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
default:
- llvdbg("EXCEPTION: Unknown"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Unknown"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
}
#else
- lldbg("EXCEPTION: CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: CAUSE: %08x EPC: %08x\n", cause, epc);
#endif
#endif
diff --git a/arch/mips/src/pic32mx/pic32mx-gpio.c b/arch/mips/src/pic32mx/pic32mx-gpio.c
index 78d9acca22a2536ae0d7814e7ba987fd0189b5ef..61ecde9e8c1cbb6ca41a2037a4583aff31a77e4c 100644
--- a/arch/mips/src/pic32mx/pic32mx-gpio.c
+++ b/arch/mips/src/pic32mx/pic32mx-gpio.c
@@ -303,7 +303,7 @@ bool pic32mx_gpioread(uint16_t pinset)
*
****************************************************************************/
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_GPIO)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_GPIO)
void pic32mx_dumpgpio(uint32_t pinset, const char *msg)
{
unsigned int port = pic32mx_portno(pinset);
@@ -321,17 +321,17 @@ void pic32mx_dumpgpio(uint32_t pinset, const char *msg)
/* The following requires exclusive access to the GPIO registers */
sched_lock();
- lldbg("IOPORT%c pinset: %04x base: %08x -- %s\n",
- 'A'+port, pinset, base, msg);
- lldbg(" TRIS: %08x PORT: %08x LAT: %08x ODC: %08x\n",
- getreg32(base + PIC32MX_IOPORT_TRIS_OFFSET),
- getreg32(base + PIC32MX_IOPORT_PORT_OFFSET),
- getreg32(base + PIC32MX_IOPORT_LAT_OFFSET),
- getreg32(base + PIC32MX_IOPORT_ODC_OFFSET));
- lldbg(" CNCON: %08x CNEN: %08x CNPUE: %08x\n",
- getreg32(PIC32MX_IOPORT_CNCON),
- getreg32(PIC32MX_IOPORT_CNEN),
- getreg32(PIC32MX_IOPORT_CNPUE));
+ llinfo("IOPORT%c pinset: %04x base: %08x -- %s\n",
+ 'A'+port, pinset, base, msg);
+ llinfo(" TRIS: %08x PORT: %08x LAT: %08x ODC: %08x\n",
+ getreg32(base + PIC32MX_IOPORT_TRIS_OFFSET),
+ getreg32(base + PIC32MX_IOPORT_PORT_OFFSET),
+ getreg32(base + PIC32MX_IOPORT_LAT_OFFSET),
+ getreg32(base + PIC32MX_IOPORT_ODC_OFFSET));
+ llinfo(" CNCON: %08x CNEN: %08x CNPUE: %08x\n",
+ getreg32(PIC32MX_IOPORT_CNCON),
+ getreg32(PIC32MX_IOPORT_CNEN),
+ getreg32(PIC32MX_IOPORT_CNPUE));
sched_unlock();
}
}
diff --git a/arch/mips/src/pic32mx/pic32mx-serial.c b/arch/mips/src/pic32mx/pic32mx-serial.c
index 590c5998a159fd0a664fb7769cafe5594d9af799..20a50bf2bb81aa1fbfe60850902d514080addad7 100644
--- a/arch/mips/src/pic32mx/pic32mx-serial.c
+++ b/arch/mips/src/pic32mx/pic32mx-serial.c
@@ -494,13 +494,13 @@ static int up_interrupt(int irq, void *context)
* - Overflow condition for the receive buffer OERR (UxSTA bit 1) occurs
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (up_pending_irq(priv->irqe))
{
/* Clear the pending error interrupt */
up_clrpend_irq(priv->irqe);
- lldbg("ERROR: interrupt STA: %08x\n",
+ llerr("ERROR: interrupt STA: %08x\n",
up_serialin(priv, PIC32MX_UART_STA_OFFSET));
handled = true;
}
@@ -700,7 +700,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
*/
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
up_enable_irq(priv->irqe);
#endif
up_enable_irq(priv->irqrx);
@@ -709,7 +709,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
}
else
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
up_disable_irq(priv->irqe);
#endif
up_disable_irq(priv->irqrx);
diff --git a/arch/mips/src/pic32mx/pic32mx-spi.c b/arch/mips/src/pic32mx/pic32mx-spi.c
index 44e79d6b48492d3ebdfb922e037690ff0538aa4d..886dbcae0e5c626427783b4c5b266f00e2d05b76 100644
--- a/arch/mips/src/pic32mx/pic32mx-spi.c
+++ b/arch/mips/src/pic32mx/pic32mx-spi.c
@@ -75,15 +75,13 @@
/* Debug */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
/****************************************************************************
@@ -329,7 +327,7 @@ static uint32_t spi_getreg(FAR struct pic32mx_dev_s *priv, unsigned int offset)
{
if (count == 4)
{
- lldbg("...\n");
+ llinfo("...\n");
}
return value;
}
@@ -345,7 +343,7 @@ static uint32_t spi_getreg(FAR struct pic32mx_dev_s *priv, unsigned int offset)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ llinfo("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -357,7 +355,7 @@ static uint32_t spi_getreg(FAR struct pic32mx_dev_s *priv, unsigned int offset)
/* Show the register value read */
- lldbg("%08x->%08x\n", addr, value);
+ llinfo("%08x->%08x\n", addr, value);
return value;
}
#else
@@ -395,7 +393,7 @@ static void spi_putreg(FAR struct pic32mx_dev_s *priv, unsigned int offset,
/* Show the register value being written */
- lldbg("%08x<-%08x\n", addr, value);
+ llinfo("%08x<-%08x\n", addr, value);
/* Then do the write */
@@ -476,7 +474,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
uint32_t actual;
uint32_t regval;
- spivdbg("Old frequency: %d actual: %d New frequency: %d\n",
+ spiinfo("Old frequency: %d actual: %d New frequency: %d\n",
priv->frequency, priv->actual, frequency);
/* Check if the requested frequency is the same as the frequency selection */
@@ -511,7 +509,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Save the new BRG value */
spi_putreg(priv, PIC32MX_SPI_BRG_OFFSET, regval);
- spivdbg("PBCLOCK: %d frequency: %d divisor: %d BRG: %d\n",
+ spiinfo("PBCLOCK: %d frequency: %d divisor: %d BRG: %d\n",
BOARD_PBCLOCK, frequency, divisor, regval);
/* Calculate the new actual frequency.
@@ -526,7 +524,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
- spidbg("New frequency: %d Actual: %d\n", frequency, actual);
+ spiinfo("New frequency: %d Actual: %d\n", frequency, actual);
return actual;
}
@@ -550,7 +548,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
FAR struct pic32mx_dev_s *priv = (FAR struct pic32mx_dev_s *)dev;
uint32_t regval;
- spivdbg("Old mode: %d New mode: %d\n", priv->mode, mode);
+ spiinfo("Old mode: %d New mode: %d\n", priv->mode, mode);
/* Has the mode changed? */
@@ -612,7 +610,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
}
spi_putreg(priv, PIC32MX_SPI_CON_OFFSET, regval);
- spivdbg("CON: %08x\n", regval);
+ spiinfo("CON: %08x\n", regval);
/* Save the mode so that subsequent re-configuratins will be faster */
@@ -641,7 +639,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
uint32_t setting;
uint32_t regval;
- spivdbg("Old nbits: %d New nbits: %d\n", priv->nbits, nbits);
+ spiinfo("Old nbits: %d New nbits: %d\n", priv->nbits, nbits);
/* Has the number of bits changed? */
@@ -665,7 +663,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
}
else
{
- spidbg("Unsupported nbits: %d\n", nbits);
+ spierr("ERROR: Unsupported nbits: %d\n", nbits);
return;
}
@@ -673,7 +671,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
regval &= ~SPI_CON_MODE_MASK;
regval |= setting;
regval = spi_getreg(priv, PIC32MX_SPI_CON_OFFSET);
- spivdbg("CON: %08x\n", regval);
+ spiinfo("CON: %08x\n", regval);
/* Save the selection so the subsequence re-configurations will be faster */
@@ -701,7 +699,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
{
FAR struct pic32mx_dev_s *priv = (FAR struct pic32mx_dev_s *)dev;
- spivdbg("wd: %04x\n", wd);
+ spiinfo("wd: %04x\n", wd);
/* Write the data to transmitted to the SPI Data Register */
@@ -754,7 +752,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
uint32_t regval;
uint8_t data;
- spivdbg("nwords: %d\n", nwords);
+ spiinfo("nwords: %d\n", nwords);
while (nwords)
{
/* Write the data to transmitted to the SPI Data Register */
@@ -809,7 +807,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
FAR struct pic32mx_dev_s *priv = (FAR struct pic32mx_dev_s *)dev;
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
- spivdbg("nwords: %d\n", nwords);
+ spiinfo("nwords: %d\n", nwords);
while (nwords)
{
/* Write some dummy data to the SPI Data Register in order to clock the
@@ -864,7 +862,7 @@ FAR struct spi_dev_s *pic32mx_spibus_initialize(int port)
irqstate_t flags;
uint32_t regval;
- spivdbg("port: %d\n", port);
+ spiinfo("port: %d\n", port);
/* Select the SPI state structure for this port */
@@ -897,7 +895,7 @@ FAR struct spi_dev_s *pic32mx_spibus_initialize(int port)
else
#endif
{
- spidbg("Unsuppport port: %d\n", port);
+ spierr("ERROR: Unsuppport port: %d\n", port);
return NULL;
}
@@ -926,7 +924,8 @@ FAR struct spi_dev_s *pic32mx_spibus_initialize(int port)
ret = irq_attach(priv->vector, spi_interrupt);
if (ret < 0)
{
- spidbg("Failed to attach vector: %d port: %d\n", priv->vector, port);
+ spierr("ERROR: Failed to attach vector: %d port: %d\n",
+ priv->vector, port);
goto errout;
}
#endif
@@ -952,7 +951,7 @@ FAR struct spi_dev_s *pic32mx_spibus_initialize(int port)
regval |= (SPI_CON_ENHBUF | SPI_CON_RTXISEL_HALF | SPI_CON_STXISEL_HALF);
#endif
spi_putreg(priv, PIC32MX_SPI_CON_OFFSET, regval);
- spivdbg("CON: %08x\n", regval);
+ spiinfo("CON: %08x\n", regval);
/* Set the initial SPI configuration */
@@ -976,7 +975,7 @@ FAR struct spi_dev_s *pic32mx_spibus_initialize(int port)
ret = up_prioritize_irq(priv->vector, CONFIG_PIC32MX_SPI_PRIORITY)
if (ret < 0)
{
- spidbg("up_prioritize_irq failed: %d\n", ret);
+ spierr("ERROR: up_prioritize_irq failed: %d\n", ret);
goto errout;
}
#endif
diff --git a/arch/mips/src/pic32mx/pic32mx-usbdev.c b/arch/mips/src/pic32mx/pic32mx-usbdev.c
index 00d9f240930d8cfdfe8883500ff9cbce4616d712..0c43382e1c589c2b1456ba1254b97c81188ed58f 100644
--- a/arch/mips/src/pic32mx/pic32mx-usbdev.c
+++ b/arch/mips/src/pic32mx/pic32mx-usbdev.c
@@ -79,15 +79,6 @@
# define CONFIG_USBDEV_EP0_MAXSIZE 64
#endif
-/* Extremely detailed register/BDT debug that you would normally never want
- * enabled.
- */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_PIC32MX_USBDEV_REGDEBUG
-# undef CONFIG_PIC32MX_USBDEV_BDTDEBUG
-#endif
-
/* Disable this logic because it is buggy. It works most of the time but
* has some lurking issues that keep this higher performance solution from
* being usable.
@@ -289,19 +280,17 @@
# undef CONFIG_PIC32MX_USBDEV_BDTDEBUG
# define CONFIG_PIC32MX_USBDEV_BDTDEBUG 1
-# define regdbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define regvdbg lldbg
-# else
-# define regvdbg(x...)
-# endif
+# define regerr llerr
+# define regwarn llwarn
+# define reginfo llinfo
#else
# define pic32mx_getreg(addr) getreg16(addr)
# define pic32mx_putreg(val,addr) putreg16(val,addr)
-# define regdbg(x...)
-# define regvdbg(x...)
+# define regerr(x...)
+# define regwarn(x...)
+# define reginfo(x...)
#endif
@@ -309,17 +298,15 @@
#ifdef CONFIG_PIC32MX_USBDEV_BDTDEBUG
-# define bdtdbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define bdtvdbg lldbg
-# else
-# define bdtvdbg(x...)
-# endif
+# define bdterr llerr
+# define bdtwarn llwarn
+# define bdtinfo llinfo
#else
-# define bdtdbg(x...)
-# define bdtvdbg(x...)
+# define bdterr(x...)
+# define bdtwarn(x...)
+# define bdtinfo(x...)
#endif
@@ -602,16 +589,13 @@ static volatile struct usbotg_bdtentry_s g_bdt[4*PIC32MX_NENDPOINTS]
__attribute__ ((aligned(512)));
/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Private Functions
+ * Private Functions
****************************************************************************/
/****************************************************************************
* Register Operations
****************************************************************************/
+
/****************************************************************************
* Name: pic32mx_getreg
****************************************************************************/
@@ -637,8 +621,9 @@ static uint16_t pic32mx_getreg(uint32_t addr)
{
if (count == 4)
{
- lldbg("...\n");
+ reginfo("...\n");
}
+
return val;
}
}
@@ -653,7 +638,7 @@ static uint16_t pic32mx_getreg(uint32_t addr)
{
/* Yes.. then show how many times the value repeated */
- lldbg("[repeats %d more times]\n", count-3);
+ reginfo("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
@@ -665,7 +650,7 @@ static uint16_t pic32mx_getreg(uint32_t addr)
/* Show the register value read */
- lldbg("%08x->%04x\n", addr, val);
+ reginfo("%08x->%04x\n", addr, val);
return val;
}
#endif
@@ -679,7 +664,7 @@ static void pic32mx_putreg(uint16_t val, uint32_t addr)
{
/* Show the register value being written */
- lldbg("%08x<-%04x\n", addr, val);
+ reginfo("%08x<-%04x\n", addr, val);
/* Write the value */
@@ -874,8 +859,8 @@ static void pic32mx_epwrite(struct pic32mx_ep_s *privep,
/* And, finally, give the BDT to the USB */
- bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n",
- USB_EPNO(privep->ep.eplog), bdt, status, bdt->addr);
+ bdtinfo("EP%d BDT IN [%p] {%08x, %08x}\n",
+ USB_EPNO(privep->ep.eplog), bdt, status, bdt->addr);
bdt->status = status;
}
@@ -908,15 +893,15 @@ static void pic32mx_wrcomplete(struct pic32mx_usbdev_s *priv,
epno = USB_EPNO(privep->ep.eplog);
#ifdef CONFIG_USBDEV_NOWRITEAHEAD
- ullvdbg("EP%d: len=%d xfrd=%d inflight=%d\n",
+ ullinfo("EP%d: len=%d xfrd=%d inflight=%d\n",
epno, privreq->req.len, privreq->req.xfrd, privreq->inflight[0]);
#else
- ullvdbg("EP%d: len=%d xfrd=%d inflight={%d, %d}\n",
+ ullinfo("EP%d: len=%d xfrd=%d inflight={%d, %d}\n",
epno, privreq->req.len, privreq->req.xfrd,
privreq->inflight[0], privreq->inflight[1]);
#endif
- bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n",
- epno, bdtin, bdtin->status, bdtin->addr);
+ bdtinfo("EP%d BDT IN [%p] {%08x, %08x}\n",
+ epno, bdtin, bdtin->status, bdtin->addr);
/* We should own the BDT that just completed. But NULLify the entire BDT IN.
* Why? So that we can tell later that the BDT available. No, it is not
@@ -1224,7 +1209,7 @@ static int pic32mx_wrstart(struct pic32mx_usbdev_s *priv,
bytesleft = privreq->req.len;
}
- ullvdbg("epno=%d req=%p: len=%d xfrd=%d index=%d nullpkt=%d\n",
+ ullinfo("epno=%d req=%p: len=%d xfrd=%d index=%d nullpkt=%d\n",
epno, privreq, privreq->req.len, xfrd, index, privep->txnullpkt);
/* Get the number of bytes left to be sent in the packet */
@@ -1338,10 +1323,10 @@ static int pic32mx_rdcomplete(struct pic32mx_usbdev_s *priv,
bdtout = privep->bdtout;
epno = USB_EPNO(privep->ep.eplog);
- ullvdbg("EP%d: len=%d xfrd=%d\n",
+ ullinfo("EP%d: len=%d xfrd=%d\n",
epno, privreq->req.len, privreq->req.xfrd);
- bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n",
- epno, bdtout, bdtout->status, bdtout->addr);
+ bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n",
+ epno, bdtout, bdtout->status, bdtout->addr);
/* We should own the BDT that just completed */
@@ -1484,7 +1469,8 @@ static int pic32mx_ep0rdsetup(struct pic32mx_usbdev_s *priv, uint8_t *dest,
/* Then give the BDT to the USB */
- bdtdbg("EP0 BDT OUT [%p] {%08x, %08x}\n", bdtout, status, bdtout->addr);
+ bdtinfo("EP0 BDT OUT [%p] {%08x, %08x}\n",
+ bdtout, status, bdtout->addr);
bdtout->status = status;
priv->ctrlstate = CTRLSTATE_RDREQUEST;
@@ -1585,7 +1571,8 @@ static int pic32mx_rdsetup(struct pic32mx_ep_s *privep, uint8_t *dest, int readl
/* Then give the BDT to the USB */
- bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdtout, status, bdtout->addr);
+ bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n",
+ epno, bdtout, status, bdtout->addr);
bdtout->status = status;
return OK;
@@ -1626,7 +1613,7 @@ static int pic32mx_rdrequest(struct pic32mx_usbdev_s *priv,
return OK;
}
- ullvdbg("EP%d: len=%d\n", USB_EPNO(privep->ep.eplog), privreq->req.len);
+ ullinfo("EP%d: len=%d\n", USB_EPNO(privep->ep.eplog), privreq->req.len);
/* Ignore any attempt to receive a zero length packet */
@@ -1915,7 +1902,7 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv)
index.w = GETUINT16(priv->ctrl.index);
len.w = GETUINT16(priv->ctrl.len);
- ullvdbg("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
+ ullinfo("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
/* Dispatch any non-standard requests */
@@ -2159,7 +2146,7 @@ static void pic32mx_ep0setup(struct pic32mx_usbdev_s *priv)
{
/* Special case recipient=device test mode */
- ullvdbg("test mode: %d\n", index.w);
+ ullinfo("test mode: %d\n", index.w);
}
else
{
@@ -2596,7 +2583,8 @@ static void pic32mx_ep0transfer(struct pic32mx_usbdev_s *priv, uint16_t ustat)
bdt = &g_bdt[index];
priv->eplist[0].bdtout = bdt;
- bdtdbg("EP0 BDT OUT [%p] {%08x, %08x}\n", bdt, bdt->status, bdt->addr);
+ bdtinfo("EP0 BDT OUT [%p] {%08x, %08x}\n",
+ bdt, bdt->status, bdt->addr);
/* Check the current EP0 OUT buffer contains a SETUP packet */
@@ -2832,7 +2820,7 @@ static int pic32mx_interrupt(int irq, void *context)
if ((usbir & USB_INT_UERR) != 0)
{
usbtrace(TRACE_INTDECODE(PIC32MX_TRACEINTID_UERR), usbir);
- ulldbg("Error: EIR=%04x\n", pic32mx_getreg(PIC32MX_USB_EIR));
+ ullerr("ERROR: EIR=%04x\n", pic32mx_getreg(PIC32MX_USB_EIR));
/* Clear all pending USB error interrupts */
@@ -3148,11 +3136,11 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
bool bidi;
int index;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !desc)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
- ulldbg("ERROR: ep=%p desc=%p\n");
+ ullerr("ERROR: ep=%p desc=%p\n");
return -EINVAL;
}
#endif
@@ -3210,7 +3198,8 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
bdt->status = 0;
bdt->addr = 0;
- bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
+ bdtinfo("EP%d BDT IN [%p] {%08x, %08x}\n",
+ epno, bdt, bdt->status, bdt->addr);
/* Now do the same for the other buffer. */
@@ -3218,7 +3207,8 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
bdt->status = 0;
bdt->addr = 0;
- bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
+ bdtinfo("EP%d BDT IN [%p] {%08x, %08x}\n",
+ epno, bdt, bdt->status, bdt->addr);
}
if (!epin || bidi)
@@ -3232,7 +3222,8 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
bdt->status = 0;
bdt->addr = 0;
- bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
+ bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n",
+ epno, bdt, bdt->status, bdt->addr);
/* Now do the same for the other buffer. */
@@ -3240,7 +3231,8 @@ static int pic32mx_epconfigure(struct usbdev_ep_s *ep,
bdt->status = 0;
bdt->addr = 0;
- bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
+ bdtinfo("EP%d BDT OUT [%p] {%08x, %08x}\n",
+ epno, bdt, bdt->status, bdt->addr);
}
/* Get the maxpacket size of the endpoint. */
@@ -3275,11 +3267,11 @@ static int pic32mx_epdisable(struct usbdev_ep_s *ep)
int i;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
- ulldbg("ERROR: ep=%p\n", ep);
+ ullerr("ERROR: ep=%p\n", ep);
return -EINVAL;
}
#endif
@@ -3319,7 +3311,7 @@ static struct usbdev_req_s *pic32mx_epallocreq(struct usbdev_ep_s *ep)
{
struct pic32mx_req_s *privreq;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3347,7 +3339,7 @@ static void pic32mx_epfreereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
{
struct pic32mx_req_s *privreq = (struct pic32mx_req_s *)req;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3372,11 +3364,12 @@ static int pic32mx_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
uint8_t epno;
int ret = OK;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
- ulldbg("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
+ ullerr("ERROR: req=%p callback=%p buf=%p ep=%p\n",
+ req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
@@ -3384,11 +3377,11 @@ static int pic32mx_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
usbtrace(TRACE_EPSUBMIT, USB_EPNO(ep->eplog));
priv = privep->dev;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!priv->driver)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
- ulldbg("ERROR: driver=%p\n", priv->driver);
+ ullerr("ERROR: driver=%p\n", priv->driver);
return -ESHUTDOWN;
}
#endif
@@ -3459,7 +3452,7 @@ static int pic32mx_epcancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
struct pic32mx_ep_s *privep = (struct pic32mx_ep_s *)ep;
irqstate_t flags;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3575,10 +3568,10 @@ static int pic32mx_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin)
bdt->addr = (uint8_t *)physaddr;
bdt->status = (USB_BDT_UOWN | bytecount);
- bdtdbg("EP0 BDT IN [%p] {%08x, %08x}\n",
- bdt, bdt->status, bdt->addr);
- bdtdbg("EP0 BDT IN [%p] {%08x, %08x}\n",
- otherbdt, otherbdt->status, otherbdt->addr);
+ bdtinfo("EP0 BDT IN [%p] {%08x, %08x}\n",
+ bdt, bdt->status, bdt->addr);
+ bdtinfo("EP0 BDT IN [%p] {%08x, %08x}\n",
+ otherbdt, otherbdt->status, otherbdt->addr);
}
else
{
@@ -3592,10 +3585,11 @@ static int pic32mx_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin)
bdt->addr = 0;
bdt->status = 0;
- bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
- epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
- bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
- epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status, otherbdt->addr);
+ bdtinfo("EP%d BDT %s [%p] {%08x, %08x}\n",
+ epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
+ bdtinfo("EP%d BDT %s [%p] {%08x, %08x}\n",
+ epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status,
+ otherbdt->addr);
/* Restart any queued requests (after a delay so that we can be assured
* that the hardware has recovered from the stall -- I don't know of any
@@ -3627,10 +3621,11 @@ static int pic32mx_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin)
pic32mx_rqstop(privep);
- bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
- epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
- bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
- epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status, otherbdt->addr);
+ bdtinfo("EP%d BDT %s [%p] {%08x, %08x}\n",
+ epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
+ bdtinfo("EP%d BDT %s [%p] {%08x, %08x}\n",
+ epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status,
+ otherbdt->addr);
}
return OK;
@@ -3646,7 +3641,7 @@ static int pic32mx_epstall(struct usbdev_ep_s *ep, bool resume)
irqstate_t flags;
int ret;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!ep)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3707,7 +3702,7 @@ static struct usbdev_ep_s *pic32mx_allocep(struct usbdev_s *dev, uint8_t epno,
uint16_t epset = PIC32MX_ENDP_ALLSET;
usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3765,7 +3760,7 @@ static void pic32mx_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep)
struct pic32mx_usbdev_s *priv;
struct pic32mx_ep_s *privep;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev || !ep)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3797,7 +3792,7 @@ static int pic32mx_getframe(struct usbdev_s *dev)
uint16_t frmh;
uint16_t tmp;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3838,7 +3833,7 @@ static int pic32mx_wakeup(struct usbdev_s *dev)
struct pic32mx_usbdev_s *priv = (struct pic32mx_usbdev_s *)dev;
usbtrace(TRACE_DEVWAKEUP, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -3862,7 +3857,7 @@ static int pic32mx_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!dev)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
@@ -4373,7 +4368,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@@ -4439,7 +4434,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVUNREGISTER, 0);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (driver != priv->driver)
{
usbtrace(TRACE_DEVERROR(PIC32MX_TRACEERR_INVALIDPARMS), 0);
diff --git a/arch/mips/src/pic32mz/Kconfig b/arch/mips/src/pic32mz/Kconfig
index ac412b6dc5262c644bb0d48884c948150cc1b0a9..70dcf7d0766ae550acede9a4138a7d3b063a9c9b 100644
--- a/arch/mips/src/pic32mz/Kconfig
+++ b/arch/mips/src/pic32mz/Kconfig
@@ -332,11 +332,11 @@ config PIC32MZ_SPI_ENHBUF
config PIC32MZ_SPI_REGDEBUG
bool "SPI Register level debug"
- depends on DEBUG
+ depends on DEBUG_INFO
default n
---help---
Output detailed register-level SPI device debug information.
- Requires also DEBUG.
+ Requires also CONFIG_DEBUG_FEATURES.
endmenu # SPI Driver Configuration
@@ -400,9 +400,9 @@ config NET_WOL
config NET_REGDEBUG
bool "Register level debug"
default n
- depends on PIC32MZ_ETHERNET && DEBUG
+ depends on PIC32MZ_ETHERNET && DEBUG_NET_INFO
---help---
- Enabled low level register debug. Also needs DEBUG.
+ Enabled low level register debug. Also needs CONFIG_DEBUG_FEATURES.
config NET_HASH
bool "Hash"
@@ -425,8 +425,8 @@ menu "Device Configuration 0 (DEVCFG0)"
config PIC32MZ_DEBUGGER_ENABLE
bool "Background debugger enable"
- default y if DEBUG
- default n if !DEBUG
+ default y if DEBUG_FEATURES
+ default n if !DEBUG_FEATURES
---help---
Background Debugger Enable
@@ -444,8 +444,8 @@ config PIC32MZ_ICESEL_CH2
config PIC32MZ_TRACE_ENABLE
bool "Trace enable"
- default y if DEBUG
- default n if !DEBUG
+ default y if DEBUG_FEATURES
+ default n if !DEBUG_FEATURES
---help---
Trace Enable
diff --git a/arch/mips/src/pic32mz/pic32mz-ethernet.c b/arch/mips/src/pic32mz/pic32mz-ethernet.c
index 7d531efde9fdaaafd855e9a50a348c0b86824a89..c1e2671f92744d274d1d6163afdf0d97f7545cdb 100644
--- a/arch/mips/src/pic32mz/pic32mz-ethernet.c
+++ b/arch/mips/src/pic32mz/pic32mz-ethernet.c
@@ -141,11 +141,11 @@
#define PIC32MZ_NBUFFERS (CONFIG_NET_NRXDESC + CONFIG_NET_NTXDESC + 1)
/* Debug Configuration *****************************************************/
-/* Register/Descriptor debug -- can only happen of CONFIG_DEBUG is selected.
+/* Register/Descriptor debug -- can only happen of CONFIG_DEBUG_FEATURES is selected.
* This will probably generate much more output than you care to see.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_NET_REGDEBUG
# undef CONFIG_NET_DESCDEBUG
#endif
@@ -154,7 +154,7 @@
* console.
*/
-#ifndef CONFIG_DEBUG
+#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_NET_DUMPPACKET
#endif
@@ -465,7 +465,7 @@ static void pic32mz_ethreset(struct pic32mz_driver_s *priv);
#ifdef CONFIG_NET_REGDEBUG
static void pic32mz_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
- lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
+ nllinfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@@ -515,7 +515,7 @@ static void pic32mz_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
- lldbg("[repeats %d more times]\n", count);
+ nllinfo("[repeats %d more times]\n", count);
}
}
@@ -594,12 +594,12 @@ static void pic32mz_putreg(uint32_t val, uint32_t addr)
#ifdef CONFIG_NET_DESCDEBUG
static void pic32mz_dumptxdesc(struct pic32mz_txdesc_s *txdesc, const char *msg)
{
- lldbg("TX Descriptor [%p]: %s\n", txdesc, msg);
- lldbg(" status: %08x\n", txdesc->status);
- lldbg(" address: %08x [%08x]\n", txdesc->address, VIRT_ADDR(txdesc->address));
- lldbg(" tsv1: %08x\n", txdesc->tsv1);
- lldbg(" tsv2: %08x\n", txdesc->tsv2);
- lldbg(" nexted: %08x [%08x]\n", txdesc->nexted, VIRT_ADDR(txdesc->nexted));
+ nllinfo("TX Descriptor [%p]: %s\n", txdesc, msg);
+ nllinfo(" status: %08x\n", txdesc->status);
+ nllinfo(" address: %08x [%08x]\n", txdesc->address, VIRT_ADDR(txdesc->address));
+ nllinfo(" tsv1: %08x\n", txdesc->tsv1);
+ nllinfo(" tsv2: %08x\n", txdesc->tsv2);
+ nllinfo(" nexted: %08x [%08x]\n", txdesc->nexted, VIRT_ADDR(txdesc->nexted));
}
#endif
@@ -621,12 +621,12 @@ static void pic32mz_dumptxdesc(struct pic32mz_txdesc_s *txdesc, const char *msg)
#ifdef CONFIG_NET_DESCDEBUG
static void pic32mz_dumprxdesc(struct pic32mz_rxdesc_s *rxdesc, const char *msg)
{
- lldbg("RX Descriptor [%p]: %s\n", rxdesc, msg);
- lldbg(" status: %08x\n", rxdesc->status);
- lldbg(" address: %08x [%08x]\n", rxdesc->address, VIRT_ADDR(rxdesc->address));
- lldbg(" rsv1: %08x\n", rxdesc->rsv1);
- lldbg(" rsv2: %08x\n", rxdesc->rsv2);
- lldbg(" nexted: %08x [%08x]\n", rxdesc->nexted, VIRT_ADDR(rxdesc->nexted));
+ nllinfo("RX Descriptor [%p]: %s\n", rxdesc, msg);
+ nllinfo(" status: %08x\n", rxdesc->status);
+ nllinfo(" address: %08x [%08x]\n", rxdesc->address, VIRT_ADDR(rxdesc->address));
+ nllinfo(" rsv1: %08x\n", rxdesc->rsv1);
+ nllinfo(" rsv2: %08x\n", rxdesc->rsv2);
+ nllinfo(" nexted: %08x [%08x]\n", rxdesc->nexted, VIRT_ADDR(rxdesc->nexted));
}
#endif
@@ -1384,7 +1384,8 @@ static void pic32mz_rxdone(struct pic32mz_driver_s *priv)
if ((rxdesc->rsv2 & RXDESC_RSV2_OK) == 0)
{
- nlldbg("ERROR. rsv1: %08x rsv2: %08x\n", rxdesc->rsv1, rxdesc->rsv2);
+ nllwarn("WARNING. rsv1: %08x rsv2: %08x\n",
+ rxdesc->rsv1, rxdesc->rsv2);
NETDEV_RXERRORS(&priv->pd_dev);
pic32mz_rxreturn(rxdesc);
}
@@ -1397,7 +1398,8 @@ static void pic32mz_rxdone(struct pic32mz_driver_s *priv)
else if (priv->pd_dev.d_len > CONFIG_NET_ETH_MTU)
{
- nlldbg("Too big. packet length: %d rxdesc: %08x\n", priv->pd_dev.d_len, rxdesc->status);
+ nllwarn("WARNING: Too big. packet length: %d rxdesc: %08x\n",
+ priv->pd_dev.d_len, rxdesc->status);
NETDEV_RXERRORS(&priv->pd_dev);
pic32mz_rxreturn(rxdesc);
}
@@ -1407,7 +1409,8 @@ static void pic32mz_rxdone(struct pic32mz_driver_s *priv)
else if ((rxdesc->status & (RXDESC_STATUS_EOP | RXDESC_STATUS_SOP)) !=
(RXDESC_STATUS_EOP | RXDESC_STATUS_SOP))
{
- nlldbg("Fragment. packet length: %d rxdesc: %08x\n", priv->pd_dev.d_len, rxdesc->status);
+ nllwarn("WARNING: Fragment. packet length: %d rxdesc: %08x\n",
+ priv->pd_dev.d_len, rxdesc->status);
NETDEV_RXFRAGMENTS(&priv->pd_dev);
pic32mz_rxreturn(rxdesc);
}
@@ -1445,7 +1448,7 @@ static void pic32mz_rxdone(struct pic32mz_driver_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
NETDEV_RXIPV4(&priv->pd_dev);
/* Handle ARP on input then give the IPv4 packet to the network
@@ -1487,7 +1490,7 @@ static void pic32mz_rxdone(struct pic32mz_driver_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
NETDEV_RXIPV6(&priv->pd_dev);
/* Give the IPv6 packet to the network layer */
@@ -1546,7 +1549,8 @@ static void pic32mz_rxdone(struct pic32mz_driver_s *priv)
{
/* Unrecognized... drop it. */
- nlldbg("Unrecognized packet type dropped: %04x\n", ntohs(BUF->type));
+ nllwarn("WARNING: Unrecognized packet type dropped: %04x\n",
+ ntohs(BUF->type));
NETDEV_RXDROPPED(&priv->pd_dev);
}
@@ -1708,7 +1712,7 @@ static int pic32mz_interrupt(int irq, void *context)
if ((status & ETH_INT_RXOVFLW) != 0)
{
- nlldbg("RX Overrun. status: %08x\n", status);
+ nllerr("ERROR: RX Overrun. status: %08x\n", status);
NETDEV_RXERRORS(&priv->pd_dev);
}
@@ -1719,7 +1723,7 @@ static int pic32mz_interrupt(int irq, void *context)
if ((status & ETH_INT_RXBUFNA) != 0)
{
- nlldbg("RX buffer descriptor overrun. status: %08x\n", status);
+ nllerr("ERROR: RX buffer descriptor overrun. status: %08x\n", status);
NETDEV_RXERRORS(&priv->pd_dev);
}
@@ -1730,7 +1734,7 @@ static int pic32mz_interrupt(int irq, void *context)
if ((status & ETH_INT_RXBUSE) != 0)
{
- nlldbg("RX BVCI bus error. status: %08x\n", status);
+ nllerr("ERROR: RX BVCI bus error. status: %08x\n", status);
NETDEV_RXERRORS(&priv->pd_dev);
}
@@ -1773,7 +1777,7 @@ static int pic32mz_interrupt(int irq, void *context)
if ((status & ETH_INT_TXABORT) != 0)
{
- nlldbg("TX abort. status: %08x\n", status);
+ nllerr("ERROR: TX abort. status: %08x\n", status);
NETDEV_TXERRORS(&priv->pd_dev);
}
@@ -1784,7 +1788,7 @@ static int pic32mz_interrupt(int irq, void *context)
if ((status & ETH_INT_TXBUSE) != 0)
{
- nlldbg("TX BVCI bus error. status: %08x\n", status);
+ nllerr("ERROR: TX BVCI bus error. status: %08x\n", status);
NETDEV_TXERRORS(&priv->pd_dev);
}
@@ -1938,9 +1942,9 @@ static int pic32mz_ifup(struct net_driver_s *dev)
uint32_t regval;
int ret;
- ndbg("Bringing up: %d.%d.%d.%d\n",
- dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
- (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
+ nnllinfoBringing up: %d.%d.%d.%d\n",
+ dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
+ (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
/* Reset the Ethernet controller (again) */
@@ -2028,7 +2032,7 @@ static int pic32mz_ifup(struct net_driver_s *dev)
ret = pic32mz_phyinit(priv);
if (ret != 0)
{
- ndbg("pic32mz_phyinit failed: %d\n", ret);
+ nerr("ERROR: pic32mz_phyinit failed: %d\n", ret);
return ret;
}
@@ -2105,11 +2109,10 @@ static int pic32mz_ifup(struct net_driver_s *dev)
priv->pd_dev.d_mac.ether_addr_octet[0] = (uint32_t)(regval & 0xff);
priv->pd_dev.d_mac.ether_addr_octet[1] = (uint32_t)((regval >> 8) & 0xff);
- ndbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
- dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
- dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
- dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
-
+ ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+ dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+ dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
#endif
/* Continue Ethernet Controller Initialization ****************************/
@@ -2396,14 +2399,14 @@ static int pic32mz_rmmac(struct net_driver_s *dev, const uint8_t *mac)
#if defined(CONFIG_NET_REGDEBUG) && defined(PIC32MZ_HAVE_PHY)
static void pic32mz_showmii(uint8_t phyaddr, const char *msg)
{
- dbg("PHY " PIC32MZ_PHYNAME ": %s\n", msg);
- dbg(" MCR: %04x\n", pic32mz_phyread(phyaddr, MII_MCR));
- dbg(" MSR: %04x\n", pic32mz_phyread(phyaddr, MII_MSR));
- dbg(" ADVERTISE: %04x\n", pic32mz_phyread(phyaddr, MII_ADVERTISE));
- dbg(" LPA: %04x\n", pic32mz_phyread(phyaddr, MII_LPA));
- dbg(" EXPANSION: %04x\n", pic32mz_phyread(phyaddr, MII_EXPANSION));
+ nllinfo("PHY " PIC32MZ_PHYNAME ": %s\n", msg);
+ nllinfo(" MCR: %04x\n", pic32mz_phyread(phyaddr, MII_MCR));
+ nllinfo(" MSR: %04x\n", pic32mz_phyread(phyaddr, MII_MSR));
+ nllinfo(" ADVERTISE: %04x\n", pic32mz_phyread(phyaddr, MII_ADVERTISE));
+ nllinfo(" LPA: %04x\n", pic32mz_phyread(phyaddr, MII_LPA));
+ nllinfo(" EXPANSION: %04x\n", pic32mz_phyread(phyaddr, MII_EXPANSION));
#ifdef CONFIG_ETH0_PHY_KS8721
- dbg(" 10BTCR: %04x\n", pic32mz_phyread(phyaddr, MII_KS8721_10BTCR));
+ nllinfo(" 10BTCR: %04x\n", pic32mz_phyread(phyaddr, MII_KS8721_10BTCR));
#endif
}
#endif
@@ -2566,7 +2569,7 @@ static inline int pic32mz_phyreset(uint8_t phyaddr)
}
}
- ndbg("Reset failed. MCR: %04x\n", phyreg);
+ nerr("ERROR: Reset failed. MCR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@@ -2613,7 +2616,7 @@ static inline int pic32mz_phyautoneg(uint8_t phyaddr)
}
}
- ndbg("Auto-negotiation failed. MSR: %04x\n", phyreg);
+ nerr("ERROR: Auto-negotiation failed. MSR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@@ -2692,7 +2695,7 @@ static int pic32mz_phymode(uint8_t phyaddr, uint8_t mode)
#endif
}
- ndbg("Link failed. MSR: %04x\n", phyreg);
+ nerr("ERROR: Link failed. MSR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@@ -2761,7 +2764,7 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
ret = pic32mz_phyreset(phyaddr);
if (ret < 0)
{
- ndbg("Failed to reset PHY at address %d\n", phyaddr);
+ nerr("ERROR: Failed to reset PHY at address %d\n", phyaddr);
continue;
}
@@ -2774,12 +2777,12 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
*/
phyreg = (unsigned int)pic32mz_phyread(phyaddr, MII_PHYID1);
- nvdbg("Addr: %d PHY ID1: %04x EXPECT: %04x\n", phyaddr, phyreg, PIC32MZ_PHYID1);
+ ninfo("Addr: %d PHY ID1: %04x EXPECT: %04x\n", phyaddr, phyreg, PIC32MZ_PHYID1);
if (phyreg == PIC32MZ_PHYID1)
{
phyreg = pic32mz_phyread(phyaddr, MII_PHYID2);
- nvdbg("Addr: %d PHY ID2: %04x EXPECT: %04x\n", phyaddr, phyreg, PIC32MZ_PHYID2);
+ ninfo("Addr: %d PHY ID2: %04x EXPECT: %04x\n", phyaddr, phyreg, PIC32MZ_PHYID2);
if (phyreg == PIC32MZ_PHYID2)
{
@@ -2794,10 +2797,10 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
{
/* Failed to find PHY at any location */
- ndbg("No PHY detected\n");
+ nerr("ERROR: No PHY detected\n");
return -ENODEV;
}
- nvdbg("phyaddr: %d\n", phyaddr);
+ ninfo("phyaddr: %d\n", phyaddr);
/* Save the discovered PHY device address */
@@ -2898,7 +2901,7 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
priv->pd_mode = PIC32MZ_100BASET_FD;
break;
default:
- ndbg("Unrecognized mode: %04x\n", phyreg);
+ nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
#elif defined(CONFIG_ETH0_PHY_DP83848C)
@@ -2921,7 +2924,7 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
priv->pd_mode = PIC32MZ_10BASET_FD;
break;
default:
- ndbg("Unrecognized mode: %04x\n", phyreg);
+ nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
#elif defined(CONFIG_ETH0_PHY_LAN8720) || defined(CONFIG_ETH0_PHY_LAN8740) || defined(CONFIG_ETH0_PHY_LAN8740A)
@@ -2966,7 +2969,7 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
}
else
{
- ndbg("Unrecognized mode: %04x\n", phyreg);
+ nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
}
@@ -2974,9 +2977,9 @@ static inline int pic32mz_phyinit(struct pic32mz_driver_s *priv)
# warning "PHY Unknown: speed and duplex are bogus"
#endif
- ndbg("%dBase-T %s duplex\n",
- (priv->pd_mode & PIC32MZ_SPEED_MASK) == PIC32MZ_SPEED_100 ? 100 : 10,
- (priv->pd_mode & PIC32MZ_DUPLEX_MASK) == PIC32MZ_DUPLEX_FULL ?"full" : "half");
+ ninfo("%dBase-T %s duplex\n",
+ (priv->pd_mode & PIC32MZ_SPEED_MASK) == PIC32MZ_SPEED_100 ? 100 : 10,
+ (priv->pd_mode & PIC32MZ_DUPLEX_MASK) == PIC32MZ_DUPLEX_FULL ?"full" : "half");
/* Disable auto-configuration. Set the fixed speed/duplex mode.
* (probably more than little redundant).
diff --git a/arch/mips/src/pic32mz/pic32mz-exception.c b/arch/mips/src/pic32mz/pic32mz-exception.c
index ec23ff8c3b54b9a176d44a1823e4f506a00f99c7..1397d1063f9c453927554e232f73fde72eb11783 100644
--- a/arch/mips/src/pic32mz/pic32mz-exception.c
+++ b/arch/mips/src/pic32mz/pic32mz-exception.c
@@ -55,22 +55,6 @@
#include "chip/pic32mz-int.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -85,7 +69,7 @@
uint32_t *pic32mz_exception(uint32_t *regs)
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
uint32_t cause;
uint32_t epc;
#endif
@@ -96,98 +80,98 @@ uint32_t *pic32mz_exception(uint32_t *regs)
board_autoled_on(LED_INIRQ);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Get the cause of the exception from the CAUSE register */
asm volatile("\tmfc0 %0,$13,0\n" : "=r"(cause));
asm volatile("\tmfc0 %0,$14,0\n" : "=r"(epc));
-#ifdef CONFIG_DEBUG_VERBOSE
+#ifdef CONFIG_DEBUG_INFO
switch (cause & CP0_CAUSE_EXCCODE_MASK)
{
case CP0_CAUSE_EXCCODE_INT: /* Interrupt */
- llvdbg("EXCEPTION: Interrupt"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Interrupt"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_TLBL: /* TLB exception (load or instruction fetch) */
- llvdbg("EXCEPTION: TLB exception (load or instruction fetch)"
- " CAUSE: %08x EPC:%08x\n", cause, epc);
+ alert("EXCEPTION: TLB exception (load or instruction fetch)"
+ " CAUSE: %08x EPC:%08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_TLBS: /* TLB exception (store) */
- llvdbg("EXCEPTION: TLB exception (store)"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: TLB exception (store)"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_ADEL: /* Address error exception (load or instruction fetch) */
- llvdbg("EXCEPTION: Address error exception (load or instruction fetch)"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Address error exception (load or instruction fetch)"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_ADES: /* Address error exception (store) */
- llvdbg("EXCEPTION: Address error exception (store)"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Address error exception (store)"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_IBE: /* Bus error exception (instruction fetch) */
- llvdbg("EXCEPTION: Bus error exception (instruction fetch)"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Bus error exception (instruction fetch)"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_DBE: /* Bus error exception (data reference: load or store) */
- llvdbg("EXCEPTION: Bus error exception (data reference: load or store)"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Bus error exception (data reference: load or store)"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_SYS: /* Syscall exception */
- llvdbg("EXCEPTION: Syscall exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Syscall exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_BP: /* Breakpoint exception */
- llvdbg("EXCEPTION: Breakpoint exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Breakpoint exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_RI: /* Reserved instruction exception */
- llvdbg("EXCEPTION: Reserved instruction exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Reserved instruction exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_CPU: /* Coprocessor Unusable exception */
- llvdbg("EXCEPTION: Coprocessor Unusable exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Coprocessor Unusable exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_OV: /* Arithmetic Overflow exception */
- llvdbg("EXCEPTION: Arithmetic Overflow exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Arithmetic Overflow exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_TR: /* Trap exception */
- llvdbg("EXCEPTION: Trap exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Trap exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_FPE: /* Floating point exception */
- llvdbg("EXCEPTION: Floating point exception"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Floating point exception"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_C2E: /* Precise Coprocessor 2 exceptions */
- llvdbg("EXCEPTION: Precise Coprocessor 2 exceptions"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Precise Coprocessor 2 exceptions"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_MDMX: /* MDMX Unusable (MIPS64) */
- llvdbg("EXCEPTION: MDMX Unusable (MIPS64)"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: MDMX Unusable (MIPS64)"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_WATCH: /* WatchHi/WatchLo address */
- llvdbg("EXCEPTION: WatchHi/WatchLo address"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: WatchHi/WatchLo address"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_MCHECK: /* Machine check */
- llvdbg("EXCEPTION: Machine check"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Machine check"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
case CP0_CAUSE_EXCCODE_CACHEERR: /* Cache error */
- llvdbg("EXCEPTION: Cache error"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Cache error"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
default:
- llvdbg("EXCEPTION: Unknown"
- " CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: Unknown"
+ " CAUSE: %08x EPC: %08x\n", cause, epc);
break;
}
#else
- lldbg("EXCEPTION: CAUSE: %08x EPC: %08x\n", cause, epc);
+ alert("EXCEPTION: CAUSE: %08x EPC: %08x\n", cause, epc);
#endif
#endif
diff --git a/arch/mips/src/pic32mz/pic32mz-gpio.c b/arch/mips/src/pic32mz/pic32mz-gpio.c
index 8bec67734365927778faa106a4826c1316bfeaff..e4123eb0cef01a34bbb01a1ba40935e549ef6231 100644
--- a/arch/mips/src/pic32mz/pic32mz-gpio.c
+++ b/arch/mips/src/pic32mz/pic32mz-gpio.c
@@ -307,7 +307,7 @@ bool pic32mz_gpioread(pinset_t pinset)
*
****************************************************************************/
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_GPIO)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_GPIO)
void pic32mz_dumpgpio(uint32_t pinset, const char *msg)
{
unsigned int port = pic32mz_portno(pinset);
@@ -325,17 +325,17 @@ void pic32mz_dumpgpio(uint32_t pinset, const char *msg)
/* The following requires exclusive access to the GPIO registers */
sched_lock();
- lldbg("IOPORT%c pinset: %04x base: %08x -- %s\n",
- 'A'+port, pinset, base, msg);
- lldbg(" TRIS: %08x PORT: %08x LAT: %08x ODC: %08x\n",
- getreg32(base + PIC32MZ_IOPORT_TRIS_OFFSET),
- getreg32(base + PIC32MZ_IOPORT_PORT_OFFSET),
- getreg32(base + PIC32MZ_IOPORT_LAT_OFFSET),
- getreg32(base + PIC32MZ_IOPORT_ODC_OFFSET));
- lldbg(" CNCON: %08x CNEN: %08x CNPUE: %08x\n",
- getreg32(PIC32MZ_IOPORT_CNCON),
- getreg32(PIC32MZ_IOPORT_CNEN),
- getreg32(PIC32MZ_IOPORT_CNPUE));
+ llinfo("IOPORT%c pinset: %04x base: %08x -- %s\n",
+ 'A'+port, pinset, base, msg);
+ llinfo(" TRIS: %08x PORT: %08x LAT: %08x ODC: %08x\n",
+ getreg32(base + PIC32MZ_IOPORT_TRIS_OFFSET),
+ getreg32(base + PIC32MZ_IOPORT_PORT_OFFSET),
+ getreg32(base + PIC32MZ_IOPORT_LAT_OFFSET),
+ getreg32(base + PIC32MZ_IOPORT_ODC_OFFSET));
+ llinfo(" CNCON: %08x CNEN: %08x CNPUE: %08x\n",
+ getreg32(PIC32MZ_IOPORT_CNCON),
+ getreg32(PIC32MZ_IOPORT_CNEN),
+ getreg32(PIC32MZ_IOPORT_CNPUE));
sched_unlock();
}
}
diff --git a/arch/mips/src/pic32mz/pic32mz-gpio.h b/arch/mips/src/pic32mz/pic32mz-gpio.h
index 1c967bc802ae72c3528afc806b311518f08ee716..f7464a59d4e226b7f15f278e35cb36db3f28d8f0 100644
--- a/arch/mips/src/pic32mz/pic32mz-gpio.h
+++ b/arch/mips/src/pic32mz/pic32mz-gpio.h
@@ -253,7 +253,7 @@ void pic32mz_gpioirqdisable(pinset_t pinset);
*
************************************************************************************/
-#ifdef CONFIG_DEBUG_GPIO
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_GPIO)
void pic32mz_dumpgpio(uint32_t pinset, const char *msg);
#else
# define pic32mz_dumpgpio(p,m)
diff --git a/arch/mips/src/pic32mz/pic32mz-serial.c b/arch/mips/src/pic32mz/pic32mz-serial.c
index 6845ff50352ecbea62faddbf0122192b8a2d910c..c9b56f3ff44d2910744c5ff0ab409457c94e0cf7 100644
--- a/arch/mips/src/pic32mz/pic32mz-serial.c
+++ b/arch/mips/src/pic32mz/pic32mz-serial.c
@@ -752,13 +752,13 @@ static int up_interrupt(struct uart_dev_s *dev)
* - Overflow condition for the receive buffer OERR (UxSTA bit 1) occurs
*/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (up_pending_irq(priv->irqe))
{
/* Clear the pending error interrupt */
up_clrpend_irq(priv->irqe);
- lldbg("ERROR: interrupt STA: %08x\n",
+ llerr("ERROR: interrupt STA: %08x\n",
up_serialin(priv, PIC32MZ_UART_STA_OFFSET));
handled = true;
}
@@ -1008,7 +1008,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
*/
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
up_enable_irq(priv->irqe);
#endif
up_enable_irq(priv->irqrx);
@@ -1017,7 +1017,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
}
else
{
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
up_disable_irq(priv->irqe);
#endif
up_disable_irq(priv->irqrx);
diff --git a/arch/mips/src/pic32mz/pic32mz-spi.c b/arch/mips/src/pic32mz/pic32mz-spi.c
index d2f83fb2927e562e56db396d78943f30a7af2408..633698787c58ae63e691a43eb9ae14e49de9fbdf 100644
--- a/arch/mips/src/pic32mz/pic32mz-spi.c
+++ b/arch/mips/src/pic32mz/pic32mz-spi.c
@@ -70,15 +70,13 @@
/* Debug */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
/****************************************************************************
@@ -496,7 +494,7 @@ static bool spi_checkreg(struct pic32mz_dev_s *priv, uintptr_t regaddr,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ llinfo("...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -546,8 +544,8 @@ static uint32_t spi_getreg(FAR struct pic32mz_dev_s *priv,
{
/* Yes.. */
- lldbg("%08lx->%08lx\n",
- (unsigned long)regaddr, (unsigned long)regval);
+ llinfo("%08lx->%08lx\n",
+ (unsigned long)regaddr, (unsigned long)regval);
}
/* Return the value read */
@@ -588,8 +586,8 @@ static void spi_putaddr(FAR struct pic32mz_dev_s *priv, uintptr_t regaddr,
{
/* Yes.. */
- lldbg("%08lx<-%08lx\n",
- (unsigned long)regaddr, (unsigned long)regval);
+ llinfo("%08lx<-%08lx\n",
+ (unsigned long)regaddr, (unsigned long)regval);
}
/* Write the value to the register */
@@ -652,7 +650,7 @@ static void spi_exchange8(FAR struct pic32mz_dev_s *priv,
uint32_t regval;
uint8_t data;
- spivdbg("nbytes: %d\n", nbytes);
+ spiinfo("nbytes: %d\n", nbytes);
while (nbytes)
{
/* Write the data to transmitted to the SPI Data Register */
@@ -723,7 +721,7 @@ static void spi_exchange16(FAR struct pic32mz_dev_s *priv,
uint32_t regval;
uint16_t data;
- spivdbg("nwords: %d\n", nwords);
+ spiinfo("nwords: %d\n", nwords);
while (nwords)
{
/* Write the data to transmitted to the SPI Data Register */
@@ -837,7 +835,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
uint32_t actual;
uint32_t regval;
- spivdbg("Old frequency: %d actual: %d New frequency: %d\n",
+ spiinfo("Old frequency: %d actual: %d New frequency: %d\n",
priv->frequency, priv->actual, frequency);
/* Check if the requested frequency is the same as the frequency selection */
@@ -872,7 +870,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Save the new BRG value */
spi_putreg(priv, PIC32MZ_SPI_BRG_OFFSET, regval);
- spivdbg("PBCLOCK: %d frequency: %d divisor: %d BRG: %d\n",
+ spiinfo("PBCLOCK: %d frequency: %d divisor: %d BRG: %d\n",
BOARD_PBCLOCK, frequency, divisor, regval);
/* Calculate the new actual frequency.
@@ -887,7 +885,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
- spidbg("New frequency: %d Actual: %d\n", frequency, actual);
+ spiinfo("New frequency: %d Actual: %d\n", frequency, actual);
return actual;
}
@@ -911,7 +909,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
FAR struct pic32mz_dev_s *priv = (FAR struct pic32mz_dev_s *)dev;
uint32_t regval;
- spivdbg("Old mode: %d New mode: %d\n", priv->mode, mode);
+ spiinfo("Old mode: %d New mode: %d\n", priv->mode, mode);
/* Has the mode changed? */
@@ -973,7 +971,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
}
spi_putreg(priv, PIC32MZ_SPI_CON_OFFSET, regval);
- spivdbg("CON: %08x\n", regval);
+ spiinfo("CON: %08x\n", regval);
/* Save the mode so that subsequent re-configuratins will be faster */
@@ -1002,7 +1000,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
uint32_t setting;
uint32_t regval;
- spivdbg("Old nbits: %d New nbits: %d\n", priv->nbits, nbits);
+ spiinfo("Old nbits: %d New nbits: %d\n", priv->nbits, nbits);
/* Has the number of bits changed? */
@@ -1025,7 +1023,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
}
else
{
- spidbg("Unsupported nbits: %d\n", nbits);
+ spierr("ERROR: Unsupported nbits: %d\n", nbits);
return;
}
@@ -1033,7 +1031,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
regval &= ~SPI_CON_MODE_MASK;
regval |= setting;
regval = spi_getreg(priv, PIC32MZ_SPI_CON_OFFSET);
- spivdbg("CON: %08x\n", regval);
+ spiinfo("CON: %08x\n", regval);
/* Save the selection so the subsequence re-configurations will be
* faster
@@ -1075,7 +1073,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
rxword = 0;
spi_exchange16(priv, &txword, &rxword, 1);
- spivdbg("Sent %04x received %04x\n", txword, rxword);
+ spiinfo("Sent %04x received %04x\n", txword, rxword);
return rxword;
}
else
@@ -1089,7 +1087,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
rxbyte = (uint8_t)0;
spi_exchange8(priv, &txbyte, &rxbyte, 1);
- spivdbg("Sent %02x received %02x\n", txbyte, rxbyte);
+ spiinfo("Sent %02x received %02x\n", txbyte, rxbyte);
return (uint16_t)rxbyte;
}
}
@@ -1222,7 +1220,7 @@ FAR struct spi_dev_s *pic32mz_spibus_initialize(int port)
irqstate_t flags;
uint32_t regval;
- spivdbg("port: %d\n", port);
+ spiinfo("port: %d\n", port);
/* Select the SPI state structure and SDI PPS register for this port */
@@ -1275,7 +1273,7 @@ FAR struct spi_dev_s *pic32mz_spibus_initialize(int port)
else
#endif
{
- spidbg("Unsuppport port: %d\n", port);
+ spierr("ERROR: Unsuppport port: %d\n", port);
return NULL;
}
@@ -1311,7 +1309,7 @@ FAR struct spi_dev_s *pic32mz_spibus_initialize(int port)
ret = irq_attach(priv->config->rxirq, spi_interrupt);
if (ret < 0)
{
- spidbg("Failed to attach RX interrupt: %d port: %d\n",
+ spierr("ERROR: Failed to attach RX interrupt: %d port: %d\n",
priv->config->rxirq, port);
goto errout;
}
@@ -1319,7 +1317,7 @@ FAR struct spi_dev_s *pic32mz_spibus_initialize(int port)
ret = irq_attach(priv->config->txirq, spi_interrupt);
if (ret < 0)
{
- spidbg("Failed to attach TX interrupt: %d port: %d\n",
+ spierr("ERROR: Failed to attach TX interrupt: %d port: %d\n",
priv->tconfig->xirq, port);
goto errout_with_rxirq;
}
@@ -1327,7 +1325,7 @@ FAR struct spi_dev_s *pic32mz_spibus_initialize(int port)
ret = irq_attach(priv->config->firq, spi_interrupt);
if (ret < 0)
{
- spidbg("Failed to attach fault interrupt: %d port: %d\n",
+ spierr("ERROR: Failed to attach fault interrupt: %d port: %d\n",
priv->config->firq, port);
goto errout_with_txirq;
}
@@ -1354,7 +1352,7 @@ FAR struct spi_dev_s *pic32mz_spibus_initialize(int port)
regval |= (SPI_CON_ENHBUF | SPI_CON_SRXISEL_HALF | SPI_CON_STXISEL_HALF);
#endif
spi_putreg(priv, PIC32MZ_SPI_CON_OFFSET, regval);
- spivdbg("CON: %08x\n", regval);
+ spiinfo("CON: %08x\n", regval);
/* Set the initial SPI configuration */
diff --git a/arch/rgmp/src/x86/com.c b/arch/rgmp/src/x86/com.c
index 8a149bcadc0d50a3a08df7b87289f16983c1a8d6..495aa4b69294b6356524c8547b26ef3423829655 100644
--- a/arch/rgmp/src/x86/com.c
+++ b/arch/rgmp/src/x86/com.c
@@ -245,38 +245,45 @@ static int up_setup(struct uart_dev_s *dev)
} data;
// clear and disable FIFO
+
outb(base+COM_FCR, 1);
outb(base+COM_FCR, 3);
outb(base+COM_FCR, 0);
// Clear any preexisting overrun indications and interrupts
// Serial port doesn't exist if COM_LSR returns 0xFF
+
inb(base+COM_LSR);
inb(base+COM_IIR);
inb(base+COM_RX);
- if (inb(base+COM_LSR) == 0xff) {
- dbg("COM %d does not exist\n", base);
+ if (inb(base+COM_LSR) == 0xff)
+ {
+ err("ERROR: COM %d does not exist\n", base);
return -1;
- }
+ }
// Set speed; requires DLAB latch
+
outb(base+COM_LCR, COM_LCR_DLAB);
data.val = 115200 / priv->baud;
outb(base+COM_DLL, data.sep.low);
outb(base+COM_DLM, data.sep.high);
// set data bits, stop bit, parity; turn off DLAB latch
+
outb(base+COM_LCR, priv->lcr.val);
// OUT2 must be set to enable interrupt
+
outb(base+COM_MCR, COM_MCR_OUT2);
// setup FIFO
+
outb(base+COM_FCR, 1);
// disable COM interrupts
- outb(base+COM_IER, 0);
+ outb(base+COM_IER, 0);
return OK;
}
@@ -315,11 +322,11 @@ static void up_shutdown(struct uart_dev_s *dev)
static int up_attach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = dev->priv;
- int err;
+ int errcode;
- err = rgmp_request_irq(priv->irq, &priv->action, 0);
+ errcode = rgmp_request_irq(priv->irq, &priv->action, 0);
- return err;
+ return errcode;
}
/****************************************************************************
@@ -578,47 +585,67 @@ void up_earlyserialinit(void)
void up_serialinit(void)
{
uart_dev_t *dev;
- int err;
+ int errcode;
#ifdef CONFIG_COM1
dev = up_alloc_com(COM1, 4);
if (dev == NULL)
- dbg("alloc com1 fail\n");
- else {
- err = uart_register("/dev/ttyS0", dev);
- if (err)
- dbg("register com1 fail\n");
- }
+ {
+ err("ERROR: alloc com1 fail\n");
+ }
+ else
+ {
+ errcode = uart_register("/dev/ttyS0", dev);
+ if (errcode)
+ {
+ err("ERROR: register com1 fail\n");
+ }
+ }
#endif
#ifdef CONFIG_COM2
dev = up_alloc_com(COM2, 3);
if (dev == NULL)
- dbg("alloc com2 fail\n");
- else {
- err = uart_register("/dev/ttyS1", dev);
- if (err)
- dbg("register com2 fail\n");
- }
+ {
+ err("ERROR: alloc com2 fail\n");
+ }
+ else
+ {
+ errcode = uart_register("/dev/ttyS1", dev);
+ if (errcode)
+ {
+ err("ERROR: register com2 fail\n");
+ }
+ }
#endif
#ifdef CONFIG_COM3
dev = up_alloc_com(COM3, 4);
if (dev == NULL)
- dbg("alloc com3 fail\n");
- else {
- err = uart_register("/dev/ttyS2", dev);
- if (err)
- dbg("register com3 fail\n");
- }
+ {
+ err("ERROR: alloc com3 fail\n");
+ }
+ else
+ {
+ errcode = uart_register("/dev/ttyS2", dev);
+ if (errcode)
+ {
+ err("ERROR: register com3 fail\n");
+ }
+ }
#endif
#ifdef CONFIG_COM4
dev = up_alloc_com(COM4, 3);
if (dev == NULL)
- dbg("alloc com4 fail\n");
- else {
- err = uart_register("/dev/ttyS3", dev);
- if (err)
- dbg("register com4 fail\n");
- }
+ {
+ err("ERROR: alloc com4 fail\n");
+ }
+ else
+ {
+ errcode = uart_register("/dev/ttyS3", dev);
+ if (errcode)
+ {
+ err("ERROR: register com4 fail\n");
+ }
+ }
#endif
}
diff --git a/arch/sh/src/common/up_assert.c b/arch/sh/src/common/up_assert.c
index c8303f2995810c5b31acb47b2456ea0859730db6..4919a30363bd7ada95721991c09653adbbbf0caf 100644
--- a/arch/sh/src/common/up_assert.c
+++ b/arch/sh/src/common/up_assert.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/sh/src/common/up_assert.c
*
- * Copyright (C) 2008-2009, 2012-2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2008-2009, 2012-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -76,10 +65,6 @@
# undef CONFIG_ARCH_USBDUMP
#endif
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -147,17 +132,17 @@ static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
void up_assert(const uint8_t *filename, int lineno)
{
-#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG)
+#if CONFIG_TASK_NAME_SIZE > 0
struct tcb_s *rtcb = this_task();
#endif
board_autoled_on(LED_ASSERTION);
#if CONFIG_TASK_NAME_SIZE > 0
- lldbg("Assertion failed at file:%s line: %d task: %s\n",
+ alert("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
- lldbg("Assertion failed at file:%s line: %d\n",
+ alert("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
diff --git a/arch/sh/src/common/up_createstack.c b/arch/sh/src/common/up_createstack.c
index f52f03386ed13f260d4e6d48f56187b218d0d3ee..3a2a4118119997cdc4e1c121fa9c80b63c62ca6a 100644
--- a/arch/sh/src/common/up_createstack.c
+++ b/arch/sh/src/common/up_createstack.c
@@ -137,12 +137,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Was the allocation successful? */
if (!tcb->stack_alloc_ptr)
{
- sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+ serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
}
#endif
}
diff --git a/arch/sh/src/common/up_exit.c b/arch/sh/src/common/up_exit.c
index 84845556e983c96467843fd43f58e19ba7035633..4b4ba44337c5d1e1fcbb68fa44a04d42b3769c3b 100644
--- a/arch/sh/src/common/up_exit.c
+++ b/arch/sh/src/common/up_exit.c
@@ -75,7 +75,7 @@
*
****************************************************************************/
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
{
#if CONFIG_NFILE_DESCRIPTORS > 0
@@ -86,8 +86,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
int i;
#endif
- sdbg(" TCB=%p name=%s\n", tcb, tcb->argv[0]);
- sdbg(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+ sinfo(" TCB=%p name=%s\n", tcb, tcb->argv[0]);
+ sinfo(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
#if CONFIG_NFILE_DESCRIPTORS > 0
filelist = tcb->group->tg_filelist;
@@ -96,8 +96,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
struct inode *inode = filelist->fl_files[i].f_inode;
if (inode)
{
- sdbg(" fd=%d refcount=%d\n",
- i, inode->i_crefs);
+ sinfo(" fd=%d refcount=%d\n",
+ i, inode->i_crefs);
}
}
#endif
@@ -110,11 +110,11 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
if (filep->fs_fd >= 0)
{
#if CONFIG_STDIO_BUFFER_SIZE > 0
- sdbg(" fd=%d nbytes=%d\n",
- filep->fs_fd,
- filep->fs_bufpos - filep->fs_bufstart);
+ sinfo(" fd=%d nbytes=%d\n",
+ filep->fs_fd,
+ filep->fs_bufpos - filep->fs_bufstart);
#else
- sdbg(" fd=%d\n", filep->fs_fd);
+ sinfo(" fd=%d\n", filep->fs_fd);
#endif
}
}
@@ -147,10 +147,10 @@ void _exit(int status)
(void)up_irq_save();
- slldbg("TCB=%p exiting\n", this_task());
+ sllinfo("TCB=%p exiting\n", this_task());
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
- slldbg("Other tasks:\n");
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
+ sllinfo("Other tasks:\n");
sched_foreach(_up_dumponexit, NULL);
#endif
diff --git a/arch/sh/src/common/up_initialize.c b/arch/sh/src/common/up_initialize.c
index 98c6bf273d842474e4d91df99a1267975fb5d252..89fb6579c34deef2d59f4f8426628991bd5aa20c 100644
--- a/arch/sh/src/common/up_initialize.c
+++ b/arch/sh/src/common/up_initialize.c
@@ -77,18 +77,18 @@
*
****************************************************************************/
-#if defined(CONFIG_ARCH_CALIBRATION) & defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) & defined(CONFIG_DEBUG_FEATURES)
static void up_calibratedelay(void)
{
int i;
- slldbg("Beginning 100s delay\n");
+ sllwarn("Beginning 100s delay\n");
for (i = 0; i < 100; i++)
{
up_mdelay(1000);
}
- slldbg("End 100s delay\n");
+ sllwarn("End 100s delay\n");
}
#else
# define up_calibratedelay()
diff --git a/arch/sh/src/common/up_releasepending.c b/arch/sh/src/common/up_releasepending.c
index b91503cbe6a3f046514a8195a246a2a90b364ab9..1f36fd752baefacae065cc964998432076826c31 100644
--- a/arch/sh/src/common/up_releasepending.c
+++ b/arch/sh/src/common/up_releasepending.c
@@ -67,7 +67,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
- slldbg("From TCB=%p\n", rtcb);
+ sllinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
diff --git a/arch/sh/src/common/up_reprioritizertr.c b/arch/sh/src/common/up_reprioritizertr.c
index e838cff0bba8de83d17c6b920e30c5192a78df79..bce7c4e144f5d913d59fd6701ed2d28a3dc5b81f 100644
--- a/arch/sh/src/common/up_reprioritizertr.c
+++ b/arch/sh/src/common/up_reprioritizertr.c
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
- slldbg("TCB=%p PRI=%d\n", tcb, priority);
+ sllinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
diff --git a/arch/sh/src/m16c/m16c_dumpstate.c b/arch/sh/src/m16c/m16c_dumpstate.c
index e80fbcb9f57d62b5d11c63cd7add92cec5c1f0f3..6cd4f545d4c14fe718b47b1e2522130c4b34d8ad 100644
--- a/arch/sh/src/m16c/m16c_dumpstate.c
+++ b/arch/sh/src/m16c/m16c_dumpstate.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/sh/src/m16c/m16c_assert.c
*
- * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2009, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
#include
-/* Output debug info -- even if debug is not selected. */
-
-#undef CONFIG_DEBUG
-#undef CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
#include
#include
@@ -59,14 +52,6 @@
#ifdef CONFIG_ARCH_STACKDUMP
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -112,7 +97,7 @@ static void m16c_stackdump(uint16_t sp, uint16_t stack_base)
for (stack = sp & ~7; stack < stack_base; stack += 8)
{
uint8_t *ptr = (uint8_t*)stack;
- lldbg("%04x: %02x %02x %02x %02x %02x %02x %02x %02x\n",
+ alert("%04x: %02x %02x %02x %02x %02x %02x %02x %02x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7]);
}
}
@@ -131,14 +116,14 @@ static inline void m16c_registerdump(void)
{
/* Yes.. dump the interrupt registers */
- lldbg("PC: %02x%02x%02x FLG: %02x00%02x FB: %02x%02x SB: %02x%02x SP: %02x%02x\n",
+ alert("PC: %02x%02x%02x FLG: %02x00%02x FB: %02x%02x SB: %02x%02x SP: %02x%02x\n",
ptr[REG_FLGPCHI] & 0xff, ptr[REG_PC], ptr[REG_PC+1],
ptr[REG_FLGPCHI] >> 8, ptr[REG_FLG],
ptr[REG_FB], ptr[REG_FB+1],
ptr[REG_SB], ptr[REG_SB+1],
ptr[REG_SP], ptr[REG_SP+1]);
- lldbg("R0: %02x%02x R1: %02x%02x R2: %02x%02x A0: %02x%02x A1: %02x%02x\n",
+ alert("R0: %02x%02x R1: %02x%02x R2: %02x%02x A0: %02x%02x A1: %02x%02x\n",
ptr[REG_R0], ptr[REG_R0+1], ptr[REG_R1], ptr[REG_R1+1],
ptr[REG_R2], ptr[REG_R2+1], ptr[REG_R3], ptr[REG_R3+1],
ptr[REG_A0], ptr[REG_A0+1], ptr[REG_A1], ptr[REG_A1+1]);
@@ -194,10 +179,10 @@ void up_dumpstate(void)
/* Show interrupt stack info */
- lldbg("sp: %04x\n", sp);
- lldbg("IRQ stack:\n");
- lldbg(" base: %04x\n", istackbase);
- lldbg(" size: %04x\n", istacksize);
+ alert("sp: %04x\n", sp);
+ alert("IRQ stack:\n");
+ alert(" base: %04x\n", istackbase);
+ alert(" size: %04x\n", istacksize);
/* Does the current stack pointer lie within the interrupt
* stack?
@@ -212,18 +197,18 @@ void up_dumpstate(void)
/* Extract the user stack pointer from the register area */
sp = m16c_getusersp();
- lldbg("sp: %04x\n", sp);
+ alert("sp: %04x\n", sp);
}
/* Show user stack info */
- lldbg("User stack:\n");
- lldbg(" base: %04x\n", ustackbase);
- lldbg(" size: %04x\n", ustacksize);
+ alert("User stack:\n");
+ alert(" base: %04x\n", ustackbase);
+ alert(" size: %04x\n", ustacksize);
#else
- lldbg("sp: %04x\n", sp);
- lldbg("stack base: %04x\n", ustackbase);
- lldbg("stack size: %04x\n", ustacksize);
+ alert("sp: %04x\n", sp);
+ alert("stack base: %04x\n", ustackbase);
+ alert("stack size: %04x\n", ustacksize);
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@@ -233,7 +218,7 @@ void up_dumpstate(void)
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
- lldbg("ERROR: Stack pointer is not within allocated stack\n");
+ alert("ERROR: Stack pointer is not within allocated stack\n");
#endif
}
else
diff --git a/arch/sh/src/m16c/m16c_head.S b/arch/sh/src/m16c/m16c_head.S
index f18da3fe3fe02581a8bd07ca3b8fe5b7635b99fd..711ce26aaaf16b09a8fcefbeac13d0fcd9a02907 100644
--- a/arch/sh/src/m16c/m16c_head.S
+++ b/arch/sh/src/m16c/m16c_head.S
@@ -58,7 +58,7 @@
*****************************************************************************/
.macro showprogress, code
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.globl _up_lowputc
mov.b r#\code1l /* Character to print */
jsr.a _up_lowputc /* Print it */
diff --git a/arch/sh/src/m16c/m16c_schedulesigaction.c b/arch/sh/src/m16c/m16c_schedulesigaction.c
index 682d3299875c8ebad2da16137073dad542efabf9..23d105240bf2d498f224877b5c4a07b6090fa90d 100644
--- a/arch/sh/src/m16c/m16c_schedulesigaction.c
+++ b/arch/sh/src/m16c/m16c_schedulesigaction.c
@@ -93,7 +93,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+ sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -107,7 +107,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* being delivered to the currently executing task.
*/
- sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+ sinfo("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
if (tcb == this_task())
{
diff --git a/arch/sh/src/m16c/m16c_serial.c b/arch/sh/src/m16c/m16c_serial.c
index a366e3b57d399db91ac01473c474652f644338d4..34c3d9019a65d36df339f11deafb317fdbe39c37 100644
--- a/arch/sh/src/m16c/m16c_serial.c
+++ b/arch/sh/src/m16c/m16c_serial.c
@@ -588,7 +588,7 @@ static int up_setup(struct uart_dev_s *dev)
else
#endif
{
- dbg("Invalid UART #\n");
+ err("ERROR: Invalid UART #\n");
}
/* Set UART transmit/receive control register 1 to enable transmit and receive */
@@ -613,7 +613,7 @@ static int up_setup(struct uart_dev_s *dev)
}
else
{
- dbg("Invalid bits=%d\n", priv->bits);
+ err("ERROR: Invalid bits=%d\n", priv->bits);
}
if (priv->parity != 0)
@@ -665,7 +665,7 @@ static int up_setup(struct uart_dev_s *dev)
else
#endif
{
- dbg("Invalid UART #\n");
+ err("ERROR: Invalid UART #\n");
}
/* Read any data left in the RX fifo */
@@ -872,7 +872,7 @@ static void m16c_rxint(struct up_dev_s *dev, bool enable)
else
#endif
{
- dbg("Invalid UART #\n");
+ err("ERROR: Invalid UART #\n");
return;
}
@@ -1027,7 +1027,7 @@ static void m16c_txint(struct up_dev_s *dev, bool enable)
else
#endif
{
- dbg("Invalid UART #\n");
+ err("ERROR: Invalid UART #\n");
return;
}
diff --git a/arch/sh/src/m16c/m16c_sigdeliver.c b/arch/sh/src/m16c/m16c_sigdeliver.c
index 3b595ed7ef7d94bc591ad2000f04e0d1770e2353..40976346f3dcea748084a2bb1dae345612cec363 100644
--- a/arch/sh/src/m16c/m16c_sigdeliver.c
+++ b/arch/sh/src/m16c/m16c_sigdeliver.c
@@ -95,7 +95,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -128,7 +128,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/sh/src/sh1/sh1_dumpstate.c b/arch/sh/src/sh1/sh1_dumpstate.c
index ad165c4d2c87cecc85f400d2b45193e108cab261..487bc854ad57de0030baa2d36ef01772b20fbcba 100644
--- a/arch/sh/src/sh1/sh1_dumpstate.c
+++ b/arch/sh/src/sh1/sh1_dumpstate.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/sh/src/sh1/sh1_assert.c
*
- * Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2008-2009, 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
#include
-/* Output debug info -- even if debug is not selected. */
-
-#undef CONFIG_DEBUG
-#undef CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
#include
#include
@@ -58,14 +51,6 @@
#ifdef CONFIG_ARCH_STACKDUMP
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -99,7 +84,7 @@ static void sh1_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t*)stack;
- lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
@@ -119,17 +104,17 @@ static inline void sh1_registerdump(void)
{
/* Yes.. dump the interrupt registers */
- lldbg("PC: %08x SR=%08x\n",
+ alert("PC: %08x SR=%08x\n",
ptr[REG_PC], ptr[REG_SR]);
- lldbg("PR: %08x GBR: %08x MACH: %08x MACL: %08x\n",
+ alert("PR: %08x GBR: %08x MACH: %08x MACL: %08x\n",
ptr[REG_PR], ptr[REG_GBR], ptr[REG_MACH], ptr[REG_MACL]);
- lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 0,
+ alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 0,
ptr[REG_R0], ptr[REG_R1], ptr[REG_R2], ptr[REG_R3],
ptr[REG_R4], ptr[REG_R5], ptr[REG_R6], ptr[REG_R7]);
- lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 8,
+ alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", 8,
ptr[REG_R8], ptr[REG_R9], ptr[REG_R10], ptr[REG_R11],
ptr[REG_R12], ptr[REG_R13], ptr[REG_R14], ptr[REG_R15]);
}
@@ -175,10 +160,10 @@ void up_dumpstate(void)
/* Show interrupt stack info */
- lldbg("sp: %08x\n", sp);
- lldbg("IRQ stack:\n");
- lldbg(" base: %08x\n", istackbase);
- lldbg(" size: %08x\n", istacksize);
+ alert("sp: %08x\n", sp);
+ alert("IRQ stack:\n");
+ alert(" base: %08x\n", istackbase);
+ alert(" size: %08x\n", istacksize);
/* Does the current stack pointer lie within the interrupt
* stack?
@@ -195,18 +180,18 @@ void up_dumpstate(void)
*/
sp = g_intstackbase;
- lldbg("sp: %08x\n", sp);
+ alert("sp: %08x\n", sp);
}
/* Show user stack info */
- lldbg("User stack:\n");
- lldbg(" base: %08x\n", ustackbase);
- lldbg(" size: %08x\n", ustacksize);
+ alert("User stack:\n");
+ alert(" base: %08x\n", ustackbase);
+ alert(" size: %08x\n", ustacksize);
#else
- lldbg("sp: %08x\n", sp);
- lldbg("stack base: %08x\n", ustackbase);
- lldbg("stack size: %08x\n", ustacksize);
+ alert("sp: %08x\n", sp);
+ alert("stack base: %08x\n", ustackbase);
+ alert("stack size: %08x\n", ustacksize);
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@@ -216,7 +201,7 @@ void up_dumpstate(void)
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
- lldbg("ERROR: Stack pointer is not within allocated stack\n");
+ alert("ERROR: Stack pointer is not within allocated stack\n");
#endif
}
else
diff --git a/arch/sh/src/sh1/sh1_head.S b/arch/sh/src/sh1/sh1_head.S
index 9bb4efb1f5e17e6c4618b4d6fbc5ffda76d60f2d..e46522da8851794a4d977de14c3adfd51a213a57 100644
--- a/arch/sh/src/sh1/sh1_head.S
+++ b/arch/sh/src/sh1/sh1_head.S
@@ -67,7 +67,7 @@
#ifdef CONFIG_ARCH_LEDS
.globl _board_autoled_initialize /* Boot LED setup */
#endif
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.globl _up_lowputc /* Low-level debug output */
#endif
.globl _os_start /* NuttX entry point */
@@ -161,7 +161,7 @@
*****************************************************************************/
.macro showprogress, code
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
mov.l .Llowputc, r0 /* Address of up_earlyconsoleinit */
jsr @r0 /* Call it */
mov #\code, r4 /* Delay slot */
@@ -488,7 +488,7 @@ __start0:
#endif
.Llowsetup:
.long _up_lowsetup
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
.Llowputc:
.long _up_lowputc
#endif
diff --git a/arch/sh/src/sh1/sh1_irq.c b/arch/sh/src/sh1/sh1_irq.c
index 58514a257444c385621964b5dea0d6997c56f5d6..36164ae9d1d37e109e2b64da12d12aa67c06beb2 100644
--- a/arch/sh/src/sh1/sh1_irq.c
+++ b/arch/sh/src/sh1/sh1_irq.c
@@ -92,10 +92,10 @@ void up_prioritize_irq(int irq, int priority)
uint32_t reg;
int shift;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if ((unsigned) irq > NR_IRQS || (unsigned)priority > 15)
{
- dbg("Invalid parameters\n");
+ err("ERROR: Invalid parameters\n");
return;
}
#endif
@@ -260,7 +260,7 @@ void up_prioritize_irq(int irq, int priority)
#endif
default:
- dbg("Invalid irq=%d\n", irq);
+ err("ERROR: Invalid irq=%d\n", irq);
return;
}
diff --git a/arch/sh/src/sh1/sh1_schedulesigaction.c b/arch/sh/src/sh1/sh1_schedulesigaction.c
index 4c6e7c16595cd8d5cba63d37dfac39ec7ef5566d..11c241ddea36204814ecbc46447d406855f084ab 100644
--- a/arch/sh/src/sh1/sh1_schedulesigaction.c
+++ b/arch/sh/src/sh1/sh1_schedulesigaction.c
@@ -93,7 +93,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+ sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -107,7 +107,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* being delivered to the currently executing task.
*/
- sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+ sinfo("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
if (tcb == this_task())
{
diff --git a/arch/sh/src/sh1/sh1_sigdeliver.c b/arch/sh/src/sh1/sh1_sigdeliver.c
index eead3c06f256866b088bdbe85d497cc3e0a1ab52..85b8f57978dd43fc35751f03888b8e620b52dec3 100644
--- a/arch/sh/src/sh1/sh1_sigdeliver.c
+++ b/arch/sh/src/sh1/sh1_sigdeliver.c
@@ -95,7 +95,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -127,7 +127,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/sim/src/board_lcd.c b/arch/sim/src/board_lcd.c
index 3760aa195e57a70cb900126ae84c8cd73a1099c3..76b68bbeb73431986a73502a6818a088aa30a130 100644
--- a/arch/sim/src/board_lcd.c
+++ b/arch/sim/src/board_lcd.c
@@ -101,24 +101,15 @@
#endif
/* Debug ********************************************************************/
-/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
- * also be enabled.
- */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_GRAPHICS
-# undef CONFIG_DEBUG_LCD
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_LCD
-#endif
#ifdef CONFIG_DEBUG_LCD
-# define lcddbg(format, ...) vdbg(format, ##__VA_ARGS__)
+# define lcderr(format, ...) err(format, ##__VA_ARGS__)
+# define lcdwarn(format, ...) warn(format, ##__VA_ARGS__)
+# define lcdinfo(format, ...) info(format, ##__VA_ARGS__)
#else
-# define lcddbg(x...)
+# define lcderr(x...)
+# define lcdwarn(x...)
+# define lcdinfo(x...)
#endif
/****************************************************************************
@@ -257,7 +248,7 @@ static struct sim_dev_s g_lcddev =
static int sim_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
size_t npixels)
{
- lcddbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+ lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
return OK;
}
@@ -278,7 +269,7 @@ static int sim_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
static int sim_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
size_t npixels)
{
- lcddbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+ lcdinfo("row: %d col: %d npixels: %d\n", row, col, npixels);
return -ENOSYS;
}
@@ -294,7 +285,7 @@ static int sim_getvideoinfo(FAR struct lcd_dev_s *dev,
FAR struct fb_videoinfo_s *vinfo)
{
DEBUGASSERT(dev && vinfo);
- gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+ ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
return OK;
@@ -312,7 +303,7 @@ static int sim_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
FAR struct lcd_planeinfo_s *pinfo)
{
DEBUGASSERT(dev && pinfo && planeno == 0);
- gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+ ginfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
return OK;
}
@@ -328,7 +319,7 @@ static int sim_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
static int sim_getpower(struct lcd_dev_s *dev)
{
- gvdbg("power: %d\n", 0);
+ ginfo("power: %d\n", 0);
return g_lcddev.power;
}
@@ -344,7 +335,7 @@ static int sim_getpower(struct lcd_dev_s *dev)
static int sim_setpower(struct lcd_dev_s *dev, int power)
{
- gvdbg("power: %d\n", power);
+ ginfo("power: %d\n", power);
DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER);
/* Set new power level */
@@ -363,7 +354,7 @@ static int sim_setpower(struct lcd_dev_s *dev, int power)
static int sim_getcontrast(struct lcd_dev_s *dev)
{
- gvdbg("Not implemented\n");
+ ginfo("Not implemented\n");
return -ENOSYS;
}
@@ -377,7 +368,7 @@ static int sim_getcontrast(struct lcd_dev_s *dev)
static int sim_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
{
- gvdbg("contrast: %d\n", contrast);
+ ginfo("contrast: %d\n", contrast);
return -ENOSYS;
}
@@ -397,7 +388,7 @@ static int sim_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
int board_lcd_initialize(void)
{
- gvdbg("Initializing\n");
+ ginfo("Initializing\n");
return OK;
}
diff --git a/arch/sim/src/up_blocktask.c b/arch/sim/src/up_blocktask.c
index ccc39204896f78461f88f906752c6a8b3276406f..63749556c3bedc3052efe9119ec0e39a6f33f3d3 100644
--- a/arch/sim/src/up_blocktask.c
+++ b/arch/sim/src/up_blocktask.c
@@ -83,7 +83,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
ASSERT((tcb->task_state >= FIRST_READY_TO_RUN_STATE) &&
(tcb->task_state <= LAST_READY_TO_RUN_STATE));
- sdbg("Blocking TCB=%p\n", tcb);
+ sinfo("Blocking TCB=%p\n", tcb);
/* Remove the tcb task from the ready-to-run list. If we
* are blocking the task at the head of the task list (the
@@ -127,7 +127,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
*/
rtcb = this_task();
- sdbg("New Active Task TCB=%p\n", rtcb);
+ sinfo("New Active Task TCB=%p\n", rtcb);
/* The way that we handle signals in the simulation is kind of
* a kludge. This would be unsafe in a truly multi-threaded, interrupt
@@ -136,7 +136,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
if (rtcb->xcp.sigdeliver)
{
- sdbg("Delivering signals TCB=%p\n", rtcb);
+ sinfo("Delivering signals TCB=%p\n", rtcb);
((sig_deliver_t)rtcb->xcp.sigdeliver)(rtcb);
rtcb->xcp.sigdeliver = NULL;
}
diff --git a/arch/sim/src/up_deviceimage.c b/arch/sim/src/up_deviceimage.c
index f50944bd2e1e9772811fdd8ac7108e6c3060b31c..bf3ccc0dc27c81af5cd683df039ea0184d973ca0 100644
--- a/arch/sim/src/up_deviceimage.c
+++ b/arch/sim/src/up_deviceimage.c
@@ -58,7 +58,7 @@
****************************************************************************/
#ifdef VFAT_STANDALONE
-# define sdbg(format, ...) printf(format, ##__VA_ARGS__)
+# define serr(format, ...) printf(format, ##__VA_ARGS__)
# define kmm_malloc(size) malloc(size)
# define kmm_free(mem) free(mem)
#endif
@@ -223,7 +223,7 @@ char *up_deviceimage(void)
ret = inflateInit(&strm);
if (ret != Z_OK)
{
- sdbg("inflateInit FAILED: ret=%d msg=\"%s\"\n",
+ serr("ERROR: inflateInit FAILED: ret=%d msg=\"%s\"\n",
ret, strm.msg ? strm.msg : "No message");
return NULL;
}
@@ -260,7 +260,7 @@ char *up_deviceimage(void)
case Z_DATA_ERROR:
case Z_MEM_ERROR:
case Z_STREAM_ERROR:
- sdbg("inflate FAILED: ret=%d msg=\"%s\"\n",
+ serr("ERROR: inflate FAILED: ret=%d msg=\"%s\"\n",
ret, strm.msg ? strm.msg : "No message");
(void)inflateEnd(&strm);
kmm_free(pbuffer);
diff --git a/arch/sim/src/up_elf.c b/arch/sim/src/up_elf.c
index ecc4f2d2fee18f22d11de17e5ad2c308ee4a5466..bba6010ac9abc729776848881899644850c9914f 100644
--- a/arch/sim/src/up_elf.c
+++ b/arch/sim/src/up_elf.c
@@ -138,7 +138,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
- bdbg("Not supported\n");
+ berr("ERROR: Not supported\n");
return -ENOSYS;
}
diff --git a/arch/sim/src/up_exit.c b/arch/sim/src/up_exit.c
index a022405d762deab1395f3804e2f65c425f427ebb..2a17a8075b8bb4f3d48dda2fad052a8f24293100 100644
--- a/arch/sim/src/up_exit.c
+++ b/arch/sim/src/up_exit.c
@@ -67,7 +67,7 @@ void _exit(int status)
{
FAR struct tcb_s *tcb;
- sdbg("TCB=%p exiting\n", tcb);
+ sinfo("TCB=%p exiting\n", tcb);
/* Destroy the task at the head of the ready to run list. */
@@ -78,7 +78,7 @@ void _exit(int status)
*/
tcb = this_task();
- sdbg("New Active Task TCB=%p\n", tcb);
+ sinfo("New Active Task TCB=%p\n", tcb);
/* The way that we handle signals in the simulation is kind of
* a kludge. This would be unsafe in a truly multi-threaded, interrupt
@@ -87,7 +87,7 @@ void _exit(int status)
if (tcb->xcp.sigdeliver)
{
- sdbg("Delivering signals TCB=%p\n", tcb);
+ sinfo("Delivering signals TCB=%p\n", tcb);
((sig_deliver_t)tcb->xcp.sigdeliver)(tcb);
tcb->xcp.sigdeliver = NULL;
}
@@ -96,4 +96,3 @@ void _exit(int status)
up_longjmp(tcb->xcp.regs, 1);
}
-
diff --git a/arch/sim/src/up_framebuffer.c b/arch/sim/src/up_framebuffer.c
index 847fcd0b6a76a18d296845dd6ab09545109ed5e5..ff1e3629bc6ce3cf83fc70537cd94998253837cb 100644
--- a/arch/sim/src/up_framebuffer.c
+++ b/arch/sim/src/up_framebuffer.c
@@ -191,13 +191,14 @@ struct fb_vtable_s g_fbobject =
static int up_getvideoinfo(FAR struct fb_vtable_s *vtable,
FAR struct fb_videoinfo_s *vinfo)
{
- dbg("vtable=%p vinfo=%p\n", vtable, vinfo);
+ info("vtable=%p vinfo=%p\n", vtable, vinfo);
if (vtable && vinfo)
{
memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
return OK;
}
- dbg("Returning EINVAL\n");
+
+ err("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@@ -208,13 +209,14 @@ static int up_getvideoinfo(FAR struct fb_vtable_s *vtable,
static int up_getplaneinfo(FAR struct fb_vtable_s *vtable, int planeno,
FAR struct fb_planeinfo_s *pinfo)
{
- dbg("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
+ info("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
if (vtable && planeno == 0 && pinfo)
{
memcpy(pinfo, &g_planeinfo, sizeof(struct fb_planeinfo_s));
return OK;
}
- dbg("Returning EINVAL\n");
+
+ err("ERROR: Returning EINVAL\n");
return -EINVAL;
}
@@ -228,7 +230,7 @@ static int up_getcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *cmap
int len;
int i;
- dbg("vtable=%p cmap=%p len=%d\n", vtable, cmap, cmap->len);
+ info("vtable=%p cmap=%p len=%d\n", vtable, cmap, cmap->len);
if (vtable && cmap)
{
for (i = cmap->first, len = 0; i < 256 && len < cmap->len; i++, len++)
@@ -244,7 +246,8 @@ static int up_getcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *cmap
cmap->len = len;
return OK;
}
- dbg("Returning EINVAL\n");
+
+ err("ERROR: Returning EINVAL\n");
return -EINVAL;
}
#endif
@@ -259,12 +262,13 @@ static int up_putcmap(FAR struct fb_vtable_s *vtable, FAR const struct fb_cmap_s
#ifdef CONFIG_SIM_X11FB
return up_x11cmap(cmap->first, cmap->len, cmap->red, cmap->green, cmap->blue, NULL);
#else
- dbg("vtable=%p cmap=%p len=%d\n", vtable, cmap, cmap->len);
+ info("vtable=%p cmap=%p len=%d\n", vtable, cmap, cmap->len);
if (vtable && cmap)
{
return OK;
}
- dbg("Returning EINVAL\n");
+
+ err("ERROR: Returning EINVAL\n");
return -EINVAL;
#endif
}
@@ -278,23 +282,24 @@ static int up_putcmap(FAR struct fb_vtable_s *vtable, FAR const struct fb_cmap_s
static int up_getcursor(FAR struct fb_vtable_s *vtable,
FAR struct fb_cursorattrib_s *attrib)
{
- dbg("vtable=%p attrib=%p\n", vtable, attrib);
+ info("vtable=%p attrib=%p\n", vtable, attrib);
if (vtable && attrib)
{
#ifdef CONFIG_FB_HWCURSORIMAGE
attrib->fmt = FB_FMT;
#endif
- dbg("pos: (x=%d, y=%d)\n", g_cpos.x, g_cpos.y);
+ info("pos: (x=%d, y=%d)\n", g_cpos.x, g_cpos.y);
attrib->pos = g_cpos;
#ifdef CONFIG_FB_HWCURSORSIZE
attrib->mxsize.h = CONFIG_SIM_FBHEIGHT;
attrib->mxsize.w = CONFIG_SIM_FBWIDTH;
- dbg("size: (h=%d, w=%d)\n", g_csize.h, g_csize.w);
+ info("size: (h=%d, w=%d)\n", g_csize.h, g_csize.w);
attrib->size = g_csize;
#endif
return OK;
}
- dbg("Returning EINVAL\n");
+
+ err("ERROR: Returning EINVAL\n");
return -EINVAL;
}
#endif
@@ -307,32 +312,33 @@ static int up_getcursor(FAR struct fb_vtable_s *vtable,
static int up_setcursor(FAR struct fb_vtable_s *vtable,
FAR struct fb_setcursor_s *setttings)
{
- dbg("vtable=%p setttings=%p\n", vtable, setttings);
+ info("vtable=%p setttings=%p\n", vtable, setttings);
if (vtable && setttings)
{
- dbg("flags: %02x\n", settings->flags);
+ info("flags: %02x\n", settings->flags);
if ((flags & FB_CUR_SETPOSITION) != 0)
{
g_cpos = settings->pos;
- dbg("pos: (h:%d, w:%d)\n", g_cpos.x, g_cpos.y);
+ info("pos: (h:%d, w:%d)\n", g_cpos.x, g_cpos.y);
}
#ifdef CONFIG_FB_HWCURSORSIZE
if ((flags & FB_CUR_SETSIZE) != 0)
{
g_csize = settings->size;
- dbg("size: (h:%d, w:%d)\n", g_csize.h, g_csize.w);
+ info("size: (h:%d, w:%d)\n", g_csize.h, g_csize.w);
}
#endif
#ifdef CONFIG_FB_HWCURSORIMAGE
if ((flags & FB_CUR_SETIMAGE) != 0)
{
- dbg("image: (h:%d, w:%d) @ %p\n",
- settings->img.height, settings->img.width, settings->img.image);
+ info("image: (h:%d, w:%d) @ %p\n",
+ settings->img.height, settings->img.width, settings->img.image);
}
#endif
return OK;
}
- dbg("Returning EINVAL\n");
+
+ err("ERROR: Returning EINVAL\n");
return -EINVAL;
}
#endif
diff --git a/arch/sim/src/up_netdriver.c b/arch/sim/src/up_netdriver.c
index c785f4974604edaf82ede354b378a6a1d07b7b3a..908cff3236c83c04d0eec165143b869f2f6e019c 100644
--- a/arch/sim/src/up_netdriver.c
+++ b/arch/sim/src/up_netdriver.c
@@ -213,7 +213,7 @@ void netdriver_loop(void)
#ifdef CONFIG_NET_IPv4
if (eth->type == HTONS(ETHTYPE_IP) && is_ours)
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
/* Handle ARP on input then give the IPv4 packet to the network
* layer
@@ -254,7 +254,7 @@ void netdriver_loop(void)
#ifdef CONFIG_NET_IPv6
if (eth->type == HTONS(ETHTYPE_IP6) && is_ours)
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
/* Give the IPv6 packet to the network layer */
diff --git a/arch/sim/src/up_releasepending.c b/arch/sim/src/up_releasepending.c
index 386b58589a38143e6bd5bb24baf9c0e30c3fa70b..7a1df748279a7e838e8ba5afb739a20da55fdf92 100644
--- a/arch/sim/src/up_releasepending.c
+++ b/arch/sim/src/up_releasepending.c
@@ -66,7 +66,7 @@ void up_release_pending(void)
{
FAR struct tcb_s *rtcb = this_task();
- sdbg("From TCB=%p\n", rtcb);
+ sinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
@@ -93,7 +93,7 @@ void up_release_pending(void)
*/
rtcb = this_task();
- sdbg("New Active Task TCB=%p\n", rtcb);
+ sinfo("New Active Task TCB=%p\n", rtcb);
/* The way that we handle signals in the simulation is kind of
* a kludge. This would be unsafe in a truly multi-threaded, interrupt
@@ -102,7 +102,7 @@ void up_release_pending(void)
if (rtcb->xcp.sigdeliver)
{
- sdbg("Delivering signals TCB=%p\n", rtcb);
+ sinfo("Delivering signals TCB=%p\n", rtcb);
((sig_deliver_t)rtcb->xcp.sigdeliver)(rtcb);
rtcb->xcp.sigdeliver = NULL;
}
diff --git a/arch/sim/src/up_reprioritizertr.c b/arch/sim/src/up_reprioritizertr.c
index 39c981c64838ee87872b0517939a4b040d05aa55..048c311559607353625a2e62729997eb22b7ed5a 100644
--- a/arch/sim/src/up_reprioritizertr.c
+++ b/arch/sim/src/up_reprioritizertr.c
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
FAR struct tcb_s *rtcb = this_task();
bool switch_needed;
- sdbg("TCB=%p PRI=%d\n", tcb, priority);
+ sinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
@@ -148,7 +148,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
*/
rtcb = this_task();
- sdbg("New Active Task TCB=%p\n", rtcb);
+ sinfo("New Active Task TCB=%p\n", rtcb);
/* The way that we handle signals in the simulation is kind of
* a kludge. This would be unsafe in a truly multi-threaded, interrupt
@@ -157,7 +157,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
if (rtcb->xcp.sigdeliver)
{
- sdbg("Delivering signals TCB=%p\n", rtcb);
+ sinfo("Delivering signals TCB=%p\n", rtcb);
((sig_deliver_t)rtcb->xcp.sigdeliver)(rtcb);
rtcb->xcp.sigdeliver = NULL;
}
diff --git a/arch/sim/src/up_smpsignal.c b/arch/sim/src/up_smpsignal.c
index 58582d0df96bcef5f868fe56602a2fe1afbee8b3..f921c7f3b4969ae6ea7b169988616ebce422383c 100644
--- a/arch/sim/src/up_smpsignal.c
+++ b/arch/sim/src/up_smpsignal.c
@@ -112,7 +112,7 @@ void sim_cpu_pause(int cpu, volatile spinlock_t *wait,
if (rtcb->xcp.sigdeliver)
{
- sdbg("CPU%d: Delivering signals TCB=%p\n", cpu, rtcb);
+ sinfo("CPU%d: Delivering signals TCB=%p\n", cpu, rtcb);
((sig_deliver_t)rtcb->xcp.sigdeliver)(rtcb);
rtcb->xcp.sigdeliver = NULL;
}
diff --git a/arch/sim/src/up_spiflash.c b/arch/sim/src/up_spiflash.c
index 9c516972f0bf666d620da525bd0c4e0bf4567146..51be923fd38c410b62fe58dc8deaddcdf1d67b7c 100644
--- a/arch/sim/src/up_spiflash.c
+++ b/arch/sim/src/up_spiflash.c
@@ -61,23 +61,16 @@
/* Configuration ********************************************************************/
/* Debug ****************************************************************************/
-/* Check if (non-standard) SPI debug is enabled */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_SPI
-#endif
+/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
/* Define the FLASH SIZE in bytes */
@@ -479,7 +472,7 @@ static uint16_t spiflash_send(FAR struct spi_dev_s *dev, uint16_t wd)
static void spiflash_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
FAR void *rxbuffer, size_t nwords)
{
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
/* 8-bit mode */
@@ -536,7 +529,7 @@ static void spiflash_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffe
#ifndef CONFIG_SPI_EXCHANGE
static void spiflash_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, size_t nwords)
{
- spivdbg("txbuffer=%p nwords=%d\n", txbuffer, nwords);
+ spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
return spiflash_exchange(dev, txbuffer, NULL, nwords);
}
#endif
@@ -565,7 +558,7 @@ static void spiflash_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffe
static void spiflash_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer,
size_t nwords)
{
- spivdbg("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
+ spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
return spiflash_exchange(dev, NULL, rxbuffer, nwords);
}
#endif
diff --git a/arch/sim/src/up_touchscreen.c b/arch/sim/src/up_touchscreen.c
index 4b4e598f45f741ccc98088cec22ee38c7785adb4..a56870c8500a2758df273517cb131f8079021653 100644
--- a/arch/sim/src/up_touchscreen.c
+++ b/arch/sim/src/up_touchscreen.c
@@ -194,7 +194,7 @@ static void up_notify(FAR struct up_dev_s *priv)
* that the read data is available.
*/
- ivdbg("contact=%d nwaiters=%d\n", priv->sample.contact, priv->nwaiters);
+ iinfo("contact=%d nwaiters=%d\n", priv->sample.contact, priv->nwaiters);
if (priv->nwaiters > 0)
{
/* After posting this semaphore, we need to exit because the touchscreen
@@ -217,7 +217,7 @@ static void up_notify(FAR struct up_dev_s *priv)
if (fds)
{
fds->revents |= POLLIN;
- ivdbg("Report events: %02x\n", fds->revents);
+ iinfo("Report events: %02x\n", fds->revents);
sem_post(fds->sem);
}
}
@@ -235,7 +235,7 @@ static int up_sample(FAR struct up_dev_s *priv,
/* Is there new touchscreen sample data available? */
- ivdbg("penchange=%d contact=%d id=%d\n",
+ iinfo("penchange=%d contact=%d id=%d\n",
priv->penchange, sample->contact, priv->id);
if (priv->penchange)
@@ -263,7 +263,7 @@ static int up_sample(FAR struct up_dev_s *priv,
}
priv->penchange = false;
- ivdbg("penchange=%d contact=%d id=%d\n",
+ iinfo("penchange=%d contact=%d id=%d\n",
priv->penchange, priv->sample.contact, priv->id);
ret = OK;
@@ -308,11 +308,11 @@ static int up_waitsample(FAR struct up_dev_s *priv,
{
/* Wait for a change in the touchscreen state */
- ivdbg("Waiting...\n");
+ iinfo("Waiting...\n");
priv->nwaiters++;
ret = sem_wait(&priv->waitsem);
priv->nwaiters--;
- ivdbg("Awakened...\n");
+ iinfo("Awakened...\n");
if (ret < 0)
{
@@ -357,7 +357,7 @@ errout:
static int up_open(FAR struct file *filep)
{
- ivdbg("Opening...\n");
+ iinfo("Opening...\n");
return OK;
}
@@ -367,7 +367,7 @@ static int up_open(FAR struct file *filep)
static int up_close(FAR struct file *filep)
{
- ivdbg("Closing...\n");
+ iinfo("Closing...\n");
return OK;
}
@@ -383,7 +383,7 @@ static ssize_t up_read(FAR struct file *filep, FAR char *buffer, size_t len)
struct up_sample_s sample;
int ret;
- ivdbg("len=%d\n", len);
+ iinfo("len=%d\n", len);
DEBUGASSERT(filep);
inode = filep->f_inode;
@@ -480,7 +480,7 @@ static ssize_t up_read(FAR struct file *filep, FAR char *buffer, size_t len)
ret = SIZEOF_TOUCH_SAMPLE_S(1);
errout:
- ivdbg("Returning %d\n", ret);
+ iinfo("Returning %d\n", ret);
sem_post(&priv->devsem);
return ret;
}
@@ -495,7 +495,7 @@ static int up_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
FAR struct up_dev_s *priv;
int ret;
- ivdbg("cmd: %d arg: %ld\n", cmd, arg);
+ iinfo("cmd: %d arg: %ld\n", cmd, arg);
DEBUGASSERT(filep);
inode = filep->f_inode;
@@ -539,7 +539,7 @@ static int up_poll(FAR struct file *filep, FAR struct pollfd *fds,
int ret;
int i;
- ivdbg("setup: %d\n", (int)setup);
+ iinfo("setup: %d\n", (int)setup);
DEBUGASSERT(filep && fds);
inode = filep->f_inode;
@@ -648,7 +648,7 @@ int board_tsc_setup(int minor)
char devname[DEV_NAMELEN];
int ret;
- ivdbg("minor: %d\n", minor);
+ iinfo("minor: %d\n", minor);
/* Debug-only sanity checks */
@@ -665,12 +665,12 @@ int board_tsc_setup(int minor)
/* Register the device as an input device */
(void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor);
- ivdbg("Registering %s\n", devname);
+ iinfo("Registering %s\n", devname);
ret = register_driver(devname, &up_fops, 0666, priv);
if (ret < 0)
{
- idbg("register_driver() failed: %d\n", ret);
+ ierr("ERROR: register_driver() failed: %d\n", ret);
goto errout_with_priv;
}
@@ -732,12 +732,12 @@ void board_tsc_teardown(void)
/* Un-register the device */
(void)snprintf(devname, DEV_NAMELEN, DEV_FORMAT, priv->minor);
- ivdbg("Un-registering %s\n", devname);
+ iinfo("Un-registering %s\n", devname);
ret = unregister_driver(devname);
if (ret < 0)
{
- idbg("uregister_driver() failed: %d\n", ret);
+ ierr("ERROR: uregister_driver() failed: %d\n", ret);
}
/* Clean up any resources. Ouch! While we are holding the semaphore? */
@@ -755,8 +755,8 @@ int up_buttonevent(int x, int y, int buttons)
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)&g_simtouchscreen;
bool pendown; /* true: pen is down */
- ivdbg("x=%d y=%d buttons=%02x\n", x, y, buttons);
- ivdbg("contact=%d nwaiters=%d\n", priv->sample.contact, priv->nwaiters);
+ iinfo("x=%d y=%d buttons=%02x\n", x, y, buttons);
+ iinfo("contact=%d nwaiters=%d\n", priv->sample.contact, priv->nwaiters);
/* Any button press will count as pendown. */
diff --git a/arch/sim/src/up_unblocktask.c b/arch/sim/src/up_unblocktask.c
index 148b551973bed735fa4302c10c50a87ebc830854..5217efeb8fbe8e4db28d9292b9c712f5788377bd 100644
--- a/arch/sim/src/up_unblocktask.c
+++ b/arch/sim/src/up_unblocktask.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/sim/src/up_unblocktask.c
*
- * Copyright (C) 2007-2009, 2013, 2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2007-2009, 2013, 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -77,7 +77,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
ASSERT((tcb->task_state >= FIRST_BLOCKED_STATE) &&
(tcb->task_state <= LAST_BLOCKED_STATE));
- sdbg("Unblocking TCB=%p\n", tcb);
+ sinfo("Unblocking TCB=%p\n", tcb);
/* Remove the task from the blocked task list */
@@ -107,7 +107,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
*/
rtcb = this_task();
- sdbg("New Active Task TCB=%p\n", rtcb);
+ sinfo("New Active Task TCB=%p\n", rtcb);
/* The way that we handle signals in the simulation is kind of
* a kludge. This would be unsafe in a truly multi-threaded, interrupt
@@ -116,7 +116,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
if (rtcb->xcp.sigdeliver)
{
- sdbg("Delivering signals TCB=%p\n", rtcb);
+ sinfo("Delivering signals TCB=%p\n", rtcb);
((sig_deliver_t)rtcb->xcp.sigdeliver)(rtcb);
rtcb->xcp.sigdeliver = NULL;
}
diff --git a/arch/x86/src/common/up_assert.c b/arch/x86/src/common/up_assert.c
index 32eb751c56d3c2b7c5fde27086101f97e1b10dc8..5d450e6fd9449451f768fc0011dccc52b166e954 100644
--- a/arch/x86/src/common/up_assert.c
+++ b/arch/x86/src/common/up_assert.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/x86/src/common/up_assert.c
*
- * Copyright (C) 2011-2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -76,19 +65,6 @@
# undef CONFIG_ARCH_USBDUMP
#endif
-/* The following is just intended to keep some ugliness out of the mainline
- * code. We are going to print the task name if:
- *
- * CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
- * (defined(CONFIG_DEBUG) || <-- And the debug is enabled (lldbg used)
- * defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
- */
-
-#undef CONFIG_PRINT_TASKNAME
-#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
-# define CONFIG_PRINT_TASKNAME 1
-#endif
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -105,9 +81,9 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t*)stack;
- lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
- stack, ptr[0], ptr[1], ptr[2], ptr[3],
- ptr[4], ptr[5], ptr[6], ptr[7]);
+ alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ stack, ptr[0], ptr[1], ptr[2], ptr[3],
+ ptr[4], ptr[5], ptr[6], ptr[7]);
}
}
#else
@@ -176,10 +152,10 @@ static void up_dumpstate(void)
/* Show interrupt stack info */
- lldbg("sp: %08x\n", sp);
- lldbg("IRQ stack:\n");
- lldbg(" base: %08x\n", istackbase);
- lldbg(" size: %08x\n", istacksize);
+ alert("sp: %08x\n", sp);
+ alert("IRQ stack:\n");
+ alert(" base: %08x\n", istackbase);
+ alert(" size: %08x\n", istacksize);
/* Does the current stack pointer lie within the interrupt
* stack?
@@ -196,18 +172,18 @@ static void up_dumpstate(void)
*/
sp = g_intstackbase;
- lldbg("sp: %08x\n", sp);
+ alert("sp: %08x\n", sp);
}
/* Show user stack info */
- lldbg("User stack:\n");
- lldbg(" base: %08x\n", ustackbase);
- lldbg(" size: %08x\n", ustacksize);
+ alert("User stack:\n");
+ alert(" base: %08x\n", ustackbase);
+ alert(" size: %08x\n", ustacksize);
#else
- lldbg("sp: %08x\n", sp);
- lldbg("stack base: %08x\n", ustackbase);
- lldbg("stack size: %08x\n", ustacksize);
+ alert("sp: %08x\n", sp);
+ alert("stack base: %08x\n", ustackbase);
+ alert("stack size: %08x\n", ustacksize);
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
@@ -217,7 +193,7 @@ static void up_dumpstate(void)
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
- lldbg("ERROR: Stack pointer is not within allocated stack\n");
+ alert("ERROR: Stack pointer is not within allocated stack\n");
#endif
}
else
@@ -280,17 +256,17 @@ static void _up_assert(int errorcode)
void up_assert(const uint8_t *filename, int lineno)
{
-#ifdef CONFIG_PRINT_TASKNAME
+#if CONFIG_TASK_NAME_SIZE > 0
struct tcb_s *rtcb = this_task();
#endif
board_autoled_on(LED_ASSERTION);
-#ifdef CONFIG_PRINT_TASKNAME
- lldbg("Assertion failed at file:%s line: %d task: %s\n",
+#if CONFIG_TASK_NAME_SIZE > 0
+ alert("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
- lldbg("Assertion failed at file:%s line: %d\n",
+ alert("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
diff --git a/arch/x86/src/common/up_elf.c b/arch/x86/src/common/up_elf.c
index 894f8657864a6f03033bda7bff7d2ddb46307227..7f169dee739ccb55cbf94e6fb26f7f3df725e759 100644
--- a/arch/x86/src/common/up_elf.c
+++ b/arch/x86/src/common/up_elf.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/x86/src/up_elf.c
*
- * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -146,7 +146,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
- bdbg("Not supported\n");
+ bwarn("WARNING: Not supported\n");
return -ENOSYS;
}
-
diff --git a/arch/x86/src/common/up_exit.c b/arch/x86/src/common/up_exit.c
index 12779df0248e0cb320e41a946c8331a32226384e..7e96c48e88208273a277d87ab7d2156bd612b5af 100644
--- a/arch/x86/src/common/up_exit.c
+++ b/arch/x86/src/common/up_exit.c
@@ -1,7 +1,7 @@
/****************************************************************************
* common/up_exit.c
*
- * Copyright (C) 2011, 2013-2014 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011, 2013-2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -74,7 +74,7 @@
*
****************************************************************************/
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
{
#if CONFIG_NFILE_DESCRIPTORS > 0
@@ -85,8 +85,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
int i;
#endif
- sdbg(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
- sdbg(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+ sinfo(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
+ sinfo(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
#if CONFIG_NFILE_DESCRIPTORS > 0
filelist = tcb->group->tg_filelist;
@@ -95,8 +95,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
struct inode *inode = filelist->fl_files[i].f_inode;
if (inode)
{
- sdbg(" fd=%d refcount=%d\n",
- i, inode->i_crefs);
+ sinfo(" fd=%d refcount=%d\n",
+ i, inode->i_crefs);
}
}
#endif
@@ -109,11 +109,11 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
if (filep->fs_fd >= 0)
{
#if CONFIG_STDIO_BUFFER_SIZE > 0
- sdbg(" fd=%d nbytes=%d\n",
- filep->fs_fd,
- filep->fs_bufpos - filep->fs_bufstart);
+ sinfo(" fd=%d nbytes=%d\n",
+ filep->fs_fd,
+ filep->fs_bufpos - filep->fs_bufstart);
#else
- sdbg(" fd=%d\n", filep->fs_fd);
+ sinfo(" fd=%d\n", filep->fs_fd);
#endif
}
}
@@ -146,10 +146,10 @@ void _exit(int status)
(void)up_irq_save();
- slldbg("TCB=%p exiting\n", this_task());
+ sllinfo("TCB=%p exiting\n", this_task());
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
- slldbg("Other tasks:\n");
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
+ sllinfo("Other tasks:\n");
sched_foreach(_up_dumponexit, NULL);
#endif
diff --git a/arch/x86/src/common/up_initialize.c b/arch/x86/src/common/up_initialize.c
index 07697ea078cb4557d8debe047cd5859445b1ad30..ff68a14fc2a8c890af970a4961cb9282f020e334 100644
--- a/arch/x86/src/common/up_initialize.c
+++ b/arch/x86/src/common/up_initialize.c
@@ -71,18 +71,18 @@
*
****************************************************************************/
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
static void up_calibratedelay(void)
{
int i;
- lldbg("Beginning 100s delay\n");
+ llwarn("Beginning 100s delay\n");
for (i = 0; i < 100; i++)
{
up_mdelay(1000);
}
- lldbg("End 100s delay\n");
+ llwarn("End 100s delay\n");
}
#else
# define up_calibratedelay()
diff --git a/arch/x86/src/common/up_releasepending.c b/arch/x86/src/common/up_releasepending.c
index 76137604bb4e0dec729dbb6193b03d4744e276c3..9271d8e40422ee14dd129c7cda4fc21d41e6b116 100644
--- a/arch/x86/src/common/up_releasepending.c
+++ b/arch/x86/src/common/up_releasepending.c
@@ -67,7 +67,7 @@ void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
- slldbg("From TCB=%p\n", rtcb);
+ sllinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
diff --git a/arch/x86/src/common/up_reprioritizertr.c b/arch/x86/src/common/up_reprioritizertr.c
index 398199261dea8bbf774ac9f168cd87a7dd996160..e78cdf04bd7691467f4410dddd9649073d6c228c 100644
--- a/arch/x86/src/common/up_reprioritizertr.c
+++ b/arch/x86/src/common/up_reprioritizertr.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/arm/up_reprioritizertr.c
*
- * Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011, 2013-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
struct tcb_s *rtcb = this_task();
bool switch_needed;
- slldbg("TCB=%p PRI=%d\n", tcb, priority);
+ sllinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
diff --git a/arch/x86/src/i486/up_createstack.c b/arch/x86/src/i486/up_createstack.c
index 1d9b1008d09d1a4c67c3142616d1c5766e3f408a..f51d6f2ca2b29e9c31d47b29cd7d79c769e79755 100644
--- a/arch/x86/src/i486/up_createstack.c
+++ b/arch/x86/src/i486/up_createstack.c
@@ -139,12 +139,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Was the allocation successful? */
if (!tcb->stack_alloc_ptr)
{
- sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+ serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
}
#endif
}
diff --git a/arch/x86/src/i486/up_regdump.c b/arch/x86/src/i486/up_regdump.c
index 4cc2d8cb3657bcebef7297b1a6999938f6846706..b3da1b603e213ebe0f9cd0e4a3607616dd807458 100644
--- a/arch/x86/src/i486/up_regdump.c
+++ b/arch/x86/src/i486/up_regdump.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/x86/src/i486/up_regdump.c
*
- * Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,46 +39,28 @@
#include
-/* Output debug info -- even if debug is not selected. */
-
-#undef CONFIG_DEBUG
-#undef CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
#include
#include
#include "up_internal.h"
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
+
/****************************************************************************
* Name: up_registerdump
****************************************************************************/
void up_registerdump(uint32_t *regs)
{
- lldbg(" ds:%08x irq:%08x err:%08x\n",
+ alert(" ds:%08x irq:%08x err:%08x\n",
regs[REG_DS], regs[REG_IRQNO], regs[REG_ERRCODE]);
- lldbg("edi:%08x esi:%08x ebp:%08x esp:%08x\n",
+ alert("edi:%08x esi:%08x ebp:%08x esp:%08x\n",
regs[REG_EDI], regs[REG_ESI], regs[REG_EBP], regs[REG_ESP]);
- lldbg("ebx:%08x edx:%08x ecx:%08x eax:%08x\n",
+ alert("ebx:%08x edx:%08x ecx:%08x eax:%08x\n",
regs[REG_EBX], regs[REG_EDX], regs[REG_ECX], regs[REG_EAX]);
- lldbg("eip:%08x cs:%08x flg:%08x sp:%08x ss:%08x\n",
+ alert("eip:%08x cs:%08x flg:%08x sp:%08x ss:%08x\n",
regs[REG_EIP], regs[REG_CS], regs[REG_EFLAGS], regs[REG_SP],
regs[REG_SS]);
}
diff --git a/arch/x86/src/i486/up_schedulesigaction.c b/arch/x86/src/i486/up_schedulesigaction.c
index 60604e8827fa4fc733a8f7583d681c48b4d1b0e1..5faf6d1ebd558c58c2ec8c1bf971c1893786c2f8 100644
--- a/arch/x86/src/i486/up_schedulesigaction.c
+++ b/arch/x86/src/i486/up_schedulesigaction.c
@@ -101,7 +101,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
+ sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -115,7 +115,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
- sdbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+ sinfo("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
if (tcb == this_task())
{
diff --git a/arch/x86/src/i486/up_sigdeliver.c b/arch/x86/src/i486/up_sigdeliver.c
index e807c3d6161c7f184248e5df7e8af8303bdf1cff..b6ec9a09d5c0ceac46478be8b132fb34cb245514 100644
--- a/arch/x86/src/i486/up_sigdeliver.c
+++ b/arch/x86/src/i486/up_sigdeliver.c
@@ -95,7 +95,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -126,7 +126,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/x86/src/qemu/qemu_fullcontextrestore.S b/arch/x86/src/qemu/qemu_fullcontextrestore.S
index 97a208ad89332f0b094f36f59c600efa7559c6ec..bc55160e3a98f6806b977083f7155e6be7126b9e 100644
--- a/arch/x86/src/qemu/qemu_fullcontextrestore.S
+++ b/arch/x86/src/qemu/qemu_fullcontextrestore.S
@@ -58,7 +58,7 @@
/* Trace macros, use like trace 'i' to print char to serial port. */
.macro chout, addr, ch
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
mov $\addr, %dx
mov $\ch, %al
out %al, %dx
@@ -66,7 +66,7 @@
.endm
.macro trace, ch
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
push %eax
push %edx
chout 0x3f8, \ch
diff --git a/arch/x86/src/qemu/qemu_head.S b/arch/x86/src/qemu/qemu_head.S
index 82b8d37a8d704089cbb4e6b1dbce0b730538938f..2b205208b3e3af22ae9a47d53a97b21a6f91db0e 100644
--- a/arch/x86/src/qemu/qemu_head.S
+++ b/arch/x86/src/qemu/qemu_head.S
@@ -64,7 +64,7 @@
/* Trace macros, use like trace 'i' to print char to serial port. */
.macro trace, ch
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
mov $0x3f8, %dx
mov $\ch, %al
out %al, %dx
diff --git a/arch/x86/src/qemu/qemu_saveusercontext.S b/arch/x86/src/qemu/qemu_saveusercontext.S
index 5b4b78647bc2b2de901b6fa961578be2b12a6e68..0620bbf6582cc383756aaa01c0d70cfa2ff25d47 100644
--- a/arch/x86/src/qemu/qemu_saveusercontext.S
+++ b/arch/x86/src/qemu/qemu_saveusercontext.S
@@ -54,7 +54,7 @@
/* Trace macros, use like trace 'i' to print char to serial port. */
.macro chout, addr, ch
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
mov $\addr, %dx
mov $\ch, %al
out %al, %dx
@@ -62,7 +62,7 @@
.endm
.macro trace, ch
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
push %eax
push %edx
chout 0x3f8, \ch
diff --git a/arch/x86/src/qemu/qemu_vga.c b/arch/x86/src/qemu/qemu_vga.c
index ec56c8aaa8781e12e328172f4a556c9199ee1384..151333933207087d0f941465338f757958c862fa 100644
--- a/arch/x86/src/qemu/qemu_vga.c
+++ b/arch/x86/src/qemu/qemu_vga.c
@@ -498,7 +498,7 @@ FAR struct lcd_dev_s *qemu_vga_initialize(void)
int ret = init_graph_vga(VGA_XRES, VGA_YRES, 1);
if (ret < 0)
{
- gdbg("ERROR: init_graph_vga returned %d\n",ret);
+ gerr("ERROR: init_graph_vga returned %d\n",ret);
}
memset(g_pscreen, 0, VGA_XRES * VGA_YRES);
@@ -510,7 +510,7 @@ void qemu_vga(void)
int ret = init_graph_vga(VGA_XRES, VGA_YRES, 1);
if (ret < 0)
{
- gdbg("ERROR: init_graph_vga returned %d\n",ret);
+ gerr("ERROR: init_graph_vga returned %d\n",ret);
}
memset(g_pscreen, g_bg_color, VGA_XRES * VGA_YRES);
diff --git a/arch/z16/src/common/up_assert.c b/arch/z16/src/common/up_assert.c
index fbd73d2579cef3bf5eeeda8daa3ca1ceb214424d..1ef880a0416cb7a366706b46af67e6ba378221bb 100644
--- a/arch/z16/src/common/up_assert.c
+++ b/arch/z16/src/common/up_assert.c
@@ -1,7 +1,7 @@
/****************************************************************************
* common/up_assert.c
*
- * Copyright (C) 2008-2009, 2012-2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2008-2009, 2012-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -154,17 +143,17 @@ void up_assert(void)
#ifdef CONFIG_HAVE_FILENAME
#if CONFIG_TASK_NAME_SIZE > 0
- lldbg("Assertion failed at file:%s line: %d task: %s\n",
+ alert("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
- lldbg("Assertion failed at file:%s line: %d\n",
+ alert("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
#else
#if CONFIG_TASK_NAME_SIZE > 0
- lldbg("Assertion failed: task: %s\n", rtcb->name);
+ alert("Assertion failed: task: %s\n", rtcb->name);
#else
- lldbg("Assertion failed\n");
+ alert("Assertion failed\n");
#endif
#endif
diff --git a/arch/z16/src/common/up_blocktask.c b/arch/z16/src/common/up_blocktask.c
index e165e74a73097470c544b44ba8c65c4fca135f6a..584aec0ea83626f1eb633131d868e5f5013153fe 100644
--- a/arch/z16/src/common/up_blocktask.c
+++ b/arch/z16/src/common/up_blocktask.c
@@ -83,7 +83,7 @@ void up_block_task(FAR struct tcb_s *tcb, tstate_t task_state)
ASSERT((tcb->task_state >= FIRST_READY_TO_RUN_STATE) &&
(tcb->task_state <= LAST_READY_TO_RUN_STATE));
- /* dbg("Blocking TCB=%p\n", tcb); */
+ /* sinfo("Blocking TCB=%p\n", tcb); */
/* Remove the tcb task from the ready-to-run list. If we
* are blocking the task at the head of the task list (the
diff --git a/arch/z16/src/common/up_createstack.c b/arch/z16/src/common/up_createstack.c
index c4d55370408db9a4e2a28eecc525e73f4a868949..2c35e68aef8e40c9bf28c181542b4a2874e44220 100644
--- a/arch/z16/src/common/up_createstack.c
+++ b/arch/z16/src/common/up_createstack.c
@@ -120,12 +120,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Was the allocation successful? */
if (!tcb->stack_alloc_ptr)
{
- sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+ serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
}
#endif
}
diff --git a/arch/z16/src/common/up_exit.c b/arch/z16/src/common/up_exit.c
index 7c238b249971094274c686f1e5f60e1ea67bef42..df4d62c3818aa51636f41b3291f77c79870e56e3 100644
--- a/arch/z16/src/common/up_exit.c
+++ b/arch/z16/src/common/up_exit.c
@@ -67,7 +67,7 @@
*
****************************************************************************/
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
{
#if CONFIG_NFILE_DESCRIPTORS > 0
@@ -78,8 +78,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
int i;
#endif
- lldbg(" TCB=%p name=%s\n", tcb, tcb->argv[0]);
- lldbg(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+ sllinfo(" TCB=%p name=%s\n", tcb, tcb->argv[0]);
+ sllinfo(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
#if CONFIG_NFILE_DESCRIPTORS > 0
filelist = tcb->group->tg_filelist;
@@ -88,8 +88,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
struct inode *inode = filelist->fl_files[i].f_inode;
if (inode)
{
- lldbg(" fd=%d refcount=%d\n",
- i, inode->i_crefs);
+ sllinfo(" fd=%d refcount=%d\n",
+ i, inode->i_crefs);
}
}
#endif
@@ -102,11 +102,11 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
if (filep->fs_fd >= 0)
{
#if CONFIG_STDIO_BUFFER_SIZE > 0
- lldbg(" fd=%d nbytes=%d\n",
- filep->fs_fd,
- filep->fs_bufpos - filep->fs_bufstart);
+ sllinfo(" fd=%d nbytes=%d\n",
+ filep->fs_fd,
+ filep->fs_bufpos - filep->fs_bufstart);
#else
- lldbg(" fd=%d\n", filep->fs_fd);
+ sllinfo(" fd=%d\n", filep->fs_fd);
#endif
}
}
@@ -139,10 +139,10 @@ void _exit(int status)
(void)up_irq_save();
- slldbg("TCB=%p exiting\n", tcb);
+ sllinfo("TCB=%p exiting\n", tcb);
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
- lldbg("Other tasks:\n");
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
+ sllinfo("Other tasks:\n");
sched_foreach(_up_dumponexit, NULL);
#endif
@@ -155,7 +155,7 @@ void _exit(int status)
*/
tcb = this_task();
- slldbg("New Active Task TCB=%p\n", tcb);
+ sllinfo("New Active Task TCB=%p\n", tcb);
/* Then switch contexts */
diff --git a/arch/z16/src/common/up_initialize.c b/arch/z16/src/common/up_initialize.c
index 50b287d08a69f0d0afd5d32c32b1a2ffa9c2f025..a832942f194f20f03d089eaa73d72f3db0f0bfc1 100644
--- a/arch/z16/src/common/up_initialize.c
+++ b/arch/z16/src/common/up_initialize.c
@@ -82,18 +82,18 @@ volatile FAR chipreg_t *g_current_regs;
*
****************************************************************************/
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
static void up_calibratedelay(void)
{
int i;
- lldbg("Beginning 100s delay\n");
+ llwarn("Beginning 100s delay\n");
for (i = 0; i < 100; i++)
{
up_mdelay(1000);
}
- lldbg("End 100s delay\n");
+ llwarn("End 100s delay\n");
}
#else
# define up_calibratedelay()
diff --git a/arch/z16/src/common/up_registerdump.c b/arch/z16/src/common/up_registerdump.c
index a4047d56f0171a4109300f4b461bc1d8c6de16a5..f167926a52b59bd752a397aeedbc0fbed329b2e1 100644
--- a/arch/z16/src/common/up_registerdump.c
+++ b/arch/z16/src/common/up_registerdump.c
@@ -1,7 +1,7 @@
/****************************************************************************
* common/up_registerdump.c
*
- * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2008-2009, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if
- * debug is not selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
@@ -60,14 +49,6 @@
#ifdef CONFIG_ARCH_STACKDUMP
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -78,16 +59,19 @@
static void up_registerdump(void)
{
+#ifdef CONFIG_DEBUG_INFO
FAR uint32_t *regs32 = (FAR uint32_t*)g_current_regs;
- lldbg("R0 :%08x R1 :%08x R2 :%08x R3 :%08x "
+
+ alert("R0 :%08x R1 :%08x R2 :%08x R3 :%08x "
"R4 :%08x R5 :%08x R6 :%08x R7 :%08x\n"
regs32[REG_R0/2], regs32[REG_R1/2], regs32[REG_R2/2], regs32[REG_R3/2],
regs32[REG_R4/2], regs32[REG_R5/2], regs32[REG_R6/2], regs32[REG_R7/2]);
- lldbg("R8 :%08x R9 :%08x R10:%08x R11:%08x R12:%08x R13:%08x\n"
+ alert("R8 :%08x R9 :%08x R10:%08x R11:%08x R12:%08x R13:%08x\n"
regs32[REG_R8/2], regs32[REG_R9/2], regs32[REG_R10/2], regs3[REG_R11/2],
regs32[REG_R12/2], regs32[REG_R13/2]);
- lldbg("FP :%08x SP :%08x FLG:%04x\n"
+ alert("FP :%08x SP :%08x FLG:%04x\n"
regs32[REG_R14/2], regs32[REG_R15/2], g_current_regs[REG_FLAGS]);
+#endif
}
#endif /* CONFIG_ARCH_STACKDUMP */
diff --git a/arch/z16/src/common/up_releasepending.c b/arch/z16/src/common/up_releasepending.c
index 2d0e09b5ac30f97d6945fa467e66514db74f4dae..ff6d24f4fb0bd0cba9ecdfbd160c5f934a88c523 100644
--- a/arch/z16/src/common/up_releasepending.c
+++ b/arch/z16/src/common/up_releasepending.c
@@ -68,7 +68,7 @@ void up_release_pending(void)
{
FAR struct tcb_s *rtcb = this_task();
- slldbg("From TCB=%p\n", rtcb);
+ sllinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
diff --git a/arch/z16/src/common/up_reprioritizertr.c b/arch/z16/src/common/up_reprioritizertr.c
index 4872db37f2634ce6db9a3dcbe10880e9c96a5fbb..8af6cc003b96eb55e0326561222ceacd05334d25 100644
--- a/arch/z16/src/common/up_reprioritizertr.c
+++ b/arch/z16/src/common/up_reprioritizertr.c
@@ -96,7 +96,7 @@ void up_reprioritize_rtr(FAR struct tcb_s *tcb, uint8_t priority)
FAR struct tcb_s *rtcb = this_task();
bool switch_needed;
- slldbg("TCB=%p PRI=%d\n", tcb, priority);
+ sllinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
diff --git a/arch/z16/src/common/up_schedulesigaction.c b/arch/z16/src/common/up_schedulesigaction.c
index 0592b883352a9a13d4f1bdf45f211175aab48e72..557dcdf5f478a2a6691c7b0d4540f55a28d59073 100644
--- a/arch/z16/src/common/up_schedulesigaction.c
+++ b/arch/z16/src/common/up_schedulesigaction.c
@@ -92,7 +92,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- dbg("tcb=0x%p sigdeliver=0x%06x\n", tcb, (uint32_t)sigdeliver);
+ sinfo("tcb=0x%p sigdeliver=0x%06x\n", tcb, (uint32_t)sigdeliver);
/* Make sure that interrupts are disabled */
@@ -106,7 +106,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
* being delivered to the currently executing task.
*/
- dbg("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
+ sinfo("rtcb=0x%p g_current_regs=0x%p\n", this_task(), g_current_regs);
if (tcb == this_task())
{
diff --git a/arch/z16/src/common/up_sigdeliver.c b/arch/z16/src/common/up_sigdeliver.c
index 9861f0096e0208d2775dac3149e231d226dc1071..7860f1d1de4eb408f956f5f9fad12fab4c37b336 100644
--- a/arch/z16/src/common/up_sigdeliver.c
+++ b/arch/z16/src/common/up_sigdeliver.c
@@ -84,7 +84,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -119,7 +119,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/z16/src/common/up_stackdump.c b/arch/z16/src/common/up_stackdump.c
index f6d9e41236da561befedd4ee55b304605f43200c..4b439b8d8753b0478eef2d9cc829523714c6644e 100644
--- a/arch/z16/src/common/up_stackdump.c
+++ b/arch/z16/src/common/up_stackdump.c
@@ -1,7 +1,7 @@
/****************************************************************************
* common/up_stackdump.c
*
- * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2008-2009, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
#include
-/* Output debug info -- even if debug is not selected. */
-
-#undef CONFIG_DEBUG
-#undef CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
#include
#include "chip/chip.h"
@@ -74,13 +67,13 @@ static void up_stackdump(void)
chipreg_t stack_base = (chipreg_t)rtcb->adj_stack_ptr;
chipreg_t stack_size = (chipreg_t)rtcb->adj_stack_size;
- lldbg("stack_base: %08x\n", stack_base);
- lldbg("stack_size: %08x\n", stack_size);
- lldbg("sp: %08x\n", sp);
+ alert("stack_base: %08x\n", stack_base);
+ alert("stack_size: %08x\n", stack_size);
+ alert("sp: %08x\n", sp);
if (sp >= stack_base || sp < stack_base - stack_size)
{
- lldbg("ERROR: Stack pointer is not within allocated stack\n");
+ llerr("ERROR: Stack pointer is not within allocated stack\n");
return;
}
else
@@ -90,9 +83,9 @@ static void up_stackdump(void)
for (stack = sp & ~0x0f; stack < stack_base; stack += 8*sizeof(chipreg_t))
{
chipreg_t *ptr = (chipreg_t*)stack;
- lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
- stack, ptr[0], ptr[1], ptr[2], ptr[3],
- ptr[4], ptr[5], ptr[6], ptr[7]);
+ alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+ stack, ptr[0], ptr[1], ptr[2], ptr[3],
+ ptr[4], ptr[5], ptr[6], ptr[7]);
}
}
}
diff --git a/arch/z16/src/common/up_unblocktask.c b/arch/z16/src/common/up_unblocktask.c
index 96eb7675ac550bcb3a69bbd1cd3d3614ac2b62d0..8fe8beccfa82e384e9e72509b6706cf3c3c80085 100644
--- a/arch/z16/src/common/up_unblocktask.c
+++ b/arch/z16/src/common/up_unblocktask.c
@@ -79,7 +79,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
ASSERT((tcb->task_state >= FIRST_BLOCKED_STATE) &&
(tcb->task_state <= LAST_BLOCKED_STATE));
- /* dbg("Unblocking TCB=%p\n", tcb); */
+ /* sinfo("Unblocking TCB=%p\n", tcb); */
/* Remove the task from the blocked task list */
diff --git a/arch/z16/src/z16f/Kconfig b/arch/z16/src/z16f/Kconfig
index 8861726aee32ab65025216d389b175e0f96d1dfb..56067cae663f9ee0e71481a35bdc8bebb54bbf0d 100644
--- a/arch/z16/src/z16f/Kconfig
+++ b/arch/z16/src/z16f/Kconfig
@@ -33,7 +33,7 @@ menu "Z16F ESPI Configuration"
config Z16F_ESPI_REGDEBUG
bool "ESPI register-level debug"
default n
- depends on DEBUG
+ depends on DEBUG_FEATURES
endmenu # Z16F ESPI Configuration
endif # ARCH_CHIP_Z16F
diff --git a/arch/z16/src/z16f/z16f_clkinit.c b/arch/z16/src/z16f/z16f_clkinit.c
index 15371646bc5e2d9060c0096bf5affef9465e751d..883a5d840762714fb6664ab74bc4fca272eb300b 100644
--- a/arch/z16/src/z16f/z16f_clkinit.c
+++ b/arch/z16/src/z16f/z16f_clkinit.c
@@ -59,7 +59,7 @@ extern _Erom unsigned long SYS_CLK_FREQ;
* Private Functions
****************************************************************************/
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/****************************************************************************
* System clock initialization--DEBUG. Code Using Frequency Input from
* ZDS IDE.
@@ -206,7 +206,7 @@ static void z16f_sysclkinit(int clockid, uint32_t frequency)
for (count = 0; count < 10000; count++);
}
-#else /* CONFIG_DEBUG */
+#else /* CONFIG_DEBUG_FEATURES */
/****************************************************************************
* System Clock Initialization Recommended for Release Code
*
@@ -247,7 +247,7 @@ static void z16f_sysclkinit(int clockid, uint32_t frequency)
putreg8(0xe0 | 1, Z16F_OSC_CTL); /* Use the external osc/clock as system clock */
}
}
-#endif /* CONFIG_DEBUG */
+#endif /* CONFIG_DEBUG_FEATURES */
/****************************************************************************
* Public Functions
diff --git a/arch/z16/src/z16f/z16f_espi.c b/arch/z16/src/z16f/z16f_espi.c
index 869cbb79cbbcf52434b9b0ad54585a4b92e809dd..354974e58078953b8269a8ce1a7e1f1f86ac71f8 100644
--- a/arch/z16/src/z16f/z16f_espi.c
+++ b/arch/z16/src/z16f/z16f_espi.c
@@ -59,26 +59,16 @@
* Pre-processor Definitions
****************************************************************************/
/* Debug *******************************************************************/
-/* Check if SPI debug is enabled (non-standard.. no support in
- * include/debug.h
- */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# undef CONFIG_DEBUG_SPI
-# undef CONFIG_Z16F_ESPI_REGDEBUG
-#endif
+/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg (void)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define spidbg (void)
-# define spivdbg (void)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
/****************************************************************************
@@ -127,7 +117,7 @@ static void spi_putreg16(FAR struct z16f_spi_s *priv, uint16_t regval,
# define spi_putreg16(priv,regval,regaddr) putreg16(regval, regaddr)
#endif
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void spi_dumpregs(FAR struct z16f_spi_s *priv, const char *msg);
#else
# define spi_dumpregs(priv,msg)
@@ -231,7 +221,7 @@ static bool spi_checkreg(FAR struct z16f_spi_s *priv, bool wr, uint16_t regval,
{
/* Yes... show how many times we did it */
- lldbg("...[Repeats %d times]...\n", priv->ntimes);
+ syslog(LOG_INFO, "...[Repeats %d times]...\n", priv->ntimes);
}
/* Save information about the new access */
@@ -263,7 +253,7 @@ static uint8_t spi_getreg8(FAR struct z16f_spi_s *priv, uintptr_t regaddr)
if (spi_checkreg(priv, false, (uint16_t)regval, regaddr))
{
- lldbg("%06x->%02x\n", regaddr, regval);
+ syslog(LOG_INFO, "%06x->%02x\n", regaddr, regval);
}
return regval;
@@ -284,7 +274,7 @@ static void spi_putreg8(FAR struct z16f_spi_s *priv, uint8_t regval,
{
if (spi_checkreg(priv, true, (uint16_t)regval, regaddr))
{
- lldbg("%06x<-%02x\n", regaddr, regval);
+ syslog(LOG_INFO, "%06x<-%02x\n", regaddr, regval);
}
putreg8(regval, regaddr);
@@ -305,7 +295,7 @@ static void spi_putreg16(FAR struct z16f_spi_s *priv, uint16_t regval,
{
if (spi_checkreg(priv, true, regval, regaddr))
{
- lldbg("%06x<-%04x\n", regaddr, regval);
+ syslog(LOG_INFO, "%06x<-%04x\n", regaddr, regval);
}
putreg8(regval, regaddr);
@@ -327,14 +317,14 @@ static void spi_putreg16(FAR struct z16f_spi_s *priv, uint16_t regval,
*
****************************************************************************/
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
+#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
static void spi_dumpregs(FAR struct z16f_spi_s *priv, FAR const char *msg)
{
- spivdbg("%s:\n", msg);
- spivdbg(" DCR: %02x CTL: %02x MODE: %02x STAT: %02x\n",
+ spiinfo("%s:\n", msg);
+ spiinfo(" DCR: %02x CTL: %02x MODE: %02x STAT: %02x\n",
getreg8(Z16F_ESPI_DCR), getreg8(Z16F_ESPI_CTL),
getreg8(Z16F_ESPI_MODE), getreg8(Z16F_ESPI_STAT));
- spivdbg(" STATE: %02x BR: %02x %02x\n",
+ spiinfo(" STATE: %02x BR: %02x %02x\n",
getreg8(Z16F_ESPI_STATE), getreg8(Z16F_ESPI_BRH),
getreg8(Z16F_ESPI_BRL));
}
@@ -395,7 +385,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct z16f_spi_s *priv = (FAR struct z16f_spi_s *)dev;
- spivdbg("lock=%d\n", lock);
+ spiinfo("lock=%d\n", lock);
if (lock)
{
/* Take the semaphore (perhaps waiting) */
@@ -438,7 +428,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
uint32_t actual;
uint32_t brg;
- spivdbg("frequency=%d\n", frequency);
+ spiinfo("frequency=%d\n", frequency);
/* Check if the requested frequency is the same as the frequency selection */
@@ -469,14 +459,14 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
/* Calculate the new actual frequency */
actual = (BOARD_SYSTEM_FREQUENCY >> 1) / brg;
- spivdbg("BR=%04x actual=%ld\n", (unsigned int)brg, (long)actual);
+ spiinfo("BR=%04x actual=%ld\n", (unsigned int)brg, (long)actual);
/* Save the frequency setting */
priv->frequency = frequency;
priv->actual = actual;
- spidbg("Frequency %d->%d\n", frequency, actual);
+ spiinfo("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -500,7 +490,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
FAR struct z16f_spi_s *priv = (FAR struct z16f_spi_s *)dev;
uint8_t regval;
- spivdbg("mode=%d\n", mode);
+ spiinfo("mode=%d\n", mode);
/* Has the mode changed? */
@@ -542,7 +532,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
}
spi_putreg8(priv, regval, Z16F_ESPI_CTL);
- spivdbg("ESPI CTL: %02x\n", regval);
+ spiinfo("ESPI CTL: %02x\n", regval);
/* Save the mode so that subsequent re-configurations will be faster */
@@ -570,7 +560,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
FAR struct z16f_spi_s *priv = (FAR struct z16f_spi_s *)dev;
uint8_t regval;
- spivdbg("nbits=%d\n", nbits);
+ spiinfo("nbits=%d\n", nbits);
DEBUGASSERT(priv && nbits > 0 && nbits <= 8);
/* Has the number of bits changed? */
@@ -590,7 +580,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
}
spi_putreg8(priv, regval, Z16F_ESPI_MODE);
- spivdbg("ESPI MODE: %02x\n", regval);
+ spiinfo("ESPI MODE: %02x\n", regval);
/* Save the selection so the subsequence re-configurations will be faster */
@@ -628,7 +618,7 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd)
rxbyte = (uint8_t)0;
spi_exchange(dev, &txbyte, &rxbyte, 1);
- spivdbg("Sent %02x received %02x\n", txbyte, rxbyte);
+ spiinfo("Sent %02x received %02x\n", txbyte, rxbyte);
return (uint16_t)rxbyte;
}
@@ -661,7 +651,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
FAR uint8_t *rxptr = rxbuffer;
FAR const uint8_t *txptr = txbuffer;
- spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
+ spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
/* Make sure that any previous transfer is flushed from the hardware */
@@ -823,7 +813,7 @@ FAR struct spi_dev_s *z16_spibus_initialize(int port)
irqstate_t flags;
uint8_t regval;
- spivdbg("port: %d\n", port);
+ spiinfo("port: %d\n", port);
DEBUGASSERT(port == 0);
/* Check if we have already initialized the ESPI */
diff --git a/arch/z80/src/common/up_assert.c b/arch/z80/src/common/up_assert.c
index 78e114d35d9e476ca8bf9cfc488e11c03e357817..ea1dd0c5d76f82e376c754aa1d48c794348d813e 100644
--- a/arch/z80/src/common/up_assert.c
+++ b/arch/z80/src/common/up_assert.c
@@ -1,7 +1,7 @@
/****************************************************************************
* common/up_assert.c
*
- * Copyright (C) 2007-2009, 2012-2015 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2007-2009, 2012-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,17 +39,6 @@
#include
-/* Output debug info if stack dump is selected -- even if debug is not
- * selected.
- */
-
-#ifdef CONFIG_ARCH_STACKDUMP
-# undef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
-# define CONFIG_DEBUG 1
-# define CONFIG_DEBUG_VERBOSE 1
-#endif
-
#include
#include
#include
@@ -75,10 +64,6 @@
# undef CONFIG_ARCH_USBDUMP
#endif
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -157,17 +142,17 @@ void up_assert(void)
#ifdef CONFIG_HAVE_FILENAME
#if CONFIG_TASK_NAME_SIZE > 0
- lldbg("Assertion failed at file:%s line: %d task: %s\n",
+ alert("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
- lldbg("Assertion failed at file:%s line: %d\n",
+ alert("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
#else
#if CONFIG_TASK_NAME_SIZE > 0
- lldbg("Assertion failed: task: %s\n", rtcb->name);
+ alert("Assertion failed: task: %s\n", rtcb->name);
#else
- lldbg("Assertion failed\n");
+ alert("Assertion failed\n");
#endif
#endif
diff --git a/arch/z80/src/common/up_blocktask.c b/arch/z80/src/common/up_blocktask.c
index 831de41317d39ce12bd7e3a29c0c268fc0045397..3ce49030aff20edf450a5f925b9166cf6dd85a08 100644
--- a/arch/z80/src/common/up_blocktask.c
+++ b/arch/z80/src/common/up_blocktask.c
@@ -85,7 +85,7 @@ void up_block_task(FAR struct tcb_s *tcb, tstate_t task_state)
ASSERT((tcb->task_state >= FIRST_READY_TO_RUN_STATE) &&
(tcb->task_state <= LAST_READY_TO_RUN_STATE));
- /* dbg("Blocking TCB=%p\n", tcb); */
+ /* info("Blocking TCB=%p\n", tcb); */
/* Remove the tcb task from the ready-to-run list. If we
* are blocking the task at the head of the task list (the
diff --git a/arch/z80/src/common/up_createstack.c b/arch/z80/src/common/up_createstack.c
index 60c4733d99e232d2f91f07d594591530975f15ae..a0a2bc2507d029d3a0fd996d2736c10e2b466171 100644
--- a/arch/z80/src/common/up_createstack.c
+++ b/arch/z80/src/common/up_createstack.c
@@ -137,12 +137,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size);
}
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Was the allocation successful? */
if (!tcb->stack_alloc_ptr)
{
- sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
+ serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
}
#endif
}
diff --git a/arch/z80/src/common/up_exit.c b/arch/z80/src/common/up_exit.c
index 82f647c18c99aaea4edb441214eeb43e328dd805..ac534d72223257628c821a29e48ca10a6dc8dad2 100644
--- a/arch/z80/src/common/up_exit.c
+++ b/arch/z80/src/common/up_exit.c
@@ -77,7 +77,7 @@
*
****************************************************************************/
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
{
#if CONFIG_NFILE_DESCRIPTORS > 0
@@ -88,8 +88,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
int i;
#endif
- lldbg(" TCB=%p name=%s\n", tcb, tcb->argv[0]);
- lldbg(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
+ llinfo(" TCB=%p name=%s\n", tcb, tcb->argv[0]);
+ llinfo(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
#if CONFIG_NFILE_DESCRIPTORS > 0
filelist = tcb->group->tg_filelist;
@@ -98,8 +98,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
struct inode *inode = filelist->fl_files[i].f_inode;
if (inode)
{
- lldbg(" fd=%d refcount=%d\n",
- i, inode->i_crefs);
+ llinfo(" fd=%d refcount=%d\n",
+ i, inode->i_crefs);
}
}
#endif
@@ -112,11 +112,11 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
if (filep->fs_fd >= 0)
{
#if CONFIG_STDIO_BUFFER_SIZE > 0
- lldbg(" fd=%d nbytes=%d\n",
- filep->fs_fd,
- filep->fs_bufpos - filep->fs_bufstart);
+ llinfo(" fd=%d nbytes=%d\n",
+ filep->fs_fd,
+ filep->fs_bufpos - filep->fs_bufstart);
#else
- lldbg(" fd=%d\n", filep->fs_fd);
+ llinfo(" fd=%d\n", filep->fs_fd);
#endif
}
}
@@ -149,10 +149,10 @@ void _exit(int status)
(void)up_irq_save();
- slldbg("TCB=%p exiting\n", tcb);
+ sllinfo("TCB=%p exiting\n", tcb);
-#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
- lldbg("Other tasks:\n");
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
+ llinfo("Other tasks:\n");
sched_foreach(_up_dumponexit, NULL);
#endif
@@ -165,7 +165,7 @@ void _exit(int status)
*/
tcb = this_task();
- slldbg("New Active Task TCB=%p\n", tcb);
+ sllinfo("New Active Task TCB=%p\n", tcb);
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously running
diff --git a/arch/z80/src/common/up_initialize.c b/arch/z80/src/common/up_initialize.c
index 218a78232663302543378c313a897da7d681c701..f631238c4631c348f197566c80803406054a1d0e 100644
--- a/arch/z80/src/common/up_initialize.c
+++ b/arch/z80/src/common/up_initialize.c
@@ -70,18 +70,18 @@
*
****************************************************************************/
-#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG)
+#if defined(CONFIG_ARCH_CALIBRATION) && defined(CONFIG_DEBUG_FEATURES)
static void up_calibratedelay(void)
{
int i;
- lldbg("Beginning 100s delay\n");
+ llwarn("Beginning 100s delay\n");
for (i = 0; i < 100; i++)
{
up_mdelay(1000);
}
- lldbg("End 100s delay\n");
+ llwarn("End 100s delay\n");
}
#else
# define up_calibratedelay()
diff --git a/arch/z80/src/common/up_releasepending.c b/arch/z80/src/common/up_releasepending.c
index e4bc07a78fb7d9522f3ed8387d5dcce3324c67ef..bf824018ccff44d0ed8669783d69cab5c7d15801 100644
--- a/arch/z80/src/common/up_releasepending.c
+++ b/arch/z80/src/common/up_releasepending.c
@@ -70,7 +70,7 @@ void up_release_pending(void)
{
FAR struct tcb_s *rtcb = this_task();
- slldbg("From TCB=%p\n", rtcb);
+ sllinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
diff --git a/arch/z80/src/common/up_reprioritizertr.c b/arch/z80/src/common/up_reprioritizertr.c
index d7102775631a35b569c4e6550ec0855a759c981c..4e3a74157dc0815e2af00f1a01f015ad77a89229 100644
--- a/arch/z80/src/common/up_reprioritizertr.c
+++ b/arch/z80/src/common/up_reprioritizertr.c
@@ -98,7 +98,7 @@ void up_reprioritize_rtr(FAR struct tcb_s *tcb, uint8_t priority)
FAR struct tcb_s *rtcb = this_task();
bool switch_needed;
- slldbg("TCB=%p PRI=%d\n", tcb, priority);
+ sllinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
diff --git a/arch/z80/src/common/up_stackdump.c b/arch/z80/src/common/up_stackdump.c
index 32a3fc68302cad1f05cde59fb9c2ba9bd41f8b9a..0e4e4ea9c4d4b19ad217112c8655c980e727f60a 100644
--- a/arch/z80/src/common/up_stackdump.c
+++ b/arch/z80/src/common/up_stackdump.c
@@ -1,7 +1,7 @@
/****************************************************************************
* common/up_stackdump.c
*
- * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2007-2009, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
#include
-/* Output debug info -- even if debug is not selected. */
-
-#undef CONFIG_DEBUG
-#undef CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
#include
#include
@@ -55,14 +48,6 @@
#ifdef CONFIG_ARCH_STACKDUMP
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -83,13 +68,13 @@ static void up_stackdump(void)
uint16_t stack_base = (uint16_t)rtcb->adj_stack_ptr;
uint16_t stack_size = (uint16_t)rtcb->adj_stack_size;
- lldbg("stack_base: %04x\n", stack_base);
- lldbg("stack_size: %04x\n", stack_size);
- lldbg("sp: %04x\n", sp);
+ alert("stack_base: %04x\n", stack_base);
+ alert("stack_size: %04x\n", stack_size);
+ alert("sp: %04x\n", sp);
if (sp >= stack_base || sp < stack_base - stack_size)
{
- lldbg("ERROR: Stack pointer is not within allocated stack\n");
+ alert("ERROR: Stack pointer is not within allocated stack\n");
return;
}
else
@@ -99,9 +84,9 @@ static void up_stackdump(void)
for (stack = sp & ~0x0f; stack < stack_base; stack += 8*sizeof(uint16_t))
{
uint16_t *ptr = (uint16_t*)stack;
- lldbg("%04x: %04x %04x %04x %04x %04x %04x %04x %04x\n",
- stack, ptr[0], ptr[1], ptr[2], ptr[3],
- ptr[4], ptr[5], ptr[6], ptr[7]);
+ alert("%04x: %04x %04x %04x %04x %04x %04x %04x %04x\n",
+ stack, ptr[0], ptr[1], ptr[2], ptr[3],
+ ptr[4], ptr[5], ptr[6], ptr[7]);
}
}
}
diff --git a/arch/z80/src/common/up_stackframe.c b/arch/z80/src/common/up_stackframe.c
index 9da978a4f7d41b2a4598310012b25233012b849c..8f4a0f180623672827930602707ca523647bce2a 100644
--- a/arch/z80/src/common/up_stackframe.c
+++ b/arch/z80/src/common/up_stackframe.c
@@ -63,14 +63,6 @@
#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK)
#define STACK_ALIGN_UP(a) (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK)
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/arch/z80/src/common/up_unblocktask.c b/arch/z80/src/common/up_unblocktask.c
index f110172052b5c3043cfd696e7e5749f29864fcde..123881386e1d7d749874271993e8bdf406d8d46f 100644
--- a/arch/z80/src/common/up_unblocktask.c
+++ b/arch/z80/src/common/up_unblocktask.c
@@ -81,7 +81,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
ASSERT((tcb->task_state >= FIRST_BLOCKED_STATE) &&
(tcb->task_state <= LAST_BLOCKED_STATE));
- /* dbg("Unblocking TCB=%p\n", tcb); */
+ /* info("Unblocking TCB=%p\n", tcb); */
/* Remove the task from the blocked task list */
diff --git a/arch/z80/src/ez80/ez80_emac.c b/arch/z80/src/ez80/ez80_emac.c
index 0584aa0464d6bbe62017d3145f48379cb7d42d01..0080cb388d44a077b1d0720275794c26c9b0a652 100644
--- a/arch/z80/src/ez80/ez80_emac.c
+++ b/arch/z80/src/ez80/ez80_emac.c
@@ -244,7 +244,7 @@
/* EMAC statistics (debug only) */
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_NET)
struct ez80mac_statistics_s
{
uint32_t rx_int; /* Number of Rx interrupts received */
@@ -321,7 +321,7 @@ struct ez80emac_driver_s
WDOG_ID txpoll; /* TX poll timer */
WDOG_ID txtimeout; /* TX timeout timer */
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_NET)
struct ez80mac_statistics_s stat;
#endif
@@ -574,11 +574,11 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
/* Verify that the detect PHY is an AMD Am87c874 as expected */
-#ifdef CONFIG_DEBUG /* Parameter checking only done when DEBUG is enabled */
+#ifdef CONFIG_DEBUG_FEATURES /* Parameter checking only done when DEBUG is enabled */
phyval = ez80emac_miiread(priv, MII_PHYID1);
if (phyval != MII_PHYID1_AM79C874)
{
- ndbg("Not an Am79c874 PHY: PHY1=%04x vs %04x\n", phyval, MII_PHYID1_AM79C874);
+ nerr("ERROR: Not an Am79c874 PHY: PHY1=%04x vs %04x\n", phyval, MII_PHYID1_AM79C874);
ret = -ENODEV;
goto dumpregs;
}
@@ -586,7 +586,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
phyval = ez80emac_miiread(priv, MII_PHYID2);
if (phyval != MII_PHYID2_AM79C874)
{
- ndbg("Not an Am79c874 PHY: PHY2=%04x vs %04x\n", phyval, MII_PHYID2_AM79C874);
+ nerr("ERROR: Not an Am79c874 PHY: PHY2=%04x vs %04x\n", phyval, MII_PHYID2_AM79C874);
ret = -ENODEV;
goto dumpregs;
}
@@ -618,7 +618,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
#if CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_AUTONEG
- ndbg("Configure autonegotiation\n");
+ ninfo("Configure autonegotiation\n");
if (bauto)
{
ez80emac_miiwrite(priv, MII_ADVERTISE,
@@ -628,12 +628,12 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
}
else
{
- ndbg("Am79c784 is not capable of autonegotiation\n");
+ nerr("ERROR: Am79c784 is not capable of autonegotiation\n");
}
#elif CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_100BFD
- ndbg("100BASETX full duplex\n");
+ ninfo("100BASETX full duplex\n");
phyval |= MII_MCR_SPEED100 | MII_MCR_FULLDPLX;
ez80emac_miiwrite(priv, MII_ADVERTISE,
MII_ADVERTISE_100BASETXFULL|MII_ADVERTISE_100BASETXHALF|
@@ -642,7 +642,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
#elif CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_100BHD
- ndbg("100BASETX half duplex\n");
+ ninfo("100BASETX half duplex\n");
phyval |= MII_MCR_SPEED100;
ez80emac_miiwrite(priv, MII_ADVERTISE,
MII_ADVERTISE_100BASETXHALF|MII_ADVERTISE_10BASETXFULL|
@@ -650,14 +650,14 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
#elif CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_10BFD
- ndbg("10BASETX full duplex\n");
+ ninfo("10BASETX full duplex\n");
phyval |= MII_MCR_FULLDPLX;
ez80emac_miiwrite(priv, MII_ADVERTISE,
MII_ADVERTISE_10BASETXFULL|MII_ADVERTISE_10BASETXHALF|MII_ADVERTISE_CSMA);
#elif CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_10BHD
- ndbg("10BASETX half duplex\n");
+ ninfo("10BASETX half duplex\n");
ez80emac_miiwrite(priv, MII_ADVERTISE,
MII_ADVERTISE_10BASETXHALF|MII_ADVERTISE_CSMA);
@@ -681,7 +681,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
if ((phyval & MII_MSR_LINKSTATUS) == 0)
{
- ndbg("Failed to establish link\n");
+ nerr("ERROR: Failed to establish link\n");
ret = -ETIMEDOUT;
}
else
@@ -700,16 +700,16 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
}
dumpregs:
- nvdbg("Am79c874 MII registers (FIAD=%lx)\n", CONFIG_EZ80_FIAD);
- nvdbg(" MII_MCR: %04x\n", ez80emac_miiread(priv, MII_MCR));
- nvdbg(" MII_MSR: %04x\n", ez80emac_miiread(priv, MII_MSR));
- nvdbg(" MII_PHYID1: %04x\n", ez80emac_miiread(priv, MII_PHYID1));
- nvdbg(" MII_PHYID2: %04x\n", ez80emac_miiread(priv, MII_PHYID2));
- nvdbg(" MII_ADVERTISE: %04x\n", ez80emac_miiread(priv, MII_ADVERTISE));
- nvdbg(" MII_LPA: %04x\n", ez80emac_miiread(priv, MII_LPA));
- nvdbg(" MII_EXPANSION: %04x\n", ez80emac_miiread(priv, MII_EXPANSION));
- nvdbg(" MII_DIAGNOSTICS: %04x\n", ez80emac_miiread(priv, MII_AM79C874_DIAGNOSTIC));
- nvdbg("EMAC CFG1: %02x\n", inp(EZ80_EMAC_CFG1));
+ ninfo("Am79c874 MII registers (FIAD=%lx)\n", CONFIG_EZ80_FIAD);
+ ninfo(" MII_MCR: %04x\n", ez80emac_miiread(priv, MII_MCR));
+ ninfo(" MII_MSR: %04x\n", ez80emac_miiread(priv, MII_MSR));
+ ninfo(" MII_PHYID1: %04x\n", ez80emac_miiread(priv, MII_PHYID1));
+ ninfo(" MII_PHYID2: %04x\n", ez80emac_miiread(priv, MII_PHYID2));
+ ninfo(" MII_ADVERTISE: %04x\n", ez80emac_miiread(priv, MII_ADVERTISE));
+ ninfo(" MII_LPA: %04x\n", ez80emac_miiread(priv, MII_LPA));
+ ninfo(" MII_EXPANSION: %04x\n", ez80emac_miiread(priv, MII_EXPANSION));
+ ninfo(" MII_DIAGNOSTICS: %04x\n", ez80emac_miiread(priv, MII_AM79C874_DIAGNOSTIC));
+ ninfo("EMAC CFG1: %02x\n", inp(EZ80_EMAC_CFG1));
return ret;
}
#else
@@ -731,21 +731,21 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
if (!ez80emac_miipoll(priv, MII_MCR, MII_MCR_ANRESTART, false))
{
- ndbg("Autonegotiation didn't start.\n");
+ nerr("ERROR: Autonegotiation didn't start.\n");
}
/* Wait for auto-negotiation to complete */
if (!ez80emac_miipoll(priv, MII_MSR, MII_MSR_ANEGCOMPLETE, true))
{
- ndbg("Autonegotiation didn't complete.\n");
+ nerr("ERROR: Autonegotiation didn't complete.\n");
}
/* Wait link */
if (!ez80emac_miipoll(priv, MII_MSR, MII_MSR_LINKSTATUS, true))
{
- ndbg("Link is down!\n");
+ nwarn("WARNING: Link is down!\n");
priv->blinkok = false;
}
else
@@ -763,7 +763,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
if ((advertise & MII_ADVERTISE_100BASETXFULL) && (lpa & MII_LPA_100BASETXFULL))
{
- ndbg("100BASETX full duplex\n");
+ ninfo("100BASETX full duplex\n");
regval = inp(EZ80_EMAC_CFG1);
regval |= EMAC_CFG1_FULLHD; /* Enable full duplex mode */
outp(EZ80_EMAC_CFG1, regval);
@@ -775,7 +775,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
else if ((advertise & MII_ADVERTISE_100BASETXHALF) && (lpa & MII_LPA_100BASETXHALF))
{
- ndbg("100BASETX half duplex\n");
+ ninfo("100BASETX half duplex\n");
regval = inp(EZ80_EMAC_CFG1);
regval &= ~EMAC_CFG1_FULLHD; /* Disable full duplex mode */
outp(EZ80_EMAC_CFG1, regval);
@@ -787,7 +787,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
else if ((advertise & MII_ADVERTISE_10BASETXFULL) && (lpa & MII_LPA_10BASETXFULL))
{
- ndbg("10BASETX full duplex\n");
+ ninfo("10BASETX full duplex\n");
regval = inp(EZ80_EMAC_CFG1);
regval |= EMAC_CFG1_FULLHD; /* Enable full duplex mode */
outp(EZ80_EMAC_CFG1, regval);
@@ -799,7 +799,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
else if ((advertise & MII_ADVERTISE_10BASETXHALF) && (lpa & MII_LPA_10BASETXHALF))
{
- ndbg("10BASETX half duplex\n");
+ ninfo("10BASETX half duplex\n");
regval = inp(EZ80_EMAC_CFG1);
regval &= ~EMAC_CFG1_FULLHD; /* Disable full duplex mode */
outp(EZ80_EMAC_CFG1, regval);
@@ -808,7 +808,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
}
else
{
- ndbg("No valid connection; force 10Mbps half-duplex.\n");
+ nwarn("WARNING: No valid connection; force 10Mbps half-duplex.\n");
regval = inp(EZ80_EMAC_CFG1);
regval &= ~EMAC_CFG1_FULLHD; /* Disable full duplex mode */
outp(EZ80_EMAC_CFG1, regval);
@@ -838,15 +838,15 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
mcr |= MII_MCR_ANENABLE;
ez80emac_miiwrite(priv, MII_MCR, mcr);
- nvdbg("MII registers (FIAD=%lx)\n", CONFIG_EZ80_FIAD);
- nvdbg(" MII_MCR: %04x\n", ez80emac_miiread(priv, MII_MCR));
- nvdbg(" MII_MSR: %04x\n", ez80emac_miiread(priv, MII_MSR));
- nvdbg(" MII_PHYID1: %04x\n", ez80emac_miiread(priv, MII_PHYID1));
- nvdbg(" MII_PHYID2: %04x\n", ez80emac_miiread(priv, MII_PHYID2));
- nvdbg(" MII_ADVERTISE: %04x\n", ez80emac_miiread(priv, MII_ADVERTISE));
- nvdbg(" MII_LPA: %04x\n", ez80emac_miiread(priv, MII_LPA));
- nvdbg(" MII_EXPANSION: %04x\n", ez80emac_miiread(priv, MII_EXPANSION));
- nvdbg("EMAC CFG1: %02x\n", inp(EZ80_EMAC_CFG11));
+ ninfo("MII registers (FIAD=%lx)\n", CONFIG_EZ80_FIAD);
+ ninfo(" MII_MCR: %04x\n", ez80emac_miiread(priv, MII_MCR));
+ ninfo(" MII_MSR: %04x\n", ez80emac_miiread(priv, MII_MSR));
+ ninfo(" MII_PHYID1: %04x\n", ez80emac_miiread(priv, MII_PHYID1));
+ ninfo(" MII_PHYID2: %04x\n", ez80emac_miiread(priv, MII_PHYID2));
+ ninfo(" MII_ADVERTISE: %04x\n", ez80emac_miiread(priv, MII_ADVERTISE));
+ ninfo(" MII_LPA: %04x\n", ez80emac_miiread(priv, MII_LPA));
+ ninfo(" MII_EXPANSION: %04x\n", ez80emac_miiread(priv, MII_EXPANSION));
+ ninfo("EMAC CFG1: %02x\n", inp(EZ80_EMAC_CFG11));
return OK;
}
#endif
@@ -960,7 +960,7 @@ static int ez80emac_transmit(struct ez80emac_driver_s *priv)
* handler and, therefore, may be suspended when debug output is generated!
*/
- nllvdbg("txnext=%p {%06x, %u, %04x} trp=%02x%02x\n",
+ nllinfo("txnext=%p {%06x, %u, %04x} trp=%02x%02x\n",
priv->txnext, priv->txnext->np, priv->txnext->pktsize, priv->txnext->stat,
inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
@@ -1039,9 +1039,9 @@ static int ez80emac_transmit(struct ez80emac_driver_s *priv)
outp(EZ80_EMAC_PTMR, EMAC_PTMR);
leave_critical_section(flags);
- nllvdbg("txdesc=%p {%06x, %u, %04x}\n",
+ nllinfo("txdesc=%p {%06x, %u, %04x}\n",
txdesc, txdesc->np, txdesc->pktsize, txdesc->stat);
- nllvdbg("txnext=%p {%06x, %u, %04x} trp=%02x%02x\n",
+ nllinfo("txnext=%p {%06x, %u, %04x} trp=%02x%02x\n",
txnext, txnext->np, txnext->pktsize, txnext->stat,
inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
@@ -1082,7 +1082,7 @@ static int ez80emac_txpoll(struct net_driver_s *dev)
* the field d_len is set to a value > 0.
*/
- nvdbg("Poll result: d_len=%d\n", priv->dev.d_len);
+ ninfo("Poll result: d_len=%d\n", priv->dev.d_len);
if (priv->dev.d_len > 0)
{
/* Look up the destination MAC address and add it to the Ethernet
@@ -1197,7 +1197,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
*/
rwp = ez80emac_rwp();
- nvdbg("rxnext=%p {%06x, %u, %04x} rrp=%06x rwp=%06x blkslft=%02x\n",
+ ninfo("rxnext=%p {%06x, %u, %04x} rrp=%06x rwp=%06x blkslft=%02x\n",
rxdesc, rxdesc->np, rxdesc->pktsize, rxdesc->stat,
ez80emac_rrp(), rwp,
inp(EZ80_EMAC_BLKSLFT_H), inp(EZ80_EMAC_BLKSLFT_L));
@@ -1222,7 +1222,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
if ((rxdesc->stat & EMAC_RXDESC_OK) == 0)
{
- nvdbg("Skipping bad RX pkt: %04x\n", rxdesc->stat);
+ ninfo("Skipping bad RX pkt: %04x\n", rxdesc->stat);
EMAC_STAT(priv, rx_errors);
EMAC_STAT(priv, rx_nok);
continue;
@@ -1234,7 +1234,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
if (rxdesc->pktsize > CONFIG_NET_ETH_MTU)
{
- nvdbg("Truncated oversize RX pkt: %d->%d\n", rxdesc->pktsize, CONFIG_NET_ETH_MTU);
+ ninfo("Truncated oversize RX pkt: %d->%d\n", rxdesc->pktsize, CONFIG_NET_ETH_MTU);
pktlen = CONFIG_NET_ETH_MTU;
}
else
@@ -1252,7 +1252,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
if ((FAR uint8_t*)(psrc + pktlen) > (FAR uint8_t*)priv->rxendp1)
{
int nbytes = (int)((FAR uint8_t*)priv->rxendp1 - (FAR uint8_t*)psrc);
- nvdbg("RX wraps after %d bytes\n", nbytes + SIZEOF_EMACSDESC);
+ ninfo("RX wraps after %d bytes\n", nbytes + SIZEOF_EMACSDESC);
memcpy(pdest, psrc, nbytes);
memcpy(&pdest[nbytes], priv->rxstart, pktlen - nbytes);
@@ -1288,7 +1288,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
outp(EZ80_EMAC_RRP_L, (uint8_t)((uint24_t)rxdesc & 0xff));
outp(EZ80_EMAC_RRP_H, (uint8_t)(((uint24_t)rxdesc >> 8) & 0xff));
- nvdbg("rxnext=%p {%06x, %u, %04x} rrp=%06x rwp=%06x blkslft=%02x\n",
+ ninfo("rxnext=%p {%06x, %u, %04x} rrp=%06x rwp=%06x blkslft=%02x\n",
rxdesc, rxdesc->np, rxdesc->pktsize, rxdesc->stat,
ez80emac_rrp(), rwp,
inp(EZ80_EMAC_BLKSLFT_H), inp(EZ80_EMAC_BLKSLFT_L));
@@ -1304,7 +1304,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
#ifdef CONFIG_NET_IPv4
if (ETHBUF->type == HTONS(ETHTYPE_IP))
{
- nllvdbg("IPv4 frame\n");
+ nllinfo("IPv4 frame\n");
/* Handle ARP on input then give the IPv4 packet to the network
* layer
@@ -1345,7 +1345,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
#ifdef CONFIG_NET_IPv6
if (ETHBUF->type == HTONS(ETHTYPE_IP6))
{
- nllvdbg("Iv6 frame\n");
+ nllinfo("Iv6 frame\n");
/* Give the IPv6 packet to the network layer */
@@ -1383,7 +1383,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
#ifdef CONFIG_NET_ARP
if (ETHBUF->type == htons(ETHTYPE_ARP))
{
- nvdbg("ARP packet received (%02x)\n", ETHBUF->type);
+ ninfo("ARP packet received (%02x)\n", ETHBUF->type);
EMAC_STAT(priv, rx_arp);
arp_arpin(&priv->dev);
@@ -1400,7 +1400,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
else
#endif
{
- ndbg("Unsupported packet type dropped (%02x)\n", ETHBUF->type);
+ ninfo("Unsupported packet type dropped (%02x)\n", ETHBUF->type);
EMAC_STAT(priv, rx_dropped);
}
@@ -1448,7 +1448,7 @@ static int ez80emac_txinterrupt(int irq, FAR void *context)
/* All events are packet/control frame transmit complete events */
- nvdbg("txhead=%p {%06x, %u, %04x} trp=%02x%02x istat=%02x\n",
+ ninfo("txhead=%p {%06x, %u, %04x} trp=%02x%02x istat=%02x\n",
txhead, txhead->np, txhead->pktsize, txhead->stat,
inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L), istat);
@@ -1458,9 +1458,9 @@ static int ez80emac_txinterrupt(int irq, FAR void *context)
{
if ((txhead->stat & EMAC_TXDESC_ABORT) != 0)
{
- ndbg("Descriptor %p aborted {%06x, %u, %04x} trp=%02x%02x\n",
- txhead, txhead->np, txhead->pktsize, txhead->stat,
- inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
+ nwarn("WARNING: Descriptor %p aborted {%06x, %u, %04x} trp=%02x%02x\n",
+ txhead, txhead->np, txhead->pktsize, txhead->stat,
+ inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
EMAC_STAT(priv, tx_errors);
EMAC_STAT(priv, tx_abterrors);
@@ -1471,7 +1471,7 @@ static int ez80emac_txinterrupt(int irq, FAR void *context)
txhead = (FAR struct ez80emac_desc_s *)txhead->np;
if (txhead)
{
- nvdbg("txhead=%p {%06x, %u, %04x} trp=%02x%02x\n",
+ ninfo("txhead=%p {%06x, %u, %04x} trp=%02x%02x\n",
txhead, txhead->np, txhead->pktsize, txhead->stat,
inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
}
@@ -1484,7 +1484,7 @@ static int ez80emac_txinterrupt(int irq, FAR void *context)
priv->txhead = txhead;
if (!priv->txhead)
{
- nvdbg("No pending Tx.. Stopping XMIT function.\n");
+ ninfo("No pending Tx.. Stopping XMIT function.\n");
/* Stop the Tx poll timer. (It will get restarted when we have
* something to send
@@ -1604,7 +1604,7 @@ static int ez80emac_sysinterrupt(int irq, FAR void *context)
if ((istat & EMAC_ISTAT_TXFSMERR) != 0)
{
- ndbg("Tx FSMERR txhead=%p {%06x, %u, %04x} trp=%02x%02x istat=%02x\n",
+ nwarn("WARNING: Tx FSMERR txhead=%p {%06x, %u, %04x} trp=%02x%02x istat=%02x\n",
priv->txhead, priv->txhead->np, priv->txhead->pktsize, priv->txhead->stat,
inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L), istat);
@@ -1620,7 +1620,7 @@ static int ez80emac_sysinterrupt(int irq, FAR void *context)
if ((istat & EMAC_ISTAT_RXOVR) != 0)
{
- ndbg("Rx OVR rxnext=%p {%06x, %u, %04x} rrp=%02x%02x rwp=%02x%02x blkslft=%02x istat=%02x\n",
+ nwarn("WARNING: Rx OVR rxnext=%p {%06x, %u, %04x} rrp=%02x%02x rwp=%02x%02x blkslft=%02x istat=%02x\n",
priv->rxnext, priv->rxnext->np, priv->rxnext->pktsize, priv->rxnext->stat,
inp(EZ80_EMAC_RRP_H), inp(EZ80_EMAC_RRP_L),
inp(EZ80_EMAC_RWP_H), inp(EZ80_EMAC_RWP_L),
@@ -1728,13 +1728,13 @@ static int ez80emac_ifup(FAR struct net_driver_s *dev)
uint8_t regval;
int ret;
- ndbg("Bringing up: MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
- dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
- dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
- dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
- ndbg(" IP %d.%d.%d.%d\n",
- dev->d_ipaddr >> 24, (dev->d_ipaddr >> 16) & 0xff,
- (dev->d_ipaddr >> 8) & 0xff, dev->d_ipaddr & 0xff);
+ ninfo("Bringing up: MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
+ dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
+ dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
+ dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
+ ninfo(" IP %d.%d.%d.%d\n",
+ dev->d_ipaddr >> 24, (dev->d_ipaddr >> 16) & 0xff,
+ (dev->d_ipaddr >> 8) & 0xff, dev->d_ipaddr & 0xff);
/* Bring up the interface -- Must be down right now */
@@ -2009,7 +2009,7 @@ static int ez80_emacinitialize(void)
priv->txnext->pktsize = 0;
priv->txnext->stat = 0;
- nvdbg("txnext=%p {%06x, %u, %04x} tlbp=%02x%02x trp=%02x%02x\n",
+ ninfo("txnext=%p {%06x, %u, %04x} tlbp=%02x%02x trp=%02x%02x\n",
priv->txnext, priv->txnext->np, priv->txnext->pktsize, priv->txnext->stat,
inp(EZ80_EMAC_TLBP_H), inp(EZ80_EMAC_TLBP_L),
inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
@@ -2030,7 +2030,7 @@ static int ez80_emacinitialize(void)
priv->rxnext->pktsize = 0;
priv->rxnext->stat = 0;
- nvdbg("rxnext=%p {%06x, %u, %04x} bp=%02x%02x\n",
+ ninfo("rxnext=%p {%06x, %u, %04x} bp=%02x%02x\n",
priv->rxnext, priv->rxnext->np, priv->rxnext->pktsize, priv->rxnext->stat,
inp(EZ80_EMAC_BP_H), inp(EZ80_EMAC_BP_L));
@@ -2050,7 +2050,7 @@ static int ez80_emacinitialize(void)
outp(EZ80_EMAC_RRP_L, (uint8_t)(addr & 0xff));
outp(EZ80_EMAC_RRP_H, (uint8_t)((addr >> 8) & 0xff));
- nvdbg("rrp=%02x%02x rwp=%02x%02x\n",
+ ninfo("rrp=%02x%02x rwp=%02x%02x\n",
inp(EZ80_EMAC_RRP_H), inp(EZ80_EMAC_RRP_L),
inp(EZ80_EMAC_RWP_H), inp(EZ80_EMAC_RWP_L));
@@ -2063,7 +2063,7 @@ static int ez80_emacinitialize(void)
outp(EZ80_EMAC_RHBP_H, (uint8_t)((addr >> 8) & 0xff));
priv->rxendp1 = (FAR struct ez80emac_desc_s *)addr;
- nvdbg("rxendp1=%p rhbp=%02x%02x\n",
+ ninfo("rxendp1=%p rhbp=%02x%02x\n",
priv->rxendp1,
inp(EZ80_EMAC_RHBP_H), inp(EZ80_EMAC_RHBP_L));
@@ -2072,7 +2072,7 @@ static int ez80_emacinitialize(void)
*/
outp(EZ80_EMAC_BUFSZ, EMAC_BUFSZ);
- nvdbg("bufsz=%02x blksleft=%02x%02x\n",
+ ninfo("bufsz=%02x blksleft=%02x%02x\n",
inp(EZ80_EMAC_BUFSZ), inp(EZ80_EMAC_BLKSLFT_H), inp(EZ80_EMAC_BLKSLFT_L));
/* Software reset */
@@ -2084,7 +2084,7 @@ static int ez80_emacinitialize(void)
regval &= ~EMAC_RST_SRST;
outp(EZ80_EMAC_RST, regval);
- nvdbg("After soft reset: rwp=%02x%02x trp=%02x%02x\n",
+ ninfo("After soft reset: rwp=%02x%02x trp=%02x%02x\n",
inp(EZ80_EMAC_RWP_H), inp(EZ80_EMAC_RWP_L),
inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
@@ -2094,7 +2094,7 @@ static int ez80_emacinitialize(void)
ez80emac_miiwrite(priv, MII_MCR, MII_MCR_RESET);
if (!ez80emac_miipoll(priv, MII_MCR, MII_MCR_RESET, false))
{
- ndbg("PHY reset error.\n");
+ nerr("ERROR: PHY reset error.\n");
}
/* Initialize MAC */
@@ -2149,7 +2149,7 @@ static int ez80_emacinitialize(void)
ez80emac_miiwrite(priv, MII_MCR, MII_MCR_RESET);
if (!ez80emac_miipoll(priv, MII_MCR, MII_MCR_RESET, false))
{
- ndbg("PHY reset error.\n");
+ nerr("ERROR: PHY reset error.\n");
ret = -EIO;
goto errout;
}
@@ -2200,7 +2200,7 @@ int up_netinitialize(void)
ret = irq_attach(EZ80_EMACSYS_IRQ, ez80emac_sysinterrupt);
if (ret < 0)
{
- nlldbg("Unable to attach IRQ %d\n", EZ80_EMACSYS_IRQ);
+ nllerr("ERROR: Unable to attach IRQ %d\n", EZ80_EMACSYS_IRQ);
ret = -EAGAIN;
goto errout;
}
@@ -2208,7 +2208,7 @@ int up_netinitialize(void)
ret = irq_attach(EZ80_EMACRX_IRQ, ez80emac_rxinterrupt);
if (ret < 0)
{
- nlldbg("Unable to attach IRQ %d\n", EZ80_EMACRX_IRQ);
+ nllerr("ERROR: Unable to attach IRQ %d\n", EZ80_EMACRX_IRQ);
ret = -EAGAIN;
goto errout;
}
@@ -2216,7 +2216,7 @@ int up_netinitialize(void)
ret = irq_attach(EZ80_EMACTX_IRQ, ez80emac_txinterrupt);
if (ret < 0)
{
- nlldbg("Unable to attach IRQ %d\n", EZ80_EMACTX_IRQ);
+ nllerr("ERROR: Unable to attach IRQ %d\n", EZ80_EMACTX_IRQ);
ret = -EAGAIN;
goto errout;
}
diff --git a/arch/z80/src/ez80/ez80_i2c.c b/arch/z80/src/ez80/ez80_i2c.c
index f1c8a2bcd1a5f506dbbf2c5d205eb03a2d02f5a4..04c45c3c4cb180613777b8efc8d43bcf96953a18 100644
--- a/arch/z80/src/ez80/ez80_i2c.c
+++ b/arch/z80/src/ez80/ez80_i2c.c
@@ -399,12 +399,12 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
*/
sr = ez80_i2c_waitiflg();
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (sr != I2C_SR_MSTART)
{
/* This error should never occur */
- dbg("Bad START status: %02x\n", sr);
+ err("ERROR: Bad START status: %02x\n", sr);
ez80_i2c_clriflg();
return -EIO;
}
@@ -426,7 +426,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
sr = ez80_i2c_waitiflg();
if (sr != I2C_SR_MADDRWRACK && sr != I2C_SR_MADDRWR)
{
- dbg("Bad ADDR8 status: %02x\n", sr);
+ err("ERROR: Bad ADDR8 status: %02x\n", sr);
goto failure;
}
}
@@ -445,7 +445,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
sr = ez80_i2c_waitiflg();
if (sr != I2C_SR_MADDRWRACK && sr != I2C_SR_MADDRWR)
{
- dbg("Bad ADDR10H status: %02x\n", sr);
+ err("ERROR: Bad ADDR10H status: %02x\n", sr);
goto failure;
}
@@ -459,7 +459,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
sr = ez80_i2c_waitiflg();
if (sr != I2C_SR_MADDR2WRACK && sr != I2C_SR_MADDR2WR)
{
- dbg("Bad ADDR10L status: %02x\n", sr);
+ err("ERROR: Bad ADDR10L status: %02x\n", sr);
goto failure;
}
}
@@ -469,7 +469,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
/* We don't attempt any fancy status-based error recovery */
failure:
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
switch (sr)
{
case I2C_SR_ARBLOST1: /* Arbitration lost in address or data byte */
@@ -479,12 +479,12 @@ failure:
* Call address received, ACK transmitted */
case I2C_SR_ARBLOST4: /* Arbitration lost in address as master, slave
* address and Read bit received, ACK transmitted */
- dbg("Arbitration lost: %02x\n", sr);
+ err("ERROR: Arbitration lost: %02x\n", sr);
ez80_i2c_clriflg();
return -EAGAIN;
default:
- dbg("Unexpected status: %02x\n", sr);
+ err("ERROR: Unexpected status: %02x\n", sr);
ez80_i2c_clriflg();
return -EIO;
}
@@ -634,7 +634,7 @@ static int ez80_i2c_read_transfer(FAR struct ez80_i2cdev_s *priv,
* this will cause the whole transfer to start over
*/
- dbg("Arbitration lost: %02x\n", regval);
+ err("ERROR: Arbitration lost: %02x\n", regval);
ez80_i2c_clriflg();
break;
}
@@ -643,7 +643,7 @@ static int ez80_i2c_read_transfer(FAR struct ez80_i2cdev_s *priv,
else
{
- dbg("Unexpected status: %02x\n", regval);
+ err("ERROR: Unexpected status: %02x\n", regval);
ez80_i2c_clriflg();
return-EIO;
}
@@ -731,7 +731,7 @@ static int ez80_i2c_write_transfer(FAR struct ez80_i2cdev_s *priv,
sr = ez80_i2c_waitiflg();
if (sr != I2C_SR_MDATAWRACK && sr != I2C_SR_MDATAWR)
{
- dbg("Bad DATA status: %02x\n", sr);
+ err("ERROR: Bad DATA status: %02x\n", sr);
ez80_i2c_clriflg();
if (sr == I2C_SR_ARBLOST1)
{
diff --git a/arch/z80/src/ez80/ez80_registerdump.c b/arch/z80/src/ez80/ez80_registerdump.c
index 0e523b693a7553568ddc4eb8027302830e4ed4d9..43faf25fee45484bd0357f77f0cae875398bcb87 100644
--- a/arch/z80/src/ez80/ez80_registerdump.c
+++ b/arch/z80/src/ez80/ez80_registerdump.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/z80/src/ez80/ez80_registerdump.c
*
- * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2008-2009, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
#include
-/* Output debug info -- even if debug is not selected. */
-
-#undef CONFIG_DEBUG
-#undef CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
#include
#include
@@ -77,22 +70,22 @@ static void ez80_registerdump(void)
if (g_current_regs)
{
#ifdef CONFIG_EZ80_Z80MODE
- lldbg("AF: %04x I: %04x\n",
+ alert("AF: %04x I: %04x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
- lldbg("BC: %04x DE: %04x HL: %04x\n",
+ alert("BC: %04x DE: %04x HL: %04x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
- lldbg("IX: %04x IY: %04x\n",
+ alert("IX: %04x IY: %04x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
- lldbg("SP: %04x PC: %04x\n"
+ alert("SP: %04x PC: %04x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
#else
- lldbg("AF: %06x I: %06x\n",
+ alert("AF: %06x I: %06x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
- lldbg("BC: %06x DE: %06x HL: %06x\n",
+ alert("BC: %06x DE: %06x HL: %06x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
- lldbg("IX: %06x IY: %06x\n",
+ alert("IX: %06x IY: %06x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
- lldbg("SP: %06x PC: %06x\n"
+ alert("SP: %06x PC: %06x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
#endif
}
diff --git a/arch/z80/src/ez80/ez80_schedulesigaction.c b/arch/z80/src/ez80/ez80_schedulesigaction.c
index 33d6c11b5f2a0b45ac61e6bb774f5e7eeddc32c9..6cc6b57c66bd8b949b6fe82752b7b7c57ddc8beb 100644
--- a/arch/z80/src/ez80/ez80_schedulesigaction.c
+++ b/arch/z80/src/ez80/ez80_schedulesigaction.c
@@ -125,7 +125,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- sdbg("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
+ sinfo("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
/* Make sure that interrupts are disabled */
diff --git a/arch/z80/src/ez80/ez80_sigdeliver.c b/arch/z80/src/ez80/ez80_sigdeliver.c
index 657961ce59eb36a80e96c2329f63db2f8b808246..694b3c018657042c166fac25a2660b48c13bb8cf 100644
--- a/arch/z80/src/ez80/ez80_sigdeliver.c
+++ b/arch/z80/src/ez80/ez80_sigdeliver.c
@@ -95,8 +95,8 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
- rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
+ sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
/* Save the real return state on the stack. */
@@ -127,7 +127,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/z80/src/ez80/ez80_spi.c b/arch/z80/src/ez80/ez80_spi.c
index a2f1c4c535dbdb4841a925ba635932db3903e7e9..0e3b9d07be8c7895a08b005a8dcedf8bcb54855e 100644
--- a/arch/z80/src/ez80/ez80_spi.c
+++ b/arch/z80/src/ez80/ez80_spi.c
@@ -446,7 +446,7 @@ FAR struct spi_dev_s *ez80_spibus_initialize(int port)
/* Only the SPI1 interface is supported */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (port != 1)
{
return NULL;
diff --git a/arch/z80/src/z180/z180_mmu.c b/arch/z80/src/z180/z180_mmu.c
index e3612dc9f024d9064799e9766e5dbd3e6921b3da..53e6183d0b42279258ae4a0372f01600d69f0e92 100644
--- a/arch/z80/src/z180/z180_mmu.c
+++ b/arch/z80/src/z180/z180_mmu.c
@@ -258,7 +258,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
{
/* No address environment... but I suppose that is not an error */
- sdbg("ERROR: npages is zero\n");
+ serr("ERROR: npages is zero\n");
return OK;
}
@@ -273,7 +273,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
cbr = z180_mmu_alloccbr();
if (!cbr)
{
- sdbg("ERROR: No free CBR structures\n");
+ serr("ERROR: No free CBR structures\n");
ret = -ENOMEM;
goto errout_with_irq;
}
@@ -287,7 +287,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
#endif
if (!alloc)
{
- sdbg("ERROR: Failed to allocate %d pages\n", npages);
+ serr("ERROR: Failed to allocate %d pages\n", npages);
ret = -ENOMEM;
goto errout_with_cbr;
}
diff --git a/arch/z80/src/z180/z180_registerdump.c b/arch/z80/src/z180/z180_registerdump.c
index 1c3a4c73be35a182838ab6e35ebe423cf492238f..32b351c36d863c150e4a6b9b5b6def7642090c4a 100644
--- a/arch/z80/src/z180/z180_registerdump.c
+++ b/arch/z80/src/z180/z180_registerdump.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/z80/src/z180/z180_registerdump.c
*
- * Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
#include
-/* Output debug info -- even if debug is not selected. */
-
-#undef CONFIG_DEBUG
-#undef CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
#include
#include
@@ -56,14 +49,6 @@
#ifdef CONFIG_ARCH_STACKDUMP
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -76,15 +61,15 @@ static void z180_registerdump(void)
{
if (g_current_regs)
{
- lldbg("AF: %04x I: %04x\n",
+ alert("AF: %04x I: %04x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
- lldbg("BC: %04x DE: %04x HL: %04x\n",
+ alert("BC: %04x DE: %04x HL: %04x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
- lldbg("IX: %04x IY: %04x\n",
+ alert("IX: %04x IY: %04x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
- lldbg("SP: %04x PC: %04x\n"
+ alert("SP: %04x PC: %04x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
- lldbg("CBAR: %02x BBR: %02x CBR: %02x\n"
+ alert("CBAR: %02x BBR: %02x CBR: %02x\n"
inp(Z180_MMU_CBAR), inp(Z180_MMU_BBR), inp(Z180_MMU_CBR));
}
}
diff --git a/arch/z80/src/z180/z180_schedulesigaction.c b/arch/z80/src/z180/z180_schedulesigaction.c
index a29a4b9d8a3935a436768e753501b685ef350b67..ade86734e93122365dca4e9b393f0e7811a9c5d3 100644
--- a/arch/z80/src/z180/z180_schedulesigaction.c
+++ b/arch/z80/src/z180/z180_schedulesigaction.c
@@ -125,7 +125,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- dbg("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
+ info("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
/* Make sure that interrupts are disabled */
diff --git a/arch/z80/src/z180/z180_sigdeliver.c b/arch/z80/src/z180/z180_sigdeliver.c
index e058d5a116d381d52cc8cbf509a0e26ac7c8504d..3a67b345f8b5dacc0e0e908f5a6169e98d67b4f8 100644
--- a/arch/z80/src/z180/z180_sigdeliver.c
+++ b/arch/z80/src/z180/z180_sigdeliver.c
@@ -94,8 +94,8 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
- rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
+ sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
/* Save the real return state on the stack. */
@@ -126,7 +126,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/z80/src/z8/z8_i2c.c b/arch/z80/src/z8/z8_i2c.c
index cc3508a564ce7549ddb2fc9ac9cfabf7534bcfdd..a5c597cba916ea0fac7b9bfe688b84d94ee1e05c 100644
--- a/arch/z80/src/z8/z8_i2c.c
+++ b/arch/z80/src/z8/z8_i2c.c
@@ -236,7 +236,7 @@ static uint16_t z8_i2c_getbrg(uint32_t frequency)
if (frequency > 400*1000)
{
- dbg("Invalid inputs\n");
+ err("ERROR: Invalid inputs\n");
frequency = 400*1000;
}
diff --git a/arch/z80/src/z8/z8_registerdump.c b/arch/z80/src/z8/z8_registerdump.c
index df6c761a7c942243ad0f02eb9327607c7507376a..92ba675b40653a0225e0dafde1c777b16e388078 100644
--- a/arch/z80/src/z8/z8_registerdump.c
+++ b/arch/z80/src/z8/z8_registerdump.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/z80/src/z8/z8_registerdump.c
*
- * Copyright (C) 2008-2009,2011 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2008-2009, 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt
*
* Redistribution and use in source and binary forms, with or without
@@ -39,13 +39,6 @@
#include
-/* Output debug info -- even if debug is not selected. */
-
-#undef CONFIG_DEBUG
-#undef CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
#include
#include
@@ -57,29 +50,21 @@
#ifdef CONFIG_ARCH_STACKDUMP
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
static inline void z8_dumpregs(FAR chipret_t *regs)
{
- lldbg("REGS: %04x %04x %04x %04x %04x %04x %04x %04x\n",
- regs[XCPT_RR0], regs[XCPT_RR2], regs[XCPT_RR4], regs[XCPT_RR6],
- regs[XCPT_RR8], regs[XCPT_RR10], regs[XCPT_RR12], regs[XCPT_RR14]);
+ alert("REGS: %04x %04x %04x %04x %04x %04x %04x %04x\n",
+ regs[XCPT_RR0], regs[XCPT_RR2], regs[XCPT_RR4], regs[XCPT_RR6],
+ regs[XCPT_RR8], regs[XCPT_RR10], regs[XCPT_RR12], regs[XCPT_RR14]);
}
static inline void z8_dumpstate(chipreg_t sp, chipreg_t pc, uint8_t irqctl,
chipreg_t rpflags)
{
- lldbg("SP: %04x PC: %04x IRQCTL: %02x RP: %02x FLAGS: %02x\n",
+ alert("SP: %04x PC: %04x IRQCTL: %02x RP: %02x FLAGS: %02x\n",
sp, pc, irqctl & 0xff, rpflags >> 8, rpflags & 0xff);
}
diff --git a/arch/z80/src/z8/z8_schedulesigaction.c b/arch/z80/src/z8/z8_schedulesigaction.c
index 2e6de089ec572a16d1af398a9185a737d57493db..679bccd61784399100cb0cc6092a5ba5ada91f36 100644
--- a/arch/z80/src/z8/z8_schedulesigaction.c
+++ b/arch/z80/src/z8/z8_schedulesigaction.c
@@ -125,7 +125,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- dbg("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
+ info("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
/* Make sure that interrupts are disabled */
diff --git a/arch/z80/src/z8/z8_sigdeliver.c b/arch/z80/src/z8/z8_sigdeliver.c
index 1cbb7e21590a4897113af077dafd6010bd92cee3..b6abac296a05d71535ccce5369a78733ed603f62 100644
--- a/arch/z80/src/z8/z8_sigdeliver.c
+++ b/arch/z80/src/z8/z8_sigdeliver.c
@@ -109,8 +109,8 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
- rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
+ sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
/* Save the real return state on the stack. */
@@ -141,7 +141,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/arch/z80/src/z80/z80_registerdump.c b/arch/z80/src/z80/z80_registerdump.c
index dd83a1eb8c7358f1f6a2da070bd5e095667fc3d1..7f02662a062e437b664959f2bc791ed536913668 100644
--- a/arch/z80/src/z80/z80_registerdump.c
+++ b/arch/z80/src/z80/z80_registerdump.c
@@ -39,13 +39,6 @@
#include
-/* Output debug info -- even if debug is not selected. */
-
-#undef CONFIG_DEBUG
-#undef CONFIG_DEBUG_VERBOSE
-#define CONFIG_DEBUG 1
-#define CONFIG_DEBUG_VERBOSE 1
-
#include
#include
@@ -56,14 +49,6 @@
#ifdef CONFIG_ARCH_STACKDUMP
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -76,13 +61,13 @@ static void z80_registerdump(void)
{
if (g_current_regs)
{
- lldbg("AF: %04x I: %04x\n",
+ alert("AF: %04x I: %04x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
- lldbg("BC: %04x DE: %04x HL: %04x\n",
+ alert("BC: %04x DE: %04x HL: %04x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
- lldbg("IX: %04x IY: %04x\n",
+ alert("IX: %04x IY: %04x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
- lldbg("SP: %04x PC: %04x\n"
+ alert("SP: %04x PC: %04x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
}
}
diff --git a/arch/z80/src/z80/z80_schedulesigaction.c b/arch/z80/src/z80/z80_schedulesigaction.c
index eb0c9c5554d818cde70d32e4cafbf446fe1ab61f..dbb3cb55375c3bc4a3558c5093c513a24145fcfc 100644
--- a/arch/z80/src/z80/z80_schedulesigaction.c
+++ b/arch/z80/src/z80/z80_schedulesigaction.c
@@ -125,7 +125,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
- dbg("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
+ info("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
/* Make sure that interrupts are disabled */
diff --git a/arch/z80/src/z80/z80_sigdeliver.c b/arch/z80/src/z80/z80_sigdeliver.c
index b56d1afd32a76fdd3e3a9a32fdeb18858c409f66..232eb4be98d4cec97b79123a204595b10de483c8 100644
--- a/arch/z80/src/z80/z80_sigdeliver.c
+++ b/arch/z80/src/z80/z80_sigdeliver.c
@@ -94,8 +94,8 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
- sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
- rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
+ sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
+ rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
/* Save the real return state on the stack. */
@@ -126,7 +126,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
- sdbg("Resuming\n");
+ sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
diff --git a/audio/audio.c b/audio/audio.c
index a1f0db3834ca97b08b16d815567767fd064cb772..184ef74a6f700b66866a12bdaf363b0d550343f4 100644
--- a/audio/audio.c
+++ b/audio/audio.c
@@ -146,7 +146,7 @@ static int audio_open(FAR struct file *filep)
uint8_t tmp;
int ret;
- audvdbg("crefs: %d\n", upper->crefs);
+ audinfo("crefs: %d\n", upper->crefs);
/* Get exclusive access to the device structures */
@@ -198,7 +198,7 @@ static int audio_close(FAR struct file *filep)
FAR struct audio_upperhalf_s *upper = inode->i_private;
int ret;
- audvdbg("crefs: %d\n", upper->crefs);
+ audinfo("crefs: %d\n", upper->crefs);
/* Get exclusive access to the device structures */
@@ -228,7 +228,7 @@ static int audio_close(FAR struct file *filep)
/* Disable the Audio device */
DEBUGASSERT(lower->ops->shutdown != NULL);
- audvdbg("calling shutdown: %d\n");
+ audinfo("calling shutdown: %d\n");
lower->ops->shutdown(lower);
}
@@ -358,7 +358,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
#endif
int ret;
- audvdbg("cmd: %d arg: %ld\n", cmd, arg);
+ audinfo("cmd: %d arg: %ld\n", cmd, arg);
/* Get exclusive access to the device structures */
@@ -382,7 +382,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
FAR struct audio_caps_s *caps = (FAR struct audio_caps_s *)((uintptr_t)arg);
DEBUGASSERT(lower->ops->getcaps != NULL);
- audvdbg("AUDIOIOC_GETCAPS: Device=%d\n", caps->ac_type);
+ audinfo("AUDIOIOC_GETCAPS: Device=%d\n", caps->ac_type);
/* Call the lower-half driver capabilities handler */
@@ -396,7 +396,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
(FAR const struct audio_caps_desc_s *)((uintptr_t)arg);
DEBUGASSERT(lower->ops->configure != NULL);
- audvdbg("AUDIOIOC_INITIALIZE: Device=%d\n", caps->caps.ac_type);
+ audinfo("AUDIOIOC_INITIALIZE: Device=%d\n", caps->caps.ac_type);
/* Call the lower-half driver configure handler */
@@ -412,7 +412,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{
DEBUGASSERT(lower->ops->shutdown != NULL);
- audvdbg("AUDIOIOC_SHUTDOWN\n");
+ audinfo("AUDIOIOC_SHUTDOWN\n");
/* Call the lower-half driver initialize handler */
ret = lower->ops->shutdown(lower);
@@ -427,7 +427,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case AUDIOIOC_START:
{
- audvdbg("AUDIOIOC_START\n");
+ audinfo("AUDIOIOC_START\n");
DEBUGASSERT(lower->ops->start != NULL);
/* Start the audio stream */
@@ -449,7 +449,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
case AUDIOIOC_STOP:
{
- audvdbg("AUDIOIOC_STOP\n");
+ audinfo("AUDIOIOC_STOP\n");
DEBUGASSERT(lower->ops->stop != NULL);
if (upper->started)
@@ -475,7 +475,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case AUDIOIOC_PAUSE:
{
- audvdbg("AUDIOIOC_PAUSE\n");
+ audinfo("AUDIOIOC_PAUSE\n");
DEBUGASSERT(lower->ops->pause != NULL);
if (upper->started)
@@ -497,7 +497,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case AUDIOIOC_RESUME:
{
- audvdbg("AUDIOIOC_RESUME\n");
+ audinfo("AUDIOIOC_RESUME\n");
DEBUGASSERT(lower->ops->resume != NULL);
if (upper->started)
@@ -521,7 +521,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case AUDIOIOC_ALLOCBUFFER:
{
- audvdbg("AUDIOIOC_ALLOCBUFFER\n");
+ audinfo("AUDIOIOC_ALLOCBUFFER\n");
bufdesc = (FAR struct audio_buf_desc_s *) arg;
if (lower->ops->allocbuffer)
@@ -544,7 +544,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case AUDIOIOC_FREEBUFFER:
{
- audvdbg("AUDIOIOC_FREEBUFFER\n");
+ audinfo("AUDIOIOC_FREEBUFFER\n");
bufdesc = (FAR struct audio_buf_desc_s *) arg;
if (lower->ops->freebuffer)
@@ -569,7 +569,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case AUDIOIOC_ENQUEUEBUFFER:
{
- audvdbg("AUDIOIOC_ENQUEUEBUFFER\n");
+ audinfo("AUDIOIOC_ENQUEUEBUFFER\n");
DEBUGASSERT(lower->ops->enqueuebuffer != NULL);
@@ -585,7 +585,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case AUDIOIOC_REGISTERMQ:
{
- audvdbg("AUDIOIOC_REGISTERMQ\n");
+ audinfo("AUDIOIOC_REGISTERMQ\n");
upper->usermq = (mqd_t) arg;
ret = OK;
@@ -599,7 +599,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case AUDIOIOC_UNREGISTERMQ:
{
- audvdbg("AUDIOIOC_UNREGISTERMQ\n");
+ audinfo("AUDIOIOC_UNREGISTERMQ\n");
upper->usermq = NULL;
ret = OK;
@@ -613,7 +613,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case AUDIOIOC_RESERVE:
{
- audvdbg("AUDIOIOC_RESERVE\n");
+ audinfo("AUDIOIOC_RESERVE\n");
DEBUGASSERT(lower->ops->reserve != NULL);
/* Call lower-half to perform the reservation */
@@ -633,7 +633,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case AUDIOIOC_RELEASE:
{
- audvdbg("AUDIOIOC_RELEASE\n");
+ audinfo("AUDIOIOC_RELEASE\n");
DEBUGASSERT(lower->ops->release != NULL);
/* Call lower-half to perform the release */
@@ -650,7 +650,7 @@ static int audio_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
default:
{
- audvdbg("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
+ audinfo("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg);
DEBUGASSERT(lower->ops->ioctl != NULL);
ret = lower->ops->ioctl(lower, cmd, arg);
}
@@ -704,7 +704,7 @@ static inline void audio_dequeuebuffer(FAR struct audio_upperhalf_s *upper,
{
struct audio_msg_s msg;
- audllvdbg("Entry\n");
+ audllinfo("Entry\n");
/* Send a dequeue message to the user if a message queue is registered */
@@ -742,7 +742,7 @@ static inline void audio_complete(FAR struct audio_upperhalf_s *upper,
{
struct audio_msg_s msg;
- audllvdbg("Entry\n");
+ audllinfo("Entry\n");
/* Send a dequeue message to the user if a message queue is registered */
@@ -791,7 +791,7 @@ static void audio_callback(FAR void *handle, uint16_t reason,
{
FAR struct audio_upperhalf_s *upper = (FAR struct audio_upperhalf_s *)handle;
- audllvdbg("Entry\n");
+ audllinfo("Entry\n");
/* Perform operation based on reason code */
@@ -832,7 +832,7 @@ static void audio_callback(FAR void *handle, uint16_t reason,
default:
{
- auddbg("Unknown callback reason code %d\n", reason);
+ auderr("ERROR: Unknown callback reason code %d\n", reason);
break;
}
}
@@ -885,7 +885,7 @@ int audio_register(FAR const char *name, FAR struct audio_lowerhalf_s *dev)
upper = (FAR struct audio_upperhalf_s *)kmm_zalloc(sizeof(struct audio_upperhalf_s));
if (!upper)
{
- auddbg("Allocation failed\n");
+ auderr("ERROR: Allocation failed\n");
return -ENOMEM;
}
@@ -995,7 +995,7 @@ int audio_register(FAR const char *name, FAR struct audio_lowerhalf_s *dev)
dev->upper = audio_callback;
dev->priv = upper;
- audvdbg("Registering %s\n", path);
+ audinfo("Registering %s\n", path);
return register_driver(path, &g_audioops, 0666, upper);
}
diff --git a/audio/pcm_decode.c b/audio/pcm_decode.c
index d57d5dbb9b25a694eb58797540f25cbc34dc348f..a9d739dd44b371d0af7db1633ce179801d8afb1f 100644
--- a/audio/pcm_decode.c
+++ b/audio/pcm_decode.c
@@ -259,23 +259,23 @@ static void pcm_callback(FAR void *arg, uint16_t reason,
#ifdef CONFIG_PCM_DEBUG
static void pcm_dump(FAR const struct wav_header_s *wav)
{
- dbg("Wave file header\n");
- dbg(" Header Chunk:\n");
- dbg(" Chunk ID: 0x%08x\n", wav->hdr.chunkid);
- dbg(" Chunk Size: %u\n", wav->hdr.chunklen);
- dbg(" Format: 0x%08x\n", wav->hdr.format);
- dbg(" Format Chunk:\n");
- dbg(" Chunk ID: 0x%08x\n", wav->fmt.chunkid);
- dbg(" Chunk Size: %u\n", wav->fmt.chunklen);
- dbg(" Audio Format: 0x%04x\n", wav->fmt.format);
- dbg(" Num. Channels: %d\n", wav->fmt.nchannels);
- dbg(" Sample Rate: %u\n", wav->fmt.samprate);
- dbg(" Byte Rate: %u\n", wav->fmt.byterate);
- dbg(" Block Align: %d\n", wav->fmt.align);
- dbg(" Bits Per Sample: %d\n", wav->fmt.bpsamp);
- dbg(" Data Chunk:\n");
- dbg(" Chunk ID: 0x%08x\n", wav->data.chunkid);
- dbg(" Chunk Size: %u\n", wav->data.chunklen);
+ info("Wave file header\n");
+ info(" Header Chunk:\n");
+ info(" Chunk ID: 0x%08x\n", wav->hdr.chunkid);
+ info(" Chunk Size: %u\n", wav->hdr.chunklen);
+ info(" Format: 0x%08x\n", wav->hdr.format);
+ info(" Format Chunk:\n");
+ info(" Chunk ID: 0x%08x\n", wav->fmt.chunkid);
+ info(" Chunk Size: %u\n", wav->fmt.chunklen);
+ info(" Audio Format: 0x%04x\n", wav->fmt.format);
+ info(" Num. Channels: %d\n", wav->fmt.nchannels);
+ info(" Sample Rate: %u\n", wav->fmt.samprate);
+ info(" Byte Rate: %u\n", wav->fmt.byterate);
+ info(" Block Align: %d\n", wav->fmt.align);
+ info(" Bits Per Sample: %d\n", wav->fmt.bpsamp);
+ info(" Data Chunk:\n");
+ info(" Chunk ID: 0x%08x\n", wav->data.chunkid);
+ info(" Chunk Size: %u\n", wav->data.chunklen);
}
#endif
@@ -398,14 +398,14 @@ static bool pcm_parsewav(FAR struct pcm_decode_s *priv, uint8_t *data)
if (priv->bpsamp != 8 && priv->bpsamp != 16)
{
- auddbg("ERROR: Cannot support bits per sample of %d in this mode\n",
+ auderr("ERROR: Cannot support bits per sample of %d in this mode\n",
priv->bpsamp);
return -EINVAL;
}
if (priv->nchannels != 1 && priv->nchannels != 2)
{
- auddbg("ERROR: Cannot support number of channles of %d in this mode\n",
+ auderr("ERROR: Cannot support number of channles of %d in this mode\n",
priv->nchannels);
return -EINVAL;
}
@@ -432,7 +432,7 @@ static bool pcm_parsewav(FAR struct pcm_decode_s *priv, uint8_t *data)
static void pcm_subsample_configure(FAR struct pcm_decode_s *priv,
uint8_t subsample)
{
- audvdbg("subsample: %d\n", subsample);
+ audinfo("subsample: %d\n", subsample);
/* Three possibilities:
*
@@ -448,7 +448,7 @@ static void pcm_subsample_configure(FAR struct pcm_decode_s *priv,
if (subsample != AUDIO_SUBSAMPLE_NONE)
{
- audvdbg("Start sub-sampling\n");
+ audinfo("Start sub-sampling\n");
/* Save the current subsample setting. Subsampling will begin on
* then next audio buffer that we receive.
@@ -466,7 +466,7 @@ static void pcm_subsample_configure(FAR struct pcm_decode_s *priv,
else if (subsample == AUDIO_SUBSAMPLE_NONE)
{
- audvdbg("Stop sub-sampling\n");
+ audinfo("Stop sub-sampling\n");
/* Indicate that we are in normal play mode. This will take effect
* when the next audio buffer is received.
@@ -691,7 +691,7 @@ static int pcm_getcaps(FAR struct audio_lowerhalf_s *dev, int type,
ret = lower->ops->getcaps(lower, type, caps);
if (ret < 0)
{
- auddbg("Lower getcaps() failed: %d\n", ret);
+ auderr("ERROR: Lower getcaps() failed: %d\n", ret);
return ret;
}
@@ -758,7 +758,7 @@ static int pcm_configure(FAR struct audio_lowerhalf_s *dev,
lower = priv->lower;
DEBUGASSERT(lower && lower->ops->configure);
- audvdbg("Defer to lower configure\n");
+ audinfo("Defer to lower configure\n");
#ifdef CONFIG_AUDIO_MULTI_SESSION
return lower->ops->configure(lower, session, caps);
#else
@@ -796,7 +796,7 @@ static int pcm_shutdown(FAR struct audio_lowerhalf_s *dev)
lower = priv->lower;
DEBUGASSERT(lower && lower->ops->start);
- audvdbg("Defer to lower shutdown\n");
+ audinfo("Defer to lower shutdown\n");
return lower->ops->shutdown(lower);
}
@@ -827,7 +827,7 @@ static int pcm_start(FAR struct audio_lowerhalf_s *dev)
lower = priv->lower;
DEBUGASSERT(lower && lower->ops->start);
- audvdbg("Defer to lower start\n");
+ audinfo("Defer to lower start\n");
#ifdef CONFIG_AUDIO_MULTI_SESSION
return lower->ops->start(lower, session);
#else
@@ -866,7 +866,7 @@ static int pcm_stop(FAR struct audio_lowerhalf_s *dev)
lower = priv->lower;
DEBUGASSERT(lower && lower->ops->stop);
- audvdbg("Defer to lower stop\n");
+ audinfo("Defer to lower stop\n");
#ifdef CONFIG_AUDIO_MULTI_SESSION
return lower->ops->stop(lower, session);
#else
@@ -900,7 +900,7 @@ static int pcm_pause(FAR struct audio_lowerhalf_s *dev)
lower = priv->lower;
DEBUGASSERT(lower && lower->ops->pause);
- audvdbg("Defer to lower pause\n");
+ audinfo("Defer to lower pause\n");
#ifdef CONFIG_AUDIO_MULTI_SESSION
return lower->ops->pause(lower, session);
#else
@@ -933,7 +933,7 @@ static int pcm_resume(FAR struct audio_lowerhalf_s *dev)
lower = priv->lower;
DEBUGASSERT(lower && lower->ops->resume);
- audvdbg("Defer to lower resume\n");
+ audinfo("Defer to lower resume\n");
#ifdef CONFIG_AUDIO_MULTI_SESSION
return lower->ops->resume(lower, session);
#else
@@ -967,7 +967,7 @@ static int pcm_allocbuffer(FAR struct audio_lowerhalf_s *dev,
lower = priv->lower;
DEBUGASSERT(lower && lower->ops->allocbuffer);
- audvdbg("Defer to lower allocbuffer\n");
+ audinfo("Defer to lower allocbuffer\n");
return lower->ops->allocbuffer(lower, apb);
}
@@ -994,7 +994,7 @@ static int pcm_freebuffer(FAR struct audio_lowerhalf_s *dev,
lower = priv->lower;
DEBUGASSERT(lower && lower->ops->freebuffer);
- audvdbg("Defer to lower freebuffer, apb=%p\n", apb);
+ audinfo("Defer to lower freebuffer, apb=%p\n", apb);
return lower->ops->freebuffer(lower, apb);
}
@@ -1026,7 +1026,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
int ret;
DEBUGASSERT(priv);
- audvdbg("Received buffer %p, streaming=%d\n", apb, priv->streaming);
+ audinfo("Received buffer %p, streaming=%d\n", apb, priv->streaming);
lower = priv->lower;
DEBUGASSERT(lower && lower->ops->enqueuebuffer && lower->ops->configure);
@@ -1046,7 +1046,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
}
#ifndef CONFIG_AUDIO_EXCLUDE_FFORWARD
- audvdbg("Received: apb=%p curbyte=%d nbytes=%d flags=%04x\n",
+ audinfo("Received: apb=%p curbyte=%d nbytes=%d flags=%04x\n",
apb, apb->curbyte, apb->nbytes, apb->flags);
/* Perform any necessary sub-sampling operations */
@@ -1056,7 +1056,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
/* Then give the audio buffer to the lower driver */
- audvdbg("Pass to lower enqueuebuffer: apb=%p curbyte=%d nbytes=%d\n",
+ audinfo("Pass to lower enqueuebuffer: apb=%p curbyte=%d nbytes=%d\n",
apb, apb->curbyte, apb->nbytes);
return lower->ops->enqueuebuffer(lower, apb);
@@ -1069,7 +1069,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
*/
bytesleft = apb->nbytes - apb->curbyte;
- audvdbg("curbyte=%d nbytes=%d nmaxbytes=%d bytesleft=%d\n",
+ audinfo("curbyte=%d nbytes=%d nmaxbytes=%d bytesleft=%d\n",
apb->curbyte, apb->nbytes, apb->nmaxbytes, bytesleft);
if (bytesleft >= sizeof(struct wav_header_s))
@@ -1100,7 +1100,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
#endif
if (ret < 0)
{
- auddbg("ERROR: Failed to set PCM configuration: %d\n", ret);
+ auderr("ERROR: Failed to set PCM configuration: %d\n", ret);
return ret;
}
@@ -1109,7 +1109,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
apb->curbyte += sizeof(struct wav_header_s);
#ifndef CONFIG_AUDIO_EXCLUDE_FFORWARD
- audvdbg("Begin streaming: apb=%p curbyte=%d nbytes=%d\n",
+ audinfo("Begin streaming: apb=%p curbyte=%d nbytes=%d\n",
apb, apb->curbyte, apb->nbytes);
/* Perform any necessary sub-sampling operations */
@@ -1119,7 +1119,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
/* Then give the audio buffer to the lower driver */
- audvdbg("Pass to lower enqueuebuffer: apb=%p curbyte=%d nbytes=%d\n",
+ audinfo("Pass to lower enqueuebuffer: apb=%p curbyte=%d nbytes=%d\n",
apb, apb->curbyte, apb->nbytes);
ret = lower->ops->enqueuebuffer(lower, apb);
@@ -1135,7 +1135,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
}
}
- auddbg("ERROR: Invalid PCM WAV file\n");
+ auderr("ERROR: Invalid PCM WAV file\n");
/* The normal protocol for streaming errors is as follows:
*
@@ -1161,7 +1161,7 @@ static int pcm_enqueuebuffer(FAR struct audio_lowerhalf_s *dev,
/* This is not a WAV file! */
- auddbg("ERROR: Invalid PCM WAV file\n");
+ auderr("ERROR: Invalid PCM WAV file\n");
return -EINVAL;
}
@@ -1186,7 +1186,7 @@ static int pcm_cancelbuffer(FAR struct audio_lowerhalf_s *dev,
lower = priv->lower;
DEBUGASSERT(lower && lower->ops->cancelbuffer);
- audvdbg("Defer to lower cancelbuffer, apb=%p\n", apb);
+ audinfo("Defer to lower cancelbuffer, apb=%p\n", apb);
return lower->ops->cancelbuffer(lower, apb);
}
@@ -1211,7 +1211,7 @@ static int pcm_ioctl(FAR struct audio_lowerhalf_s *dev, int cmd,
lower = priv->lower;
DEBUGASSERT(lower && lower->ops->ioctl);
- audvdbg("Defer to lower ioctl, cmd=%d arg=%ld\n");
+ audinfo("Defer to lower ioctl, cmd=%d arg=%ld\n");
return lower->ops->ioctl(lower, cmd, arg);
}
@@ -1256,7 +1256,7 @@ static int pcm_reserve(FAR struct audio_lowerhalf_s *dev)
lower = priv->lower;
DEBUGASSERT(lower && lower->ops->reserve);
- audvdbg("Defer to lower reserve\n");
+ audinfo("Defer to lower reserve\n");
#ifdef CONFIG_AUDIO_MULTI_SESSION
ret = lower->ops->reserve(lower, &priv->session);
@@ -1298,7 +1298,7 @@ static int pcm_release(FAR struct audio_lowerhalf_s *dev)
lower = priv->lower;
DEBUGASSERT(lower && lower->ops->release);
- audvdbg("Defer to lower release\n");
+ audinfo("Defer to lower release\n");
#ifdef CONFIG_AUDIO_MULTI_SESSION
return lower->ops->release(lower, session);
#else
@@ -1378,7 +1378,7 @@ FAR struct audio_lowerhalf_s *
priv = (FAR struct pcm_decode_s *)kmm_zalloc(sizeof(struct pcm_decode_s));
if (!priv)
{
- auddbg("ERROR: Failed to allocate driver structure\n");
+ auderr("ERROR: Failed to allocate driver structure\n");
return NULL;
}
diff --git a/binfmt/binfmt.h b/binfmt/binfmt.h
index 370ef57eaebcabe67c62a976163e8c0983a0fff5..cfde554d4e453f3262db9bed85b9e01685fd4a36 100644
--- a/binfmt/binfmt.h
+++ b/binfmt/binfmt.h
@@ -86,7 +86,7 @@ EXTERN FAR struct binfmt_s *g_binfmts;
*
****************************************************************************/
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_BINFMT)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_BINFMT)
int dump_module(FAR const struct binary_s *bin);
#else
# define dump_module(bin)
diff --git a/binfmt/binfmt_copyargv.c b/binfmt/binfmt_copyargv.c
index 2fee46d047d460aba7f739efc4b2f59a9ddc876b..f0a594f5a6d20e2408aad0874d1a207852373aa5 100644
--- a/binfmt/binfmt_copyargv.c
+++ b/binfmt/binfmt_copyargv.c
@@ -114,12 +114,12 @@ int binfmt_copyargv(FAR struct binary_s *bin, FAR char * const *argv)
if (nargs > MAX_EXEC_ARGS)
{
- bdbg("ERROR: Too many arguments: %lu\n", (unsigned long)argvsize);
+ berr("ERROR: Too many arguments: %lu\n", (unsigned long)argvsize);
return -E2BIG;
}
}
- bvdbg("args=%d argsize=%lu\n", nargs, (unsigned long)argsize);
+ binfo("args=%d argsize=%lu\n", nargs, (unsigned long)argsize);
/* Allocate the argv array and an argument buffer */
@@ -129,7 +129,7 @@ int binfmt_copyargv(FAR struct binary_s *bin, FAR char * const *argv)
bin->argbuffer = (FAR char *)kmm_malloc(argvsize + argsize);
if (!bin->argbuffer)
{
- bdbg("ERROR: Failed to allocate the argument buffer\n");
+ berr("ERROR: Failed to allocate the argument buffer\n");
return -ENOMEM;
}
diff --git a/binfmt/binfmt_dumpmodule.c b/binfmt/binfmt_dumpmodule.c
index c69fed83c4398b844364bf8150c09c74f7e082c6..a28f4cefeeda07e02242082ec35f17645b94d4cd 100644
--- a/binfmt/binfmt_dumpmodule.c
+++ b/binfmt/binfmt_dumpmodule.c
@@ -47,7 +47,7 @@
#include "binfmt.h"
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_BINFMT) && !defined(CONFIG_BINFMT_DISABLE)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_BINFMT) && !defined(CONFIG_BINFMT_DISABLE)
/****************************************************************************
* Pre-processor Definitions
@@ -86,21 +86,21 @@ int dump_module(FAR const struct binary_s *bin)
{
if (bin)
{
- bdbg("Module:\n");
- bdbg(" filename: %s\n", bin->filename);
- bdbg(" argv: %p\n", bin->argv);
- bdbg(" entrypt: %p\n", bin->entrypt);
- bdbg(" mapped: %p size=%d\n", bin->mapped, bin->mapsize);
- bdbg(" alloc: %p %p %p\n", bin->alloc[0], bin->alloc[1], bin->alloc[2]);
+ berr("Module:\n");
+ berr(" filename: %s\n", bin->filename);
+ berr(" argv: %p\n", bin->argv);
+ berr(" entrypt: %p\n", bin->entrypt);
+ berr(" mapped: %p size=%d\n", bin->mapped, bin->mapsize);
+ berr(" alloc: %p %p %p\n", bin->alloc[0], bin->alloc[1], bin->alloc[2]);
#ifdef CONFIG_BINFMT_CONSTRUCTORS
- bdbg(" ctors: %p nctors=%d\n", bin->ctors, bin->nctors);
- bdbg(" dtors: %p ndtors=%d\n", bin->dtors, bin->ndtors);
+ berr(" ctors: %p nctors=%d\n", bin->ctors, bin->nctors);
+ berr(" dtors: %p ndtors=%d\n", bin->dtors, bin->ndtors);
#endif
#ifdef CONFIG_ARCH_ADDRENV
- bdbg(" addrenv: %p\n", bin->addrenv);
+ berr(" addrenv: %p\n", bin->addrenv);
#endif
- bdbg(" stacksize: %d\n", bin->stacksize);
- bdbg(" unload: %p\n", bin->unload);
+ berr(" stacksize: %d\n", bin->stacksize);
+ berr(" unload: %p\n", bin->unload);
}
return OK;
diff --git a/binfmt/binfmt_exec.c b/binfmt/binfmt_exec.c
index f3f62027ebfb7cc564330b4f46ed868c60910ba1..2e6f074b79a342deb98b9f88e8e2e4e36a66ec26 100644
--- a/binfmt/binfmt_exec.c
+++ b/binfmt/binfmt_exec.c
@@ -86,7 +86,7 @@ int exec(FAR const char *filename, FAR char * const *argv,
#if defined(CONFIG_SCHED_ONEXIT) && defined(CONFIG_SCHED_HAVE_PARENT)
FAR struct binary_s *bin;
int pid;
- int err;
+ int errcode;
int ret;
/* Allocate the load information */
@@ -94,8 +94,8 @@ int exec(FAR const char *filename, FAR char * const *argv,
bin = (FAR struct binary_s *)kmm_zalloc(sizeof(struct binary_s));
if (!bin)
{
- bdbg("ERROR: Failed to allocate binary_s\n");
- err = ENOMEM;
+ berr("ERROR: Failed to allocate binary_s\n");
+ errcode = ENOMEM;
goto errout;
}
@@ -110,8 +110,8 @@ int exec(FAR const char *filename, FAR char * const *argv,
ret = binfmt_copyargv(bin, argv);
if (ret < 0)
{
- err = -ret;
- bdbg("ERROR: Failed to copy argv[]: %d\n", err);
+ errcode = -ret;
+ berr("ERROR: Failed to copy argv[]: %d\n", errcode);
goto errout_with_bin;
}
@@ -120,8 +120,8 @@ int exec(FAR const char *filename, FAR char * const *argv,
ret = load_module(bin);
if (ret < 0)
{
- err = get_errno();
- bdbg("ERROR: Failed to load program '%s': %d\n", filename, err);
+ errcode = get_errno();
+ berr("ERROR: Failed to load program '%s': %d\n", filename, errcode);
goto errout_with_argv;
}
@@ -137,8 +137,8 @@ int exec(FAR const char *filename, FAR char * const *argv,
pid = exec_module(bin);
if (pid < 0)
{
- err = get_errno();
- bdbg("ERROR: Failed to execute program '%s': %d\n", filename, err);
+ errcode = get_errno();
+ berr("ERROR: Failed to execute program '%s': %d\n", filename, errcode);
goto errout_with_lock;
}
@@ -149,8 +149,8 @@ int exec(FAR const char *filename, FAR char * const *argv,
ret = schedule_unload(pid, bin);
if (ret < 0)
{
- err = get_errno();
- bdbg("ERROR: Failed to schedule unload '%s': %d\n", filename, err);
+ errcode = get_errno();
+ berr("ERROR: Failed to schedule unload '%s': %d\n", filename, errcode);
}
sched_unlock();
@@ -164,12 +164,12 @@ errout_with_argv:
errout_with_bin:
kmm_free(bin);
errout:
- set_errno(err);
+ set_errno(errcode);
return ERROR;
#else
struct binary_s bin;
- int err;
+ int errcode;
int ret;
/* Load the module into memory */
@@ -182,8 +182,8 @@ errout:
ret = load_module(&bin);
if (ret < 0)
{
- err = get_errno();
- bdbg("ERROR: Failed to load program '%s': %d\n", filename, err);
+ errcode = get_errno();
+ berr("ERROR: Failed to load program '%s': %d\n", filename, errcode);
goto errout;
}
@@ -192,8 +192,8 @@ errout:
ret = exec_module(&bin);
if (ret < 0)
{
- err = get_errno();
- bdbg("ERROR: Failed to execute program '%s': %d\n", filename, err);
+ errcode = get_errno();
+ berr("ERROR: Failed to execute program '%s': %d\n", filename, errcode);
goto errout_with_module;
}
@@ -204,10 +204,9 @@ errout:
errout_with_module:
unload_module(&bin);
errout:
- set_errno(err);
+ set_errno(errcode);
return ERROR;
#endif
}
#endif /* !CONFIG_BINFMT_DISABLE */
-
diff --git a/binfmt/binfmt_execmodule.c b/binfmt/binfmt_execmodule.c
index 971c47123cce10c1b8f0477b99c1ca9141bcc800..eef50068a538b895fbf0412c98d59e7c2af26398 100644
--- a/binfmt/binfmt_execmodule.c
+++ b/binfmt/binfmt_execmodule.c
@@ -109,7 +109,7 @@ static void exec_ctors(FAR void *arg)
for (i = 0; i < binp->nctors; i++)
{
- bvdbg("Calling ctor %d at %p\n", i, (FAR void *)ctor);
+ binfo("Calling ctor %d at %p\n", i, (FAR void *)ctor);
(*ctor)();
ctor++;
@@ -142,27 +142,27 @@ int exec_module(FAR const struct binary_s *binp)
#endif
FAR uint32_t *stack;
pid_t pid;
- int err;
+ int errcode;
int ret;
/* Sanity checking */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (!binp || !binp->entrypt || binp->stacksize <= 0)
{
- err = EINVAL;
+ errcode = EINVAL;
goto errout;
}
#endif
- bvdbg("Executing %s\n", binp->filename);
+ binfo("Executing %s\n", binp->filename);
/* Allocate a TCB for the new task. */
tcb = (FAR struct task_tcb_s *)kmm_zalloc(sizeof(struct task_tcb_s));
if (!tcb)
{
- err = ENOMEM;
+ errcode = ENOMEM;
goto errout;
}
@@ -172,8 +172,8 @@ int exec_module(FAR const struct binary_s *binp)
ret = up_addrenv_select(&binp->addrenv, &oldenv);
if (ret < 0)
{
- bdbg("ERROR: up_addrenv_select() failed: %d\n", ret);
- err = -ret;
+ berr("ERROR: up_addrenv_select() failed: %d\n", ret);
+ errcode = -ret;
goto errout_with_tcb;
}
@@ -192,7 +192,7 @@ int exec_module(FAR const struct binary_s *binp)
stack = (FAR uint32_t *)kumm_malloc(binp->stacksize);
if (!stack)
{
- err = ENOMEM;
+ errcode = ENOMEM;
goto errout_with_addrenv;
}
@@ -202,8 +202,8 @@ int exec_module(FAR const struct binary_s *binp)
stack, binp->stacksize, binp->entrypt, binp->argv);
if (ret < 0)
{
- err = get_errno();
- bdbg("task_init() failed: %d\n", err);
+ errcode = get_errno();
+ berr("task_init() failed: %d\n", errcode);
goto errout_with_addrenv;
}
@@ -224,8 +224,8 @@ int exec_module(FAR const struct binary_s *binp)
ret = up_addrenv_kstackalloc(&tcb->cmn);
if (ret < 0)
{
- bdbg("ERROR: up_addrenv_select() failed: %d\n", ret);
- err = -ret;
+ berr("ERROR: up_addrenv_select() failed: %d\n", ret);
+ errcode = -ret;
goto errout_with_tcbinit;
}
#endif
@@ -236,8 +236,8 @@ int exec_module(FAR const struct binary_s *binp)
ret = shm_group_initialize(tcb->cmn.group);
if (ret < 0)
{
- bdbg("ERROR: shm_group_initialize() failed: %d\n", ret);
- err = -ret;
+ berr("ERROR: shm_group_initialize() failed: %d\n", ret);
+ errcode = -ret;
goto errout_with_tcbinit;
}
#endif
@@ -260,8 +260,8 @@ int exec_module(FAR const struct binary_s *binp)
ret = up_addrenv_clone(&binp->addrenv, &tcb->cmn.group->tg_addrenv);
if (ret < 0)
{
- err = -ret;
- bdbg("ERROR: up_addrenv_clone() failed: %d\n", ret);
+ errcode = -ret;
+ berr("ERROR: up_addrenv_clone() failed: %d\n", ret);
goto errout_with_tcbinit;
}
@@ -288,8 +288,8 @@ int exec_module(FAR const struct binary_s *binp)
ret = task_activate((FAR struct tcb_s *)tcb);
if (ret < 0)
{
- err = get_errno();
- bdbg("task_activate() failed: %d\n", err);
+ errcode = get_errno();
+ berr("task_activate() failed: %d\n", errcode);
goto errout_with_tcbinit;
}
@@ -299,8 +299,8 @@ int exec_module(FAR const struct binary_s *binp)
ret = up_addrenv_restore(&oldenv);
if (ret < 0)
{
- bdbg("ERROR: up_addrenv_select() failed: %d\n", ret);
- err = -ret;
+ berr("ERROR: up_addrenv_select() failed: %d\n", ret);
+ errcode = -ret;
goto errout_with_tcbinit;
}
#endif
@@ -322,8 +322,8 @@ errout_with_tcb:
kmm_free(tcb);
errout:
- set_errno(err);
- bdbg("returning errno: %d\n", err);
+ set_errno(errcode);
+ berr("returning errno: %d\n", errcode);
return ERROR;
}
diff --git a/binfmt/binfmt_loadmodule.c b/binfmt/binfmt_loadmodule.c
index 1b614838e6afb59fe4f9565397d5906b3a45cac3..9cd80a8f42ceb8ada57c0152a6c187f246ec5816 100644
--- a/binfmt/binfmt_loadmodule.c
+++ b/binfmt/binfmt_loadmodule.c
@@ -91,7 +91,7 @@ static int load_default_priority(FAR struct binary_s *bin)
ret = sched_getparam(0, ¶m);
if (ret < 0)
{
- bdbg("ERROR: sched_getparam failed: %d\n", get_errno());
+ berr("ERROR: sched_getparam failed: %d\n", get_errno());
return ERROR;
}
@@ -120,7 +120,7 @@ static int load_absmodule(FAR struct binary_s *bin)
FAR struct binfmt_s *binfmt;
int ret = -ENOENT;
- bvdbg("Loading %s\n", bin->filename);
+ binfo("Loading %s\n", bin->filename);
/* Disabling pre-emption should be sufficient protection while accessing
* the list of registered binary format handlers.
@@ -142,7 +142,7 @@ static int load_absmodule(FAR struct binary_s *bin)
{
/* Successfully loaded -- break out with ret == 0 */
- bvdbg("Successfully loaded module %s\n", bin->filename);
+ binfo("Successfully loaded module %s\n", bin->filename);
/* Save the unload method for use by unload_module */
@@ -180,7 +180,7 @@ int load_module(FAR struct binary_s *bin)
/* Verify that we were provided something to work with */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
if (bin && bin->filename)
#endif
{
@@ -262,7 +262,7 @@ int load_module(FAR struct binary_s *bin)
if (ret < 0)
{
- bdbg("ERROR: Returning errno %d\n", -ret);
+ berr("ERROR: Returning errno %d\n", -ret);
set_errno(-ret);
return ERROR;
}
diff --git a/binfmt/binfmt_schedunload.c b/binfmt/binfmt_schedunload.c
index f9da1349f6b96688f47315b30567c0cbf4ef4498..1347262ff4924395dded36852cbc89b5cfd9542f 100644
--- a/binfmt/binfmt_schedunload.c
+++ b/binfmt/binfmt_schedunload.c
@@ -209,7 +209,7 @@ static void unload_callback(int signo, siginfo_t *info, void *ucontext)
if (!info || signo != SIGCHLD)
{
- blldbg("ERROR:Bad signal callback: signo=%d info=%p\n", signo, info);
+ bllerr("ERROR:Bad signal callback: signo=%d info=%p\n", signo, info);
return;
}
@@ -218,7 +218,7 @@ static void unload_callback(int signo, siginfo_t *info, void *ucontext)
bin = unload_list_remove(info->si_pid);
if (!bin)
{
- blldbg("ERROR: Could not find load info for PID=%d\n", info->si_pid);
+ bllerr("ERROR: Could not find load info for PID=%d\n", info->si_pid);
return;
}
@@ -227,7 +227,7 @@ static void unload_callback(int signo, siginfo_t *info, void *ucontext)
ret = unload_module(bin);
if (ret < 0)
{
- blldbg("ERROR: unload_module failed: %d\n", get_errno());
+ bllerr("ERROR: unload_module failed: %d\n", get_errno());
}
/* Free the load structure */
@@ -284,7 +284,7 @@ int schedule_unload(pid_t pid, FAR struct binary_s *bin)
/* The errno value will get trashed by the following debug output */
errorcode = get_errno();
- bvdbg("ERROR: sigprocmask failed: %d\n", ret);
+ binfo("ERROR: sigprocmask failed: %d\n", ret);
goto errout;
}
@@ -310,14 +310,14 @@ int schedule_unload(pid_t pid, FAR struct binary_s *bin)
/* The errno value will get trashed by the following debug output */
errorcode = get_errno();
- bvdbg("ERROR: sigaction failed: %d\n" , ret);
+ binfo("ERROR: sigaction failed: %d\n" , ret);
/* Emergency removal from the list */
flags = enter_critical_section();
if (unload_list_remove(pid) != bin)
{
- blldbg("ERROR: Failed to remove structure\n");
+ bllerr("ERROR: Failed to remove structure\n");
}
leave_critical_section(flags);
diff --git a/binfmt/binfmt_unloadmodule.c b/binfmt/binfmt_unloadmodule.c
index 887d6d66c09a84aad65f2d533bf0c9e2af4e7311..25b9cef121f2ec6f2b73db5aa45af517e516a9e1 100644
--- a/binfmt/binfmt_unloadmodule.c
+++ b/binfmt/binfmt_unloadmodule.c
@@ -99,7 +99,7 @@ static inline int exec_dtors(FAR struct binary_s *binp)
ret = up_addrenv_select(&binp->addrenv, &oldenv);
if (ret < 0)
{
- bdbg("ERROR: up_addrenv_select() failed: %d\n", ret);
+ berr("ERROR: up_addrenv_select() failed: %d\n", ret);
return ret;
}
#endif
@@ -108,7 +108,7 @@ static inline int exec_dtors(FAR struct binary_s *binp)
for (i = 0; i < binp->ndtors; i++)
{
- bvdbg("Calling dtor %d at %p\n", i, (FAR void *)dtor);
+ binfo("Calling dtor %d at %p\n", i, (FAR void *)dtor);
(*dtor)();
dtor++;
@@ -161,7 +161,7 @@ int unload_module(FAR struct binary_s *binp)
ret = binp->unload(binp);
if (ret < 0)
{
- bdbg("binp->unload() failed: %d\n", ret);
+ berr("binp->unload() failed: %d\n", ret);
set_errno(-ret);
return ERROR;
}
@@ -173,7 +173,7 @@ int unload_module(FAR struct binary_s *binp)
ret = exec_dtors(binp);
if (ret < 0)
{
- bdbg("exec_ctors() failed: %d\n", ret);
+ berr("exec_ctors() failed: %d\n", ret);
set_errno(-ret);
return ERROR;
}
@@ -187,7 +187,7 @@ int unload_module(FAR struct binary_s *binp)
if (binp->mapped)
{
- bvdbg("Unmapping address space: %p\n", binp->mapped);
+ binfo("Unmapping address space: %p\n", binp->mapped);
munmap(binp->mapped, binp->mapsize);
}
@@ -198,7 +198,7 @@ int unload_module(FAR struct binary_s *binp)
{
if (binp->alloc[i])
{
- bvdbg("Freeing alloc[%d]: %p\n", i, binp->alloc[i]);
+ binfo("Freeing alloc[%d]: %p\n", i, binp->alloc[i]);
kumm_free((FAR void *)binp->alloc[i]);
}
}
diff --git a/binfmt/builtin.c b/binfmt/builtin.c
index 537556136b65b956e2b119e691841304025d2606..88ad846c7fc21031d826d79cabb4dcfbb2bef721 100644
--- a/binfmt/builtin.c
+++ b/binfmt/builtin.c
@@ -95,7 +95,7 @@ static int builtin_loadbinary(struct binary_s *binp)
int index;
int ret;
- bvdbg("Loading file: %s\n", binp->filename);
+ binfo("Loading file: %s\n", binp->filename);
/* Open the binary file for reading (only) */
@@ -103,7 +103,7 @@ static int builtin_loadbinary(struct binary_s *binp)
if (fd < 0)
{
int errval = get_errno();
- bdbg("ERROR: Failed to open binary %s: %d\n", binp->filename, errval);
+ berr("ERROR: Failed to open binary %s: %d\n", binp->filename, errval);
return -errval;
}
@@ -115,7 +115,7 @@ static int builtin_loadbinary(struct binary_s *binp)
if (ret < 0)
{
int errval = get_errno();
- bdbg("ERROR: FIOC_FILENAME ioctl failed: %d\n", errval);
+ berr("ERROR: FIOC_FILENAME ioctl failed: %d\n", errval);
close(fd);
return -errval;
}
@@ -128,7 +128,7 @@ static int builtin_loadbinary(struct binary_s *binp)
if (index < 0)
{
int errval = get_errno();
- bdbg("ERROR: %s is not a builtin application\n", filename);
+ berr("ERROR: %s is not a builtin application\n", filename);
close(fd);
return -errval;
@@ -171,12 +171,12 @@ int builtin_initialize(void)
/* Register ourselves as a binfmt loader */
- bvdbg("Registering Builtin Loader\n");
+ binfo("Registering Builtin Loader\n");
ret = register_binfmt(&g_builtin_binfmt);
if (ret != 0)
{
- bdbg("Failed to register binfmt: %d\n", ret);
+ berr("Failed to register binfmt: %d\n", ret);
}
return ret;
diff --git a/binfmt/elf.c b/binfmt/elf.c
index 7291389ebade37dbbcddd933ccfcd75cdef41df3..37b1e117cd4f4271fe461921ff9318de47a0cc0a 100644
--- a/binfmt/elf.c
+++ b/binfmt/elf.c
@@ -60,11 +60,11 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_BINFMT have to be
+/* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_BINFMT have to be
* defined or CONFIG_ELF_DUMPBUFFER does nothing.
*/
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_DEBUG_BINFMT)
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_DEBUG_BINFMT)
# undef CONFIG_ELF_DUMPBUFFER
#endif
@@ -73,7 +73,7 @@
#endif
#ifdef CONFIG_ELF_DUMPBUFFER
-# define elf_dumpbuffer(m,b,n) bvdbgdumpbuffer(m,b,n)
+# define elf_dumpbuffer(m,b,n) binfodumpbuffer(m,b,n)
#else
# define elf_dumpbuffer(m,b,n)
#endif
@@ -87,7 +87,7 @@
****************************************************************************/
static int elf_loadbinary(FAR struct binary_s *binp);
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_BINFMT)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_BINFMT)
static void elf_dumploadinfo(FAR struct elf_loadinfo_s *loadinfo);
#endif
@@ -110,63 +110,63 @@ static struct binfmt_s g_elfbinfmt =
* Name: elf_dumploadinfo
****************************************************************************/
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_BINFMT)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_BINFMT)
static void elf_dumploadinfo(FAR struct elf_loadinfo_s *loadinfo)
{
int i;
- bdbg("LOAD_INFO:\n");
- bdbg(" textalloc: %08lx\n", (long)loadinfo->textalloc);
- bdbg(" dataalloc: %08lx\n", (long)loadinfo->dataalloc);
- bdbg(" textsize: %ld\n", (long)loadinfo->textsize);
- bdbg(" datasize: %ld\n", (long)loadinfo->datasize);
- bdbg(" filelen: %ld\n", (long)loadinfo->filelen);
+ berr("LOAD_INFO:\n");
+ berr(" textalloc: %08lx\n", (long)loadinfo->textalloc);
+ berr(" dataalloc: %08lx\n", (long)loadinfo->dataalloc);
+ berr(" textsize: %ld\n", (long)loadinfo->textsize);
+ berr(" datasize: %ld\n", (long)loadinfo->datasize);
+ berr(" filelen: %ld\n", (long)loadinfo->filelen);
#ifdef CONFIG_BINFMT_CONSTRUCTORS
- bdbg(" ctoralloc: %08lx\n", (long)loadinfo->ctoralloc);
- bdbg(" ctors: %08lx\n", (long)loadinfo->ctors);
- bdbg(" nctors: %d\n", loadinfo->nctors);
- bdbg(" dtoralloc: %08lx\n", (long)loadinfo->dtoralloc);
- bdbg(" dtors: %08lx\n", (long)loadinfo->dtors);
- bdbg(" ndtors: %d\n", loadinfo->ndtors);
+ berr(" ctoralloc: %08lx\n", (long)loadinfo->ctoralloc);
+ berr(" ctors: %08lx\n", (long)loadinfo->ctors);
+ berr(" nctors: %d\n", loadinfo->nctors);
+ berr(" dtoralloc: %08lx\n", (long)loadinfo->dtoralloc);
+ berr(" dtors: %08lx\n", (long)loadinfo->dtors);
+ berr(" ndtors: %d\n", loadinfo->ndtors);
#endif
- bdbg(" filfd: %d\n", loadinfo->filfd);
- bdbg(" symtabidx: %d\n", loadinfo->symtabidx);
- bdbg(" strtabidx: %d\n", loadinfo->strtabidx);
+ berr(" filfd: %d\n", loadinfo->filfd);
+ berr(" symtabidx: %d\n", loadinfo->symtabidx);
+ berr(" strtabidx: %d\n", loadinfo->strtabidx);
- bdbg("ELF Header:\n");
- bdbg(" e_ident: %02x %02x %02x %02x\n",
+ berr("ELF Header:\n");
+ berr(" e_ident: %02x %02x %02x %02x\n",
loadinfo->ehdr.e_ident[0], loadinfo->ehdr.e_ident[1],
loadinfo->ehdr.e_ident[2], loadinfo->ehdr.e_ident[3]);
- bdbg(" e_type: %04x\n", loadinfo->ehdr.e_type);
- bdbg(" e_machine: %04x\n", loadinfo->ehdr.e_machine);
- bdbg(" e_version: %08x\n", loadinfo->ehdr.e_version);
- bdbg(" e_entry: %08lx\n", (long)loadinfo->ehdr.e_entry);
- bdbg(" e_phoff: %d\n", loadinfo->ehdr.e_phoff);
- bdbg(" e_shoff: %d\n", loadinfo->ehdr.e_shoff);
- bdbg(" e_flags: %08x\n" , loadinfo->ehdr.e_flags);
- bdbg(" e_ehsize: %d\n", loadinfo->ehdr.e_ehsize);
- bdbg(" e_phentsize: %d\n", loadinfo->ehdr.e_phentsize);
- bdbg(" e_phnum: %d\n", loadinfo->ehdr.e_phnum);
- bdbg(" e_shentsize: %d\n", loadinfo->ehdr.e_shentsize);
- bdbg(" e_shnum: %d\n", loadinfo->ehdr.e_shnum);
- bdbg(" e_shstrndx: %d\n", loadinfo->ehdr.e_shstrndx);
+ berr(" e_type: %04x\n", loadinfo->ehdr.e_type);
+ berr(" e_machine: %04x\n", loadinfo->ehdr.e_machine);
+ berr(" e_version: %08x\n", loadinfo->ehdr.e_version);
+ berr(" e_entry: %08lx\n", (long)loadinfo->ehdr.e_entry);
+ berr(" e_phoff: %d\n", loadinfo->ehdr.e_phoff);
+ berr(" e_shoff: %d\n", loadinfo->ehdr.e_shoff);
+ berr(" e_flags: %08x\n" , loadinfo->ehdr.e_flags);
+ berr(" e_ehsize: %d\n", loadinfo->ehdr.e_ehsize);
+ berr(" e_phentsize: %d\n", loadinfo->ehdr.e_phentsize);
+ berr(" e_phnum: %d\n", loadinfo->ehdr.e_phnum);
+ berr(" e_shentsize: %d\n", loadinfo->ehdr.e_shentsize);
+ berr(" e_shnum: %d\n", loadinfo->ehdr.e_shnum);
+ berr(" e_shstrndx: %d\n", loadinfo->ehdr.e_shstrndx);
if (loadinfo->shdr && loadinfo->ehdr.e_shnum > 0)
{
for (i = 0; i < loadinfo->ehdr.e_shnum; i++)
{
FAR Elf32_Shdr *shdr = &loadinfo->shdr[i];
- bdbg("Sections %d:\n", i);
- bdbg(" sh_name: %08x\n", shdr->sh_name);
- bdbg(" sh_type: %08x\n", shdr->sh_type);
- bdbg(" sh_flags: %08x\n", shdr->sh_flags);
- bdbg(" sh_addr: %08x\n", shdr->sh_addr);
- bdbg(" sh_offset: %d\n", shdr->sh_offset);
- bdbg(" sh_size: %d\n", shdr->sh_size);
- bdbg(" sh_link: %d\n", shdr->sh_link);
- bdbg(" sh_info: %d\n", shdr->sh_info);
- bdbg(" sh_addralign: %d\n", shdr->sh_addralign);
- bdbg(" sh_entsize: %d\n", shdr->sh_entsize);
+ berr("Sections %d:\n", i);
+ berr(" sh_name: %08x\n", shdr->sh_name);
+ berr(" sh_type: %08x\n", shdr->sh_type);
+ berr(" sh_flags: %08x\n", shdr->sh_flags);
+ berr(" sh_addr: %08x\n", shdr->sh_addr);
+ berr(" sh_offset: %d\n", shdr->sh_offset);
+ berr(" sh_size: %d\n", shdr->sh_size);
+ berr(" sh_link: %d\n", shdr->sh_link);
+ berr(" sh_info: %d\n", shdr->sh_info);
+ berr(" sh_addralign: %d\n", shdr->sh_addralign);
+ berr(" sh_entsize: %d\n", shdr->sh_entsize);
}
}
}
@@ -193,7 +193,7 @@ static void elf_dumpentrypt(FAR struct binary_s *binp,
ret = elf_addrenv_select(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: elf_addrenv_select() failed: %d\n", ret);
+ berr("ERROR: elf_addrenv_select() failed: %d\n", ret);
return;
}
#endif
@@ -207,7 +207,7 @@ static void elf_dumpentrypt(FAR struct binary_s *binp,
ret = elf_addrenv_restore(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: elf_addrenv_restore() failed: %d\n", ret);
+ berr("ERROR: elf_addrenv_restore() failed: %d\n", ret);
}
#endif
}
@@ -229,7 +229,7 @@ static int elf_loadbinary(FAR struct binary_s *binp)
struct elf_loadinfo_s loadinfo; /* Contains globals for libelf */
int ret;
- bvdbg("Loading file: %s\n", binp->filename);
+ binfo("Loading file: %s\n", binp->filename);
/* Initialize the ELF library to load the program binary. */
@@ -237,7 +237,7 @@ static int elf_loadbinary(FAR struct binary_s *binp)
elf_dumploadinfo(&loadinfo);
if (ret != 0)
{
- bdbg("Failed to initialize for load of ELF program: %d\n", ret);
+ berr("Failed to initialize for load of ELF program: %d\n", ret);
goto errout;
}
@@ -247,7 +247,7 @@ static int elf_loadbinary(FAR struct binary_s *binp)
elf_dumploadinfo(&loadinfo);
if (ret != 0)
{
- bdbg("Failed to load ELF program binary: %d\n", ret);
+ berr("Failed to load ELF program binary: %d\n", ret);
goto errout_with_init;
}
@@ -256,7 +256,7 @@ static int elf_loadbinary(FAR struct binary_s *binp)
ret = elf_bind(&loadinfo, binp->exports, binp->nexports);
if (ret != 0)
{
- bdbg("Failed to bind symbols program binary: %d\n", ret);
+ berr("Failed to bind symbols program binary: %d\n", ret);
goto errout_with_load;
}
@@ -338,12 +338,12 @@ int elf_initialize(void)
/* Register ourselves as a binfmt loader */
- bvdbg("Registering ELF\n");
+ binfo("Registering ELF\n");
ret = register_binfmt(&g_elfbinfmt);
if (ret != 0)
{
- bdbg("Failed to register binfmt: %d\n", ret);
+ berr("Failed to register binfmt: %d\n", ret);
}
return ret;
diff --git a/binfmt/libelf/Kconfig b/binfmt/libelf/Kconfig
index 4437914ec3988223b15f329935dd2b94b5d3b8e9..684eaba8bef4841c22c138b429a681af92ec26bd 100644
--- a/binfmt/libelf/Kconfig
+++ b/binfmt/libelf/Kconfig
@@ -35,7 +35,7 @@ config ELF_BUFFERINCR
config ELF_DUMPBUFFER
bool "Dump ELF buffers"
default n
- depends on DEBUG && DEBUG_VERBOSE
+ depends on DEBUG_FEATURES && CONFIG_DEBUG_INFO
---help---
Dump various ELF buffers for debug purposes
diff --git a/binfmt/libelf/libelf_addrenv.c b/binfmt/libelf/libelf_addrenv.c
index 3c01279b2c2b7d959978df03ad88f5b733754896..5e358f58e47455b69512a3cc5aa5abf6a80de2d5 100644
--- a/binfmt/libelf/libelf_addrenv.c
+++ b/binfmt/libelf/libelf_addrenv.c
@@ -101,7 +101,7 @@ int elf_addrenv_alloc(FAR struct elf_loadinfo_s *loadinfo, size_t textsize,
ret = up_addrenv_create(textsize, datasize, heapsize, &loadinfo->addrenv);
if (ret < 0)
{
- bdbg("ERROR: up_addrenv_create failed: %d\n", ret);
+ berr("ERROR: up_addrenv_create failed: %d\n", ret);
return ret;
}
@@ -114,14 +114,14 @@ int elf_addrenv_alloc(FAR struct elf_loadinfo_s *loadinfo, size_t textsize,
ret = up_addrenv_vtext(&loadinfo->addrenv, &vtext);
if (ret < 0)
{
- bdbg("ERROR: up_addrenv_vtext failed: %d\n", ret);
+ berr("ERROR: up_addrenv_vtext failed: %d\n", ret);
return ret;
}
ret = up_addrenv_vdata(&loadinfo->addrenv, textsize, &vdata);
if (ret < 0)
{
- bdbg("ERROR: up_adup_addrenv_vdatadrenv_vtext failed: %d\n", ret);
+ berr("ERROR: up_adup_addrenv_vdatadrenv_vtext failed: %d\n", ret);
return ret;
}
@@ -170,7 +170,7 @@ void elf_addrenv_free(FAR struct elf_loadinfo_s *loadinfo)
ret = up_addrenv_destroy(&loadinfo->addrenv);
if (ret < 0)
{
- bdbg("ERROR: up_addrenv_destroy failed: %d\n", ret);
+ berr("ERROR: up_addrenv_destroy failed: %d\n", ret);
}
#else
/* If there is an allocation for the ELF image, free it */
diff --git a/binfmt/libelf/libelf_bind.c b/binfmt/libelf/libelf_bind.c
index a4fd589613bc1d222acefb27f04e1c7b37f35d6c..5239f0523c72c513291e67fc6e097d5f6bbe7acd 100644
--- a/binfmt/libelf/libelf_bind.c
+++ b/binfmt/libelf/libelf_bind.c
@@ -55,11 +55,11 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_BINFMT have to be
+/* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_BINFMT have to be
* defined or CONFIG_ELF_DUMPBUFFER does nothing.
*/
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_DEBUG_BINFMT)
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_DEBUG_BINFMT)
# undef CONFIG_ELF_DUMPBUFFER
#endif
@@ -68,7 +68,7 @@
#endif
#ifdef CONFIG_ELF_DUMPBUFFER
-# define elf_dumpbuffer(m,b,n) bvdbgdumpbuffer(m,b,n)
+# define elf_dumpbuffer(m,b,n) binfodumpbuffer(m,b,n)
#else
# define elf_dumpbuffer(m,b,n)
#endif
@@ -103,7 +103,7 @@ static inline int elf_readrel(FAR struct elf_loadinfo_s *loadinfo,
if (index < 0 || index > (relsec->sh_size / sizeof(Elf32_Rel)))
{
- bdbg("Bad relocation symbol index: %d\n", index);
+ berr("Bad relocation symbol index: %d\n", index);
return -EINVAL;
}
@@ -156,7 +156,7 @@ static int elf_relocate(FAR struct elf_loadinfo_s *loadinfo, int relidx,
ret = elf_readrel(loadinfo, relsec, i, &rel);
if (ret < 0)
{
- bdbg("Section %d reloc %d: Failed to read relocation entry: %d\n",
+ berr("Section %d reloc %d: Failed to read relocation entry: %d\n",
relidx, i, ret);
return ret;
}
@@ -172,7 +172,7 @@ static int elf_relocate(FAR struct elf_loadinfo_s *loadinfo, int relidx,
ret = elf_readsym(loadinfo, symidx, &sym);
if (ret < 0)
{
- bdbg("Section %d reloc %d: Failed to read symbol[%d]: %d\n",
+ berr("Section %d reloc %d: Failed to read symbol[%d]: %d\n",
relidx, i, symidx, ret);
return ret;
}
@@ -194,13 +194,13 @@ static int elf_relocate(FAR struct elf_loadinfo_s *loadinfo, int relidx,
if (ret == -ESRCH)
{
- bdbg("Section %d reloc %d: Undefined symbol[%d] has no name: %d\n",
+ berr("Section %d reloc %d: Undefined symbol[%d] has no name: %d\n",
relidx, i, symidx, ret);
psym = NULL;
}
else
{
- bdbg("Section %d reloc %d: Failed to get value of symbol[%d]: %d\n",
+ berr("Section %d reloc %d: Failed to get value of symbol[%d]: %d\n",
relidx, i, symidx, ret);
return ret;
}
@@ -210,7 +210,7 @@ static int elf_relocate(FAR struct elf_loadinfo_s *loadinfo, int relidx,
if (rel.r_offset < 0 || rel.r_offset > dstsec->sh_size - sizeof(uint32_t))
{
- bdbg("Section %d reloc %d: Relocation address out of range, offset %d size %d\n",
+ berr("Section %d reloc %d: Relocation address out of range, offset %d size %d\n",
relidx, i, rel.r_offset, dstsec->sh_size);
return -EINVAL;
}
@@ -222,7 +222,7 @@ static int elf_relocate(FAR struct elf_loadinfo_s *loadinfo, int relidx,
ret = up_relocate(&rel, psym, addr);
if (ret < 0)
{
- bdbg("ERROR: Section %d reloc %d: Relocation failed: %d\n", relidx, i, ret);
+ berr("ERROR: Section %d reloc %d: Relocation failed: %d\n", relidx, i, ret);
return ret;
}
}
@@ -233,7 +233,7 @@ static int elf_relocate(FAR struct elf_loadinfo_s *loadinfo, int relidx,
static int elf_relocateadd(FAR struct elf_loadinfo_s *loadinfo, int relidx,
FAR const struct symtab_s *exports, int nexports)
{
- bdbg("Not implemented\n");
+ berr("Not implemented\n");
return -ENOSYS;
}
@@ -278,7 +278,7 @@ int elf_bind(FAR struct elf_loadinfo_s *loadinfo,
ret = elf_allocbuffer(loadinfo);
if (ret < 0)
{
- bdbg("elf_allocbuffer failed: %d\n", ret);
+ berr("elf_allocbuffer failed: %d\n", ret);
return -ENOMEM;
}
@@ -291,7 +291,7 @@ int elf_bind(FAR struct elf_loadinfo_s *loadinfo,
ret = elf_addrenv_select(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: elf_addrenv_select() failed: %d\n", ret);
+ berr("ERROR: elf_addrenv_select() failed: %d\n", ret);
return ret;
}
#endif
@@ -352,7 +352,7 @@ int elf_bind(FAR struct elf_loadinfo_s *loadinfo,
status = elf_addrenv_restore(loadinfo);
if (status < 0)
{
- bdbg("ERROR: elf_addrenv_restore() failed: %d\n", status);
+ berr("ERROR: elf_addrenv_restore() failed: %d\n", status);
if (ret == OK)
{
ret = status;
diff --git a/binfmt/libelf/libelf_ctors.c b/binfmt/libelf/libelf_ctors.c
index 95f3884135f67bc6aae2b6a92ff7cf72baf82eb3..b957038bc3a0cbbb80697d6ee5c33b09014df02f 100644
--- a/binfmt/libelf/libelf_ctors.c
+++ b/binfmt/libelf/libelf_ctors.c
@@ -103,7 +103,7 @@ int elf_loadctors(FAR struct elf_loadinfo_s *loadinfo)
ret = elf_allocbuffer(loadinfo);
if (ret < 0)
{
- bdbg("elf_allocbuffer failed: %d\n", ret);
+ berr("elf_allocbuffer failed: %d\n", ret);
return -ENOMEM;
}
@@ -121,7 +121,7 @@ int elf_loadctors(FAR struct elf_loadinfo_s *loadinfo)
* static constructor section.
*/
- bvdbg("elf_findsection .ctors section failed: %d\n", ctoridx);
+ binfo("elf_findsection .ctors section failed: %d\n", ctoridx);
return ret == -ENOENT ? OK : ret;
}
@@ -138,7 +138,7 @@ int elf_loadctors(FAR struct elf_loadinfo_s *loadinfo)
ctorsize = shdr->sh_size;
loadinfo->nctors = ctorsize / sizeof(binfmt_ctor_t);
- bvdbg("ctoridx=%d ctorsize=%d sizeof(binfmt_ctor_t)=%d nctors=%d\n",
+ binfo("ctoridx=%d ctorsize=%d sizeof(binfmt_ctor_t)=%d nctors=%d\n",
ctoridx, ctorsize, sizeof(binfmt_ctor_t), loadinfo->nctors);
/* Check if there are any constructors. It is not an error if there
@@ -166,7 +166,7 @@ int elf_loadctors(FAR struct elf_loadinfo_s *loadinfo)
loadinfo->ctoralloc = (binfmt_ctor_t *)kumm_malloc(ctorsize);
if (!loadinfo->ctoralloc)
{
- bdbg("Failed to allocate memory for .ctors\n");
+ berr("Failed to allocate memory for .ctors\n");
return -ENOMEM;
}
@@ -178,7 +178,7 @@ int elf_loadctors(FAR struct elf_loadinfo_s *loadinfo)
shdr->sh_offset);
if (ret < 0)
{
- bdbg("Failed to allocate .ctors: %d\n", ret);
+ berr("Failed to allocate .ctors: %d\n", ret);
return ret;
}
@@ -191,7 +191,7 @@ int elf_loadctors(FAR struct elf_loadinfo_s *loadinfo)
{
FAR uintptr_t *ptr = (uintptr_t *)((FAR void *)(&loadinfo->ctors)[i]);
- bvdbg("ctor %d: %08lx + %08lx = %08lx\n",
+ binfo("ctor %d: %08lx + %08lx = %08lx\n",
i, *ptr, (unsigned long)loadinfo->textalloc,
(unsigned long)(*ptr + loadinfo->textalloc));
diff --git a/binfmt/libelf/libelf_dtors.c b/binfmt/libelf/libelf_dtors.c
index 1f4cdab7e3e27cf673f4bf90e05f2c51d34f67b1..6d0b0cff1a449f6a200584adcb955b66d130fbef 100644
--- a/binfmt/libelf/libelf_dtors.c
+++ b/binfmt/libelf/libelf_dtors.c
@@ -103,7 +103,7 @@ int elf_loaddtors(FAR struct elf_loadinfo_s *loadinfo)
ret = elf_allocbuffer(loadinfo);
if (ret < 0)
{
- bdbg("elf_allocbuffer failed: %d\n", ret);
+ berr("elf_allocbuffer failed: %d\n", ret);
return -ENOMEM;
}
@@ -121,7 +121,7 @@ int elf_loaddtors(FAR struct elf_loadinfo_s *loadinfo)
* static destructor section.
*/
- bvdbg("elf_findsection .dtors section failed: %d\n", dtoridx);
+ binfo("elf_findsection .dtors section failed: %d\n", dtoridx);
return ret == -ENOENT ? OK : ret;
}
@@ -138,7 +138,7 @@ int elf_loaddtors(FAR struct elf_loadinfo_s *loadinfo)
dtorsize = shdr->sh_size;
loadinfo->ndtors = dtorsize / sizeof(binfmt_dtor_t);
- bvdbg("dtoridx=%d dtorsize=%d sizeof(binfmt_dtor_t)=%d ndtors=%d\n",
+ binfo("dtoridx=%d dtorsize=%d sizeof(binfmt_dtor_t)=%d ndtors=%d\n",
dtoridx, dtorsize, sizeof(binfmt_dtor_t), loadinfo->ndtors);
/* Check if there are any destructors. It is not an error if there
@@ -166,7 +166,7 @@ int elf_loaddtors(FAR struct elf_loadinfo_s *loadinfo)
loadinfo->ctoralloc = (binfmt_dtor_t *)kumm_malloc(dtorsize);
if (!loadinfo->ctoralloc)
{
- bdbg("Failed to allocate memory for .dtors\n");
+ berr("Failed to allocate memory for .dtors\n");
return -ENOMEM;
}
@@ -178,7 +178,7 @@ int elf_loaddtors(FAR struct elf_loadinfo_s *loadinfo)
shdr->sh_offset);
if (ret < 0)
{
- bdbg("Failed to allocate .dtors: %d\n", ret);
+ berr("Failed to allocate .dtors: %d\n", ret);
return ret;
}
@@ -191,7 +191,7 @@ int elf_loaddtors(FAR struct elf_loadinfo_s *loadinfo)
{
FAR uintptr_t *ptr = (uintptr_t *)((FAR void *)(&loadinfo->dtors)[i]);
- bvdbg("dtor %d: %08lx + %08lx = %08lx\n",
+ binfo("dtor %d: %08lx + %08lx = %08lx\n",
i, *ptr, (unsigned long)loadinfo->textalloc,
(unsigned long)(*ptr + loadinfo->textalloc));
diff --git a/binfmt/libelf/libelf_init.c b/binfmt/libelf/libelf_init.c
index 35414fca18371ada5ae84427e64863da73e52144..7307261df623eedaec37ecfde97ef1922c96a9d7 100644
--- a/binfmt/libelf/libelf_init.c
+++ b/binfmt/libelf/libelf_init.c
@@ -56,16 +56,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_BINFMT have to be
+/* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_BINFMT have to be
* defined or CONFIG_ELF_DUMPBUFFER does nothing.
*/
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_DEBUG_BINFMT)
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_DEBUG_BINFMT)
# undef CONFIG_ELF_DUMPBUFFER
#endif
#ifdef CONFIG_ELF_DUMPBUFFER
-# define elf_dumpbuffer(m,b,n) bvdbgdumpbuffer(m,b,n)
+# define elf_dumpbuffer(m,b,n) binfodumpbuffer(m,b,n)
#else
# define elf_dumpbuffer(m,b,n)
#endif
@@ -102,7 +102,7 @@ static inline int elf_filelen(FAR struct elf_loadinfo_s *loadinfo,
if (ret < 0)
{
int errval = errno;
- bdbg("Failed to stat file: %d\n", errval);
+ berr("Failed to stat file: %d\n", errval);
return -errval;
}
@@ -110,7 +110,7 @@ static inline int elf_filelen(FAR struct elf_loadinfo_s *loadinfo,
if (!S_ISREG(buf.st_mode))
{
- bdbg("Not a regular file. mode: %d\n", buf.st_mode);
+ berr("Not a regular file. mode: %d\n", buf.st_mode);
return -ENOENT;
}
@@ -145,7 +145,7 @@ int elf_init(FAR const char *filename, FAR struct elf_loadinfo_s *loadinfo)
{
int ret;
- bvdbg("filename: %s loadinfo: %p\n", filename, loadinfo);
+ binfo("filename: %s loadinfo: %p\n", filename, loadinfo);
/* Clear the load info structure */
@@ -156,7 +156,7 @@ int elf_init(FAR const char *filename, FAR struct elf_loadinfo_s *loadinfo)
ret = elf_filelen(loadinfo, filename);
if (ret < 0)
{
- bdbg("elf_filelen failed: %d\n", ret);
+ berr("elf_filelen failed: %d\n", ret);
return ret;
}
@@ -166,7 +166,7 @@ int elf_init(FAR const char *filename, FAR struct elf_loadinfo_s *loadinfo)
if (loadinfo->filfd < 0)
{
int errval = errno;
- bdbg("Failed to open ELF binary %s: %d\n", filename, errval);
+ berr("Failed to open ELF binary %s: %d\n", filename, errval);
return -errval;
}
@@ -175,7 +175,7 @@ int elf_init(FAR const char *filename, FAR struct elf_loadinfo_s *loadinfo)
ret = elf_read(loadinfo, (FAR uint8_t *)&loadinfo->ehdr, sizeof(Elf32_Ehdr), 0);
if (ret < 0)
{
- bdbg("Failed to read ELF header: %d\n", ret);
+ berr("Failed to read ELF header: %d\n", ret);
return ret;
}
@@ -193,7 +193,7 @@ int elf_init(FAR const char *filename, FAR struct elf_loadinfo_s *loadinfo)
* is not correctly formed.
*/
- bdbg("Bad ELF header: %d\n", ret);
+ berr("Bad ELF header: %d\n", ret);
return ret;
}
diff --git a/binfmt/libelf/libelf_iobuffer.c b/binfmt/libelf/libelf_iobuffer.c
index 6e97781a37afbf3b70f2db4bf7cee85d9d450f4d..29abb492deebbc862fcbce184512fcff4f4dc3b2 100644
--- a/binfmt/libelf/libelf_iobuffer.c
+++ b/binfmt/libelf/libelf_iobuffer.c
@@ -87,7 +87,7 @@ int elf_allocbuffer(FAR struct elf_loadinfo_s *loadinfo)
loadinfo->iobuffer = (FAR uint8_t *)kmm_malloc(CONFIG_ELF_BUFFERSIZE);
if (!loadinfo->iobuffer)
{
- bdbg("Failed to allocate an I/O buffer\n");
+ berr("Failed to allocate an I/O buffer\n");
return -ENOMEM;
}
@@ -123,7 +123,7 @@ int elf_reallocbuffer(FAR struct elf_loadinfo_s *loadinfo, size_t increment)
buffer = kmm_realloc((FAR void *)loadinfo->iobuffer, newsize);
if (!buffer)
{
- bdbg("Failed to reallocate the I/O buffer\n");
+ berr("Failed to reallocate the I/O buffer\n");
return -ENOMEM;
}
diff --git a/binfmt/libelf/libelf_load.c b/binfmt/libelf/libelf_load.c
index b5cef6c6e9c6ac25a88d92e568384cc548338c8d..5b589323f013535f4e899f9fce9ae979aa8cc724 100644
--- a/binfmt/libelf/libelf_load.c
+++ b/binfmt/libelf/libelf_load.c
@@ -156,7 +156,7 @@ static inline int elf_loadfile(FAR struct elf_loadinfo_s *loadinfo)
/* Read each section into memory that is marked SHF_ALLOC + SHT_NOBITS */
- bvdbg("Loaded sections:\n");
+ binfo("Loaded sections:\n");
text = (FAR uint8_t *)loadinfo->textalloc;
data = (FAR uint8_t *)loadinfo->dataalloc;
@@ -196,7 +196,7 @@ static inline int elf_loadfile(FAR struct elf_loadinfo_s *loadinfo)
ret = elf_read(loadinfo, *pptr, shdr->sh_size, shdr->sh_offset);
if (ret < 0)
{
- bdbg("ERROR: Failed to read section %d: %d\n", i, ret);
+ berr("ERROR: Failed to read section %d: %d\n", i, ret);
return ret;
}
}
@@ -212,7 +212,7 @@ static inline int elf_loadfile(FAR struct elf_loadinfo_s *loadinfo)
/* Update sh_addr to point to copy in memory */
- bvdbg("%d. %08lx->%08lx\n", i,
+ binfo("%d. %08lx->%08lx\n", i,
(unsigned long)shdr->sh_addr, (unsigned long)*pptr);
shdr->sh_addr = (uintptr_t)*pptr;
@@ -250,7 +250,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
#endif
int ret;
- bvdbg("loadinfo: %p\n", loadinfo);
+ binfo("loadinfo: %p\n", loadinfo);
DEBUGASSERT(loadinfo && loadinfo->filfd >= 0);
/* Load section headers into memory */
@@ -258,7 +258,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
ret = elf_loadshdrs(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: elf_loadshdrs failed: %d\n", ret);
+ berr("ERROR: elf_loadshdrs failed: %d\n", ret);
goto errout_with_buffers;
}
@@ -286,7 +286,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
ret = elf_addrenv_alloc(loadinfo, loadinfo->textsize, loadinfo->datasize, heapsize);
if (ret < 0)
{
- bdbg("ERROR: elf_addrenv_alloc() failed: %d\n", ret);
+ berr("ERROR: elf_addrenv_alloc() failed: %d\n", ret);
goto errout_with_buffers;
}
@@ -299,7 +299,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
ret = elf_addrenv_select(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: elf_addrenv_select() failed: %d\n", ret);
+ berr("ERROR: elf_addrenv_select() failed: %d\n", ret);
goto errout_with_buffers;
}
#endif
@@ -309,7 +309,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
ret = elf_loadfile(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: elf_loadfile failed: %d\n", ret);
+ berr("ERROR: elf_loadfile failed: %d\n", ret);
goto errout_with_addrenv;
}
@@ -319,14 +319,14 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
ret = elf_loadctors(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: elf_loadctors failed: %d\n", ret);
+ berr("ERROR: elf_loadctors failed: %d\n", ret);
goto errout_with_addrenv;
}
ret = elf_loaddtors(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: elf_loaddtors failed: %d\n", ret);
+ berr("ERROR: elf_loaddtors failed: %d\n", ret);
goto errout_with_addrenv;
}
#endif
@@ -335,7 +335,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
exidx = elf_findsection(loadinfo, CONFIG_ELF_EXIDX_SECTNAME);
if (exidx < 0)
{
- bvdbg("elf_findsection: Exception Index section not found: %d\n", exidx);
+ binfo("elf_findsection: Exception Index section not found: %d\n", exidx);
}
else
{
@@ -349,7 +349,7 @@ int elf_load(FAR struct elf_loadinfo_s *loadinfo)
ret = elf_addrenv_restore(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: elf_addrenv_restore() failed: %d\n", ret);
+ berr("ERROR: elf_addrenv_restore() failed: %d\n", ret);
goto errout_with_buffers;
}
#endif
diff --git a/binfmt/libelf/libelf_read.c b/binfmt/libelf/libelf_read.c
index 420c8f1808932c39f72164d98b7ad0976cd95ba0..cdadf4444e381bb753e6a7b3d18bd8a9bcf6a77a 100644
--- a/binfmt/libelf/libelf_read.c
+++ b/binfmt/libelf/libelf_read.c
@@ -115,7 +115,7 @@ int elf_read(FAR struct elf_loadinfo_s *loadinfo, FAR uint8_t *buffer,
ssize_t nbytes; /* Number of bytes read */
off_t rpos; /* Position returned by lseek */
- bvdbg("Read %ld bytes from offset %ld\n", (long)readsize, (long)offset);
+ binfo("Read %ld bytes from offset %ld\n", (long)readsize, (long)offset);
/* Loop until all of the requested data has been read. */
@@ -127,7 +127,7 @@ int elf_read(FAR struct elf_loadinfo_s *loadinfo, FAR uint8_t *buffer,
if (rpos != offset)
{
int errval = errno;
- bdbg("Failed to seek to position %lu: %d\n",
+ berr("Failed to seek to position %lu: %d\n",
(unsigned long)offset, errval);
return -errval;
}
@@ -143,14 +143,14 @@ int elf_read(FAR struct elf_loadinfo_s *loadinfo, FAR uint8_t *buffer,
if (errval != EINTR)
{
- bdbg("Read from offset %lu failed: %d\n",
+ berr("Read from offset %lu failed: %d\n",
(unsigned long)offset, errval);
return -errval;
}
}
else if (nbytes == 0)
{
- bdbg("Unexpected end of file\n");
+ berr("Unexpected end of file\n");
return -ENODATA;
}
else
diff --git a/binfmt/libelf/libelf_sections.c b/binfmt/libelf/libelf_sections.c
index 26189d72479788c3679de5e6cfef4e227b6a5964..8f4369d367dc3cc970534be20d450b9318d3750d 100644
--- a/binfmt/libelf/libelf_sections.c
+++ b/binfmt/libelf/libelf_sections.c
@@ -93,7 +93,7 @@ static inline int elf_sectname(FAR struct elf_loadinfo_s *loadinfo,
shstrndx = loadinfo->ehdr.e_shstrndx;
if (shstrndx == SHN_UNDEF)
{
- bdbg("No section header string table\n");
+ berr("No section header string table\n");
return -EINVAL;
}
@@ -126,7 +126,7 @@ static inline int elf_sectname(FAR struct elf_loadinfo_s *loadinfo,
{
if (loadinfo->filelen <= offset)
{
- bdbg("At end of file\n");
+ berr("At end of file\n");
return -EINVAL;
}
@@ -139,7 +139,7 @@ static inline int elf_sectname(FAR struct elf_loadinfo_s *loadinfo,
ret = elf_read(loadinfo, buffer, readlen, offset);
if (ret < 0)
{
- bdbg("Failed to read section name\n");
+ berr("Failed to read section name\n");
return ret;
}
@@ -159,7 +159,7 @@ static inline int elf_sectname(FAR struct elf_loadinfo_s *loadinfo,
ret = elf_reallocbuffer(loadinfo, CONFIG_ELF_BUFFERINCR);
if (ret < 0)
{
- bdbg("elf_reallocbuffer failed: %d\n", ret);
+ berr("elf_reallocbuffer failed: %d\n", ret);
return ret;
}
}
@@ -196,7 +196,7 @@ int elf_loadshdrs(FAR struct elf_loadinfo_s *loadinfo)
if (loadinfo->ehdr.e_shnum < 1)
{
- bdbg("No sections(?)\n");
+ berr("No sections(?)\n");
return -EINVAL;
}
@@ -205,7 +205,7 @@ int elf_loadshdrs(FAR struct elf_loadinfo_s *loadinfo)
shdrsize = (size_t)loadinfo->ehdr.e_shentsize * (size_t)loadinfo->ehdr.e_shnum;
if (loadinfo->ehdr.e_shoff + shdrsize > loadinfo->filelen)
{
- bdbg("Insufficent space in file for section header table\n");
+ berr("Insufficent space in file for section header table\n");
return -ESPIPE;
}
@@ -214,7 +214,7 @@ int elf_loadshdrs(FAR struct elf_loadinfo_s *loadinfo)
loadinfo->shdr = (FAR FAR Elf32_Shdr *)kmm_malloc(shdrsize);
if (!loadinfo->shdr)
{
- bdbg("Failed to allocate the section header table. Size: %ld\n",
+ berr("Failed to allocate the section header table. Size: %ld\n",
(long)shdrsize);
return -ENOMEM;
}
@@ -225,7 +225,7 @@ int elf_loadshdrs(FAR struct elf_loadinfo_s *loadinfo)
loadinfo->ehdr.e_shoff);
if (ret < 0)
{
- bdbg("Failed to read section header table: %d\n", ret);
+ berr("Failed to read section header table: %d\n", ret);
}
return ret;
@@ -264,13 +264,13 @@ int elf_findsection(FAR struct elf_loadinfo_s *loadinfo,
ret = elf_sectname(loadinfo, shdr);
if (ret < 0)
{
- bdbg("elf_sectname failed: %d\n", ret);
+ berr("elf_sectname failed: %d\n", ret);
return ret;
}
/* Check if the name of this section is 'sectname' */
- bvdbg("%d. Comparing \"%s\" and .\"%s\"\n",
+ binfo("%d. Comparing \"%s\" and .\"%s\"\n",
i, loadinfo->iobuffer, sectname);
if (strcmp((FAR const char *)loadinfo->iobuffer, sectname) == 0)
diff --git a/binfmt/libelf/libelf_symbols.c b/binfmt/libelf/libelf_symbols.c
index 17694815585b72ce7f6d63944cd7dc3b3789d606..ba67034e540f60c443e40afae96561965b7d572f 100644
--- a/binfmt/libelf/libelf_symbols.c
+++ b/binfmt/libelf/libelf_symbols.c
@@ -97,7 +97,7 @@ static int elf_symname(FAR struct elf_loadinfo_s *loadinfo,
if (sym->st_name == 0)
{
- bdbg("Symbol has no name\n");
+ berr("Symbol has no name\n");
return -ESRCH;
}
@@ -116,7 +116,7 @@ static int elf_symname(FAR struct elf_loadinfo_s *loadinfo,
{
if (loadinfo->filelen <= offset)
{
- bdbg("At end of file\n");
+ berr("At end of file\n");
return -EINVAL;
}
@@ -129,7 +129,7 @@ static int elf_symname(FAR struct elf_loadinfo_s *loadinfo,
ret = elf_read(loadinfo, buffer, readlen, offset);
if (ret < 0)
{
- bdbg("elf_read failed: %d\n", ret);
+ berr("elf_read failed: %d\n", ret);
return ret;
}
@@ -149,7 +149,7 @@ static int elf_symname(FAR struct elf_loadinfo_s *loadinfo,
ret = elf_reallocbuffer(loadinfo, CONFIG_ELF_BUFFERINCR);
if (ret < 0)
{
- bdbg("elf_reallocbuffer failed: %d\n", ret);
+ berr("elf_reallocbuffer failed: %d\n", ret);
return ret;
}
}
@@ -195,7 +195,7 @@ int elf_findsymtab(FAR struct elf_loadinfo_s *loadinfo)
if (loadinfo->symtabidx == 0)
{
- bdbg("No symbols in ELF file\n");
+ berr("No symbols in ELF file\n");
return -EINVAL;
}
@@ -229,7 +229,7 @@ int elf_readsym(FAR struct elf_loadinfo_s *loadinfo, int index,
if (index < 0 || index > (symtab->sh_size / sizeof(Elf32_Sym)))
{
- bdbg("Bad relocation symbol index: %d\n", index);
+ berr("Bad relocation symbol index: %d\n", index);
return -EINVAL;
}
@@ -278,7 +278,7 @@ int elf_symvalue(FAR struct elf_loadinfo_s *loadinfo, FAR Elf32_Sym *sym,
{
/* NuttX ELF modules should be compiled with -fno-common. */
- bdbg("SHN_COMMON: Re-compile with -fno-common\n");
+ berr("SHN_COMMON: Re-compile with -fno-common\n");
return -ENOSYS;
}
@@ -286,7 +286,7 @@ int elf_symvalue(FAR struct elf_loadinfo_s *loadinfo, FAR Elf32_Sym *sym,
{
/* st_value already holds the correct value */
- bvdbg("SHN_ABS: st_value=%08lx\n", (long)sym->st_value);
+ binfo("SHN_ABS: st_value=%08lx\n", (long)sym->st_value);
return OK;
}
@@ -303,7 +303,7 @@ int elf_symvalue(FAR struct elf_loadinfo_s *loadinfo, FAR Elf32_Sym *sym,
* indicate the nameless symbol.
*/
- bdbg("SHN_UNDEF: Failed to get symbol name: %d\n", ret);
+ berr("SHN_UNDEF: Failed to get symbol name: %d\n", ret);
return ret;
}
@@ -316,13 +316,13 @@ int elf_symvalue(FAR struct elf_loadinfo_s *loadinfo, FAR Elf32_Sym *sym,
#endif
if (!symbol)
{
- bdbg("SHN_UNDEF: Exported symbol \"%s\" not found\n", loadinfo->iobuffer);
+ berr("SHN_UNDEF: Exported symbol \"%s\" not found\n", loadinfo->iobuffer);
return -ENOENT;
}
/* Yes... add the exported symbol value to the ELF symbol table entry */
- bvdbg("SHN_ABS: name=%s %08x+%08x=%08x\n",
+ binfo("SHN_ABS: name=%s %08x+%08x=%08x\n",
loadinfo->iobuffer, sym->st_value, symbol->sym_value,
sym->st_value + symbol->sym_value);
@@ -334,7 +334,7 @@ int elf_symvalue(FAR struct elf_loadinfo_s *loadinfo, FAR Elf32_Sym *sym,
{
secbase = loadinfo->shdr[sym->st_shndx].sh_addr;
- bvdbg("Other: %08x+%08x=%08x\n",
+ binfo("Other: %08x+%08x=%08x\n",
sym->st_value, secbase, sym->st_value + secbase);
sym->st_value += secbase;
diff --git a/binfmt/libelf/libelf_verify.c b/binfmt/libelf/libelf_verify.c
index 015d9d39fe191d0ad9bd2b1c7f27e9b637c81db7..26cb51ae7c26f43f1f9e91e649992940a819d395 100644
--- a/binfmt/libelf/libelf_verify.c
+++ b/binfmt/libelf/libelf_verify.c
@@ -87,7 +87,7 @@ int elf_verifyheader(FAR const Elf32_Ehdr *ehdr)
{
if (!ehdr)
{
- bdbg("NULL ELF header!");
+ berr("NULL ELF header!");
return -ENOEXEC;
}
@@ -95,7 +95,7 @@ int elf_verifyheader(FAR const Elf32_Ehdr *ehdr)
if (memcmp(ehdr->e_ident, g_elfmagic, EI_MAGIC_SIZE) != 0)
{
- bvdbg("Not ELF magic {%02x, %02x, %02x, %02x}\n",
+ binfo("Not ELF magic {%02x, %02x, %02x, %02x}\n",
ehdr->e_ident[0], ehdr->e_ident[1], ehdr->e_ident[2], ehdr->e_ident[3]);
return -ENOEXEC;
}
@@ -104,7 +104,7 @@ int elf_verifyheader(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_type != ET_REL)
{
- bdbg("Not a relocatable file: e_type=%d\n", ehdr->e_type);
+ berr("Not a relocatable file: e_type=%d\n", ehdr->e_type);
return -EINVAL;
}
@@ -112,7 +112,7 @@ int elf_verifyheader(FAR const Elf32_Ehdr *ehdr)
if (up_checkarch(ehdr))
{
- bdbg("Not a supported architecture\n");
+ berr("Not a supported architecture\n");
return -ENOEXEC;
}
diff --git a/binfmt/libnxflat/Kconfig b/binfmt/libnxflat/Kconfig
index 0a11f8c083bbe390e385fb28329d6e54acbe0b46..6929b04296c350482a7a0926a833a145ab280107 100644
--- a/binfmt/libnxflat/Kconfig
+++ b/binfmt/libnxflat/Kconfig
@@ -6,4 +6,4 @@
config NXFLAT_DUMPBUFFER
bool "Dump NXFLAT buffers"
default n
- depends on DEBUG && DEBUG_VERBOSE
+ depends on DEBUG_FEATURES && CONFIG_DEBUG_INFO
diff --git a/binfmt/libnxflat/libnxflat_addrenv.c b/binfmt/libnxflat/libnxflat_addrenv.c
index 92840dc02d5369417db2e1dfb92be52089886637..9ca8add7cce40350736ecf9eb6236f283818ff3f 100644
--- a/binfmt/libnxflat/libnxflat_addrenv.c
+++ b/binfmt/libnxflat/libnxflat_addrenv.c
@@ -103,7 +103,7 @@ int nxflat_addrenv_alloc(FAR struct nxflat_loadinfo_s *loadinfo, size_t envsize)
dspace = (FAR struct dspace_s *)kmm_malloc(sizeof(struct dspace_s));
if (dspace == 0)
{
- bdbg("ERROR: Failed to allocate DSpace\n");
+ berr("ERROR: Failed to allocate DSpace\n");
return -ENOMEM;
}
@@ -124,7 +124,7 @@ int nxflat_addrenv_alloc(FAR struct nxflat_loadinfo_s *loadinfo, size_t envsize)
ret = up_addrenv_create(0, envsize, heapsize, &loadinfo->addrenv);
if (ret < 0)
{
- bdbg("ERROR: up_addrenv_create failed: %d\n", ret);
+ berr("ERROR: up_addrenv_create failed: %d\n", ret);
goto errout_with_dspace;
}
@@ -137,7 +137,7 @@ int nxflat_addrenv_alloc(FAR struct nxflat_loadinfo_s *loadinfo, size_t envsize)
ret = up_addrenv_vdata(&loadinfo->addrenv, 0, &vdata);
if (ret < 0)
{
- bdbg("ERROR: up_addrenv_vdata failed: %d\n", ret);
+ berr("ERROR: up_addrenv_vdata failed: %d\n", ret);
goto errout_with_addrenv;
}
@@ -148,7 +148,7 @@ int nxflat_addrenv_alloc(FAR struct nxflat_loadinfo_s *loadinfo, size_t envsize)
ret = up_addrenv_select(loadinfo->addrenv, &oldenv);
if (ret < 0)
{
- bdbg("ERROR: up_addrenv_select failed: %d\n", ret);
+ berr("ERROR: up_addrenv_select failed: %d\n", ret);
goto errout_with_addrenv;
}
@@ -157,7 +157,7 @@ int nxflat_addrenv_alloc(FAR struct nxflat_loadinfo_s *loadinfo, size_t envsize)
ret = up_addrenv_restore(oldenv);
if (ret < 0)
{
- bdbg("ERROR: up_addrenv_restore failed: %d\n", ret);
+ berr("ERROR: up_addrenv_restore failed: %d\n", ret);
goto errout_with_addrenv;
}
@@ -227,7 +227,7 @@ void nxflat_addrenv_free(FAR struct nxflat_loadinfo_s *loadinfo)
ret = up_addrenv_destroy(loadinfo->addrenv);
if (ret < 0)
{
- bdbg("ERROR: up_addrenv_destroy failed: %d\n", ret);
+ berr("ERROR: up_addrenv_destroy failed: %d\n", ret);
}
loadinfo->addrenv = 0;
diff --git a/binfmt/libnxflat/libnxflat_bind.c b/binfmt/libnxflat/libnxflat_bind.c
index 3c1709b2a5be2ee0bbb0a00debbf6fed82d3abaa..71c3b8d57d139f062db6062c2b780431dde3d84d 100644
--- a/binfmt/libnxflat/libnxflat_bind.c
+++ b/binfmt/libnxflat/libnxflat_bind.c
@@ -58,16 +58,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_BINFMT have to be
+/* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_BINFMT have to be
* defined or CONFIG_NXFLAT_DUMPBUFFER does nothing.
*/
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_DEBUG_BINFMT)
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_DEBUG_BINFMT)
# undef CONFIG_NXFLAT_DUMPBUFFER
#endif
#ifdef CONFIG_NXFLAT_DUMPBUFFER
-# define nxflat_dumpbuffer(m,b,n) bvdbgdumpbuffer(m,b,n)
+# define nxflat_dumpbuffer(m,b,n) binfodumpbuffer(m,b,n)
#else
# define nxflat_dumpbuffer(m,b,n)
#endif
@@ -104,20 +104,20 @@ static inline int nxflat_bindrel32i(FAR struct nxflat_loadinfo_s *loadinfo,
{
FAR uint32_t *addr;
- bvdbg("NXFLAT_RELOC_TYPE_REL32I Offset: %08x I-Space: %p\n",
+ binfo("NXFLAT_RELOC_TYPE_REL32I Offset: %08x I-Space: %p\n",
offset, loadinfo->ispace + sizeof(struct nxflat_hdr_s));
if (offset < loadinfo->dsize)
{
addr = (FAR uint32_t *)(offset + loadinfo->dspace->region);
- bvdbg(" Before: %08x\n", *addr);
+ binfo(" Before: %08x\n", *addr);
*addr += (uint32_t)(loadinfo->ispace + sizeof(struct nxflat_hdr_s));
- bvdbg(" After: %08x\n", *addr);
+ binfo(" After: %08x\n", *addr);
return OK;
}
else
{
- bdbg("Offset: %08 does not lie in D-Space size: %08x\n",
+ berr("Offset: %08 does not lie in D-Space size: %08x\n",
offset, loadinfo->dsize);
return -EINVAL;
}
@@ -143,20 +143,20 @@ static inline int nxflat_bindrel32d(FAR struct nxflat_loadinfo_s *loadinfo,
{
FAR uint32_t *addr;
- bvdbg("NXFLAT_RELOC_TYPE_REL32D Offset: %08x D-Space: %p\n",
+ binfo("NXFLAT_RELOC_TYPE_REL32D Offset: %08x D-Space: %p\n",
offset, loadinfo->dspace->region);
if (offset < loadinfo->dsize)
{
addr = (FAR uint32_t *)(offset + loadinfo->dspace->region);
- bvdbg(" Before: %08x\n", *addr);
+ binfo(" Before: %08x\n", *addr);
*addr += (uint32_t)(loadinfo->dspace->region);
- bvdbg(" After: %08x\n", *addr);
+ binfo(" After: %08x\n", *addr);
return OK;
}
else
{
- bdbg("Offset: %08 does not lie in D-Space size: %08x\n",
+ berr("Offset: %08 does not lie in D-Space size: %08x\n",
offset, loadinfo->dsize);
return -EINVAL;
}
@@ -185,20 +185,20 @@ static inline int nxflat_bindrel32id(FAR struct nxflat_loadinfo_s *loadinfo,
{
FAR uint32_t *addr;
- bvdbg("NXFLAT_RELOC_TYPE_REL32D Offset: %08x D-Space: %p\n",
+ binfo("NXFLAT_RELOC_TYPE_REL32D Offset: %08x D-Space: %p\n",
offset, loadinfo->dspace->region);
if (offset < loadinfo->dsize)
{
addr = (FAR uint32_t *)(offset + loadinfo->dspace->region);
- bvdbg(" Before: %08x\n", *addr);
+ binfo(" Before: %08x\n", *addr);
*addr += ((uint32_t)loadinfo->ispace - (uint32_t)(loadinfo->dspace->region));
- bvdbg(" After: %08x\n", *addr);
+ binfo(" After: %08x\n", *addr);
return OK;
}
else
{
- bdbg("Offset: %08 does not lie in D-Space size: %08x\n",
+ berr("Offset: %08 does not lie in D-Space size: %08x\n",
offset, loadinfo->dsize);
return -EINVAL;
}
@@ -237,7 +237,7 @@ static inline int nxflat_gotrelocs(FAR struct nxflat_loadinfo_s *loadinfo)
offset = ntohl(hdr->h_relocstart);
nrelocs = ntohs(hdr->h_reloccount);
- bvdbg("offset: %08lx nrelocs: %d\n", (long)offset, nrelocs);
+ binfo("offset: %08lx nrelocs: %d\n", (long)offset, nrelocs);
/* The value of the relocation list that we get from the header is a
* file offset. We will have to convert this to an offset into the
@@ -251,7 +251,7 @@ static inline int nxflat_gotrelocs(FAR struct nxflat_loadinfo_s *loadinfo)
relocs = (FAR struct nxflat_reloc_s *)
(offset - loadinfo->isize + loadinfo->dspace->region);
- bvdbg("isize: %08lx dpsace: %p relocs: %p\n",
+ binfo("isize: %08lx dpsace: %p relocs: %p\n",
(long)loadinfo->isize, loadinfo->dspace->region, relocs);
/* All relocations are performed within the D-Space allocation. If
@@ -265,7 +265,7 @@ static inline int nxflat_gotrelocs(FAR struct nxflat_loadinfo_s *loadinfo)
ret = nxflat_addrenv_select(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
+ berr("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
return ret;
}
#endif
@@ -329,7 +329,7 @@ static inline int nxflat_gotrelocs(FAR struct nxflat_loadinfo_s *loadinfo)
default:
{
- bdbg("ERROR: Unrecognized relocation type: %d\n", NXFLAT_RELOC_TYPE(reloc.r_info));
+ berr("ERROR: Unrecognized relocation type: %d\n", NXFLAT_RELOC_TYPE(reloc.r_info));
result = -EINVAL;
}
break;
@@ -359,7 +359,7 @@ static inline int nxflat_gotrelocs(FAR struct nxflat_loadinfo_s *loadinfo)
ret = nxflat_addrenv_restore(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
+ berr("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
}
#endif
@@ -405,7 +405,7 @@ static inline int nxflat_bindimports(FAR struct nxflat_loadinfo_s *loadinfo,
offset = ntohl(hdr->h_importsymbols);
nimports = ntohs(hdr->h_importcount);
- bvdbg("Imports offset: %08x nimports: %d\n", offset, nimports);
+ binfo("Imports offset: %08x nimports: %d\n", offset, nimports);
/* The import[] table resides within the D-Space allocation. If
* CONFIG_ARCH_ADDRENV=y, then that D-Space allocation lies in an address
@@ -418,7 +418,7 @@ static inline int nxflat_bindimports(FAR struct nxflat_loadinfo_s *loadinfo,
ret = nxflat_addrenv_select(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
+ berr("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
return ret;
}
#endif
@@ -450,7 +450,7 @@ static inline int nxflat_bindimports(FAR struct nxflat_loadinfo_s *loadinfo,
for (i = 0; i < nimports; i++)
{
- bvdbg("Import[%d] (%08p) offset: %08x func: %08x\n",
+ binfo("Import[%d] (%08p) offset: %08x func: %08x\n",
i, &imports[i], imports[i].i_funcname, imports[i].i_funcaddress);
/* Get a pointer to the imported symbol name. The name itself
@@ -473,7 +473,7 @@ static inline int nxflat_bindimports(FAR struct nxflat_loadinfo_s *loadinfo,
#endif
if (!symbol)
{
- bdbg("Exported symbol \"%s\" not found\n", symname);
+ berr("Exported symbol \"%s\" not found\n", symname);
#ifdef CONFIG_ARCH_ADDRENV
(void)nxflat_addrenv_restore(loadinfo);
#endif
@@ -484,7 +484,7 @@ static inline int nxflat_bindimports(FAR struct nxflat_loadinfo_s *loadinfo,
imports[i].i_funcaddress = (uint32_t)symbol->sym_value;
- bvdbg("Bound import[%d] (%08p) to export '%s' (%08x)\n",
+ binfo("Bound import[%d] (%08p) to export '%s' (%08x)\n",
i, &imports[i], symname, imports[i].i_funcaddress);
}
}
@@ -504,7 +504,7 @@ static inline int nxflat_bindimports(FAR struct nxflat_loadinfo_s *loadinfo,
ret = nxflat_addrenv_restore(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
+ berr("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
}
return ret;
@@ -542,7 +542,7 @@ static inline int nxflat_clearbss(FAR struct nxflat_loadinfo_s *loadinfo)
ret = nxflat_addrenv_select(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
+ berr("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
return ret;
}
#endif
@@ -558,7 +558,7 @@ static inline int nxflat_clearbss(FAR struct nxflat_loadinfo_s *loadinfo)
ret = nxflat_addrenv_restore(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
+ berr("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
}
return ret;
diff --git a/binfmt/libnxflat/libnxflat_init.c b/binfmt/libnxflat/libnxflat_init.c
index 52159c5f03199c9f29c4903c88cab884fb3c07df..eff6cd8b29dad8065a2e190cdb41b62edafd352f 100644
--- a/binfmt/libnxflat/libnxflat_init.c
+++ b/binfmt/libnxflat/libnxflat_init.c
@@ -54,16 +54,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_BINFMT have to be
+/* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_BINFMT have to be
* defined or CONFIG_NXFLAT_DUMPBUFFER does nothing.
*/
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_DEBUG_BINFMT)
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_DEBUG_BINFMT)
# undef CONFIG_NXFLAT_DUMPBUFFER
#endif
#ifdef CONFIG_NXFLAT_DUMPBUFFER
-# define nxflat_dumpbuffer(m,b,n) bvdbgdumpbuffer(m,b,n)
+# define nxflat_dumpbuffer(m,b,n) binfodumpbuffer(m,b,n)
#else
# define nxflat_dumpbuffer(m,b,n)
#endif
@@ -100,7 +100,7 @@ int nxflat_init(const char *filename, struct nxflat_loadinfo_s *loadinfo)
uint32_t bssend;
int ret;
- bvdbg("filename: %s loadinfo: %p\n", filename, loadinfo);
+ binfo("filename: %s loadinfo: %p\n", filename, loadinfo);
/* Clear the load info structure */
@@ -112,7 +112,7 @@ int nxflat_init(const char *filename, struct nxflat_loadinfo_s *loadinfo)
if (loadinfo->filfd < 0)
{
int errval = errno;
- bdbg("Failed to open NXFLAT binary %s: %d\n", filename, errval);
+ berr("Failed to open NXFLAT binary %s: %d\n", filename, errval);
return -errval;
}
@@ -122,7 +122,7 @@ int nxflat_init(const char *filename, struct nxflat_loadinfo_s *loadinfo)
sizeof(struct nxflat_hdr_s), 0);
if (ret < 0)
{
- bdbg("Failed to read NXFLAT header: %d\n", ret);
+ berr("Failed to read NXFLAT header: %d\n", ret);
return ret;
}
@@ -140,7 +140,7 @@ int nxflat_init(const char *filename, struct nxflat_loadinfo_s *loadinfo)
* done so.
*/
- bdbg("Bad NXFLAT header\n");
+ berr("Bad NXFLAT header\n");
return -ENOEXEC;
}
diff --git a/binfmt/libnxflat/libnxflat_load.c b/binfmt/libnxflat/libnxflat_load.c
index a3e49d3ce1d245f7397759dcc6bd548ff233cd9d..c849daf7de2e1e51203178df24f00e7a33b0efef 100644
--- a/binfmt/libnxflat/libnxflat_load.c
+++ b/binfmt/libnxflat/libnxflat_load.c
@@ -150,11 +150,11 @@ int nxflat_load(struct nxflat_loadinfo_s *loadinfo)
MAP_SHARED | MAP_FILE, loadinfo->filfd, 0);
if (loadinfo->ispace == (uint32_t)MAP_FAILED)
{
- bdbg("Failed to map NXFLAT ISpace: %d\n", errno);
+ berr("Failed to map NXFLAT ISpace: %d\n", errno);
return -errno;
}
- bvdbg("Mapped ISpace (%d bytes) at %08x\n", loadinfo->isize, loadinfo->ispace);
+ binfo("Mapped ISpace (%d bytes) at %08x\n", loadinfo->isize, loadinfo->ispace);
/* The following call allocate D-Space memory and will provide a pointer
* to the allocated (but still uninitialized) D-Space memory.
@@ -163,11 +163,11 @@ int nxflat_load(struct nxflat_loadinfo_s *loadinfo)
ret = nxflat_addrenv_alloc(loadinfo, loadinfo->dsize);
if (ret < 0)
{
- bdbg("ERROR: nxflat_addrenv_alloc() failed: %d\n", ret);
+ berr("ERROR: nxflat_addrenv_alloc() failed: %d\n", ret);
return ret;
}
- bvdbg("Allocated DSpace (%d bytes) at %p\n",
+ binfo("Allocated DSpace (%d bytes) at %p\n",
loadinfo->dsize, loadinfo->dspace->region);
/* If CONFIG_ARCH_ADDRENV=y, then the D-Space allocation lies in an address
@@ -180,7 +180,7 @@ int nxflat_load(struct nxflat_loadinfo_s *loadinfo)
ret = nxflat_addrenv_select(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
+ berr("ERROR: nxflat_addrenv_select() failed: %d\n", ret);
return ret;
}
#endif
@@ -193,11 +193,11 @@ int nxflat_load(struct nxflat_loadinfo_s *loadinfo)
dreadsize, doffset);
if (ret < 0)
{
- bdbg("Failed to read .data section: %d\n", ret);
+ berr("Failed to read .data section: %d\n", ret);
goto errout;
}
- bvdbg("TEXT: %08x Entry point offset: %08x Data offset: %08x\n",
+ binfo("TEXT: %08x Entry point offset: %08x Data offset: %08x\n",
loadinfo->ispace, loadinfo->entryoffs, doffset);
/* Restore the original address environment */
@@ -206,7 +206,7 @@ int nxflat_load(struct nxflat_loadinfo_s *loadinfo)
ret = nxflat_addrenv_restore(loadinfo);
if (ret < 0)
{
- bdbg("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
+ berr("ERROR: nxflat_addrenv_restore() failed: %d\n", ret);
return ret;
}
#endif
diff --git a/binfmt/libnxflat/libnxflat_read.c b/binfmt/libnxflat/libnxflat_read.c
index 023b7c07e4f8d07c54f263d6891a98dd0506ce1f..678dd6d67182e48f89da296d4c98694073fd2e2a 100644
--- a/binfmt/libnxflat/libnxflat_read.c
+++ b/binfmt/libnxflat/libnxflat_read.c
@@ -114,7 +114,7 @@ int nxflat_read(struct nxflat_loadinfo_s *loadinfo, char *buffer, int readsize,
int bytesleft; /* Number of bytes of .data left to read */
int bytesread; /* Total number of bytes read */
- bvdbg("Read %d bytes from offset %d\n", readsize, offset);
+ binfo("Read %d bytes from offset %d\n", readsize, offset);
/* Seek to the position in the object file where the initialized
* data is saved.
@@ -129,7 +129,7 @@ int nxflat_read(struct nxflat_loadinfo_s *loadinfo, char *buffer, int readsize,
if (rpos != offset)
{
int errval = errno;
- bdbg("Failed to seek to position %d: %d\n", offset, errval);
+ berr("Failed to seek to position %d: %d\n", offset, errval);
return -errval;
}
@@ -141,13 +141,13 @@ int nxflat_read(struct nxflat_loadinfo_s *loadinfo, char *buffer, int readsize,
int errval = errno;
if (errval != EINTR)
{
- bdbg("Read from offset %d failed: %d\n", offset, errval);
+ berr("Read from offset %d failed: %d\n", offset, errval);
return -errval;
}
}
else if (nbytes == 0)
{
- bdbg("Unexpected end of file\n");
+ berr("Unexpected end of file\n");
return -ENODATA;
}
else
diff --git a/binfmt/libnxflat/libnxflat_verify.c b/binfmt/libnxflat/libnxflat_verify.c
index e645fdf925c9be4bea96b0afab2f736b32fac91a..76d8354edf429ababce4ac4fa0cdcb86fcdee8c7 100644
--- a/binfmt/libnxflat/libnxflat_verify.c
+++ b/binfmt/libnxflat/libnxflat_verify.c
@@ -79,7 +79,7 @@ int nxflat_verifyheader(const struct nxflat_hdr_s *header)
{
if (!header)
{
- bdbg("NULL NXFLAT header!");
+ berr("NULL NXFLAT header!");
return -ENOEXEC;
}
@@ -91,7 +91,7 @@ int nxflat_verifyheader(const struct nxflat_hdr_s *header)
if (strncmp(header->h_magic, NXFLAT_MAGIC, 4) != 0)
{
- bdbg("Unrecognized magic=\"%c%c%c%c\"\n",
+ berr("Unrecognized magic=\"%c%c%c%c\"\n",
header->h_magic[0], header->h_magic[1],
header->h_magic[2], header->h_magic[3]);
return -ENOEXEC;
diff --git a/binfmt/libpcode/Kconfig b/binfmt/libpcode/Kconfig
index 92b09650ff20d84a61c04f4aeaea7a8719599113..c767aca7907483260428a2b60e4919580aca6744 100644
--- a/binfmt/libpcode/Kconfig
+++ b/binfmt/libpcode/Kconfig
@@ -64,6 +64,6 @@ endif # PCODE_TEST_FS
config PCODE_DUMPBUFFER
bool "Dump P-code buffers"
default n
- depends on DEBUG && DEBUG_VERBOSE
+ depends on DEBUG_FEATURES && CONFIG_DEBUG_INFO
---help---
Dump various P-code buffers for debug purposes
diff --git a/binfmt/libpcode/README.txt b/binfmt/libpcode/README.txt
index d0bbb4ffc3c8c45f76bbec78ae16f17d28c35098..d6cb606af7777b5e31bb8c81ba91dcb06c891155 100644
--- a/binfmt/libpcode/README.txt
+++ b/binfmt/libpcode/README.txt
@@ -96,9 +96,9 @@ Here is a simple test configuration using the NuttX simulator:
Debug options can also be enabled with:
- CONFIG_DEBUG=y
+ CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_BINFMT=y
- CONFIG_DEBUG_VERBOSE=y
+ CONFIG_DEBUG_INFO=y
4. In lieu of a a real test application, this Quick'n'Dirty patch can be used
to initialize the P-Code binary format:
diff --git a/binfmt/nxflat.c b/binfmt/nxflat.c
index 1c4b454ff99a003142e619a39f82cac8ac8f6c8e..c2f1c06f78b0f0385f73ea9f33f2317d480ee4b7 100644
--- a/binfmt/nxflat.c
+++ b/binfmt/nxflat.c
@@ -56,16 +56,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_BINFMT have to be
+/* CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO, and CONFIG_DEBUG_BINFMT have to be
* defined or CONFIG_NXFLAT_DUMPBUFFER does nothing.
*/
-#if !defined(CONFIG_DEBUG_VERBOSE) || !defined (CONFIG_DEBUG_BINFMT)
+#if !defined(CONFIG_DEBUG_INFO) || !defined (CONFIG_DEBUG_BINFMT)
# undef CONFIG_NXFLAT_DUMPBUFFER
#endif
#ifdef CONFIG_NXFLAT_DUMPBUFFER
-# define nxflat_dumpbuffer(m,b,n) bvdbgdumpbuffer(m,b,n)
+# define nxflat_dumpbuffer(m,b,n) binfodumpbuffer(m,b,n)
#else
# define nxflat_dumpbuffer(m,b,n)
#endif
@@ -79,7 +79,7 @@
****************************************************************************/
static int nxflat_loadbinary(struct binary_s *binp);
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_BINFMT)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_BINFMT)
static void nxflat_dumploadinfo(struct nxflat_loadinfo_s *loadinfo);
#endif
@@ -102,36 +102,36 @@ static struct binfmt_s g_nxflatbinfmt =
* Name: nxflat_dumploadinfo
****************************************************************************/
-#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_BINFMT)
+#if defined(CONFIG_DEBUG_FEATURES) && defined(CONFIG_DEBUG_BINFMT)
static void nxflat_dumploadinfo(struct nxflat_loadinfo_s *loadinfo)
{
unsigned long dsize = loadinfo->datasize + loadinfo->bsssize;
- bdbg("LOAD_INFO:\n");
- bdbg(" ISPACE:\n");
- bdbg(" ispace: %08lx\n", loadinfo->ispace);
- bdbg(" entryoffs: %08lx\n", loadinfo->entryoffs);
- bdbg(" isize: %08lx\n", loadinfo->isize);
+ berr("LOAD_INFO:\n");
+ berr(" ISPACE:\n");
+ berr(" ispace: %08lx\n", loadinfo->ispace);
+ berr(" entryoffs: %08lx\n", loadinfo->entryoffs);
+ berr(" isize: %08lx\n", loadinfo->isize);
- bdbg(" DSPACE:\n");
- bdbg(" dspace: %08lx\n", loadinfo->dspace);
+ berr(" DSPACE:\n");
+ berr(" dspace: %08lx\n", loadinfo->dspace);
if (loadinfo->dspace != NULL)
{
- bdbg(" crefs: %d\n", loadinfo->dspace->crefs);
- bdbg(" region: %08lx\n", loadinfo->dspace->region);
+ berr(" crefs: %d\n", loadinfo->dspace->crefs);
+ berr(" region: %08lx\n", loadinfo->dspace->region);
}
- bdbg(" datasize: %08lx\n", loadinfo->datasize);
- bdbg(" bsssize: %08lx\n", loadinfo->bsssize);
- bdbg(" (pad): %08lx\n", loadinfo->dsize - dsize);
- bdbg(" stacksize: %08lx\n", loadinfo->stacksize);
- bdbg(" dsize: %08lx\n", loadinfo->dsize);
-
- bdbg(" RELOCS:\n");
- bdbg(" relocstart: %08lx\n", loadinfo->relocstart);
- bdbg(" reloccount: %d\n", loadinfo->reloccount);
-
- bdbg(" HANDLES:\n");
- bdbg(" filfd: %d\n", loadinfo->filfd);
+ berr(" datasize: %08lx\n", loadinfo->datasize);
+ berr(" bsssize: %08lx\n", loadinfo->bsssize);
+ berr(" (pad): %08lx\n", loadinfo->dsize - dsize);
+ berr(" stacksize: %08lx\n", loadinfo->stacksize);
+ berr(" dsize: %08lx\n", loadinfo->dsize);
+
+ berr(" RELOCS:\n");
+ berr(" relocstart: %08lx\n", loadinfo->relocstart);
+ berr(" reloccount: %d\n", loadinfo->reloccount);
+
+ berr(" HANDLES:\n");
+ berr(" filfd: %d\n", loadinfo->filfd);
}
#else
# define nxflat_dumploadinfo(i)
@@ -151,7 +151,7 @@ static int nxflat_loadbinary(struct binary_s *binp)
struct nxflat_loadinfo_s loadinfo; /* Contains globals for libnxflat */
int ret;
- bvdbg("Loading file: %s\n", binp->filename);
+ binfo("Loading file: %s\n", binp->filename);
/* Initialize the xflat library to load the program binary. */
@@ -159,7 +159,7 @@ static int nxflat_loadbinary(struct binary_s *binp)
nxflat_dumploadinfo(&loadinfo);
if (ret != 0)
{
- bdbg("Failed to initialize for load of NXFLAT program: %d\n", ret);
+ berr("Failed to initialize for load of NXFLAT program: %d\n", ret);
goto errout;
}
@@ -169,7 +169,7 @@ static int nxflat_loadbinary(struct binary_s *binp)
nxflat_dumploadinfo(&loadinfo);
if (ret != 0)
{
- bdbg("Failed to load NXFLAT program binary: %d\n", ret);
+ berr("Failed to load NXFLAT program binary: %d\n", ret);
goto errout_with_init;
}
@@ -178,7 +178,7 @@ static int nxflat_loadbinary(struct binary_s *binp)
ret = nxflat_bind(&loadinfo, binp->exports, binp->nexports);
if (ret != 0)
{
- bdbg("Failed to bind symbols program binary: %d\n", ret);
+ berr("Failed to bind symbols program binary: %d\n", ret);
goto errout_with_load;
}
@@ -252,11 +252,11 @@ int nxflat_initialize(void)
/* Register ourselves as a binfmt loader */
- bvdbg("Registering NXFLAT\n");
+ binfo("Registering NXFLAT\n");
ret = register_binfmt(&g_nxflatbinfmt);
if (ret != 0)
{
- bdbg("Failed to register binfmt: %d\n", ret);
+ berr("Failed to register binfmt: %d\n", ret);
}
return ret;
}
diff --git a/binfmt/pcode.c b/binfmt/pcode.c
index 6023622440e0a23cf54000b6b38c068b89b4e8c8..3913d38ed5eab9e26f0b66f763e27dda0f2d7e0a 100644
--- a/binfmt/pcode.c
+++ b/binfmt/pcode.c
@@ -169,18 +169,18 @@ static int pcode_mount_testfs(void)
/* Create a ROM disk for the ROMFS filesystem */
- bvdbg("Registering romdisk at /dev/ram%d\n", CONFIG_PCODE_TEST_DEVMINOR);
+ binfo("Registering romdisk at /dev/ram%d\n", CONFIG_PCODE_TEST_DEVMINOR);
ret = romdisk_register(CONFIG_PCODE_TEST_DEVMINOR, (FAR uint8_t *)romfs_img,
NSECTORS(ROMFS_IMG_LEN), SECTORSIZE);
if (ret < 0)
{
- bdbg("ERROR: romdisk_register failed: %d\n", ret);
+ berr("ERROR: romdisk_register failed: %d\n", ret);
return ret;
}
/* Mount the test file system */
- bvdbg("Mounting ROMFS filesystem at target=%s with source=%s\n",
+ binfo("Mounting ROMFS filesystem at target=%s with source=%s\n",
CONFIG_PCODE_TEST_MOUNTPOINT, CONFIG_PCODE_TEST_DEVPATH);
ret = mount(CONFIG_PCODE_TEST_DEVPATH, CONFIG_PCODE_TEST_MOUNTPOINT,
@@ -190,7 +190,7 @@ static int pcode_mount_testfs(void)
int errval = get_errno();
DEBUGASSERT(errval > 0);
- bdbg("ERROR: mount(%s,%s,romfs) failed: %d\n",
+ berr("ERROR: mount(%s,%s,romfs) failed: %d\n",
CONFIG_PCODE_TEST_DEVPATH, CONFIG_PCODE_TEST_MOUNTPOINT, errval);
return -errval;
}
@@ -259,14 +259,14 @@ static int pcode_proxy(int argc, char **argv)
sem_post(&g_pcode_handoff.exclsem);
DEBUGASSERT(binp && fullpath);
- bvdbg("Executing %s\n", fullpath);
+ binfo("Executing %s\n", fullpath);
/* Set-up the on-exit handler that will unload the module on exit */
ret = on_exit(pcode_onexit, binp);
if (ret < 0)
{
- bdbg("ERROR: on_exit failed: %d\n", get_errno());
+ berr("ERROR: on_exit failed: %d\n", get_errno());
kmm_free(fullpath);
return EXIT_FAILURE;
}
@@ -283,7 +283,7 @@ static int pcode_proxy(int argc, char **argv)
if (ret < 0)
{
- bdbg("ERROR: Execution failed\n");
+ berr("ERROR: Execution failed\n");
return EXIT_FAILURE;
}
@@ -310,7 +310,7 @@ static int pcode_load(struct binary_s *binp)
int fd;
int ret;
- bvdbg("Loading file: %s\n", binp->filename);
+ binfo("Loading file: %s\n", binp->filename);
/* Open the binary file for reading (only) */
@@ -318,7 +318,7 @@ static int pcode_load(struct binary_s *binp)
if (fd < 0)
{
int errval = get_errno();
- bdbg("ERROR: Failed to open binary %s: %d\n", binp->filename, errval);
+ berr("ERROR: Failed to open binary %s: %d\n", binp->filename, errval);
return -errval;
}
@@ -341,12 +341,12 @@ static int pcode_load(struct binary_s *binp)
if (errval != EINTR)
{
- bdbg("ERROR: read failed: %d\n", errval);
+ berr("ERROR: read failed: %d\n", errval);
ret = -errval;
goto errout_with_fd;
}
- bdbg("Interrupted by a signal\n");
+ berr("Interrupted by a signal\n");
}
else
{
@@ -366,7 +366,7 @@ static int pcode_load(struct binary_s *binp)
if (memcmp(&hdr.fh_ident, FHI_POFF_MAG, 4) != 0 || hdr.fh_type != FHT_EXEC)
{
- dbg("ERROR: File is not a P-code executable: %d\n");
+ err("ERROR: File is not a P-code executable: %d\n");
ret = -ENOEXEC;
goto errout_with_fd;
}
@@ -399,7 +399,7 @@ static int pcode_load(struct binary_s *binp)
g_pcode_handoff.fullpath = strdup(binp->filename);
if (!g_pcode_handoff.fullpath)
{
- bdbg("ERROR: Failed to duplicate the full path: %d\n",
+ berr("ERROR: Failed to duplicate the full path: %d\n",
binp->filename);
sem_post(&g_pcode_handoff.exclsem);
@@ -473,18 +473,18 @@ int pcode_initialize(void)
ret = pcode_mount_testfs();
if (ret < 0)
{
- bdbg("ERROR: Failed to mount test file system: %d\n", ret);
+ berr("ERROR: Failed to mount test file system: %d\n", ret);
return ret;
}
/* Register ourselves as a binfmt loader */
- bvdbg("Registering P-Code Loader\n");
+ binfo("Registering P-Code Loader\n");
ret = register_binfmt(&g_pcode_binfmt);
if (ret != 0)
{
- bdbg("Failed to register binfmt: %d\n", ret);
+ berr("Failed to register binfmt: %d\n", ret);
}
return ret;
@@ -513,7 +513,7 @@ void pcode_uninitialize(void)
int errval = get_errno();
DEBUGASSERT(errval > 0);
- bdbg("ERROR: unregister_binfmt() failed: %d\n", errval);
+ berr("ERROR: unregister_binfmt() failed: %d\n", errval);
UNUSED(errval);
}
@@ -524,7 +524,7 @@ void pcode_uninitialize(void)
int errval = get_errno();
DEBUGASSERT(errval > 0);
- bdbg("ERROR: umount(%s) failed: %d\n", CONFIG_PCODE_TEST_MOUNTPOINT, errval);
+ berr("ERROR: umount(%s) failed: %d\n", CONFIG_PCODE_TEST_MOUNTPOINT, errval);
UNUSED(errval);
}
#endif
diff --git a/configs/README.txt b/configs/README.txt
index 45f06d0fa0e9ecee8389fe4244609b498b0e7852..3e44ef649c51a6d880360ae7dfc6a2ced84c41d5 100644
--- a/configs/README.txt
+++ b/configs/README.txt
@@ -123,7 +123,7 @@ Make.defs -- This makefile fragment provides architecture and
Definitions in the Make.defs file probably depend on some of the
settings in the .config file. For example, the CFLAGS will most likely be
- different if CONFIG_DEBUG=y.
+ different if CONFIG_DEBUG_FEATURES=y.
The included tools/Config.mk file contains additional definitions that may
be overriden in the architecture-specific Make.defs file as necessary:
diff --git a/configs/amber/hello/defconfig b/configs/amber/hello/defconfig
index 5c62c54f88638c70fe654a76da06daaaf6d0557d..f7862235e303a19d869aeed4ef48d86a9c8fccc2 100644
--- a/configs/amber/hello/defconfig
+++ b/configs/amber/hello/defconfig
@@ -42,7 +42,7 @@ CONFIG_INTELHEX_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/arduino-due/README.txt b/configs/arduino-due/README.txt
index e128fb71d6833652935a4dd83be9f934d7e0d9d0..e886b558898a263a2933fc5fd5ec4d8a49a6ff23 100644
--- a/configs/arduino-due/README.txt
+++ b/configs/arduino-due/README.txt
@@ -1072,8 +1072,8 @@ Configuration sub-directories
debug output on USART0 can be enabled with:
Build Setup:
- CONFIG_DEBUG=y : Enable debug features
- CONFIG_DEBUG_VERBOSE=y : Enable verbose debug output
+ CONFIG_DEBUG_FEATURES=y : Enable debug features
+ CONFIG_DEBUG_INFO=y : Enable verbose debug output
CONFIG_DEBUG_INPUT=y : Enable debug output from input devices
STATUS:
diff --git a/configs/arduino-due/nsh/defconfig b/configs/arduino-due/nsh/defconfig
index 51cf6e0923d956b47d0dbc93a61596e61c89a1f8..ed94d781749590355237bf1aaa8f8b57f455b433 100644
--- a/configs/arduino-due/nsh/defconfig
+++ b/configs/arduino-due/nsh/defconfig
@@ -42,7 +42,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/arduino-due/src/sam_autoleds.c b/configs/arduino-due/src/sam_autoleds.c
index 8921c2d04c5034f3354340e40f3d028ac88ce400..8fb0ea7104d124f42c01690f03e852b8b9864d75 100644
--- a/configs/arduino-due/src/sam_autoleds.c
+++ b/configs/arduino-due/src/sam_autoleds.c
@@ -95,16 +95,16 @@
* at approximately 2Hz, then a fatal error has been detected and the system
*/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/arduino-due/src/sam_mmcsd.c b/configs/arduino-due/src/sam_mmcsd.c
index 23787dd7dd146bc2942264a4eb81d6175167480c..b7556ea082fd422de719d79b0b1b83ac65b25428 100644
--- a/configs/arduino-due/src/sam_mmcsd.c
+++ b/configs/arduino-due/src/sam_mmcsd.c
@@ -254,31 +254,31 @@ int sam_sdinitialize(int minor)
/* Get the SPI driver instance for the SD chip select */
- fvdbg("Initializing bit bang SPI for the MMC/SD slot\n");
+ finfo("Initializing bit bang SPI for the MMC/SD slot\n");
spi = sam_mmcsd_spiinitialize();
if (!spi)
{
- fdbg("Failed to bit bang SPI for the MMC/SD slot\n");
+ ferr("ERROR: Failed to bit bang SPI for the MMC/SD slot\n");
return -ENODEV;
}
- fvdbg("Successfully initialized bit bang SPI for the MMC/SD slot\n");
+ finfo("Successfully initialized bit bang SPI for the MMC/SD slot\n");
/* Bind the SPI device for the chip select to the slot */
- fvdbg("Binding bit bang SPI device to MMC/SD slot %d\n",
+ finfo("Binding bit bang SPI device to MMC/SD slot %d\n",
SAM34_MMCSDSLOTNO);
ret = mmcsd_spislotinitialize(minor, SAM34_MMCSDSLOTNO, spi);
if (ret < 0)
{
- fdbg("Failed to bind bit bang SPI device to MMC/SD slot %d: %d\n",
+ ferr("ERROR: Failed to bind bit bang SPI device to MMC/SD slot %d: %d\n",
SAM34_MMCSDSLOTNO, ret);
return ret;
}
- fvdbg("Successfuly bound bit bang SPI device to MMC/SD slot %d\n",
+ finfo("Successfuly bound bit bang SPI device to MMC/SD slot %d\n",
SAM34_MMCSDSLOTNO);
return OK;
diff --git a/configs/arduino-due/src/sam_touchscreen.c b/configs/arduino-due/src/sam_touchscreen.c
index d2a2c408ff0bccf9ae1af08f9351826f03a2b25f..d16184a6cd0bf6dcaecd82865bf90168062f9762 100644
--- a/configs/arduino-due/src/sam_touchscreen.c
+++ b/configs/arduino-due/src/sam_touchscreen.c
@@ -266,7 +266,7 @@ static int tsc_attach(FAR struct ads7843e_config_s *state, xcpt_t isr)
{
/* Attach the XPT2046 interrupt */
- ivdbg("Attaching %p to IRQ %d\n", isr, SAM_TSC_IRQ);
+ iinfo("Attaching %p to IRQ %d\n", isr, SAM_TSC_IRQ);
return irq_attach(SAM_TSC_IRQ, isr);
}
@@ -274,7 +274,7 @@ static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable)
{
/* Attach and enable, or detach and disable */
- ivdbg("IRQ:%d enable:%d\n", SAM_TSC_IRQ, enable);
+ iinfo("IRQ:%d enable:%d\n", SAM_TSC_IRQ, enable);
if (enable)
{
sam_gpioirqenable(SAM_TSC_IRQ);
@@ -300,7 +300,7 @@ static bool tsc_pendown(FAR struct ads7843e_config_s *state)
/* The /PENIRQ value is active low */
bool pendown = !sam_gpioread(GPIO_TSC_IRQ);
- ivdbg("pendown:%d\n", pendown);
+ iinfo("pendown:%d\n", pendown);
return pendown;
}
@@ -359,7 +359,7 @@ int board_tsc_setup(int minor)
static bool initialized = false;
int ret;
- idbg("minor %d\n", minor);
+ iinfo("minor %d\n", minor);
DEBUGASSERT(minor == 0);
/* Have we already initialized? Since we never uninitialize we must prevent
@@ -383,7 +383,7 @@ int board_tsc_setup(int minor)
dev = sam_tsc_spiinitialize();
if (!dev)
{
- idbg("Failed to initialize bit bang SPI\n");
+ ierr("ERROR: Failed to initialize bit bang SPI\n");
return -ENODEV;
}
@@ -392,7 +392,7 @@ int board_tsc_setup(int minor)
ret = ads7843e_register(dev, &g_tscinfo, CONFIG_ADS7843E_DEVMINOR);
if (ret < 0)
{
- idbg("Failed to register touchscreen device\n");
+ ierr("ERROR: Failed to register touchscreen device\n");
/* up_spiuninitialize(dev); */
return -ENODEV;
}
diff --git a/configs/arduino-due/src/sam_userleds.c b/configs/arduino-due/src/sam_userleds.c
index b461812e50e698c5ca672a2f46cf5d5c41e1f7e7..f13ddd40cc86bca0834dae668ed9351ad5f8a52e 100644
--- a/configs/arduino-due/src/sam_userleds.c
+++ b/configs/arduino-due/src/sam_userleds.c
@@ -55,16 +55,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/arduino-mega2560/hello/defconfig b/configs/arduino-mega2560/hello/defconfig
index 4459053ee1b4d3a0f4c0f572801cc74a4d8e5bba..d710f55debb95273bd984b9e9b942bd355baaaf9 100644
--- a/configs/arduino-mega2560/hello/defconfig
+++ b/configs/arduino-mega2560/hello/defconfig
@@ -45,7 +45,7 @@ CONFIG_INTELHEX_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/arduino-mega2560/nsh/defconfig b/configs/arduino-mega2560/nsh/defconfig
index 9aee289d6d74ebb06b9e0d0423cb32a9211599ae..d9eca795de8762d6e284a95d32858a1e39e4ee3d 100644
--- a/configs/arduino-mega2560/nsh/defconfig
+++ b/configs/arduino-mega2560/nsh/defconfig
@@ -46,7 +46,7 @@ CONFIG_INTELHEX_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/avr32dev1/nsh/defconfig b/configs/avr32dev1/nsh/defconfig
index 0f87f20046180b408e1c452b5729e31394177f7c..a0846beb460f7f26b1154c486808bfdffd51c656 100644
--- a/configs/avr32dev1/nsh/defconfig
+++ b/configs/avr32dev1/nsh/defconfig
@@ -42,7 +42,7 @@ CONFIG_INTELHEX_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_STACKCHECK is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/avr32dev1/ostest/defconfig b/configs/avr32dev1/ostest/defconfig
index 6fc2eed59f499df469eb1dbcf28b7e6ca928afce..1342e4c2e7cb69fa516cfa49c89eb26fbf02f6ff 100644
--- a/configs/avr32dev1/ostest/defconfig
+++ b/configs/avr32dev1/ostest/defconfig
@@ -42,7 +42,7 @@ CONFIG_INTELHEX_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_STACKCHECK is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/c5471evm/httpd/Make.defs b/configs/c5471evm/httpd/Make.defs
index 9f465df52ca0c4fd8fb0bde972a07fb91639b7cd..aa491bb2bc750e87155b94edc1b1c32e19c192d8 100644
--- a/configs/c5471evm/httpd/Make.defs
+++ b/configs/c5471evm/httpd/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
endif
endif
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
ARCHOPTIMIZATION = -g
endif
@@ -115,7 +115,7 @@ EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
LDFLAGS += -g
endif
diff --git a/configs/c5471evm/httpd/defconfig b/configs/c5471evm/httpd/defconfig
index 895892b246254a3827f67f510eda2c4d4179a0a3..5f0118087a3e82b731f613d4975744f7f1e3c7f5 100644
--- a/configs/c5471evm/httpd/defconfig
+++ b/configs/c5471evm/httpd/defconfig
@@ -41,7 +41,7 @@ CONFIG_RRLOAD_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/c5471evm/nettest/Make.defs b/configs/c5471evm/nettest/Make.defs
index 909f21b08309edf54cb33c3c53e43bcf602f2731..0cd136c400e3c36bcd975dd59e5007128b134077 100644
--- a/configs/c5471evm/nettest/Make.defs
+++ b/configs/c5471evm/nettest/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
endif
endif
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
ARCHOPTIMIZATION = -g
endif
@@ -115,7 +115,7 @@ EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
LDFLAGS += -g
endif
diff --git a/configs/c5471evm/nettest/defconfig b/configs/c5471evm/nettest/defconfig
index 006c9b09b0e89ddf7920e41b39da206af722fdb8..ba47f3e2669586a01acc720817d501ccc06f81b8 100644
--- a/configs/c5471evm/nettest/defconfig
+++ b/configs/c5471evm/nettest/defconfig
@@ -41,7 +41,7 @@ CONFIG_RRLOAD_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/c5471evm/nsh/Make.defs b/configs/c5471evm/nsh/Make.defs
index 41fa4b2f25a6652100cdea4b890bdbc4b11720ed..9e22f8ef31ce5e7f2a54c8607cdb8f9c181693bf 100644
--- a/configs/c5471evm/nsh/Make.defs
+++ b/configs/c5471evm/nsh/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
endif
endif
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
ARCHOPTIMIZATION = -g
endif
@@ -115,7 +115,7 @@ EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
LDFLAGS += -g
endif
diff --git a/configs/c5471evm/nsh/defconfig b/configs/c5471evm/nsh/defconfig
index 3ca99d5e61f8d59b2bcae01ac0dcf88ae4860cf4..90dba4e681fae197d677f6f4c62fe17dcf53f47d 100644
--- a/configs/c5471evm/nsh/defconfig
+++ b/configs/c5471evm/nsh/defconfig
@@ -42,7 +42,7 @@ CONFIG_RRLOAD_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/cc3200-launchpad/nsh/defconfig b/configs/cc3200-launchpad/nsh/defconfig
index 68c1a21f1c547fcb72108ff4f6bfb47917b968df..df8dc6ecb96c523a8de1d562c62193e71e75ae03 100644
--- a/configs/cc3200-launchpad/nsh/defconfig
+++ b/configs/cc3200-launchpad/nsh/defconfig
@@ -41,7 +41,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/cc3200-launchpad/src/cc3200_autoleds.c b/configs/cc3200-launchpad/src/cc3200_autoleds.c
index 01c944eb522e174e1648e14fcc72033141e7396e..e515b4536a81aa2f00c17f87fb5012d0c658166e 100644
--- a/configs/cc3200-launchpad/src/cc3200_autoleds.c
+++ b/configs/cc3200-launchpad/src/cc3200_autoleds.c
@@ -87,16 +87,16 @@
* LED_PANIC 4 ON OFF OFF (flashing 2Hz)
*/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/* Dump GPIO registers */
diff --git a/configs/cloudctrl/README.txt b/configs/cloudctrl/README.txt
index f98996d214abd6018c3ecd4445c7c7e5977a997e..853c2e6e9ed55bddc8df93048ffb75e62dfc41ce 100644
--- a/configs/cloudctrl/README.txt
+++ b/configs/cloudctrl/README.txt
@@ -651,7 +651,7 @@ Cloudctrl-specific Configuration Options
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
- CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+ CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
Cloudctrl LCD Hardware Configuration
@@ -708,9 +708,9 @@ Cloudctrl-specific Configuration Options
CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever
want to do that?
CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
- debug. Depends on CONFIG_DEBUG.
+ debug. Depends on CONFIG_DEBUG_FEATURES.
CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
- packets. Depends on CONFIG_DEBUG.
+ packets. Depends on CONFIG_DEBUG_FEATURES.
Configurations
==============
diff --git a/configs/cloudctrl/nsh/defconfig b/configs/cloudctrl/nsh/defconfig
index 40bd30e1a114c03609fc87fc304019bd39ed7d90..2b6591e0ebc6cd2bf2810ed7e6ec1e2a88621a00 100644
--- a/configs/cloudctrl/nsh/defconfig
+++ b/configs/cloudctrl/nsh/defconfig
@@ -46,7 +46,7 @@ CONFIG_INTELHEX_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_HEAPCHECK=y
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/cloudctrl/src/stm32_adc.c b/configs/cloudctrl/src/stm32_adc.c
index 9774efba202f08c118e65f85550303a7cfee4003..346100b7828c997c2640aedd29ff4693c7f8abb5 100644
--- a/configs/cloudctrl/src/stm32_adc.c
+++ b/configs/cloudctrl/src/stm32_adc.c
@@ -146,7 +146,7 @@ int board_adc_setup(void)
adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS);
if (adc == NULL)
{
- adbg("ERROR: Failed to get ADC interface\n");
+ aerr("ERROR: Failed to get ADC interface\n");
return -ENODEV;
}
@@ -155,7 +155,7 @@ int board_adc_setup(void)
ret = adc_register("/dev/adc0", adc);
if (ret < 0)
{
- adbg("adc_register failed: %d\n", ret);
+ aerr("ERROR: adc_register failed: %d\n", ret);
return ret;
}
diff --git a/configs/cloudctrl/src/stm32_autoleds.c b/configs/cloudctrl/src/stm32_autoleds.c
index 752b00cccf24a289841a950a6a86a8723e21390e..c0a82e6fbd02c09080c48c3349b5da7a2c2dbce5 100644
--- a/configs/cloudctrl/src/stm32_autoleds.c
+++ b/configs/cloudctrl/src/stm32_autoleds.c
@@ -58,16 +58,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/* The following definitions map the encoded LED setting to GPIO settings */
diff --git a/configs/cloudctrl/src/stm32_spi.c b/configs/cloudctrl/src/stm32_spi.c
index 6cabaff272713a069db480c621ae1823f298218b..aa28e24f7f409d58595accbfdc452aee2d7e3f7d 100644
--- a/configs/cloudctrl/src/stm32_spi.c
+++ b/configs/cloudctrl/src/stm32_spi.c
@@ -58,28 +58,18 @@
* Pre-processor Definitions
************************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_SPI
-#endif
+/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -141,7 +131,7 @@ void weak_function stm32_spidev_initialize(void)
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
/* SPI1 connects to the SD CARD and to the SPI FLASH */
@@ -163,7 +153,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
diff --git a/configs/cloudctrl/src/stm32_usb.c b/configs/cloudctrl/src/stm32_usb.c
index 10ecdec7ca1fa0664976e95a72902a1da132fbdc..9af1565f91fe62239f5bde3115c0a12bf137134e 100644
--- a/configs/cloudctrl/src/stm32_usb.c
+++ b/configs/cloudctrl/src/stm32_usb.c
@@ -107,13 +107,13 @@ static int usbhost_waiter(int argc, char *argv[])
{
struct usbhost_hubport_s *hport;
- uvdbg("Running\n");
+ uinfo("Running\n");
for (;;)
{
/* Wait for the device to change state */
DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
- uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
+ uinfo("%s\n", hport->connected ? "connected" : "disconnected");
/* Did we just become connected? */
@@ -177,7 +177,7 @@ int stm32_usbhost_initialize(void)
* that we care about:
*/
- uvdbg("Register class drivers\n");
+ uinfo("Register class drivers\n");
#ifdef CONFIG_USBHOST_MSC
/* Register the USB mass storage class */
@@ -185,7 +185,7 @@ int stm32_usbhost_initialize(void)
ret = usbhost_msc_initialize();
if (ret != OK)
{
- udbg("ERROR: Failed to register the mass storage class\n");
+ uerr("ERROR: Failed to register the mass storage class\n");
}
#endif
@@ -195,19 +195,19 @@ int stm32_usbhost_initialize(void)
ret = usbhost_cdcacm_initialize();
if (ret != OK)
{
- udbg("ERROR: Failed to register the CDC/ACM serial class\n");
+ uerr("ERROR: Failed to register the CDC/ACM serial class\n");
}
#endif
/* Then get an instance of the USB host interface */
- uvdbg("Initialize USB host\n");
+ uinfo("Initialize USB host\n");
g_usbconn = stm32_otgfshost_initialize(0);
if (g_usbconn)
{
/* Start a thread to handle device connection. */
- uvdbg("Start usbhost_waiter\n");
+ uinfo("Start usbhost_waiter\n");
pid = task_create("usbhost", CONFIG_USBHOST_DEFPRIO,
CONFIG_USBHOST_STACKSIZE,
@@ -301,11 +301,8 @@ xcpt_t stm32_setup_overcurrent(xcpt_t handler)
#ifdef CONFIG_USBDEV
void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
{
- ulldbg("resume: %d\n", resume);
+ ullinfo("resume: %d\n", resume);
}
#endif
#endif /* CONFIG_STM32_OTGFS */
-
-
-
diff --git a/configs/cloudctrl/src/stm32_userleds.c b/configs/cloudctrl/src/stm32_userleds.c
index aadc2ac6db4d9c259ca4b8cc6bbfcf288614d1c6..006a62bd45224a21243ba78b7dfc2e9e289ac1f7 100644
--- a/configs/cloudctrl/src/stm32_userleds.c
+++ b/configs/cloudctrl/src/stm32_userleds.c
@@ -58,16 +58,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/cloudctrl/src/stm32_w25.c b/configs/cloudctrl/src/stm32_w25.c
index da059d35b967e51a550cba94924910f7817aee0b..df43ab80456b31ce15ce5ce4833a5616ab60863b 100644
--- a/configs/cloudctrl/src/stm32_w25.c
+++ b/configs/cloudctrl/src/stm32_w25.c
@@ -107,7 +107,7 @@ int stm32_w25initialize(int minor)
spi = stm32_spibus_initialize(1);
if (!spi)
{
- fdbg("ERROR: Failed to initialize SPI port 2\n");
+ ferr("ERROR: Failed to initialize SPI port 2\n");
return -ENODEV;
}
@@ -116,7 +116,7 @@ int stm32_w25initialize(int minor)
mtd = w25_initialize(spi);
if (!mtd)
{
- fdbg("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n");
+ ferr("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n");
return -ENODEV;
}
@@ -126,7 +126,7 @@ int stm32_w25initialize(int minor)
ret = ftl_initialize(minor, mtd);
if (ret < 0)
{
- fdbg("ERROR: Initialize the FTL layer\n");
+ ferr("ERROR: Initialize the FTL layer\n");
return ret;
}
#else
@@ -135,7 +135,7 @@ int stm32_w25initialize(int minor)
ret = nxffs_initialize(mtd);
if (ret < 0)
{
- fdbg("ERROR: NXFFS initialization failed: %d\n", -ret);
+ ferr("ERROR: NXFFS initialization failed: %d\n", -ret);
return ret;
}
@@ -145,7 +145,7 @@ int stm32_w25initialize(int minor)
ret = mount(NULL, devname, "nxffs", 0, NULL);
if (ret < 0)
{
- fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+ ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
return ret;
}
#endif
diff --git a/configs/compal_e86/nsh_highram/defconfig b/configs/compal_e86/nsh_highram/defconfig
index e521e8e7daf8f868ab85174964963434e377d78e..29d7ceb2879fb39eca62d1452a75b2f4db31eaad 100644
--- a/configs/compal_e86/nsh_highram/defconfig
+++ b/configs/compal_e86/nsh_highram/defconfig
@@ -41,7 +41,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/compal_e88/nsh_highram/defconfig b/configs/compal_e88/nsh_highram/defconfig
index 85ad3ce661b1191f900b75f120b204eb6a6bc4cc..66ca0db0ea593528fe8488e3e81360bcda93f3ea 100644
--- a/configs/compal_e88/nsh_highram/defconfig
+++ b/configs/compal_e88/nsh_highram/defconfig
@@ -41,7 +41,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/compal_e99/nsh_compalram/Make.defs b/configs/compal_e99/nsh_compalram/Make.defs
index 9fe718fb8934776f8e472db62def7bfea629034c..2920fb27d693490654b5b8714b662f488bc9e05a 100644
--- a/configs/compal_e99/nsh_compalram/Make.defs
+++ b/configs/compal_e99/nsh_compalram/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
endif
endif
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
ARCHOPTIMIZATION = -g
endif
@@ -115,7 +115,7 @@ EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
LDFLAGS += -g
endif
diff --git a/configs/compal_e99/nsh_compalram/defconfig b/configs/compal_e99/nsh_compalram/defconfig
index e3107fc84707a1a341b1e7ea735a4500f5de0d47..77d140a6fe5a2cc4806ceeb6402e6e91d715102b 100644
--- a/configs/compal_e99/nsh_compalram/defconfig
+++ b/configs/compal_e99/nsh_compalram/defconfig
@@ -41,7 +41,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/compal_e99/nsh_highram/Make.defs b/configs/compal_e99/nsh_highram/Make.defs
index a7164120e0caa69c94c6a7cdf1cedbb992c39a86..28c0f00c54a94e26c5a495157cf30db1c2d7404e 100644
--- a/configs/compal_e99/nsh_highram/Make.defs
+++ b/configs/compal_e99/nsh_highram/Make.defs
@@ -71,7 +71,7 @@ ifneq ($(HOSTOS),Cygwin)
endif
endif
-ifeq ("${CONFIG_DEBUG}","y")
+ifeq ("${CONFIG_DEBUG_FEATURES}","y")
ARCHOPTIMIZATION = -g
endif
@@ -115,7 +115,7 @@ EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
-ifeq ($(CONFIG_DEBUG),y)
+ifeq ($(CONFIG_DEBUG_FEATURES),y)
LDFLAGS += -g
endif
diff --git a/configs/compal_e99/nsh_highram/defconfig b/configs/compal_e99/nsh_highram/defconfig
index a7cbecbe981b4be19ead1c5e51a09be0620626e1..3f18883c1d1f376cdcc1de3ea4dbf1f465797fce 100644
--- a/configs/compal_e99/nsh_highram/defconfig
+++ b/configs/compal_e99/nsh_highram/defconfig
@@ -41,7 +41,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/compal_e99/src/ssd1783.c b/configs/compal_e99/src/ssd1783.c
index e33cbd4f80e11d20d03df1702bbe9a4d473322e9..de9cd804948595f64d419ced7d369f7f29bc68ac 100644
--- a/configs/compal_e99/src/ssd1783.c
+++ b/configs/compal_e99/src/ssd1783.c
@@ -78,9 +78,9 @@
/* Debug ******************************************************************************/
#ifdef CONFIG_DEBUG_LCD
-# define lcddbg(format, ...) vdbg(format, ##__VA_ARGS__)
+# define lcderr(format, ...) info(format, ##__VA_ARGS__)
#else
-# define lcddbg(x...)
+# define lcderr(x...)
#endif
/** This should be put elsewhere */
@@ -250,7 +250,8 @@ static void lcd_write_prepare(unsigned int x1, unsigned int x2, unsigned int y1,
{ CMD, 0x5c }, /* enter write display ram mode */
{ END, 0x00 }
};
- dbg("x1:%d, x2:%d, y1:%d, y2:%d\n",x1, x2,y1, y2);
+
+ info("x1:%d, x2:%d, y1:%d, y2:%d\n",x1, x2,y1, y2);
fb_ssd1783_send_cmdlist(prepare_disp_write_cmds);
}
@@ -307,7 +308,7 @@ int lcd_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
int lcd_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
size_t npixels)
{
- gvdbg("Not implemented\n");
+ ginfo("Not implemented\n");
return -ENOSYS;
}
@@ -322,7 +323,7 @@ int lcd_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
static int lcd_getvideoinfo(FAR struct lcd_dev_s *dev,
FAR struct fb_videoinfo_s *vinfo)
{
- DEBUGASSERT(dev && vinfo);gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+ DEBUGASSERT(dev && vinfo);ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
return OK;
@@ -339,7 +340,7 @@ static int lcd_getvideoinfo(FAR struct lcd_dev_s *dev,
static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
FAR struct lcd_planeinfo_s *pinfo)
{
- DEBUGASSERT(dev && pinfo && planeno == 0);gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+ DEBUGASSERT(dev && pinfo && planeno == 0);ginfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
return OK;
}
@@ -355,7 +356,7 @@ static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
static int lcd_getpower(struct lcd_dev_s *dev)
{
- gvdbg("power: %d\n", 0);
+ ginfo("power: %d\n", 0);
return g_lcddev.power;
}
@@ -376,7 +377,7 @@ static int lcd_setpower(struct lcd_dev_s *dev, int power)
return OK;
}
- gvdbg("power: %d\n", power);
+ ginfo("power: %d\n", power);
DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER);
/* Set new power level */
@@ -405,7 +406,7 @@ static int lcd_setpower(struct lcd_dev_s *dev, int power)
}
else
{
- gvdbg("powering LCD off...\n");
+ ginfo("powering LCD off...\n");
/* Switch pin from PWL to LT */
reg &= ~ASCONF_PWL_ENA;
putreg8(reg, ASIC_CONF_REG);
@@ -426,7 +427,7 @@ static int lcd_setpower(struct lcd_dev_s *dev, int power)
static int lcd_getcontrast(struct lcd_dev_s *dev)
{
- gvdbg("Not implemented\n");
+ ginfo("Not implemented\n");
return -ENOSYS;
}
@@ -440,7 +441,7 @@ static int lcd_getcontrast(struct lcd_dev_s *dev)
static int lcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
{
- gvdbg("Not implemented\n");
+ ginfo("Not implemented\n");
return -ENOSYS;
}
@@ -453,7 +454,7 @@ static int lcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
**************************************************************************************/
static inline void lcd_initialize(void)
{
- gvdbg("%s: initializing LCD.\n",__FUNCTION__);
+ ginfo("%s: initializing LCD.\n",__FUNCTION__);
calypso_reset_set(RESET_EXT, 0);
usleep(5000);
uwire_init();
@@ -478,7 +479,7 @@ static inline void lcd_initialize(void)
int board_lcd_initialize(void)
{
- gvdbg("Initializing\n");
+ ginfo("Initializing\n");
lcd_initialize();
diff --git a/configs/demo9s12ne64/ostest/defconfig b/configs/demo9s12ne64/ostest/defconfig
index b5f8ba3a5d6162332eb7956c445ef1c9feef561d..dc2009b5d20fe55bf3a9b5a76100870fbbcc937e 100644
--- a/configs/demo9s12ne64/ostest/defconfig
+++ b/configs/demo9s12ne64/ostest/defconfig
@@ -38,7 +38,7 @@ CONFIG_MOTOROLA_SREC=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_STACKCHECK is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/demo9s12ne64/src/m9s12_leds.c b/configs/demo9s12ne64/src/m9s12_leds.c
index 11fc1c6915093cea90a6281f05710fcd6d262863..8d11ce1e0e661abafc7ff76198305ce0ce0b2696 100644
--- a/configs/demo9s12ne64/src/m9s12_leds.c
+++ b/configs/demo9s12ne64/src/m9s12_leds.c
@@ -50,16 +50,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/demo9s12ne64/src/m9s12_spi.c b/configs/demo9s12ne64/src/m9s12_spi.c
index b418635021f66b6c64b909ccd026f42ab303482f..0cccbecbb6a4325477f2b058e05eda70ae8d6f6d 100644
--- a/configs/demo9s12ne64/src/m9s12_spi.c
+++ b/configs/demo9s12ne64/src/m9s12_spi.c
@@ -54,28 +54,18 @@
* Pre-processor Definitions
************************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-# define spidbg lldbg
-# ifdef SPI_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+/* Enables debug output from this file */
+
+#ifdef CONFIG_DEBUG_SPI
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# undef SPI_VERBOSE
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
diff --git a/configs/dk-tm4c129x/ipv6/defconfig b/configs/dk-tm4c129x/ipv6/defconfig
index 7bc8f6f8257e571d1c1def6d8456d7d5a011521c..fc1e30d81658031bd45ce22d19bb43b89f385b85 100644
--- a/configs/dk-tm4c129x/ipv6/defconfig
+++ b/configs/dk-tm4c129x/ipv6/defconfig
@@ -46,7 +46,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/dk-tm4c129x/nsh/defconfig b/configs/dk-tm4c129x/nsh/defconfig
index 28ca9aa4ca4bea7beb317469f1e75504eee38bfb..a2d60ace10c24e970ef62eb1f68b767d05bdf064 100644
--- a/configs/dk-tm4c129x/nsh/defconfig
+++ b/configs/dk-tm4c129x/nsh/defconfig
@@ -46,7 +46,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/dk-tm4c129x/src/tm4c_bringup.c b/configs/dk-tm4c129x/src/tm4c_bringup.c
index 72fcac02928935bbda8388730bc88dd1d25a1371..b6ddd0be28e5b93e03f16e1fccd24c4c33153541 100644
--- a/configs/dk-tm4c129x/src/tm4c_bringup.c
+++ b/configs/dk-tm4c129x/src/tm4c_bringup.c
@@ -86,14 +86,14 @@ static void tm4c_i2c_register(int bus)
i2c = tiva_i2cbus_initialize(bus);
if (i2c == NULL)
{
- dbg("ERROR: Failed to get I2C%d interface\n", bus);
+ err("ERROR: Failed to get I2C%d interface\n", bus);
}
else
{
ret = i2c_register(i2c, bus);
if (ret < 0)
{
- dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+ err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
tiva_i2cbus_uninitialize(i2c);
}
}
@@ -174,7 +174,7 @@ int tm4c_bringup(void)
ret = tiva_tmp100_initialize(TMP100_DEVNAME);
if (ret < 0)
{
- dbg("ERROR: Failed to initialize TMP100 driver: %d\n", ret);
+ err("ERROR: Failed to initialize TMP100 driver: %d\n", ret);
}
#endif
@@ -184,7 +184,7 @@ int tm4c_bringup(void)
ret = tiva_timer_configure();
if (ret < 0)
{
- dbg("ERROR: Failed to initialize timer driver: %d\n", ret);
+ err("ERROR: Failed to initialize timer driver: %d\n", ret);
}
#endif
diff --git a/configs/dk-tm4c129x/src/tm4c_ethernet.c b/configs/dk-tm4c129x/src/tm4c_ethernet.c
index 8594d755596de0d2208c71d41c9aaf54fefc2f71..927757e16d17ed39b9e27508a9ac19b8ee1542ed 100644
--- a/configs/dk-tm4c129x/src/tm4c_ethernet.c
+++ b/configs/dk-tm4c129x/src/tm4c_ethernet.c
@@ -84,7 +84,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr)
user0 = getreg32(TIVA_FLASH_USERREG0);
user1 = getreg32(TIVA_FLASH_USERREG1);
- nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
+ nllinfo("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff);
/* Re-format that MAC address the way that the network expects to see it */
diff --git a/configs/dk-tm4c129x/src/tm4c_ssi.c b/configs/dk-tm4c129x/src/tm4c_ssi.c
index 6c2b0f86ae5cf2805fdf59131593e424cd7ce041..6e889b94bdb7a182a309dcac8d726c0244148649 100644
--- a/configs/dk-tm4c129x/src/tm4c_ssi.c
+++ b/configs/dk-tm4c129x/src/tm4c_ssi.c
@@ -59,28 +59,20 @@
* Pre-processor Definitions
************************************************************************************/
-/* CONFIG_DEBUG_SPI enables debug output from this file (needs CONFIG_DEBUG too) */
+/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
-# define ssidbg lldbg
-#else
-# define ssidbg(x...)
-#endif
-
-/* Dump GPIO registers */
-
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
-# define ssivdbg lldbg
+# define ssierr llerr
+# define ssiwarn llwarn
+# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
-# define ssivdbg(x...)
+# define ssierr(x...)
+# define ssiwarn(x...)
+# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -118,14 +110,14 @@ void weak_function tm4c_ssidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
ssi_dumpgpio("tiva_ssiselect() Exit");
}
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
- ssidbg("Returning SPI_STATUS_PRESENT\n");
+ ssiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
diff --git a/configs/dk-tm4c129x/src/tm4c_timer.c b/configs/dk-tm4c129x/src/tm4c_timer.c
index e6cfe3e13cb340c43edea12bc1718c0acdd9a3e4..1690fd0ba671c24fc68eecc207b57c64d2bc5fd9 100644
--- a/configs/dk-tm4c129x/src/tm4c_timer.c
+++ b/configs/dk-tm4c129x/src/tm4c_timer.c
@@ -102,12 +102,12 @@ int tiva_timer_configure(void)
{
int ret;
- timvdbg("Registering TIMER%d at %s\n", GPTM, CONFIG_DK_TM4C129X_TIMER_DEVNAME);
+ timinfo("Registering TIMER%d at %s\n", GPTM, CONFIG_DK_TM4C129X_TIMER_DEVNAME);
ret = tiva_timer_register(CONFIG_DK_TM4C129X_TIMER_DEVNAME, GPTM, ALTCLK);
if (ret < 0)
{
- timdbg("ERROR: Failed to register timer driver: %d\n", ret);
+ timerr("ERROR: Failed to register timer driver: %d\n", ret);
}
return ret;
diff --git a/configs/dk-tm4c129x/src/tm4c_userleds.c b/configs/dk-tm4c129x/src/tm4c_userleds.c
index 623091f8aff41f0477dded9892fa6f3566c4f078..9ac0b86d8bbe16f044a18db14d6d8238e2219f3c 100644
--- a/configs/dk-tm4c129x/src/tm4c_userleds.c
+++ b/configs/dk-tm4c129x/src/tm4c_userleds.c
@@ -66,16 +66,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/ea3131/nsh/defconfig b/configs/ea3131/nsh/defconfig
index 847486498ebf85ebf8f2109eca35edf0a2ce63f9..7db317ab9fe564673322a4004fae675fa93915e1 100644
--- a/configs/ea3131/nsh/defconfig
+++ b/configs/ea3131/nsh/defconfig
@@ -45,7 +45,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/ea3131/pgnsh/defconfig b/configs/ea3131/pgnsh/defconfig
index 68215a41b38f6b66ffdb85e86204d65e98d12de1..e56fb71d68cd0097b4500f2b1b8b81c68b3a0cd5 100644
--- a/configs/ea3131/pgnsh/defconfig
+++ b/configs/ea3131/pgnsh/defconfig
@@ -48,7 +48,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/ea3131/src/lpc31_fillpage.c b/configs/ea3131/src/lpc31_fillpage.c
index 3ca97433cf0fc23c373095851fd596b0aff20699..2020c844d92e27e734548b5af4d76592acd22b2b 100644
--- a/configs/ea3131/src/lpc31_fillpage.c
+++ b/configs/ea3131/src/lpc31_fillpage.c
@@ -199,7 +199,7 @@ struct pg_source_s
/* This the device geometry */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
FAR struct mtd_geometry_s geo;
#endif
};
@@ -244,7 +244,7 @@ static inline void lpc31_initsrc(void)
char devname[16];
#endif
- pgllvdbg("Initializing %s\n", CONFIG_PAGING_BINPATH);
+ pgllinfo("Initializing %s\n", CONFIG_PAGING_BINPATH);
/* No, do we need to mount an SD device? */
@@ -289,7 +289,7 @@ static inline void lpc31_initsrc(void)
static inline void lpc31_initsrc(void)
{
FAR struct spi_dev_s *spi;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
uint32_t capacity;
int ret;
#endif
@@ -300,7 +300,7 @@ static inline void lpc31_initsrc(void)
{
/* No... the initialize now */
- pgllvdbg("Initializing\n");
+ pgllinfo("Initializing\n");
/* First get an instance of the SPI device interface */
@@ -318,7 +318,7 @@ static inline void lpc31_initsrc(void)
/* Verify that we can use the device */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Get the device geometry. (casting to uintptr_t first eliminates
* complaints on some architectures where the sizeof long is different
* from the size of a pointer).
@@ -327,7 +327,7 @@ static inline void lpc31_initsrc(void)
ret = MTD_IOCTL(g_pgsrc.mtd, MTDIOC_GEOMETRY, (unsigned long)&g_pgsrc.geo);
DEBUGASSERT(ret >= 0);
capacity = g_pgsrc.geo.erasesize*g_pgsrc.geo.neraseblocks;
- pgllvdbg("capacity: %d\n", capacity);
+ pgllinfo("capacity: %d\n", capacity);
DEBUGASSERT(capacity >= (CONFIG_EA3131_PAGING_BINOFFSET + PG_TEXT_VSIZE));
#endif
@@ -412,7 +412,7 @@ int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage)
off_t offset;
#endif
- pglldbg("TCB: %p vpage: %p far: %08x\n", tcb, vpage, tcb->xcp.far);
+ pgllinfo("TCB: %p vpage: %p far: %08x\n", tcb, vpage, tcb->xcp.far);
DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND);
/* If BINPATH is defined, then it is the full path to a file on a mounted file
@@ -475,7 +475,7 @@ int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage)
int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage, up_pgcallback_t pg_callback)
{
- pglldbg("TCB: %p vpage: %d far: %08x\n", tcb, vpage, tcb->xcp.far);
+ pgllinfo("TCB: %p vpage: %d far: %08x\n", tcb, vpage, tcb->xcp.far);
DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND);
#if defined(CONFIG_PAGING_BINPATH)
diff --git a/configs/ea3131/src/lpc31_leds.c b/configs/ea3131/src/lpc31_leds.c
index 367c3031c461f91c7ac2e52a5ba746d9ffd1c1d5..dcff8610b5c2d5b9de5fda2e2bb08b4b9937e69a 100644
--- a/configs/ea3131/src/lpc31_leds.c
+++ b/configs/ea3131/src/lpc31_leds.c
@@ -55,16 +55,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/ea3131/src/lpc31_spi.c b/configs/ea3131/src/lpc31_spi.c
index cda79ac9e63998245c3fbbeb21397343bc8cc7d4..a49eba9477be799b7727f68d8f8f78d664fbe533 100644
--- a/configs/ea3131/src/lpc31_spi.c
+++ b/configs/ea3131/src/lpc31_spi.c
@@ -59,28 +59,18 @@
* Pre-processor Definitions
************************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-# define spidbg lldbg
-# ifdef SPI_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+/* Enables debug output from this file */
+
+#ifdef CONFIG_DEBUG_SPI
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# undef SPI_VERBOSE
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -127,7 +117,7 @@ void weak_function lpc31_spidev_intialize(void)
void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
diff --git a/configs/ea3131/src/lpc31_usbhost.c b/configs/ea3131/src/lpc31_usbhost.c
index 4c7b500233f4cb48ddb305a74dc921cd3b00571c..a1b86a759ffc667602e3d49770610890606e20bc 100644
--- a/configs/ea3131/src/lpc31_usbhost.c
+++ b/configs/ea3131/src/lpc31_usbhost.c
@@ -104,7 +104,7 @@ static int ehci_waiter(int argc, char *argv[])
{
FAR struct usbhost_hubport_s *hport;
- uvdbg("ehci_waiter: Running\n");
+ uinfo("ehci_waiter: Running\n");
for (;;)
{
/* Wait for the device to change state */
@@ -206,7 +206,7 @@ int lpc31_usbhost_initialize(void)
ret = usbhost_cdcacm_initialize();
if (ret != OK)
{
- udbg("ERROR: Failed to register the CDC/ACM serial class\n");
+ uerr("ERROR: Failed to register the CDC/ACM serial class\n");
}
#endif
@@ -216,7 +216,7 @@ int lpc31_usbhost_initialize(void)
ret = usbhost_kbdinit();
if (ret != OK)
{
- udbg("ERROR: Failed to register the KBD class\n");
+ uerr("ERROR: Failed to register the KBD class\n");
}
#endif
@@ -225,7 +225,7 @@ int lpc31_usbhost_initialize(void)
g_ehciconn = lpc31_ehci_initialize(0);
if (!g_ehciconn)
{
- udbg("ERROR: lpc31_ehci_initialize failed\n");
+ uerr("ERROR: lpc31_ehci_initialize failed\n");
return -ENODEV;
}
@@ -235,7 +235,7 @@ int lpc31_usbhost_initialize(void)
(main_t)ehci_waiter, (FAR char * const *)NULL);
if (pid < 0)
{
- udbg("ERROR: Failed to create ehci_waiter task: %d\n", ret);
+ uerr("ERROR: Failed to create ehci_waiter task: %d\n", ret);
return -ENODEV;
}
@@ -262,7 +262,7 @@ int lpc31_usbhost_initialize(void)
void lpc31_usbhost_vbusdrive(int rhport, bool enable)
{
- uvdbg("RHPort%d: enable=%d\n", rhport+1, enable);
+ uinfo("RHPort%d: enable=%d\n", rhport+1, enable);
/* The LPC3131 has only a single root hub port */
diff --git a/configs/ea3131/usbserial/defconfig b/configs/ea3131/usbserial/defconfig
index e7a88724c9db24212a25c4c6bdade45896fcb72b..6d68bedc94f0b690d0f8b327f62488b290680c4c 100644
--- a/configs/ea3131/usbserial/defconfig
+++ b/configs/ea3131/usbserial/defconfig
@@ -46,7 +46,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/ea3152/ostest/defconfig b/configs/ea3152/ostest/defconfig
index 598fabeb5ab0a4638c04761bb4743ca5b2709745..49dda7cc91a9fa6d4933484f37667895dcae413c 100644
--- a/configs/ea3152/ostest/defconfig
+++ b/configs/ea3152/ostest/defconfig
@@ -45,7 +45,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/ea3152/src/lpc31_fillpage.c b/configs/ea3152/src/lpc31_fillpage.c
index 647960cfa35bb9d9845df23285279bb8c53a9ae3..33dd4dc08af92b2609b294d8de5b9c0830551b94 100644
--- a/configs/ea3152/src/lpc31_fillpage.c
+++ b/configs/ea3152/src/lpc31_fillpage.c
@@ -199,7 +199,7 @@ struct pg_source_s
/* This the device geometry */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
FAR struct mtd_geometry_s geo;
#endif
};
@@ -244,7 +244,7 @@ static inline void lpc31_initsrc(void)
char devname[16];
#endif
- pgllvdbg("Initializing %s\n", CONFIG_PAGING_BINPATH);
+ pgllinfo("Initializing %s\n", CONFIG_PAGING_BINPATH);
/* No, do we need to mount an SD device? */
@@ -289,7 +289,7 @@ static inline void lpc31_initsrc(void)
static inline void lpc31_initsrc(void)
{
FAR struct spi_dev_s *spi;
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
uint32_t capacity;
int ret;
#endif
@@ -300,7 +300,7 @@ static inline void lpc31_initsrc(void)
{
/* No... the initialize now */
- pgllvdbg("Initializing\n");
+ pgllinfo("Initializing\n");
/* First get an instance of the SPI device interface */
@@ -318,7 +318,7 @@ static inline void lpc31_initsrc(void)
/* Verify that we can use the device */
-#ifdef CONFIG_DEBUG
+#ifdef CONFIG_DEBUG_FEATURES
/* Get the device geometry. (casting to uintptr_t first eliminates
* complaints on some architectures where the sizeof long is different
* from the size of a pointer).
@@ -327,7 +327,7 @@ static inline void lpc31_initsrc(void)
ret = MTD_IOCTL(g_pgsrc.mtd, MTDIOC_GEOMETRY, (unsigned long)&g_pgsrc.geo);
DEBUGASSERT(ret >= 0);
capacity = g_pgsrc.geo.erasesize*g_pgsrc.geo.neraseblocks;
- pgllvdbg("capacity: %d\n", capacity);
+ pgllinfo("capacity: %d\n", capacity);
DEBUGASSERT(capacity >= (CONFIG_EA3152_PAGING_BINOFFSET + PG_TEXT_VSIZE));
#endif
@@ -412,7 +412,7 @@ int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage)
off_t offset;
#endif
- pglldbg("TCB: %p vpage: %p far: %08x\n", tcb, vpage, tcb->xcp.far);
+ pgllinfo("TCB: %p vpage: %p far: %08x\n", tcb, vpage, tcb->xcp.far);
DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND);
/* If BINPATH is defined, then it is the full path to a file on a mounted file
@@ -475,7 +475,7 @@ int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage)
int up_fillpage(FAR struct tcb_s *tcb, FAR void *vpage, up_pgcallback_t pg_callback)
{
- pglldbg("TCB: %p vpage: %d far: %08x\n", tcb, vpage, tcb->xcp.far);
+ pgllinfo("TCB: %p vpage: %d far: %08x\n", tcb, vpage, tcb->xcp.far);
DEBUGASSERT(tcb->xcp.far >= PG_PAGED_VBASE && tcb->xcp.far < PG_PAGED_VEND);
#if defined(CONFIG_PAGING_BINPATH)
diff --git a/configs/ea3152/src/lpc31_leds.c b/configs/ea3152/src/lpc31_leds.c
index ab0ea797492d0866faa7a9e54b0071916718ed4b..ad0c91bf04e7bd302f99039a0734eb579f888579 100644
--- a/configs/ea3152/src/lpc31_leds.c
+++ b/configs/ea3152/src/lpc31_leds.c
@@ -55,16 +55,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/ea3152/src/lpc31_spi.c b/configs/ea3152/src/lpc31_spi.c
index 5e81cc398dab2bba89771443783f817282342fac..a34576b900ccf513dd2a5ef43cd1ad971f2df463 100644
--- a/configs/ea3152/src/lpc31_spi.c
+++ b/configs/ea3152/src/lpc31_spi.c
@@ -59,28 +59,18 @@
* Pre-processor Definitions
************************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-# define spidbg lldbg
-# ifdef SPI_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+/* Enables debug output from this file */
+
+#ifdef CONFIG_DEBUG_SPI
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# undef SPI_VERBOSE
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -127,7 +117,7 @@ void weak_function lpc31_spidev_intialize(void)
void lpc31_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#warning "Missing logic"
}
diff --git a/configs/eagle100/httpd/defconfig b/configs/eagle100/httpd/defconfig
index 96e0b09524e1dbc82f2ad38ca52a97d626291a54..b7920a1123b8e5e77bf015fd1b8421d76faa74d6 100644
--- a/configs/eagle100/httpd/defconfig
+++ b/configs/eagle100/httpd/defconfig
@@ -42,7 +42,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/eagle100/nettest/defconfig b/configs/eagle100/nettest/defconfig
index bd692c7ffa9a2202aedbe428fda4cad25c9911d8..3488e2b471b875198f3d600b9ff1b6dea88a16fa 100644
--- a/configs/eagle100/nettest/defconfig
+++ b/configs/eagle100/nettest/defconfig
@@ -45,7 +45,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/eagle100/nsh/defconfig b/configs/eagle100/nsh/defconfig
index 77837598c15f1ec5a4e09e9a32502b9b611feae6..96471a6dcfa7e4e94a81aa8cc5fbfa267ebc0b1f 100644
--- a/configs/eagle100/nsh/defconfig
+++ b/configs/eagle100/nsh/defconfig
@@ -46,7 +46,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/eagle100/nxflat/defconfig b/configs/eagle100/nxflat/defconfig
index 67b18010a403e1943117cc285382958f1f037e00..364634f48e7c6aa71b192ca70e9ce028c6309c66 100644
--- a/configs/eagle100/nxflat/defconfig
+++ b/configs/eagle100/nxflat/defconfig
@@ -43,7 +43,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/eagle100/src/lm_ethernet.c b/configs/eagle100/src/lm_ethernet.c
index 7a33e1af6cba6f07f5905620bad709a510055ede..cc81b1667e31cb81e78bf84de99efd7af0cf9c8f 100644
--- a/configs/eagle100/src/lm_ethernet.c
+++ b/configs/eagle100/src/lm_ethernet.c
@@ -83,7 +83,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr)
user0 = getreg32(TIVA_FLASH_USERREG0);
user1 = getreg32(TIVA_FLASH_USERREG1);
- nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
+ nllinfo("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff);
/* Re-format that MAC address the way that the network expects to see it */
diff --git a/configs/eagle100/src/lm_leds.c b/configs/eagle100/src/lm_leds.c
index feea1dacf404cf94ebd24872634bf247d8e15ab7..86951bfc3eb492d17107c3b3dff11271ecc231b9 100644
--- a/configs/eagle100/src/lm_leds.c
+++ b/configs/eagle100/src/lm_leds.c
@@ -55,16 +55,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/* Dump GPIO registers */
@@ -100,7 +100,7 @@ static uint8_t g_nest;
#ifdef CONFIG_ARCH_LEDS
void board_autoled_initialize(void)
{
- leddbg("Initializing\n");
+ ledinfo("Initializing\n");
/* Configure Port E, Bit 1 as an output, initial value=OFF */
diff --git a/configs/eagle100/src/lm_ssi.c b/configs/eagle100/src/lm_ssi.c
index adc5ad59edec70a4b4becedeeff31a474dc837dc..9c3f5b04d35ce14bba5b699ca76c70eb1ad5241a 100644
--- a/configs/eagle100/src/lm_ssi.c
+++ b/configs/eagle100/src/lm_ssi.c
@@ -59,29 +59,17 @@
* Pre-processor Definitions
************************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SSI_DEBUG /* Define to enable debug */
-#undef SSI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SSI_DEBUG
-# define ssidbg lldbg
-# ifdef SSI_VERBOSE
-# define ssivdbg lldbg
-# else
-# define ssivdbg(x...)
-# endif
-#else
-# undef SSI_VERBOSE
-# define ssidbg(x...)
-# define ssivdbg(x...)
-#endif
-
-/* Dump GPIO registers */
+/* CONFIG_DEBUG_SPI enables debug output from this file */
-#ifdef SSI_VERBOSE
+#ifdef CONFIG_DEBUG_SPI
+# define ssierr llerr
+# define ssiwarn llwarn
+# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
+# define ssierr(x...)
+# define ssiwarn(x...)
+# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
@@ -127,7 +115,7 @@ void weak_function lm_ssidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_MMCSD)
{
/* Assert the CS pin to the card */
@@ -140,7 +128,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
- ssidbg("Returning SPI_STATUS_PRESENT\n");
+ ssiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
diff --git a/configs/eagle100/thttpd/defconfig b/configs/eagle100/thttpd/defconfig
index 9bd0ee452b5debe61b735d7dc9b3b1176c614228..ae3c7d6e27513c15ace51de45ace17e994ab79f8 100644
--- a/configs/eagle100/thttpd/defconfig
+++ b/configs/eagle100/thttpd/defconfig
@@ -41,7 +41,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/efm32-g8xx-stk/nsh/defconfig b/configs/efm32-g8xx-stk/nsh/defconfig
index a3112c194cbbab6363817fb7ea7bd836626ed259..d99809600d186ab7c9aaf9ee244e0932caa6cd02 100644
--- a/configs/efm32-g8xx-stk/nsh/defconfig
+++ b/configs/efm32-g8xx-stk/nsh/defconfig
@@ -45,7 +45,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/efm32-g8xx-stk/src/efm32_autoleds.c b/configs/efm32-g8xx-stk/src/efm32_autoleds.c
index 5c3164671215108fddfd9b6cc290128c3536fa49..9038b795e31809155d9f572d23d2cd9cf555bae2 100644
--- a/configs/efm32-g8xx-stk/src/efm32_autoleds.c
+++ b/configs/efm32-g8xx-stk/src/efm32_autoleds.c
@@ -59,16 +59,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/* The following definitions map the encoded LED setting to GPIO settings */
diff --git a/configs/efm32-g8xx-stk/src/efm32_userleds.c b/configs/efm32-g8xx-stk/src/efm32_userleds.c
index d21868ea62ef1efb460da039b1ff8ec3433b7ee0..ec4ca87c51426cb3282c1e4a1d19c846aa92b4ae 100644
--- a/configs/efm32-g8xx-stk/src/efm32_userleds.c
+++ b/configs/efm32-g8xx-stk/src/efm32_userleds.c
@@ -59,16 +59,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/efm32gg-stk3700/nsh/defconfig b/configs/efm32gg-stk3700/nsh/defconfig
index d8d3ea37a76efbc45c3803bbe10b4a3a8d8d228c..d78466e83cf855ea785a9e4b69b4d220b791b910 100644
--- a/configs/efm32gg-stk3700/nsh/defconfig
+++ b/configs/efm32gg-stk3700/nsh/defconfig
@@ -45,7 +45,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/efm32gg-stk3700/src/efm32_autoleds.c b/configs/efm32gg-stk3700/src/efm32_autoleds.c
index 4b1cf4dfdf8367f08a290f2a107cbf43bd4485ed..23cf753454fe853e9c59de32bba4683bc0c3666d 100644
--- a/configs/efm32gg-stk3700/src/efm32_autoleds.c
+++ b/configs/efm32gg-stk3700/src/efm32_autoleds.c
@@ -93,16 +93,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/efm32gg-stk3700/src/efm32_userleds.c b/configs/efm32gg-stk3700/src/efm32_userleds.c
index 10b4f4df9bb98368426f3d4b0dec4cfbc764afaf..72f808bb3167bd5e7f84c07b5d0e34f92d34e051 100644
--- a/configs/efm32gg-stk3700/src/efm32_userleds.c
+++ b/configs/efm32gg-stk3700/src/efm32_userleds.c
@@ -70,16 +70,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/ekk-lm3s9b96/nsh/defconfig b/configs/ekk-lm3s9b96/nsh/defconfig
index 946038cb0577c7997e4d9c4b935138dc4e42426a..c4c1ca9db1fe5e5894e653063d315d1761c24b46 100644
--- a/configs/ekk-lm3s9b96/nsh/defconfig
+++ b/configs/ekk-lm3s9b96/nsh/defconfig
@@ -42,7 +42,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/ekk-lm3s9b96/src/lm_ethernet.c b/configs/ekk-lm3s9b96/src/lm_ethernet.c
index c3627e4a16c8feb73cb47f0682ed5b66941d663b..16156f0d930c1ad330b94ffdd5fd60fcd64c98a9 100644
--- a/configs/ekk-lm3s9b96/src/lm_ethernet.c
+++ b/configs/ekk-lm3s9b96/src/lm_ethernet.c
@@ -84,7 +84,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr)
user0 = getreg32(TIVA_FLASH_USERREG0);
user1 = getreg32(TIVA_FLASH_USERREG1);
- nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
+ nllinfo("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff);
/* Re-format that MAC address the way that the network expects to see it */
diff --git a/configs/ekk-lm3s9b96/src/lm_leds.c b/configs/ekk-lm3s9b96/src/lm_leds.c
index 0cee2dc4a83df3798743e89bb88c8b298b790481..dff55f504e40d561e352b4871ba4a608ff1ff3ca 100644
--- a/configs/ekk-lm3s9b96/src/lm_leds.c
+++ b/configs/ekk-lm3s9b96/src/lm_leds.c
@@ -56,16 +56,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/* Dump GPIO registers */
@@ -97,7 +97,7 @@ static uint8_t g_nest;
#ifdef CONFIG_ARCH_LEDS
void board_autoled_initialize(void)
{
- leddbg("Initializing\n");
+ ledinfo("Initializing\n");
/* Configure Port D, Bit 0 as an output, initial value=OFF */
diff --git a/configs/ekk-lm3s9b96/src/lm_ssi.c b/configs/ekk-lm3s9b96/src/lm_ssi.c
index e2a26bc1b50ca233b97f4cf41b615fbc484b416a..6fc632f65b49e32b1d49c66d68f6613ca7c3a007 100644
--- a/configs/ekk-lm3s9b96/src/lm_ssi.c
+++ b/configs/ekk-lm3s9b96/src/lm_ssi.c
@@ -58,38 +58,20 @@
* Pre-processor Definitions
************************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SSI_DEBUG /* Define to enable debug */
-#undef SSI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SSI_DEBUG
-# define ssidbg lldbg
-# ifdef SSI_VERBOSE
-# define ssivdbg lldbg
-# else
-# define ssivdbg(x...)
-# endif
-#else
-# undef SSI_VERBOSE
-# define ssidbg(x...)
-# define ssivdbg(x...)
-#endif
+/* CONFIG_DEBUG_SPI enables debug output from this file */
-/* Dump GPIO registers */
-
-#ifdef SSI_VERBOSE
-#if 0
+#ifdef CONFIG_DEBUG_SPI
+# define ssierr llerr
+# define ssiwarn llwarn
+# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
-#endif
#else
+# define ssierr(x...)
+# define ssiwarn(x...)
+# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -133,7 +115,7 @@ void weak_function lm_ssidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
if (devid == SPIDEV_MMCSD)
{
@@ -154,7 +136,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
- ssidbg("Returning SPI_STATUS_PRESENT\n");
+ ssiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
#endif
diff --git a/configs/ez80f910200kitg/ostest/defconfig b/configs/ez80f910200kitg/ostest/defconfig
index 106998a223d69f96f4e320016ccab8b5833f9c85..5ad96bd9153f17f90690ebc885dc72b040bb422e 100644
--- a/configs/ez80f910200kitg/ostest/defconfig
+++ b/configs/ez80f910200kitg/ostest/defconfig
@@ -46,9 +46,9 @@ CONFIG_BUILD_FLAT=y
#
# Debug Options
#
-CONFIG_DEBUG=y
+CONFIG_DEBUG_FEATURES=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
#
# Subsystem Debug Options
diff --git a/configs/ez80f910200zco/dhcpd/defconfig b/configs/ez80f910200zco/dhcpd/defconfig
index 615994d436c0f79c09f3c77e0ab503afb9a93786..19f54e3feb81a02381cd9c7d8e349898f52b847d 100644
--- a/configs/ez80f910200zco/dhcpd/defconfig
+++ b/configs/ez80f910200zco/dhcpd/defconfig
@@ -46,9 +46,9 @@ CONFIG_BUILD_FLAT=y
#
# Debug Options
#
-CONFIG_DEBUG=y
+CONFIG_DEBUG_FEATURES=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
#
# Subsystem Debug Options
diff --git a/configs/ez80f910200zco/httpd/defconfig b/configs/ez80f910200zco/httpd/defconfig
index fe55d601b7796bf758a8aa5fdf60bed8a702e269..c34eb7aff517d04a091c4185814b91ceace5b596 100644
--- a/configs/ez80f910200zco/httpd/defconfig
+++ b/configs/ez80f910200zco/httpd/defconfig
@@ -46,9 +46,9 @@ CONFIG_BUILD_FLAT=y
#
# Debug Options
#
-CONFIG_DEBUG=y
+CONFIG_DEBUG_FEATURES=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
#
# Subsystem Debug Options
diff --git a/configs/ez80f910200zco/nettest/defconfig b/configs/ez80f910200zco/nettest/defconfig
index 66eb97ef721233512b70adbbedf1de2d19c9acac..9e0180deaf1e8df536f656c0ac4380a615c41f68 100644
--- a/configs/ez80f910200zco/nettest/defconfig
+++ b/configs/ez80f910200zco/nettest/defconfig
@@ -46,9 +46,9 @@ CONFIG_BUILD_FLAT=y
#
# Debug Options
#
-CONFIG_DEBUG=y
+CONFIG_DEBUG_FEATURES=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
#
# Subsystem Debug Options
diff --git a/configs/ez80f910200zco/nsh/defconfig b/configs/ez80f910200zco/nsh/defconfig
index c4cfa6c95d4c645377b785a8ad4d6660cfa9e500..f431c18dad13296b3a0161f64279ab9786511da1 100644
--- a/configs/ez80f910200zco/nsh/defconfig
+++ b/configs/ez80f910200zco/nsh/defconfig
@@ -46,9 +46,9 @@ CONFIG_BUILD_FLAT=y
#
# Debug Options
#
-CONFIG_DEBUG=y
+CONFIG_DEBUG_FEATURES=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
#
# Subsystem Debug Options
diff --git a/configs/ez80f910200zco/poll/defconfig b/configs/ez80f910200zco/poll/defconfig
index b8effce8d09057c96914f52328c370b996fe13d9..ca969eee985a8e11a857b51ac9bebd33d1eddaf4 100644
--- a/configs/ez80f910200zco/poll/defconfig
+++ b/configs/ez80f910200zco/poll/defconfig
@@ -46,9 +46,9 @@ CONFIG_BUILD_FLAT=y
#
# Debug Options
#
-CONFIG_DEBUG=y
+CONFIG_DEBUG_FEATURES=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
-# CONFIG_DEBUG_VERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
#
# Subsystem Debug Options
diff --git a/configs/fire-stm32v2/README.txt b/configs/fire-stm32v2/README.txt
index 3af6249e505509a87651e64b831445f76b48898f..d8da5f1f341870b2cded99cc92f1b0f2c32ef3c4 100644
--- a/configs/fire-stm32v2/README.txt
+++ b/configs/fire-stm32v2/README.txt
@@ -758,7 +758,7 @@ M3 Wildfire-specific Configuration Options
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
- CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+ CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
M3 Wildfire LCD Hardware Configuration
diff --git a/configs/fire-stm32v2/nsh/defconfig b/configs/fire-stm32v2/nsh/defconfig
index a914c0624aa1fa4d7b02b78dc736bce662db0c80..72a8e7e4a1aa2af2a73db6945fd54dd9356f9d47 100644
--- a/configs/fire-stm32v2/nsh/defconfig
+++ b/configs/fire-stm32v2/nsh/defconfig
@@ -46,7 +46,7 @@ CONFIG_INTELHEX_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_HEAPCHECK=y
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/fire-stm32v2/src/stm32_appinit.c b/configs/fire-stm32v2/src/stm32_appinit.c
index e8711ef204a3925fa0ed4b3f8b7cf9e83cdda6e4..7e894cc4afd5bc5979511532d03b21dbe9f101e1 100644
--- a/configs/fire-stm32v2/src/stm32_appinit.c
+++ b/configs/fire-stm32v2/src/stm32_appinit.c
@@ -147,14 +147,14 @@ static void stm32_i2c_register(int bus)
i2c = stm32_i2cbus_initialize(bus);
if (i2c == NULL)
{
- dbg("ERROR: Failed to get I2C%d interface\n", bus);
+ err("ERROR: Failed to get I2C%d interface\n", bus);
}
else
{
ret = i2c_register(i2c, bus);
if (ret < 0)
{
- dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+ err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
stm32_i2cbus_uninitialize(i2c);
}
}
diff --git a/configs/fire-stm32v2/src/stm32_autoleds.c b/configs/fire-stm32v2/src/stm32_autoleds.c
index 82501996013ccb66ca243d5712c8c2ca1fdff1b3..6db2e6aea5bb962ab87e06eb5f15184bcc4601e1 100644
--- a/configs/fire-stm32v2/src/stm32_autoleds.c
+++ b/configs/fire-stm32v2/src/stm32_autoleds.c
@@ -57,16 +57,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/* The following definitions map the encoded LED setting to GPIO settings.
diff --git a/configs/fire-stm32v2/src/stm32_enc28j60.c b/configs/fire-stm32v2/src/stm32_enc28j60.c
index 40d7954b69cc818f178918d399dc1df9659a78a4..41565d288f798aa308caa29c3c8d4ed9f2270f81 100644
--- a/configs/fire-stm32v2/src/stm32_enc28j60.c
+++ b/configs/fire-stm32v2/src/stm32_enc28j60.c
@@ -188,7 +188,7 @@ void up_netinitialize(void)
spi = stm32_spibus_initialize(ENC28J60_SPI_PORTNO);
if (!spi)
{
- nlldbg("Failed to initialize SPI port %d\n", ENC28J60_SPI_PORTNO);
+ nllerr("ERROR: Failed to initialize SPI port %d\n", ENC28J60_SPI_PORTNO);
return;
}
@@ -201,12 +201,12 @@ void up_netinitialize(void)
ret = enc_initialize(spi, &g_enclower.lower, ENC28J60_DEVNO);
if (ret < 0)
{
- nlldbg("Failed to bind SPI port %d ENC28J60 device %d: %d\n",
+ nllerr("ERROR: Failed to bind SPI port %d ENC28J60 device %d: %d\n",
ENC28J60_SPI_PORTNO, ENC28J60_DEVNO, ret);
return;
}
- nllvdbg("Bound SPI port %d to ENC28J60 device %d\n",
+ nllinfo("Bound SPI port %d to ENC28J60 device %d\n",
ENC28J60_SPI_PORTNO, ENC28J60_DEVNO);
}
diff --git a/configs/fire-stm32v2/src/stm32_mmcsd.c b/configs/fire-stm32v2/src/stm32_mmcsd.c
index 356be40d55a0e64a8db2c80d15eebc13616135ce..a29276836c190a9535dfc3e05c19bf761f3264a1 100644
--- a/configs/fire-stm32v2/src/stm32_mmcsd.c
+++ b/configs/fire-stm32v2/src/stm32_mmcsd.c
@@ -93,22 +93,22 @@ int stm32_sdinitialize(int minor)
sdio = sdio_initialize(STM32_MMCSDSLOTNO);
if (!sdio)
{
- fdbg("Failed to initialize SDIO slot %d\n", STM32_MMCSDSLOTNO);
+ ferr("ERROR: Failed to initialize SDIO slot %d\n", STM32_MMCSDSLOTNO);
return -ENODEV;
}
- fvdbg("Initialized SDIO slot %d\n", STM32_MMCSDSLOTNO);
+ finfo("Initialized SDIO slot %d\n", STM32_MMCSDSLOTNO);
/* Now bind the SDIO interface to the MMC/SD driver */
ret = mmcsd_slotinitialize(minor, sdio);
if (ret != OK)
{
- fdbg("Failed to bind SDIO slot %d to the MMC/SD driver, minor=%d\n",
+ ferr("ERROR: Failed to bind SDIO slot %d to the MMC/SD driver, minor=%d\n",
STM32_MMCSDSLOTNO, minor);
}
- fvdbg("Bound SDIO slot %d to the MMC/SD driver, minor=%d\n",
+ finfo("Bound SDIO slot %d to the MMC/SD driver, minor=%d\n",
STM32_MMCSDSLOTNO, minor);
/* Then let's guess and say that there is a card in the slot. I need to check to
diff --git a/configs/fire-stm32v2/src/stm32_spi.c b/configs/fire-stm32v2/src/stm32_spi.c
index e5f049795728029ebfeb716bfbd135437f945349..b92bbdd2b4fff2b8ede594705baf0ded04f34f1e 100644
--- a/configs/fire-stm32v2/src/stm32_spi.c
+++ b/configs/fire-stm32v2/src/stm32_spi.c
@@ -57,28 +57,18 @@
* Pre-processor Definitions
************************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SPI_DEBUG /* Define to enable debug */
-#undef SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-# define spidbg lldbg
-# ifdef SPI_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+/* Enables debug output from this file */
+
+#ifdef CONFIG_DEBUG_SPI
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# undef SPI_VERBOSE
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -159,7 +149,7 @@ void weak_function stm32_spidev_initialize(void)
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#if 0 /* Need to study this */
if (devid == SPIDEV_LCD)
@@ -196,7 +186,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_AUDIO)
{
diff --git a/configs/fire-stm32v2/src/stm32_usbdev.c b/configs/fire-stm32v2/src/stm32_usbdev.c
index 5beea44b78ba620f2501536aa7606e2dec1320c0..ca46743f73c37c9842b695613ae6d9eed0477489 100644
--- a/configs/fire-stm32v2/src/stm32_usbdev.c
+++ b/configs/fire-stm32v2/src/stm32_usbdev.c
@@ -114,6 +114,5 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
{
- ulldbg("resume: %d\n", resume);
+ ullinfo("resume: %d\n", resume);
}
-
diff --git a/configs/fire-stm32v2/src/stm32_userleds.c b/configs/fire-stm32v2/src/stm32_userleds.c
index 5d5adeb2ecb4630d7b24c22dc02dd5db015efb5e..26484ff2e7ecdf3f9b7d671702147818f6dbe75b 100644
--- a/configs/fire-stm32v2/src/stm32_userleds.c
+++ b/configs/fire-stm32v2/src/stm32_userleds.c
@@ -57,16 +57,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/fire-stm32v2/src/stm32_w25.c b/configs/fire-stm32v2/src/stm32_w25.c
index 3fad2929b24b183ae2448412f97b93a284f2805e..34940b5c62f122d6df8be34c464dc8994921b439 100644
--- a/configs/fire-stm32v2/src/stm32_w25.c
+++ b/configs/fire-stm32v2/src/stm32_w25.c
@@ -106,7 +106,7 @@ int stm32_w25initialize(int minor)
spi = stm32_spibus_initialize(1);
if (!spi)
{
- fdbg("ERROR: Failed to initialize SPI port 2\n");
+ ferr("ERROR: Failed to initialize SPI port 2\n");
return -ENODEV;
}
@@ -115,7 +115,7 @@ int stm32_w25initialize(int minor)
mtd = w25_initialize(spi);
if (!mtd)
{
- fdbg("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n");
+ ferr("ERROR: Failed to bind SPI port 2 to the SST 25 FLASH driver\n");
return -ENODEV;
}
@@ -125,7 +125,7 @@ int stm32_w25initialize(int minor)
ret = ftl_initialize(minor, mtd);
if (ret < 0)
{
- fdbg("ERROR: Initialize the FTL layer\n");
+ ferr("ERROR: Initialize the FTL layer\n");
return ret;
}
#else
@@ -134,7 +134,7 @@ int stm32_w25initialize(int minor)
ret = nxffs_initialize(mtd);
if (ret < 0)
{
- fdbg("ERROR: NXFFS initialization failed: %d\n", -ret);
+ ferr("ERROR: NXFFS initialization failed: %d\n", -ret);
return ret;
}
@@ -144,7 +144,7 @@ int stm32_w25initialize(int minor)
ret = mount(NULL, devname, "nxffs", 0, NULL);
if (ret < 0)
{
- fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+ ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
return ret;
}
#endif
diff --git a/configs/freedom-kl25z/minnsh/defconfig b/configs/freedom-kl25z/minnsh/defconfig
index 753da383ba15156eba3a67e897e077e411ef8e1c..c2ccfaf0a662ebc5c14bd643532850c9e37ac3b5 100644
--- a/configs/freedom-kl25z/minnsh/defconfig
+++ b/configs/freedom-kl25z/minnsh/defconfig
@@ -41,7 +41,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/freedom-kl25z/nsh/defconfig b/configs/freedom-kl25z/nsh/defconfig
index 7a97b9a5bb540e1159af15eaa2e7c8f375ac0499..285f30c8b38d846746ca607711c7ae25f6119576 100644
--- a/configs/freedom-kl25z/nsh/defconfig
+++ b/configs/freedom-kl25z/nsh/defconfig
@@ -41,7 +41,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/freedom-kl25z/src/kl_adxl345.c b/configs/freedom-kl25z/src/kl_adxl345.c
index 0b68d7a8326ca49aa16f8531b23e7df257fd2d55..3560e3d7fa176a85b1e1f31ffe33bd01e69159cd 100644
--- a/configs/freedom-kl25z/src/kl_adxl345.c
+++ b/configs/freedom-kl25z/src/kl_adxl345.c
@@ -183,7 +183,7 @@ static int adxl345_attach(FAR struct adxl345_config_s *state,
{
FAR struct kl_adxl345config_s *priv = (FAR struct kl_adxl345config_s *)state;
- snvdbg("Saving handler %p\n", handler);
+ sninfo("Saving handler %p\n", handler);
DEBUGASSERT(priv);
/* Just save the handler and its argument. We will use it when interrupts
@@ -257,14 +257,14 @@ int adxl345_archinitialize(int minor)
FAR struct spi_dev_s *dev;
int ret;
- sndbg("minor %d\n", minor);
+ sninfo("minor %d\n", minor);
DEBUGASSERT(minor == 0);
/* Check if we are already initialized */
if (!g_adxl345config.handle)
{
- snvdbg("Initializing\n");
+ sninfo("Initializing\n");
/* Configure the ADXL345 interrupt pin as an input */
@@ -275,7 +275,7 @@ int adxl345_archinitialize(int minor)
dev = kl_spibus_initialize(CONFIG_ADXL345_SPIDEV);
if (!dev)
{
- sndbg("Failed to initialize SPI bus %d\n", CONFIG_ADXL345_SPIDEV);
+ snerr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_ADXL345_SPIDEV);
return -ENODEV;
}
@@ -285,7 +285,7 @@ int adxl345_archinitialize(int minor)
adxl345_instantiate(dev, (FAR struct adxl345_config_s *)&g_adxl345config);
if (!g_adxl345config.handle)
{
- sndbg("Failed to instantiate the ADXL345 driver\n");
+ snerr("ERROR: Failed to instantiate the ADXL345 driver\n");
return -ENODEV;
}
@@ -294,7 +294,7 @@ int adxl345_archinitialize(int minor)
ret = adxl345_register(g_adxl345config.handle, CONFIG_ADXL345_DEVMINOR);
if (ret < 0)
{
- sndbg("Failed to register ADXL345 driver: %d\n", ret);
+ snerr("ERROR: Failed to register ADXL345 driver: %d\n", ret);
return ret;
}
}
diff --git a/configs/freedom-kl25z/src/kl_appinit.c b/configs/freedom-kl25z/src/kl_appinit.c
index a00e675cdd87acef4e96afc65eafc46eb5cd6c14..f0126fdd31ce88e359bf71e33de15adef17c365e 100644
--- a/configs/freedom-kl25z/src/kl_appinit.c
+++ b/configs/freedom-kl25z/src/kl_appinit.c
@@ -86,7 +86,7 @@ int board_app_initialize(uintptr_t arg)
ret = adxl345_archinitialize(0);
if (ret < 0)
{
- dbg("ERROR: adxl345_archinitialize failed: %d\n", ret);
+ err("ERROR: adxl345_archinitialize failed: %d\n", ret);
}
#endif
return OK;
diff --git a/configs/freedom-kl25z/src/kl_led.c b/configs/freedom-kl25z/src/kl_led.c
index 6a40bb48b5588c6b7ff0cf650c0f1bacfe0528af..dc2a20ee520644e74ca0f568f2e89b72849c23f4 100644
--- a/configs/freedom-kl25z/src/kl_led.c
+++ b/configs/freedom-kl25z/src/kl_led.c
@@ -81,25 +81,25 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define ledvdbg lldbg
+# define lederr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define ledinfo llerr
# else
-# define ledvdbg(x...)
+# define ledinfo(x...)
# endif
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/* Dump GPIO registers */
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_LEDS)
# define led_dumpgpio(m) kl_dumpgpio(GPIO_LED_B, m)
#else
# define led_dumpgpio(m)
diff --git a/configs/freedom-kl25z/src/kl_pwm.c b/configs/freedom-kl25z/src/kl_pwm.c
index 0d0a73aeb9944de1b08c981de462fa046ff65930..e00d1ca52b956e0e7ef3a46efbbc3f8289f4b2c8 100644
--- a/configs/freedom-kl25z/src/kl_pwm.c
+++ b/configs/freedom-kl25z/src/kl_pwm.c
@@ -98,7 +98,7 @@ int board_pwm_setup(void)
pwm = kl_pwminitialize(0);
if (!pwm)
{
- adbg("Failed to get the KL25 PWM lower half\n");
+ aerr("ERROR: Failed to get the KL25 PWM lower half\n");
return -ENODEV;
}
@@ -107,7 +107,7 @@ int board_pwm_setup(void)
ret = pwm_register("/dev/pwm0", pwm);
if (ret < 0)
{
- adbg("pwm_register failed: %d\n", ret);
+ aerr("ERROR: pwm_register failed: %d\n", ret);
return ret;
}
diff --git a/configs/freedom-kl25z/src/kl_spi.c b/configs/freedom-kl25z/src/kl_spi.c
index c674bd45278d87f51b0000eb533275c8cd57c505..33747807d9e969522f6965a2420f2187bde91b07 100644
--- a/configs/freedom-kl25z/src/kl_spi.c
+++ b/configs/freedom-kl25z/src/kl_spi.c
@@ -55,18 +55,18 @@
* Pre-processor Definitions
****************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
+/* Enables debug output from this file (needs CONFIG_DEBUG_FEATURES too) */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
+# define spierr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define spiinfo llerr
# else
-# define spivdbg(x...)
+# define spiinfo(x...)
# endif
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiinfo(x...)
#endif
/****************************************************************************
@@ -164,7 +164,7 @@ void weak_function kl_spidev_initialize(void)
void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
bool selected)
{
- spivdbg("devid: %d CS: %s\n",
+ spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
#ifdef CONFIG_ADXL345_SPI
@@ -190,7 +190,7 @@ void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
bool selected)
{
- spivdbg("devid: %d CS: %s\n",
+ spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
}
#endif
diff --git a/configs/freedom-kl25z/src/kl_tsi.c b/configs/freedom-kl25z/src/kl_tsi.c
index e030caa9e8c737e039901392c5cf86de82fdd895..9f7f1f70cca2138349aabc817afaa76fa44e93c3 100644
--- a/configs/freedom-kl25z/src/kl_tsi.c
+++ b/configs/freedom-kl25z/src/kl_tsi.c
@@ -135,7 +135,7 @@ static void tsi_calibrate(void)
while (!(getreg32(KL_TSI_GENCS) & TSI_GENCS_EOSF));
g_defcap[i] = getreg32(KL_TSI_DATA) & TSI_DATA_TSICNT_MASK;
- ivdbg("Sensor %d = %d\n", i+1, g_defcap[i]);
+ iinfo("Sensor %d = %d\n", i+1, g_defcap[i]);
}
}
@@ -187,7 +187,7 @@ static ssize_t tsi_read(FAR struct file *filep, FAR char *buf, size_t buflen)
g_currdelta = (uint16_t)deltacap;
- ivdbg("Delta for g_channel %d = %d\n", g_channel, g_currdelta);
+ iinfo("Delta for g_channel %d = %d\n", g_channel, g_currdelta);
buf[0] = g_currdelta & 0xff;
buf[1] = (g_currdelta & 0xff00) >> 8;
diff --git a/configs/freedom-kl25z/src/kl_wifi.c b/configs/freedom-kl25z/src/kl_wifi.c
index 461a681f8850381fa81d38a84ca5efa2101cedf9..56873885718df1bcc54ed61dd51df483f8bfe3b0 100644
--- a/configs/freedom-kl25z/src/kl_wifi.c
+++ b/configs/freedom-kl25z/src/kl_wifi.c
@@ -204,7 +204,7 @@ static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable)
/* Attach and enable, or detach and disable */
- ivdbg("enable:%d\n", enable);
+ iinfo("enable:%d\n", enable);
if (enable)
{
(void)kl_gpioirqattach(GPIO_WIFI_INT, priv->handler);
@@ -219,7 +219,7 @@ static void wl_enable_irq(FAR struct cc3000_config_s *state, bool enable)
static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable)
{
- ivdbg("enable:%d\n", enable);
+ iinfo("enable:%d\n", enable);
/* Active high enable */
@@ -228,7 +228,7 @@ static void wl_enable_power(FAR struct cc3000_config_s *state, bool enable)
static void wl_select(FAR struct cc3000_config_s *state, bool enable)
{
- ivdbg("enable:%d\n", enable);
+ iinfo("enable:%d\n", enable);
/* Active high enable */
@@ -289,7 +289,7 @@ int wireless_archinitialize(size_t max_rx_size)
/* Init SPI bus */
- idbg("minor %d\n", minor);
+ iinfo("minor %d\n", minor);
DEBUGASSERT(CONFIG_CC3000_DEVMINOR == 0);
#ifdef CONFIG_CC3000_PROBES
@@ -304,7 +304,7 @@ int wireless_archinitialize(size_t max_rx_size)
spi = kl_spibus_initialize(CONFIG_CC3000_SPIDEV);
if (!spi)
{
- idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
+ ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
return -ENODEV;
}
@@ -314,7 +314,7 @@ int wireless_archinitialize(size_t max_rx_size)
int ret = cc3000_register(spi, &g_cc3000_info.dev, CONFIG_CC3000_DEVMINOR);
if (ret < 0)
{
- idbg("Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
+ ierr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_CC3000_SPIDEV);
return -ENODEV;
}
diff --git a/configs/freedom-kl26z/minnsh/defconfig b/configs/freedom-kl26z/minnsh/defconfig
index 843bd482e053eab389cb3614ef6c776ec5a70338..b21dd2b7102528c796f512256dac79874bd6587e 100644
--- a/configs/freedom-kl26z/minnsh/defconfig
+++ b/configs/freedom-kl26z/minnsh/defconfig
@@ -41,7 +41,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/freedom-kl26z/nsh/defconfig b/configs/freedom-kl26z/nsh/defconfig
index 40157e1b53ba948be24e35c0c525af8024bf512a..af85a35e635d25a62785c9dfbe496f486d948f96 100644
--- a/configs/freedom-kl26z/nsh/defconfig
+++ b/configs/freedom-kl26z/nsh/defconfig
@@ -41,7 +41,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/freedom-kl26z/src/kl_led.c b/configs/freedom-kl26z/src/kl_led.c
index a729917dca471b3e302ec79c28fff097256d76ad..8d4847cda4426ea14a9d5c1409607332a6d5fec9 100644
--- a/configs/freedom-kl26z/src/kl_led.c
+++ b/configs/freedom-kl26z/src/kl_led.c
@@ -81,25 +81,25 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define ledvdbg lldbg
+# define lederr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define ledinfo llerr
# else
-# define ledvdbg(x...)
+# define ledinfo(x...)
# endif
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/* Dump GPIO registers */
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_LEDS)
# define led_dumpgpio(m) kl_dumpgpio(GPIO_LED_B, m)
#else
# define led_dumpgpio(m)
diff --git a/configs/freedom-kl26z/src/kl_pwm.c b/configs/freedom-kl26z/src/kl_pwm.c
index 4faf9cabe8d07eb233c51392ce607091be9cb42e..672d49e70e8cb7045d4a29b0e1eaf97d4b0de14f 100644
--- a/configs/freedom-kl26z/src/kl_pwm.c
+++ b/configs/freedom-kl26z/src/kl_pwm.c
@@ -98,7 +98,7 @@ int board_pwm_setup(void)
pwm = kl_pwminitialize(0);
if (!pwm)
{
- adbg("Failed to get the KL26 PWM lower half\n");
+ aerr("ERROR: Failed to get the KL26 PWM lower half\n");
return -ENODEV;
}
@@ -107,7 +107,7 @@ int board_pwm_setup(void)
ret = pwm_register("/dev/pwm0", pwm);
if (ret < 0)
{
- adbg("pwm_register failed: %d\n", ret);
+ aerr("ERROR: pwm_register failed: %d\n", ret);
return ret;
}
diff --git a/configs/freedom-kl26z/src/kl_spi.c b/configs/freedom-kl26z/src/kl_spi.c
index 21d4052e82b616b6bb7259a107b6cc7dd16bfe3d..d6e7fbea66599092396100b7b81f52715dae7fae 100644
--- a/configs/freedom-kl26z/src/kl_spi.c
+++ b/configs/freedom-kl26z/src/kl_spi.c
@@ -55,18 +55,18 @@
* Pre-processor Definitions
****************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
+/* Enables debug output from this file (needs CONFIG_DEBUG_FEATURES too) */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define spivdbg lldbg
+# define spierr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define spiinfo llerr
# else
-# define spivdbg(x...)
+# define spiinfo(x...)
# endif
#else
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiinfo(x...)
#endif
/****************************************************************************
@@ -155,7 +155,7 @@ void weak_function kl_spidev_initialize(void)
void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
bool selected)
{
- spivdbg("devid: %d CS: %s\n",
+ spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
}
#endif
@@ -164,7 +164,7 @@ void kl_spi0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
void kl_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
bool selected)
{
- spivdbg("devid: %d CS: %s\n",
+ spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
}
#endif
diff --git a/configs/freedom-kl26z/src/kl_tsi.c b/configs/freedom-kl26z/src/kl_tsi.c
index 95392082e0bb91ed44de9962ade3658e1983c7b8..1d4a283772006557b6e827bdd758d3b91722e92a 100644
--- a/configs/freedom-kl26z/src/kl_tsi.c
+++ b/configs/freedom-kl26z/src/kl_tsi.c
@@ -135,7 +135,7 @@ static void tsi_calibrate(void)
while (!(getreg32(KL_TSI_GENCS) & TSI_GENCS_EOSF));
g_defcap[i] = getreg32(KL_TSI_DATA) & TSI_DATA_TSICNT_MASK;
- ivdbg("Sensor %d = %d\n", i+1, g_defcap[i]);
+ iinfo("Sensor %d = %d\n", i+1, g_defcap[i]);
}
}
@@ -187,7 +187,7 @@ static ssize_t tsi_read(FAR struct file *filep, FAR char *buf, size_t buflen)
g_currdelta = (uint16_t)deltacap;
- ivdbg("Delta for g_channel %d = %d\n", g_channel, g_currdelta);
+ iinfo("Delta for g_channel %d = %d\n", g_channel, g_currdelta);
buf[0] = g_currdelta & 0xff;
buf[1] = (g_currdelta & 0xff00) >> 8;
diff --git a/configs/hymini-stm32v/README.txt b/configs/hymini-stm32v/README.txt
index b808bad2c745863cb845b4f47d488b50c9e44b16..4c7a5f6be7307b2c07b77f810d080ed04c39c305 100644
--- a/configs/hymini-stm32v/README.txt
+++ b/configs/hymini-stm32v/README.txt
@@ -502,7 +502,7 @@ HY-Mini specific Configuration Options
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
- CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
+ CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
HY-MiniSTM32V LCD Hardware Configuration. The HY-Mini board may be delivered with
@@ -702,11 +702,11 @@ Where is one of the following:
USB debug output can be enabled as by changing the following
settings in the configuration file:
- -CONFIG_DEBUG=n
- -CONFIG_DEBUG_VERBOSE=n
+ -CONFIG_DEBUG_FEATURES=n
+ -CONFIG_DEBUG_INFO=n
-CONFIG_DEBUG_USB=n
- +CONFIG_DEBUG=y
- +CONFIG_DEBUG_VERBOSE=y
+ +CONFIG_DEBUG_FEATURES=y
+ +CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_USB=y
-CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=n
diff --git a/configs/hymini-stm32v/buttons/defconfig b/configs/hymini-stm32v/buttons/defconfig
index 3141e0c160594740550ed8e9aa98a8ef5bd87d02..bc42209cf81d314dbfb8ca37966270b7fa98ca09 100644
--- a/configs/hymini-stm32v/buttons/defconfig
+++ b/configs/hymini-stm32v/buttons/defconfig
@@ -42,7 +42,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_HEAPCHECK=y
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/hymini-stm32v/nsh/defconfig b/configs/hymini-stm32v/nsh/defconfig
index 69662e887c434b57814cc47bd44e5613f7ac1d4d..d572218f049512522de27c156754f02136565f55 100644
--- a/configs/hymini-stm32v/nsh/defconfig
+++ b/configs/hymini-stm32v/nsh/defconfig
@@ -42,7 +42,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_HEAPCHECK=y
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/hymini-stm32v/nsh2/defconfig b/configs/hymini-stm32v/nsh2/defconfig
index e36492fc6aa6dcfa5d27377944b53b1fef5a4796..4e191fbbbf25b87ad68e6d81ed1c2315cf9f4b0c 100644
--- a/configs/hymini-stm32v/nsh2/defconfig
+++ b/configs/hymini-stm32v/nsh2/defconfig
@@ -42,7 +42,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_HEAPCHECK=y
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/hymini-stm32v/src/stm32_appinit.c b/configs/hymini-stm32v/src/stm32_appinit.c
index 4a7b2206337c53b4dbe3558e0a23ddb02eae8c27..bff825036b6fe70f5cf3cbc6481d6a845c72002e 100644
--- a/configs/hymini-stm32v/src/stm32_appinit.c
+++ b/configs/hymini-stm32v/src/stm32_appinit.c
@@ -216,7 +216,7 @@ int board_app_initialize(uintptr_t arg)
/* Use SD card detect pin to check if a card is inserted */
cd_status = !stm32_gpioread(GPIO_SD_CD);
- vdbg("Card detect : %hhu\n", cd_status);
+ info("Card detect : %hhu\n", cd_status);
sdio_mediachange(g_sdiodev, cd_status);
#endif
diff --git a/configs/hymini-stm32v/src/stm32_leds.c b/configs/hymini-stm32v/src/stm32_leds.c
index f65b7a21e2ddc6ab80d4f87d1e7fd6c3b51f7798..0f72b14429cd85d3503f5e482ba884bc2512ae3e 100644
--- a/configs/hymini-stm32v/src/stm32_leds.c
+++ b/configs/hymini-stm32v/src/stm32_leds.c
@@ -57,16 +57,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/* The following definitions map the encoded LED setting to GPIO settings */
diff --git a/configs/hymini-stm32v/src/stm32_r61505u.c b/configs/hymini-stm32v/src/stm32_r61505u.c
index be67d14ac93e8f548ddd86256289c0557b064fa7..40da4c42ecb1423f0cd1a7773c62a8994c3b7b6d 100644
--- a/configs/hymini-stm32v/src/stm32_r61505u.c
+++ b/configs/hymini-stm32v/src/stm32_r61505u.c
@@ -94,9 +94,13 @@
/* Debug ******************************************************************************/
#ifdef CONFIG_DEBUG_LCD
-# define lcddbg(format, ...) vdbg(format, ##__VA_ARGS__)
+# define lcderr err
+# define lcdwarn warn
+# define lcdinfo info
#else
-# define lcddbg(x...)
+# define lcderr(x...)
+# define lcdwarn(x...)
+# define lcdinfo(x...)
#endif
/* This should be put elsewhere (possibly include/nuttx/compiler.h) */
@@ -562,7 +566,7 @@ static int lcd_getvideoinfo(FAR struct lcd_dev_s *dev,
FAR struct fb_videoinfo_s *vinfo)
{
DEBUGASSERT(dev && vinfo);
- gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+ ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
@@ -581,7 +585,7 @@ static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
FAR struct lcd_planeinfo_s *pinfo)
{
DEBUGASSERT(dev && pinfo && planeno == 0);
- gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+ ginfo("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
return OK;
@@ -598,7 +602,7 @@ static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
static int lcd_getpower(struct lcd_dev_s *dev)
{
- gvdbg("power: %d\n", 0);
+ ginfo("power: %d\n", 0);
return g_lcddev.power;
}
@@ -618,7 +622,7 @@ static int lcd_setpower(struct lcd_dev_s *dev, int power)
return OK;
}
- gvdbg("power: %d\n", power);
+ ginfo("power: %d\n", power);
DEBUGASSERT(power <= CONFIG_LCD_MAXPOWER);
/* Set new power level */
@@ -639,7 +643,7 @@ static int lcd_setpower(struct lcd_dev_s *dev, int power)
duty = LCD_BL_TIMER_PERIOD - 1;
}
- gvdbg("PWM duty: %d\n", duty);
+ ginfo("PWM duty: %d\n", duty);
putreg16((uint16_t)duty, STM32_TIM3_CCR2);
#endif
/* TODO turn the display on */
@@ -648,7 +652,7 @@ static int lcd_setpower(struct lcd_dev_s *dev, int power)
{
/* FIXME: Turn display off ? */
- gvdbg("Force PWM to 0\n");
+ ginfo("Force PWM to 0\n");
putreg16((uint16_t)0, STM32_TIM3_CCR2);
}
@@ -666,7 +670,7 @@ static int lcd_setpower(struct lcd_dev_s *dev, int power)
static int lcd_getcontrast(struct lcd_dev_s *dev)
{
- gvdbg("Not implemented\n");
+ ginfo("Not implemented\n");
return -ENOSYS;
}
@@ -680,7 +684,7 @@ static int lcd_getcontrast(struct lcd_dev_s *dev)
static int lcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
{
- gvdbg("Not implemented\n");
+ ginfo("Not implemented\n");
return -ENOSYS;
}
@@ -880,26 +884,26 @@ static void lcd_backlight(void)
/* Dump timer3 registers */
- lcddbg("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR));
- lcddbg("CR1: %04x\n", getreg32(STM32_TIM3_CR1));
- lcddbg("CR2: %04x\n", getreg32(STM32_TIM3_CR2));
- lcddbg("SMCR: %04x\n", getreg32(STM32_TIM3_SMCR));
- lcddbg("DIER: %04x\n", getreg32(STM32_TIM3_DIER));
- lcddbg("SR: %04x\n", getreg32(STM32_TIM3_SR));
- lcddbg("EGR: %04x\n", getreg32(STM32_TIM3_EGR));
- lcddbg("CCMR1: %04x\n", getreg32(STM32_TIM3_CCMR1));
- lcddbg("CCMR2: %04x\n", getreg32(STM32_TIM3_CCMR2));
- lcddbg("CCER: %04x\n", getreg32(STM32_TIM3_CCER));
- lcddbg("CNT: %04x\n", getreg32(STM32_TIM3_CNT));
- lcddbg("PSC: %04x\n", getreg32(STM32_TIM3_PSC));
- lcddbg("ARR: %04x\n", getreg32(STM32_TIM3_ARR));
- lcddbg("CCR1: %04x\n", getreg32(STM32_TIM3_CCR1));
- lcddbg("CCR2: %04x\n", getreg32(STM32_TIM3_CCR2));
- lcddbg("CCR3: %04x\n", getreg32(STM32_TIM3_CCR3));
- lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
- lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
- lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
- lcddbg("DMAR: %04x\n", getreg32(STM32_TIM3_DMAR));
+ lcdinfo("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR));
+ lcdinfo("CR1: %04x\n", getreg32(STM32_TIM3_CR1));
+ lcdinfo("CR2: %04x\n", getreg32(STM32_TIM3_CR2));
+ lcdinfo("SMCR: %04x\n", getreg32(STM32_TIM3_SMCR));
+ lcdinfo("DIER: %04x\n", getreg32(STM32_TIM3_DIER));
+ lcdinfo("SR: %04x\n", getreg32(STM32_TIM3_SR));
+ lcdinfo("EGR: %04x\n", getreg32(STM32_TIM3_EGR));
+ lcdinfo("CCMR1: %04x\n", getreg32(STM32_TIM3_CCMR1));
+ lcdinfo("CCMR2: %04x\n", getreg32(STM32_TIM3_CCMR2));
+ lcdinfo("CCER: %04x\n", getreg32(STM32_TIM3_CCER));
+ lcdinfo("CNT: %04x\n", getreg32(STM32_TIM3_CNT));
+ lcdinfo("PSC: %04x\n", getreg32(STM32_TIM3_PSC));
+ lcdinfo("ARR: %04x\n", getreg32(STM32_TIM3_ARR));
+ lcdinfo("CCR1: %04x\n", getreg32(STM32_TIM3_CCR1));
+ lcdinfo("CCR2: %04x\n", getreg32(STM32_TIM3_CCR2));
+ lcdinfo("CCR3: %04x\n", getreg32(STM32_TIM3_CCR3));
+ lcdinfo("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
+ lcdinfo("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
+ lcdinfo("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
+ lcdinfo("DMAR: %04x\n", getreg32(STM32_TIM3_DMAR));
}
#endif
@@ -921,7 +925,7 @@ int board_lcd_initialize(void)
{
unsigned short id;
- gvdbg("Initializing\n");
+ ginfo("Initializing\n");
/* Configure GPIO pins and configure the FSMC to support the LCD */
@@ -938,7 +942,7 @@ int board_lcd_initialize(void)
{
/* Not a R61505U ? */
- gdbg("board_lcd_initialize: LCD ctrl is not a R61505U");
+ lcderr("ERROR: board_lcd_initialize: LCD ctrl is not a R61505U");
return ERROR;
}
diff --git a/configs/hymini-stm32v/src/stm32_spi.c b/configs/hymini-stm32v/src/stm32_spi.c
index 0f1852dd061cb032606cce8fa080a7a3d00de91c..757dffb6cca542e7b2aa4968270fbaa540dd480e 100644
--- a/configs/hymini-stm32v/src/stm32_spi.c
+++ b/configs/hymini-stm32v/src/stm32_spi.c
@@ -58,28 +58,18 @@
* Pre-processor Definitions
************************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#define SPI_DEBUG /* Define to enable debug */
-#define SPI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SPI_DEBUG
-# define spidbg lldbg
-# ifdef SPI_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+/* Enables debug output from this file */
+
+#ifdef CONFIG_DEBUG_SPI
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# undef SPI_VERBOSE
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -102,7 +92,7 @@ void stm32_spidev_initialize(void)
#ifdef CONFIG_STM32_SPI1
/* Configure the SPI-based touch screen CS GPIO */
- spivdbg("Configure GPIO for SPI1/CS\n");
+ spiinfo("Configure GPIO for SPI1/CS\n");
stm32_configgpio(GPIO_TS_CS);
#endif
}
@@ -135,7 +125,7 @@ void stm32_spidev_initialize(void)
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_TOUCHSCREEN)
{
@@ -154,7 +144,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -166,7 +156,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
diff --git a/configs/hymini-stm32v/src/stm32_ssd1289.c b/configs/hymini-stm32v/src/stm32_ssd1289.c
index c8889c38a5911cda06b850b16440e3b0c061bae7..dc9c0b964cae354a9bd0dcdf396fc84ec9f5264d 100644
--- a/configs/hymini-stm32v/src/stm32_ssd1289.c
+++ b/configs/hymini-stm32v/src/stm32_ssd1289.c
@@ -69,13 +69,13 @@
* also be enabled.
*/
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+# undef CONFIG_DEBUG_INFO
# undef CONFIG_DEBUG_GRAPHICS
# undef CONFIG_DEBUG_LCD
#endif
-#ifndef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_INFO
# undef CONFIG_DEBUG_LCD
#endif
@@ -103,21 +103,21 @@
#define LCD_DATA 0x60020000 /* RS = 1 */
/* Debug ******************************************************************************/
+
#ifdef CONFIG_DEBUG_LCD
-# define lcddbg dbg
-# define lcdvdbg vdbg
+# define lcderr err
+# define lcdwarn warn
+# define lcdinfo info
#else
-# define lcddbg(x...)
-# define lcdvdbg(x...)
+# define lcderr(x...)
+# define lcdwarn(x...)
+# define lcdinfo(x...)
#endif
-/**************************************************************************************
- * Private Type Definition
- **************************************************************************************/
-
/**************************************************************************************
* Private Function Prototypes
**************************************************************************************/
+
/* Low Level LCD access */
static void stm32_select(FAR struct ssd1289_lcd_s *dev);
@@ -359,26 +359,26 @@ static void init_lcd_backlight(void)
/* Dump timer3 registers */
- lcddbg("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR));
- lcddbg("CR1: %04x\n", getreg32(STM32_TIM3_CR1));
- lcddbg("CR2: %04x\n", getreg32(STM32_TIM3_CR2));
- lcddbg("SMCR: %04x\n", getreg32(STM32_TIM3_SMCR));
- lcddbg("DIER: %04x\n", getreg32(STM32_TIM3_DIER));
- lcddbg("SR: %04x\n", getreg32(STM32_TIM3_SR));
- lcddbg("EGR: %04x\n", getreg32(STM32_TIM3_EGR));
- lcddbg("CCMR1: %04x\n", getreg32(STM32_TIM3_CCMR1));
- lcddbg("CCMR2: %04x\n", getreg32(STM32_TIM3_CCMR2));
- lcddbg("CCER: %04x\n", getreg32(STM32_TIM3_CCER));
- lcddbg("CNT: %04x\n", getreg32(STM32_TIM3_CNT));
- lcddbg("PSC: %04x\n", getreg32(STM32_TIM3_PSC));
- lcddbg("ARR: %04x\n", getreg32(STM32_TIM3_ARR));
- lcddbg("CCR1: %04x\n", getreg32(STM32_TIM3_CCR1));
- lcddbg("CCR2: %04x\n", getreg32(STM32_TIM3_CCR2));
- lcddbg("CCR3: %04x\n", getreg32(STM32_TIM3_CCR3));
- lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
- lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
- lcddbg("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
- lcddbg("DMAR: %04x\n", getreg32(STM32_TIM3_DMAR));
+ lcdinfo("APB1ENR: %08x\n", getreg32(STM32_RCC_APB1ENR));
+ lcdinfo("CR1: %04x\n", getreg32(STM32_TIM3_CR1));
+ lcdinfo("CR2: %04x\n", getreg32(STM32_TIM3_CR2));
+ lcdinfo("SMCR: %04x\n", getreg32(STM32_TIM3_SMCR));
+ lcdinfo("DIER: %04x\n", getreg32(STM32_TIM3_DIER));
+ lcdinfo("SR: %04x\n", getreg32(STM32_TIM3_SR));
+ lcdinfo("EGR: %04x\n", getreg32(STM32_TIM3_EGR));
+ lcdinfo("CCMR1: %04x\n", getreg32(STM32_TIM3_CCMR1));
+ lcdinfo("CCMR2: %04x\n", getreg32(STM32_TIM3_CCMR2));
+ lcdinfo("CCER: %04x\n", getreg32(STM32_TIM3_CCER));
+ lcdinfo("CNT: %04x\n", getreg32(STM32_TIM3_CNT));
+ lcdinfo("PSC: %04x\n", getreg32(STM32_TIM3_PSC));
+ lcdinfo("ARR: %04x\n", getreg32(STM32_TIM3_ARR));
+ lcdinfo("CCR1: %04x\n", getreg32(STM32_TIM3_CCR1));
+ lcdinfo("CCR2: %04x\n", getreg32(STM32_TIM3_CCR2));
+ lcdinfo("CCR3: %04x\n", getreg32(STM32_TIM3_CCR3));
+ lcdinfo("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
+ lcdinfo("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
+ lcdinfo("CCR4: %04x\n", getreg32(STM32_TIM3_CCR4));
+ lcdinfo("DMAR: %04x\n", getreg32(STM32_TIM3_DMAR));
}
/************************************************************************************
@@ -482,7 +482,7 @@ int board_lcd_initialize(void)
if (!g_ssd1289drvr)
{
- lcdvdbg("Initializing\n");
+ lcdinfo("Initializing\n");
init_lcd_backlight();
@@ -496,7 +496,7 @@ int board_lcd_initialize(void)
g_ssd1289drvr = ssd1289_lcdinitialize(&g_ssd1289);
if (!g_ssd1289drvr)
{
- lcddbg("ERROR: ssd1289_lcdinitialize failed\n");
+ lcderr("ERROR: ssd1289_lcdinitialize failed\n");
return -ENODEV;
}
}
diff --git a/configs/hymini-stm32v/src/stm32_ts.c b/configs/hymini-stm32v/src/stm32_ts.c
index 1344c245cd5c8570d5ca5fefb49ce64483192a8e..678dba89a245dafabdedf634e20650b5fd6d2049 100644
--- a/configs/hymini-stm32v/src/stm32_ts.c
+++ b/configs/hymini-stm32v/src/stm32_ts.c
@@ -95,7 +95,7 @@ static xcpt_t tc_isr;
/* Attach the ADS7843E interrupt handler to the GPIO interrupt */
static int hymini_ts_irq_attach(FAR struct ads7843e_config_s *state, xcpt_t isr)
{
- ivdbg("hymini_ts_irq_attach\n");
+ iinfo("hymini_ts_irq_attach\n");
tc_isr = isr;
stm32_gpiosetevent(GPIO_TS_IRQ, true, true, true, isr);
@@ -106,7 +106,7 @@ static int hymini_ts_irq_attach(FAR struct ads7843e_config_s *state, xcpt_t isr)
static void hymini_ts_irq_enable(FAR struct ads7843e_config_s *state,
bool enable)
{
- illvdbg("%d\n", enable);
+ illinfo("%d\n", enable);
stm32_gpiosetevent(GPIO_TS_IRQ, true, true, true, enable? tc_isr:NULL);
}
@@ -153,12 +153,12 @@ int board_tsc_setup(int minor)
{
FAR struct spi_dev_s *dev;
- idbg("minor %d\n", minor);
+ iinfo("minor %d\n", minor);
dev = stm32_spibus_initialize(1);
if (!dev)
{
- idbg("Failed to initialize SPI bus\n");
+ ierr("ERROR: Failed to initialize SPI bus\n");
return -ENODEV;
}
diff --git a/configs/hymini-stm32v/src/stm32_usbdev.c b/configs/hymini-stm32v/src/stm32_usbdev.c
index d7e868c9031e0661f442f64f0d75518ce473eb65..c1a21be62407ac6d105d2aaef6ae3a1b87deab94 100644
--- a/configs/hymini-stm32v/src/stm32_usbdev.c
+++ b/configs/hymini-stm32v/src/stm32_usbdev.c
@@ -73,7 +73,7 @@
void stm32_usbinitialize(void)
{
- ulldbg("called\n");
+ ullinfo("called\n");
/* USB Soft Connect Pullup */
stm32_configgpio(GPIO_USB_PULLUP);
@@ -111,6 +111,5 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
{
- ulldbg("resume: %d\n", resume);
+ ullinfo("resume: %d\n", resume);
}
-
diff --git a/configs/hymini-stm32v/usbmsc/defconfig b/configs/hymini-stm32v/usbmsc/defconfig
index a38efa7b82fb3d12afacce7111a84cb3b4259ddb..a84c37fb42b36277a7879257d89f19093dfd43e5 100644
--- a/configs/hymini-stm32v/usbmsc/defconfig
+++ b/configs/hymini-stm32v/usbmsc/defconfig
@@ -42,7 +42,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_HEAPCHECK=y
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/hymini-stm32v/usbnsh/defconfig b/configs/hymini-stm32v/usbnsh/defconfig
index d744b1a2ca9e1eaca82e12f6c68ffcf505873d6f..200447a70d3be91ce4492899879234ed2a76980c 100644
--- a/configs/hymini-stm32v/usbnsh/defconfig
+++ b/configs/hymini-stm32v/usbnsh/defconfig
@@ -42,7 +42,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_HEAPCHECK=y
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/hymini-stm32v/usbserial/defconfig b/configs/hymini-stm32v/usbserial/defconfig
index 6183ec98d4fb6ee6cf08f2aea868c284041b8042..aefb46b048050644e8dabb3c14d98a98e0469059 100644
--- a/configs/hymini-stm32v/usbserial/defconfig
+++ b/configs/hymini-stm32v/usbserial/defconfig
@@ -42,7 +42,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_HEAPCHECK=y
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/kwikstik-k40/ostest/defconfig b/configs/kwikstik-k40/ostest/defconfig
index 51b5c56a7a424db619fa90b77d80738e527d3abe..60166ea794cf15fc0cb615c6fd4589843ea4b11a 100644
--- a/configs/kwikstik-k40/ostest/defconfig
+++ b/configs/kwikstik-k40/ostest/defconfig
@@ -41,7 +41,7 @@ CONFIG_INTELHEX_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/kwikstik-k40/src/k40_lcd.c b/configs/kwikstik-k40/src/k40_lcd.c
index bd955fb4fac0afe3312860064319680f1f040ec6..a1d99855314646e95f3a8bebf75a74d131b64a9c 100644
--- a/configs/kwikstik-k40/src/k40_lcd.c
+++ b/configs/kwikstik-k40/src/k40_lcd.c
@@ -61,9 +61,9 @@
/* Debug ******************************************************************************/
#ifdef CONFIG_DEBUG_LCD
-# define lcddbg(format, ...) vdbg(format, ##__VA_ARGS__)
+# define lcderr(format, ...) info(format, ##__VA_ARGS__)
#else
-# define lcddbg(x...)
+# define lcderr(x...)
#endif
/**************************************************************************************
@@ -98,7 +98,7 @@
int board_lcd_initialize(void)
{
- gvdbg("Initializing\n");
+ ginfo("Initializing\n");
#warning "Missing logic"
return OK;
}
diff --git a/configs/kwikstik-k40/src/k40_leds.c b/configs/kwikstik-k40/src/k40_leds.c
index 8a5cfe69ab0bbffe3a7643320f985639699c28e1..8605c334fca52b6942b1de4e8481e3d0b964df14 100644
--- a/configs/kwikstik-k40/src/k40_leds.c
+++ b/configs/kwikstik-k40/src/k40_leds.c
@@ -47,26 +47,20 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledwarn llwarn
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledwarn(x...)
+# define ledinfo(x...)
#endif
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
diff --git a/configs/kwikstik-k40/src/k40_spi.c b/configs/kwikstik-k40/src/k40_spi.c
index 7b14ea57b8b8ee2c78ef39120c20a831903cffd6..4c4769bf6c230b1ebf24cec6b0ad74700e29a22f 100644
--- a/configs/kwikstik-k40/src/k40_spi.c
+++ b/configs/kwikstik-k40/src/k40_spi.c
@@ -57,25 +57,18 @@
* Pre-processor Definitions
************************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
+/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
-# define spidbg lldbg
-# ifdef CONFIG_DEBUG_SPI_VERBOSE
-# define spivdbg lldbg
-# else
-# define spivdbg(x...)
-# endif
+# define spierr llerr
+# define spiwarn llwarn
+# define spiinfo llinfo
#else
-# undef CONFIG_DEBUG_SPI_VERBOSE
-# define spidbg(x...)
-# define spivdbg(x...)
+# define spierr(x...)
+# define spiwarn(x...)
+# define spiinfo(x...)
#endif
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -121,7 +114,7 @@ void weak_function kinetis_spidev_initialize(void)
#ifdef CONFIG_KINETIS_SPI1
void kinetis_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
# warning "Missing logic"
}
@@ -135,7 +128,7 @@ uint8_t kinetis_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_KINETIS_SPI2
void kinetis_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
# warning "Missing logic"
}
@@ -149,7 +142,7 @@ uint8_t kinetis_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_KINETIS_SPI3
void kinetis_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
# warning "Missing logic"
}
diff --git a/configs/kwikstik-k40/src/k40_usbdev.c b/configs/kwikstik-k40/src/k40_usbdev.c
index cfd9f071e8a91be9aa20a1fa8a76db7a9549895c..f4e206578c442a8794068fd045078acc8e95099b 100644
--- a/configs/kwikstik-k40/src/k40_usbdev.c
+++ b/configs/kwikstik-k40/src/k40_usbdev.c
@@ -108,6 +108,6 @@ int kinetis_usbpullup(FAR struct usbdev_s *dev, bool enable)
void kinetis_usbsuspend(FAR struct usbdev_s *dev, bool resume)
{
- ulldbg("resume: %d\n", resume);
+ ullinfo("resume: %d\n", resume);
#warning "Missing logic"
}
diff --git a/configs/launchxl-tms57004/nsh/defconfig b/configs/launchxl-tms57004/nsh/defconfig
index 082be95f2bd8f1964a61078df9692fdd8107cb4e..cae356b118c7eec621e5d2e9b62e72d88b72f323 100644
--- a/configs/launchxl-tms57004/nsh/defconfig
+++ b/configs/launchxl-tms57004/nsh/defconfig
@@ -46,7 +46,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/launchxl-tms57004/src/tms570_autoleds.c b/configs/launchxl-tms57004/src/tms570_autoleds.c
index 761986041d703f1804fc42bffe9eb54204f8dc3e..0bf1c51abdcf59a4ae8f0b23ee0a747af7d58615 100644
--- a/configs/launchxl-tms57004/src/tms570_autoleds.c
+++ b/configs/launchxl-tms57004/src/tms570_autoleds.c
@@ -93,16 +93,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/lincoln60/README.txt b/configs/lincoln60/README.txt
index 1bea5b5bfb066b128d4e2b9f56b08f67ce349d32..b5320549c0123403913d1d2750c2698bd037c12c 100644
--- a/configs/lincoln60/README.txt
+++ b/configs/lincoln60/README.txt
@@ -386,9 +386,9 @@ Lincoln 60 Configuration Options
CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs
- CONFIG_DEBUG.
+ CONFIG_DEBUG_FEATURES.
CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
- Also needs CONFIG_DEBUG.
+ Also needs CONFIG_DEBUG_FEATURES.
CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
CONFIG_LPC17_MULTICAST - Enable receipt of multicast (and unicast) frames.
Automatically set if CONFIG_NET_IGMP is selected.
diff --git a/configs/lincoln60/netnsh/defconfig b/configs/lincoln60/netnsh/defconfig
index c48f2977868fb84b65b93c20b70524ba889d24dd..38c6cb0587dc3644a53b04601c829408a2cfcf07 100644
--- a/configs/lincoln60/netnsh/defconfig
+++ b/configs/lincoln60/netnsh/defconfig
@@ -46,7 +46,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/lincoln60/nsh/defconfig b/configs/lincoln60/nsh/defconfig
index 54c6ad3f8cc1ba901a9e22b6391e080446bc2104..609322785bf781e2253ddd05f633618c927ba9eb 100644
--- a/configs/lincoln60/nsh/defconfig
+++ b/configs/lincoln60/nsh/defconfig
@@ -41,7 +41,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/lincoln60/src/lpc17_leds.c b/configs/lincoln60/src/lpc17_leds.c
index c3c4b515a6fd133f2971c8857a335054f4b23382..9a99465a3250904f2244d0d1fa9bef2f12fd1929 100644
--- a/configs/lincoln60/src/lpc17_leds.c
+++ b/configs/lincoln60/src/lpc17_leds.c
@@ -60,25 +60,25 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
-# define ledvdbg lldbg
+# define lederr llerr
+# ifdef CONFIG_DEBUG_INFO
+# define ledinfo llerr
# else
-# define ledvdbg(x...)
+# define ledinfo(x...)
# endif
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/* Dump GPIO registers */
-#if defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_LEDS)
+#if defined(CONFIG_DEBUG_INFO) && defined(CONFIG_DEBUG_LEDS)
# define led_dumpgpio(m) lpc17_dumpgpio(LINCOLN60_LED2, m)
#else
# define led_dumpgpio(m)
diff --git a/configs/lincoln60/thttpd-binfs/defconfig b/configs/lincoln60/thttpd-binfs/defconfig
index a752c4c72ffcaef339a402a1d494f03917c018ba..1cbd3aeb336a6251ffd51828eb4dafe61692e5c2 100644
--- a/configs/lincoln60/thttpd-binfs/defconfig
+++ b/configs/lincoln60/thttpd-binfs/defconfig
@@ -45,7 +45,7 @@ CONFIG_INTELHEX_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/lm3s6432-s2e/nsh/defconfig b/configs/lm3s6432-s2e/nsh/defconfig
index 0d4695c79b707b127dd0e8b620d6c1f4c15ea8b5..618b1a5be18ad2e81f856a3a1312c593ff9aedb9 100644
--- a/configs/lm3s6432-s2e/nsh/defconfig
+++ b/configs/lm3s6432-s2e/nsh/defconfig
@@ -42,7 +42,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/lm3s6432-s2e/src/lm_ethernet.c b/configs/lm3s6432-s2e/src/lm_ethernet.c
index c10d261adc80b7cf98cc7fe69934d53b2af441dd..2d7f2c64148269dad36ce7fa684f3a798602e09b 100644
--- a/configs/lm3s6432-s2e/src/lm_ethernet.c
+++ b/configs/lm3s6432-s2e/src/lm_ethernet.c
@@ -83,7 +83,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr)
user0 = getreg32(TIVA_FLASH_USERREG0);
user1 = getreg32(TIVA_FLASH_USERREG1);
- nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
+ nllinfo("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff);
/* Re-format that MAC address the way that the network expects to see it */
diff --git a/configs/lm3s6432-s2e/src/lm_leds.c b/configs/lm3s6432-s2e/src/lm_leds.c
index 54bc5c188ff2864f48594d85138068b733374988..5dc259383fa448a3fdbb4f3fef46427c6de5e547 100644
--- a/configs/lm3s6432-s2e/src/lm_leds.c
+++ b/configs/lm3s6432-s2e/src/lm_leds.c
@@ -55,16 +55,16 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/* Dump GPIO registers */
@@ -96,7 +96,7 @@ static uint8_t g_nest;
#ifdef CONFIG_ARCH_LEDS
void board_autoled_initialize(void)
{
- leddbg("Initializing\n");
+ ledinfo("Initializing\n");
/* Configure Port F, Bit 2 as an output, initial value=OFF */
diff --git a/configs/lm3s6432-s2e/src/lm_ssi.c b/configs/lm3s6432-s2e/src/lm_ssi.c
index 66882e7f10a4552191b40c68c104d8ae0a3ff9db..9c3e7ebc5ad99b158d034cc44265d7edc4557b7b 100644
--- a/configs/lm3s6432-s2e/src/lm_ssi.c
+++ b/configs/lm3s6432-s2e/src/lm_ssi.c
@@ -57,36 +57,20 @@
* Pre-processor Definitions
************************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SSI_DEBUG /* Define to enable debug */
-#undef SSI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SSI_DEBUG
-# define ssidbg lldbg
-# ifdef SSI_VERBOSE
-# define ssivdbg lldbg
-# else
-# define ssivdbg(x...)
-# endif
-#else
-# undef SSI_VERBOSE
-# define ssidbg(x...)
-# define ssivdbg(x...)
-#endif
-
-/* Dump GPIO registers */
+/* CONFIG_DEBUG_SPI enables debug output from this file */
-#ifdef SSI_VERBOSE
+#ifdef CONFIG_DEBUG_SPI
+# define ssierr llerr
+# define ssiwarn llwarn
+# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
+# define ssierr(x...)
+# define ssiwarn(x...)
+# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -129,7 +113,7 @@ void weak_function lm_ssidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
if (devid == SPIDEV_MMCSD)
@@ -144,7 +128,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
- ssidbg("Returning SPI_STATUS_PRESENT\n");
+ ssiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
diff --git a/configs/lm3s6965-ek/discover/defconfig b/configs/lm3s6965-ek/discover/defconfig
index 3a31755617a36045a574fe2583b4330b44833edb..1ede54c185d14accb1102aef1766b803c65568cf 100644
--- a/configs/lm3s6965-ek/discover/defconfig
+++ b/configs/lm3s6965-ek/discover/defconfig
@@ -42,7 +42,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/lm3s6965-ek/nsh/defconfig b/configs/lm3s6965-ek/nsh/defconfig
index 3a31755617a36045a574fe2583b4330b44833edb..1ede54c185d14accb1102aef1766b803c65568cf 100644
--- a/configs/lm3s6965-ek/nsh/defconfig
+++ b/configs/lm3s6965-ek/nsh/defconfig
@@ -42,7 +42,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/lm3s6965-ek/nx/defconfig b/configs/lm3s6965-ek/nx/defconfig
index 3d779630f9d0f67312d43b7e2cf8f85fb406e77e..0753cc248fa5fc4034bce8e3cb7c09afe55cf58b 100644
--- a/configs/lm3s6965-ek/nx/defconfig
+++ b/configs/lm3s6965-ek/nx/defconfig
@@ -41,7 +41,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/lm3s6965-ek/src/lm_ethernet.c b/configs/lm3s6965-ek/src/lm_ethernet.c
index 4a467dd4591886d84b1347d3776978ff120bf6d9..bc26a77ef589876b4fc9df0532fac9e3df452a34 100644
--- a/configs/lm3s6965-ek/src/lm_ethernet.c
+++ b/configs/lm3s6965-ek/src/lm_ethernet.c
@@ -83,7 +83,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr)
user0 = getreg32(TIVA_FLASH_USERREG0);
user1 = getreg32(TIVA_FLASH_USERREG1);
- nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
+ nllinfo("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff);
/* Re-format that MAC address the way that the network expects to see it */
diff --git a/configs/lm3s6965-ek/src/lm_leds.c b/configs/lm3s6965-ek/src/lm_leds.c
index 764304281769307cd98fc5ff0742037d667a0b03..a26dd8cec9b269987c718e0fe8e08615d61dc059 100644
--- a/configs/lm3s6965-ek/src/lm_leds.c
+++ b/configs/lm3s6965-ek/src/lm_leds.c
@@ -55,34 +55,20 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
-#else
-# define leddbg(x...)
-# define ledvdbg(x...)
-#endif
-
-/* Dump GPIO registers */
+/* CONFIG_DEBUG_LEDS enables debug output from this file */
#ifdef CONFIG_DEBUG_LEDS
+# define lederr llerr
+# define ledinfo llinfo
+# define ledinfo llinfo
# define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m)
#else
+# define lederr(x...)
+# define ledinfo(x...)
+# define ledinfo(x...)
# define led_dumpgpio(m)
#endif
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -96,7 +82,7 @@ static uint8_t g_nest;
#ifdef CONFIG_ARCH_LEDS
void board_autoled_initialize(void)
{
- leddbg("Initializing\n");
+ ledinfo("Initializing\n");
/* Configure Port E, Bit 1 as an output, initial value=OFF */
diff --git a/configs/lm3s6965-ek/src/lm_oled.c b/configs/lm3s6965-ek/src/lm_oled.c
index 6eee4e35ed4e3fb510a486ec3ed328c2360ccec2..de1a4a23e29ed9c4c902d53d813388728b82979d 100644
--- a/configs/lm3s6965-ek/src/lm_oled.c
+++ b/configs/lm3s6965-ek/src/lm_oled.c
@@ -63,21 +63,21 @@
* Verbose debug must also be enabled
*/
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+# undef CONFIG_DEBUG_INFO
# undef CONFIG_DEBUG_GRAPHICS
#endif
-#ifndef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_INFO
# undef CONFIG_LCD_RITDEBUG
#endif
#ifdef CONFIG_LCD_RITDEBUG
-# define ritdbg(format, ...) vdbg(format, ##__VA_ARGS__)
+# define riterr(format, ...) info(format, ##__VA_ARGS__)
# define oleddc_dumpgpio(m) tiva_dumpgpio(OLEDDC_GPIO, m)
# define oledcs_dumpgpio(m) tiva_dumpgpio(OLEDCS_GPIO, m)
#else
-# define ritdbg(x...)
+# define riterr(x...)
# define oleddc_dumpgpio(m)
# define oledcs_dumpgpio(m)
#endif
@@ -114,7 +114,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
spi = tiva_ssibus_initialize(0);
if (!spi)
{
- glldbg("Failed to initialize SSI port 0\n");
+ gllerr("ERROR: Failed to initialize SSI port 0\n");
}
else
{
@@ -123,11 +123,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
dev = rit_initialize(spi, devno);
if (!dev)
{
- glldbg("Failed to bind SSI port 0 to OLED %d: %d\n", devno);
+ gllerr("ERROR: Failed to bind SSI port 0 to OLED %d: %d\n", devno);
}
else
{
- gllvdbg("Bound SSI port 0 to OLED %d\n", devno);
+ gllinfo("Bound SSI port 0 to OLED %d\n", devno);
/* And turn the OLED on (CONFIG_LCD_MAXPOWER should be 1) */
diff --git a/configs/lm3s6965-ek/src/lm_ssi.c b/configs/lm3s6965-ek/src/lm_ssi.c
index 5b105fed348594d2418e0b34356e83a6d73ab4e5..829567da7e67e4b751f4c8a3a498fc7879908735 100644
--- a/configs/lm3s6965-ek/src/lm_ssi.c
+++ b/configs/lm3s6965-ek/src/lm_ssi.c
@@ -59,36 +59,20 @@
* Pre-processor Definitions
************************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SSI_DEBUG /* Define to enable debug */
-#undef SSI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SSI_DEBUG
-# define ssidbg lldbg
-# ifdef SSI_VERBOSE
-# define ssivdbg lldbg
-# else
-# define ssivdbg(x...)
-# endif
-#else
-# undef SSI_VERBOSE
-# define ssidbg(x...)
-# define ssivdbg(x...)
-#endif
-
-/* Dump GPIO registers */
+/* CONFIG_DEBUG_SPI enables debug output from this file */
-#ifdef SSI_VERBOSE
+#ifdef CONFIG_DEBUG_SPI
+# define ssierr llerr
+# define ssiwarn llwarn
+# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
+# define ssierr(x...)
+# define ssiwarn(x...)
+# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -134,7 +118,7 @@ void weak_function lm_ssidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
if (devid == SPIDEV_MMCSD)
@@ -156,7 +140,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
- ssidbg("Returning SPI_STATUS_PRESENT\n");
+ ssiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
diff --git a/configs/lm3s6965-ek/tcpecho/defconfig b/configs/lm3s6965-ek/tcpecho/defconfig
index e655d4d6c13b99856a39718b4fdfcec70cbc66d1..d4282f16fb13126ebcb6d15e057e4477cde08eb6 100644
--- a/configs/lm3s6965-ek/tcpecho/defconfig
+++ b/configs/lm3s6965-ek/tcpecho/defconfig
@@ -41,7 +41,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/lm3s8962-ek/nsh/defconfig b/configs/lm3s8962-ek/nsh/defconfig
index 57c304ce134405a981e8194284138c669e263817..067dad9f116611d1babc208a23ee38353bb739c2 100644
--- a/configs/lm3s8962-ek/nsh/defconfig
+++ b/configs/lm3s8962-ek/nsh/defconfig
@@ -46,7 +46,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/lm3s8962-ek/nx/defconfig b/configs/lm3s8962-ek/nx/defconfig
index c72dc447b56e7f069b33f0c16347953359a2494f..ab03e9edc658804b78f0a5470ca9fad9c8d3ccac 100644
--- a/configs/lm3s8962-ek/nx/defconfig
+++ b/configs/lm3s8962-ek/nx/defconfig
@@ -45,7 +45,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/lm3s8962-ek/src/lm_ethernet.c b/configs/lm3s8962-ek/src/lm_ethernet.c
index a6d4da70e97110b9bfa71c2e51762e2b23a7b9fc..d93810f066b445377a41c69f13b54a56b5af7a1c 100644
--- a/configs/lm3s8962-ek/src/lm_ethernet.c
+++ b/configs/lm3s8962-ek/src/lm_ethernet.c
@@ -83,7 +83,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr)
user0 = getreg32(TIVA_FLASH_USERREG0);
user1 = getreg32(TIVA_FLASH_USERREG1);
- nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
+ nllinfo("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff);
DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff);
/* Re-format that MAC address the way that the network expects to see it */
diff --git a/configs/lm3s8962-ek/src/lm_leds.c b/configs/lm3s8962-ek/src/lm_leds.c
index 28f925d26e021514d2fdbf7bbb0bff5001e6e83a..a6a938f2accfc2ebce2e64ad2e21a127c599837a 100644
--- a/configs/lm3s8962-ek/src/lm_leds.c
+++ b/configs/lm3s8962-ek/src/lm_leds.c
@@ -55,23 +55,17 @@
* Pre-processor Definitions
****************************************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
- */
-
-#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
-#else
-# define leddbg(x...)
-# define ledvdbg(x...)
-#endif
-
-/* Dump GPIO registers */
+/* CONFIG_DEBUG_LEDS enables debug output from this file */
#ifdef CONFIG_DEBUG_LEDS
+# define lederr llerr
+# define ledinfo llinfo
+# define ledinfo llinfo
# define led_dumpgpio(m) tiva_dumpgpio(LED_GPIO, m)
#else
+# define lederr(x...)
+# define ledinfo(x...)
+# define ledinfo(x...)
# define led_dumpgpio(m)
#endif
@@ -79,16 +73,12 @@
* Private Data
****************************************************************************/
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
+static uint8_t g_nest;
/****************************************************************************
* Public Functions
****************************************************************************/
-static uint8_t g_nest;
-
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
@@ -96,7 +86,7 @@ static uint8_t g_nest;
#ifdef CONFIG_ARCH_LEDS
void board_autoled_initialize(void)
{
- leddbg("Initializing\n");
+ ledinfo("Initializing\n");
/* Configure Port E, Bit 1 as an output, initial value=OFF */
diff --git a/configs/lm3s8962-ek/src/lm_oled.c b/configs/lm3s8962-ek/src/lm_oled.c
index 197a614e790a2bc7b3313b0538fb5742818c7be3..d6298212e50c63d4d393f49dfd00b5484bed8813 100644
--- a/configs/lm3s8962-ek/src/lm_oled.c
+++ b/configs/lm3s8962-ek/src/lm_oled.c
@@ -62,21 +62,21 @@
* Verbose debug must also be enabled
*/
-#ifndef CONFIG_DEBUG
-# undef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_FEATURES
+# undef CONFIG_DEBUG_INFO
# undef CONFIG_DEBUG_GRAPHICS
#endif
-#ifndef CONFIG_DEBUG_VERBOSE
+#ifndef CONFIG_DEBUG_INFO
# undef CONFIG_LCD_RITDEBUG
#endif
#ifdef CONFIG_LCD_RITDEBUG
-# define ritdbg(format, ...) vdbg(format, ##__VA_ARGS__)
+# define riterr(format, ...) info(format, ##__VA_ARGS__)
# define oleddc_dumpgpio(m) tiva_dumpgpio(OLEDDC_GPIO, m)
# define oledcs_dumpgpio(m) tiva_dumpgpio(OLEDCS_GPIO, m)
#else
-# define ritdbg(x...)
+# define riterr(x...)
# define oleddc_dumpgpio(m)
# define oledcs_dumpgpio(m)
#endif
@@ -113,7 +113,7 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
spi = tiva_ssibus_initialize(0);
if (!spi)
{
- glldbg("Failed to initialize SSI port 0\n");
+ gllerr("ERROR: Failed to initialize SSI port 0\n");
}
else
{
@@ -122,11 +122,11 @@ FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
dev = rit_initialize(spi, devno);
if (!dev)
{
- glldbg("Failed to bind SSI port 0 to OLED %d: %d\n", devno);
+ gllerr("ERROR: Failed to bind SSI port 0 to OLED %d: %d\n", devno);
}
else
{
- gllvdbg("Bound SSI port 0 to OLED %d\n", devno);
+ gllinfo("Bound SSI port 0 to OLED %d\n", devno);
/* And turn the OLED on (CONFIG_LCD_MAXPOWER should be 1) */
diff --git a/configs/lm3s8962-ek/src/lm_ssi.c b/configs/lm3s8962-ek/src/lm_ssi.c
index fc9a1efb24e171f4ad17a41105615f43531ab6bb..c5b9efa53d373dbf445fe79655860994cca8d7f1 100644
--- a/configs/lm3s8962-ek/src/lm_ssi.c
+++ b/configs/lm3s8962-ek/src/lm_ssi.c
@@ -59,36 +59,20 @@
* Pre-processor Definitions
************************************************************************************/
-/* Enables debug output from this file (needs CONFIG_DEBUG too) */
-
-#undef SSI_DEBUG /* Define to enable debug */
-#undef SSI_VERBOSE /* Define to enable verbose debug */
-
-#ifdef SSI_DEBUG
-# define ssidbg lldbg
-# ifdef SSI_VERBOSE
-# define ssivdbg lldbg
-# else
-# define ssivdbg(x...)
-# endif
-#else
-# undef SSI_VERBOSE
-# define ssidbg(x...)
-# define ssivdbg(x...)
-#endif
-
-/* Dump GPIO registers */
+/* CONFIG_DEBUG_SPI enables debug output from this file */
-#ifdef SSI_VERBOSE
+#ifdef CONFIG_DEBUG_SPI
+# define ssierr llerr
+# define ssiwarn llwarn
+# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
+# define ssierr(x...)
+# define ssiwarn(x...)
+# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -134,7 +118,7 @@ void weak_function lm_ssidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
if (devid == SPIDEV_MMCSD)
@@ -156,7 +140,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
- ssidbg("Returning SPI_STATUS_PRESENT\n");
+ ssiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
diff --git a/configs/lm4f120-launchpad/nsh/defconfig b/configs/lm4f120-launchpad/nsh/defconfig
index 61ff3481e35cb4fe995c98319c3b6b499f5e1627..d87cc7cf0dc8f543660e9b3540f637822e8cbdb2 100644
--- a/configs/lm4f120-launchpad/nsh/defconfig
+++ b/configs/lm4f120-launchpad/nsh/defconfig
@@ -39,7 +39,7 @@ CONFIG_RAW_BINARY=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/lm4f120-launchpad/src/lm4f_autoleds.c b/configs/lm4f120-launchpad/src/lm4f_autoleds.c
index 9ffcd0fa314909137bcf4b096a9d94939c0d03a2..0d905af81adc371743650286d465ef73e837a1f9 100644
--- a/configs/lm4f120-launchpad/src/lm4f_autoleds.c
+++ b/configs/lm4f120-launchpad/src/lm4f_autoleds.c
@@ -97,16 +97,16 @@
* LED_PANIC 4 ON OFF OFF (flashing 2Hz)
*/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# define ledvdbg llvdbg
+# define lederr llerr
+# define ledinfo llinfo
#else
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/* Dump GPIO registers */
@@ -140,7 +140,7 @@
#ifdef CONFIG_ARCH_LEDS
void lm4f_led_initialize(void)
{
- leddbg("Initializing\n");
+ ledinfo("Initializing\n");
/* Configure Port E, Bit 1 as an output, initial value=OFF */
diff --git a/configs/lm4f120-launchpad/src/lm4f_ssi.c b/configs/lm4f120-launchpad/src/lm4f_ssi.c
index 683b29249ccbd81677072bd0ba776f2834d2633d..c89b6d4c13124a8259999e94d21d7c37a96a8cd7 100644
--- a/configs/lm4f120-launchpad/src/lm4f_ssi.c
+++ b/configs/lm4f120-launchpad/src/lm4f_ssi.c
@@ -60,28 +60,20 @@
* Pre-processor Definitions
************************************************************************************/
-/* CONFIG_DEBUG_SPI enables debug output from this file (needs CONFIG_DEBUG too) */
+/* CONFIG_DEBUG_SPI enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
-# define ssidbg lldbg
-#else
-# define ssidbg(x...)
-#endif
-
-/* Dump GPIO registers */
-
-#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_VERBOSE)
-# define ssivdbg lldbg
+# define ssierr llerr
+# define ssiwarn llwarn
+# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
-# define ssivdbg(x...)
+# define ssierr(x...)
+# define ssiwarn(x...)
+# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
-/************************************************************************************
- * Private Functions
- ************************************************************************************/
-
/************************************************************************************
* Public Functions
************************************************************************************/
@@ -119,14 +111,14 @@ void weak_function lm4f_spidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- ssidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
ssi_dumpgpio("tiva_ssiselect() Exit");
}
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
- ssidbg("Returning SPI_STATUS_PRESENT\n");
+ ssiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
diff --git a/configs/lpc4330-xplorer/README.txt b/configs/lpc4330-xplorer/README.txt
index 2a95f43456de34ed3c917aea7ebc7ed3e4d82009..3afbe967ff052c3a4969a440e9ba073170812e03 100644
--- a/configs/lpc4330-xplorer/README.txt
+++ b/configs/lpc4330-xplorer/README.txt
@@ -362,14 +362,14 @@ Code Red IDE/Tools
in debugging symbols.
NOTE 3: There are few things that NuttX has to do differently if you
- are using a debugger. Make sure that you also set CONFIG_DEBUG=y. Nothing
+ are using a debugger. Make sure that you also set CONFIG_DEBUG_FEATURES=y. Nothing
also is needed and no debug output will be generated; but NuttX will
- use CONFIG_DEBUG=y to mean that a debugger is attached and will deal
+ use CONFIG_DEBUG_FEATURES=y to mean that a debugger is attached and will deal
with certain resets and debug controls appropriately.
So you should have:
- CONFIG_DEBUG=y
+ CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_SYMBOLS=y
NOTE 4: Every time that you control-C out of the command line GDB, you
@@ -817,9 +817,9 @@ LPC4330-Xplorer Configuration Options
CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs
- CONFIG_DEBUG.
+ CONFIG_DEBUG_FEATURES.
CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
- Also needs CONFIG_DEBUG.
+ Also needs CONFIG_DEBUG_FEATURES.
CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
LPC43xx USB Device Configuration
@@ -928,7 +928,7 @@ Where is one of the following:
from the SPI address space after each write.
CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers. You
probably do not want to enable this unless you want to dig through a
- *lot* of debug output! Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE,
+ *lot* of debug output! Also required CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO,
and CONFIG_DEBUG_FS,
5. In my experience, there were some missing function pointers in the LPC43xx
diff --git a/configs/lpc4330-xplorer/nsh/defconfig b/configs/lpc4330-xplorer/nsh/defconfig
index a6a461ba6c9bdbc554c40cee20e382c59d9de86d..13c015c5c41a0d85b0bce1aaa308b277d1dcabe1 100644
--- a/configs/lpc4330-xplorer/nsh/defconfig
+++ b/configs/lpc4330-xplorer/nsh/defconfig
@@ -46,7 +46,7 @@ CONFIG_ARCH_STDARG_H=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/lpc4330-xplorer/src/lpc43_appinit.c b/configs/lpc4330-xplorer/src/lpc43_appinit.c
index 48225e0dde44389663abfbf7f35f837c19cf4da0..751daad9015ba4399768f0f55252894c3f295a20 100644
--- a/configs/lpc4330-xplorer/src/lpc43_appinit.c
+++ b/configs/lpc4330-xplorer/src/lpc43_appinit.c
@@ -90,7 +90,7 @@ static int nsh_spifi_initialize(void)
mtd = lpc43_spifi_initialize();
if (!mtd)
{
- fdbg("ERROR: lpc43_spifi_initialize failed\n");
+ ferr("ERROR: lpc43_spifi_initialize failed\n");
return -ENODEV;
}
@@ -100,7 +100,7 @@ static int nsh_spifi_initialize(void)
ret = ftl_initialize(CONFIG_SPIFI_DEVNO, mtd);
if (ret < 0)
{
- fdbg("ERROR: Initializing the FTL layer: %d\n", ret);
+ ferr("ERROR: Initializing the FTL layer: %d\n", ret);
return ret;
}
#else
@@ -109,7 +109,7 @@ static int nsh_spifi_initialize(void)
ret = nxffs_initialize(mtd);
if (ret < 0)
{
- fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
+ ferr("ERROR: NXFFS initialization failed: %d\n", ret);
return ret;
}
@@ -118,7 +118,7 @@ static int nsh_spifi_initialize(void)
ret = mount(NULL, "/mnt/spifi", "nxffs", 0, NULL);
if (ret < 0)
{
- fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+ ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
return ret;
}
#endif
diff --git a/configs/lpc4330-xplorer/src/lpc43_autoleds.c b/configs/lpc4330-xplorer/src/lpc43_autoleds.c
index afe5ecd23fe20df04de01b55dad5b5efc601077c..5c541622fe9e9a8a8817494ed2ddda2c261e8a53 100644
--- a/configs/lpc4330-xplorer/src/lpc43_autoleds.c
+++ b/configs/lpc4330-xplorer/src/lpc43_autoleds.c
@@ -90,23 +90,23 @@
*/
/* Debug definitions ********************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
+# define lederr llerr
+# ifdef CONFIG_DEBUG_INFO
# define LED_VERBOSE 1
-# define ledvdbg lldbg
+# define ledinfo llerr
# else
# undef LED_VERBOSE
-# define ledvdbg(x...)
+# define ledinfo(x...)
# endif
#else
# undef LED_VERBOSE
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/lpc4330-xplorer/src/lpc43_userleds.c b/configs/lpc4330-xplorer/src/lpc43_userleds.c
index 8075aae7ed02a5f4a1186fc849a31c16bd156d4b..22db426237433128e8208680c9d755e12e047f4f 100644
--- a/configs/lpc4330-xplorer/src/lpc43_userleds.c
+++ b/configs/lpc4330-xplorer/src/lpc43_userleds.c
@@ -67,23 +67,23 @@
*/
/* Debug definitions ********************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
+# define lederr llerr
+# ifdef CONFIG_DEBUG_INFO
# define LED_VERBOSE 1
-# define ledvdbg lldbg
+# define ledinfo llerr
# else
# undef LED_VERBOSE
-# define ledvdbg(x...)
+# define ledinfo(x...)
# endif
#else
# undef LED_VERBOSE
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/lpc4337-ws/README.txt b/configs/lpc4337-ws/README.txt
index 9a0d2cb99b09fa16251bbf13e4d816e51740a21b..a62558a8a08a023ffa3fca424176f1c578596d93 100644
--- a/configs/lpc4337-ws/README.txt
+++ b/configs/lpc4337-ws/README.txt
@@ -358,14 +358,14 @@ Code Red IDE/Tools
in debugging symbols.
NOTE 3: There are few things that NuttX has to do differently if you
- are using a debugger. Make sure that you also set CONFIG_DEBUG=y. Nothing
+ are using a debugger. Make sure that you also set CONFIG_DEBUG_FEATURES=y. Nothing
also is needed and no debug output will be generated; but NuttX will
- use CONFIG_DEBUG=y to mean that a debugger is attached and will deal
+ use CONFIG_DEBUG_FEATURES=y to mean that a debugger is attached and will deal
with certain resets and debug controls appropriately.
So you should have:
- CONFIG_DEBUG=y
+ CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_SYMBOLS=y
NOTE 4: Every time that you control-C out of the command line GDB, you
@@ -856,9 +856,9 @@ LPC4337-ws Configuration Options
CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs
- CONFIG_DEBUG.
+ CONFIG_DEBUG_FEATURES.
CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
- Also needs CONFIG_DEBUG.
+ Also needs CONFIG_DEBUG_FEATURES.
CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
LPC43xx USB Device Configuration
@@ -967,7 +967,7 @@ Where is one of the following:
from the SPI address space after each write.
CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers. You
probably do not want to enable this unless you want to dig through a
- *lot* of debug output! Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE,
+ *lot* of debug output! Also required CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO,
and CONFIG_DEBUG_FS,
5. In my experience, there were some missing function pointers in the LPC43xx
diff --git a/configs/lpc4337-ws/nsh/defconfig b/configs/lpc4337-ws/nsh/defconfig
index 4f36719c26fe0dc2fff0541efc0ed33817e87837..11e1e3062f5b7b8902500b2fe9b400784815024c 100644
--- a/configs/lpc4337-ws/nsh/defconfig
+++ b/configs/lpc4337-ws/nsh/defconfig
@@ -42,7 +42,7 @@ CONFIG_ARCH_STDARG_H=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_STACK_COLORATION is not set
diff --git a/configs/lpc4337-ws/src/lpc43_adc.c b/configs/lpc4337-ws/src/lpc43_adc.c
index 0bb398369aa9a8a0dad61218fea182289e9cd456..c1cb491f61a12c07d70dd2c5fad4f43b402d969d 100644
--- a/configs/lpc4337-ws/src/lpc43_adc.c
+++ b/configs/lpc4337-ws/src/lpc43_adc.c
@@ -86,7 +86,7 @@ int board_adc_setup(void)
adc = lpc43_adcinitialize();
if (adc == NULL)
{
- adbg("ERROR: Failed to get ADC interface\n");
+ aerr("ERROR: Failed to get ADC interface\n");
return -ENODEV;
}
@@ -95,7 +95,7 @@ int board_adc_setup(void)
ret = adc_register("/dev/adc0", adc);
if (ret < 0)
{
- adbg("adc_register failed: %d\n", ret);
+ aerr("ERROR: adc_register failed: %d\n", ret);
return ret;
}
diff --git a/configs/lpc4337-ws/src/lpc43_appinit.c b/configs/lpc4337-ws/src/lpc43_appinit.c
index 976b78a4181ae7919ee1fbe272c616fdbd1f801d..b9dadd30904ff5cc039006e3c267862deb5b5e6a 100644
--- a/configs/lpc4337-ws/src/lpc43_appinit.c
+++ b/configs/lpc4337-ws/src/lpc43_appinit.c
@@ -70,14 +70,14 @@ static void lpc43_i2c_register(int bus)
i2c = lpc43_i2cbus_initialize(bus);
if (i2c == NULL)
{
- dbg("ERROR: Failed to get I2C%d interface\n", bus);
+ err("ERROR: Failed to get I2C%d interface\n", bus);
}
else
{
ret = i2c_register(i2c, bus);
if (ret < 0)
{
- dbg("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
+ err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
lpc43_i2cbus_uninitialize(i2c);
}
}
diff --git a/configs/lpc4357-evb/README.txt b/configs/lpc4357-evb/README.txt
index db2c2611d2fca32e099fcdd1d83a48947b2b318a..c3febbec039b8eded8718fb988af20c00bd9bd4e 100644
--- a/configs/lpc4357-evb/README.txt
+++ b/configs/lpc4357-evb/README.txt
@@ -355,14 +355,14 @@ Code Red IDE/Tools
in debugging symbols.
NOTE 3: There are few things that NuttX has to do differently if you
- are using a debugger. Make sure that you also set CONFIG_DEBUG=y. Nothing
+ are using a debugger. Make sure that you also set CONFIG_DEBUG_FEATURES=y. Nothing
also is needed and no debug output will be generated; but NuttX will
- use CONFIG_DEBUG=y to mean that a debugger is attached and will deal
+ use CONFIG_DEBUG_FEATURES=y to mean that a debugger is attached and will deal
with certain resets and debug controls appropriately.
So you should have:
- CONFIG_DEBUG=y
+ CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_SYMBOLS=y
NOTE 4: Every time that you control-C out of the command line GDB, you
@@ -853,9 +853,9 @@ LPC4357-EVB Configuration Options
CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs
- CONFIG_DEBUG.
+ CONFIG_DEBUG_FEATURES.
CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
- Also needs CONFIG_DEBUG.
+ Also needs CONFIG_DEBUG_FEATURES.
CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
LPC43xx USB Device Configuration
@@ -964,7 +964,7 @@ Where is one of the following:
from the SPI address space after each write.
CONFIG_DEBUG_SPIFI_DUMP - Debug option to dump read/write buffers. You
probably do not want to enable this unless you want to dig through a
- *lot* of debug output! Also required CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE,
+ *lot* of debug output! Also required CONFIG_DEBUG_FEATURES, CONFIG_DEBUG_INFO,
and CONFIG_DEBUG_FS,
5. In my experience, there were some missing function pointers in the LPC43xx
diff --git a/configs/lpc4357-evb/nsh/defconfig b/configs/lpc4357-evb/nsh/defconfig
index e1f25c97d57b21d692a307f4fc96e54685ee62b3..37601e039c0caac53b557664ae4d535a8f5bfe13 100644
--- a/configs/lpc4357-evb/nsh/defconfig
+++ b/configs/lpc4357-evb/nsh/defconfig
@@ -41,7 +41,7 @@ CONFIG_ARCH_STDARG_H=y
#
# Debug Options
#
-# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_FEATURES is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
diff --git a/configs/lpc4357-evb/src/lpc43_appinit.c b/configs/lpc4357-evb/src/lpc43_appinit.c
index 43efc040ceeff200a56cf9080e858514ea283090..aea4aaaa19b264dee22ad508ba4cacd689ba4ca7 100644
--- a/configs/lpc4357-evb/src/lpc43_appinit.c
+++ b/configs/lpc4357-evb/src/lpc43_appinit.c
@@ -90,7 +90,7 @@ static int nsh_spifi_initialize(void)
mtd = lpc43_spifi_initialize();
if (!mtd)
{
- fdbg("ERROR: lpc43_spifi_initialize failed\n");
+ ferr("ERROR: lpc43_spifi_initialize failed\n");
return -ENODEV;
}
@@ -100,7 +100,7 @@ static int nsh_spifi_initialize(void)
ret = ftl_initialize(CONFIG_SPIFI_DEVNO, mtd);
if (ret < 0)
{
- fdbg("ERROR: Initializing the FTL layer: %d\n", ret);
+ ferr("ERROR: Initializing the FTL layer: %d\n", ret);
return ret;
}
#else
@@ -109,7 +109,7 @@ static int nsh_spifi_initialize(void)
ret = nxffs_initialize(mtd);
if (ret < 0)
{
- fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
+ ferr("ERROR: NXFFS initialization failed: %d\n", ret);
return ret;
}
@@ -118,7 +118,7 @@ static int nsh_spifi_initialize(void)
ret = mount(NULL, "/mnt/spifi", "nxffs", 0, NULL);
if (ret < 0)
{
- fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
+ ferr("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
return ret;
}
#endif
diff --git a/configs/lpc4357-evb/src/lpc43_autoleds.c b/configs/lpc4357-evb/src/lpc43_autoleds.c
index acb63b2554bcc7a02ac492db52221b7a2d7c7696..831a65ed2ed65c9f9bc4b186145a4d7b2a63f68b 100644
--- a/configs/lpc4357-evb/src/lpc43_autoleds.c
+++ b/configs/lpc4357-evb/src/lpc43_autoleds.c
@@ -87,23 +87,23 @@
*/
/* Debug definitions ********************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
+# define lederr llerr
+# ifdef CONFIG_DEBUG_INFO
# define LED_VERBOSE 1
-# define ledvdbg lldbg
+# define ledinfo llerr
# else
# undef LED_VERBOSE
-# define ledvdbg(x...)
+# define ledinfo(x...)
# endif
#else
# undef LED_VERBOSE
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/lpc4357-evb/src/lpc43_userleds.c b/configs/lpc4357-evb/src/lpc43_userleds.c
index 0e8af7c10e6033bcbee72fec5924cc898da98917..7db57acecd3dee23fb9e54b7f7a41c9af58341a1 100644
--- a/configs/lpc4357-evb/src/lpc43_userleds.c
+++ b/configs/lpc4357-evb/src/lpc43_userleds.c
@@ -78,23 +78,23 @@
*/
/* Debug definitions ********************************************************/
-/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
- * with CONFIG_DEBUG_VERBOSE too)
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG_FEATURES
+ * with CONFIG_DEBUG_INFO too)
*/
#ifdef CONFIG_DEBUG_LEDS
-# define leddbg lldbg
-# ifdef CONFIG_DEBUG_VERBOSE
+# define lederr llerr
+# ifdef CONFIG_DEBUG_INFO
# define LED_VERBOSE 1
-# define ledvdbg lldbg
+# define ledinfo llerr
# else
# undef LED_VERBOSE
-# define ledvdbg(x...)
+# define ledinfo(x...)
# endif
#else
# undef LED_VERBOSE
-# define leddbg(x...)
-# define ledvdbg(x...)
+# define lederr(x...)
+# define ledinfo(x...)
#endif
/****************************************************************************
diff --git a/configs/lpc4370-link2/README.txt b/configs/lpc4370-link2/README.txt
index 110b02fd018d3228f3fdcb1549640d1b1bd1ecb1..9280b3258bd87758c06ed651301354bab07432f8 100644
--- a/configs/lpc4370-link2/README.txt
+++ b/configs/lpc4370-link2/README.txt
@@ -358,14 +358,14 @@ Code Red IDE/Tools
in debugging symbols.
NOTE 3: There are few things that NuttX has to do differently if you
- are using a debugger. Make sure that you also set CONFIG_DEBUG=y. Nothing
+ are using a debugger. Make sure that you also set CONFIG_DEBUG_FEATURES=y. Nothing
also is needed and no debug output will be generated; but NuttX will
- use CONFIG_DEBUG=y to mean that a debugger is attached and will deal
+ use CONFIG_DEBUG_FEATURES=y to mean that a debugger is attached and will deal
with certain resets and debug controls appropriately.
So you should have:
- CONFIG_DEBUG=y
+ CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_SYMBOLS=y
NOTE 4: Every time that you control-C out of the command line GDB, you
@@ -856,9 +856,9 @@ LPC4370-Link2 Configuration Options
CONFIG_NET_NRXDESC - Configured number of Rx descriptors. Default: 18
CONFIG_NET_WOL - Enable Wake-up on Lan (not fully implemented).
CONFIG_NET_REGDEBUG - Enabled low level register debug. Also needs
- CONFIG_DEBUG.
+ CONFIG_DEBUG_FEATURES.
CONFIG_NET_DUMPPACKET - Dump all received and transmitted packets.
- Also needs CONFIG_DEBUG.
+ Also needs CONFIG_DEBUG_FEATURES.
CONFIG_NET_HASH - Enable receipt of near-perfect match frames.
LPC43xx USB Device Configuration
@@ -967,7 +967,7 @@ Where