From 65a6ec4693caf0be1a2da3d70b2a42c2e75dbf64 Mon Sep 17 00:00:00 2001 From: patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> Date: Sat, 7 May 2011 16:59:20 +0000 Subject: [PATCH] Add STM32 FLASH driver git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3573 42af7a65-404d-4744-a932-0658087f49c3 --- ChangeLog | 2 + Documentation/NuttxPortingGuide.html | 47 +++- TODO | 37 ++-- arch/arm/src/stm32/Make.defs | 5 +- arch/arm/src/stm32/chip/stm32_flash.h | 115 ++++++++++ arch/arm/src/stm32/stm32_flash.c | 228 ++++++++++++++++++++ arch/arm/src/stm32/stm32_flash.h | 62 +----- arch/arm/src/stm32/stm32_rcc.c | 4 +- configs/README.txt | 299 ++++++++++++++------------ configs/vsn/nsh/defconfig | 14 +- configs/vsn/src/sif.c | 33 ++- configs/vsn/src/sysclock.c | 4 +- include/apps/apps.h | 2 +- include/nuttx/progmem.h | 143 ++++++++++++ sched/atexit.c | 2 +- sched/clock_systimer.c | 2 +- 16 files changed, 751 insertions(+), 248 deletions(-) create mode 100755 arch/arm/src/stm32/chip/stm32_flash.h create mode 100644 arch/arm/src/stm32/stm32_flash.c create mode 100644 include/nuttx/progmem.h diff --git a/ChangeLog b/ChangeLog index e9174fb530..cbe05adaa1 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1727,5 +1727,7 @@ * Remove clock_getutc(). It is replaces with clock_gettime(CLOCK_ACTIVETIME). Add other RTC related changes provided by Uros Platise. + * arch/arm/src/stm32/stm32_flash.c: Add support for access to on-chp STM32 + FLASH; beginning of integration with NXFFS (Uros Platise). diff --git a/Documentation/NuttxPortingGuide.html b/Documentation/NuttxPortingGuide.html index c7a56927fb..70bdab5379 100644 --- a/Documentation/NuttxPortingGuide.html +++ b/Documentation/NuttxPortingGuide.html @@ -12,7 +12,7 @@ <h1><big><font color="#3c34ec"> <i>NuttX RTOS Porting Guide</i> </font></big></h1> - <p>Last Updated: April 14, 2011</p> + <p>Last Updated: May 6, 2011</p> </td> </tr> </table> @@ -886,6 +886,9 @@ fs/ |-- fat/ | |-- Make.defs | `-- <i>(fat file system source files)</i> +|-- nxffs/ +| |-- Make.defs +| `-- <i>(NXFFS file system source files)</i> |-- romfs/ | |-- Make.defs | `-- <i>(romfs file system source files)</i> @@ -1949,7 +1952,8 @@ extern void up_ledoff(int led); NuttX supports the standard <code>mount()</code> command that allows a block driver to be bound to a mountpoint within the pseudo file system and to a file system. - At present, NuttX supports only the VFAT file system. + At present, NuttX supports the standard VFAT and ROMFS file systems and + well as a special, wear-leveling NuttX FLASH File System (NXFFS). </p> <p><b>Comparison to Linux</b> @@ -3120,7 +3124,7 @@ build <li> <code>CONFIG_NXFLAT</code>: Enable support for the NXFLAT binary format. This format will support execution of NuttX binaries located - in a ROMFS filesystem (see <code>apps/examples/nxflat</code>). + in a ROMFS file system (see <code>apps/examples/nxflat</code>). </li> <li> <code>CONFIG_SCHED_WORKQUEUE</code>: Create a dedicated "worker" thread to @@ -3435,13 +3439,46 @@ build <h2>File Systems</h2> <ul> <li> - <code>CONFIG_FS_FAT</code>: Enable FAT filesystem support. + <code>CONFIG_FS_FAT</code>: Enable FAT file system support. </li> <li> <code>CONFIG_FAT_SECTORSIZE</code>: Max supported sector size. </li> <li> - <code>CONFIG_FS_ROMFS</code>: Enable ROMFS filesystem support + <code>CONFIG_FS_NXFFS</code>: Enable NuttX FLASH file system (NXFF) support. + </li> + <li> + <code>CONFIG_NXFFS_ERASEDSTATE</code>: The erased state of FLASH. + This must have one of the values of <code>0xff</code> or <code>0x00</code>. + Default: <code>0xff</code>. + </li> + <li> + <code>CONFIG_NXFFS_PACKTHRESHOLD</code>: When packing flash file data, + don't both with file chunks smaller than this number of data bytes. + Default: 32. + </li> + <li> + <code>CONFIG_NXFFS_MAXNAMLEN</code>: The maximum size of an NXFFS file name. + Default: 255. + </li> + <li> + <code>CONFIG_NXFFS_PACKTHRESHOLD</code>: When packing flash file data, + don't both with file chunks smaller than this number of data bytes. + Default: 32. + </li> + <li> + <code>CONFIG_NXFFS_TAILTHRESHOLD</code>: clean-up can either mean + packing files together toward the end of the file or, if file are + deleted at the end of the file, clean up can simply mean erasing + the end of FLASH memory so that it can be re-used again. However, + doing this can also harm the life of the FLASH part because it can + mean that the tail end of the FLASH is re-used too often. This + threshold determines if/when it is worth erased the tail end of FLASH + and making it available for re-use (and possible over-wear). + Default: 8192. + </li> + <li> + <code>CONFIG_FS_ROMFS</code>: Enable ROMFS file system support </li> </ul> diff --git a/TODO b/TODO index 23e9c72004..0022dd72b0 100644 --- a/TODO +++ b/TODO @@ -1,4 +1,4 @@ -NuttX TODO List (Last updated April 19 2011) +NuttX TODO List (Last updated May 6, 2011) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ nuttx/ @@ -14,7 +14,7 @@ nuttx/ (2) USB (drivers/usbdev, drivers/usbhost) (5) Libraries (lib/) (13) File system/Generic drivers (fs/, drivers/) - (2) Graphics subystem (graphics/) + (1) Graphics subystem (graphics/) (1) Pascal add-on (pcode/) (1) Documentation (Documentation/) (4) Build system / Toolchains @@ -23,7 +23,7 @@ nuttx/ (1) ARM/C5471 (arch/arm/src/c5471/) (3) ARM/DM320 (arch/arm/src/dm320/) (2) ARM/i.MX (arch/arm/src/imx/) - (4) ARM/LPC17xx (arch/arm/src/lpc17xx/) + (3) ARM/LPC17xx (arch/arm/src/lpc17xx/) (7) ARM/LPC214x (arch/arm/src/lpc214x/) (2) ARM/LPC313x (arch/arm/src/lpc313x/) (3) ARM/STR71x (arch/arm/src/str71x/) @@ -53,6 +53,8 @@ o Task/Scheduler (sched/) Description: atexit() supports registration of one function called on exit(). Should task_delete() also cause atexit() function to be called? + Update: atexit() is only built into the system if CONFIG_SCHED_ATEXT + is defined in the configuration. Status: Open Priority: Low, task_delete() is non-standard and its behavior is unspecified. @@ -64,6 +66,9 @@ o Task/Scheduler (sched/) Description: Implement sys/wait.h and functions. Consider implementing wait, waitpid, waitid. At present, a parent has no information about child tasks. + Update: A simple but usable version of waitpid() has been included. + This version is not compliant with all specifications and can be + enabled with CONFIG_SCHED_WAITPID. Status: Open Priority: Low @@ -182,7 +187,7 @@ o Binary loaders (binfmt/) Status: Open Priority: Low - Description: Windows build issue. Almost all configurations that use NXFLAT have + Description: Windows build issue. Some of the configurations that use NXFLAT have the linker script specified like this: NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat.ld -no-check-sections @@ -226,7 +231,7 @@ o Network (net/, drivers/net) Priority: Medium, The feature is not important, but it is important for NuttX to resolve the architectural issues. - Description: Sendoto() and multiple network interface support: + Description: sendto() and multiple network interface support: When polled, would have to assure that the destination IP is on the subnet served by the polling driver. Status: Open @@ -457,7 +462,7 @@ o File system / Generic drivers (fs/, drivers/) Status: Open Priority: Low - Description: Time stamping is no implemented in the NuttX FA file system. + Description: Time stamping is not implemented in the NuttX FA file system. See the following functions in fs/fat/fs_fat32util.c: fat_systime2fattime() and fat_fattime2systime() Status: Open @@ -466,14 +471,6 @@ o File system / Generic drivers (fs/, drivers/) o Graphics subystem (graphics/) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - Description: If CONFIG_NX is enabled, the build fails the first time - saying that there is "No rule to make target..." for one of the - auto-generated graphics files. This is a nuisance, but if you - simply build again (with the source files already auto-generated) - the problem does not reoccur. - Status: Open - Priority: Low, the work-around is simple - Description: Testing of all APIs is not complete. See http://nuttx.sourceforge.net/NXGraphicsSubsystem.html#testcoverage Status: Open @@ -662,10 +659,10 @@ o ARM/DM320 (arch/arm/src/dm320/) o ARM/i.MX (arch/arm/src/imx/) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - Description: The basic port of the i.MX1 architecuture is underway. The port + Description: The basic port of the i.MX1 architecuture was never finished. The port is incomplete (as of this writing, is still lacks a timer, interrupt decoding, USB, network) and untested. - Status: Open (and in work) + Status: Open Priority: Medium (high if you need i.MX1/L support) Description: SPI methods are not thread safe. Needs a semaphore to protect from re-entrancy. @@ -697,14 +694,6 @@ o ARM/LPC17xx (arch/arm/src/lpc17xx/) Status: Open Priority: Medium-Low (unless you need the display on the LPC1766STK!) - Description: SLIP (Configuration olimex-lpc1766stk/slip-httpd) only works with VERBOSE - debug disabled. For some reason, certain debug statements hang(?). - Also, this example does not use UART1's hardware flow control. UART1 - hardware flow control is partially implemented but does not behave as - expected. Hardware flow control needs a little more work. - Status: Open - Priority: Low - o ARM/LPC214x (arch/arm/src/lpc214x/) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/arch/arm/src/stm32/Make.defs b/arch/arm/src/stm32/Make.defs index 6b0114dcb7..1a96934720 100755 --- a/arch/arm/src/stm32/Make.defs +++ b/arch/arm/src/stm32/Make.defs @@ -45,8 +45,9 @@ CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \ up_usestack.c up_doirq.c up_hardfault.c up_svcall.c CHIP_ASRCS = -CHIP_CSRCS = stm32_start.c stm32_rcc.c stm32_gpio.c stm32_idle.c \ +CHIP_CSRCS = stm32_start.c stm32_rcc.c stm32_gpio.c stm32_flash.c \ stm32_irq.c stm32_timerisr.c stm32_dma.c stm32_lowputc.c \ stm32_serial.c stm32_spi.c stm32_usbdev.c stm32_sdio.c \ - stm32_tim.c stm32_i2c.c stm32_pwr.c stm32_rtc.c stm32_waste.c + stm32_tim.c stm32_i2c.c stm32_pwr.c stm32_rtc.c \ + stm32_idle.c stm32_waste.c diff --git a/arch/arm/src/stm32/chip/stm32_flash.h b/arch/arm/src/stm32/chip/stm32_flash.h new file mode 100755 index 0000000000..018d3e8abd --- /dev/null +++ b/arch/arm/src/stm32/chip/stm32_flash.h @@ -0,0 +1,115 @@ +/************************************************************************************ + * arch/arm/src/stm32/chip/stm32_flash.h + * + * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32_FLASH_H +#define __ARCH_ARM_SRC_STM32_CHIP_STM32_FLASH_H + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#ifdef CONFIG_STM32_LOWDENSITY +# define STM32_FLASH_NPAGES 32 +# define STM32_FLASH_PAGESIZE 1024 +#elif CONFIG_STM32_MEDIUMDENSITY +# define STM32_FLASH_NPAGES 128 +# define STM32_FLASH_PAGESIZE 1024 +#elif CONFIG_STM32_CONNECTIVITYLINE +# define STM32_FLASH_NPAGES 128 +# define STM32_FLASH_PAGESIZE 2048 +#elif CONFIG_STM32_HIGHDENSITY +# define STM32_FLASH_NPAGES 256 +# define STM32_FLASH_PAGESIZE 2048 +#endif + +#define STM32_FLASH_SIZE (STM32_FLASH_NPAGES * STM32_FLASH_PAGESIZE) + +/* Register Offsets *****************************************************************/ + +#define STM32_FLASH_ACR_OFFSET 0x0000 +#define STM32_FLASH_KEYR_OFFSET 0x0004 +#define STM32_FLASH_OPTKEYR_OFFSET 0x0008 +#define STM32_FLASH_SR_OFFSET 0x000c +#define STM32_FLASH_CR_OFFSET 0x0010 +#define STM32_FLASH_AR_OFFSET 0x0014 +#define STM32_FLASH_OBR_OFFSET 0x001c +#define STM32_FLASH_WRPR_OFFSET 0x0020 + +/* Register Addresses ***************************************************************/ + +#define STM32_FLASH_ACR (STM32_FLASHIF_BASE+STM32_FLASH_ACR_OFFSET) +#define STM32_FLASH_KEYR (STM32_FLASHIF_BASE+STM32_FLASH_KEYR_OFFSET) +#define STM32_FLASH_OPTKEYR (STM32_FLASHIF_BASE+STM32_FLASH_OPTKEYR_OFFSET) +#define STM32_FLASH_SR (STM32_FLASHIF_BASE+STM32_FLASH_SR_OFFSET) +#define STM32_FLASH_CR (STM32_FLASHIF_BASE+STM32_FLASH_CR_OFFSET) +#define STM32_FLASH_AR (STM32_FLASHIF_BASE+STM32_FLASH_AR_OFFSET) +#define STM32_FLASH_OBR (STM32_FLASHIF_BASE+STM32_FLASH_OBR_OFFSET) +#define STM32_FLASH_WRPR (STM32_FLASHIF_BASE+STM32_FLASH_WRPR_OFFSET) + +/* Register Bitfield Definitions ****************************************************/ +/* TODO: Complete FLASH details from the STM32F10xxx Flash programming manual. */ + +/* Flash Status Register (SR) */ + +#define FLASH_SR_BSY (1 << 0) /* Busy */ +#define FLASH_SR_PGERR (1 << 2) /* Programming Error */ +#define FLASH_SR_WRPRT_ERR (1 << 4) /* Write Protection Error */ +#define FLASH_SR_EOP (1 << 5) /* End of Operation */ + +/* Flash Control Register (CR) */ + +#define FLASH_CR_PG (1 << 0) /* Program Page */ +#define FLASH_CR_PER (1 << 1) /* Page Erase */ +#define FLASH_CR_MER (1 << 2) /* Mass Erase */ +#define FLASH_CR_OPTPG (1 << 4) /* Option Byte Programming */ +#define FLASH_CR_OPTER (1 << 5) /* Option Byte Erase */ +#define FLASH_CR_STRT (1 << 6) /* Start Erase */ +#define FLASH_CR_LOCK (1 << 7) /* Page Locked or Lock Page */ +#define FLASH_CR_OPTWRE (1 << 9) /* Option Bytes Write Enable */ +#define FLASH_CR_ERRIE (1 << 10) /* Error Interrupt Enable */ +#define FLASH_CR_EOPIE (1 << 12) /* End of Program Interrupt Enable */ + +/* Flash Access Control Register (ACR) */ + +#define FLASH_ACR_LATENCY_SHIFT (0) +#define FLASH_ACR_LATENCY_MASK (7 << FLASH_ACR_LATENCY_SHIFT) +# define FLASH_ACR_LATENCY_0 (0 << FLASH_ACR_LATENCY_SHIFT) /* FLASH Zero Latency cycle */ +# define FLASH_ACR_LATENCY_1 (1 << FLASH_ACR_LATENCY_SHIFT) /* FLASH One Latency cycle */ +# define FLASH_ACR_LATENCY_2 (2 << FLASH_ACR_LATENCY_SHIFT) /* FLASH Two Latency cycles */ +#define FLASH_ACR_HLFCYA (1 << 3) /* FLASH half cycle access */ +#define FLASH_ACR_PRTFBE (1 << 4) /* FLASH prefetch enable */ + +#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32_FLASH_H */ + diff --git a/arch/arm/src/stm32/stm32_flash.c b/arch/arm/src/stm32/stm32_flash.c new file mode 100644 index 0000000000..7c63ca2c17 --- /dev/null +++ b/arch/arm/src/stm32/stm32_flash.c @@ -0,0 +1,228 @@ +/************************************************************************************ + * arch/arm/src/stm32/stm32_flash.c + * + * Copyright (C) 2011 Uros Platise. All rights reserved. + * Author: Uros Platise <uros.platise@isotel.eu> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/** \file + * \author Uros Platise + * \brief STM32 Flash - Program and Data Memory + * + * Provides standard flash access function, to be used also by the + * drivers/mtd/progmem.c program memory flash mtd driver. + * The interface is to be defined in the include/nuttx/progmem.h + * + * Requirements: + * - During write/erase operatoins on FLASH, HSI must be ON. + * - Low Power Modes are not permitted during write/erase + */ + +#include <nuttx/config.h> +#include <nuttx/arch.h> +#include <errno.h> + +#include "stm32_flash.h" +#include "stm32_rcc.h" +#include "stm32_waste.h" +#include "up_arch.h" + + +/************************************************************************************ + * Declarations + ************************************************************************************/ + +#define FLASH_KEY1 0x45670123 +#define FLASH_KEY2 0xCDEF89AB + + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +void stm32_flash_unlock(void) +{ + while( getreg32(STM32_FLASH_SR) & FLASH_SR_BSY ) up_waste(); + + if ( getreg32(STM32_FLASH_CR) & FLASH_CR_LOCK ) { + + /* Unlock sequence */ + + putreg32(FLASH_KEY1, STM32_FLASH_KEYR); + putreg32(FLASH_KEY2, STM32_FLASH_KEYR); + } +} + + +void stm32_flash_lock(void) +{ + modifyreg16(STM32_FLASH_CR, 0, FLASH_CR_LOCK); +} + + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +uint16_t up_progmem_npages(void) +{ + return STM32_FLASH_NPAGES; +} + + +bool up_progmem_isuniform(void) +{ + return TRUE; +} + + +uint16_t up_progmem_pagesize(uint16_t page) +{ + return STM32_FLASH_PAGESIZE; +} + + +int up_progmem_getpage(uint32_t addr) +{ + if (addr >= STM32_FLASH_SIZE) + return -EFAULT; + + return addr / STM32_FLASH_PAGESIZE; +} + + +int up_progmem_erasepage(uint16_t page) +{ + uint32_t addr; + uint16_t count; + + if (page >= STM32_FLASH_NPAGES) + return -EFAULT; + + /* Get flash ready and begin erasing single page */ + + if ( !(getreg32(STM32_RCC_CR) & RCC_CR_HSION) ) + return -EPERM; + + stm32_flash_unlock(); + + modifyreg32(STM32_FLASH_CR, 0, FLASH_CR_PER); + putreg32(page * STM32_FLASH_PAGESIZE, STM32_FLASH_AR); + modifyreg32(STM32_FLASH_CR, 0, FLASH_CR_STRT); + + while( getreg32(STM32_FLASH_SR) & FLASH_SR_BSY ) up_waste(); + + modifyreg32(STM32_FLASH_CR, FLASH_CR_PER, 0); + + /* Verify */ + + for (addr = page * STM32_FLASH_PAGESIZE + STM32_FLASH_BASE, count = STM32_FLASH_PAGESIZE; + count; count-=4, addr += 4) { + + if (getreg32(addr) != 0xFFFFFFFF) + return -EIO; + } + + return STM32_FLASH_PAGESIZE; +} + + +int up_progmem_ispageerased(uint16_t page) +{ + uint32_t addr; + uint16_t count; + uint16_t bwritten = 0; + uint16_t hword; + + if (page >= STM32_FLASH_NPAGES) + return -EFAULT; + + /* Verify */ + + for (addr = page * STM32_FLASH_PAGESIZE + STM32_FLASH_BASE, count = STM32_FLASH_PAGESIZE; + count; count--, addr++) { + + if (getreg8(addr) != 0xFF) bwritten++; + } + + return bwritten; +} + + +int up_progmem_write(uint32_t addr, const void *buf, size_t count) +{ + uint16_t *hword = (uint16_t *)buf; + size_t written = count; + + /* STM32 requires half-word access */ + + if (count & 1) + return -EINVAL; + + /* Check for valid address range */ + + if ( (addr+count) >= STM32_FLASH_SIZE) + return -EFAULT; + + /* Get flash ready and begin flashing */ + + if ( !(getreg32(STM32_RCC_CR) & RCC_CR_HSION) ) + return -EPERM; + + stm32_flash_unlock(); + + modifyreg32(STM32_FLASH_CR, 0, FLASH_CR_PG); + + for (addr += STM32_FLASH_BASE; count; count--, hword++, addr+=2) { + + /* Write half-word and wait to complete */ + + putreg16(*hword, addr); + + while( getreg32(STM32_FLASH_SR) & FLASH_SR_BSY ) up_waste(); + + /* Verify */ + + if (getreg32(STM32_FLASH_SR) & FLASH_SR_WRPRT_ERR) { + modifyreg32(STM32_FLASH_CR, FLASH_CR_PG, 0); + return -EROFS; + } + + if (getreg16(addr) != *hword) { + modifyreg32(STM32_FLASH_CR, FLASH_CR_PG, 0); + return -EIO; + } + + } + + modifyreg32(STM32_FLASH_CR, FLASH_CR_PG, 0); + return written; +} diff --git a/arch/arm/src/stm32/stm32_flash.h b/arch/arm/src/stm32/stm32_flash.h index 1203d777ed..6f286bf2c5 100755 --- a/arch/arm/src/stm32/stm32_flash.h +++ b/arch/arm/src/stm32/stm32_flash.h @@ -1,8 +1,8 @@ /************************************************************************************ * arch/arm/src/stm32/stm32_flash.h * - * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Copyright (C) 2011 Uros Platise. All rights reserved. + * Author: Uros Platise <uros.platise@isotel.eu> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -36,64 +36,10 @@ #ifndef __ARCH_ARM_SRC_STM32_STM32_FLASH_H #define __ARCH_ARM_SRC_STM32_STM32_FLASH_H -/************************************************************************************ - * Included Files - ************************************************************************************/ - #include <nuttx/config.h> +#include <nuttx/progmem.h> #include "chip.h" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* Register Offsets *****************************************************************/ - -#define STM32_FLASH_ACR_OFFSET 0x0000 -#define STM32_FLASH_KEYR_OFFSET 0x0004 -#define STM32_FLASH_OPTKEYR_OFFSET 0x0008 -#define STM32_FLASH_SR_OFFSET 0x000c -#define STM32_FLASH_CR_OFFSET 0x0010 -#define STM32_FLASH_AR_OFFSET 0x0014 -#define STM32_FLASH_OBR_OFFSET 0x001c -#define STM32_FLASH_WRPR_OFFSET 0x0020 - -/* Register Addresses ***************************************************************/ - -#define STM32_FLASH_ACR (STM32_FLASHIF_BASE+STM32_FLASH_ACR_OFFSET) -#define STM32_FLASH_KEYR (STM32_FLASHIF_BASE+STM32_FLASH_KEYR_OFFSET) -#define STM32_FLASH_OPTKEYR (STM32_FLASHIF_BASE+STM32_FLASH_OPTKEYR_OFFSET) -#define STM32_FLASH_SR (STM32_FLASHIF_BASE+STM32_FLASH_SR_OFFSET) -#define STM32_FLASH_CR (STM32_FLASHIF_BASE+STM32_FLASH_CR_OFFSET) -#define STM32_FLASH_AR (STM32_FLASHIF_BASE+STM32_FLASH_AR_OFFSET) -#define STM32_FLASH_OBR (STM32_FLASHIF_BASE+STM32_FLASH_OBR_OFFSET) -#define STM32_FLASH_WRPR (STM32_FLASHIF_BASE+STM32_FLASH_WRPR_OFFSET) - -/* Register Bitfield Definitions ****************************************************/ -/* TODO: FLASH details from the STM32F10xxx Flash programming manual. */ - -/* Flash Access Control Register (ACR) */ - -#define ACR_LATENCY_SHIFT (0) -#define ACR_LATENCY_MASK (7 << ACR_LATENCY_SHIFT) -# define ACR_LATENCY_0 (0 << ACR_LATENCY_SHIFT) /* FLASH Zero Latency cycle */ -# define ACR_LATENCY_1 (1 << ACR_LATENCY_SHIFT) /* FLASH One Latency cycle */ -# define ACR_LATENCY_2 (2 << ACR_LATENCY_SHIFT) /* FLASH Two Latency cycles */ -#define ACR_HLFCYA (1 << 3) /* FLASH half cycle access */ -#define ACR_PRTFBE (1 << 4) /* FLASH prefetch enable */ - -/************************************************************************************ - * Public Types - ************************************************************************************/ - -/************************************************************************************ - * Public Data - ************************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ +#include "chip/stm32_flash.h" #endif /* __ARCH_ARM_SRC_STM32_STM32_FLASH_H */ - diff --git a/arch/arm/src/stm32/stm32_rcc.c b/arch/arm/src/stm32/stm32_rcc.c index 480345938e..f39aa0d429 100755 --- a/arch/arm/src/stm32/stm32_rcc.c +++ b/arch/arm/src/stm32/stm32_rcc.c @@ -413,8 +413,8 @@ static inline void stm32_stdclockconfig(void) /* Enable FLASH prefetch buffer and 2 wait states */ regval = getreg32(STM32_FLASH_ACR); - regval &= ~ACR_LATENCY_MASK; - regval |= (ACR_LATENCY_2|ACR_PRTFBE); + regval &= ~FLASH_ACR_LATENCY_MASK; + regval |= (FLASH_ACR_LATENCY_2|FLASH_ACR_PRTFBE); putreg32(regval, STM32_FLASH_ACR); /* Set the HCLK source/divider */ diff --git a/configs/README.txt b/configs/README.txt index 6c0cf7768a..8f6438ba7c 100644 --- a/configs/README.txt +++ b/configs/README.txt @@ -117,8 +117,8 @@ defconfig -- This is a configuration file similar to the Linux This configuration file will be used at build time: - (1) as a makefile fragment included in other makefiles, and - (2) to generate include/nuttx/config.h which is included by + (1) as a makefile fragment included in other makefiles, and + (2) to generate include/nuttx/config.h which is included by most C files in the system. The following variables are recognized by the build (you may @@ -189,19 +189,19 @@ defconfig -- This is a configuration file similar to the Linux file must support the following targets: - libapps$(LIBEXT) (usually libapps.a). libapps.a is a static - library ( an archive) that contains all of application object - files. + library ( an archive) that contains all of application object + files. - clean. Do whatever is appropriate to clean the application - directories for a fresh build. + directories for a fresh build. - distclean. Clean everthing -- auto-generated files, symbolic - links etc. -- so that the directory contents are the same as - the contents in your configuration management system. - This is only done when you change the NuttX configuration. + links etc. -- so that the directory contents are the same as + the contents in your configuration management system. + This is only done when you change the NuttX configuration. - depend. Make or update the application build dependencies. When this application is invoked it will receive the setting TOPDIR like: - $(MAKE) -C $(CONFIG_APPS_DIR) TOPDIR="$(TOPDIR)" <target> + $(MAKE) -C $(CONFIG_APPS_DIR) TOPDIR="$(TOPDIR)" <target> TOPDIR is the full path to the NuttX directory. It can be used, for example, to include makefile fragments (e.g., .config or Make.defs) @@ -341,14 +341,14 @@ defconfig -- This is a configuration file similar to the Linux CONFIG_SYS_RESERVED - Reserved system call values for use by architecture-specific logic. - OS setup related to on-demand paging: + OS setup related to on-demand paging: CONFIG_PAGING - If set =y in your configation file, this setting will enable the on-demand paging feature as described in http://www.nuttx.org/NuttXDemandPaging.html. - If CONFIG_PAGING is selected, then you will probabaly need CONFIG_BUILD_2PASS to - correctly position the code and the following configuration options also apply: + If CONFIG_PAGING is selected, then you will probabaly need CONFIG_BUILD_2PASS to + correctly position the code and the following configuration options also apply: CONFIG_PAGING_PAGESIZE - The size of one managed page. This must be a value supported by the processor's memory management unit. @@ -408,9 +408,9 @@ defconfig -- This is a configuration file similar to the Linux number if microseconds, then a fatal error will be declared. Default: No timeouts monitored. - Some architecture-specific settings. Defaults are architecture specific. - If you don't know what you are doing, it is best to leave these undefined - and try the system defaults: + Some architecture-specific settings. Defaults are architecture specific. + If you don't know what you are doing, it is best to leave these undefined + and try the system defaults: CONFIG_PAGING_VECPPAGE - This the physical address of the page in memory to be mapped to the vector address. @@ -448,7 +448,7 @@ defconfig -- This is a configuration file similar to the Linux in bytes into the FLASH device where the NuttX binary image is located. Default: 0 CONFIG_PAGING_SPIPORT - If CONFIG_PAGING_M25PX CONFIG_PAGING_AT45DB is - defined and the device has multiple SPI busses (ports), then this + defined and the device has multiple SPI busses (ports), then this configuration should be set to indicate which SPI port the device is connected. Default: 0 @@ -518,6 +518,27 @@ defconfig -- This is a configuration file similar to the Linux Filesystem configuration CONFIG_FS_FAT - Enable FAT filesystem support CONFIG_FAT_SECTORSIZE - Max supported sector size + CONFIG_FS_NXFFS: Enable NuttX FLASH file system (NXFF) support. + CONFIG_NXFFS_ERASEDSTATE: The erased state of FLASH. + This must have one of the values of 0xff or 0x00. + Default: 0xff. + CONFIG_NXFFS_PACKTHRESHOLD: When packing flash file data, + don't both with file chunks smaller than this number of data bytes. + Default: 32. + CONFIG_NXFFS_MAXNAMLEN: The maximum size of an NXFFS file name. + Default: 255. + CONFIG_NXFFS_PACKTHRESHOLD: When packing flash file data, + don't both with file chunks smaller than this number of data bytes. + Default: 32. + CONFIG_NXFFS_TAILTHRESHOLD: clean-up can either mean + packing files together toward the end of the file or, if file are + deleted at the end of the file, clean up can simply mean erasing + the end of FLASH memory so that it can be re-used again. However, + doing this can also harm the life of the FLASH part because it can + mean that the tail end of the FLASH is re-used too often. This + threshold determines if/when it is worth erased the tail end of FLASH + and making it available for re-use (and possible over-wear). + Default: 8192. CONFIG_FS_ROMFS - Enable ROMFS filesystem support SPI driver @@ -732,12 +753,12 @@ defconfig -- This is a configuration file similar to the Linux Many URLs use ~username to indicate a user's home directory. thttpd provides two options for mapping this construct to an actual filename. 1) Map ~username to <prefix>/username. This is the recommended choice. - Each user gets a subdirectory in the main web tree, and the tilde - construct points there. The prefix could be something like "users", - or it could be empty. + Each user gets a subdirectory in the main web tree, and the tilde + construct points there. The prefix could be something like "users", + or it could be empty. 2) Map ~username to <user's homedir>/<postfix>. The postfix would be - the name of a subdirectory off of the user's actual home dir, - something like "public_html". + the name of a subdirectory off of the user's actual home dir, + something like "public_html". You can also leave both options undefined, and thttpd will not do anything special about tildes. Enabling both options is an error. Typical values, if they're defined, are "users" for @@ -758,49 +779,49 @@ defconfig -- This is a configuration file similar to the Linux CONFIG_USBDEV_TRACE - Enables USB tracing for debug CONFIG_USBDEV_TRACE_NRECORDS - Number of trace entries to remember - USB host controller driver - CONFIG_USBHOST + USB host controller driver + CONFIG_USBHOST Enables USB host support - CONFIG_USBHOST_NPREALLOC + CONFIG_USBHOST_NPREALLOC Number of pre-allocated class instances - CONFIG_USBHOST_BULK_DISABLE + CONFIG_USBHOST_BULK_DISABLE On some architectures, selecting this setting will reduce driver size by disabling bulk endpoint support - CONFIG_USBHOST_INT_DISABLE + CONFIG_USBHOST_INT_DISABLE On some architectures, selecting this setting will reduce driver size by disabling interrupt endpoint support - CONFIG_USBHOST_ISOC_DISABLE + CONFIG_USBHOST_ISOC_DISABLE On some architectures, selecting this setting will reduce driver size by disabling isochronous endpoint support - USB host HID class driver. Requires CONFIG_USBHOST=y, - CONFIG_USBHOST_INT_DISABLE=n, CONFIG_NFILE_DESCRIPTORS > 0, - CONFIG_SCHED_WORKQUEUE=y, and CONFIG_DISABLE_SIGNALS=n. + USB host HID class driver. Requires CONFIG_USBHOST=y, + CONFIG_USBHOST_INT_DISABLE=n, CONFIG_NFILE_DESCRIPTORS > 0, + CONFIG_SCHED_WORKQUEUE=y, and CONFIG_DISABLE_SIGNALS=n. - CONFIG_HIDKBD_POLLUSEC + CONFIG_HIDKBD_POLLUSEC Device poll rate in microseconds. Default: 100 milliseconds. - CONFIG_HIDKBD_DEFPRIO + CONFIG_HIDKBD_DEFPRIO Priority of the polling thread. Default: 50. - CONFIG_HIDKBD_STACKSIZE + CONFIG_HIDKBD_STACKSIZE Stack size for polling thread. Default: 1024 - CONFIG_HIDKBD_BUFSIZE + CONFIG_HIDKBD_BUFSIZE Scancode buffer size. Default: 64. - CONFIG_HIDKBD_NPOLLWAITERS + CONFIG_HIDKBD_NPOLLWAITERS If the poll() method is enabled, this defines the maximum number of threads that can be waiting for keyboard events. Default: 2. - CONFIG_HIDKBD_RAWSCANCODES + CONFIG_HIDKBD_RAWSCANCODES If set to y no conversion will be made on the raw keyboard scan codes. Default: ASCII conversion. - CONFIG_HIDKBD_ALLSCANCODES' + CONFIG_HIDKBD_ALLSCANCODES' If set to y all 231 possible scancodes will be converted to something. Default: 104 key US keyboard. - CONFIG_HIDKBD_NODEBOUNCE + CONFIG_HIDKBD_NODEBOUNCE If set to y normal debouncing is disabled. Default: Debounce enabled (No repeat keys). - USB host mass storage class driver. Requires CONFIG_USBHOST=y, - CONFIG_USBHOST_BULK_DISABLE=n, CONFIG_NFILE_DESCRIPTORS > 0, - and CONFIG_SCHED_WORKQUEUE=y + USB host mass storage class driver. Requires CONFIG_USBHOST=y, + CONFIG_USBHOST_BULK_DISABLE=n, CONFIG_NFILE_DESCRIPTORS > 0, + and CONFIG_SCHED_WORKQUEUE=y USB serial device class driver CONFIG_USBSER @@ -937,175 +958,175 @@ Supported Boards ^^^^^^^^^^^^^^^^ configs/avr32dev1 - This is a port of NuttX to the Atmel AVR32DEV1 board. That board is - based on the Atmel AT32UC3B0256 MCU and uses a specially patched - version of the GNU toolchain: The patches provide support for the - AVR32 family. That patched GNU toolchain is available only from the - Atmel website. STATUS: the ostest configuration is functional, but + This is a port of NuttX to the Atmel AVR32DEV1 board. That board is + based on the Atmel AT32UC3B0256 MCU and uses a specially patched + version of the GNU toolchain: The patches provide support for the + AVR32 family. That patched GNU toolchain is available only from the + Atmel website. STATUS: the ostest configuration is functional, but there are issues with the NSH configuration (thought to be a hardware configuration issue, but that has not been confirmed). configs/c5471evm - This is a port to the Spectrum Digital C5471 evaluation board. The - TMS320C5471 is a dual core processor from TI with an ARM7TDMI general - purpose processor and a c54 DSP. It is also known as TMS320DA180 or just DA180. - NuttX runs on the ARM core and is built with a GNU arm-elf toolchain*. - This port is complete, verified, and included in the NuttX release. + This is a port to the Spectrum Digital C5471 evaluation board. The + TMS320C5471 is a dual core processor from TI with an ARM7TDMI general + purpose processor and a c54 DSP. It is also known as TMS320DA180 or just DA180. + NuttX runs on the ARM core and is built with a GNU arm-elf toolchain*. + This port is complete, verified, and included in the NuttX release. configs/demo9s12ne64 - Feescale DMO9S12NE64 board based on the MC9S12NE64 hcs12 cpu. This - port uses the m9s12x GCC toolchain. STATUS: Under development. + Feescale DMO9S12NE64 board based on the MC9S12NE64 hcs12 cpu. This + port uses the m9s12x GCC toolchain. STATUS: Under development. configs/ea3131 - Embedded Artists EA3131 Development bard. This board is based on the - an NXP LPC3131 MCU. This OS is built with the arm-elf toolchain*. - STATUS: This port is complete and mature. + Embedded Artists EA3131 Development bard. This board is based on the + an NXP LPC3131 MCU. This OS is built with the arm-elf toolchain*. + STATUS: This port is complete and mature. configs/eagle100 - Micromint Eagle-100 Development board. This board is based on the - an ARM Cortex-M3 MCU, the Luminary LM3S6918. This OS is built with the - arm-elf toolchain*. STATUS: This port is complete and mature. + Micromint Eagle-100 Development board. This board is based on the + an ARM Cortex-M3 MCU, the Luminary LM3S6918. This OS is built with the + arm-elf toolchain*. STATUS: This port is complete and mature. configs/ez80f0910200kitg - ez80Acclaim! Microcontroller. This port use the Zilog ez80f0910200kitg - development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line - tools. The development environment is Cygwin under WinXP. + ez80Acclaim! Microcontroller. This port use the Zilog ez80f0910200kitg + development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line + tools. The development environment is Cygwin under WinXP. configs/ez80f0910200zco - ez80Acclaim! Microcontroller. This port use the Zilog ez80f0910200zco - development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line - tools. The development environment is Cygwin under WinXP. + ez80Acclaim! Microcontroller. This port use the Zilog ez80f0910200zco + development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line + tools. The development environment is Cygwin under WinXP. configs/lm3s6965-ek - Stellaris LM3S6965 Evaluation Kit. This board is based on the - an ARM Cortex-M3 MCU, the Luminary/TI LM3S6965. This OS is built with the - arm-elf toolchain*. STATUS: This port is complete and mature. + Stellaris LM3S6965 Evaluation Kit. This board is based on the + an ARM Cortex-M3 MCU, the Luminary/TI LM3S6965. This OS is built with the + arm-elf toolchain*. STATUS: This port is complete and mature. configs/lpcxpresso-lpc1768 - Embedded Artists base board with NXP LPCExpresso LPC1768. This board - is based on the NXP LPC1768. The Code Red toolchain is used by default. - STATUS: Under development. + Embedded Artists base board with NXP LPCExpresso LPC1768. This board + is based on the NXP LPC1768. The Code Red toolchain is used by default. + STATUS: Under development. configs/m68322evb - This is a work in progress for the venerable m68322evb board from - Motorola. This OS is also built with the arm-elf toolchain*. STATUS: + This is a work in progress for the venerable m68322evb board from + Motorola. This OS is also built with the arm-elf toolchain*. STATUS: This port was never completed. configs/mbed - The configurations in this directory support the mbed board (http://mbed.org) - that features the NXP LPC1768 microcontroller. This OS is also built - with the arm-elf toolchain*. STATUS: Contributed. + The configurations in this directory support the mbed board (http://mbed.org) + that features the NXP LPC1768 microcontroller. This OS is also built + with the arm-elf toolchain*. STATUS: Contributed. configs/mcu123-lpc214x - This port is for the NXP LPC2148 as provided on the mcu123.com - lpc214x development board. This OS is also built with the arm-elf - toolchain*. The port supports serial, timer0, spi, and usb. + This port is for the NXP LPC2148 as provided on the mcu123.com + lpc214x development board. This OS is also built with the arm-elf + toolchain*. The port supports serial, timer0, spi, and usb. configs/mx1ads - This is a port to the Motorola MX1ADS development board. That board - is based on the Freescale i.MX1 processor. The i.MX1 is an ARM920T. - STATUS: This port is nearly code complete but still under development - (work is stalled until I devote time to the Micromint Eagle-100) + This is a port to the Motorola MX1ADS development board. That board + is based on the Freescale i.MX1 processor. The i.MX1 is an ARM920T. + STATUS: This port is nearly code complete but still under development + (work is stalled until I devote time to the Micromint Eagle-100) configs/ne64badge - Future Electronics Group NE64 /PoE Badge board based on the - MC9S12NE64 hcs12 cpu. This port uses the m9s12x GCC toolchain. - STATUS: Under development. + Future Electronics Group NE64 /PoE Badge board based on the + MC9S12NE64 hcs12 cpu. This port uses the m9s12x GCC toolchain. + STATUS: Under development. configs/ntosd-dm320 - This port uses the Neuros OSD v1.0 Dev Board with a GNU arm-elf - toolchain*: see - - http://wiki.neurostechnology.com/index.php/OSD_1.0_Developer_Home + This port uses the Neuros OSD v1.0 Dev Board with a GNU arm-elf + toolchain*: see + + http://wiki.neurostechnology.com/index.php/OSD_1.0_Developer_Home - There are some differences between the Dev Board and the currently - available commercial v1.0 Boards. See - - http://wiki.neurostechnology.com/index.php/OSD_Developer_Board_v1 + There are some differences between the Dev Board and the currently + available commercial v1.0 Boards. See + + http://wiki.neurostechnology.com/index.php/OSD_Developer_Board_v1 - NuttX operates on the ARM9EJS of this dual core processor. - STATUS: This port is code complete, verified, and included in the - NuttX 0.2.1 release. + NuttX operates on the ARM9EJS of this dual core processor. + STATUS: This port is code complete, verified, and included in the + NuttX 0.2.1 release. configs/nucleus2g - This port uses the Nucleus 2G board (with Babel CAN board). This board - features an NXP LPC1768 processor. See the 2G website (http://www.2g-eng.com/) - for more information about the Nucleus 2G. + This port uses the Nucleus 2G board (with Babel CAN board). This board + features an NXP LPC1768 processor. See the 2G website (http://www.2g-eng.com/) + for more information about the Nucleus 2G. configs/olimex-lpc1766stk - This port uses the Olimex LPC1766-STK board and a GNU GCC toolchain* under - Linux or Cygwin. STATUS: under development. + This port uses the Olimex LPC1766-STK board and a GNU GCC toolchain* under + Linux or Cygwin. STATUS: under development. configs/olimex-lpc2378 - This port uses the Olimex-lpc2378 board and a GNU arm-elf toolchain* under - Linux or Cygwin. STATUS: ostest and NSH configurations available. + This port uses the Olimex-lpc2378 board and a GNU arm-elf toolchain* under + Linux or Cygwin. STATUS: ostest and NSH configurations available. configs/olimex-lpc2378 - This port for the NXP LPC2378 was contributed by Rommel Marcelo. + This port for the NXP LPC2378 was contributed by Rommel Marcelo. configs/olimex-strp711 - This port uses the Olimex STR-P711 board and a GNU arm-elf toolchain* under + This port uses the Olimex STR-P711 board and a GNU arm-elf toolchain* under Linux or Cygwin. See the http://www.olimex.com/dev/str-p711.html" for further information. STATUS: Coding for the basic port -- serial console and system timer -- is complete but untested to problems I am having using OpenOCD with a wiggler clone JTAG. configs/pjrc-8051 - 8051 Microcontroller. This port uses the PJRC 87C52 development system - and the SDCC toolchain. This port is not quite ready for prime time. + 8051 Microcontroller. This port uses the PJRC 87C52 development system + and the SDCC toolchain. This port is not quite ready for prime time. configs/sim - A user-mode port of NuttX to the x86 Linux platform is available. - The purpose of this port is primarily to support OS feature development. - This port does not support interrupts or a real timer (and hence no - round robin scheduler) Otherwise, it is complete. + A user-mode port of NuttX to the x86 Linux platform is available. + The purpose of this port is primarily to support OS feature development. + This port does not support interrupts or a real timer (and hence no + round robin scheduler) Otherwise, it is complete. - NOTE: This target will not run on Cygwin probably for many reasons but - first off because it uses some of the same symbols as does cygwin.dll. + NOTE: This target will not run on Cygwin probably for many reasons but + first off because it uses some of the same symbols as does cygwin.dll. configs/skp16c26 - Renesas M16C processor on the Renesas SKP16C26 StarterKit. This port - uses the GNU m32c toolchain. + Renesas M16C processor on the Renesas SKP16C26 StarterKit. This port + uses the GNU m32c toolchain. configs/stm3210e-evel - STMicro STM3210E-EVAL development board based on the STMicro STM32F103ZET6 - microcontroller (ARM Cortex-M3). This port uses the GNU Cortex-M3 - toolchain. + STMicro STM3210E-EVAL development board based on the STMicro STM32F103ZET6 + microcontroller (ARM Cortex-M3). This port uses the GNU Cortex-M3 + toolchain. configs/us7032evb1 - This is a port of the Hitachi SH-1 on the Hitachi SH-1/US7032EVB1 board. - STATUS: Work has just began on this port. + This is a port of the Hitachi SH-1 on the Hitachi SH-1/US7032EVB1 board. + STATUS: Work has just began on this port. configs/vsn - ISOTEL NetClamps VSN V1.2 ready2go sensor network platform based on the + ISOTEL NetClamps VSN V1.2 ready2go sensor network platform based on the STMicro STM32F103RET6. Contributed by Uros Platise. configs/xtrs - TRS80 Model 3. This port uses a vintage computer based on the Z80. - An emulator for this computer is available to run TRS80 programs on a - linux platform (http://www.tim-mann.org/xtrs.html). + TRS80 Model 3. This port uses a vintage computer based on the Z80. + An emulator for this computer is available to run TRS80 programs on a + linux platform (http://www.tim-mann.org/xtrs.html). configs/z16f2800100zcog - z16f Microcontroller. This port use the Zilog z16f2800100zcog - development kit and the Zilog ZDS-II Windows command line tools. The - development environment is Cygwin under WinXP. + z16f Microcontroller. This port use the Zilog z16f2800100zcog + development kit and the Zilog ZDS-II Windows command line tools. The + development environment is Cygwin under WinXP. configs/z80sim - z80 Microcontroller. This port uses a Z80 instruction set simulator. - That simulator can be found in the NuttX SVN at - http://nuttx.svn.sourceforge.net/viewvc/nuttx/trunk/misc/sims/z80sim. - This port also uses the SDCC toolchain (http://sdcc.sourceforge.net/") - (verified with version 2.6.0). + z80 Microcontroller. This port uses a Z80 instruction set simulator. + That simulator can be found in the NuttX SVN at + http://nuttx.svn.sourceforge.net/viewvc/nuttx/trunk/misc/sims/z80sim. + This port also uses the SDCC toolchain (http://sdcc.sourceforge.net/") + (verified with version 2.6.0). configs/z8encore000zco - z8Encore! Microcontroller. This port use the Zilog z8encore000zco - development kit, Z8F6403 part, and the Zilog ZDS-II Windows command line - tools. The development environment is Cygwin under WinXP. + z8Encore! Microcontroller. This port use the Zilog z8encore000zco + development kit, Z8F6403 part, and the Zilog ZDS-II Windows command line + tools. The development environment is Cygwin under WinXP. configs/z8f64200100kit - z8Encore! Microcontroller. This port use the Zilog z8f64200100kit - development kit, Z8F6423 part, and the Zilog ZDS-II Windows command line - tools. The development environment is Cygwin under WinXP. + z8Encore! Microcontroller. This port use the Zilog z8f64200100kit + development kit, Z8F6423 part, and the Zilog ZDS-II Windows command line + tools. The development environment is Cygwin under WinXP. Other ports for the for the TI TMS320DM270, M683222 and for MIPS are in various states of progress diff --git a/configs/vsn/nsh/defconfig b/configs/vsn/nsh/defconfig index c33e36dbf9..dd5b1ca37c 100755 --- a/configs/vsn/nsh/defconfig +++ b/configs/vsn/nsh/defconfig @@ -522,8 +522,10 @@ CONFIG_PREALLOC_TIMERS=4 # # CONFIG_FS_FAT - Enable FAT filesystem support # CONFIG_FAT_SECTORSIZE - Max supported sector size +# CONFIG_FS_NXFFS - Enable NX Flash File System # CONFIG_FS_ROMFS - Enable ROMFS filesystem support CONFIG_FS_FAT=y +CONFIG_FS_NXFFS=y CONFIG_FS_ROMFS=y # @@ -891,15 +893,3 @@ CONFIG_APPS_DIR="../apps" # Provide /dev/ramX and then: mount -t binfs /dev/ram0 /bin CONFIG_APPS_BINDIR=y - -# Application configuration - -CONFIG_APPS_DIR="../apps" - -# Application configuration - -CONFIG_APPS_DIR="../apps" - -# Application configuration - -CONFIG_APPS_DIR="../apps" diff --git a/configs/vsn/src/sif.c b/configs/vsn/src/sif.c index 4be2144443..2cd8071385 100644 --- a/configs/vsn/src/sif.c +++ b/configs/vsn/src/sif.c @@ -74,6 +74,7 @@ #include <nuttx/clock.h> #include <nuttx/time.h> #include <nuttx/rtc.h> +#include <nuttx/progmem.h> #include <nuttx/i2c.h> #include <nuttx/sensors/st_lis331dl.h> @@ -512,6 +513,36 @@ int sif_main(int argc, char *argv[]) t_set.tv_sec = atoi(argv[2]); clock_settime(CLOCK_REALTIME, &t_set); } + else if (!strcmp(argv[1], "free") ) { + uint16_t page = 0, stpage = 0xFFFF; + int status; + do { + status = up_progmem_ispageerased(page++); + + /* Is this beginning of new free space section */ + if (status == 0) { + if (stpage == 0xFFFF) stpage = page-1; + } + else if (status != 0) { + if (stpage != 0xFFFF) { + printf("Free Range:\t%d\t-\t%d\n", stpage, page-2); + stpage = 0xFFFF; + } + } + } + while (status >= 0); + } + else if (!strcmp(argv[1], "erase") && argc == 3 ) { + int page = atoi(argv[2]); + printf("Erase result: %d\n", up_progmem_erasepage(page) ); + } + else if (!strcmp(argv[1], "flash") && argc == 3 ) { + uint16_t page = atoi(argv[2]); + uint32_t addr = page * up_progmem_pagesize(page); + + printf("Write result: %d (writing to address %xh)\n", + up_progmem_write( addr, "Test", 4 ), addr); + } else if (!strcmp(argv[1], "i2c") && argc == 3) { int val = atoi(argv[2]); @@ -520,7 +551,7 @@ int sif_main(int argc, char *argv[]) struct st_lis331dl_dev_s * lis = st_lis331dl_init(vsn_sif.i2c1, val); if (lis) { - struct st_lis331dl_vector_s * a; + const struct st_lis331dl_vector_s * a; int i; uint32_t time_stamp = clock_systimer(); diff --git a/configs/vsn/src/sysclock.c b/configs/vsn/src/sysclock.c index f65ae06707..8b1a0be348 100644 --- a/configs/vsn/src/sysclock.c +++ b/configs/vsn/src/sysclock.c @@ -78,8 +78,8 @@ void sysclock_select_hsi(void) // Set FLASH prefetch buffer and 1 wait state regval = getreg32(STM32_FLASH_ACR); - regval &= ~ACR_LATENCY_MASK; - regval |= (ACR_LATENCY_1|ACR_PRTFBE); + regval &= ~FLASH_ACR_LATENCY_MASK; + regval |= (FLASH_ACR_LATENCY_1|FLASH_ACR_PRTFBE); putreg32(regval, STM32_FLASH_ACR); // Set the HCLK source/divider diff --git a/include/apps/apps.h b/include/apps/apps.h index 866db8e299..d494500d13 100644 --- a/include/apps/apps.h +++ b/include/apps/apps.h @@ -139,7 +139,7 @@ EXTERN const char *namedapp_getname(int index); * ****************************************************************************/ -EXTERN int exec_namedapp(FAR const char *appname, FAR const char *argv[]); +EXTERN int exec_namedapp(FAR const char *appname, FAR const char **argv); #undef EXTERN #if defined(__cplusplus) diff --git a/include/nuttx/progmem.h b/include/nuttx/progmem.h new file mode 100644 index 0000000000..e9e05ed2c1 --- /dev/null +++ b/include/nuttx/progmem.h @@ -0,0 +1,143 @@ +/**************************************************************************** + * include/nuttx/progmem.h + * + * Copyright(C) 2011 Uros Platise. All rights reserved. + * Author: Uros Platise <uros.platise@isotel.eu> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_PROGMEM_H +#define __INCLUDE_NUTTX_PROGMEM_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <stdint.h> +#include <stdbool.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/* Return number of pages */ + +uint16_t up_progmem_npages(void); + +/* Is program memory uniform or page size differs */ + +bool up_progmem_isuniform(void); + +/* Return page size */ + +uint16_t up_progmem_pagesize(uint16_t page); + +/* Address to page conversion + * \param addr Address without flash offet (aligned to page0) + * \return Page or negative value on error + * + * The following errors are reported (errno is not set!) + * - EFAULT: On invalid address + */ + +int up_progmem_getpage(uint32_t addr); + +/* Erase selected page. + * \return page size or negative value on error + * + * The following errors are reported (errno is not set!) + * - EFAULT: On invalid page + * - EIO: On unsuccessful erase + * - EROFS: On access to write protected area + * - EACCES: Insufficient permissions (read/write protected) + * - EPERM: If operation is not permitted due to some other constraints + * (i.e. some internal block is not running etc.) + */ + +int up_progmem_erasepage(uint16_t page); + +/* Checks whether page is erased + * + * Returns number of bytes written or negative value on error. + * If it returns zero then complete page is empty (erased). + * + * The following errors are reported (errno is not set!) + * - EFAULT: On invalid page + */ + +int up_progmem_ispageerased(uint16_t page); + +/* Program data at given address + * \return bytes written or negative value on error + * \param addr Address without flash offet (aligned to page0) + * \param buf Pointer to buffer + * \param count Number of bytes to write + * + * Note: this function is not limited to single page and nor it requires + * the address be aligned inside the page boundaries. + * + * The following errors are reported (errno is not set!) + * - EINVAL: if count is not aligned with the flash boundaries (i.e. + * some MCU's require per half-word or even word access) + * - EFAULT: On invalid address + * - EIO: On unsuccessful write + * - EROFS: On access to write protected area + * - EACCES: Insufficient permissions (read/write protected) + * - EPERM: If operation is not permitted due to some other constraints + * (i.e. some internal block is not running etc.) + */ + +int up_progmem_write(uint32_t addr, const void *buf, size_t count); + +/* \todo: Define the following functions and their options: + * - up_progmem_protect() + * - up_progmem_unprotect() + */ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __INCLUDE_NUTTX_PROGMEM_H */ diff --git a/sched/atexit.c b/sched/atexit.c index 091302cb81..3a116f4c14 100644 --- a/sched/atexit.c +++ b/sched/atexit.c @@ -49,7 +49,7 @@ #include "os_internal.h" -#ifdef CONFIG_SCHED_ATEXiT +#ifdef CONFIG_SCHED_ATEXIT /************************************************************************ * Definitions diff --git a/sched/clock_systimer.c b/sched/clock_systimer.c index a1219a681a..71577df76e 100644 --- a/sched/clock_systimer.c +++ b/sched/clock_systimer.c @@ -89,7 +89,7 @@ uint32_t clock_systimer(void) if (g_rtc_enabled) { - return up_rtc_getclock(); +// return up_rtc_getclock(); } #endif -- GitLab