From 6bd27cc477b49265f0187a28716624ab12bd4235 Mon Sep 17 00:00:00 2001
From: patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>
Date: Sat, 26 Sep 2009 19:03:46 +0000
Subject: [PATCH] Add UART4/5 register definitions

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2096 42af7a65-404d-4744-a932-0658087f49c3
---
 arch/arm/src/stm32/stm32_uart.h        | 14 ++++++++++++--
 configs/stm3210e-eval/ostest/defconfig | 23 +++++++++++++++++++++++
 2 files changed, 35 insertions(+), 2 deletions(-)

diff --git a/arch/arm/src/stm32/stm32_uart.h b/arch/arm/src/stm32/stm32_uart.h
index 37a1572195..6a1213ca10 100755
--- a/arch/arm/src/stm32/stm32_uart.h
+++ b/arch/arm/src/stm32/stm32_uart.h
@@ -91,11 +91,21 @@
 #endif
 
 #if STM32_NUSART > 3
-#  warning "Check UART4 register definitions"
+#  define STM32_UART4_SR          (STM32_UART4_BASE+STM32_USART_SR_OFFSET)
+#  define STM32_UART4_DR          (STM32_UART4_BASE+STM32_USART_DR_OFFSET)
+#  define STM32_UART4_BRR         (STM32_UART4_BASE+STM32_USART_BRR_OFFSET)
+#  define STM32_UART4_CR1         (STM32_UART4_BASE+STM32_USART_CR1_OFFSET)
+#  define STM32_UART4_CR2         (STM32_UART4_BASE+STM32_USART_CR2_OFFSET)
+#  define STM32_UART4_CR3         (STM32_UART4_BASE+STM32_USART_CR3_OFFSET)
 #endif
 
 #if STM32_NUSART > 4
-#  warning "Check UART5 register definitions"
+#  define STM32_UART5_SR          (STM32_UART5_BASE+STM32_USART_SR_OFFSET)
+#  define STM32_UART5_DR          (STM32_UART5_BASE+STM32_USART_DR_OFFSET)
+#  define STM32_UART5_BRR         (STM32_UART5_BASE+STM32_USART_BRR_OFFSET)
+#  define STM32_UART5_CR1         (STM32_UART5_BASE+STM32_USART_CR1_OFFSET)
+#  define STM32_UART5_CR2         (STM32_UART5_BASE+STM32_USART_CR2_OFFSET)
+#  define STM32_UART5_CR3         (STM32_UART5_BASE+STM32_USART_CR3_OFFSET)
 #endif
 
 /* Register Bitfield Definitions ****************************************************/
diff --git a/configs/stm3210e-eval/ostest/defconfig b/configs/stm3210e-eval/ostest/defconfig
index 8822f6de90..49559dc1a0 100755
--- a/configs/stm3210e-eval/ostest/defconfig
+++ b/configs/stm3210e-eval/ostest/defconfig
@@ -112,27 +112,50 @@ CONFIG_STM32_BUILDROOT=y
 CONFIG_USART1_DISABLE=n
 CONFIG_USART2_DISABLE=y
 CONFIG_USART3_DISABLE=y
+CONFIG_USART4_DISABLE=y
+CONFIG_USART5_DISABLE=y
+
 CONFIG_USART1_SERIAL_CONSOLE=y
 CONFIG_USART2_SERIAL_CONSOLE=n
 CONFIG_USART3_SERIAL_CONSOLE=n
+CONFIG_USART4_SERIAL_CONSOLE=n
+CONFIG_USART5_SERIAL_CONSOLE=n
+
 CONFIG_USART1_TXBUFSIZE=256
 CONFIG_USART2_TXBUFSIZE=256
 CONFIG_USART3_TXBUFSIZE=256
+CONFIG_USART4_TXBUFSIZE=256
+CONFIG_USART5_TXBUFSIZE=256
+
 CONFIG_USART1_RXBUFSIZE=256
 CONFIG_USART2_RXBUFSIZE=256
 CONFIG_USART3_RXBUFSIZE=256
+CONFIG_USART4_RXBUFSIZE=256
+CONFIG_USART5_RXBUFSIZE=256
+
 CONFIG_USART1_BAUD=115200
 CONFIG_USART2_BAUD=115200
 CONFIG_USART3_BAUD=115200
+CONFIG_USART4_BAUD=115200
+CONFIG_USART5_BAUD=115200
+
 CONFIG_USART1_BITS=8
 CONFIG_USART2_BITS=8
 CONFIG_USART3_BITS=8
+CONFIG_USART4_BITS=8
+CONFIG_USART5_BITS=8
+
 CONFIG_USART1_PARITY=0
 CONFIG_USART2_PARITY=0
 CONFIG_USART3_PARITY=0
+CONFIG_USART4_PARITY=0
+CONFIG_USART5_PARITY=0
+
 CONFIG_USART1_2STOP=0
 CONFIG_USART2_2STOP=0
 CONFIG_USART3_2STOP=0
+CONFIG_USART4_2STOP=0
+CONFIG_USART5_2STOP=0
 
 #
 # STM32F103Z specific SSI device driver settings
-- 
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