diff --git a/arch/arm/src/lpc313x/Make.defs b/arch/arm/src/lpc313x/Make.defs
index 592ccaa7184136554aacaa45ea157c2c3bfd6194..00274435514996a7c9618f58b95eedc7cfa537f8 100755
--- a/arch/arm/src/lpc313x/Make.defs
+++ b/arch/arm/src/lpc313x/Make.defs
@@ -46,4 +46,4 @@ CMN_CSRCS	= up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
 		  up_undefinedinsn.c up_usestack.c
 
 CHIP_ASRCS	= 
-CHIP_CSRCS	= 
+CHIP_CSRCS	= lpc313x_allocateheap.c
diff --git a/arch/arm/src/lpc313x/lpc313x_allocateheap.c b/arch/arm/src/lpc313x/lpc313x_allocateheap.c
new file mode 100755
index 0000000000000000000000000000000000000000..471df465f0df283bbce12ff5e1b6d687b5c52434
--- /dev/null
+++ b/arch/arm/src/lpc313x/lpc313x_allocateheap.c
@@ -0,0 +1,92 @@
+/************************************************************************
+ * arch/arm/src/lpc313x/lpc313x_allocateheap.c
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************/
+
+/************************************************************************
+ * Included Files
+ ************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <debug.h>
+
+#include <nuttx/arch.h>
+
+#include "up_arch.h"
+#include "up_internal.h"
+#include "lpc313x_memorymap.h"
+
+/************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************/
+
+/************************************************************************
+ * Private Data
+ ************************************************************************/
+
+/************************************************************************
+ * Private Functions
+ ************************************************************************/
+
+/************************************************************************
+ * Public Functions
+ ************************************************************************/
+
+/************************************************************************
+ * Name: up_allocate_heap
+ *
+ * Description:
+ *   The heap may be statically allocated by defining CONFIG_HEAP_BASE
+ *   and CONFIG_HEAP_SIZE.  If these are not defined, then this function
+ *   will be called to dynamically set aside the heap region to the end
+ *   of SRAM.
+ *
+ *   SRAM layout:
+ *   Start of SRAM:   .data
+ *                    .bss
+ *                    IDLE thread stack
+ *   End of SRAm:     heap
+ *
+ *   NOTE: Ignore the erroneous nomenclature DRAM and SDRAM.  That names
+ *   date back to an earlier platform that had SDRAM.
+ *
+ ************************************************************************/
+
+void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
+{
+  up_ledon(LED_HEAPALLOCATE);
+  *heap_start = (FAR void*)g_heapbase;
+  *heap_size  = (LPC313X_SRAM_VADDR + CONFIG_DRAM_SIZE) - g_heapbase;
+}
diff --git a/arch/arm/src/lpc313x/lpc313x_memorymap.h b/arch/arm/src/lpc313x/lpc313x_memorymap.h
index ae01d024cdbdc5251c0c9f978e525a938e574fb7..848a994459fe8cb24ce87886043bb5c9e2a51265 100755
--- a/arch/arm/src/lpc313x/lpc313x_memorymap.h
+++ b/arch/arm/src/lpc313x/lpc313x_memorymap.h
@@ -116,7 +116,26 @@
 /* To be provided */
 
 /* LPC313X Virtual (mapped) Memory Map */
-/* To be provided */
+/* Temporary for now, just to get through compilation */
+
+#define LPC313X_SHADOWSPACE_VSECTION  0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */
+#define LPC313X_INTSRAM0_VSECTION     0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */
+#define LPC313X_INTSRAM1_VSECTION     0x11040000 /* 0x11040000-0x11057fff: Internal SRAM 1 96Kb */
+#  define LPC313X_SRAM_VADDR          LPC313X_INTSRAM0_VSECTION
+#define LPC313X_INTSROM0_VSECTION     0x12000000 /* 0x12000000-0x1201ffff: Internal SROM 0 128Kb */
+#define LPC313X_APB0_VSECTION         0x13000000 /* 0x13000000-0x13007fff: APB0 32Kb */
+#define LPC313X_APB1_VSECTION         0x13008000 /* 0x13008000-0x1300bfff: APB1 16Kb */
+#define LPC313X_APB2_VSECTION         0x15000000 /* 0x15000000-0x15003fff: APB2 16Kb */
+#define LPC313X_APB3_VSECTION         0x16000000 /* 0x16000000-0x160003ff: APB3 1Kb */
+#define LPC313X_APB4_VSECTION         0x17000000 /* 0x17000000-0x17000fff: APB4 4Kb */
+#define LPC313X_MPMC_VSECTION         0x17008000 /* 0x17008000-0x17008fff: MPMC cfg 4Kb */
+#define LPC313X_MCI_VSECTION          0x18000000 /* 0x18000000 0x180003ff: MCI/SD/SDIO 1Kb */
+#define LPC313X_USBOTG_VSECTION       0x19000000 /* 0x19000000-0x19000fff: USB OTG 4Kb */
+#define LPC313X_EXTSRAM0_VSECTION     0x20000000 /* 0x20000000-0x2001ffff: External SRAM 0 64-128Kb */
+#define LPC313X_EXTSRAM1_VSECTION     0x20020000 /* 0x20020000-0x2003ffff: External SRAM 1 64-128Kb */
+#define LPC313X_EXTSDRAM0_VSECTION    0x30000000 /* 0x30000000-0x37ffffff: External SDRAM 0 128Mb */
+#define LPC313X_INTC_VSECTION         0x60000000 /* 0x60000000-0x60000fff: Interrupt controller 4Kb */
+#define LPC313X_NAND_VSECTION         0x70000000 /* 0x70000000-0x700007ff: NANDFLASH Ctrl 2Kb */
 
 /* The NuttX entry point starts at an offset from the virtual beginning of DRAM.
  * This offset reserves space for the MMU page cache.