diff --git a/arch/arm/src/arm/up_assert.c b/arch/arm/src/arm/up_assert.c
index 657152b980edbe18e8dfe4513e91df4a737a4ce7..2a4dc0a316bb35f5ab8954e528e06cfc4bfb138e 100644
--- a/arch/arm/src/arm/up_assert.c
+++ b/arch/arm/src/arm/up_assert.c
@@ -46,6 +46,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
+#include <arch/board/board.h>
#include "up_arch.h"
#include "os_internal.h"
diff --git a/arch/arm/src/arm/up_sigdeliver.c b/arch/arm/src/arm/up_sigdeliver.c
index 60cc0caf8d6f1ff00ed6b277bdb4ef79b2a03e9d..a2358a0440578c513d465618d61e82e0d9b3d75e 100644
--- a/arch/arm/src/arm/up_sigdeliver.c
+++ b/arch/arm/src/arm/up_sigdeliver.c
@@ -45,6 +45,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
+#include <arch/board/board.h>
#include "os_internal.h"
#include "up_internal.h"
diff --git a/arch/arm/src/common/up_allocateheap.c b/arch/arm/src/common/up_allocateheap.c
index 1aeb511f86b9abb07f166b89a75e9474215d1917..fbd1421a7489a8bc14b1524ed89a833f942a13e2 100644
--- a/arch/arm/src/common/up_allocateheap.c
+++ b/arch/arm/src/common/up_allocateheap.c
@@ -43,6 +43,7 @@
#include <debug.h>
#include <nuttx/arch.h>
+#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
diff --git a/arch/arm/src/common/up_arch.h b/arch/arm/src/common/up_arch.h
index 3b001542b4643a48a28d670be74628b41524b062..b612f6af2598693dad2bb2eb504cceccf3ff8389 100644
--- a/arch/arm/src/common/up_arch.h
+++ b/arch/arm/src/common/up_arch.h
@@ -45,9 +45,6 @@
# include <stdint.h>
#endif
-#include <arch/board/board.h>
-#include "chip.h"
-
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
diff --git a/arch/arm/src/common/up_createstack.c b/arch/arm/src/common/up_createstack.c
index 9f4989da3afbcf3fa871ed787cbe1c83d1fd11ef..32d76d47ded9a86bda0b5d668b6862677fee6c4b 100644
--- a/arch/arm/src/common/up_createstack.c
+++ b/arch/arm/src/common/up_createstack.c
@@ -46,6 +46,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/arch.h>
+#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
diff --git a/arch/arm/src/common/up_initialize.c b/arch/arm/src/common/up_initialize.c
index 446009040594664bc9c13e6b29547842c3e91dc5..1e8fca47ca4f7215251044e7c0e2b77b135cc336 100644
--- a/arch/arm/src/common/up_initialize.c
+++ b/arch/arm/src/common/up_initialize.c
@@ -43,6 +43,7 @@
#include <nuttx/arch.h>
#include <nuttx/fs.h>
+#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
diff --git a/arch/arm/src/cortexm3/up_assert.c b/arch/arm/src/cortexm3/up_assert.c
index 9a27ac13de7c1a70ffe0dc0c8405c883d8a9bc28..b10bc0d8d3a9189794bb9f1d1bd2c03c26849813 100644
--- a/arch/arm/src/cortexm3/up_assert.c
+++ b/arch/arm/src/cortexm3/up_assert.c
@@ -46,6 +46,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
+#include <arch/board/board.h>
#include "up_arch.h"
#include "os_internal.h"
diff --git a/arch/arm/src/cortexm3/up_sigdeliver.c b/arch/arm/src/cortexm3/up_sigdeliver.c
index 79b3f876f960627d0bec23b28cf03d017da175f8..e350f126af50fe031dca49c5a282326a0f28be99 100644
--- a/arch/arm/src/cortexm3/up_sigdeliver.c
+++ b/arch/arm/src/cortexm3/up_sigdeliver.c
@@ -45,6 +45,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
+#include <arch/board/board.h>
#include "os_internal.h"
#include "up_internal.h"
diff --git a/arch/arm/src/dm320/dm320_allocateheap.c b/arch/arm/src/dm320/dm320_allocateheap.c
index f97a55c7d39271cd5e1827cf90253158e987430e..865164b524d5c4d33f0bd81d55db3be64709d2b0 100644
--- a/arch/arm/src/dm320/dm320_allocateheap.c
+++ b/arch/arm/src/dm320/dm320_allocateheap.c
@@ -40,7 +40,10 @@
#include <nuttx/config.h>
#include <sys/types.h>
#include <debug.h>
+
#include <nuttx/arch.h>
+#include <arch/board/board.h>
+
#include "up_arch.h"
#include "up_internal.h"
diff --git a/arch/arm/src/imx/imx_allocateheap.c b/arch/arm/src/imx/imx_allocateheap.c
index fcf0117ffd854baf66c51b3020ab8cbc4caeabc9..a9ba6800f4b9ddc20276a7ece67f58d6d6e0b533 100644
--- a/arch/arm/src/imx/imx_allocateheap.c
+++ b/arch/arm/src/imx/imx_allocateheap.c
@@ -43,8 +43,10 @@
#include <sys/types.h>
#include <stdint.h>
#include <debug.h>
+
#include <nuttx/mm.h>
#include <nuttx/arch.h>
+#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
diff --git a/arch/arm/src/lpc313x/lpc313x_allocateheap.c b/arch/arm/src/lpc313x/lpc313x_allocateheap.c
index 471df465f0df283bbce12ff5e1b6d687b5c52434..cd3ccdc0d10d9e46dc8cda61827a00fc6dc693bc 100755
--- a/arch/arm/src/lpc313x/lpc313x_allocateheap.c
+++ b/arch/arm/src/lpc313x/lpc313x_allocateheap.c
@@ -43,6 +43,7 @@
#include <debug.h>
#include <nuttx/arch.h>
+#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
diff --git a/arch/arm/src/lpc313x/lpc313x_cgudrvr.h b/arch/arm/src/lpc313x/lpc313x_cgudrvr.h
index 558a004339d63a57a75ad57f81caefda598396e6..2a9655b2cd7d44a280238aa1b2e38f4aec3ec827 100755
--- a/arch/arm/src/lpc313x/lpc313x_cgudrvr.h
+++ b/arch/arm/src/lpc313x/lpc313x_cgudrvr.h
@@ -338,62 +338,62 @@ enum lpc313x_clockid_e
enum lpc313x_resetid_e
{
- RESETID_APB0RST, /* 4 AHB part of AHB_TO_APB0 bridge (Reserved) */
- RESETID_AHB2APB0RST, /* 5 APB part of AHB_TO_APB0 bridge (Reserved) */
- RESETID_APB1RST, /* 6 AHB part of AHB_TO_APB1 bridge */
- RESETID_AHB2PB1RST, /* 7 APB part of AHB_TO_APB1 bridge */
- RESETID_APB2RST, /* 8 AHB part of AHB_TO_APB2 bridge */
- RESETID_AHB2APB2RST, /* 9 APB part of AHB_TO_APB2 bridge */
- RESETID_APB3RST, /* 10 AHB part of AHB_TO_APB3 bridge */
- RESETID_AHB2APB3RST, /* 11 APB part of AHB_TO_APB3 bridge */
- RESETID_APB4RST, /* 12 AHB_TO_APB4 bridge */
- RESETID_AHB2INTCRST, /* 13 AHB_TO_INTC */
- RESETID_AHB0RST, /* 14 AHB0 */
- RESETID_EBIRST, /* 15 EBI */
- RESETID_PCMAPBRST, /* 16 APB domain of PCM */
- RESETID_PCMCLKIPRST, /* 17 synchronous clk_ip domain of PCM */
- RESETID_PCMRSTASYNC, /* 18 asynchronous clk_ip domain of PCM */
- RESETID_TIMER0RST, /* 19 Timer0 */
- RESETID_TIMER1RST, /* 20 Timer1 */
- RESETID_TIMER2RST, /* 21 Timer2 */
- RESETID_TIMER3RST, /* 22 Timer3 */
- RESETID_ADCPRST, /* 23 controller of 10 bit ADC Interface */
- RESETID_ADCRST, /* 24 A/D converter of ADC Interface */
- RESETID_PWMRST, /* 25 PWM */
- RESETID_UARTRST, /* 26 UART/IrDA */
- RESETID_I2C0RST, /* 27 I2C0 */
- RESETID_I2C1RST, /* 28 I2C1 */
- RESETID_I2SCFGRST, /* 29 I2S_Config */
- RESETID_I2SNSOFRST, /* 30 NSOF counter of I2S_CONFIG */
- RESETID_EDGEDETRST, /* 31 Edge_det */
- RESETID_I2STXFF0RST, /* 32 I2STX_FIFO_0 */
- RESETID_I2STXIF0RST, /* 33 I2STX_IF_0 */
- RESETID_I2STXFF1RST, /* 34 I2STX_FIFO_1 */
- RESETID_I2STXIF1RST, /* 35 I2STX_IF_1 */
- RESETID_I2SRXFF0RST, /* 36 I2SRX_FIFO_0 */
- RESETID_I2SRXIF0RST, /* 37 I2SRX_IF_0 */
- RESETID_I2SRXFF1RST, /* 38 I2SRX_FIFO_1 */
- RESETID_I2SRXIF1RST, /* 39 I2SRX_IF_1 */
- RESETID_RESERVED40, /* 40 Reserved */
- RESETID_RESERVED41, /* 41 Reserved */
- RESETID_RESERVED42, /* 42 Reserved */
- RESETID_RESERVED43, /* 43 Reserved */
- RESETID_RESERVED44, /* 44 Reserved */
- RESETID_LCDRST, /* 45 LCD Interface */
- RESETID_SPIRSTAPB, /* 46 apb_clk domain of SPI */
- RESETID_SPIRSTIP, /* 47 ip_clk domain of SPI */
- RESETID_DMARST, /* 48 DMA */
- RESETID_NANDECCRST, /* 49 Nandflash Controller ECC clock */
- RESETID_NANDAESRST, /* 50 Nandflash Controller AES clock (reserved for lpc313x) */
- RESETID_NANDCTRLRST, /* 51 Nandflash Controller */
- RESETID_RNG, /* 52 RNG */
- RESETID_SDMMCRST, /* 53 MCI (on AHB clock) */
- RESETID_SDMMCRSTCKIN, /* 54 CI synchronous (on IP clock) */
- RESETID_USBOTGAHBRST, /* 55 USB_OTG */
- RESETID_REDCTLRST, /* 56 Redundancy Controller */
- RESETID_AHBMPMCHRST, /* 57 MPMC */
- RESETID_AHBMPMCRFRST, /* 58 refresh generator used for MPMC */
- RESETID_INTCRST, /* 59 Interrupt Controller */
+ RESETID_APB0RST, /* 0 AHB part of AHB_TO_APB0 bridge (Reserved) */
+ RESETID_AHB2APB0RST, /* 1 APB part of AHB_TO_APB0 bridge (Reserved) */
+ RESETID_APB1RST, /* 2 AHB part of AHB_TO_APB1 bridge */
+ RESETID_AHB2PB1RST, /* 3 APB part of AHB_TO_APB1 bridge */
+ RESETID_APB2RST, /* 4 AHB part of AHB_TO_APB2 bridge */
+ RESETID_AHB2APB2RST, /* 5 APB part of AHB_TO_APB2 bridge */
+ RESETID_APB3RST, /* 6 AHB part of AHB_TO_APB3 bridge */
+ RESETID_AHB2APB3RST, /* 7 APB part of AHB_TO_APB3 bridge */
+ RESETID_APB4RST, /* 8 AHB_TO_APB4 bridge */
+ RESETID_AHB2INTCRST, /* 9 AHB_TO_INTC */
+ RESETID_AHB0RST, /* 10 AHB0 */
+ RESETID_EBIRST, /* 11 EBI */
+ RESETID_PCMAPBRST, /* 12 APB domain of PCM */
+ RESETID_PCMCLKIPRST, /* 13 synchronous clk_ip domain of PCM */
+ RESETID_PCMRSTASYNC, /* 14 asynchronous clk_ip domain of PCM */
+ RESETID_TIMER0RST, /* 15 Timer0 */
+ RESETID_TIMER1RST, /* 16 Timer1 */
+ RESETID_TIMER2RST, /* 17 Timer2 */
+ RESETID_TIMER3RST, /* 18 Timer3 */
+ RESETID_ADCPRST, /* 19 controller of 10 bit ADC Interface */
+ RESETID_ADCRST, /* 20 A/D converter of ADC Interface */
+ RESETID_PWMRST, /* 21 PWM */
+ RESETID_UARTRST, /* 22 UART/IrDA */
+ RESETID_I2C0RST, /* 23 I2C0 */
+ RESETID_I2C1RST, /* 24 I2C1 */
+ RESETID_I2SCFGRST, /* 25 I2S_Config */
+ RESETID_I2SNSOFRST, /* 26 NSOF counter of I2S_CONFIG */
+ RESETID_EDGEDETRST, /* 27 Edge_det */
+ RESETID_I2STXFF0RST, /* 28 I2STX_FIFO_0 */
+ RESETID_I2STXIF0RST, /* 29 I2STX_IF_0 */
+ RESETID_I2STXFF1RST, /* 30 I2STX_FIFO_1 */
+ RESETID_I2STXIF1RST, /* 31 I2STX_IF_1 */
+ RESETID_I2SRXFF0RST, /* 32 I2SRX_FIFO_0 */
+ RESETID_I2SRXIF0RST, /* 33 I2SRX_IF_0 */
+ RESETID_I2SRXFF1RST, /* 34 I2SRX_FIFO_1 */
+ RESETID_I2SRXIF1RST, /* 35 I2SRX_IF_1 */
+ RESETID_RESERVED40, /* 36 Reserved */
+ RESETID_RESERVED41, /* 37 Reserved */
+ RESETID_RESERVED42, /* 38 Reserved */
+ RESETID_RESERVED43, /* 39 Reserved */
+ RESETID_RESERVED44, /* 40 Reserved */
+ RESETID_LCDRST, /* 41 LCD Interface */
+ RESETID_SPIRSTAPB, /* 42 apb_clk domain of SPI */
+ RESETID_SPIRSTIP, /* 43 ip_clk domain of SPI */
+ RESETID_DMARST, /* 44 DMA */
+ RESETID_NANDECCRST, /* 45 Nandflash Controller ECC clock */
+ RESETID_NANDAESRST, /* 46 Nandflash Controller AES clock (reserved for lpc313x) */
+ RESETID_NANDCTRLRST, /* 47 Nandflash Controller */
+ RESETID_RNG, /* 48 RNG */
+ RESETID_SDMMCRST, /* 49 MCI (on AHB clock) */
+ RESETID_SDMMCRSTCKIN, /* 50 CI synchronous (on IP clock) */
+ RESETID_USBOTGAHBRST, /* 51 USB_OTG */
+ RESETID_REDCTLRST, /* 52 Redundancy Controller */
+ RESETID_AHBMPMCHRST, /* 53 MPMC */
+ RESETID_AHBMPMCRFRST, /* 54 refresh generator used for MPMC */
+ RESETID_INTCRST, /* 55 Interrupt Controller */
};
/************************************************************************