From f441280cf5a90cea3d34b78e097105d11341a27f Mon Sep 17 00:00:00 2001
From: patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>
Date: Tue, 29 Dec 2009 01:31:12 +0000
Subject: [PATCH] All framework for lpc313x boot initialization
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2453 42af7a65-404d-4744-a932-0658087f49c3
---
arch/arm/src/lpc313x/Make.defs | 5 +-
arch/arm/src/lpc313x/lpc313x_boot.c | 254 ++++++++++++++++++++++++
arch/arm/src/lpc313x/lpc313x_internal.h | 10 +
arch/arm/src/lpc313x/lpc313x_lowputc.c | 49 ++++-
4 files changed, 309 insertions(+), 9 deletions(-)
create mode 100755 arch/arm/src/lpc313x/lpc313x_boot.c
diff --git a/arch/arm/src/lpc313x/Make.defs b/arch/arm/src/lpc313x/Make.defs
index eea5dd3bbd..f8f16b09c9 100755
--- a/arch/arm/src/lpc313x/Make.defs
+++ b/arch/arm/src/lpc313x/Make.defs
@@ -50,5 +50,6 @@ CGU_CSRCS = lpc313x_clkdomain.c lpc313x_clkfreq.c lpc313x_esrndx.c \
lpc313x_fdcndx.c lpc313x_softreset.c
CHIP_ASRCS = $(CGU_ASRCS)
-CHIP_CSRCS = lpc313x_allocateheap.c lpc313x_irq.c lpc313x_lowputc.c \
- lpc313x_serial.c lpc313x_timerisr.c $(CGU_CSRCS)
+CHIP_CSRCS = lpc313x_allocateheap.c lpc313x_boot.c lpc313x_irq.c \
+ lpc313x_lowputc.c lpc313x_serial.c lpc313x_timerisr.c \
+ $(CGU_CSRCS)
diff --git a/arch/arm/src/lpc313x/lpc313x_boot.c b/arch/arm/src/lpc313x/lpc313x_boot.c
new file mode 100755
index 0000000000..7900791c46
--- /dev/null
+++ b/arch/arm/src/lpc313x/lpc313x_boot.c
@@ -0,0 +1,254 @@
+/************************************************************************************
+ * arch/arm/src/lpc313x/lpc313x_boot.c
+ *
+ * Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <stdint.h>
+
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "arm.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+struct section_mapping_s
+{
+ uint32_t physbase; /* Physical address of the region to be mapped */
+ uint32_t virtbase; /* Virtual address of the region to be mapped */
+ uint32_t mmuflags; /* MMU settings for the region (e.g., cache-able) */
+ uint32_t nsections; /* Number of mappings in the region */
+};
+
+/************************************************************************************
+ * Public Variables
+ ************************************************************************************/
+
+extern uint32_t _vector_start; /* Beginning of vector block */
+extern uint32_t _vector_end; /* End+1 of vector block */
+
+/************************************************************************************
+ * Private Variables
+ ************************************************************************************/
+
+#warning "All MMU logic commented out"
+#if 0 /* Not ready yet */
+static const struct section_mapping_s section_mapping[] =
+{
+ { DM320_PERIPHERALS_PSECTION, DM320_PERIPHERALS_VSECTION,
+ DM320_PERIPHERALS_MMUFLAGS, DM320_PERIPHERALS_NSECTIONS},
+ { DM320_FLASH_PSECTION, DM320_FLASH_VSECTION,
+ DM320_FLASH_MMUFLAGS, DM320_FLASH_NSECTIONS},
+ { DM320_CFI_PSECTION, DM320_CFI_VSECTION,
+ DM320_CFI_MMUFLAGS, DM320_CFI_NSECTIONS},
+ { DM320_SSFDC_PSECTION, DM320_SSFDC_VSECTION,
+ DM320_SSFDC_MMUFLAGS, DM320_SSFDC_NSECTIONS},
+ { DM320_CE1_PSECTION, DM320_CE1_VSECTION,
+ DM320_CE1_MMUFLAGS, DM320_CE1_NSECTIONS},
+ { DM320_CE2_PSECTION, DM320_CE2_VSECTION,
+ DM320_CE2_MMUFLAGS, DM320_CE2_NSECTIONS},
+ { DM320_VLYNQ_PSECTION, DM320_VLYNQ_VSECTION,
+ DM320_VLYNQ_MMUFLAGS, DM320_VLYNQ_NSECTIONS},
+ { DM320_USBOTG_PSECTION, DM320_USBOTG_VSECTION,
+ DM320_USBOTG_MMUFLAGS, DM320_USBOTG_NSECTIONS}
+};
+#define NMAPPINGS (sizeof(section_mapping) / sizeof(struct section_mapping_s))
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: up_setlevel1entry
+ ************************************************************************************/
+
+static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags)
+{
+ uint32_t *pgtable = (uint32_t*)PGTABLE_BASE_VADDR;
+ uint32_t index = vaddr >> 20;
+
+ /* Save the page table entry */
+
+ pgtable[index] = (paddr | mmuflags);
+}
+
+/************************************************************************************
+ * Name: up_setlevel2coarseentry
+ ************************************************************************************/
+
+static inline void up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t paddr,
+ uint32_t vaddr, uint32_t mmuflags)
+{
+ uint32_t *ctable = (uint32_t*)ctabvaddr;
+ uint32_t index;
+
+ /* The coarse table divides a 1Mb address space up into 256 entries, each
+ * corresponding to 4Kb of address space. The coarse page table index is
+ * related to the offset from the beginning of 1Mb region.
+ */
+
+ index = (vaddr & 0x000ff000) >> 12;
+
+ /* Save the coarse table entry */
+
+ ctable[index] = (paddr | mmuflags);
+}
+
+/************************************************************************************
+ * Name: up_setupmappings
+ ************************************************************************************/
+
+static void up_setupmappings(void)
+{
+ int i, j;
+
+ for (i = 0; i < NMAPPINGS; i++)
+ {
+ uint32_t sect_paddr = section_mapping[i].physbase;
+ uint32_t sect_vaddr = section_mapping[i].virtbase;
+ uint32_t mmuflags = section_mapping[i].mmuflags;
+
+ for (j = 0; j < section_mapping[i].nsections; j++)
+ {
+ up_setlevel1entry(sect_paddr, sect_vaddr, mmuflags);
+ sect_paddr += SECTION_SIZE;
+ sect_vaddr += SECTION_SIZE;
+ }
+ }
+}
+
+/************************************************************************************
+ * Name: up_vectormapping
+ ************************************************************************************/
+
+static void up_vectormapping(void)
+{
+ uint32_t vector_paddr = DM320_IRAM_PADDR;
+ uint32_t vector_vaddr = DM320_VECTOR_VADDR;
+ uint32_t end_paddr = vector_paddr + DM320_IRAM_SIZE;
+
+ /* We want to keep our interrupt vectors and interrupt-related logic in zero-wait
+ * state internal RAM (IRAM). The DM320 has 16Kb of IRAM positioned at physical
+ * address 0x0000:0000; we need to map this to 0xffff:0000.
+ */
+
+ while (vector_paddr < end_paddr)
+ {
+ up_setlevel2coarseentry(PGTABLE_COARSE_BASE_VADDR,
+ vector_paddr,
+ vector_vaddr,
+ MMU_L2_VECTORFLAGS);
+ vector_paddr += 4096;
+ vector_vaddr += 4096;
+ }
+
+ /* Now set the level 1 descriptor to refer to the level 2 coarse page table. */
+
+ up_setlevel1entry(PGTABLE_COARSE_BASE_PADDR,
+ DM320_VECTOR_VCOARSE,
+ MMU_L1_VECTORFLAGS);
+}
+
+/************************************************************************************
+ * Name: up_copyvectorblock
+ ************************************************************************************/
+
+static void up_copyvectorblock(void)
+{
+ uint32_t *src = (uint32_t*)&_vector_start;
+ uint32_t *end = (uint32_t*)&_vector_end;
+ uint32_t *dest = (uint32_t*)VECTOR_BASE;
+
+ while (src < end)
+ {
+ *dest++ = *src++;
+ }
+}
+#endif /* 0 */
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+void up_boot(void)
+{
+#warning "All MMU logic commented out"
+#if 0 /* Not ready yet */
+ /* __start provided the basic MMU mappings for SDRAM. Now provide mappings for all
+ * IO regions (Including the vector region).
+ */
+
+ up_setupmappings();
+
+ /* Provide a special mapping for the IRAM interrupt vector positioned in high
+ * memory.
+ */
+
+ up_vectormapping();
+
+ /* Setup up vector block. _vector_start and _vector_end are exported from
+ * up_vector.S
+ */
+
+ up_copyvectorblock();
+#endif /* 0 */
+
+ /* Perform chip common initialization (might do nothing) */
+
+ lpc313x_lowsetup();
+
+ /* Perform early serial initialization if we are going to use the serial driver */
+
+#ifdef CONFIG_USE_EARLYSERIALINIT
+ up_earlyserialinit();
+#endif
+
+ /* Perform board-specific initialization */
+
+#ifdef CONFIG_ARCH_LEDS
+ lpc313x_boardinitialize();
+#endif
+}
diff --git a/arch/arm/src/lpc313x/lpc313x_internal.h b/arch/arm/src/lpc313x/lpc313x_internal.h
index b53161d239..47d7ca82ae 100755
--- a/arch/arm/src/lpc313x/lpc313x_internal.h
+++ b/arch/arm/src/lpc313x/lpc313x_internal.h
@@ -83,6 +83,16 @@ extern "C" {
* Public Function Prototypes
************************************************************************************/
+/************************************************************************************
+ * Name: lpc313x_lowsetup
+ *
+ * Description:
+ * Called early in up_boot. Performs chip-common low level initialization.
+ *
+ ************************************************************************************/
+
+EXTERN void lpc313x_lowsetup(void);
+
/************************************************************************************
* Name: lpc313x_clockconfig
*
diff --git a/arch/arm/src/lpc313x/lpc313x_lowputc.c b/arch/arm/src/lpc313x/lpc313x_lowputc.c
index 9e0432baa0..93f9a37b72 100755
--- a/arch/arm/src/lpc313x/lpc313x_lowputc.c
+++ b/arch/arm/src/lpc313x/lpc313x_lowputc.c
@@ -55,6 +55,38 @@
* Definitions
****************************************************************************/
+/* Configuration ************************************************************/
+
+/* Is the UART enabled? */
+
+#ifdef CONFIG_LPC313X_UART
+# define HAVE_UART 1
+
+/* Is it a serial console? */
+
+# ifdef CONFIG_UART_SERIAL_CONSOLE
+# define HAVE_CONSOLE 1
+
+ /* Is initialization performed by up_earlyserialinit()? Or is UART
+ * initialization suppressed?
+ */
+
+# if defined(CONFIG_USE_EARLYSERIALINIT) || defined(CONFIG_SUPPRESS_LPC313X_UART_CONFIG)
+# undef NEED_LOWSETUP
+# else
+# define NEED_LOWSETUP 1
+# endif
+# else
+# undef HAVE_CONSOLE
+# undef NEED_LOWSETUP
+# endif
+
+#else
+# undef HAVE_UART
+# undef HAVE_CONSOLE
+# undef NEED_LOWSETUP
+#endif
+
/****************************************************************************
* Private Types
****************************************************************************/
@@ -71,6 +103,7 @@
* Name: up_waittxready
****************************************************************************/
+#ifdef HAVE_CONSOLE
static inline void up_waittxready(void)
{
int tmp;
@@ -89,12 +122,13 @@ static inline void up_waittxready(void)
}
}
}
+#endif
/****************************************************************************
* Name: up_configbaud
****************************************************************************/
-#ifndef CONFIG_USE_EARLYSERIALINIT
+#ifdef NEED_LOWSETUP
static inline void up_configbaud(void)
{
/* In a buckled-up, embedded system, there is no reason to constantly
@@ -228,22 +262,22 @@ static inline void up_configbaud(void)
LPC313X_UART_FDR);
#endif
}
+#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
- * Name: up_lowsetup
+ * Name: lpc313x_lowsetup
*
* Description:
- * Configure the UART baud, bits, parity, fifos, etc. This method is called
- * the first time that the serial port is opened.
+ * Called early in up_boot. Performs chip-common low level initialization.
*
****************************************************************************/
-void up_lowsetup(void)
+void lpc313x_lowsetup(void)
{
-#ifndef CONFIG_SUPPRESS_LPC313X_UART_CONFIG
+#ifdef NEED_LOWSETUP
uint32_t regval;
/* Enable UART system clock */
@@ -304,7 +338,6 @@ void up_lowsetup(void)
putreg32('\0', LPC313X_UART_THR);
#endif
}
-#endif
/****************************************************************************
* Public Functions
@@ -320,6 +353,8 @@ void up_lowsetup(void)
void up_lowputc(char ch)
{
+#ifdef HAVE_CONSOLE
up_waittxready();
putreg32((uint32_t)ch, LPC313X_UART_THR);
+#endif
}
--
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