diff --git a/HS_Pair_Test/simple/No_TOP_GND/README.txt b/HS_Pair_Test/simple/No_TOP_GND/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..ceb4dda15c763ada0a445014f21799e7598cac29
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+We only simulate the two top layer
\ No newline at end of file
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+    (model pin_array/pins_array_2x1.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (gr_line (start 126 111) (end 169 111) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 126 111) (end 126 100) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 169 100) (end 169 111) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 126 100) (end 169 100) (layer Edge.Cuts) (width 0.15))
+
+  (segment (start 165.857 106.27) (end 167 106.27) (width 0.15) (layer F.Cu) (net 2))
+  (segment (start 128 106.27) (end 129.105001 105.164999) (width 0.15) (layer F.Cu) (net 2))
+  (segment (start 129.105001 105.164999) (end 164.752 105.165) (width 0.15) (layer F.Cu) (net 2))
+  (segment (start 164.752 105.165) (end 165.857 106.27) (width 0.15) (layer F.Cu) (net 2))
+  (segment (start 164.752 104.835) (end 165.857 103.73) (width 0.15) (layer F.Cu) (net 3))
+  (segment (start 128 103.73) (end 129.105001 104.835001) (width 0.15) (layer F.Cu) (net 3))
+  (segment (start 129.105001 104.835001) (end 164.752 104.835) (width 0.15) (layer F.Cu) (net 3))
+  (segment (start 165.857 103.73) (end 167 103.73) (width 0.15) (layer F.Cu) (net 3))
+
+  (zone (net 1) (net_name GND) (layer B.Cu) (tstamp 0) (hatch edge 0.508)
+    (connect_pads yes (clearance 0.15))
+    (min_thickness 0.15)
+    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
+    (polygon
+      (pts
+        (xy 126 100) (xy 169 100) (xy 169 111) (xy 126 111)
+      )
+    )
+    (filled_polygon
+      (pts
+        (xy 168.7 110.7) (xy 126.3 110.7) (xy 126.3 106.475367) (xy 126.96282 106.475367) (xy 127.120362 106.856646)
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+        (xy 128.70459 105.508) (xy 128.58818 105.391387) (xy 128.207177 105.23318) (xy 127.794633 105.23282) (xy 127.413354 105.390362)
+        (xy 127.121387 105.68182) (xy 126.96318 106.062823) (xy 126.96282 106.475367) (xy 126.3 106.475367) (xy 126.3 102.968)
+        (xy 126.957613 102.968) (xy 126.957613 104.492) (xy 126.976788 104.593909) (xy 127.037016 104.687506) (xy 127.128914 104.750296)
+        (xy 127.238 104.772387) (xy 128.762 104.772387) (xy 128.863909 104.753212) (xy 128.957506 104.692984) (xy 129.020296 104.601086)
+        (xy 129.042387 104.492) (xy 129.042387 103.935367) (xy 165.96282 103.935367) (xy 166.120362 104.316646) (xy 166.41182 104.608613)
+        (xy 166.792823 104.76682) (xy 167.205367 104.76718) (xy 167.586646 104.609638) (xy 167.878613 104.31818) (xy 168.03682 103.937177)
+        (xy 168.03718 103.524633) (xy 167.879638 103.143354) (xy 167.58818 102.851387) (xy 167.207177 102.69318) (xy 166.794633 102.69282)
+        (xy 166.413354 102.850362) (xy 166.121387 103.14182) (xy 165.96318 103.522823) (xy 165.96282 103.935367) (xy 129.042387 103.935367)
+        (xy 129.042387 102.968) (xy 129.023212 102.866091) (xy 128.962984 102.772494) (xy 128.871086 102.709704) (xy 128.762 102.687613)
+        (xy 127.238 102.687613) (xy 127.136091 102.706788) (xy 127.042494 102.767016) (xy 126.979704 102.858914) (xy 126.957613 102.968)
+        (xy 126.3 102.968) (xy 126.3 100.3) (xy 168.7 100.3)
+      )
+    )
+  )
+)
diff --git a/HS_Pair_Test/simple/fp-lib-table b/HS_Pair_Test/simple/fp-lib-table
new file mode 100644
index 0000000000000000000000000000000000000000..1d1f737fb0c6af51be2f910b2d96b0d117350570
--- /dev/null
+++ b/HS_Pair_Test/simple/fp-lib-table
@@ -0,0 +1,3 @@
+(fp_lib_table
+  (lib (name Connectors_254mm)(type KiCad)(uri D:\projects\kicad-components\Pretty_Footprints\Connectors_254mm.pretty)(options "")(descr ""))
+)
diff --git a/HS_Pair_Test/simple/simple-cache.lib b/HS_Pair_Test/simple/simple-cache.lib
new file mode 100644
index 0000000000000000000000000000000000000000..fe3f9b4fbd5af66835d39bc62a67279c0f37ac3e
--- /dev/null
+++ b/HS_Pair_Test/simple/simple-cache.lib
@@ -0,0 +1,39 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# CONN_01X02
+#
+DEF CONN_01X02 P 0 40 Y N 1 F N
+F0 "P" 0 150 50 H V C CNN
+F1 "CONN_01X02" 100 0 50 V V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ Pin_Header_Straight_1X02
+ Pin_Header_Angled_1X02
+ Socket_Strip_Straight_1X02
+ Socket_Strip_Angled_1X02
+$ENDFPLIST
+DRAW
+S -50 -45 10 -55 0 1 0 N
+S -50 55 10 45 0 1 0 N
+S -50 100 50 -100 0 1 0 N
+X P1 1 -200 50 150 R 50 50 1 1 P
+X P2 2 -200 -50 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 6 0 1 0  0 0  0 -50  50 -50  0 -100  -50 -50  0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/HS_Pair_Test/simple/simple.bak b/HS_Pair_Test/simple/simple.bak
new file mode 100644
index 0000000000000000000000000000000000000000..0060abb395380c8e32c2647a68f76232d6a6c4dc
--- /dev/null
+++ b/HS_Pair_Test/simple/simple.bak
@@ -0,0 +1,104 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L CONN_01X02 P102
+U 1 1 55F09831
+P 8100 3150
+F 0 "P102" H 8100 3300 50  0000 C CNN
+F 1 "CONN_01X02" V 8200 3150 50  0000 C CNN
+F 2 "Connectors_254mm:pin_array_2x1" H 8100 3150 60  0001 C CNN
+F 3 "" H 8100 3150 60  0000 C CNN
+	1    8100 3150
+	1    0    0    -1  
+$EndComp
+$Comp
+L CONN_01X02 P101
+U 1 1 55F0991E
+P 5575 3150
+F 0 "P101" H 5575 3300 50  0000 C CNN
+F 1 "CONN_01X02" V 5675 3150 50  0000 C CNN
+F 2 "Connectors_254mm:pin_array_2x1" H 5575 3150 60  0001 C CNN
+F 3 "" H 5575 3150 60  0000 C CNN
+	1    5575 3150
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	5775 3100 7900 3100
+Wire Wire Line
+	5775 3200 7900 3200
+Text Notes 6475 3100 0    39   ~ 0
+HS_P
+Text Notes 6475 3200 0    39   ~ 0
+HS_N
+$Comp
+L GND #PWR101
+U 1 1 55F099F7
+P 6275 3650
+F 0 "#PWR101" H 6275 3400 50  0001 C CNN
+F 1 "GND" H 6275 3500 50  0000 C CNN
+F 2 "" H 6275 3650 60  0000 C CNN
+F 3 "" H 6275 3650 60  0000 C CNN
+	1    6275 3650
+	1    0    0    -1  
+$EndComp
+$Comp
+L CONN_01X02 P103
+U 1 1 55F09A1E
+P 6600 3525
+F 0 "P103" H 6600 3675 50  0000 C CNN
+F 1 "CONN_01X02" V 6700 3525 50  0000 C CNN
+F 2 "Connectors_254mm:pin_array_2x1" H 6600 3525 60  0001 C CNN
+F 3 "" H 6600 3525 60  0000 C CNN
+	1    6600 3525
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	6400 3475 6275 3475
+Wire Wire Line
+	6275 3475 6275 3650
+Wire Wire Line
+	6400 3575 6275 3575
+Connection ~ 6275 3575
+$EndSCHEMATC
diff --git a/HS_Pair_Test/simple/simple.kicad_pcb b/HS_Pair_Test/simple/simple.kicad_pcb
new file mode 100644
index 0000000000000000000000000000000000000000..ee6d50c8bfa9f89319b2a47749402b08bdf51b6d
--- /dev/null
+++ b/HS_Pair_Test/simple/simple.kicad_pcb
@@ -0,0 +1,234 @@
+(kicad_pcb (version 4) (host pcbnew "(2015-08-16 BZR 6097, Git b384c94)-product")
+
+  (general
+    (links 3)
+    (no_connects 2)
+    (area 125.924999 99.924999 169.075001 111.075001)
+    (thickness 1.6)
+    (drawings 4)
+    (tracks 8)
+    (zones 0)
+    (modules 3)
+    (nets 4)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
+    (trace_clearance 0.2)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (segment_width 0.2)
+    (edge_width 0.15)
+    (via_size 0.6)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.2)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x00000_80000001)
+      (usegerberextensions false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (hpglpenoverlay 2)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory No_TOP_GND))
+  )
+
+  (net 0 "")
+  (net 1 GND)
+  (net 2 /HS_P)
+  (net 3 /HS_N)
+
+  (net_class Default "Ceci est la Netclass par défaut"
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 0.6)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net /HS_N)
+    (add_net /HS_P)
+    (add_net GND)
+  )
+
+  (module Connectors_254mm:pin_array_2x1 (layer F.Cu) (tedit 54CE46FD) (tstamp 55F099EB)
+    (at 167 105 90)
+    (descr "Connecteurs 2 pins")
+    (tags "CONN DEV")
+    (path /55F0991E)
+    (fp_text reference P101 (at 0 2.55 90) (layer F.SilkS)
+      (effects (font (size 0.7 0.7) (thickness 0.152)))
+    )
+    (fp_text value CONN_01X02 (at 0 -1.905 90) (layer F.SilkS) hide
+      (effects (font (size 0.762 0.762) (thickness 0.1524)))
+    )
+    (fp_line (start -2.54 1.27) (end -2.54 -1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -2.54 -1.27) (end 2.54 -1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 2.54 -1.27) (end 2.54 1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 2.54 1.27) (end -2.54 1.27) (layer F.SilkS) (width 0.1524))
+    (pad 1 thru_hole rect (at -1.27 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 2 /HS_P))
+    (pad 2 thru_hole circle (at 1.27 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 3 /HS_N))
+    (model pin_array/pins_array_2x1.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Connectors_254mm:pin_array_2x1 (layer F.Cu) (tedit 54CE46FD) (tstamp 55F099F5)
+    (at 128 105 270)
+    (descr "Connecteurs 2 pins")
+    (tags "CONN DEV")
+    (path /55F09831)
+    (fp_text reference P102 (at 0 2.55 270) (layer F.SilkS)
+      (effects (font (size 0.7 0.7) (thickness 0.152)))
+    )
+    (fp_text value CONN_01X02 (at 0 -1.905 270) (layer F.SilkS) hide
+      (effects (font (size 0.762 0.762) (thickness 0.1524)))
+    )
+    (fp_line (start -2.54 1.27) (end -2.54 -1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -2.54 -1.27) (end 2.54 -1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 2.54 -1.27) (end 2.54 1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 2.54 1.27) (end -2.54 1.27) (layer F.SilkS) (width 0.1524))
+    (pad 1 thru_hole rect (at -1.27 0 270) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 3 /HS_N))
+    (pad 2 thru_hole circle (at 1.27 0 270) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 2 /HS_P))
+    (model pin_array/pins_array_2x1.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Connectors_254mm:pin_array_2x1 (layer F.Cu) (tedit 54CE46FD) (tstamp 55F09A95)
+    (at 147 109)
+    (descr "Connecteurs 2 pins")
+    (tags "CONN DEV")
+    (path /55F09A1E)
+    (fp_text reference P103 (at 0 2.55) (layer F.SilkS)
+      (effects (font (size 0.7 0.7) (thickness 0.152)))
+    )
+    (fp_text value CONN_01X02 (at 0 -1.905) (layer F.SilkS) hide
+      (effects (font (size 0.762 0.762) (thickness 0.1524)))
+    )
+    (fp_line (start -2.54 1.27) (end -2.54 -1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -2.54 -1.27) (end 2.54 -1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 2.54 -1.27) (end 2.54 1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 2.54 1.27) (end -2.54 1.27) (layer F.SilkS) (width 0.1524))
+    (pad 1 thru_hole rect (at -1.27 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 1 GND))
+    (pad 2 thru_hole circle (at 1.27 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 1 GND))
+    (model pin_array/pins_array_2x1.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (gr_line (start 126 111) (end 169 111) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 126 111) (end 126 100) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 169 100) (end 169 111) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 126 100) (end 169 100) (layer Edge.Cuts) (width 0.15))
+
+  (segment (start 165.857 106.27) (end 167 106.27) (width 0.15) (layer F.Cu) (net 2))
+  (segment (start 128 106.27) (end 129.105001 105.164999) (width 0.15) (layer F.Cu) (net 2))
+  (segment (start 129.105001 105.164999) (end 164.752 105.165) (width 0.15) (layer F.Cu) (net 2))
+  (segment (start 164.752 105.165) (end 165.857 106.27) (width 0.15) (layer F.Cu) (net 2))
+  (segment (start 164.752 104.835) (end 165.857 103.73) (width 0.15) (layer F.Cu) (net 3))
+  (segment (start 128 103.73) (end 129.105001 104.835001) (width 0.15) (layer F.Cu) (net 3))
+  (segment (start 129.105001 104.835001) (end 164.752 104.835) (width 0.15) (layer F.Cu) (net 3))
+  (segment (start 165.857 103.73) (end 167 103.73) (width 0.15) (layer F.Cu) (net 3))
+
+  (zone (net 1) (net_name GND) (layer B.Cu) (tstamp 0) (hatch edge 0.508)
+    (connect_pads yes (clearance 0.15))
+    (min_thickness 0.15)
+    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
+    (polygon
+      (pts
+        (xy 126 100) (xy 169 100) (xy 169 111) (xy 126 111)
+      )
+    )
+    (filled_polygon
+      (pts
+        (xy 168.7 110.7) (xy 126.3 110.7) (xy 126.3 106.475367) (xy 126.96282 106.475367) (xy 127.120362 106.856646)
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+        (xy 166.792823 104.76682) (xy 167.205367 104.76718) (xy 167.586646 104.609638) (xy 167.878613 104.31818) (xy 168.03682 103.937177)
+        (xy 168.03718 103.524633) (xy 167.879638 103.143354) (xy 167.58818 102.851387) (xy 167.207177 102.69318) (xy 166.794633 102.69282)
+        (xy 166.413354 102.850362) (xy 166.121387 103.14182) (xy 165.96318 103.522823) (xy 165.96282 103.935367) (xy 129.042387 103.935367)
+        (xy 129.042387 102.968) (xy 129.023212 102.866091) (xy 128.962984 102.772494) (xy 128.871086 102.709704) (xy 128.762 102.687613)
+        (xy 127.238 102.687613) (xy 127.136091 102.706788) (xy 127.042494 102.767016) (xy 126.979704 102.858914) (xy 126.957613 102.968)
+        (xy 126.3 102.968) (xy 126.3 100.3) (xy 168.7 100.3)
+      )
+    )
+  )
+)
diff --git a/HS_Pair_Test/simple/simple.kicad_pcb-bak b/HS_Pair_Test/simple/simple.kicad_pcb-bak
new file mode 100644
index 0000000000000000000000000000000000000000..fb7297fd009be70ddf8a5e100858a12b7820abc7
--- /dev/null
+++ b/HS_Pair_Test/simple/simple.kicad_pcb-bak
@@ -0,0 +1,234 @@
+(kicad_pcb (version 4) (host pcbnew "(2015-08-16 BZR 6097, Git b384c94)-product")
+
+  (general
+    (links 3)
+    (no_connects 2)
+    (area 125.924999 99.924999 169.075001 111.075001)
+    (thickness 1.6)
+    (drawings 4)
+    (tracks 8)
+    (zones 0)
+    (modules 3)
+    (nets 4)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
+    (trace_clearance 0.2)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (segment_width 0.2)
+    (edge_width 0.15)
+    (via_size 0.6)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.2)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x00030_80000001)
+      (usegerberextensions false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (hpglpenoverlay 2)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+  (net 1 GND)
+  (net 2 /HS_P)
+  (net 3 /HS_N)
+
+  (net_class Default "Ceci est la Netclass par défaut"
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 0.6)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net /HS_N)
+    (add_net /HS_P)
+    (add_net GND)
+  )
+
+  (module Connectors_254mm:pin_array_2x1 (layer F.Cu) (tedit 54CE46FD) (tstamp 55F099EB)
+    (at 167 105 90)
+    (descr "Connecteurs 2 pins")
+    (tags "CONN DEV")
+    (path /55F0991E)
+    (fp_text reference P101 (at 0 2.55 90) (layer F.SilkS)
+      (effects (font (size 0.7 0.7) (thickness 0.152)))
+    )
+    (fp_text value CONN_01X02 (at 0 -1.905 90) (layer F.SilkS) hide
+      (effects (font (size 0.762 0.762) (thickness 0.1524)))
+    )
+    (fp_line (start -2.54 1.27) (end -2.54 -1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -2.54 -1.27) (end 2.54 -1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 2.54 -1.27) (end 2.54 1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 2.54 1.27) (end -2.54 1.27) (layer F.SilkS) (width 0.1524))
+    (pad 1 thru_hole rect (at -1.27 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 2 /HS_P))
+    (pad 2 thru_hole circle (at 1.27 0 90) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 3 /HS_N))
+    (model pin_array/pins_array_2x1.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Connectors_254mm:pin_array_2x1 (layer F.Cu) (tedit 54CE46FD) (tstamp 55F099F5)
+    (at 128 105 270)
+    (descr "Connecteurs 2 pins")
+    (tags "CONN DEV")
+    (path /55F09831)
+    (fp_text reference P102 (at 0 2.55 270) (layer F.SilkS)
+      (effects (font (size 0.7 0.7) (thickness 0.152)))
+    )
+    (fp_text value CONN_01X02 (at 0 -1.905 270) (layer F.SilkS) hide
+      (effects (font (size 0.762 0.762) (thickness 0.1524)))
+    )
+    (fp_line (start -2.54 1.27) (end -2.54 -1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -2.54 -1.27) (end 2.54 -1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 2.54 -1.27) (end 2.54 1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 2.54 1.27) (end -2.54 1.27) (layer F.SilkS) (width 0.1524))
+    (pad 1 thru_hole rect (at -1.27 0 270) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 3 /HS_N))
+    (pad 2 thru_hole circle (at 1.27 0 270) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 2 /HS_P))
+    (model pin_array/pins_array_2x1.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Connectors_254mm:pin_array_2x1 (layer F.Cu) (tedit 54CE46FD) (tstamp 55F09A95)
+    (at 147 109)
+    (descr "Connecteurs 2 pins")
+    (tags "CONN DEV")
+    (path /55F09A1E)
+    (fp_text reference P103 (at 0 2.55) (layer F.SilkS)
+      (effects (font (size 0.7 0.7) (thickness 0.152)))
+    )
+    (fp_text value CONN_01X02 (at 0 -1.905) (layer F.SilkS) hide
+      (effects (font (size 0.762 0.762) (thickness 0.1524)))
+    )
+    (fp_line (start -2.54 1.27) (end -2.54 -1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -2.54 -1.27) (end 2.54 -1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 2.54 -1.27) (end 2.54 1.27) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 2.54 1.27) (end -2.54 1.27) (layer F.SilkS) (width 0.1524))
+    (pad 1 thru_hole rect (at -1.27 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 1 GND))
+    (pad 2 thru_hole circle (at 1.27 0) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+      (net 1 GND))
+    (model pin_array/pins_array_2x1.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (gr_line (start 126 111) (end 169 111) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 126 111) (end 126 100) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 169 100) (end 169 111) (layer Edge.Cuts) (width 0.15))
+  (gr_line (start 126 100) (end 169 100) (layer Edge.Cuts) (width 0.15))
+
+  (segment (start 165.857 106.27) (end 167 106.27) (width 0.15) (layer F.Cu) (net 2))
+  (segment (start 128 106.27) (end 129.105001 105.164999) (width 0.15) (layer F.Cu) (net 2))
+  (segment (start 129.105001 105.164999) (end 164.752 105.165) (width 0.15) (layer F.Cu) (net 2))
+  (segment (start 164.752 105.165) (end 165.857 106.27) (width 0.15) (layer F.Cu) (net 2))
+  (segment (start 164.752 104.835) (end 165.857 103.73) (width 0.15) (layer F.Cu) (net 3))
+  (segment (start 128 103.73) (end 129.105001 104.835001) (width 0.15) (layer F.Cu) (net 3))
+  (segment (start 129.105001 104.835001) (end 164.752 104.835) (width 0.15) (layer F.Cu) (net 3))
+  (segment (start 165.857 103.73) (end 167 103.73) (width 0.15) (layer F.Cu) (net 3))
+
+  (zone (net 1) (net_name GND) (layer B.Cu) (tstamp 0) (hatch edge 0.508)
+    (connect_pads yes (clearance 0.15))
+    (min_thickness 0.15)
+    (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508))
+    (polygon
+      (pts
+        (xy 126 100) (xy 169 100) (xy 169 111) (xy 126 111)
+      )
+    )
+    (filled_polygon
+      (pts
+        (xy 168.7 110.7) (xy 126.3 110.7) (xy 126.3 106.475367) (xy 126.96282 106.475367) (xy 127.120362 106.856646)
+        (xy 127.41182 107.148613) (xy 127.792823 107.30682) (xy 128.205367 107.30718) (xy 128.586646 107.149638) (xy 128.878613 106.85818)
+        (xy 129.03682 106.477177) (xy 129.03718 106.064633) (xy 128.879638 105.683354) (xy 128.70459 105.508) (xy 165.957613 105.508)
+        (xy 165.957613 107.032) (xy 165.976788 107.133909) (xy 166.037016 107.227506) (xy 166.128914 107.290296) (xy 166.238 107.312387)
+        (xy 167.762 107.312387) (xy 167.863909 107.293212) (xy 167.957506 107.232984) (xy 168.020296 107.141086) (xy 168.042387 107.032)
+        (xy 168.042387 105.508) (xy 168.023212 105.406091) (xy 167.962984 105.312494) (xy 167.871086 105.249704) (xy 167.762 105.227613)
+        (xy 166.238 105.227613) (xy 166.136091 105.246788) (xy 166.042494 105.307016) (xy 165.979704 105.398914) (xy 165.957613 105.508)
+        (xy 128.70459 105.508) (xy 128.58818 105.391387) (xy 128.207177 105.23318) (xy 127.794633 105.23282) (xy 127.413354 105.390362)
+        (xy 127.121387 105.68182) (xy 126.96318 106.062823) (xy 126.96282 106.475367) (xy 126.3 106.475367) (xy 126.3 102.968)
+        (xy 126.957613 102.968) (xy 126.957613 104.492) (xy 126.976788 104.593909) (xy 127.037016 104.687506) (xy 127.128914 104.750296)
+        (xy 127.238 104.772387) (xy 128.762 104.772387) (xy 128.863909 104.753212) (xy 128.957506 104.692984) (xy 129.020296 104.601086)
+        (xy 129.042387 104.492) (xy 129.042387 103.935367) (xy 165.96282 103.935367) (xy 166.120362 104.316646) (xy 166.41182 104.608613)
+        (xy 166.792823 104.76682) (xy 167.205367 104.76718) (xy 167.586646 104.609638) (xy 167.878613 104.31818) (xy 168.03682 103.937177)
+        (xy 168.03718 103.524633) (xy 167.879638 103.143354) (xy 167.58818 102.851387) (xy 167.207177 102.69318) (xy 166.794633 102.69282)
+        (xy 166.413354 102.850362) (xy 166.121387 103.14182) (xy 165.96318 103.522823) (xy 165.96282 103.935367) (xy 129.042387 103.935367)
+        (xy 129.042387 102.968) (xy 129.023212 102.866091) (xy 128.962984 102.772494) (xy 128.871086 102.709704) (xy 128.762 102.687613)
+        (xy 127.238 102.687613) (xy 127.136091 102.706788) (xy 127.042494 102.767016) (xy 126.979704 102.858914) (xy 126.957613 102.968)
+        (xy 126.3 102.968) (xy 126.3 100.3) (xy 168.7 100.3)
+      )
+    )
+  )
+)
diff --git a/HS_Pair_Test/simple/simple.net b/HS_Pair_Test/simple/simple.net
new file mode 100644
index 0000000000000000000000000000000000000000..e1ca812243785a290a06acf5c4517dd33f21f66c
--- /dev/null
+++ b/HS_Pair_Test/simple/simple.net
@@ -0,0 +1,61 @@
+(export (version D)
+  (design
+    (source D:/projects/ElecSnip/HS_Pair_Test/simple/simple.sch)
+    (date "09/09/2015 22:46:28")
+    (tool "Eeschema (2015-08-16 BZR 6097, Git b384c94)-product")
+    (sheet (number 1) (name /) (tstamps /)
+      (title_block
+        (title)
+        (company)
+        (rev)
+        (date)
+        (source simple.sch)
+        (comment (number 1) (value ""))
+        (comment (number 2) (value ""))
+        (comment (number 3) (value ""))
+        (comment (number 4) (value "")))))
+  (components
+    (comp (ref P102)
+      (value CONN_01X02)
+      (footprint Connectors_254mm:pin_array_2x1)
+      (libsource (lib conn) (part CONN_01X02))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 55F09831))
+    (comp (ref P101)
+      (value CONN_01X02)
+      (footprint Connectors_254mm:pin_array_2x1)
+      (libsource (lib conn) (part CONN_01X02))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 55F0991E))
+    (comp (ref P103)
+      (value CONN_01X02)
+      (footprint Connectors_254mm:pin_array_2x1)
+      (libsource (lib conn) (part CONN_01X02))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 55F09A1E)))
+  (libparts
+    (libpart (lib conn) (part CONN_01X02)
+      (footprints
+        (fp Pin_Header_Straight_1X02)
+        (fp Pin_Header_Angled_1X02)
+        (fp Socket_Strip_Straight_1X02)
+        (fp Socket_Strip_Angled_1X02))
+      (fields
+        (field (name Reference) P)
+        (field (name Value) CONN_01X02))
+      (pins
+        (pin (num 1) (name P1) (type passive))
+        (pin (num 2) (name P2) (type passive)))))
+  (libraries
+    (library (logical conn)
+      (uri "C:\\Program Files\\KiCad\\share\\kicad\\library\\conn.lib")))
+  (nets
+    (net (code 1) (name GND)
+      (node (ref P103) (pin 1))
+      (node (ref P103) (pin 2)))
+    (net (code 2) (name /HS_N)
+      (node (ref P102) (pin 1))
+      (node (ref P101) (pin 2)))
+    (net (code 3) (name /HS_P)
+      (node (ref P102) (pin 2))
+      (node (ref P101) (pin 1)))))
\ No newline at end of file
diff --git a/HS_Pair_Test/simple/simple.pro b/HS_Pair_Test/simple/simple.pro
new file mode 100644
index 0000000000000000000000000000000000000000..49945bfc3cda94c372784c53d13828db4167e894
--- /dev/null
+++ b/HS_Pair_Test/simple/simple.pro
@@ -0,0 +1,60 @@
+update=09/09/2015 22:35:40
+version=1
+last_client=kicad
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=microcontrollers
+LibName13=dsp
+LibName14=microchip
+LibName15=analog_switches
+LibName16=motorola
+LibName17=texas
+LibName18=intel
+LibName19=audio
+LibName20=interface
+LibName21=digital-audio
+LibName22=philips
+LibName23=display
+LibName24=cypress
+LibName25=siliconi
+LibName26=opto
+LibName27=atmel
+LibName28=contrib
+LibName29=valves
+[general]
+version=1
diff --git a/HS_Pair_Test/simple/simple.sch b/HS_Pair_Test/simple/simple.sch
new file mode 100644
index 0000000000000000000000000000000000000000..2dd67b04dcd922968a2182b1ba15f3b47354f59f
--- /dev/null
+++ b/HS_Pair_Test/simple/simple.sch
@@ -0,0 +1,104 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L CONN_01X02 P102
+U 1 1 55F09831
+P 8100 3150
+F 0 "P102" H 8100 3300 50  0000 C CNN
+F 1 "CONN_01X02" V 8200 3150 50  0000 C CNN
+F 2 "Connectors_254mm:pin_array_2x1" H 8100 3150 60  0001 C CNN
+F 3 "" H 8100 3150 60  0000 C CNN
+	1    8100 3150
+	1    0    0    -1  
+$EndComp
+$Comp
+L CONN_01X02 P101
+U 1 1 55F0991E
+P 5575 3150
+F 0 "P101" H 5575 3300 50  0000 C CNN
+F 1 "CONN_01X02" V 5675 3150 50  0000 C CNN
+F 2 "Connectors_254mm:pin_array_2x1" H 5575 3150 60  0001 C CNN
+F 3 "" H 5575 3150 60  0000 C CNN
+	1    5575 3150
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	5775 3100 7900 3100
+Wire Wire Line
+	5775 3200 7900 3200
+$Comp
+L GND #PWR01
+U 1 1 55F099F7
+P 6275 3650
+F 0 "#PWR01" H 6275 3400 50  0001 C CNN
+F 1 "GND" H 6275 3500 50  0000 C CNN
+F 2 "" H 6275 3650 60  0000 C CNN
+F 3 "" H 6275 3650 60  0000 C CNN
+	1    6275 3650
+	1    0    0    -1  
+$EndComp
+$Comp
+L CONN_01X02 P103
+U 1 1 55F09A1E
+P 6600 3525
+F 0 "P103" H 6600 3675 50  0000 C CNN
+F 1 "CONN_01X02" V 6700 3525 50  0000 C CNN
+F 2 "Connectors_254mm:pin_array_2x1" H 6600 3525 60  0001 C CNN
+F 3 "" H 6600 3525 60  0000 C CNN
+	1    6600 3525
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	6400 3475 6275 3475
+Wire Wire Line
+	6275 3475 6275 3650
+Wire Wire Line
+	6400 3575 6275 3575
+Connection ~ 6275 3575
+Text Label 6600 3100 0    39   ~ 0
+HS_N
+Text Label 6600 3200 0    39   ~ 0
+HS_P
+$EndSCHEMATC