From 99e1d183b44927e66f582b2c8e06e18b2f7ff7e6 Mon Sep 17 00:00:00 2001
From: Nicolas Pouillon <nipo@ssji.net>
Date: Sat, 12 Nov 2016 23:21:38 +0100
Subject: [PATCH] software/library: Update brain board

---
 software/library/boards/board.build |  3 ++-
 software/library/boards/brain.c     | 28 ++++++++++++++++++++++++++++
 2 files changed, 30 insertions(+), 1 deletion(-)

diff --git a/software/library/boards/board.build b/software/library/boards/board.build
index 3e098a5..fa9e079 100644
--- a/software/library/boards/board.build
+++ b/software/library/boards/board.build
@@ -3,10 +3,11 @@
 
   CONFIG_BMAAA
   CONFIG_BMAAA_BOARD brain
+  CONFIG_DRIVER_STM32_GPIO_F1_ICU
 
   %subsection ethernet
     CONFIG_DRIVER_NET_DWC10100
-    CONFIG_DRIVER_NET_DWC10100_MDIO_MEM
+    CONFIG_DRIVER_NET_DWC10100_SMI_MEM
     CONFIG_NET_ETHERNET
   %end
 
diff --git a/software/library/boards/brain.c b/software/library/boards/brain.c
index 46223e2..ec0389f 100644
--- a/software/library/boards/brain.c
+++ b/software/library/boards/brain.c
@@ -86,15 +86,43 @@ DEV_DECLARE_STATIC(dwc10100_dev, "eth0", 0, dwc10100_drv,
 
     DEV_STATIC_RES_FREQ(72000000, 1),
 
+    DEV_STATIC_RES_DEV_TIMER("rtc* timer*"),
+                   
     DEV_STATIC_RES_DEV_IOMUX("/gpio"),
     DEV_STATIC_RES_IOMUX("mdc", 0, STM32_PC1, 0, 0),
     DEV_STATIC_RES_IOMUX("mdio", 0, STM32_PA2, 0, 0),
 
+    DEV_STATIC_RES_IOMUX("tx_clk", 0, STM32_PC3, 0, 0),
+    DEV_STATIC_RES_IOMUX("tx_en", 0, STM32_PB11, 0, 0),
+    DEV_STATIC_RES_IOMUX("tx_d0", 0, STM32_PB12, 0, 0),
+    DEV_STATIC_RES_IOMUX("tx_d1", 0, STM32_PB13, 0, 0),
+    DEV_STATIC_RES_IOMUX("tx_d2", 0, STM32_PC2, 0, 0),
+    DEV_STATIC_RES_IOMUX("tx_d3", 0, STM32_PB8, 0, 0),
+
+    DEV_STATIC_RES_IOMUX("rx_clk", 0, STM32_PA1, 0, 0),
+    DEV_STATIC_RES_IOMUX("rx_err", 0, STM32_PB10, 0, 0),
+    DEV_STATIC_RES_IOMUX("rx_d0", 0, STM32_PC4, 0, 0),
+    DEV_STATIC_RES_IOMUX("rx_d1", 0, STM32_PC5, 0, 0),
+    DEV_STATIC_RES_IOMUX("rx_d2", 0, STM32_PB0, 0, 0),
+    DEV_STATIC_RES_IOMUX("rx_d3", 0, STM32_PB1, 0, 0),
+    DEV_STATIC_RES_IOMUX("rx_dv", 0, STM32_PA7, 0, 0),
+
+    DEV_STATIC_RES_IOMUX("col", 0, STM32_PA3, 0, 0),
+    DEV_STATIC_RES_IOMUX("crs", 0, STM32_PA0, 0, 0),
+
+    //DEV_STATIC_RES_IOMUX("nirq", 0, STM32_PC8, 0, 0),
+    //DEV_STATIC_RES_IOMUX("resetn", 0, STM32_PC7, 0, 0),
+
     DEV_STATIC_RES_DEV_PARAM("gpio", "/gpio"),
     DEV_STATIC_RES_GPIO("resetn", STM32_PC7, 1),
 
     DEV_STATIC_RES_DEV_ICU("/cpu"),
     DEV_STATIC_RES_IRQ(0, STM32_IRQ_ETH, DEV_IRQ_SENSE_HIGH_LEVEL, 0, 0x1),
+
+    DEV_STATIC_RES_DEV_ICU("/gpio"),
+    DEV_STATIC_RES_IRQ(1, STM32_PC8, DEV_IRQ_SENSE_FALLING_EDGE, 0, 1),
+
+    DEV_STATIC_RES_BLOB_PARAM("hwaddr", ((const uint8_t[]){0x02,0x00,0x00,0x12,0x23,0x23})),
 );
 #endif
 
-- 
GitLab