diff --git a/software/tests/brain_eth/Makefile b/software/tests/brain_eth/Makefile
new file mode 100644
index 0000000000000000000000000000000000000000..85ec727e684a50f365c99e14c1fe9070ffefc40a
--- /dev/null
+++ b/software/tests/brain_eth/Makefile
@@ -0,0 +1 @@
+objs += main.o
diff --git a/software/tests/brain_eth/config b/software/tests/brain_eth/config
new file mode 100644
index 0000000000000000000000000000000000000000..76115490c76378986764b97851214f32e7ecc3f9
--- /dev/null
+++ b/software/tests/brain_eth/config
@@ -0,0 +1,11 @@
+%set OUTPUT_NAME brain_eth
+%append MODULES $(OUTPUT_NAME):$(CONFIGPATH)
+
+CONFIG_LICENSE_APP_BSD
+
+%inherit shell
+%inherit bmaaa-brain
+%inherit ethernet
+%include bmaaa.build
+
+CONFIG_APP_START
\ No newline at end of file
diff --git a/software/tests/brain_eth/main.c b/software/tests/brain_eth/main.c
new file mode 100644
index 0000000000000000000000000000000000000000..743fd381c317b9957326468ce1585783b93fea31
--- /dev/null
+++ b/software/tests/brain_eth/main.c
@@ -0,0 +1,60 @@
+#include <hexo/iospace.h>
+
+#include <mutek/startup.h>
+#include <mutek/thread.h>
+#include <mutek/printk.h>
+
+#include <drivers/net/dwc10100/dwc10100_mac.h>
+#include <arch/stm32/mmap.h>
+
+static uint16_t smi_read(uint_fast8_t phy,
+                              uint_fast8_t reg)
+{
+  uint16_t val;
+  
+  cpu_mem_write_32(STM32_ETHERNET_MAC_ADDR + DWC_MAC_MIIAR_ADDR, 0
+                   | DWC_MAC_MIIAR_PA(phy)
+                   | DWC_MAC_MIIAR_MR(reg)
+                   | DWC_MAC_MIIAR_MB);
+
+  while (cpu_mem_read_32(STM32_ETHERNET_MAC_ADDR + DWC_MAC_MIIAR_ADDR) & DWC_MAC_MIIAR_MB)
+    ;
+
+  val = cpu_mem_read_32(STM32_ETHERNET_MAC_ADDR + DWC_MAC_MIIDR_ADDR);
+
+  return val;
+}
+
+static void smi_write(uint_fast8_t phy,
+                           uint_fast8_t reg,
+                           uint16_t value)
+{
+  cpu_mem_write_32(STM32_ETHERNET_MAC_ADDR + DWC_MAC_MIIDR_ADDR, value);
+  cpu_mem_write_32(STM32_ETHERNET_MAC_ADDR + DWC_MAC_MIIAR_ADDR, 0
+                   | DWC_MAC_MIIAR_PA(phy)
+                   | DWC_MAC_MIIAR_MR(reg)
+                   | DWC_MAC_MIIAR_MW
+                   | DWC_MAC_MIIAR_MB);
+
+  while (cpu_mem_read_32(STM32_ETHERNET_MAC_ADDR + DWC_MAC_MIIAR_ADDR) & DWC_MAC_MIIAR_MB)
+    ;
+}
+
+static CONTEXT_ENTRY(main)
+{
+    for (uint32_t phy = 0; phy < 32; ++phy) {
+        for (uint32_t reg = 0; reg < 8; ++reg) {
+            printk(" %d: %04x", reg, smi_read(phy, reg));
+        }
+        printk("\n");
+    }
+}
+
+void app_start(void)
+{
+  struct thread_attr_s attr = {
+    .stack_size = 2048,
+  };
+
+  thread_create(main, 0, &attr);
+}