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* arch/arm/src/lpc43xx/lpc43_rgu.c: The soft reset logic called from the
beginning of __start seems cause problems. A magic delay seems to improve
the logic some. But I suspect that real fix is to get rid of all of the
soft reset logic. This would also be a critical bugfix if I believed
that it really fixed all of the issues.
* arch/arm/src/lpc43xx/chip/lpc43_cgu.h: Fix a bit mask in the PLL1
control register. Critical bugfix.
* arch/arm/src/lpc43xx/lpc43_clockconfig.c and configs/lpc4330-xplorer/include/board.h:
Implement PLL1 ramp-up logic; Now the LPC43xx is running at 204MHz.
* configs/lpc4330-xplorer/*/defconfig: Re-calibrated delay loops using
the 204MHz clock. The LPC43xx ripping rips! This calibration was performed
with symbols enabled and all optimization disabled. It will need to be
better recalibrated again down the road.
* arch/arm/src/stm32/stm32_exti.c: Renamed to rch/arm/src/stm32/stm32_exti_gpio.c
to make a little room in the file name space.
* arch/arm/src/stm32/stm32_exti_alarm.c: Add initial logic to attached the
RTC alarm EXTI interrupt. This is work be performed mostly by Diego Sanchez.
* arch/arm/src/lpc43xx/lpc43_spifi.c, lpc43_spifi.h, and chip/lpc43_spifi.h: Add
logic to configure and initialize the SPIFI device (does not yet work).
* configs/lpc4330-xplorer/include/board.h: Reduce SPI SCLK value.
* arch/arm/src/lpc43xx/lpc43_spifi.c, lpc43_spifi.h, and chip/lpc43_spifi.h:
Logic completely redesigned. It now creates an MTD driver to access SPIFI...
but the driver still does not work.
patacongo
committed
* arch/arm/src/stm32 and arch/arm/include/stm32: Make name of RTC ALARM interrupt
common on STM32 F1,2,4
* arch/arm/src/stm32 and arch/arm/include/stm32: Add add support for the
STM32F100x "Value Line" devices. This includes changes to stm32F10xx_rcc.c that
add the ability to run the chip off the internal oscillator. There is no open
board configuration for this part yet (the STM32VLDiscovery would be a candidate).
Contributed by Mike Smith.