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happens, it always looked like there were not open files and a crash
could ensue (2015-03-14).
* fs/fat/fs_fat32.c and fs_fat32.h: Add support for umount2(target,
MNT_FORCE) in the FAT file system (2015-03-15).
* drivers/mmcsd/mmcsd_sdio.c: Fix some bad logic when file system debug
is turned on: Arguments to syslog were missing so that garbage was
being printed (2015-03-15).
* arch/arm/src/sama5/sam_hsmci.c: Fix a bug in SAMA5 HSMCI. The
bitfield mask and shift values were reversed resulting in a trashed
value for the number of blocks in the BLOCKR register. This was
sufficient to prevent DMA writes from working (2015-03-15).
* drivers/mtd/at24xx.c, Kconfig, and include/nuttx/fs/ioctl.h: Add
support for (1) the byte-oriented read() method, (2) devices that
have extended memory regions, and (3) devices that use 8-bit
addressing (2015-03-17).
* arch/mips/src/mips32/Kconfig, Toolchain.defs, and
configs/pic32mz-starterkit/nsh/Make.defs: Changes that will permit
building of the PIC32MZ Start Kit configuration using MPLAB and the
XC32 toolchain. From David Sidrane (2015-03-17).
* arch/arm/src/stm32/stm32_rtc_lowerhalf.c: Fix some errors in the
STM32 RTC lower-half driver that cause compilation failures. From
shilo.xyz (2015-03-19).
* arch/arm/src/sama5/chip/sam_tc.h: Fix typos in timer/counter header
file. From Bob Doiron (2015-03-20).
* configs/olimexino-stm32: Board support for the Olimexino STM32 board
from David Sidrane (2015-03-20).
* PIC32MZ: Incorporated a set of patches that makes the basic NSH
configuration on the PIC32MZ Starter Kit. From Kristopher Tate
(2015-03-22).
* arch/arm/src/tiva: (1) ADC driver has been re-organized; configuration
is now handled in code instead of Kconfig to help reduce bloat and
confusion. (2) Timer changed to remove ADC coupling in Kconfig to code
and moved configuration up from arch/arm/src/tiva to
configs/tm4c123g-launchpad/src. (3) GPIO driver needed small fixes in
the configuration routines and discovered false-positive bugs in
interrupt testing: interrupts are now verified to actually be working
reliably. (4) Attempt to apply some consistency in the tiva arch/
level's interface to the config/board/ level driver configuration.
* arch/mips/src/pic32mz: Various fixes for Ethernet support. Still
not fully functional. From Kristopher Tate (2015-030-29).
* arch/arm/src/armv7-m: Add configuration option and logic to support
the D-Cache in write-through mode (2015-03-29).
* arch/arm/src/stm32/Kconfig, stm32_lse.c, stm32_lsi.c, stm32_rtc.c/.h,
stm32_rtcc.c, stm32_rtcounter.c, and stm32f*_rcc.c: The
STM32F4Discovery board doesn't come with a Low speed external
oscillator so the default LSE source for the RTC doesn't work. In
stm32_rtcc.c the up_rtcinitialize() logic doesn't work with the LSI.
The check on RTC_MAGIC on the BK0R register lead to rtc_setup() call
that rightfully enables the lsi clock; but the next times, when the
rtc is already setup, the rtc_resume() call does NOT start the lsi
clock! The right place to put LSE/LSI initialisation is inside
stm32_stdclockconfig() in stm32fxxxxx_rcc.c. Doing this I checked
the possible uses of the LSI and the LSE sources: the LSI can be used
for RTC and/or the IWDG, while the LSE only for the RTC (and to output
the MCO1 pin). This change is not verifed for any other platforms.
From Leo Aloe3132
* Rename arch_nshinitialize() to board_app_initialize() (2015-03-30).