PIC32 configuration fixes

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4048 42af7a65-404d-4744-a932-0658087f49c3

arch/mips/src/pic32mx/pic32mx-devcfg.h

@@ -161,7 +161,7 @@
 #define DEVCFG1_FCKSM_MASK        (3 << DEVCFG1_FCKSM_SHIFT)
 #  define DEVCFG1_FCKSM_BOTH      (0 << DEVCFG1_FCKSM_SHIFT) /* Clock switching and FSCM are enabled */
 #  define DEVCFG1_FCKSM_CSONLY    (1 << DEVCFG1_FCKSM_SHIFT) /* Clock switching is enabled, FSCM is disabled */
-#  define DEVCFG1_FCKSM_NONE      (2 << DEVCFG1_FCKSM_SHIFT) /* Clock switching and FSCM are disabled */
+#  define DEVCFG1_FCKSM_NONE      (3 << DEVCFG1_FCKSM_SHIFT) /* Clock switching and FSCM are disabled */
 #define DEVCFG1_WDTPS_SHIFT       (16)      /* Bits 16-20: WDT postscaler select */
 #define DEVCFG1_WDTPS_MASK        (31 << DEVCFG1_WDTPS_SHIFT)
 #  define DEVCFG1_WDTPS_1         (0 << DEVCFG1_WDTPS_SHIFT)  /* 1:1 */

configs/sure-pic32mx/ostest/defconfig

@@ -167,7 +167,7 @@ CONFIG_PIC32MX_IOPORTG=y
 #    can be enabled later by software).
 #
 CONFIG_PIC32MX_DEBUGGER=2
-CONFIG_PIC32MX_ICESEL=0
+CONFIG_PIC32MX_ICESEL=1
 
 #
 # PIC32MX specific serial device driver settings