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Commit 5ec2b9d6 authored by Gwenhael Goavec-Merou's avatar Gwenhael Goavec-Merou Committed by Gregory Nutt
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arch/arm/src/stm32/stm32f33xxx_rcc.c: A flash wait state configuration. ...

arch/arm/src/stm32/stm32f33xxx_rcc.c:  A flash wait state configuration.  Flash latency must be fixed according to sysclk frequency. If this operation
is not done or done after PLL configuration, the STM32 fail to continue boot
operation if the frequency if greater than 24MHz.  This common t add this operation according to the board variable STM32_SYSCLK_FREQUENCY.  Tested on stm32f334-disco board.
parent 6a405ead
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