Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. ...
Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register
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- ChangeLog 5 additions, 0 deletionsChangeLog
- arch/arm/include/armv6-m/irq.h 28 additions, 40 deletionsarch/arm/include/armv6-m/irq.h
- arch/arm/include/armv7-m/irq.h 1 addition, 1 deletionarch/arm/include/armv7-m/irq.h
- arch/arm/include/kl/chip.h 0 additions, 3 deletionsarch/arm/include/kl/chip.h
- arch/arm/include/nuc1xx/chip.h 0 additions, 3 deletionsarch/arm/include/nuc1xx/chip.h
- arch/arm/src/armv6-m/up_assert.c 4 additions, 4 deletionsarch/arm/src/armv6-m/up_assert.c
- arch/arm/src/armv6-m/up_exception.S 5 additions, 5 deletionsarch/arm/src/armv6-m/up_exception.S
- arch/arm/src/armv6-m/up_hardfault.c 50 additions, 5 deletionsarch/arm/src/armv6-m/up_hardfault.c
- arch/arm/src/armv6-m/up_initialstate.c 1 addition, 1 deletionarch/arm/src/armv6-m/up_initialstate.c
- arch/arm/src/armv6-m/up_schedulesigaction.c 4 additions, 4 deletionsarch/arm/src/armv6-m/up_schedulesigaction.c
- arch/arm/src/armv6-m/up_sigdeliver.c 2 additions, 2 deletionsarch/arm/src/armv6-m/up_sigdeliver.c
- arch/arm/src/armv6-m/up_svcall.c 8 additions, 8 deletionsarch/arm/src/armv6-m/up_svcall.c
- arch/arm/src/kl/chip.h 1 addition, 1 deletionarch/arm/src/kl/chip.h
- arch/arm/src/kl/kl_irq.c 0 additions, 22 deletionsarch/arm/src/kl/kl_irq.c
- arch/arm/src/nuc1xx/chip.h 1 addition, 1 deletionarch/arm/src/nuc1xx/chip.h
- arch/arm/src/nuc1xx/nuc_irq.c 0 additions, 22 deletionsarch/arm/src/nuc1xx/nuc_irq.c
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