Skip to content
Commit 69e9f863 authored by Gregory Nutt's avatar Gregory Nutt
Browse files

Most interrupt handling logic interacts with tasks via standard mechanism such...

Most interrupt handling logic interacts with tasks via standard mechanism such as sem_post, sigqueue, mq_send, etc.  This all call enter_critical_section and are assumed to be safe in the SMP case.

But certain logic interacts with tasks in different ways.  The only one that comes to mind are wdogs.  There is a tasking interface that to manipulate wdogs, and a different interface in the timer interrupt handling logic to manage wdog expirations.

In the normal case, this is fine.  Since the tasking level code calls enter_critical_section, interrupts are disabled an no conflicts can occur.  But that may not be the case in the SMP case.  Most architectures do not permit disabling interrupts on other CPUs so enter_critical_section must work differently:  Locks are required to protect code.

So this change adds locking (via enter_critical section) to wdog expiration logic for the the case if the SMP configuration.
parent cdbc66ad
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment