Add logic to support a ROM'ed MMU page table

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2470 42af7a65-404d-4744-a932-0658087f49c3

arch/arm/src/arm/up_head.S

@@ -148,6 +148,7 @@ __start:
 	/* Clear the 16K level 1 page table */
 
 	ldr	r4, .LCppgtable			/* r4=phys. page table */
+#ifndef CONFIG_ARCH_ROMPGTABLE
 	mov	r0, r4
 	mov	r1, #0
 	add	r2, r0, #PGTABLE_SIZE
@@ -179,6 +180,7 @@ __start:
 	ldr	r2, .LCvpgtable			/* r2=virt. page table */
 	mksection r0, r2			/* r0=virt. base section */
 	str	r3, [r4, r0, lsr #18]		/* identity mapping */
+#endif /* CONFIG_ARCH_ROMPGTABLE */
 
 	/* The following logic will set up the ARM920/ARM926 for normal operation */
 
@@ -213,7 +215,7 @@ __start:
 
 	orr	r0, r0, #(CR_M|CR_P|CR_D)
 	
-	/* In most architectures, vectors are reloated to 0xffff0000.
+	/* In most architectures, vectors are relocated to 0xffff0000.
 	 * -- but not all
 	 */
 
@@ -253,15 +255,22 @@ __start:
 	.type	.LCvstart, %object
 .LCvstart:
 	.long	.Lvstart
+
+#ifndef CONFIG_ARCH_ROMPGTABLE
 	.type	.LCmmuflags, %object
 .LCmmuflags:
 	.long	MMU_MEMFLAGS
+#endif
+
 	.type	.LCppagetable, %object
 .LCppgtable:
-	.long	CONFIG_DRAM_START		/* Physical start of DRAM */
+	.long	PGTABLE_BASE_PADDR		/* Physical start of DRAM */
+
+#ifndef CONFIG_ARCH_ROMPGTABLE
 	.type	.LCvpagetable, %object
 .LCvpgtable:
-	.long	CONFIG_DRAM_VSTART		/* Virtual start of DRAM */
+	.long	PGTABLE_BASE_VADDR		/* Virtual start of DRAM */
+#endif
 	.size	_start, .-_start
 
 /****************************************************************************
@@ -278,6 +287,7 @@ __start:
 
 	/* Remove the temporary null mapping */
 
+#ifndef CONFIG_ARCH_ROMPGTABLE
 	ldr	r4, .LCvpgtable			/* r4=virtual page table */
 	ldr	r1, .LCppgtable			/* r1=phys. page table */
 	mksection r3, r1			/* r2=phys. base addr */
@@ -306,6 +316,7 @@ __start:
 	add	r3, r3, #SECTION_SIZE
 	str	r3, [r0], #4
 	.endr
+#endif /* CONFIG_ARCH_ROMPGTABLE */
 
 	/* Zero BSS and set up the stack pointer */
 

arch/arm/src/lpc313x/lpc313x_boot.c

@@ -82,13 +82,17 @@ extern uint32_t _vector_end;   /* End+1 of vector block */
  * space of the LPCD313x.
  */
 
-#ifndef CONFIG_ARM_ROMPGTABLE
+#ifndef CONFIG_ARCH_ROMPGTABLE
 static const struct section_mapping_s section_mapping[] =
 {
   { LPC313X_SHADOWSPACE_PSECTION, LPC313X_SHADOWSPACE_VSECTION, 
     LPC313X_SHADOWSPACE_MMUFLAGS, LPC313X_SHADOWSPACE_NSECTIONS},
   { LPC313X_INTSRAM_PSECTION, LPC313X_INTSRAM_VSECTION, 
     LPC313X_INTSRAM_MMUFLAGS, LPC313X_INTSRAM_NSECTIONS},
+#ifdef CONFIG_ARCH_ROMPGTABLE
+  { LPC313X_INTSROM0_PSECTION, LPC313X_INTSROM0_VSECTION, 
+    LPC313X_INTSROM_MMUFLAGS, LPC313X_INTSROM0_NSECTIONS},
+#endif
   { LPC313X_APB0_PSECTION, LPC313X_APB0_VSECTION, 
     LPC313X_APB0_MMUFLAGS, LPC313X_APB0_NSECTIONS},
   { LPC313X_APB1_PSECTION, LPC313X_APB1_VSECTION, 
@@ -129,7 +133,7 @@ static const struct section_mapping_s section_mapping[] =
  * Name: up_setlevel1entry
  ************************************************************************************/
 
-#ifndef CONFIG_ARM_ROMPGTABLE
+#ifndef CONFIG_ARCH_ROMPGTABLE
 static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags)
 {
   uint32_t *pgtable = (uint32_t*)PGTABLE_BASE_VADDR;
@@ -167,7 +171,7 @@ static inline void up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t paddr,
  * Name: up_setupmappings
  ************************************************************************************/
 
-#ifndef CONFIG_ARM_ROMPGTABLE
+#ifndef CONFIG_ARCH_ROMPGTABLE
 static void up_setupmappings(void)
 {
   int i, j;
@@ -201,7 +205,7 @@ static void up_setupmappings(void)
  *
  ************************************************************************************/
 
-#if !defined(CONFIG_ARM_ROMPGTABLE) && !defined(CONFIG_ARM_LOWVECTORS)
+#if !defined(CONFIG_ARCH_ROMPGTABLE) && !defined(CONFIG_ARCH_LOWVECTORS)
 static void up_vectormapping(void)
 {
   uint32_t vector_paddr = LPC313X_VECTOR_PADDR;
@@ -254,14 +258,14 @@ void up_boot(void)
    * IO regions (Including the vector region).
    */
 
-#ifndef CONFIG_ARM_ROMPGTABLE
+#ifndef CONFIG_ARCH_ROMPGTABLE
   up_setupmappings();
 
   /* Provide a special mapping for the IRAM interrupt vector positioned in high
    * memory.
    */
 
-#ifndef CONFIG_ARM_LOWVECTORS
+#ifndef CONFIG_ARCH_LOWVECTORS
   up_vectormapping();
 #endif
 #endif

arch/arm/src/lpc313x/lpc313x_decodeirq.c

@@ -92,8 +92,8 @@ void up_decodeirq(uint32_t *regs)
   index = getreg32(LPC313X_INTC_VECTOR0) & INTC_VECTOR_INDEX_MASK;
   if (index != 0)
     {
-      /* Shift the index so that the range of IRQ numbers are in bits 0-7 (up
-       * 0-127 and back off the IRQ number by 1 so that the numbering is zero-based
+      /* Shift the index so that the range of IRQ numbers are in bits 0-7 (values
+       * 1-127) and back off the IRQ number by 1 so that the numbering is zero-based
        */
 
       irq = (index >> INTC_VECTOR_INDEX_SHIFT) -1;

arch/arm/src/lpc313x/lpc313x_memorymap.h

@@ -154,6 +154,7 @@
 #define LPC313X_SHADOWSPACE_NSECTIONS  1 /*         4Kb - <1 section  */
 #define LPC313X_INTSRAM_NSECTIONS      1 /* 96 or 192Kb - <1 section */
 #define LPC313X_APB0_NSECTIONS         1 /*        32Kb - <1 section */
+#define LPC313X_INTSROM0_NSECTIONS     1 /*       128Kb - <1 section */
 #define LPC313X_APB1_NSECTIONS         1 /*        16Kb - <1 section */
 #define LPC313X_APB2_NSECTIONS         1 /*        16Kb - <1 section */
 #define LPC313X_APB3_NSECTIONS         1 /*         1Kb - <1 section */
@@ -176,6 +177,7 @@
 
 #define LPC313X_SHADOWSPACE_MMUFLAGS   MMU_MEMFLAGS
 #define LPC313X_INTSRAM_MMUFLAGS       MMU_MEMFLAGS
+#define LPC313X_INTSROM_MMUFLAGS       MMU_MEMFLAGS
 #define LPC313X_APB0_MMUFLAGS          MMU_IOFLAGS
 #define LPC313X_APB1_MMUFLAGS          MMU_IOFLAGS
 #define LPC313X_APB2_MMUFLAGS          MMU_IOFLAGS
@@ -188,13 +190,20 @@
 #define LPC313X_INTC_MMUFLAGS          MMU_IOFLAGS
 #define LPC313X_NAND_MMUFLAGS          MMU_IOFLAGS
 
+/* board_memorymap.h contains special mappings that are needed when a ROM
+ * memory map is used.  It is included in this odd location becaue it depends
+ * on some the virtual address definitions provided above.
+ */
+
+#include <arch/board/board_memorymap.h>
+
 /* LPC313X Virtual (mapped) Memory Map.  These are the mappings that will
  * be created if the page table lies in RAM.  If the platform has another,
  * read-only, pre-initialized page table (perhaps in ROM), then the board.h
  * file must provide these definitions.
  */
 
-#ifndef CONFIG_ARM_ROMPGTABLE
+#ifndef CONFIG_ARCH_ROMPGTABLE
 #  define LPC313X_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */
 #  define LPC313X_INTSRAM_VSECTION     0x11028000 /*                        Internal SRAM 96Kb-192Kb */
 #    define LPC313X_INTSRAM0_VADDR     0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */
@@ -249,18 +258,19 @@
 #  endif
 
   /* A sanity check, if the configuration says that the page table is read-only
-   * and pre-initialized (maybe ROM), then it should have also defined CONFIG_PGTABLE_BASE
+   * and pre-initialized (maybe ROM), then it should have also defined both of
+   * the page table base addresses.
    */
 
-#  ifdef CONFIG_ARM_ROMPGTABLE
-#    error "CONFIG_ARM_ROMPGTABLE defined; CONFIG_PGTABLE_BASE not defined"
+#  ifdef CONFIG_ARCH_ROMPGTABLE
+#    error "CONFIG_ARCH_ROMPGTABLE defined; PGTABLE_BASE_P/VADDR not defined"
 #  else
 
      /* We must declare the page table in ISRAM0 or 1.  We decide depending upon
       * where the vector table was place.
       */
 
-#    ifdef CONFIG_ARM_ROMPGTABLE  /* Vectors located at 0x0000:0000  */
+#    ifdef CONFIG_ARCH_ROMPGTABLE  /* Vectors located at 0x0000:0000  */
 
        /* In this case, ISRAM0 will be shadowed at address 0x0000:0000.  The page
         * table must lie at the top 16Kb of ISRAM1 (or ISRAM0 if this is a LPC3130)
@@ -311,7 +321,7 @@
 /* Determine the base address of the vector table */
 
 #define VECTOR_TABLE_SIZE        0x00010000
-#ifdef CONFIG_ARM_LOWVECTORS  /* Vectors located at 0x0000:0000  */
+#ifdef CONFIG_ARCH_LOWVECTORS  /* Vectors located at 0x0000:0000  */
 #  define LPC313X_VECTOR_PADDR   LPC313X_SHADOWSPACE_PSECTION
 #  define LPC313X_VECTOR_VADDR   0x00000000
 #  define LPC313X_VECTOR_VCOARSE 0x00000000

configs/ea3131/include/board.h

@@ -100,7 +100,6 @@
 #define BOARD_CLKS_64_92 \
  (0)
 
-
 /* LED definitions ******************************************************************/
 
 #define LED_STARTED       0

configs/ea3131/include/board_memorymap.h

+/************************************************************************************
+ * configs/ea3131/include/board_memorymap.h
+ * include/arch/board/board_memorymap.h
+ *
+ *   Copyright (C) 2009 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_BOARD_BOARD_MEMORYMAP_H
+#define __ARCH_BOARD_BOARD_MEMORYMAP_H
+
+/* This file should never be included directly, but only indirectly via
+ * lpc313x_memorymap.h.
+ */
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* If the LPC313x ROM page table is selected, then the board-logic is required
+ * to provide:
+ *
+ *   PGTABLE_BASE_PADDR - The physical address of the page table in ROM,
+ *   PGTABLE_BASE_VADDR - The mapped address of the page table in ROM, and
+ *   Mappings for each of the PSECTIONS in lpc313x_memorymap.h
+ */
+ 
+#ifdef CONFIG_ARCH_ROMPGTABLE
+   /* The LPC313x ROM page table uses a 1-1 physical to virtual memory mapping */
+
+#  define LPC313X_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */
+#  define LPC313X_INTSRAM_VSECTION     0x11028000 /*                        Internal SRAM 96Kb-192Kb */
+#    define LPC313X_INTSRAM0_VADDR     0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */
+#    define LPC313X_INTSRAM1_VADDR     0x11040000 /* 0x11040000-0x11057fff: Internal SRAM 1 96Kb */
+#  define LPC313X_INTSROM0_VSECTION    0x12000000 /* 0x12000000-0x1201ffff: Internal SROM 0 128Kb */
+#  define LPC313X_APB0_VSECTION        0x13000000 /* 0x13000000-0x13007fff: APB0 32Kb */
+#  define LPC313X_APB1_VSECTION        0x13008000 /* 0x13008000-0x1300bfff: APB1 16Kb */
+#  define LPC313X_APB2_VSECTION        0x15000000 /* 0x15000000-0x15003fff: APB2 16Kb */
+#  define LPC313X_APB3_VSECTION        0x16000000 /* 0x16000000-0x160003ff: APB3 1Kb */
+#  define LPC313X_APB4MPMC_VSECTION    0x17000000 /*                        8Kb */
+#    define LPC313X_APB4_VADDR         0x17000000 /* 0x17000000-0x17000fff: APB4 4Kb */
+#    define LPC313X_MPMC_VADDR         0x17008000 /* 0x17008000-0x17008fff: MPMC cfg 4Kb */
+#  define LPC313X_MCI_VSECTION         0x18000000 /* 0x18000000 0x180003ff: MCI/SD/SDIO 1Kb */
+#  define LPC313X_USBOTG_VSECTION      0x19000000 /* 0x19000000-0x19000fff: USB OTG 4Kb */
+#  define LPC313X_EXTSRAM_VSECTION     0x20020000 /*                        64-128Kb */
+#    define LPC313X_EXTSRAM0_VADDR     0x20000000 /* 0x20000000-0x2001ffff: External SRAM 0 64-128Kb */
+#    define LPC313X_EXTSRAM1_VADDR     0x20020000 /* 0x20020000-0x2003ffff: External SRAM 1 64-128Kb */
+#  define LPC313X_EXTSDRAM0_VSECTION   0x30000000 /* 0x30000000-0x37ffffff: External SDRAM 0 128Mb */
+#  define LPC313X_INTC_VSECTION        0x60000000 /* 0x60000000-0x60000fff: Interrupt controller 4Kb */
+#  define LPC313X_NAND_VSECTION        0x70000000 /* 0x70000000-0x700007ff: NANDFLASH Ctrl 2Kb */
+
+   /* Define the address of the page table within the ROM */
+
+#  define ROMPGTABLE_OFFSET            0x0001c00  /* Offset of the ROM page table in ROM */
+#  define PGTABLE_BASE_PADDR           (LPC313X_INTSROM0_PSECTION+ROMPGTABLE_OFFSET)
+#  define PGTABLE_BASE_VADDR           (LPC313X_INTSROM0_VSECTION+ROMPGTABLE_OFFSET)
+#endif
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __ARCH_BOARD_BOARD_MEMORYMAP_H */

configs/ea3131/ostest/defconfig

@@ -96,17 +96,15 @@ CONFIG_ARCH_DMA=n
 #
 # ARM-specific configuration
 #
-# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
+# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
 #   Undefine if vectors reside at address 0xffff:0000
-# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
-#   CONFIG_PGTABLE_BASE must also be defined in this case.
-# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
-#   read-only page table vector.  This must be provided if CONFIG_ARM_ROMPGTABLE
-#   is defined.
-#
-CONFIG_ARM_LOWVECTORS=y
-CONFIG_ARM_ROMPGTABLE=n
-#CONFIG_PGTABLE_BASE=
+# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
+#   If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
+#   PGTABLE_BASE_VADDR, and all memory section mapping in a file named
+#   board_memorymap.h.
+#
+CONFIG_ARCH_LOWVECTORS=y
+CONFIG_ARCH_ROMPGTABLE=y
 
 # Identify toolchain and linker options
 #

configs/mx1ads/ostest/defconfig

@@ -52,8 +52,6 @@
 # CONFIG_DRAM_SIZE - Describes the installed DRAM.
 # CONFIG_DRAM_START - The start address of DRAM (physical)
 # CONFIG_DRAM_VSTART - The startaddress of DRAM (virtual)
-# CONFIG_ARCH_LOWVECTORS - Leave ARM interrupt vectors at 0x0000:0000
-#   instead of moving to 0xffff:0000
 # CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
 #   stack. If defined, this symbol is the size of the interrupt
 #   stack in bytes.  If not defined, the user task stacks will be
@@ -72,24 +70,20 @@ CONFIG_DRAM_SIZE=0x01000000
 CONFIG_DRAM_START=0x08000000
 CONFIG_DRAM_VSTART=0x00000000
 CONFIG_DRAM_NUTTXENTRY=0x01004000
-CONFIG_ARCH_LOWVECTORS=y
 CONFIG_ARCH_INTERRUPTSTACK=n
 CONFIG_ARCH_STACKDUMP=y
 
 #
 # ARM-specific configuration
 #
-# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
+# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
 #   Undefine if vectors reside at address 0xffff:0000
-# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
-#   CONFIG_PGTABLE_BASE must also be defined in this case.
-# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
-#   read-only page table vector.  This must be provided if CONFIG_ARM_ROMPGTABLE
-#   is defined.
-#
-CONFIG_ARM_LOWVECTORS=n
-CONFIG_ARM_ROMPGTABLE=n
-#CONFIG_PGTABLE_BASE=
+# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
+#   If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
+#   PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
+#
+CONFIG_ARCH_LOWVECTORS=y
+CONFIG_ARCH_ROMPGTABLE=n
 
 #
 # IMX specific serial device driver settings

configs/ntosd-dm320/nettest/defconfig

@@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=n
 #
 # ARM-specific configuration
 #
-# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
+# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
 #   Undefine if vectors reside at address 0xffff:0000
-# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
-#   CONFIG_PGTABLE_BASE must also be defined in this case.
-# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
-#   read-only page table vector.  This must be provided if CONFIG_ARM_ROMPGTABLE
-#   is defined.
-#
-CONFIG_ARM_LOWVECTORS=n
-CONFIG_ARM_ROMPGTABLE=n
-#CONFIG_PGTABLE_BASE=
+# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
+#   If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
+#   PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
+#
+CONFIG_ARCH_LOWVECTORS=n
+CONFIG_ARCH_ROMPGTABLE=n
 
 #
 # DM320 specific device driver settings

configs/ntosd-dm320/nsh/defconfig

@@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=n
 #
 # ARM-specific configuration
 #
-# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
+# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
 #   Undefine if vectors reside at address 0xffff:0000
-# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
-#   CONFIG_PGTABLE_BASE must also be defined in this case.
-# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
-#   read-only page table vector.  This must be provided if CONFIG_ARM_ROMPGTABLE
-#   is defined.
-#
-CONFIG_ARM_LOWVECTORS=n
-CONFIG_ARM_ROMPGTABLE=n
-#CONFIG_PGTABLE_BASE=
+# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
+#   If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
+#   PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
+#
+CONFIG_ARCH_LOWVECTORS=n
+CONFIG_ARCH_ROMPGTABLE=n
 
 #
 # DM320 specific device driver settings

configs/ntosd-dm320/ostest/defconfig

@@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=y
 #
 # ARM-specific configuration
 #
-# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
+# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
 #   Undefine if vectors reside at address 0xffff:0000
-# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
-#   CONFIG_PGTABLE_BASE must also be defined in this case.
-# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
-#   read-only page table vector.  This must be provided if CONFIG_ARM_ROMPGTABLE
-#   is defined.
-#
-CONFIG_ARM_LOWVECTORS=n
-CONFIG_ARM_ROMPGTABLE=n
-#CONFIG_PGTABLE_BASE=
+# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
+#   If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
+#   PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
+#
+CONFIG_ARCH_LOWVECTORS=n
+CONFIG_ARCH_ROMPGTABLE=n
 
 #
 # DM320 specific device driver settings

configs/ntosd-dm320/poll/defconfig

@@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=n
 #
 # ARM-specific configuration
 #
-# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
+# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
 #   Undefine if vectors reside at address 0xffff:0000
-# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
-#   CONFIG_PGTABLE_BASE must also be defined in this case.
-# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
-#   read-only page table vector.  This must be provided if CONFIG_ARM_ROMPGTABLE
-#   is defined.
-#
-CONFIG_ARM_LOWVECTORS=n
-CONFIG_ARM_ROMPGTABLE=n
-#CONFIG_PGTABLE_BASE=
+# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
+#   If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
+#   PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
+#
+CONFIG_ARCH_LOWVECTORS=n
+CONFIG_ARCH_ROMPGTABLE=n
 
 #
 # DM320 specific device driver settings

configs/ntosd-dm320/thttpd/defconfig

@@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=n
 #
 # ARM-specific configuration
 #
-# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
+# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
 #   Undefine if vectors reside at address 0xffff:0000
-# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
-#   CONFIG_PGTABLE_BASE must also be defined in this case.
-# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
-#   read-only page table vector.  This must be provided if CONFIG_ARM_ROMPGTABLE
-#   is defined.
-#
-CONFIG_ARM_LOWVECTORS=n
-CONFIG_ARM_ROMPGTABLE=n
-#CONFIG_PGTABLE_BASE=
+# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
+#   If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
+#   PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
+#
+CONFIG_ARCH_LOWVECTORS=n
+CONFIG_ARCH_ROMPGTABLE=n
 
 #
 # DM320 specific device driver settings

configs/ntosd-dm320/udp/defconfig

@@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=n
 #
 # ARM-specific configuration
 #
-# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
+# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
 #   Undefine if vectors reside at address 0xffff:0000
-# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
-#   CONFIG_PGTABLE_BASE must also be defined in this case.
-# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
-#   read-only page table vector.  This must be provided if CONFIG_ARM_ROMPGTABLE
-#   is defined.
-#
-CONFIG_ARM_LOWVECTORS=n
-CONFIG_ARM_ROMPGTABLE=n
-#CONFIG_PGTABLE_BASE=
+# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
+#   If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
+#   PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
+#
+CONFIG_ARCH_LOWVECTORS=n
+CONFIG_ARCH_ROMPGTABLE=n
 
 #
 # DM320 specific device driver settings

configs/ntosd-dm320/uip/defconfig

@@ -76,17 +76,14 @@ CONFIG_ARCH_STACKDUMP=n
 #
 # ARM-specific configuration
 #
-# CONFIG_ARM_LOWVECTORS - define if vectors reside at address 0x0000:00000
+# CONFIG_ARCH_LOWVECTORS - define if vectors reside at address 0x0000:00000
 #   Undefine if vectors reside at address 0xffff:0000
-# CONFIG_ARM_ROMPGTABLE - A pre-initialized, read-only page table is available
-#   CONFIG_PGTABLE_BASE must also be defined in this case.
-# CONFIG_PGTABLE_BASE - The (physical) base address of the pre-initialized
-#   read-only page table vector.  This must be provided if CONFIG_ARM_ROMPGTABLE
-#   is defined.
-#
-CONFIG_ARM_LOWVECTORS=n
-CONFIG_ARM_ROMPGTABLE=n
-#CONFIG_PGTABLE_BASE=
+# CONFIG_ARCH_ROMPGTABLE - A pre-initialized, read-only page table is available.
+#   If defined, then board-specific logic must also define PGTABLE_BASE_PADDR,
+#   PGTABLE_BASE_VADDR, and all memory section mapping, possibly in board.h
+#
+CONFIG_ARCH_LOWVECTORS=n
+CONFIG_ARCH_ROMPGTABLE=n
 
 #
 # DM320 specific device driver settings