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f4grx
NuttX RTOS
Commits
8df66532
Commit
8df66532
authored
11 years ago
by
Gregory Nutt
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SAMA5 UDPHS: Bring in UDPHS endpoint interrupt handling logic
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4a9748df
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arch/arm/src/sama5/chip/sam_udphs.h
+11
-1
11 additions, 1 deletion
arch/arm/src/sama5/chip/sam_udphs.h
arch/arm/src/sama5/sam_udphs.c
+325
-175
325 additions, 175 deletions
arch/arm/src/sama5/sam_udphs.c
with
336 additions
and
176 deletions
arch/arm/src/sama5/chip/sam_udphs.h
+
11
−
1
View file @
8df66532
...
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@@ -52,10 +52,20 @@
* Pre-processor Definitions
********************************************************************************************/
/* General Definitions **********************************************************************/
/* Number of endpoints and DMA channels */
#define SAM_UDPHS_NENDPOINTS 15
#define SAM_UDPHS_NDMACHANNELS 7
/* For EP1-7 */
/* Capabilities and characteristics of endpoints */
#define SAM_UDPHS_MAXPACKETSIZE(ep) \
(((unsigned)(ep) < 1) ? 64 : 1024)
#define SAM_UDPHS_NBANKS(ep) \
(((unsigned)(ep) < 1) ? 1 : (((unsigned)(ep) < 3) ? 3 : 2))
#define SAM_UDPHS_DMA(ep) \
(((unsigned)(ep) < 1) ? false : (((unsigned)(ep) < 8) ? true : false))
/* Register offsets *************************************************************************/
/* Global Registers */
...
...
@@ -298,7 +308,7 @@
#define UDPHS_EPTCFG_DIR (1 << 3)
/* Bit 3: Endpoint Direction */
#define UDPHS_EPTCFG_TYPE_SHIFT (4)
/* Bits 4-5: Endpoint Type */
#define UDPHS_EPTCFG_TYPE_MASK (3 << UDPHS_EPTCFG_TYPE_SHIFT)
# define UDPHS_EPTCFG_TYPE_CTRL
(0 << UDPHS_EPTCFG_TYPE_SHIFT)
/* Control endpoint */
# define UDPHS_EPTCFG_TYPE_CTRL
8
(0 << UDPHS_EPTCFG_TYPE_SHIFT)
/* Control endpoint */
# define UDPHS_EPTCFG_TYPE_ISO (1 << UDPHS_EPTCFG_TYPE_SHIFT)
/* Isochronous endpoint */
# define UDPHS_EPTCFG_TYPE_BULK (2 << UDPHS_EPTCFG_TYPE_SHIFT)
/* Bulk endpoint */
# define UDPHS_EPTCFG_TYPE_INT (3 << UDPHS_EPTCFG_TYPE_SHIFT)
/* Interrupt endpoint */
...
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arch/arm/src/sama5/sam_udphs.c
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175
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8df66532
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