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Commit a0cd7113 authored by Bob Feretich's avatar Bob Feretich Committed by Gregory Nutt
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I have a SPI bus with both Mode 0 and Mode 3 devices on it. After performing...

I have a SPI bus with both Mode 0 and Mode 3 devices on it.  After performing SPI I/O to a Mode 0 device, switching to a Mode 3 device locked up the SPI interface.  Only zeroes would be read.  I traced the reason for the lock-up to arm/arm/src/stm32f7/stm32_spi.c function spi_setmode().  Changing the mode causes a spurious SPI clock transmission that confuses the stm32f7 SPI input hardware.  This problem is solved by (1) changing the SPI mode with SPI (and perhaps DMA) disabled, and (2) flushing the receive FIFO if the mode change results in garbage in the FIFO.
parent eef8bb7f
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