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Commit b052fa2b authored by patacongo's avatar patacongo
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Add system timer logic 

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1700 42af7a65-404d-4744-a932-0658087f49c3
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arch/arm/src/dm320/dm320_timerisr.c
+ 24
− 23
View file @ b052fa2b
/************************************************************
* dm320/dm320_timerisr.c
/****************************************************************************
* arch/arm/src/dm320/dm320_timerisr.c
* arch/arm/src/chip/dm320_timerisr.c
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
......@@ -14,7 +15,7 @@
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
......@@ -31,11 +32,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
****************************************************************************/
/************************************************************
/****************************************************************************
* Included Files
************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
......@@ -45,9 +46,9 @@
#include "up_internal.h"
#include "up_arch.h"
/************************************************************
/****************************************************************************
* Definitions
************************************************************/
****************************************************************************/
/* DM320 Timers
*
......@@ -92,26 +93,26 @@
#define DM320_TMR0_DIV 26999 /* (see above) */
#define DM320_TMR0_PRSCL 9 /* (see above) */
/************************************************************
/****************************************************************************
* Private Types
************************************************************/
****************************************************************************/
/************************************************************
/****************************************************************************
* Private Function Prototypes
************************************************************/
****************************************************************************/
/************************************************************
/****************************************************************************
* Global Functions
************************************************************/
****************************************************************************/
/************************************************************
/****************************************************************************
* Function: up_timerisr
*
* Description:
* The timer ISR will perform a variety of services for
* various portions of the systems.
* The timer ISR will perform a variety of services for various portions
* of the systems.
*
************************************************************/
****************************************************************************/
int up_timerisr(int irq, uint32 *regs)
{
......@@ -121,14 +122,14 @@ int up_timerisr(int irq, uint32 *regs)
return 0;
}
/************************************************************
/****************************************************************************
* Function: up_timerinit
*
* Description:
* This function is called during start-up to initialize
* the timer interrupt.
* This function is called during start-up to initialize the timer
* interrupt.
*
************************************************************/
****************************************************************************/
void up_timerinit(void)
{
......
arch/arm/src/imx/Make.defs
+ 2
− 2
View file @ b052fa2b
......@@ -45,9 +45,9 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
up_sigdeliver.c up_syscall.c up_unblocktask.c \
up_undefinedinsn.c up_usestack.c
CHIP_ASRCS = imx_lowputc.S #imx_restart.S
CHIP_ASRCS = imx_lowputc.S
CHIP_CSRCS = imx_boot.c imx_gpio.c imx_allocateheap.c imx_irq.c \
imx_serial.c # imx_decodeirq.c imx_timerisr.c imx_framebuffer.c
imx_serial.c imx_timerisr.c # imx_decodeirq.c imx_framebuffer.c
ifeq ($(CONFIG_USBDEV),y)
CHIP_CSRCS += imx_usbdev.c
......
arch/arm/src/imx/imx_timer.h
+ 5
− 0
View file @ b052fa2b
......@@ -76,6 +76,11 @@
#define TIMER_TCTL_TEN (1 << 0) /* Bit 0: Timer Enable */
#define TIMER_TCTL_CLKSOURCE_SHIFT 1 /* Bit 1-4: Clock Source */
#define TIMER_TCTL_CLKSOURCE_MASK (0x07 << TIMER_TCTL_CLKSOURCE_SHIFT)
#define TCTL_CLKSOURCE_STOPCOUNT (0x00 << TIMER_TCTL_CLKSOURCE_SHIFT)
#define TCTL_CLKSOURCE_PERCLK1 (0x01 << TIMER_TCTL_CLKSOURCE_SHIFT)
#define TCTL_CLKSOURCE_PERCLK1D16 (0x02 << TIMER_TCTL_CLKSOURCE_SHIFT)
#define TCTL_CLKSOURCE_TIN (0x03 << TIMER_TCTL_CLKSOURCE_SHIFT)
#define TCTL_CLKSOURCE_32KHX (0x04 << TIMER_TCTL_CLKSOURCE_SHIFT)
#define TIMER_TCTL_IRQEN (1 << 5) /* Bit 5: Interrupt Request Enable */
#define TIMER_TCTL_OM (1 << 6) /* Bit 6: Output Mode */
#define TIMER_TCTL_CAP (1 << 7) /* Bit 7: Capture Edge */
......
arch/arm/src/imx/imx_timerisr.c 0 → 100644
+ 161
− 0
View file @ b052fa2b
/****************************************************************************
* arch/arm/src/imx/imx_timerisr.c
* arch/arm/src/chip/imx_timerisr.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/arch.h>
#include "clock_internal.h"
#include "up_internal.h"
#include "up_arch.h"
/****************************************************************************
* Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Global Functions
****************************************************************************/
/****************************************************************************
* Function: up_timerisr
*
* Description:
* The timer ISR will perform a variety of services for various portions
* of the systems.
*
****************************************************************************/
int up_timerisr(int irq, uint32 *regs)
{
uint32 tstat;
int ret = -EIO;
/* Get and clear the interrupt status */
tstat = getreg32(IMX_TIMER1_TSTAT);
putreg32(0, IMX_TIMER1_TSTAT);
/* Verify that this is a timer interrupt */
if ((tstat & TIMER_TSTAT_COMP) != 0)
{
/* Process timer interrupt */
sched_process_timer();
ret = OK;
}
return ret;
}
/****************************************************************************
* Function: up_timerinit
*
* Description:
* This function is called during start-up to initialize the timer
* interrupt.
*
****************************************************************************/
void up_timerinit(void)
{
uint32 tctl;
/* Make sure the timer interrupts are disabled */
up_disable_irq(IMX_IRQ_SYSTIMER);
/* Make sure that timer1 is disabled */
putreg32(0, IMX_TIMER1_TCTL);
putreg32(0, IMX_TIMER1_TPRER);
/* Select restart mode with source = PERCLK1. In restart mode, after
* the compare value is reached, the counter resets to 0x00000000, the
* compare event (COMP) bit of the timer status register is set, an
* interrupt is issued if the interrupt request enable (IRQEN) bit of
* the corresponding TCTL register is set, and the counter resumes
* counting.
*/
tctl = TCTL_CLKSOURCE_PERCLK1;
putreg32(tctl, IMX_TIMER1_TCTL);
/* The timer is driven by PERCLK1. Set prescaler for division by one
* so that the clock is driven at PERCLK1.
*
* putreg(0, IMX_TIMER1_TPRER); -- already the case
*
* Set the compare register so that the COMP interrupt is generated
* with a period of MSEC_PER_TICK. The value IMX_PERCLK1_FREQ/1000
* (defined in board.h) is the number of counts in millisecond, so:
*/
putreg32((IMX_PERCLK1_FREQ / 1000) * MSEC_PER_TICK, IMX_TIMER1_TCMP);
/* Configure to provide timer COMP interrupts when TCN increments
* to TCMP.
*/
tctl |= TIMER_TCTL_IRQEN;
putreg32(tctl, IMX_TIMER1_TCTL);
/* Finally, enable the timer (be be the last operation on TCTL) */
tctl |= TIMER_TCTL_TEN;
putreg32(tctl, IMX_TIMER1_TCTL);
/* Attach and enable the timer interrupt */
irq_attach(IMX_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
up_enable_irq(IMX_IRQ_SYSTIMER);
}
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