Add irqsave/restore() macros for Cortex-M3

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1758 42af7a65-404d-4744-a932-0658087f49c3

arch/arm/include/irq.h

 /****************************************************************************
  * arch/arm/include/irq.h
  *
- *   Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-/* This file should never be included directed but, rather,
- * only indirectly through nuttx/irq.h
+/* This file should never be included directed but, rather, only indirectly
+ * through nuttx/irq.h
  */
 
 #ifndef __ARCH_ARM_INCLUDE_IRQ_H
@@ -157,6 +157,49 @@ struct xcptcontext
 
 #ifndef __ASSEMBLY__
 
+#ifdef __thumb2__
+
+/* Save the current interrupt enable state & disable IRQs */
+
+static inline irqstate_t irqsave(void)
+{
+  unsigned short primask;
+
+  /* Return the the current value of primask register and set
+   * bit 0 of the primask register to disable interrupts
+   */
+
+  __asm__ __volatile__
+    (
+     "\tmrs    %0, primask\n"
+     "\tcpsid  i\n"
+     : "=r" (primask)
+     :
+     : "memory");
+  return primask;
+}
+
+/* Restore saved IRQ & FIQ state */
+
+static inline void irqrestore(irqstate_t primask)
+{
+  /* If bit 0 of the primask is 0, then we need to restore
+   * interupts.
+   */
+
+  __asm__ __volatile__
+    (
+     "\ttst    %0, #1\n"
+     "\tbne    1f\n"
+     "\tcpsie  i\n"
+     "1:\n"
+     :
+     : "r" (primask)
+     : "memory");
+}
+
+#else /* __thumb2__ */
+
 /* Save the current interrupt enable state & disable IRQs */
 
 static inline irqstate_t irqsave(void)
@@ -201,7 +244,8 @@ static inline void system_call(swint_t func, int parm1,
        "r" ((long)(parm2)), "r" ((long)(parm3))
      : "r0", "r1", "r2", "r3", "lr");
 }
-#endif
+#endif /* __thumb2__ */
+#endif /* __ASSEMBLY__ */
 
 /****************************************************************************
  * Public Variables

arch/arm/include/types.h

@@ -67,11 +67,16 @@ typedef unsigned int uint32;
 typedef long long sint64;
 typedef unsigned long long uint64;
 
-/* This is the size of the interrupt state save returned by
- * irqsave()
+/* This is the size of the interrupt state save returned by irqsave().  For
+ * ARM, a 32 register value is returned, for the thumb2, Cortex-M3, the 16-bit
+ * primask register value is returned,
  */
 
+#ifdef __thumb2__
+typedef unsigned short irqstate_t;
+#else /* __thumb2__ */
 typedef unsigned int irqstate_t;
+#endif /* __thumb2__ */
 
 #endif /* __ASSEMBLY__ */
 

configs/eagle100/README.txt

@@ -33,6 +33,10 @@ Toolchain
   8. Edit setenv.h, if necessary, so that the PATH variable includes
      the path to the newly built binaries.
 
+  See the file configs/README.txt in the buildroot source tree.  That has more
+  detailed PLUS some special instructions that you will need to follow if you are
+  building a Cortex-M3 toolchain for Cygwin under Windows.
+
 Eagle100-specific Configuration Options
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^