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Commit b6a6c21d authored by patacongo's avatar patacongo
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Add skeleton of ENC28J60 ethernet driver 

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2627 42af7a65-404d-4744-a932-0658087f49c3
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......@@ -1095,6 +1095,7 @@
* graphics/nxglib/fb and lcd - Support LCD and framebuffer rasterizers for NX.
* configs/sam3u-ek/src/up_lcd.c - LCD driver for LCD on SAM3U-EK development
board.
* configs/sam3u-ek/nx - NX graphics configuration for the SAM3U-EK
5.5 2010-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
Documentation/NuttX.html
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......@@ -1649,6 +1649,7 @@ nuttx-5.4 2010-04-23 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
* graphics/nxglib/fb and lcd - Support LCD and framebuffer rasterizers for NX.
* configs/sam3u-ek/src/up_lcd.c - LCD driver for LCD on SAM3U-EK development
board.
* configs/sam3u-ek/nx - NX graphics configuration for the SAM3U-EK
pascal-2.0 2010-12-21 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
......
drivers/net/Make.defs
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############################################################################
# drivers/net/Make.defs
#
# Copyright (C) 2007 Gregory Nutt. All rights reserved.
# Copyright (C) 2007, 2010 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
#
# Redistribution and use in source and binary forms, with or without
......@@ -43,5 +43,8 @@ endif
ifeq ($(CONFIG_NET_CS89x0),y)
NET_CSRCS += cs89x0.c
endif
ifeq ($(CONFIG_NET_ENC28J60),y)
NET_CSRCS += enc28j60.c
endif
endif
drivers/net/enc28j60.c 0 → 100755
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drivers/net/enc28j60.h 0 → 100755
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/****************************************************************************
* drivers/net/enc28j60.h
*
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __DRIVERS_NET_ENC28J60_H
#define __DRIVERS_NET_ENC28J60_H
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* A total of seven instructions are implemented on the ENC28J60 */
#define ENC28J60_RCR (0x00) /* Read Control Register
* 000 | aaaaa | (Registe value returned)) */
#define ENC28J60_RBM (0x3a) /* Read Buffer Memory
* 001 | 11010 | (Read buffer data follows) */
#define ENC28J60_WCR (0x40) /* Write Control Register
* 010 | aaaaa | dddddddd */
#define ENC28J60_WBM (0x7a) /* Write Buffer Memory
* 011 | 11010 | (Write buffer data follows) */
#define ENC28J60_BFS (0x80) /* Bit Field Set
* 100 | aaaaa | dddddddd */
#define ENC28J60_BFC (0xa0) /* Bit Field Clear
* 101 | aaaaa | dddddddd */
#define ENC28J60_SRC (0xff) /* System Reset
* 111 | 11111 | (No data) */
/* Control registers are accessed with the RCR, RBM, WCR, BFS, and BFC commands.
* The following identifies all ENC28J60 control registers. The Control register
* memory is partitioned into four banks, selectable by the bank select bits,
* BSEL1:BSEL0, in the ECON1 register.
*
* The last five locations (0x1b to 0x1f) of all banks point to a common set of
* registers: EIE, EIR, ESTAT, ECON2 and ECON1. These are key registers used
* in controlling and monitoring the operation of the device. Their common
* mapping allows easy access without switching the bank.
*
* Control registers for the ENC28J60 are generically grouped as ETH, MAC and
* MII registers. Register names starting with E belong to the ETH group. Similarly,
* registers names starting with MA belong to the MAC group and registers prefixed
* with MI belong to the MII group.
*/
#define EIE (0x1b) /* Ethernet Interrupt Enable Register */
#define EIR (0x1c) /* Ethernet Interupt Request Register */
#define ESTAT (0x1d) /* Ethernet Status Register */
#define ECON2 (0x1e) /* Ethernet Control 2 Register */
#define ECON1 (0x1f) /* Ethernet Control 1 Register */
/* Ethernet Interrupt Enable Register Bit Definitions */
#define EIE_RXERIE (1 << 0) /* Bit 0: Receive Error Interrupt Enable */
#define EIE_TXERIE (1 << 1) /* Bit 1: Transmit Error Interrupt Enable */
/* Bit 2: Reserved */
#define EIE_TXIE (1 << 3) /* Bit 3: Transmit Enable */
#define EIE_LINKIE (1 << 4) /* Bit 4: Link Status Change Interrupt Enable */
#define EIE_DMAIE (1 << 5) /* Bit 5: DMA Interrupt Enable */
#define EIE_PKTIE (1 << 6) /* Bit 6: Receive Packet Pending Interrupt Enable */
#define EIE_INTIE (1 << 7) /* Bit 7: Global INT Interrupt Enable */
/* Ethernet Interupt Request Register Bit Definitions */
#define EIR_RXERIF (1 << 0) /* Bit 0: Receive Error Interrupt */
#define EIR_TXERIF (1 << 1) /* Bit 1: Transmit Error Interrupt */
/* Bit 2: Reserved */
#define EIR_TXIF (1 << 3) /* Bit 3: Transmit Interrupt */
#define EIR_LINKIF (1 << 4) /* Bit 4: Link Change Interrupt */
#define EIR_DMAIF (1 << 5) /* Bit 5: DMA Interrupt */
#define EIR_PKTIF (1 << 6) /* Bit 6: Receive Packet Pending Interrupt */
/* Bit 7: Reserved */
/* Ethernet Status Register Bit Definitions */
#define ESTAT_CLKRDY (1 << 0) /* Bit 0: Clock Ready */
#define ESTAT_TXABRT (1 << 1) /* Bit 1: Transmit Abort Error */
#define ESTAT_RXBUSY (1 << 2) /* Bit 2: Receive Busy */
/* Bit 3: Reserved */
#define ESTAT_LATECOL (1 << 4) /* Bit 4: Late Collision Error */
/* Bit 5: Reserved */
#define ESTAT_BUFER (1 << 6) /* Bit 6: Ethernet Buffer Error Status */
#define ESTAT_INT (1 << 7) /* Bit 7: INT Interrupt */
/* Ethernet Control 1 Register Bit Definitions */
#define ECON1_BSEL_SHIFT (0) /* Bits 0-1: Bank select */
#define ECON1_BSEL_MASK (3 << ECON1_BSEL_SHIFT)
# define ECON1_BSEL_BANK0 (0 << 0) /* Bank 0 */
# define ECON1_BSEL_BANK1 (1 << 1) /* Bank 1 */
# define ECON1_BSEL_BANK2 (2 << 0) /* Bank 2 */
# define ECON1_BSEL_BANK3 (3 << 0) /* Bank 3 */
#define ECON1_RXEN (1 << 2) /* Bit 2: Receive Enable */
#define ECON1_TXRTS (1 << 3) /* Bit 3: Transmit Request to Send */
#define ECON1_CSUMEN (1 << 4) /* Bit 4: DMA Checksum Enable */
#define ECON1_DMAST (1 << 5) /* Bit 5: DMA Start and Busy Status */
#define ECON1_RXRST (1 << 6) /* Bit 6: Receive Logic Reset */
#define ECON1_TXRST (1 << 7) /* Bit 7: Transmit Logic Reset */
/* Ethernet Control 2 Register */
/* Bits 0-2: Reserved */
#define ECON2_VRPS (1 << 3) /* Bit 3: Voltage Regulator Power Save Enable */
/* Bit 4: Reserved */
#define ECON2_PWRSV (1 << 5) /* Bit 5: Power Save Enable */
#define ECON2_PKTDEC (1 << 6) /* Bit 6: Packet Decrement */
#define ECON2_AUTOINC (1 << 7) /* Bit 7: Automatic Buffer Pointer Increment Enable */
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __DRIVERS_NET_ENC28J60_H */
drivers/net/skeleton.c
+ 15
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/****************************************************************************
* drivers/net/skeleton.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
......@@ -111,13 +111,13 @@ static struct skel_driver_s g_skel[CONFIG_skeleton_NINTERFACES];
/* Common TX logic */
static int skel_transmit(struct skel_driver_s *skel);
static int skel_transmit(FAR struct skel_driver_s *skel);
static int skel_uiptxpoll(struct uip_driver_s *dev);
/* Interrupt handling */
static void skel_receive(struct skel_driver_s *skel);
static void skel_txdone(struct skel_driver_s *skel);
static void skel_receive(FAR struct skel_driver_s *skel);
static void skel_txdone(FAR struct skel_driver_s *skel);
static int skel_interrupt(int irq, FAR void *context);
/* Watchdog timer expirations */
......@@ -152,7 +152,7 @@ static int skel_txavail(struct uip_driver_s *dev);
*
****************************************************************************/
static int skel_transmit(struct skel_driver_s *skel)
static int skel_transmit(FAR struct skel_driver_s *skel)
{
/* Verify that the hardware is ready to send another packet */
......@@ -193,7 +193,7 @@ static int skel_transmit(struct skel_driver_s *skel)
static int skel_uiptxpoll(struct uip_driver_s *dev)
{
struct skel_driver_s *skel = (struct skel_driver_s *)dev->d_private;
FAR struct skel_driver_s *skel = (FAR struct skel_driver_s *)dev->d_private;
/* If the polling resulted in data that should be sent out on the network,
* the field d_len is set to a value > 0.
......@@ -232,7 +232,7 @@ static int skel_uiptxpoll(struct uip_driver_s *dev)
*
****************************************************************************/
static void skel_receive(struct skel_driver_s *skel)
static void skel_receive(FAR struct skel_driver_s *skel)
{
do
{
......@@ -299,7 +299,7 @@ static void skel_receive(struct skel_driver_s *skel)
*
****************************************************************************/
static void skel_txdone(struct skel_driver_s *skel)
static void skel_txdone(FAR struct skel_driver_s *skel)
{
/* Check for errors and update statistics */
......@@ -331,7 +331,7 @@ static void skel_txdone(struct skel_driver_s *skel)
static int skel_interrupt(int irq, FAR void *context)
{
register struct skel_driver_s *skel = &g_skel[0];
register FAR struct skel_driver_s *skel = &g_skel[0];
/* Disable Ethernet interrupts */
......@@ -374,7 +374,7 @@ static int skel_interrupt(int irq, FAR void *context)
static void skel_txtimeout(int argc, uint32_t arg, ...)
{
struct skel_driver_s *skel = (struct skel_driver_s *)arg;
FAR struct skel_driver_s *skel = (FAR struct skel_driver_s *)arg;
/* Increment statistics and dump debug info */
......@@ -404,7 +404,7 @@ static void skel_txtimeout(int argc, uint32_t arg, ...)
static void skel_polltimer(int argc, uint32_t arg, ...)
{
struct skel_driver_s *skel = (struct skel_driver_s *)arg;
FAR struct skel_driver_s *skel = (FAR struct skel_driver_s *)arg;
/* Check if there is room in the send another TXr packet. */
......@@ -436,7 +436,7 @@ static void skel_polltimer(int argc, uint32_t arg, ...)
static int skel_ifup(struct uip_driver_s *dev)
{
struct skel_driver_s *skel = (struct skel_driver_s *)dev->d_private;
FAR struct skel_driver_s *skel = (FAR struct skel_driver_s *)dev->d_private;
ndbg("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
......@@ -473,7 +473,7 @@ static int skel_ifup(struct uip_driver_s *dev)
static int skel_ifdown(struct uip_driver_s *dev)
{
struct skel_driver_s *skel = (struct skel_driver_s *)dev->d_private;
FAR struct skel_driver_s *skel = (FAR struct skel_driver_s *)dev->d_private;
irqstate_t flags;
/* Disable the Ethernet interrupt */
......@@ -514,7 +514,7 @@ static int skel_ifdown(struct uip_driver_s *dev)
static int skel_txavail(struct uip_driver_s *dev)
{
struct skel_driver_s *skel = (struct skel_driver_s *)dev->d_private;
FAR struct skel_driver_s *skel = (FAR struct skel_driver_s *)dev->d_private;
irqstate_t flags;
flags = irqsave();
......@@ -565,7 +565,7 @@ int skel_initialize(void)
if (irq_attach(CONFIG_skeleton_IRQ, skel_interrupt))
{
/* We could not attach the ISR to the ISR */
/* We could not attach the ISR to the the interrupt */
return -EAGAIN;
}
......
include/nuttx/spi.h
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/****************************************************************************
* include/nuttx/spi.h
*
* Copyright(C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright(C) 2008-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
......
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