ARMv7-A/i.MX6: Modify handling of the SMP cache coherency configuration so...
ARMv7-A/i.MX6: Modify handling of the SMP cache coherency configuration so that it is identical to the steps from the TRM. Makes no differenct, however.
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- TODO 25 additions, 25 deletionsTODO
- arch/arm/src/armv7-a/arm_cpuhead.S 5 additions, 1 deletionarch/arm/src/armv7-a/arm_cpuhead.S
- arch/arm/src/armv7-a/arm_cpustart.c 8 additions, 2 deletionsarch/arm/src/armv7-a/arm_cpustart.c
- arch/arm/src/armv7-a/arm_head.S 6 additions, 2 deletionsarch/arm/src/armv7-a/arm_head.S
- arch/arm/src/armv7-a/arm_pghead.S 6 additions, 2 deletionsarch/arm/src/armv7-a/arm_pghead.S
- arch/arm/src/armv7-a/arm_scu.c 81 additions, 25 deletionsarch/arm/src/armv7-a/arm_scu.c
- arch/arm/src/imx6/imx_boot.c 34 additions, 20 deletionsarch/arm/src/imx6/imx_boot.c
- arch/arm/src/imx6/imx_boot.h 26 additions, 3 deletionsarch/arm/src/imx6/imx_boot.h
- arch/arm/src/imx6/imx_cpuboot.c 0 additions, 12 deletionsarch/arm/src/imx6/imx_cpuboot.c
- arch/arm/src/imx6/imx_irq.c 0 additions, 7 deletionsarch/arm/src/imx6/imx_irq.c
- configs/sabre-6quad/README.txt 7 additions, 16 deletionsconfigs/sabre-6quad/README.txt
- configs/sabre-6quad/src/imx_boardinit.c 29 additions, 3 deletionsconfigs/sabre-6quad/src/imx_boardinit.c
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