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Commit d3beea96 authored by Gregory Nutt's avatar Gregory Nutt
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Cortex-M7: Add support for enabled the D-Cache in write only mode.

SAMV7 Ethernet:  I- and D-Cache are now enabled in the netnsh/ configuration.  D-Cache is enabled in write-though mode.  This mode is necessary because the DMA descriptors are each 8-bytes in size but the D-Cache cache line is 32-bits in size. So it is impossible make coherency for every 8-byte DMA descriptor without write-through.
parent ae0b0ca3
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