Skip to content
Snippets Groups Projects
Commit eef661e2 authored by patacongo's avatar patacongo
Browse files

Add Kinetis SIM header file 

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3853 42af7a65-404d-4744-a932-0658087f49c3
parent b5c249a7
No related branches found
No related tags found
No related merge requests found
Expand all Hide whitespace changes
Inline Side-by-side
arch/arm/src/kinetis/chip.h
+ 36
− 36
View file @ eef661e2
......@@ -50,8 +50,8 @@
#if defined(CONFIG_ARCH_CHIP_MK40X64VFX50) || defined(CONFIG_ARCH_CHIP_MK40X64VLH50) \
defined(CONFIG_ARCH_CHIP_MK40X64VLK50) || defined(CONFIG_ARCH_CHIP_MK40X64VMB50)
# define KIENTIS_K40 1 /* Kinetics K40 family */
# undef KIENTIS_K60 /* Not Kinetis K60 family */
# define KINETIS_K40 1 /* Kinetics K40 family */
# undef KINETIS_K60 /* Not Kinetis K60 family */
# define KINETIS_FLASH_SIZE (64*1024) /* 64Kb */
# define KINETIS_FLEXMEM_SIZE (32*1024) /* 32Kb */
# define KINETIS_SRAM_SIZE (16*1024) /* 16Kb */
......@@ -99,8 +99,8 @@
defined(CONFIG_ARCH_CHIP_MK40X128VFX72) || defined(CONFIG_ARCH_CHIP_MK40X128VLH72) \
defined(CONFIG_ARCH_CHIP_MK40X128VLK72) || defined(CONFIG_ARCH_CHIP_MK40X128VMB72) \
defined(CONFIG_ARCH_CHIP_MK40X128VLL72) || defined(CONFIG_ARCH_CHIP_MK40X128VML72)
# define KIENTIS_K40 1 /* Kinetics K40 family */
# undef KIENTIS_K60 /* Not Kinetis K60 family */
# define KINETIS_K40 1 /* Kinetics K40 family */
# undef KINETIS_K60 /* Not Kinetis K60 family */
# define KINETIS_FLASH_SIZE (128*1024) /* 128Kb */
# define KINETIS_FLEXMEM_SIZE (32*1024) /* 32Kb */
# define KINETIS_SRAM_SIZE (32*1024) /* 32Kb */
......@@ -140,8 +140,8 @@
#elif defined(CONFIG_ARCH_CHIP_MK40X256VLK72) || defined(CONFIG_ARCH_CHIP_MK40X256VMB72) \
defined(CONFIG_ARCH_CHIP_MK40X256VLL72) || defined(CONFIG_ARCH_CHIP_MK40X256VML72)
# define KIENTIS_K40 1 /* Kinetics K40 family */
# undef KIENTIS_K60 /* Not Kinetis K60 family */
# define KINETIS_K40 1 /* Kinetics K40 family */
# undef KINETIS_K60 /* Not Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
# define KINETIS_FLEXMEM_SIZE (32*1024) /* 32Kb */
# define KINETIS_SRAM_SIZE (32*1024) /* 64Kb */
......@@ -180,8 +180,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100)
# define KIENTIS_K40 1 /* Kinetics K40 family */
# undef KIENTIS_K60 /* Not Kinetis K60 family */
# define KINETIS_K40 1 /* Kinetics K40 family */
# undef KINETIS_K60 /* Not Kinetis K60 family */
# define KINETIS_FLASH_SIZE (128*1024) /* 128Kb */
# define KINETIS_FLEXMEM_SIZE (128*1024) /* 128Kb */
# define KINETIS_SRAM_SIZE (32*1024) /* 32Kb */
......@@ -220,8 +220,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100)
# define KIENTIS_K40 1 /* Kinetics K40 family */
# undef KIENTIS_K60 /* Not Kinetis K60 family */
# define KINETIS_K40 1 /* Kinetics K40 family */
# undef KINETIS_K60 /* Not Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
# define KINETIS_FLEXMEM_SIZE (256*1024) /* 256Kb */
# define KINETIS_SRAM_SIZE (64*1024) /* 32Kb */
......@@ -262,8 +262,8 @@
#elif defined(CONFIG_ARCH_CHIP_MK40N512VLK100) || defined(CONFIG_ARCH_CHIP_MK40N512VMB100) \
defined(CONFIG_ARCH_CHIP_MK40N512VLL100) || defined(CONFIG_ARCH_CHIP_MK40N512VML100) \
defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
# define KIENTIS_K40 1 /* Kinetics K40 family */
# undef KIENTIS_K60 /* Not Kinetis K60 family */
# define KINETIS_K40 1 /* Kinetics K40 family */
# undef KINETIS_K60 /* Not Kinetis K60 family */
# define KINETIS_FLASH_SIZE (512*1024) /* 512Kb */
# undef KINETIS_FLEXMEM_SIZE /* No FlexMemory */
# define KINETIS_SRAM_SIZE (128*1024) /* 128Kb */
......@@ -302,8 +302,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N256VLL100)
# undef KIENTIS_K40 /* Not Kinetics K40 family */
# define KIENTIS_K60 1 /* Kinetis K60 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
......@@ -345,8 +345,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60X256VLL100)
# undef KIENTIS_K40 /* Not Kinetics K40 family */
# define KIENTIS_K60 1 /* Kinetis K60 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
# define KINETIS_FLEXNVM_SIZE (256*1024) /* 256Kb */
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 32Kb */
......@@ -388,8 +388,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
# undef KIENTIS_K40 /* Not Kinetics K40 family */
# define KIENTIS_K60 1 /* Kinetis K60 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (512*1024) /* 256Kb */
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
......@@ -431,8 +431,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N256VML100)
# undef KIENTIS_K40 /* Not Kinetics K40 family */
# define KIENTIS_K60 1 /* Kinetis K60 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
......@@ -474,8 +474,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60X256VML100)
# undef KIENTIS_K40 /* Not Kinetics K40 family */
# define KIENTIS_K60 1 /* Kinetis K60 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
# define KINETIS_FLEXNVM_SIZE (256*1024) /* 256Kb */
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
......@@ -517,8 +517,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N512VML100)
# undef KIENTIS_K40 /* Not Kinetics K40 family */
# define KIENTIS_K60 1 /* Kinetis K60 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (512*1024) /* 256Kb */
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
......@@ -560,8 +560,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100)
# undef KIENTIS_K40 /* Not Kinetics K40 family */
# define KIENTIS_K60 1 /* Kinetis K60 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
......@@ -603,8 +603,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60X256VLQ100)
# undef KIENTIS_K40 /* Not Kinetics K40 family */
# define KIENTIS_K60 1 /* Kinetis K60 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
# define KINETIS_FLEXNVM_SIZE (256*1024) /* 256Kb */
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
......@@ -646,8 +646,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N512VLQ100)
# undef KIENTIS_K40 /* Not Kinetics K40 family */
# define KIENTIS_K60 1 /* Kinetis K60 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (512*1024) /* 512Kb */
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
......@@ -689,8 +689,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N256VMD100)
# undef KIENTIS_K40 /* Not Kinetics K40 family */
# define KIENTIS_K60 1 /* Kinetis K60 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
......@@ -732,8 +732,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60X256VMD100)
# undef KIENTIS_K40 /* Not Kinetics K40 family */
# define KIENTIS_K60 1 /* Kinetis K60 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
# define KINETIS_FLEXNVM_SIZE (256*1024) /* 256Kb */
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
......@@ -775,8 +775,8 @@
# define KINETIS_NCRC 1 /* CRC */
#elif defined(CONFIG_ARCH_CHIP_MK60N512VMD100)
# undef KIENTIS_K40 /* Not Kinetics K40 family */
# define KIENTIS_K60 1 /* Kinetis K60 family */
# undef KINETIS_K40 /* Not Kinetics K40 family */
# define KINETIS_K60 1 /* Kinetis K60 family */
# define KINETIS_FLASH_SIZE (512*1024) /* 512Kb */
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
......
arch/arm/src/kinetis/kinetis_gpio.h 0 → 100755
+ 142
− 0
View file @ eef661e2
/************************************************************************************
* arch/arm/src/kinetis/kinetis_gpio.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_GPIO_H
#define __ARCH_ARM_SRC_KINETIS_KINETIS_GPIO_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Register Offsets *****************************************************************/
#define KINETIS_GPIO_PDOR_OFFSET 0x0000 /* Port Data Output Register */
#define KINETIS_GPIO_PSOR_OFFSET 0x0004 /* Port Set Output Register */
#define KINETIS_GPIO_PCOR_OFFSET 0x0008 /* Port Clear Output Register */
#define KINETIS_GPIO_PTOR_OFFSET 0x000c /* Port Toggle Output Register */
#define KINETIS_GPIO_PDIR_OFFSET 0x0010 /* Port Data Input Register */
#define KINETIS_GPIO_PDDR_OFFSET 0x0014 /* Port Data Direction Register */
/* Register Addresses ***************************************************************/
#define KINETIS_GPIO_PDOR(n) (KINETIS_GPIO_BASE(n)+KINETIS_GPIO_PDOR_OFFSET)
#define KINETIS_GPIO_PSOR(n) (KINETIS_GPIO_BASE(n)+KINETIS_GPIO_PSOR_OFFSET)
#define KINETIS_GPIO_PCOR(n) (KINETIS_GPIO_BASE(n)+KINETIS_GPIO_PCOR_OFFSET)
#define KINETIS_GPIO_PTOR(n) (KINETIS_GPIO_BASE(n)+KINETIS_GPIO_PTOR_OFFSET)
#define KINETIS_GPIO_PDIR(n) (KINETIS_GPIO_BASE(n)+KINETIS_GPIO_PDIR_OFFSET)
#define KINETIS_GPIO_PDDR(n) (KINETIS_GPIO_BASE(n)+KINETIS_GPIO_PDDR_OFFSET)
#define KINETIS_GPIOA_PDOR (KINETIS_GPIOA_BASE+KINETIS_GPIO_PDOR_OFFSET)
#define KINETIS_GPIOA_PSOR (KINETIS_GPIOA_BASE+KINETIS_GPIO_PSOR_OFFSET)
#define KINETIS_GPIOA_PCOR (KINETIS_GPIOA_BASE+KINETIS_GPIO_PCOR_OFFSET)
#define KINETIS_GPIOA_PTOR (KINETIS_GPIOA_BASE+KINETIS_GPIO_PTOR_OFFSET)
#define KINETIS_GPIOA_PDIR (KINETIS_GPIOA_BASE+KINETIS_GPIO_PDIR_OFFSET)
#define KINETIS_GPIOA_PDDR (KINETIS_GPIOA_BASE+KINETIS_GPIO_PDDR_OFFSET)
#define KINETIS_GPIOB_PDOR (KINETIS_GPIOB_BASE+KINETIS_GPIO_PDOR_OFFSET)
#define KINETIS_GPIOB_PSOR (KINETIS_GPIOB_BASE+KINETIS_GPIO_PSOR_OFFSET)
#define KINETIS_GPIOB_PCOR (KINETIS_GPIOB_BASE+KINETIS_GPIO_PCOR_OFFSET)
#define KINETIS_GPIOB_PTOR (KINETIS_GPIOB_BASE+KINETIS_GPIO_PTOR_OFFSET)
#define KINETIS_GPIOB_PDIR (KINETIS_GPIOB_BASE+KINETIS_GPIO_PDIR_OFFSET)
#define KINETIS_GPIOB_PDDR (KINETIS_GPIOB_BASE+KINETIS_GPIO_PDDR_OFFSET)
#define KINETIS_GPIOC_PDOR (KINETIS_GPIOC_BASE+KINETIS_GPIO_PDOR_OFFSET)
#define KINETIS_GPIOC_PSOR (KINETIS_GPIOC_BASE+KINETIS_GPIO_PSOR_OFFSET)
#define KINETIS_GPIOC_PCOR (KINETIS_GPIOC_BASE+KINETIS_GPIO_PCOR_OFFSET)
#define KINETIS_GPIOC_PTOR (KINETIS_GPIOC_BASE+KINETIS_GPIO_PTOR_OFFSET)
#define KINETIS_GPIOC_PDIR (KINETIS_GPIOC_BASE+KINETIS_GPIO_PDIR_OFFSET)
#define KINETIS_GPIOC_PDDR (KINETIS_GPIOC_BASE+KINETIS_GPIO_PDDR_OFFSET)
#define KINETIS_GPIOD_PDOR (KINETIS_GPIOD_BASE+KINETIS_GPIO_PDOR_OFFSET)
#define KINETIS_GPIOD_PSOR (KINETIS_GPIOD_BASE+KINETIS_GPIO_PSOR_OFFSET)
#define KINETIS_GPIOD_PCOR (KINETIS_GPIOD_BASE+KINETIS_GPIO_PCOR_OFFSET)
#define KINETIS_GPIOD_PTOR (KINETIS_GPIOD_BASE+KINETIS_GPIO_PTOR_OFFSET)
#define KINETIS_GPIOD_PDIR (KINETIS_GPIOD_BASE+KINETIS_GPIO_PDIR_OFFSET)
#define KINETIS_GPIOD_PDDR (KINETIS_GPIOD_BASE+KINETIS_GPIO_PDDR_OFFSET)
#define KINETIS_GPIOE_PDOR (KINETIS_GPIOE_BASE+KINETIS_GPIO_PDOR_OFFSET)
#define KINETIS_GPIOE_PSOR (KINETIS_GPIOE_BASE+KINETIS_GPIO_PSOR_OFFSET)
#define KINETIS_GPIOE_PCOR (KINETIS_GPIOE_BASE+KINETIS_GPIO_PCOR_OFFSET)
#define KINETIS_GPIOE_PTOR (KINETIS_GPIOE_BASE+KINETIS_GPIO_PTOR_OFFSET)
#define KINETIS_GPIOE_PDIR (KINETIS_GPIOE_BASE+KINETIS_GPIO_PDIR_OFFSET)
#define KINETIS_GPIOE_PDDR (KINETIS_GPIOE_BASE+KINETIS_GPIO_PDDR_OFFSET)
/* Register Bit Definitions *********************************************************/
/* Port Data Output Register */
#define GPIO_PDOR(n) (1 << (n))
/* Port Set Output Register */
#define GPIO_PSOR(n) (1 << (n))
/* Port Clear Output Register */
#define GPIO_PCOR(n) (1 << (n))
/* Port Toggle Output Register */
#define GPIO_PTOR(n) (1 << (n))
/* Port Data Input Register */
#define GPIO_PDIR(n) (1 << (n))
/* Port Data Direction Register */
#define GPIO_PDDR(n) (1 << (n))
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_GPIO_H */
arch/arm/src/kinetis/kinetis_memorymap.h
+ 20
− 8
View file @ eef661e2
......@@ -161,10 +161,16 @@
# define KINETIS_DAC1_BASE 0x400cd000 /* 12-bit digital-to-analog converter (DAC) 1 */
# define KINETIS_UART4_BASE 0x400ea000 /* UART4 */
# define KINETIS_UART5_BASE 0x400eb000 /* UART5 */
# define KINETIS_XBAR_BASE 0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
* purpose input/output module that shares the
* crossbar switch slave port with the AIPS-Lite
* is accessed at this address. */
# define KINETIS_XBARSS_BASE 0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
* purpose input/output module that shares the
* crossbar switch slave port with the AIPS-Lite
* is accessed at this address. */
# define KINETIS_GPIO_BASE(n) (0x400ff000 + ((n) << 6))
# define KINETIS_GPIOA_BASE 0x400ff000 /* GPIO PORTA registers */
# define KINETIS_GPIOB_BASE 0x400ff040 /* GPIO PORTB registers */
# define KINETIS_GPIOC_BASE 0x400ff080 /* GPIO PORTC registers */
# define KINETIS_GPIOD_BASE 0x400ff0c0 /* GPIO PORTD registers */
# define KINETIS_GPIOE_BASE 0x400ff100 /* GPIO PORTE registers */
/* Private Peripheral Bus (PPB) Memory Map ******************************************/
......@@ -287,10 +293,16 @@
# define KINETIS_DAC1_BASE 0x400cd000 /* 12-bit digital-to-analog converter (DAC) 1 */
# define KINETIS_UART4_BASE 0x400ea000 /* UART4 */
# define KINETIS_UART5_BASE 0x400eb000 /* UART5 */
# define KINETIS_XBAR_BASE 0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
* purpose input/output module that shares the
* crossbar switch slave port with the AIPS-Lite
* is accessed at this address. */
# define KINETIS_XBARSS_BASE 0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
* purpose input/output module that shares the
* crossbar switch slave port with the AIPS-Lite
* is accessed at this address. */
# define KINETIS_GPIO_BASE(n) (0x400ff000 + ((n) << 6))
# define KINETIS_GPIOA_BASE 0x400ff000 /* GPIO PORTA registers */
# define KINETIS_GPIOB_BASE 0x400ff040 /* GPIO PORTB registers */
# define KINETIS_GPIOC_BASE 0x400ff080 /* GPIO PORTC registers */
# define KINETIS_GPIOD_BASE 0x400ff0c0 /* GPIO PORTD registers */
# define KINETIS_GPIOE_BASE 0x400ff100 /* GPIO PORTE registers */
/* Private Peripheral Bus (PPB) Memory Map ******************************************/
......
arch/arm/src/kinetis/kinetis_sim.h 0 → 100755
+ 545
− 0
View file @ eef661e2
This diff is collapsed.
arch/arm/src/kinetis/kinetis_smc.h 0 → 100755
+ 122
− 0
View file @ eef661e2
/************************************************************************************
* arch/arm/src/kinetis/kinetis_smc.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_SMC_H
#define __ARCH_ARM_SRC_KINETIS_KINETIS_SMC_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Register Offsets *****************************************************************/
#define KINETIS_SMC_SRSH_OFFSET 0x0000 /* System Reset Status Register High */
#define KINETIS_SMC_SRSL_OFFSET 0x0001 /* System Reset Status Register Low */
#define KINETIS_SMC_PMPROT_OFFSET 0x0002 /* Power Mode Protection Register */
#define KINETIS_SMC_PMCTRL_OFFSET 0x0003 /* Power Mode Control Register */
/* Register Addresses ***************************************************************/
#define KINETIS_SMC_SRSH (KINETIS_SMC_BASE+KINETIS_SMC_SRSH_OFFSET)
#define KINETIS_SMC_SRSL (KINETIS_SMC_BASE+KINETIS_SMC_SRSL_OFFSET)
#define KINETIS_SMC_PMPROT (KINETIS_SMC_BASE+KINETIS_SMC_PMPROT_OFFSET)
#define KINETIS_SMC_PMCTRL (KINETIS_SMC_BASE+KINETIS_SMC_PMCTRL_OFFSET)
/* Register Bit Definitions *********************************************************/
/* System Reset Status Register High */
#define SMC_SRSH_JTAG (1 << 0) /* Bit 0: JTAG generated reset */
#define SMC_SRSH_LOCKUP (1 << 1) /* Bit 1: Core Lock-up */
#define SMC_SRSH_SW (1 << 2) /* Bit 2: Software */
/* Bits 3-7: Reserved */
/* System Reset Status Register Low */
#define SMC_SRSL_WAKEUP (1 << 0) /* Bit 0: Low-leakage wakeup reset */
#define SMC_SRSL_LVD (1 << 1) /* Bit 1: Low-voltage detect reset */
#define SMC_SRSL_LOC (1 << 2) /* Bit 2: Loss-of-clock reset */
/* Bits 3-4: Reserved */
#define SMC_SRSL_COP (1 << 5) /* Bit 5: Computer Operating Properly (COP) Watchdog */
#define SMC_SRSL_PIN (1 << 6) /* Bit 6: External reset pin */
#define SMC_SRSL_POR (1 << 7) /* Bit 7: Power-on reset */
/* Power Mode Protection Register */
#define SMC_PMPROT_AVLLS1 (1 << 0) /* Bit 0: Allow very low leakage stop 1 mod */
#define SMC_PMPROT_AVLLS2 (1 << 1) /* Bit 1: Allow very low leakage stop 2 mode */
#define SMC_PMPROT_AVLLS3 (1 << 2) /* Bit 2: Allow Very Low Leakage Stop 3 Mode */
/* Bit 3: Reserved */
#define SMC_PMPROT_ALLS (1 << 4) /* Bit 4: Allow low leakage stop mode */
#define SMC_PMPROT_AVLP (1 << 5) /* Bit 5: Allow very low power modes */
/* Bits 6-7: Reserved */
/* Power Mode Control Register */
#define SMC_PMCTRL_LPLLSM_SHIFT (0) /* Bits 0-2: Low Power, Low Leakage Stop Mode */
#define SMC_PMCTRL_LPLLSM_MASK (7 << SMC_PMCTRL_LPLLSM_SHIFT)
# define SMC_PMCTRL_LPLLSM_NORMAL (0 << SMC_PMCTRL_LPLLSM_SHIFT) /* Normal stop */
# define SMC_PMCTRL_LPLLSM_VLPS (2 << SMC_PMCTRL_LPLLSM_SHIFT) /* Very low power stop */
# define SMC_PMCTRL_LPLLSM_LLS (3 << SMC_PMCTRL_LPLLSM_SHIFT) /* Low leakage stop */
# define SMC_PMCTRL_LPLLSM_VLLS3 (5 << SMC_PMCTRL_LPLLSM_SHIFT) /* Very low leakage stop 3 */
# define SMC_PMCTRL_LPLLSM_VLLS2 (6 << SMC_PMCTRL_LPLLSM_SHIFT) /* Very low leakage stop 2 */
# define SMC_PMCTRL_LPLLSM_VLLS1 (7 << SMC_PMCTRL_LPLLSM_SHIFT) /* Very low leakage stop 1 */
/* Bits 3-4: Reserved */
#define SMC_PMCTRL_RUNM_SHIFT (5) /* Bits 5-6: Run Mode Enable */
#define SMC_PMCTRL_RUNM_MASK (3 << SMC_PMCTRL_RUNM_SHIFT)
# define SMC_PMCTRL_RUNM_NORMAL (0 << SMC_PMCTRL_RUNM_SHIFT) /* Normal run mode */
# define SMC_PMCTRL_RUNM_VLP (2 << SMC_PMCTRL_RUNM_SHIFT) /* Very low power run mode */
#define SMC_PMCTRL_LPWUI (1 << 7) /* Bit 7: Low Power Wake Up on Interrupt */
/************************************************************************************
* Public Types
************************************************************************************/
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_SMC_H */
configs/kwikstik-k40/README.txt
+ 50
− 62
View file @ eef661e2
......@@ -253,68 +253,56 @@ KwikStik-K40-specific Configuration Options
the delay actually is 100 seconds.
Individual subsystems can be enabled:
AHB
---
CONFIG_KINETIS_DMA1
CONFIG_KINETIS_DMA2
CONFIG_KINETIS_CRC
CONFIG_KINETIS_FSMC
CONFIG_KINETIS_SDIO
APB1
----
CONFIG_KINETIS_TIM2
CONFIG_KINETIS_TIM3
CONFIG_KINETIS_TIM4
CONFIG_KINETIS_TIM5
CONFIG_KINETIS_TIM6
CONFIG_KINETIS_TIM7
CONFIG_KINETIS_WWDG
CONFIG_KINETIS_SPI2
CONFIG_KINETIS_SPI4
CONFIG_KINETIS_USART2
CONFIG_KINETIS_USART3
CONFIG_KINETIS_UART4
CONFIG_KINETIS_UART5
CONFIG_KINETIS_I2C1
CONFIG_KINETIS_I2C2
CONFIG_KINETIS_USB
CONFIG_KINETIS_CAN
CONFIG_KINETIS_BKP
CONFIG_KINETIS_PWR
CONFIG_KINETIS_DAC
CONFIG_KINETIS_USB
APB2
----
CONFIG_KINETIS_ADC1
CONFIG_KINETIS_ADC2
CONFIG_KINETIS_TIM1
CONFIG_KINETIS_SPI1
CONFIG_KINETIS_TIM8
CONFIG_KINETIS_USART1
CONFIG_KINETIS_ADC3
Alternate pin mappings (should not be used with the KwikStik-K40 board):
CONFIG_KINETIS_TIM1_FULL_REMAP
CONFIG_KINETIS_TIM1_PARTIAL_REMAP
CONFIG_KINETIS_TIM2_FULL_REMAP
CONFIG_KINETIS_TIM2_PARTIAL_REMAP_1
CONFIG_KINETIS_TIM2_PARTIAL_REMAP_2
CONFIG_KINETIS_TIM3_FULL_REMAP
CONFIG_KINETIS_TIM3_PARTIAL_REMAP
CONFIG_KINETIS_TIM4_REMAP
CONFIG_KINETIS_USART1_REMAP
CONFIG_KINETIS_USART2_REMAP
CONFIG_KINETIS_USART3_FULL_REMAP
CONFIG_KINETIS_USART3_PARTIAL_REMAP
CONFIG_KINETIS_SPI1_REMAP
CONFIG_KINETIS_SPI3_REMAP
CONFIG_KINETIS_I2C1_REMAP
CONFIG_KINETIS_CAN1_FULL_REMAP
CONFIG_KINETIS_CAN1_PARTIAL_REMAP
CONFIG_KINETIS_CAN2_REMAP
CONFIG_KINETIS_UART0
CONFIG_KINETIS_UART1
CONFIG_KINETIS_UART2
CONFIG_KINETIS_UART3
CONFIG_KINETIS_UART4
CONFIG_KINETIS_UART5
CONFIG_KINETIS_ETHERNET (K60 only)
CONFIG_KINETIS_RNGB (K60 only)
CONFIG_KINETIS_FLEXCAN0
CONFIG_KINETIS_FLEXCAN1
CONFIG_KINETIS_SPI0
CONFIG_KINETIS_SPI1
CONFIG_KINETIS_SPI2
CONFIG_KINETIS_I2C0
CONFIG_KINETIS_I2C1
CONFIG_KINETIS_I2S
CONFIG_KINETIS_DAC0
CONFIG_KINETIS_DAC1
CONFIG_KINETIS_ADC0
CONFIG_KINETIS_ADC1
CONFIG_KINETIS_CMP
CONFIG_KINETIS_VREF
CONFIG_KINETIS_SDHC
CONFIG_KINETIS_FTM0
CONFIG_KINETIS_FTM1
CONFIG_KINETIS_FTM2
CONFIG_KINETIS_LPTIMER
CONFIG_KINETIS_RTC
CONFIG_KINETIS_SLCD (K40 only)
CONFIG_KINETIS_EWM
CONFIG_KINETIS_CMT
CONFIG_KINETIS_USBOTG
CONFIG_KINETIS_USBDCD
CONFIG_KINETIS_LLWU
CONFIG_KINETIS_REGFILE
CONFIG_KINETIS_TSI
CONFIG_KINETIS_PORTA
CONFIG_KINETIS_PORTB
CONFIG_KINETIS_PORTC
CONFIG_KINETIS_PORTD
CONFIG_KINETIS_PORTE
CONFIG_KINETIS_FTFL
CONFIG_KINETIS_DMA
CONFIG_KINETIS_DMAMUX
CONFIG_KINETIS_CRC
CONFIG_KINETIS_PDB
CONFIG_KINETIS_PIT
CONFIG_KINETIS_FLEXBUS
CONFIG_KINETIS_MPU
Kinetis K40 specific device driver settings
......
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment