SAMDL DMA fixes and experimental SPI support

* SAMDL: Fix DMA controller support

* SAMDL: Added experimental DMA support to SPI driver. spi_exchange() uses a pair of DMA channels for TX and RX

Approved-by: Gregory Nutt <gnutt@nuttx.org>

disable LPC17 FDR when not used (second fix)

if a boot loader sets the fractional divider (FDR) the baud rate in
nuttx will be wrong (multiplied by this fraction).

This also has to be added to lpc17_lowputc.c

Unfortunately the constant used for shifting the bits was wrong in the header file, so it took some time to realize this...

Approved-by: Gregory Nutt <gnutt@nuttx.org>

Master

stm32_hritm: add interface to set timer frequency, fix slave timers reset configuration, change POWER_INFO to TIMER_INFO

Approved-by: Gregory Nutt <gnutt@nuttx.org>

SAMDL: Added loading factory USB calibration data from NVRAM

Approved-by: Gregory Nutt <gnutt@nuttx.org>

SAMDL: Fix EIC interrupt edge sensitivity for pin numbers > 8

Approved-by: Gregory Nutt <gnutt@nuttx.org>

SAMDL: Added FDPLL clock support. Fixed sequence of OSC32K calibration setup

* SAMDL: Added FDPLL clock support. Fixed sequence of OSC32K calibration setup

* fixed code style

Approved-by: Gregory Nutt <gnutt@nuttx.org>

    configs/flipnclick-pic32mz:  Add an nxlines configuration for use in testing the custom HiletGo Click board.
    arch/mips/src/pic32mz:  Correct some SPI-related typos.  configs/flipnclick-pic32mz: Finishes integration of HiletGo OLED. drivers/lcd:  Finish support for HiletGo OLED.
    drivers/lcd:  Add configuration support for HiletGo OLED.  configs/flipnclick-pic32mz:  Add board support for HiletGo OLED.

arch/mips/src/mips32:  In up_idle, the kludge that was conditionally enabled if the work queue was enable appears to be needed even when he work queue is not enabled on the PIC32MZ.

arch/mips/src/pic32mz: Fix some typos in debug instrumentation in pic32mz-gpio.c; fix some types releated to UART5 configuration in pic32mz-serial.c.

configs/flipnclick-pic32mz/nsh:  Switch serial console to UART3.  There is some problem with the UART4 RX pin documentation or configuration.

disable LPC17 FDR when not used

* disable LPC17 FDR when not used

    if a boot loader set the fractional divider (FDR) the baud rate in
    nuttx will be wrong (multiplied by this fraction).

    So if it is not used, it should be disabled.

    LPC176x docs say:
    "
    DIVADDVAL Baud-rate generation pre-scaler divisor value.
    If this field is 0, fractional baud-rate generator will
    not impact the UARTn baudrate.

    MULVAL Baud-rate pre-scaler multiplier value.
    This field must be greater or equal 1 for UARTn to operate properly,
    regardless of whether the fractional baud-rate generator is used or not.
    "

    So DIVADDVAL is set to 0 and MULVAL is set to 1.

* symbols found and added

Approved-by: Gregory Nutt <gnutt@nuttx.org>

sched/task:  It is not appropriate for logic in task_exit() to call the new version of this_task().  sched/irq:  Remove redundant fetch of CPU index; configs/sabre-6qguad: update README.

sched/sched: sched_lock() and sched_unlock().. back out some changes I made recently.  The seemed correct but apparently not.  Also reorder to logic so that g_global_lockcount is incremented for the very minimum amount of time.

sched/ and arch/arm/src/armv7-a:  Replace a few more occurrences of this_task() with current_task(cpu) in an effort to get the i.MX6 working in SMP mode again.  It does not yet work, sadly.

arch/arm/src/armv7-a:  Found some additional places were the new this_task() function cannot be called in the i.MX6 SMP configuration.

sched/irq: Fix a infinite recursion problem that a recent change introduced into the i.MX6 SMP implementation.

sched/irq:  Fix an error in a assertion introduced in commit 37c9b3d5.  Noted by Masayuki Ishikawa.

sched/sched:  Extend the last global lock change to work with the lc823450-xgevk which does not support the atomic fetch add but does support disabling interprocessor interrupts.  Disabling interprocessor interrupts will also guarantee that the TCB addres calculation is atomic.

sched/sched:  Implements a global scheduler lock capability as part of SMP support.  This allows the scheduler to be locked with no knowledge or access to the TCB of the currently running task.  This is necessary because accessing the TCB of the currenlty running task is, itself, a non-atomic operation.  This global scheduler lock cpability was add just to support that atomic access to the TCB.

sched/sched:  Clean up some logic that I committed yesterday.  Add more comments and conditional logic to clarify the issues.

configs/stm32f429i-disco: Separate SPI4 from MTD init.  I was trying to attach a non-MTD peripheral to an STM32F429I Discovery Board's SPI4 port and was hitting compilation problems, since CONFIG_MTD and thus 'struct mtd_geometry_s' was not defined.  This patch separates SPI4 initialization logic from MTD initialization logic.

sched/sched:  SMP: Fix this_task() to be an atomic operation.  In the previous implementation, this_task() was defined in sched.h by using just a macro current_task(this_cpu()).  However, I found that this is not atomic and actually sometimes switching CPU happened in executing the macro when we tested audio steaming plus executing commands via telnet.  This change resolves this issue by implementing atomic this_task()in sched_thistask.c which is newly introduced.

spin_lock_irqsave() and spin_unlock_irqrestore() are only valid if the CPU supports global disabling of interrupts.