i.MX6 UART: Update periperal clock logic; Remove use of UART bits from i.MX1 that don't exist in i.MX6

When using QUEUE mode sometimes the counting semaphore indicates there is no space left in the TX buffers, but in fact there is.  This leads to a situation, where all TX buffers are empty and the driver
still waits for space in the buffers.  The switch from QUEUE mode to FIFO mode is just a workarround to make the semaphore counting self repairing.

The Error reporting is changed due to some Error Interrupts not reporting states, they are reporting state changes. To keep this into Account the static Error conditions like WARNING, PASSIVE or BUS_OFF are filled in
every time.

i.MX6:  Bring i.MX1 serial driver into i.MX6.  Basically the same IP but does not yet compile due to some small differences, missign GPIO configuration logic, and missing clocking logic

SAMV7 USBHS Device: Reorder some interrupt handling logic to avoid losing an interrupt and to avoid a race condition