STM32: Fix STM32F100CB pin configuration (from Kosma Moczek); and make chip naming a little more consistent

STM32:  Add more complication to STM32 Kconfig so the correct RNG and ETHMAC options presented for the F401RE.  There are still invalid peripheral options being presented

Nucleo-F401RE:  With these changes and the changes from previous commits, the basic Nucleo-F401RE NSH configuration is working.

The Nucleo-F401RE has no on-board cystal and, hence, must use the on-chip HSI oscillator for the PLL include clock

STM32:  Add more complication to STM32 Kconfig so the correct ADC and CAN options presented for the F401RE.  There are still invalid peripheral options being presented

STM32:  Add some complication to STM32 Kconfig so the correct USART and TIM options are presented for the F401RE.  There are still invalid peripheral options being presented

Fix configuration for F401:  It has has FSMC and so the option should not be offered.  But there are many more options available for the F401 that should be availalbe:  CAN, nonexistent timers, etc.  These will all need to be addressed

STM32:  More places where up_prioritize_irq is called when CONFIG_ARCH_IRQPRIO is not defined.  Sourceforge ticket #26

Sourceforge ticket #26: STM32 up_prioritize_irq should not be called if CONFIG_ARCH_IRQPRIO is not defined

Fix Bob's name in as many places as possible; Make sure that Bob is an author in as many files as I can think of (might be missing a few)