Commits · 20b1b584e74b2e6c5eeb79b3c0650185b03553dd · f4grx / NuttX RTOS · GitLab

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Aug 25, 2013
- Network ARP harvesting: Corect backward condition in netmask task. From Max Holtzberg · 20b1b584
  Gregory Nutt authored Aug 25, 2013
  
  20b1b584
Aug 24, 2013
- SAMA5D3x-EK: Fix some backward conditional compilation · 0582148c
  Gregory Nutt authored Aug 24, 2013
  
  0582148c
- SAMA5: OHCI various bugfixes for interrupt handling · 5f78f699
  Gregory Nutt authored Aug 24, 2013
  
  5f78f699
- SAMA5: EHCI now handles low- and full-speed connections by giving them to... · cd84d1be
  Gregory Nutt authored Aug 24, 2013
  cd84d1be
- SAMA5 EHCI: Added logic to detect port speed. Handling is insufficient · 9d0f5043
  Gregory Nutt authored Aug 24, 2013
  
  9d0f5043
Aug 23, 2013
- Fix #endif with missing #if condition. Reported by Andrew Bradford · 2d5313a9
  Gregory Nutt authored Aug 23, 2013
  
  2d5313a9
- SAMA5/ECHI: Debug register access, add logic to determine transfer size, fix... · 7c5f8c86
  Gregory Nutt authored Aug 23, 2013
  7c5f8c86
- SourceForge bug #16 Fix IO pin map. Add CONFIG_SERIAL_TERMIOS support. From CCTSAO · db1b3c42
  Gregory Nutt authored Aug 23, 2013
  
  db1b3c42
- SAMA5 EHCI: cosmetic changes · bdc7d052
  Gregory Nutt authored Aug 23, 2013
  
  bdc7d052
- SAMA5: Add support for sharing ports when both OHCI and EHCI are enabled · 9a109ba4
  Gregory Nutt authored Aug 23, 2013
  
  9a109ba4
- SAMA5 EHCI: Fix some list traversal bugs · 2b3fd9e9
  Gregory Nutt authored Aug 22, 2013
  
  2b3fd9e9
Aug 22, 2013
- SAMA5 EHCI: Initial debug changes · eef0f392
  Gregory Nutt authored Aug 22, 2013
  
  eef0f392
- SAMA5 EHCI: No complete for bulk and control endpoints · f356586f
  Gregory Nutt authored Aug 22, 2013
  
  f356586f
- SAMA5 EHCI: Add data transfer logic for asynchronous endpoints · 577b1992
  Gregory Nutt authored Aug 22, 2013
  
  577b1992
- SAMA5 EHCI: Add IOC error handling · c1c5e195
  Gregory Nutt authored Aug 22, 2013
  
  c1c5e195
Aug 21, 2013
- SAMA5 EHCI: transfer termination logic. Incomplete · 7e9832f9
  Gregory Nutt authored Aug 21, 2013
  
  7e9832f9
- SAMA5 EHCI: Hardware initialization logic · a5eb8305
  Gregory Nutt authored Aug 21, 2013
  
  a5eb8305
- Move all SAMA5 EHCI interrupt handling to the worker thread · b1864a99
  Gregory Nutt authored Aug 21, 2013
  
  b1864a99
- ENC28J60 errors reported by Max Holtzberg · e5208a6e
  Gregory Nutt authored Aug 21, 2013
  
  e5208a6e
- SAMA5 EHCI: At list-oriented cache operations · 85aa2c1a
  Gregory Nutt authored Aug 20, 2013
  
  85aa2c1a
Aug 20, 2013
- Add SAMA5 EHCI list traversal logic · 0f2ce573
  Gregory Nutt authored Aug 20, 2013
  
  0f2ce573
- Beginning of support for SAMA5 EHCI. Not much there yet · 320a2e2a
  Gregory Nutt authored Aug 20, 2013
  
  320a2e2a
- Add kernel/user memalign functions. Not fully integrated · e3a76b2e
  Gregory Nutt authored Aug 20, 2013
  
  e3a76b2e
Aug 19, 2013
- SAMA5 OHCI+EHCI mostly cosmetic changes · b04ea3ef
  Gregory Nutt authored Aug 19, 2013
  
  b04ea3ef
Aug 18, 2013
- USB host: Add device address management support in preparation for USB hub support · 19d7c90d
  Gregory Nutt authored Aug 18, 2013
  
  19d7c90d
- Add few more EHCI definitions · 0524688c
  Gregory Nutt authored Aug 18, 2013
  
  0524688c
- Completes EHCI header file · 44dd71de
  Gregory Nutt authored Aug 18, 2013
  
  44dd71de
- STM32 F1 I2C: Fix a typo that crept in with some recent changes. From Yiran Liao · dc07d65e
  Gregory Nutt authored Aug 18, 2013
  
  dc07d65e
Aug 17, 2013
- Add EHCI header file (not quite complete) · e2f68ac8
  Gregory Nutt authored Aug 17, 2013
  
  e2f68ac8
Aug 16, 2013
- SAMA5 OHCI: Driver is now basically functional · 11086f34
  Gregory Nutt authored Aug 16, 2013
  
  11086f34
- SAMA5 OHCI: Re-organize some endpoint list data structures.. Strange things... · 1fb80e09
  Gregory Nutt authored Aug 16, 2013
  1fb80e09
- STM32 SPI: nbits interface extended to handle LSB- or MSB-first operation. From Teemu Pirinen · 10daf069
  Gregory Nutt authored Aug 16, 2013
  
  10daf069
Aug 15, 2013
- SAMA5 OHCI: Don't prealloc RH port TDs and EDs. Allocate from a free list like other cases · ca739ce7
  Gregory Nutt authored Aug 15, 2013
  
  ca739ce7
- SAMA5 OHCI: Fix errors in cache handling; Don't add ED to control list until port is connected · 7f733b04
  Gregory Nutt authored Aug 15, 2013
  
  7f733b04
- SAMA5: Correct the PLL 48MHz divisor. It was off by a factor of two... no idea why · 37163963
  Gregory Nutt authored Aug 14, 2013
  
  37163963
Aug 14, 2013
- SAMA5: ports should not be reset state (seems to make no difference) · 0098c9ec
  Gregory Nutt authored Aug 14, 2013
  
  0098c9ec
- SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed... · fe73fe2e
  Gregory Nutt authored Aug 14, 2013
  fe73fe2e
- SAMA5: Fix out of range USB PLL divisor · 152a5e6d
  Gregory Nutt authored Aug 14, 2013
  
  152a5e6d
- SAMA5 OHCI: Use physical address and flush and/or invalidate data caches as necessary · 79d52390
  Gregory Nutt authored Aug 14, 2013
  
  79d52390
Aug 13, 2013
- Clean up some LP17xx and STM32 USB host configuration compilation errors due... · 16ac25fd
  Gregory Nutt authored Aug 13, 2013
  16ac25fd

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