LPC17xx:  Prioritized interrupts are not supported (although hooks are present to prioritize interrupts).  Make LPC17 Ethernet default priority to be the system default, not the highest.  If the unsupported feature is enabled, then at least it should do no harm

LPC17xx, TIVA, and Kinetis interrupt initialization:  use the NVIC ICTR register to determine how many interrupt lines/registers are supported by the MCU

Move the un-definitions of __ramfuncs__ from the sam_clockconfig.c to the common up_internal.h header file so that the attribute will be applied the same to function definitions and prototypes.

SAMA5 TWI: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals

SAMA5 SSC: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals

SAMA5 EMAC/GMAC: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals

SAMA5 CAN: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals

SAMA5 ADC: If running from SDRAM, BOARD_MCK_FREQUENCY is not a constant and cannot be used in pre-processor conditionals

examples/touchscreen:  Add a configuration option to indicate that there is or is not an architecture-specific initialization function

Add logic for TM4C125GXL clocking based on prototype from from Daniel Carvalho with modifications. I think the LM4F120 may have broken before as well(?).  In any event, the LM4F120 also works well with this chanage

SAMA5 UDPHS: Fix error where bit was not cleared to acknowledge receipt of data and to setup for the next incoming data

SAMA5 clocking:  USB clock setup needs to be done no matter the state of BMS and not matter how we are booting

Kconfig:  Remove warnings.  ARCH_RAMFUNCS depends on ARCH_HAVE_RAMFUNCS, so it is not possible to select ARCH_RAMFUNCS wihtout ARCH_HAVE_RAMFUNCS