Commits · 3af6b2a9a6207276f49b0c2f60852d6c1e4d2ace · f4grx / NuttX RTOS · GitLab

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Dec 25, 2016
- Update a comment · 3af6b2a9
  Gregory Nutt authored Dec 24, 2016
  
  3af6b2a9
- SMP: Fix logic error in last change: Deferred restoration of IRQ lock only... · f55bad86
  Gregory Nutt authored Dec 24, 2016
  f55bad86
Dec 24, 2016
- sched note: record ID enumeration now results on constant values; ID values do... · 9e8b1f32
  Gregory Nutt authored Dec 24, 2016
  9e8b1f32
- SMP sched_unlock: Should merging depend on g_cpu_irqlock or not? Let's at... · 36b676ee
  Gregory Nutt authored Dec 24, 2016
  36b676ee
- Update README · c5bb7179
  Gregory Nutt authored Dec 24, 2016
  
  c5bb7179
- Xtensa ESP32: Update some stack sizes · 4f4242ef
  Gregory Nutt authored Dec 24, 2016
  
  4f4242ef
Dec 23, 2016
- Xtensa ESP32: Add stack checking logic. · 1b790a61
  Gregory Nutt authored Dec 23, 2016
  
  1b790a61
- Merge remote-tracking branch 'origin/master' into irqlock · b262c6be
  Gregory Nutt authored Dec 23, 2016
  
  b262c6be
- Some trivial, cosmetic changes for irqlock branch · f3d755c1
  Gregory Nutt authored Dec 23, 2016
  
  f3d755c1
- Fix a trivial typo · d75a7643
  Gregory Nutt authored Dec 23, 2016
  
  d75a7643
- Implement deferred IRQ locking. The rest of the support for Xtensa. Untested. · c7f54356
  Gregory Nutt authored Dec 23, 2016
  
  c7f54356
- AMV7: CAN: Make delete_filter functions more robust · 29cf2eb3
  Frank Benkert authored Dec 23, 2016
  
  29cf2eb3
- Implement deferred IRQ locking. Adds partial support for Xtensa. More is needed. · cb1cc66d
  Gregory Nutt authored Dec 23, 2016
  
  cb1cc66d
- Implement deferred IRQ locking. Adds support for simulator. · 9f7ba21f
  Gregory Nutt authored Dec 23, 2016
  
  9f7ba21f
- ARMv7-A: Small improvement to some register handling in context restoration. · 729ee7c0
  Gregory Nutt authored Dec 23, 2016
  
  729ee7c0
- Fix a couple of errors in the last commit · d9ef0e86
  Gregory Nutt authored Dec 23, 2016
  
  d9ef0e86
- Implement deferred IRQ locking. Adds support for ARMv7-A. · c00a1870
  Gregory Nutt authored Dec 23, 2016
  
  c00a1870
- Implement deferred IRQ locking. So far only form ARMv7-M. · e6fff09e
  Gregory Nutt authored Dec 23, 2016
  
  e6fff09e
Dec 22, 2016
- Xtensa ESP32: Correct copyright info; update some comments · 5f9caad0
  Gregory Nutt authored Dec 22, 2016
  
  5f9caad0
- Xtensa ESP32: Corrects a problem with dispatching to signal handlers: Cannot... · 714e6f80
  Gregory Nutt authored Dec 22, 2016
  714e6f80
- Xtensa ESP32: Some fixes from integration of ostest configuration. Almost... · d9a64b9c
  Gregory Nutt authored Dec 22, 2016
  d9a64b9c
- Xtensa ESP32: Add an OS test to verify the port. · 2b5235e9
  Gregory Nutt authored Dec 22, 2016
  
  2b5235e9
Dec 21, 2016
- All CMP platforms: Apply same fix verified on other platforms found on Xtensa. · fb146abe
  Gregory Nutt authored Dec 21, 2016
  
  fb146abe
- Xtensa SMP: Avoid a nasty situation in SMP by assuring that up_release_pending() is not re-entered. · 733a57b4
  Gregory Nutt authored Dec 21, 2016
  
  733a57b4
- Olimex STM32 P407: Has only 128KiB of contiguous RAM. Exclude CCM memory for now. · c1e26065
  Gregory Nutt authored Dec 21, 2016
  
  c1e26065
- Olimex STM32 P407: Hmmm.. board does not boot. Simplifying the configuration does not help. · 81c1466d
  Gregory Nutt authored Dec 21, 2016
  
  81c1466d
- Merge in support for the Olimex STM32 P407 board · 7e075bab
  Gregory Nutt authored Dec 21, 2016
  
  7e075bab
- Olimex STM32 P407: Update clocking using STM3250G; Verify GPIOs. · f8f2c004
  Gregory Nutt authored Dec 21, 2016
  
  f8f2c004
- Xtensa ESP32: Oddly, an rsync barrier when writing to co-processor register corrects problem. · 588d2b50
  Gregory Nutt authored Dec 21, 2016
  
  588d2b50
- Eliminate a warning · 1b7162a0
  Gregory Nutt authored Dec 21, 2016
  
  1b7162a0
- Olimex STM32-P407: Add an stm32_bringup.c file like most newer configurations. · 41eda13c
  Gregory Nutt authored Dec 20, 2016
  
  41eda13c
Dec 20, 2016
- Olimex STM32-P407: Initial clone from Olimex STM32-P207 · 764b9f46
  Gregory Nutt authored Dec 20, 2016
  
  764b9f46
- Xtensa ESP32: Clock frequency is different if running from IRAM or is booting... · 89c33e97
  Geoffrey authored Dec 20, 2016
  89c33e97
- Refresh some configurations · 59c5ae3e
  Gregory Nutt authored Dec 20, 2016
  
  59c5ae3e
- Fix procfs status for SMP case. · 57d8a437
  Gregory Nutt authored Dec 20, 2016
  
  57d8a437
- Xtensa ESP32: Fix APP CPU startup... Can't use semaphores on the IDLE thread. · 81697f22
  Gregory Nutt authored Dec 20, 2016
  
  81697f22
- Xtensa ESP32: A few fixes for APP CPU start-up · 6d5a718b
  Gregory Nutt authored Dec 20, 2016
  
  6d5a718b
- Update README · 404925d9
  Gregory Nutt authored Dec 20, 2016
  
  404925d9
- Xtensa ESP32: Update APP CPU startup logic to match current Expressif example code. · 4e9a0ffe
  Gregory Nutt authored Dec 20, 2016
  
  4e9a0ffe
- Xtensa ESP32: Missing prologue/epilogue macros on C callable function · 3b681586
  Gregory Nutt authored Dec 20, 2016
  
  3b681586

Documentation Code Eelctrolab