- Jul 15, 2016
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Young authored
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Gregory Nutt authored
Prototype versions of ptmx/pty suppoprt. Still under developement; not yet hooked into build or configuration system.
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David Alessio authored
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Gregory Nutt authored
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Wolfgang Reissnegger authored
Per documentation SAM4S and SAM4E have the BMR register values as they are already defined. No need for chip specific values. In addition: - CONFIG_ARCH_CHIP_SAM4s has wrong lower case 's' so the definitions would not be used anyways for SAM4S builds. - TC_BMR_TC2XC2S_TIOA2 does not make sense. There is no way to loop back TC2's TIOA2 into itself.
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- Jul 14, 2016
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Gregory Nutt authored
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Ken Pettit authored
SMART MTD layer: Fixes freesector logic error when sectorsPerBlk=256, adds DEBUGASSERT for invalid geometry and additional memory debug logic. Also fixes the dangling pointer on error bug.
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Gregory Nutt authored
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Gregory Nutt authored
If CONFIG_SPIFI_SECTOR512 undefined, lpc43_bwrite doesn't do actual write (probably copy/paste errors). Still not sure about current state of lpc43_spifi implementation, but for me NXFFS works with this patch. From Vytautas Lukenskas.
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Gregory Nutt authored
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Pierre-noel Bouteville authored
I'm using syslog through ITM. In this case syslog_channel function is call before ram initialisation in stm32_clockconfig. But syslog channel uses a global variable that is reset to default by the RAM initialization.
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- Jul 13, 2016
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Gregory Nutt authored
port foward bugfix from stm32 of oneshot timer
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ziggurat29 authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Max Neklyudov authored
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Max Neklyudov authored
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Gregory Nutt authored
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Stefan Kolb authored
This commit solves a problem which causes data loss while sending data via USB. This problem is caused by an incorrect handling of the endpoint state in the USB driver sam_usbdevhs. This leads under some circumstances to situations in which an DMA transfer is setup while a previous DMA transfer is currently active. Amongst other things I introduced the new endpoint state USBHS_EPSTATE_SENDING_DMA for the fix. To reproduce the problem, I used a program which send as many data as possible via a CDC/ACM device and verified the received data on the PC.
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Gregory Nutt authored
Kinetis and Freedom-K64F: Remove unused configuration variable; fix some compile issues; SDHC is now enabled in the nsh configuration (but does not work)
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Gregory Nutt authored
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Gregory Nutt authored
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ziggurat29 authored
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Sebastien Lorquet authored
STM32L4 Serial: Remove some STM32Fxxx conditional logic; fix a link error resulting from an over-aggressive rename.
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Gregory Nutt authored
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- Jul 12, 2016
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Ken Pettit authored
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Sebastien Lorquet authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
Kinetis Ethernet and Freedcom-K64F: PHY address was wrong. Modified driver to try all PHY addresses and then only fail if the driver cannot find a usable PHY address. MDIO pin must have an internal pull-up on the Freedom-K64F.
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ziggurat29 authored
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Gregory Nutt authored
fixes to n25qxxx mtd driver for smartfs support, etc...
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ziggurat29 authored
update stm32l476 disco to include init code for smartfs and nxffs for cases where those fs are included in build.
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ziggurat29 authored
alter the notion of 'blocksize' to be equivalent to 'flash write page size' in order to align with assumptions in the smartfs driver (at least, maybe other things do as well). Correct a bug that was previously masked by having blocksize=eraseblocksize which would cause buffer overflows and delicious hardfaults. Trivial spelling changes in comments, etc.
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Sebastien Lorquet authored
Before accessing the sst26 flash, the "Global Unlock" command must me executed, which I do in the sst26 driver. BUT. re-reading the datasheet, the WREN instruction is required to enable the execution of this command. This was not done. I have no idea how the driver currently works except by chance. The writes should never happen at all, the flash is half-enabled!
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Gregory Nutt authored
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