6LoWPAN: I believe, based on RFC review, that with the last multicast change, the NuttX 6LoWPAN is now compliant with RFC 6282.

Update/fix last commit:  On some STM32's, the CSR regiser is 18 vs. 16 bits wide.  Need to use 32-bit register accesses.

sem_open() should return SEM_FAILED on any failures.  This is change change in the POSIX specification since the original sem_open() was written so many years ago.

STM32L4: ADC, Kconfig small changes

* STM32L4 ADC: port analog watchdog ioctls from the Motorola MDK

* STM32L4: Kconfig: add some L486 and L496 chips, remove duplicates

Approved-by: Gregory Nutt <gnutt@nuttx.org>

waitpid():  Corrects two problems when CONFIG_SCHED_HAVE_PARENT+CONFIG_SCHED_CHILD_STATUS are enabled:  (1) Was erroring out if the waited for task had already exited, and (2) was not freeing resources when a wait was completed.

Master

* stm32f33xxx_hrtim.h: add some comments

* stm32_hrtim: add burst mode configuration, rename some definitions

* smps.h: add private data to the smps_s structure

* stm32_hrtim: cosmetics

Approved-by: Gregory Nutt <gnutt@nuttx.org>

Kinetis: First cut implementation of the alarm read function.  Pretty simple because the Kinetis RTC is just a 1Hz counter.

Correct naming of fields in struct alm_rdalarm_s.  Should not be the same as the corresponding fields of struct alm_setalarm_s.  The whole purpose of that naming convention is to keep the field names unique.

Add hooks for Boris Astardzhiev's RTC change for STM32L4 to Kinetis. Lower level logic not yet implemented.

Extend the RTC framework with an alarm read ioctl (RTC_RD_ALARM). Through it consumer could get configuration settings about previously scheduled hardware alarms (active status, hours, minutes, seconds).

Master

* stm32_dac.c: fix compilation when DMA disabled for channel

* smps.h: update some comments

* smps.c: more sanity checks

Approved-by: Gregory Nutt <gnutt@nuttx.org>

networking:  IGMP: Remove special support for interrupt level processing (there is none) and fix some timer cancellation logic.  In many files, correct comments.  There is no interrupt level processing in the networking layer.

stm32f7: do not enable read-modify-write on DTCM.  "AN 4667 - STM32F7 Series system architecture and performance" recommends to disable read-modify-write on DTCM: "If the DTCM-RAM is used as data location and the variables used are byte or/and halfword types, since there is no ECC management in this RAM on the STM32F7 Series, it is recommended to disable the read-modify-write of the DTCM-RAM in the DTCM interface (inthe DTCMCR register) to increase the performance."

Some STM32L4 DAC changes

Approved-by: Gregory Nutt <gnutt@nuttx.org>

net_timedwait() and net_lockedwait() no longer return errors via errno but returned negated errno values like other internal OS functions.

Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>

User should not be bothered by details like how many IP blocks there are. As no
current STM32L4 has second DAC block (channel 3), remove support for such
hypothetical hardware. DMA channels corrected.

Change-Id: I2cba7e55803871f1ff945538113f12cf5088f68d
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>

Change-Id: Ibc6dc90b39b784b5534b8908eaf615bf1ddcb7ed
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>

Actually write something to the DAC DMA buffer.

Change-Id: I1b2516ac26fb17f5242611b56be8926c5f40c2c7
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>