Upstream_446

SAMV7 QSPI: Add framework for a  QSPI driver.  Initial commit is just the SPI driver with some name changes

SAMV7 USBHS Device:  After aligning DMA buffers and disabling write-back data cache, the DCD driver is fully functional using the CDC/ACM device

All ARMV7-M IRQ setup:  Always set the NVIC vector table address.  This is needed in cases where the code is running with a bootload and when the code is running from RAM.  It is also needed by the logic of up_ramvec_initialize() which gets the vector base address from the NVIC.  Suggested by Pavel Pisa

This fix allows to run NuttX from SRAM or to place it after bootloader when run from Flash.  From Pavel Pisa

STM32: Fix eth mem leak in recvframe

SAMV7 MCAN: When bitrate is changed, the MCAN has to be reset and there are lots of issues related to getting back to a healthy state if there is multithreaded access to the MCAN device.  This commit handles a few of those issues, but there are more

Added definitions for STM32F303K6, STM32F303K8, STM32F303C6, STM32F303C8, STM32F303RD, and STM32F303RE devices.

STM32F303C8, STM32F303RD, and STM32F303RE devices.

SAMV7 USB device: Fix base address of USBHS RAM; remove a bad assertion; fix clearing of endpoint interrupts

SAMV71 MCAN: Change Kconfig so that zero is no longer the default value for the size of RXFIFO0, RXFIFO1, and TXFIFIQ.  In fact, zero is not an illegal value

SAMV7 SPI slave:  Loop in the interrupt handler; RDRF and TXNE events should occur very closely in time