SAMA5D OHCI: Remove a local variable that is unused when debug is disabled; refresh a configuration.  Update a README

Olimex LPC1766STK: The USB host waiter stack should be configurable because it needs to be a lot depending when using a hub

LPC31 and SAMA5Dx EHCI drivers: Fix cache related problem.  All buffers are now aligned with the cache line size in both starting address and in length.  This cause major problems in unlucky builds where the USB host buffers where unaligned and abbutting other data.  The cache flush and invalidate operations could be subverted by acceses to adjacent data or could have unexpected side effects.  This bug has been in the ECHI drivers forever, but was only revealed due to unlucky memory allocations during the integration of the hub feature.

USB host: If the implementation of the disconnect method frees the EP0 endpoint, then it must nullify it in the port structure

STM32 USB device.  Add protection in the event that out-of-bound enpoint numbers are received.  From David Sidrane.

USB host:  Need to include the port structure when disconnecting, otherwise may destroy a root hub port

LPC17 GPIO:  Reorder steps when an output GPIO is configured in order to avoid transient bad values from being output.  From Hal Glenn.

SAM PIO: sam_pio.h needs to include chip/sam_memorymap.h in order to resolve some conditional logic properly

Added missing EXTI definitions for the STM32 F3; Correct an error the port D base address in the STM32 F3 and F37 memory maps.  From Greg Meiste.

EFM32 USB host: Add missing trace data and some missing connection-related logic; update a configuration

USB HUB: Fix a deadlock that can occur if the HCD and the HUB try to share the high priority work queue.  Now how work must be done on the low priority work queue.

STM32 PVD: Adds support for STM32's Programmable Voltage Detector feature. I put register access behind CONFIG_STM32_ENERGYLITE as have not checked F1/F2/F4 etc. manuals. Tested on STM32L1. PVD interrupt looks generic, at least #defines it needs are in headers for every chip variant.  By Dmitry Nikolaev, submitted by Juha Niskanen.