Add support for the new DMA2D features to the STM32F429i-Disco LTDC configuration.  From Marco Krahl.

Defines a second interface for the dma2d controller.  Controlling both LTDC and DMA2D was unpractical from the programmers view because both controllers are to different. LTDC only controls the display visibility but the DMA2D controller changes the content of the frame buffer (buffer of the layer).

The main features are:

1. DMA2D interface
   Supports the nuttx pixel formats:
   - FB_FMT_RGB8
   - FB_FMT_RGB24
   - FB_FMT_RGB16_565
   Dynamic layer allocation during runtime for the supported formats
   - The number of allocatable layer can be configured.
   Supported dma2d operation:
   - blit (Copy content from source to destination layer) also works with
     selectable area.
   - blend (Blend two layer and copy the result to a destination layer wich can
     be a third layer or one of the source layer) also works with selectable
     area.
   - fillarea (Fill a defined area of the whole layer with a specific color)

As a result of that the dma2d controller can't transfer data from the core coupled me...

SAM3/4 and SAMV7 UART:  The IMR register is read-only.  This means that sam_restoreints() does not actually re-enable UART interrupts.

A side-effect of changing serial settings via TERMIOS (such as tcsetattr) is that serial interrupts were being left disabled.  This is not a problem if the serial configuration is changed when there are no open references to the serial device.  In that case, serial interrupts are disabled and will not be enabled enabled until the serial device is first opened.  But it is fatal if the serial device is already opened and if there is a task waiting to receive data.  In that case, the side-effect of disabling interrupts is fatal:  That task is then left hanging with interrupts disabled.

Implements CONFIG_TIME_EXTENDED as we discussed relative to providing the last 3 members of the tm struct and support for filling them in and even using the wday in the STM32 RTC. From David Sidrane.

Add conditional logic so that people who use F1 don't have to be bother with meaningless RTC MAGIC settings

SAMV7:  Apparently the data sheet is wrong, SDRAM clocking must be enabled at the PMC or the SDRAM does not work!  The data sheet says that there is no clock control for SDRAMC

More renaming: up_lcdinitialize->board_lcd_initialize, up_lcdgetdev->board_lcd_getdev, up_lcduninitialize->board_lcd_uninitialize

SAMV7: Add SMC register definition header file; SAMV71-Xult: Add an LCD driver.  The initial commit is simply the SAVM4E-EK ILI9375 driver will bogus name changes to ILI9488.