Simulation: Change how simulated UART data availability is signaled.  The last change is not safe (but I don't like this workaround either -- maybe something better will come to me).

simulation: Add a simulatied UART input device.  Also lots of misc clean-up for stylistic compatibility with other architectures

Repartition some message queue logic: sched/mqueue should have all mqueue knowledge; fs/mqueue should deal only with inodes

Fix some unbalanced sched_lock()/sched_unlock() pairs int the re-implemented VFS semaphore and message queue logic