Timer Timer:  Timer driver now initializes without complaints.  Need a test driver of some kind to make more testing progress.

Tiva Timer:  Rename tiva_timerlow.c to tiva_timerlow32.c since it only supports 32-bit periodic timers

Tiva Timer:  Allow timeout interrupts even if the reload value is zero.  That is the value that is need to get an interrupt on the wrap from 0xffffffff to 0x00000000

Tiva Timer: Add conditional compilation to enable/disable each timer feature.  Not only does this reduce the footprint by suppressing unused features, it also protects from partially implemented features that are now conditioned on EXPERIMENTAL

Tive Timer:  Add support for ADC trigger generation from one-shot and periodic timers for timeout and match evetns

Tiva Timer: Add support to set the match regiser(s) relative to the timer counter (and prescale) registers.  Enable match interrupts.  These are one time interruprts:  After the match interrupt is dispatched, further match interrupts are disabled

Tive System Control: Add logic to configure the alternatie clock source (ALTCLK).  Needed by the Tiva timer module

STM32 SDIO:  Don't let architectures select CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE unless they have implemented SDIOWAIT_WRCOMPLETE