- Jul 31, 2013
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Gregory Nutt authored
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Gregory Nutt authored
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- Jul 30, 2013
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Gregory Nutt authored
SAMA5: Change mapping of vector tables to work around that fact that I don't understand how the AXI MATRIX remap works
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Gregory Nutt authored
ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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- Jul 29, 2013
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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- Jul 28, 2013
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Gregory Nutt authored
SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however
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Gregory Nutt authored
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Gregory Nutt authored
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- Jul 27, 2013
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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- Jul 26, 2013
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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- Jul 25, 2013
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Gregory Nutt authored
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Gregory Nutt authored
Fix an uninitialized register error that crept into the ARM9 start up code many years ago and was recently cloned into the Cortex-A5. Obviously no on has used NuttX with ARM9 for years
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- Jul 24, 2013
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
Revamp the way external memory regions are configured; Add logic to add SAMA5 external memory regions to the heap
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Gregory Nutt authored
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Gregory Nutt authored
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- Jul 23, 2013
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Gregory Nutt authored
Improve some ARMv7-A/M floating point register save time; Add floating point register save logic for ARMv7-A
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Gregory Nutt authored
ARMv7-A: Need 8-byte stack alignment when callign C code from interrupt handlers. This change needs to be ported to other ARM architectures as well
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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Gregory Nutt authored
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- Jul 22, 2013
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Gregory Nutt authored
SAMA5 clock configuration should now agree with Atmel sample code; Added header file with macros to enable and disable peripheral clocking
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