drivers/ramdisk.c and include/nuttx/fs/ramdisk.h:  Add logic to dispose of the drvier and RAM buffer when the RAM disk has been unlinked and all open references to the RAM disk have been closed.  Add new parameters to romdisk() to specify what should be done with the RAM/ROM buffer -- Should it be freed or not?  Changed all calls to ramdisk() to use these new parameters.

Moteino Mega:  Rename files to conform to newer standards.  Need to fix all of the old configurations someday

Get USART 2 & 3 working on lpc4357-evb. These changes are required to get USART 2 and 3 working on the Embest development board.  From Toby Duckworth

First step at porting to MoteinoMEGA.  LED shows assert failure at boot.  Appears to be short double blink, short off (~1sec), followed by 250ms toggle cycles.  Most of it derived from amber board.

Remove CONFIG_DEBUG_STACK.  Adding CONFIG_STACK_COLORATION makes this configuration option pointless

Network: Add an IPv4 configuration option.  Hardcoded to =y for now, but I would like to be able to select IPv4 and/or IPv6 in the future

This is not the official configuration for the PX4 board and has led to confusion by NuttX users.  The board configuration also requires some ongoing maintenance and customization to support ongoing PX4 testing and evaluation.  It is best retained the PX4 repositories where it can be properly maintained and not in the upstream NuttX repository.

Removed setting of the initial timer interval load value (or, rather, it is always set to zero for a free-running timer).  Also, do not unconditional enable the timer out interrupt.  The timerout interrupt is not not enabled until tiva_timer32_setinterval() is called.

Timer Timer:  Timer driver now initializes without complaints.  Need a test driver of some kind to make more testing progress.

Tive System Control: Add logic to configure the alternatie clock source (ALTCLK).  Needed by the Tiva timer module

DK-TM42129X: Support for the TMP100 temperature sensor is enabled by default in the NSH configuration

Tiva PHY Interrupts: Need to read the PHY interrupt status register in order to clear the pending PHY interrupt