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  1. Nov 22, 2016
  2. Nov 21, 2016
  3. Nov 20, 2016
    • Gregory Nutt's avatar
      Update README · d83ad629
      Gregory Nutt authored
      d83ad629
    • Gregory Nutt's avatar
      Update TODO list · cee8d59b
      Gregory Nutt authored
      cee8d59b
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      Update README and TODO list · 01ade480
      Gregory Nutt authored
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      This commit adds a new internal interfaces and fixes a problem with three APIs... · e24f2814
      Gregory Nutt authored
      This commit adds a new internal interfaces and fixes a problem with three APIs in the SMP configuration.  The new internal interface is sched_cpu_pause(tcb).  This function will pause a CPU if the task associated with 'tcb' is running on that CPU.  This allows a different CPU to modify that OS data stuctures associated with the CPU.  When the other CPU is resumed, those modifications can safely take place.
      
      The three fixes are to handle cases in the SMP configuration where one CPU does need to make modifications to TCB and data structures on a task that could be running running on another CPU.  Those three cases are task_delete(), task_restart(), and execution of signal handles.  In all three cases the solutions is basically the same:  (1) Call sched_cpu_pause(tcb) to pause the CPU on which the task is running, (2) perform the necessary operations, then (3) call up_cpu_resume() to restart the paused CPU.
      e24f2814
  4. Nov 19, 2016
  5. Nov 18, 2016
    • Gregory Nutt's avatar
      Update ChangeLog · 48d9fff9
      Gregory Nutt authored
      48d9fff9
    • Gregory Nutt's avatar
      Most interrupt handling logic interacts with tasks via standard mechanism such... · 69e9f863
      Gregory Nutt authored
      Most interrupt handling logic interacts with tasks via standard mechanism such as sem_post, sigqueue, mq_send, etc.  This all call enter_critical_section and are assumed to be safe in the SMP case.
      
      But certain logic interacts with tasks in different ways.  The only one that comes to mind are wdogs.  There is a tasking interface that to manipulate wdogs, and a different interface in the timer interrupt handling logic to manage wdog expirations.
      
      In the normal case, this is fine.  Since the tasking level code calls enter_critical_section, interrupts are disabled an no conflicts can occur.  But that may not be the case in the SMP case.  Most architectures do not permit disabling interrupts on other CPUs so enter_critical_section must work differently:  Locks are required to protect code.
      
      So this change adds locking (via enter_critical section) to wdog expiration logic for the the case if the SMP configuration.
      69e9f863