Atmega2560

The main challenge is to change the context switch code to be aware of the
extra byte that is saved on stack during call and intterupt. This relates also
to the task startup and signal handling.

Put setting of XDIV into ifdef since not AVR platforms support it.

For AVR chips (Atmega2560) Program Counter register larger than 16 bits
EIND represents the most significant byte that is used for EICALL and EIJMP
instructions.

Setting of EIND is normally managed by compiler, but I have seen a situation
when for first 64K flash segment compiler didn't set EINT explicitly. Thus
setting EIND at system startup makes sure we are safe.

Disabling interrupts at the very beginning of system init does not
make sense after reset since interrupts are disabled anyway. But
it is very convenient for debugging purposes, in situations when the
system misbehaves and ocassionally jumps to zero.

Sometimes I need UART to support binary data transfer, TCSETS/TCGETS allow
stwitching into binary mode.

Minor bug while working on Arduino Mega support. I didn't add support
for ARCH_HAVE_LEDS and have it undefined in .config. To my surprise compilation
failed since AVR code had a related function compiled in.

arch/avr/Makefile is adding extra EXEEXT to the
nuttix image file. This was not discovered since in most configurations
EXEEXT is empty string.

ARMv7-R and TMS570: Re-orider some initialization logic.  __start used to called arm_boot() which would return.  Then __start would call os_start().  That won't work for the TMS570 if is does a destructive memory tested because the return information will be lost in the stack.  Also comment a nuisance assertion. The assertion is probably correct but certainly a nuisance during initial testing

This is for forthcoming Atmega2560 support. The Atmega2560 has 24-bit PC
thus, PCH and PCL would become PCH, PCM and PCL (M for Middle). The problem
that in this notation PCM is equivalent to former PCH. This makes compatable
porting kind of difficult, at least for my taste.

Instead PCH becomes PC0 and PCL becomes PC1 (think of the index as order of
bytes pushed to stack when call is performed, PC0 as MSB goes first, PC1
goes to stack second, and for 24-bit PC, PC2 as LDB goes last).

Modify Kconfig to be aware of the new chip.
Add all the interrupt hanler constants and vectors where needed.
Move contsatnts from generic to specific headers when needed.

AVR: Fix interrupt bombing during a context switch

TCB_RESTORE macro has a problem when restoring Status Register
and returning from the function (in up_fullcontextrestore()) as non-atomic action.

If there is some frequently occurring interrupt, chances are that we will
enter the interrupt handler just before ret is called.
The handler may cause a context switch which, when unrolled, will
execute up_fullcontextrestore() function that employs TCB_RESTORE.
It will be interrupted again just before return, leaving part of context
switch content un-popped again, etc... Thus, chances are that the stack will
eventually blow.

Note that this is not some edge condition fix. This bug was discovered when
testing AVR with UART configured to work on 115200 baud rate.

TMS570: Does not have prioritized interrupts in the sense of other CPUs.  Fix some compile errors when DEBUG is enabled